1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * phylink models the MAC to optional PHY connection, supporting 4 * technologies such as SFP cages where the PHY is hot-pluggable. 5 * 6 * Copyright (C) 2015 Russell King 7 */ 8 #include <linux/acpi.h> 9 #include <linux/ethtool.h> 10 #include <linux/export.h> 11 #include <linux/gpio/consumer.h> 12 #include <linux/netdevice.h> 13 #include <linux/of.h> 14 #include <linux/of_mdio.h> 15 #include <linux/phy.h> 16 #include <linux/phy_fixed.h> 17 #include <linux/phylink.h> 18 #include <linux/rtnetlink.h> 19 #include <linux/spinlock.h> 20 #include <linux/timer.h> 21 #include <linux/workqueue.h> 22 23 #include "sfp.h" 24 #include "swphy.h" 25 26 #define SUPPORTED_INTERFACES \ 27 (SUPPORTED_TP | SUPPORTED_MII | SUPPORTED_FIBRE | \ 28 SUPPORTED_BNC | SUPPORTED_AUI | SUPPORTED_Backplane) 29 #define ADVERTISED_INTERFACES \ 30 (ADVERTISED_TP | ADVERTISED_MII | ADVERTISED_FIBRE | \ 31 ADVERTISED_BNC | ADVERTISED_AUI | ADVERTISED_Backplane) 32 33 enum { 34 PHYLINK_DISABLE_STOPPED, 35 PHYLINK_DISABLE_LINK, 36 PHYLINK_DISABLE_MAC_WOL, 37 }; 38 39 /** 40 * struct phylink - internal data type for phylink 41 */ 42 struct phylink { 43 /* private: */ 44 struct net_device *netdev; 45 const struct phylink_mac_ops *mac_ops; 46 struct phylink_config *config; 47 struct phylink_pcs *pcs; 48 struct device *dev; 49 unsigned int old_link_state:1; 50 51 unsigned long phylink_disable_state; /* bitmask of disables */ 52 struct phy_device *phydev; 53 phy_interface_t link_interface; /* PHY_INTERFACE_xxx */ 54 u8 cfg_link_an_mode; /* MLO_AN_xxx */ 55 u8 cur_link_an_mode; 56 u8 link_port; /* The current non-phy ethtool port */ 57 __ETHTOOL_DECLARE_LINK_MODE_MASK(supported); 58 59 /* The link configuration settings */ 60 struct phylink_link_state link_config; 61 62 /* The current settings */ 63 phy_interface_t cur_interface; 64 65 struct gpio_desc *link_gpio; 66 unsigned int link_irq; 67 struct timer_list link_poll; 68 void (*get_fixed_state)(struct net_device *dev, 69 struct phylink_link_state *s); 70 71 struct mutex state_mutex; 72 struct phylink_link_state phy_state; 73 struct work_struct resolve; 74 75 bool mac_link_dropped; 76 bool using_mac_select_pcs; 77 78 struct sfp_bus *sfp_bus; 79 bool sfp_may_have_phy; 80 DECLARE_PHY_INTERFACE_MASK(sfp_interfaces); 81 __ETHTOOL_DECLARE_LINK_MODE_MASK(sfp_support); 82 u8 sfp_port; 83 }; 84 85 #define phylink_printk(level, pl, fmt, ...) \ 86 do { \ 87 if ((pl)->config->type == PHYLINK_NETDEV) \ 88 netdev_printk(level, (pl)->netdev, fmt, ##__VA_ARGS__); \ 89 else if ((pl)->config->type == PHYLINK_DEV) \ 90 dev_printk(level, (pl)->dev, fmt, ##__VA_ARGS__); \ 91 } while (0) 92 93 #define phylink_err(pl, fmt, ...) \ 94 phylink_printk(KERN_ERR, pl, fmt, ##__VA_ARGS__) 95 #define phylink_warn(pl, fmt, ...) \ 96 phylink_printk(KERN_WARNING, pl, fmt, ##__VA_ARGS__) 97 #define phylink_info(pl, fmt, ...) \ 98 phylink_printk(KERN_INFO, pl, fmt, ##__VA_ARGS__) 99 #if defined(CONFIG_DYNAMIC_DEBUG) 100 #define phylink_dbg(pl, fmt, ...) \ 101 do { \ 102 if ((pl)->config->type == PHYLINK_NETDEV) \ 103 netdev_dbg((pl)->netdev, fmt, ##__VA_ARGS__); \ 104 else if ((pl)->config->type == PHYLINK_DEV) \ 105 dev_dbg((pl)->dev, fmt, ##__VA_ARGS__); \ 106 } while (0) 107 #elif defined(DEBUG) 108 #define phylink_dbg(pl, fmt, ...) \ 109 phylink_printk(KERN_DEBUG, pl, fmt, ##__VA_ARGS__) 110 #else 111 #define phylink_dbg(pl, fmt, ...) \ 112 ({ \ 113 if (0) \ 114 phylink_printk(KERN_DEBUG, pl, fmt, ##__VA_ARGS__); \ 115 }) 116 #endif 117 118 /** 119 * phylink_set_port_modes() - set the port type modes in the ethtool mask 120 * @mask: ethtool link mode mask 121 * 122 * Sets all the port type modes in the ethtool mask. MAC drivers should 123 * use this in their 'validate' callback. 124 */ 125 void phylink_set_port_modes(unsigned long *mask) 126 { 127 phylink_set(mask, TP); 128 phylink_set(mask, AUI); 129 phylink_set(mask, MII); 130 phylink_set(mask, FIBRE); 131 phylink_set(mask, BNC); 132 phylink_set(mask, Backplane); 133 } 134 EXPORT_SYMBOL_GPL(phylink_set_port_modes); 135 136 static int phylink_is_empty_linkmode(const unsigned long *linkmode) 137 { 138 __ETHTOOL_DECLARE_LINK_MODE_MASK(tmp) = { 0, }; 139 140 phylink_set_port_modes(tmp); 141 phylink_set(tmp, Autoneg); 142 phylink_set(tmp, Pause); 143 phylink_set(tmp, Asym_Pause); 144 145 return linkmode_subset(linkmode, tmp); 146 } 147 148 static const char *phylink_an_mode_str(unsigned int mode) 149 { 150 static const char *modestr[] = { 151 [MLO_AN_PHY] = "phy", 152 [MLO_AN_FIXED] = "fixed", 153 [MLO_AN_INBAND] = "inband", 154 }; 155 156 return mode < ARRAY_SIZE(modestr) ? modestr[mode] : "unknown"; 157 } 158 159 /** 160 * phylink_interface_max_speed() - get the maximum speed of a phy interface 161 * @interface: phy interface mode defined by &typedef phy_interface_t 162 * 163 * Determine the maximum speed of a phy interface. This is intended to help 164 * determine the correct speed to pass to the MAC when the phy is performing 165 * rate matching. 166 * 167 * Return: The maximum speed of @interface 168 */ 169 static int phylink_interface_max_speed(phy_interface_t interface) 170 { 171 switch (interface) { 172 case PHY_INTERFACE_MODE_100BASEX: 173 case PHY_INTERFACE_MODE_REVRMII: 174 case PHY_INTERFACE_MODE_RMII: 175 case PHY_INTERFACE_MODE_SMII: 176 case PHY_INTERFACE_MODE_REVMII: 177 case PHY_INTERFACE_MODE_MII: 178 return SPEED_100; 179 180 case PHY_INTERFACE_MODE_TBI: 181 case PHY_INTERFACE_MODE_MOCA: 182 case PHY_INTERFACE_MODE_RTBI: 183 case PHY_INTERFACE_MODE_1000BASEX: 184 case PHY_INTERFACE_MODE_1000BASEKX: 185 case PHY_INTERFACE_MODE_TRGMII: 186 case PHY_INTERFACE_MODE_RGMII_TXID: 187 case PHY_INTERFACE_MODE_RGMII_RXID: 188 case PHY_INTERFACE_MODE_RGMII_ID: 189 case PHY_INTERFACE_MODE_RGMII: 190 case PHY_INTERFACE_MODE_QSGMII: 191 case PHY_INTERFACE_MODE_SGMII: 192 case PHY_INTERFACE_MODE_GMII: 193 return SPEED_1000; 194 195 case PHY_INTERFACE_MODE_2500BASEX: 196 return SPEED_2500; 197 198 case PHY_INTERFACE_MODE_5GBASER: 199 return SPEED_5000; 200 201 case PHY_INTERFACE_MODE_XGMII: 202 case PHY_INTERFACE_MODE_RXAUI: 203 case PHY_INTERFACE_MODE_XAUI: 204 case PHY_INTERFACE_MODE_10GBASER: 205 case PHY_INTERFACE_MODE_10GKR: 206 case PHY_INTERFACE_MODE_USXGMII: 207 case PHY_INTERFACE_MODE_QUSGMII: 208 return SPEED_10000; 209 210 case PHY_INTERFACE_MODE_25GBASER: 211 return SPEED_25000; 212 213 case PHY_INTERFACE_MODE_XLGMII: 214 return SPEED_40000; 215 216 case PHY_INTERFACE_MODE_INTERNAL: 217 case PHY_INTERFACE_MODE_NA: 218 case PHY_INTERFACE_MODE_MAX: 219 /* No idea! Garbage in, unknown out */ 220 return SPEED_UNKNOWN; 221 } 222 223 /* If we get here, someone forgot to add an interface mode above */ 224 WARN_ON_ONCE(1); 225 return SPEED_UNKNOWN; 226 } 227 228 /** 229 * phylink_caps_to_linkmodes() - Convert capabilities to ethtool link modes 230 * @linkmodes: ethtool linkmode mask (must be already initialised) 231 * @caps: bitmask of MAC capabilities 232 * 233 * Set all possible pause, speed and duplex linkmodes in @linkmodes that are 234 * supported by the @caps. @linkmodes must have been initialised previously. 235 */ 236 void phylink_caps_to_linkmodes(unsigned long *linkmodes, unsigned long caps) 237 { 238 if (caps & MAC_SYM_PAUSE) 239 __set_bit(ETHTOOL_LINK_MODE_Pause_BIT, linkmodes); 240 241 if (caps & MAC_ASYM_PAUSE) 242 __set_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, linkmodes); 243 244 if (caps & MAC_10HD) { 245 __set_bit(ETHTOOL_LINK_MODE_10baseT_Half_BIT, linkmodes); 246 __set_bit(ETHTOOL_LINK_MODE_10baseT1S_Half_BIT, linkmodes); 247 __set_bit(ETHTOOL_LINK_MODE_10baseT1S_P2MP_Half_BIT, linkmodes); 248 } 249 250 if (caps & MAC_10FD) { 251 __set_bit(ETHTOOL_LINK_MODE_10baseT_Full_BIT, linkmodes); 252 __set_bit(ETHTOOL_LINK_MODE_10baseT1L_Full_BIT, linkmodes); 253 __set_bit(ETHTOOL_LINK_MODE_10baseT1S_Full_BIT, linkmodes); 254 } 255 256 if (caps & MAC_100HD) { 257 __set_bit(ETHTOOL_LINK_MODE_100baseT_Half_BIT, linkmodes); 258 __set_bit(ETHTOOL_LINK_MODE_100baseFX_Half_BIT, linkmodes); 259 } 260 261 if (caps & MAC_100FD) { 262 __set_bit(ETHTOOL_LINK_MODE_100baseT_Full_BIT, linkmodes); 263 __set_bit(ETHTOOL_LINK_MODE_100baseT1_Full_BIT, linkmodes); 264 __set_bit(ETHTOOL_LINK_MODE_100baseFX_Full_BIT, linkmodes); 265 } 266 267 if (caps & MAC_1000HD) 268 __set_bit(ETHTOOL_LINK_MODE_1000baseT_Half_BIT, linkmodes); 269 270 if (caps & MAC_1000FD) { 271 __set_bit(ETHTOOL_LINK_MODE_1000baseT_Full_BIT, linkmodes); 272 __set_bit(ETHTOOL_LINK_MODE_1000baseKX_Full_BIT, linkmodes); 273 __set_bit(ETHTOOL_LINK_MODE_1000baseX_Full_BIT, linkmodes); 274 __set_bit(ETHTOOL_LINK_MODE_1000baseT1_Full_BIT, linkmodes); 275 } 276 277 if (caps & MAC_2500FD) { 278 __set_bit(ETHTOOL_LINK_MODE_2500baseT_Full_BIT, linkmodes); 279 __set_bit(ETHTOOL_LINK_MODE_2500baseX_Full_BIT, linkmodes); 280 } 281 282 if (caps & MAC_5000FD) 283 __set_bit(ETHTOOL_LINK_MODE_5000baseT_Full_BIT, linkmodes); 284 285 if (caps & MAC_10000FD) { 286 __set_bit(ETHTOOL_LINK_MODE_10000baseT_Full_BIT, linkmodes); 287 __set_bit(ETHTOOL_LINK_MODE_10000baseKX4_Full_BIT, linkmodes); 288 __set_bit(ETHTOOL_LINK_MODE_10000baseKR_Full_BIT, linkmodes); 289 __set_bit(ETHTOOL_LINK_MODE_10000baseR_FEC_BIT, linkmodes); 290 __set_bit(ETHTOOL_LINK_MODE_10000baseCR_Full_BIT, linkmodes); 291 __set_bit(ETHTOOL_LINK_MODE_10000baseSR_Full_BIT, linkmodes); 292 __set_bit(ETHTOOL_LINK_MODE_10000baseLR_Full_BIT, linkmodes); 293 __set_bit(ETHTOOL_LINK_MODE_10000baseLRM_Full_BIT, linkmodes); 294 __set_bit(ETHTOOL_LINK_MODE_10000baseER_Full_BIT, linkmodes); 295 } 296 297 if (caps & MAC_25000FD) { 298 __set_bit(ETHTOOL_LINK_MODE_25000baseCR_Full_BIT, linkmodes); 299 __set_bit(ETHTOOL_LINK_MODE_25000baseKR_Full_BIT, linkmodes); 300 __set_bit(ETHTOOL_LINK_MODE_25000baseSR_Full_BIT, linkmodes); 301 } 302 303 if (caps & MAC_40000FD) { 304 __set_bit(ETHTOOL_LINK_MODE_40000baseKR4_Full_BIT, linkmodes); 305 __set_bit(ETHTOOL_LINK_MODE_40000baseCR4_Full_BIT, linkmodes); 306 __set_bit(ETHTOOL_LINK_MODE_40000baseSR4_Full_BIT, linkmodes); 307 __set_bit(ETHTOOL_LINK_MODE_40000baseLR4_Full_BIT, linkmodes); 308 } 309 310 if (caps & MAC_50000FD) { 311 __set_bit(ETHTOOL_LINK_MODE_50000baseCR2_Full_BIT, linkmodes); 312 __set_bit(ETHTOOL_LINK_MODE_50000baseKR2_Full_BIT, linkmodes); 313 __set_bit(ETHTOOL_LINK_MODE_50000baseSR2_Full_BIT, linkmodes); 314 __set_bit(ETHTOOL_LINK_MODE_50000baseKR_Full_BIT, linkmodes); 315 __set_bit(ETHTOOL_LINK_MODE_50000baseSR_Full_BIT, linkmodes); 316 __set_bit(ETHTOOL_LINK_MODE_50000baseCR_Full_BIT, linkmodes); 317 __set_bit(ETHTOOL_LINK_MODE_50000baseLR_ER_FR_Full_BIT, 318 linkmodes); 319 __set_bit(ETHTOOL_LINK_MODE_50000baseDR_Full_BIT, linkmodes); 320 } 321 322 if (caps & MAC_56000FD) { 323 __set_bit(ETHTOOL_LINK_MODE_56000baseKR4_Full_BIT, linkmodes); 324 __set_bit(ETHTOOL_LINK_MODE_56000baseCR4_Full_BIT, linkmodes); 325 __set_bit(ETHTOOL_LINK_MODE_56000baseSR4_Full_BIT, linkmodes); 326 __set_bit(ETHTOOL_LINK_MODE_56000baseLR4_Full_BIT, linkmodes); 327 } 328 329 if (caps & MAC_100000FD) { 330 __set_bit(ETHTOOL_LINK_MODE_100000baseKR4_Full_BIT, linkmodes); 331 __set_bit(ETHTOOL_LINK_MODE_100000baseSR4_Full_BIT, linkmodes); 332 __set_bit(ETHTOOL_LINK_MODE_100000baseCR4_Full_BIT, linkmodes); 333 __set_bit(ETHTOOL_LINK_MODE_100000baseLR4_ER4_Full_BIT, 334 linkmodes); 335 __set_bit(ETHTOOL_LINK_MODE_100000baseKR2_Full_BIT, linkmodes); 336 __set_bit(ETHTOOL_LINK_MODE_100000baseSR2_Full_BIT, linkmodes); 337 __set_bit(ETHTOOL_LINK_MODE_100000baseCR2_Full_BIT, linkmodes); 338 __set_bit(ETHTOOL_LINK_MODE_100000baseLR2_ER2_FR2_Full_BIT, 339 linkmodes); 340 __set_bit(ETHTOOL_LINK_MODE_100000baseDR2_Full_BIT, linkmodes); 341 __set_bit(ETHTOOL_LINK_MODE_100000baseKR_Full_BIT, linkmodes); 342 __set_bit(ETHTOOL_LINK_MODE_100000baseSR_Full_BIT, linkmodes); 343 __set_bit(ETHTOOL_LINK_MODE_100000baseLR_ER_FR_Full_BIT, 344 linkmodes); 345 __set_bit(ETHTOOL_LINK_MODE_100000baseCR_Full_BIT, linkmodes); 346 __set_bit(ETHTOOL_LINK_MODE_100000baseDR_Full_BIT, linkmodes); 347 } 348 349 if (caps & MAC_200000FD) { 350 __set_bit(ETHTOOL_LINK_MODE_200000baseKR4_Full_BIT, linkmodes); 351 __set_bit(ETHTOOL_LINK_MODE_200000baseSR4_Full_BIT, linkmodes); 352 __set_bit(ETHTOOL_LINK_MODE_200000baseLR4_ER4_FR4_Full_BIT, 353 linkmodes); 354 __set_bit(ETHTOOL_LINK_MODE_200000baseDR4_Full_BIT, linkmodes); 355 __set_bit(ETHTOOL_LINK_MODE_200000baseCR4_Full_BIT, linkmodes); 356 __set_bit(ETHTOOL_LINK_MODE_200000baseKR2_Full_BIT, linkmodes); 357 __set_bit(ETHTOOL_LINK_MODE_200000baseSR2_Full_BIT, linkmodes); 358 __set_bit(ETHTOOL_LINK_MODE_200000baseLR2_ER2_FR2_Full_BIT, 359 linkmodes); 360 __set_bit(ETHTOOL_LINK_MODE_200000baseDR2_Full_BIT, linkmodes); 361 __set_bit(ETHTOOL_LINK_MODE_200000baseCR2_Full_BIT, linkmodes); 362 } 363 364 if (caps & MAC_400000FD) { 365 __set_bit(ETHTOOL_LINK_MODE_400000baseKR8_Full_BIT, linkmodes); 366 __set_bit(ETHTOOL_LINK_MODE_400000baseSR8_Full_BIT, linkmodes); 367 __set_bit(ETHTOOL_LINK_MODE_400000baseLR8_ER8_FR8_Full_BIT, 368 linkmodes); 369 __set_bit(ETHTOOL_LINK_MODE_400000baseDR8_Full_BIT, linkmodes); 370 __set_bit(ETHTOOL_LINK_MODE_400000baseCR8_Full_BIT, linkmodes); 371 __set_bit(ETHTOOL_LINK_MODE_400000baseKR4_Full_BIT, linkmodes); 372 __set_bit(ETHTOOL_LINK_MODE_400000baseSR4_Full_BIT, linkmodes); 373 __set_bit(ETHTOOL_LINK_MODE_400000baseLR4_ER4_FR4_Full_BIT, 374 linkmodes); 375 __set_bit(ETHTOOL_LINK_MODE_400000baseDR4_Full_BIT, linkmodes); 376 __set_bit(ETHTOOL_LINK_MODE_400000baseCR4_Full_BIT, linkmodes); 377 } 378 } 379 EXPORT_SYMBOL_GPL(phylink_caps_to_linkmodes); 380 381 static struct { 382 unsigned long mask; 383 int speed; 384 unsigned int duplex; 385 } phylink_caps_params[] = { 386 { MAC_400000FD, SPEED_400000, DUPLEX_FULL }, 387 { MAC_200000FD, SPEED_200000, DUPLEX_FULL }, 388 { MAC_100000FD, SPEED_100000, DUPLEX_FULL }, 389 { MAC_56000FD, SPEED_56000, DUPLEX_FULL }, 390 { MAC_50000FD, SPEED_50000, DUPLEX_FULL }, 391 { MAC_40000FD, SPEED_40000, DUPLEX_FULL }, 392 { MAC_25000FD, SPEED_25000, DUPLEX_FULL }, 393 { MAC_20000FD, SPEED_20000, DUPLEX_FULL }, 394 { MAC_10000FD, SPEED_10000, DUPLEX_FULL }, 395 { MAC_5000FD, SPEED_5000, DUPLEX_FULL }, 396 { MAC_2500FD, SPEED_2500, DUPLEX_FULL }, 397 { MAC_1000FD, SPEED_1000, DUPLEX_FULL }, 398 { MAC_1000HD, SPEED_1000, DUPLEX_HALF }, 399 { MAC_100FD, SPEED_100, DUPLEX_FULL }, 400 { MAC_100HD, SPEED_100, DUPLEX_HALF }, 401 { MAC_10FD, SPEED_10, DUPLEX_FULL }, 402 { MAC_10HD, SPEED_10, DUPLEX_HALF }, 403 }; 404 405 /** 406 * phylink_cap_from_speed_duplex - Get mac capability from speed/duplex 407 * @speed: the speed to search for 408 * @duplex: the duplex to search for 409 * 410 * Find the mac capability for a given speed and duplex. 411 * 412 * Return: A mask with the mac capability patching @speed and @duplex, or 0 if 413 * there were no matches. 414 */ 415 static unsigned long phylink_cap_from_speed_duplex(int speed, 416 unsigned int duplex) 417 { 418 int i; 419 420 for (i = 0; i < ARRAY_SIZE(phylink_caps_params); i++) { 421 if (speed == phylink_caps_params[i].speed && 422 duplex == phylink_caps_params[i].duplex) 423 return phylink_caps_params[i].mask; 424 } 425 426 return 0; 427 } 428 429 /** 430 * phylink_get_capabilities() - get capabilities for a given MAC 431 * @interface: phy interface mode defined by &typedef phy_interface_t 432 * @mac_capabilities: bitmask of MAC capabilities 433 * @rate_matching: type of rate matching being performed 434 * 435 * Get the MAC capabilities that are supported by the @interface mode and 436 * @mac_capabilities. 437 */ 438 unsigned long phylink_get_capabilities(phy_interface_t interface, 439 unsigned long mac_capabilities, 440 int rate_matching) 441 { 442 int max_speed = phylink_interface_max_speed(interface); 443 unsigned long caps = MAC_SYM_PAUSE | MAC_ASYM_PAUSE; 444 unsigned long matched_caps = 0; 445 446 switch (interface) { 447 case PHY_INTERFACE_MODE_USXGMII: 448 caps |= MAC_10000FD | MAC_5000FD | MAC_2500FD; 449 fallthrough; 450 451 case PHY_INTERFACE_MODE_RGMII_TXID: 452 case PHY_INTERFACE_MODE_RGMII_RXID: 453 case PHY_INTERFACE_MODE_RGMII_ID: 454 case PHY_INTERFACE_MODE_RGMII: 455 case PHY_INTERFACE_MODE_QSGMII: 456 case PHY_INTERFACE_MODE_QUSGMII: 457 case PHY_INTERFACE_MODE_SGMII: 458 case PHY_INTERFACE_MODE_GMII: 459 caps |= MAC_1000HD | MAC_1000FD; 460 fallthrough; 461 462 case PHY_INTERFACE_MODE_REVRMII: 463 case PHY_INTERFACE_MODE_RMII: 464 case PHY_INTERFACE_MODE_SMII: 465 case PHY_INTERFACE_MODE_REVMII: 466 case PHY_INTERFACE_MODE_MII: 467 caps |= MAC_10HD | MAC_10FD; 468 fallthrough; 469 470 case PHY_INTERFACE_MODE_100BASEX: 471 caps |= MAC_100HD | MAC_100FD; 472 break; 473 474 case PHY_INTERFACE_MODE_TBI: 475 case PHY_INTERFACE_MODE_MOCA: 476 case PHY_INTERFACE_MODE_RTBI: 477 case PHY_INTERFACE_MODE_1000BASEX: 478 caps |= MAC_1000HD; 479 fallthrough; 480 case PHY_INTERFACE_MODE_1000BASEKX: 481 case PHY_INTERFACE_MODE_TRGMII: 482 caps |= MAC_1000FD; 483 break; 484 485 case PHY_INTERFACE_MODE_2500BASEX: 486 caps |= MAC_2500FD; 487 break; 488 489 case PHY_INTERFACE_MODE_5GBASER: 490 caps |= MAC_5000FD; 491 break; 492 493 case PHY_INTERFACE_MODE_XGMII: 494 case PHY_INTERFACE_MODE_RXAUI: 495 case PHY_INTERFACE_MODE_XAUI: 496 case PHY_INTERFACE_MODE_10GBASER: 497 case PHY_INTERFACE_MODE_10GKR: 498 caps |= MAC_10000FD; 499 break; 500 501 case PHY_INTERFACE_MODE_25GBASER: 502 caps |= MAC_25000FD; 503 break; 504 505 case PHY_INTERFACE_MODE_XLGMII: 506 caps |= MAC_40000FD; 507 break; 508 509 case PHY_INTERFACE_MODE_INTERNAL: 510 caps |= ~0; 511 break; 512 513 case PHY_INTERFACE_MODE_NA: 514 case PHY_INTERFACE_MODE_MAX: 515 break; 516 } 517 518 switch (rate_matching) { 519 case RATE_MATCH_OPEN_LOOP: 520 /* TODO */ 521 fallthrough; 522 case RATE_MATCH_NONE: 523 matched_caps = 0; 524 break; 525 case RATE_MATCH_PAUSE: { 526 /* The MAC must support asymmetric pause towards the local 527 * device for this. We could allow just symmetric pause, but 528 * then we might have to renegotiate if the link partner 529 * doesn't support pause. This is because there's no way to 530 * accept pause frames without transmitting them if we only 531 * support symmetric pause. 532 */ 533 if (!(mac_capabilities & MAC_SYM_PAUSE) || 534 !(mac_capabilities & MAC_ASYM_PAUSE)) 535 break; 536 537 /* We can't adapt if the MAC doesn't support the interface's 538 * max speed at full duplex. 539 */ 540 if (mac_capabilities & 541 phylink_cap_from_speed_duplex(max_speed, DUPLEX_FULL)) { 542 /* Although a duplex-matching phy might exist, we 543 * conservatively remove these modes because the MAC 544 * will not be aware of the half-duplex nature of the 545 * link. 546 */ 547 matched_caps = GENMASK(__fls(caps), __fls(MAC_10HD)); 548 matched_caps &= ~(MAC_1000HD | MAC_100HD | MAC_10HD); 549 } 550 break; 551 } 552 case RATE_MATCH_CRS: 553 /* The MAC must support half duplex at the interface's max 554 * speed. 555 */ 556 if (mac_capabilities & 557 phylink_cap_from_speed_duplex(max_speed, DUPLEX_HALF)) { 558 matched_caps = GENMASK(__fls(caps), __fls(MAC_10HD)); 559 matched_caps &= mac_capabilities; 560 } 561 break; 562 } 563 564 return (caps & mac_capabilities) | matched_caps; 565 } 566 EXPORT_SYMBOL_GPL(phylink_get_capabilities); 567 568 /** 569 * phylink_validate_mask_caps() - Restrict link modes based on caps 570 * @supported: ethtool bitmask for supported link modes. 571 * @state: pointer to a &struct phylink_link_state. 572 * @mac_capabilities: bitmask of MAC capabilities 573 * 574 * Calculate the supported link modes based on @mac_capabilities, and restrict 575 * @supported and @state based on that. Use this function if your capabiliies 576 * aren't constant, such as if they vary depending on the interface. 577 */ 578 void phylink_validate_mask_caps(unsigned long *supported, 579 struct phylink_link_state *state, 580 unsigned long mac_capabilities) 581 { 582 __ETHTOOL_DECLARE_LINK_MODE_MASK(mask) = { 0, }; 583 unsigned long caps; 584 585 phylink_set_port_modes(mask); 586 phylink_set(mask, Autoneg); 587 caps = phylink_get_capabilities(state->interface, mac_capabilities, 588 state->rate_matching); 589 phylink_caps_to_linkmodes(mask, caps); 590 591 linkmode_and(supported, supported, mask); 592 linkmode_and(state->advertising, state->advertising, mask); 593 } 594 EXPORT_SYMBOL_GPL(phylink_validate_mask_caps); 595 596 /** 597 * phylink_generic_validate() - generic validate() callback implementation 598 * @config: a pointer to a &struct phylink_config. 599 * @supported: ethtool bitmask for supported link modes. 600 * @state: a pointer to a &struct phylink_link_state. 601 * 602 * Generic implementation of the validate() callback that MAC drivers can 603 * use when they pass the range of supported interfaces and MAC capabilities. 604 */ 605 void phylink_generic_validate(struct phylink_config *config, 606 unsigned long *supported, 607 struct phylink_link_state *state) 608 { 609 phylink_validate_mask_caps(supported, state, config->mac_capabilities); 610 } 611 EXPORT_SYMBOL_GPL(phylink_generic_validate); 612 613 static int phylink_validate_mac_and_pcs(struct phylink *pl, 614 unsigned long *supported, 615 struct phylink_link_state *state) 616 { 617 struct phylink_pcs *pcs; 618 int ret; 619 620 /* Get the PCS for this interface mode */ 621 if (pl->using_mac_select_pcs) { 622 pcs = pl->mac_ops->mac_select_pcs(pl->config, state->interface); 623 if (IS_ERR(pcs)) 624 return PTR_ERR(pcs); 625 } else { 626 pcs = pl->pcs; 627 } 628 629 if (pcs) { 630 /* The PCS, if present, must be setup before phylink_create() 631 * has been called. If the ops is not initialised, print an 632 * error and backtrace rather than oopsing the kernel. 633 */ 634 if (!pcs->ops) { 635 phylink_err(pl, "interface %s: uninitialised PCS\n", 636 phy_modes(state->interface)); 637 dump_stack(); 638 return -EINVAL; 639 } 640 641 /* Validate the link parameters with the PCS */ 642 if (pcs->ops->pcs_validate) { 643 ret = pcs->ops->pcs_validate(pcs, supported, state); 644 if (ret < 0 || phylink_is_empty_linkmode(supported)) 645 return -EINVAL; 646 647 /* Ensure the advertising mask is a subset of the 648 * supported mask. 649 */ 650 linkmode_and(state->advertising, state->advertising, 651 supported); 652 } 653 } 654 655 /* Then validate the link parameters with the MAC */ 656 if (pl->mac_ops->validate) 657 pl->mac_ops->validate(pl->config, supported, state); 658 else 659 phylink_generic_validate(pl->config, supported, state); 660 661 return phylink_is_empty_linkmode(supported) ? -EINVAL : 0; 662 } 663 664 static int phylink_validate_mask(struct phylink *pl, unsigned long *supported, 665 struct phylink_link_state *state, 666 const unsigned long *interfaces) 667 { 668 __ETHTOOL_DECLARE_LINK_MODE_MASK(all_adv) = { 0, }; 669 __ETHTOOL_DECLARE_LINK_MODE_MASK(all_s) = { 0, }; 670 __ETHTOOL_DECLARE_LINK_MODE_MASK(s); 671 struct phylink_link_state t; 672 int intf; 673 674 for (intf = 0; intf < PHY_INTERFACE_MODE_MAX; intf++) { 675 if (test_bit(intf, interfaces)) { 676 linkmode_copy(s, supported); 677 678 t = *state; 679 t.interface = intf; 680 if (!phylink_validate_mac_and_pcs(pl, s, &t)) { 681 linkmode_or(all_s, all_s, s); 682 linkmode_or(all_adv, all_adv, t.advertising); 683 } 684 } 685 } 686 687 linkmode_copy(supported, all_s); 688 linkmode_copy(state->advertising, all_adv); 689 690 return phylink_is_empty_linkmode(supported) ? -EINVAL : 0; 691 } 692 693 static int phylink_validate(struct phylink *pl, unsigned long *supported, 694 struct phylink_link_state *state) 695 { 696 const unsigned long *interfaces = pl->config->supported_interfaces; 697 698 if (!phy_interface_empty(interfaces)) { 699 if (state->interface == PHY_INTERFACE_MODE_NA) 700 return phylink_validate_mask(pl, supported, state, 701 interfaces); 702 703 if (!test_bit(state->interface, interfaces)) 704 return -EINVAL; 705 } 706 707 return phylink_validate_mac_and_pcs(pl, supported, state); 708 } 709 710 static int phylink_parse_fixedlink(struct phylink *pl, 711 const struct fwnode_handle *fwnode) 712 { 713 struct fwnode_handle *fixed_node; 714 bool pause, asym_pause, autoneg; 715 const struct phy_setting *s; 716 struct gpio_desc *desc; 717 u32 speed; 718 int ret; 719 720 fixed_node = fwnode_get_named_child_node(fwnode, "fixed-link"); 721 if (fixed_node) { 722 ret = fwnode_property_read_u32(fixed_node, "speed", &speed); 723 724 pl->link_config.speed = speed; 725 pl->link_config.duplex = DUPLEX_HALF; 726 727 if (fwnode_property_read_bool(fixed_node, "full-duplex")) 728 pl->link_config.duplex = DUPLEX_FULL; 729 730 /* We treat the "pause" and "asym-pause" terminology as 731 * defining the link partner's ability. 732 */ 733 if (fwnode_property_read_bool(fixed_node, "pause")) 734 __set_bit(ETHTOOL_LINK_MODE_Pause_BIT, 735 pl->link_config.lp_advertising); 736 if (fwnode_property_read_bool(fixed_node, "asym-pause")) 737 __set_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, 738 pl->link_config.lp_advertising); 739 740 if (ret == 0) { 741 desc = fwnode_gpiod_get_index(fixed_node, "link", 0, 742 GPIOD_IN, "?"); 743 744 if (!IS_ERR(desc)) 745 pl->link_gpio = desc; 746 else if (desc == ERR_PTR(-EPROBE_DEFER)) 747 ret = -EPROBE_DEFER; 748 } 749 fwnode_handle_put(fixed_node); 750 751 if (ret) 752 return ret; 753 } else { 754 u32 prop[5]; 755 756 ret = fwnode_property_read_u32_array(fwnode, "fixed-link", 757 NULL, 0); 758 if (ret != ARRAY_SIZE(prop)) { 759 phylink_err(pl, "broken fixed-link?\n"); 760 return -EINVAL; 761 } 762 763 ret = fwnode_property_read_u32_array(fwnode, "fixed-link", 764 prop, ARRAY_SIZE(prop)); 765 if (!ret) { 766 pl->link_config.duplex = prop[1] ? 767 DUPLEX_FULL : DUPLEX_HALF; 768 pl->link_config.speed = prop[2]; 769 if (prop[3]) 770 __set_bit(ETHTOOL_LINK_MODE_Pause_BIT, 771 pl->link_config.lp_advertising); 772 if (prop[4]) 773 __set_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, 774 pl->link_config.lp_advertising); 775 } 776 } 777 778 if (pl->link_config.speed > SPEED_1000 && 779 pl->link_config.duplex != DUPLEX_FULL) 780 phylink_warn(pl, "fixed link specifies half duplex for %dMbps link?\n", 781 pl->link_config.speed); 782 783 bitmap_fill(pl->supported, __ETHTOOL_LINK_MODE_MASK_NBITS); 784 linkmode_copy(pl->link_config.advertising, pl->supported); 785 phylink_validate(pl, pl->supported, &pl->link_config); 786 787 pause = phylink_test(pl->supported, Pause); 788 asym_pause = phylink_test(pl->supported, Asym_Pause); 789 autoneg = phylink_test(pl->supported, Autoneg); 790 s = phy_lookup_setting(pl->link_config.speed, pl->link_config.duplex, 791 pl->supported, true); 792 linkmode_zero(pl->supported); 793 phylink_set(pl->supported, MII); 794 795 if (pause) 796 phylink_set(pl->supported, Pause); 797 798 if (asym_pause) 799 phylink_set(pl->supported, Asym_Pause); 800 801 if (autoneg) 802 phylink_set(pl->supported, Autoneg); 803 804 if (s) { 805 __set_bit(s->bit, pl->supported); 806 __set_bit(s->bit, pl->link_config.lp_advertising); 807 } else { 808 phylink_warn(pl, "fixed link %s duplex %dMbps not recognised\n", 809 pl->link_config.duplex == DUPLEX_FULL ? "full" : "half", 810 pl->link_config.speed); 811 } 812 813 linkmode_and(pl->link_config.advertising, pl->link_config.advertising, 814 pl->supported); 815 816 pl->link_config.link = 1; 817 pl->link_config.an_complete = 1; 818 819 return 0; 820 } 821 822 static int phylink_parse_mode(struct phylink *pl, 823 const struct fwnode_handle *fwnode) 824 { 825 struct fwnode_handle *dn; 826 const char *managed; 827 828 dn = fwnode_get_named_child_node(fwnode, "fixed-link"); 829 if (dn || fwnode_property_present(fwnode, "fixed-link")) 830 pl->cfg_link_an_mode = MLO_AN_FIXED; 831 fwnode_handle_put(dn); 832 833 if ((fwnode_property_read_string(fwnode, "managed", &managed) == 0 && 834 strcmp(managed, "in-band-status") == 0) || 835 pl->config->ovr_an_inband) { 836 if (pl->cfg_link_an_mode == MLO_AN_FIXED) { 837 phylink_err(pl, 838 "can't use both fixed-link and in-band-status\n"); 839 return -EINVAL; 840 } 841 842 linkmode_zero(pl->supported); 843 phylink_set(pl->supported, MII); 844 phylink_set(pl->supported, Autoneg); 845 phylink_set(pl->supported, Asym_Pause); 846 phylink_set(pl->supported, Pause); 847 pl->cfg_link_an_mode = MLO_AN_INBAND; 848 849 switch (pl->link_config.interface) { 850 case PHY_INTERFACE_MODE_SGMII: 851 case PHY_INTERFACE_MODE_QSGMII: 852 case PHY_INTERFACE_MODE_QUSGMII: 853 case PHY_INTERFACE_MODE_RGMII: 854 case PHY_INTERFACE_MODE_RGMII_ID: 855 case PHY_INTERFACE_MODE_RGMII_RXID: 856 case PHY_INTERFACE_MODE_RGMII_TXID: 857 case PHY_INTERFACE_MODE_RTBI: 858 phylink_set(pl->supported, 10baseT_Half); 859 phylink_set(pl->supported, 10baseT_Full); 860 phylink_set(pl->supported, 100baseT_Half); 861 phylink_set(pl->supported, 100baseT_Full); 862 phylink_set(pl->supported, 1000baseT_Half); 863 phylink_set(pl->supported, 1000baseT_Full); 864 break; 865 866 case PHY_INTERFACE_MODE_1000BASEX: 867 phylink_set(pl->supported, 1000baseX_Full); 868 break; 869 870 case PHY_INTERFACE_MODE_2500BASEX: 871 phylink_set(pl->supported, 2500baseX_Full); 872 break; 873 874 case PHY_INTERFACE_MODE_5GBASER: 875 phylink_set(pl->supported, 5000baseT_Full); 876 break; 877 878 case PHY_INTERFACE_MODE_25GBASER: 879 phylink_set(pl->supported, 25000baseCR_Full); 880 phylink_set(pl->supported, 25000baseKR_Full); 881 phylink_set(pl->supported, 25000baseSR_Full); 882 fallthrough; 883 case PHY_INTERFACE_MODE_USXGMII: 884 case PHY_INTERFACE_MODE_10GKR: 885 case PHY_INTERFACE_MODE_10GBASER: 886 phylink_set(pl->supported, 10baseT_Half); 887 phylink_set(pl->supported, 10baseT_Full); 888 phylink_set(pl->supported, 100baseT_Half); 889 phylink_set(pl->supported, 100baseT_Full); 890 phylink_set(pl->supported, 1000baseT_Half); 891 phylink_set(pl->supported, 1000baseT_Full); 892 phylink_set(pl->supported, 1000baseX_Full); 893 phylink_set(pl->supported, 1000baseKX_Full); 894 phylink_set(pl->supported, 2500baseT_Full); 895 phylink_set(pl->supported, 2500baseX_Full); 896 phylink_set(pl->supported, 5000baseT_Full); 897 phylink_set(pl->supported, 10000baseT_Full); 898 phylink_set(pl->supported, 10000baseKR_Full); 899 phylink_set(pl->supported, 10000baseKX4_Full); 900 phylink_set(pl->supported, 10000baseCR_Full); 901 phylink_set(pl->supported, 10000baseSR_Full); 902 phylink_set(pl->supported, 10000baseLR_Full); 903 phylink_set(pl->supported, 10000baseLRM_Full); 904 phylink_set(pl->supported, 10000baseER_Full); 905 break; 906 907 case PHY_INTERFACE_MODE_XLGMII: 908 phylink_set(pl->supported, 25000baseCR_Full); 909 phylink_set(pl->supported, 25000baseKR_Full); 910 phylink_set(pl->supported, 25000baseSR_Full); 911 phylink_set(pl->supported, 40000baseKR4_Full); 912 phylink_set(pl->supported, 40000baseCR4_Full); 913 phylink_set(pl->supported, 40000baseSR4_Full); 914 phylink_set(pl->supported, 40000baseLR4_Full); 915 phylink_set(pl->supported, 50000baseCR2_Full); 916 phylink_set(pl->supported, 50000baseKR2_Full); 917 phylink_set(pl->supported, 50000baseSR2_Full); 918 phylink_set(pl->supported, 50000baseKR_Full); 919 phylink_set(pl->supported, 50000baseSR_Full); 920 phylink_set(pl->supported, 50000baseCR_Full); 921 phylink_set(pl->supported, 50000baseLR_ER_FR_Full); 922 phylink_set(pl->supported, 50000baseDR_Full); 923 phylink_set(pl->supported, 100000baseKR4_Full); 924 phylink_set(pl->supported, 100000baseSR4_Full); 925 phylink_set(pl->supported, 100000baseCR4_Full); 926 phylink_set(pl->supported, 100000baseLR4_ER4_Full); 927 phylink_set(pl->supported, 100000baseKR2_Full); 928 phylink_set(pl->supported, 100000baseSR2_Full); 929 phylink_set(pl->supported, 100000baseCR2_Full); 930 phylink_set(pl->supported, 100000baseLR2_ER2_FR2_Full); 931 phylink_set(pl->supported, 100000baseDR2_Full); 932 break; 933 934 default: 935 phylink_err(pl, 936 "incorrect link mode %s for in-band status\n", 937 phy_modes(pl->link_config.interface)); 938 return -EINVAL; 939 } 940 941 linkmode_copy(pl->link_config.advertising, pl->supported); 942 943 if (phylink_validate(pl, pl->supported, &pl->link_config)) { 944 phylink_err(pl, 945 "failed to validate link configuration for in-band status\n"); 946 return -EINVAL; 947 } 948 } 949 950 return 0; 951 } 952 953 static void phylink_apply_manual_flow(struct phylink *pl, 954 struct phylink_link_state *state) 955 { 956 /* If autoneg is disabled, pause AN is also disabled */ 957 if (!linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, 958 state->advertising)) 959 state->pause &= ~MLO_PAUSE_AN; 960 961 /* Manual configuration of pause modes */ 962 if (!(pl->link_config.pause & MLO_PAUSE_AN)) 963 state->pause = pl->link_config.pause; 964 } 965 966 static void phylink_resolve_flow(struct phylink_link_state *state) 967 { 968 bool tx_pause, rx_pause; 969 970 state->pause = MLO_PAUSE_NONE; 971 if (state->duplex == DUPLEX_FULL) { 972 linkmode_resolve_pause(state->advertising, 973 state->lp_advertising, 974 &tx_pause, &rx_pause); 975 if (tx_pause) 976 state->pause |= MLO_PAUSE_TX; 977 if (rx_pause) 978 state->pause |= MLO_PAUSE_RX; 979 } 980 } 981 982 static void phylink_pcs_poll_stop(struct phylink *pl) 983 { 984 if (pl->cfg_link_an_mode == MLO_AN_INBAND) 985 del_timer(&pl->link_poll); 986 } 987 988 static void phylink_pcs_poll_start(struct phylink *pl) 989 { 990 if (pl->pcs && pl->pcs->poll && pl->cfg_link_an_mode == MLO_AN_INBAND) 991 mod_timer(&pl->link_poll, jiffies + HZ); 992 } 993 994 static void phylink_mac_config(struct phylink *pl, 995 const struct phylink_link_state *state) 996 { 997 phylink_dbg(pl, 998 "%s: mode=%s/%s/%s/%s/%s adv=%*pb pause=%02x link=%u\n", 999 __func__, phylink_an_mode_str(pl->cur_link_an_mode), 1000 phy_modes(state->interface), 1001 phy_speed_to_str(state->speed), 1002 phy_duplex_to_str(state->duplex), 1003 phy_rate_matching_to_str(state->rate_matching), 1004 __ETHTOOL_LINK_MODE_MASK_NBITS, state->advertising, 1005 state->pause, state->link); 1006 1007 pl->mac_ops->mac_config(pl->config, pl->cur_link_an_mode, state); 1008 } 1009 1010 static void phylink_mac_pcs_an_restart(struct phylink *pl) 1011 { 1012 if (linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, 1013 pl->link_config.advertising) && 1014 phy_interface_mode_is_8023z(pl->link_config.interface) && 1015 phylink_autoneg_inband(pl->cur_link_an_mode)) { 1016 if (pl->pcs) 1017 pl->pcs->ops->pcs_an_restart(pl->pcs); 1018 else if (pl->config->legacy_pre_march2020) 1019 pl->mac_ops->mac_an_restart(pl->config); 1020 } 1021 } 1022 1023 static void phylink_major_config(struct phylink *pl, bool restart, 1024 const struct phylink_link_state *state) 1025 { 1026 struct phylink_pcs *pcs = NULL; 1027 bool pcs_changed = false; 1028 int err; 1029 1030 phylink_dbg(pl, "major config %s\n", phy_modes(state->interface)); 1031 1032 if (pl->using_mac_select_pcs) { 1033 pcs = pl->mac_ops->mac_select_pcs(pl->config, state->interface); 1034 if (IS_ERR(pcs)) { 1035 phylink_err(pl, 1036 "mac_select_pcs unexpectedly failed: %pe\n", 1037 pcs); 1038 return; 1039 } 1040 1041 pcs_changed = pcs && pl->pcs != pcs; 1042 } 1043 1044 phylink_pcs_poll_stop(pl); 1045 1046 if (pl->mac_ops->mac_prepare) { 1047 err = pl->mac_ops->mac_prepare(pl->config, pl->cur_link_an_mode, 1048 state->interface); 1049 if (err < 0) { 1050 phylink_err(pl, "mac_prepare failed: %pe\n", 1051 ERR_PTR(err)); 1052 return; 1053 } 1054 } 1055 1056 /* If we have a new PCS, switch to the new PCS after preparing the MAC 1057 * for the change. 1058 */ 1059 if (pcs_changed) 1060 pl->pcs = pcs; 1061 1062 phylink_mac_config(pl, state); 1063 1064 if (pl->pcs) { 1065 err = pl->pcs->ops->pcs_config(pl->pcs, pl->cur_link_an_mode, 1066 state->interface, 1067 state->advertising, 1068 !!(pl->link_config.pause & 1069 MLO_PAUSE_AN)); 1070 if (err < 0) 1071 phylink_err(pl, "pcs_config failed: %pe\n", 1072 ERR_PTR(err)); 1073 if (err > 0) 1074 restart = true; 1075 } 1076 if (restart) 1077 phylink_mac_pcs_an_restart(pl); 1078 1079 if (pl->mac_ops->mac_finish) { 1080 err = pl->mac_ops->mac_finish(pl->config, pl->cur_link_an_mode, 1081 state->interface); 1082 if (err < 0) 1083 phylink_err(pl, "mac_finish failed: %pe\n", 1084 ERR_PTR(err)); 1085 } 1086 1087 phylink_pcs_poll_start(pl); 1088 } 1089 1090 /* 1091 * Reconfigure for a change of inband advertisement. 1092 * If we have a separate PCS, we only need to call its pcs_config() method, 1093 * and then restart AN if it indicates something changed. Otherwise, we do 1094 * the full MAC reconfiguration. 1095 */ 1096 static int phylink_change_inband_advert(struct phylink *pl) 1097 { 1098 int ret; 1099 1100 if (test_bit(PHYLINK_DISABLE_STOPPED, &pl->phylink_disable_state)) 1101 return 0; 1102 1103 if (!pl->pcs && pl->config->legacy_pre_march2020) { 1104 /* Legacy method */ 1105 phylink_mac_config(pl, &pl->link_config); 1106 phylink_mac_pcs_an_restart(pl); 1107 return 0; 1108 } 1109 1110 phylink_dbg(pl, "%s: mode=%s/%s adv=%*pb pause=%02x\n", __func__, 1111 phylink_an_mode_str(pl->cur_link_an_mode), 1112 phy_modes(pl->link_config.interface), 1113 __ETHTOOL_LINK_MODE_MASK_NBITS, pl->link_config.advertising, 1114 pl->link_config.pause); 1115 1116 /* Modern PCS-based method; update the advert at the PCS, and 1117 * restart negotiation if the pcs_config() helper indicates that 1118 * the programmed advertisement has changed. 1119 */ 1120 ret = pl->pcs->ops->pcs_config(pl->pcs, pl->cur_link_an_mode, 1121 pl->link_config.interface, 1122 pl->link_config.advertising, 1123 !!(pl->link_config.pause & 1124 MLO_PAUSE_AN)); 1125 if (ret < 0) 1126 return ret; 1127 1128 if (ret > 0) 1129 phylink_mac_pcs_an_restart(pl); 1130 1131 return 0; 1132 } 1133 1134 static void phylink_mac_pcs_get_state(struct phylink *pl, 1135 struct phylink_link_state *state) 1136 { 1137 linkmode_copy(state->advertising, pl->link_config.advertising); 1138 linkmode_zero(state->lp_advertising); 1139 state->interface = pl->link_config.interface; 1140 state->rate_matching = pl->link_config.rate_matching; 1141 if (linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, 1142 state->advertising)) { 1143 state->speed = SPEED_UNKNOWN; 1144 state->duplex = DUPLEX_UNKNOWN; 1145 state->pause = MLO_PAUSE_NONE; 1146 } else { 1147 state->speed = pl->link_config.speed; 1148 state->duplex = pl->link_config.duplex; 1149 state->pause = pl->link_config.pause; 1150 } 1151 state->an_complete = 0; 1152 state->link = 1; 1153 1154 if (pl->pcs) 1155 pl->pcs->ops->pcs_get_state(pl->pcs, state); 1156 else if (pl->mac_ops->mac_pcs_get_state && 1157 pl->config->legacy_pre_march2020) 1158 pl->mac_ops->mac_pcs_get_state(pl->config, state); 1159 else 1160 state->link = 0; 1161 } 1162 1163 /* The fixed state is... fixed except for the link state, 1164 * which may be determined by a GPIO or a callback. 1165 */ 1166 static void phylink_get_fixed_state(struct phylink *pl, 1167 struct phylink_link_state *state) 1168 { 1169 *state = pl->link_config; 1170 if (pl->config->get_fixed_state) 1171 pl->config->get_fixed_state(pl->config, state); 1172 else if (pl->link_gpio) 1173 state->link = !!gpiod_get_value_cansleep(pl->link_gpio); 1174 1175 phylink_resolve_flow(state); 1176 } 1177 1178 static void phylink_mac_initial_config(struct phylink *pl, bool force_restart) 1179 { 1180 struct phylink_link_state link_state; 1181 1182 switch (pl->cur_link_an_mode) { 1183 case MLO_AN_PHY: 1184 link_state = pl->phy_state; 1185 break; 1186 1187 case MLO_AN_FIXED: 1188 phylink_get_fixed_state(pl, &link_state); 1189 break; 1190 1191 case MLO_AN_INBAND: 1192 link_state = pl->link_config; 1193 if (link_state.interface == PHY_INTERFACE_MODE_SGMII) 1194 link_state.pause = MLO_PAUSE_NONE; 1195 break; 1196 1197 default: /* can't happen */ 1198 return; 1199 } 1200 1201 link_state.link = false; 1202 1203 phylink_apply_manual_flow(pl, &link_state); 1204 phylink_major_config(pl, force_restart, &link_state); 1205 } 1206 1207 static const char *phylink_pause_to_str(int pause) 1208 { 1209 switch (pause & MLO_PAUSE_TXRX_MASK) { 1210 case MLO_PAUSE_TX | MLO_PAUSE_RX: 1211 return "rx/tx"; 1212 case MLO_PAUSE_TX: 1213 return "tx"; 1214 case MLO_PAUSE_RX: 1215 return "rx"; 1216 default: 1217 return "off"; 1218 } 1219 } 1220 1221 static void phylink_link_up(struct phylink *pl, 1222 struct phylink_link_state link_state) 1223 { 1224 struct net_device *ndev = pl->netdev; 1225 int speed, duplex; 1226 bool rx_pause; 1227 1228 speed = link_state.speed; 1229 duplex = link_state.duplex; 1230 rx_pause = !!(link_state.pause & MLO_PAUSE_RX); 1231 1232 switch (link_state.rate_matching) { 1233 case RATE_MATCH_PAUSE: 1234 /* The PHY is doing rate matchion from the media rate (in 1235 * the link_state) to the interface speed, and will send 1236 * pause frames to the MAC to limit its transmission speed. 1237 */ 1238 speed = phylink_interface_max_speed(link_state.interface); 1239 duplex = DUPLEX_FULL; 1240 rx_pause = true; 1241 break; 1242 1243 case RATE_MATCH_CRS: 1244 /* The PHY is doing rate matchion from the media rate (in 1245 * the link_state) to the interface speed, and will cause 1246 * collisions to the MAC to limit its transmission speed. 1247 */ 1248 speed = phylink_interface_max_speed(link_state.interface); 1249 duplex = DUPLEX_HALF; 1250 break; 1251 } 1252 1253 pl->cur_interface = link_state.interface; 1254 1255 if (pl->pcs && pl->pcs->ops->pcs_link_up) 1256 pl->pcs->ops->pcs_link_up(pl->pcs, pl->cur_link_an_mode, 1257 pl->cur_interface, speed, duplex); 1258 1259 pl->mac_ops->mac_link_up(pl->config, pl->phydev, pl->cur_link_an_mode, 1260 pl->cur_interface, speed, duplex, 1261 !!(link_state.pause & MLO_PAUSE_TX), rx_pause); 1262 1263 if (ndev) 1264 netif_carrier_on(ndev); 1265 1266 phylink_info(pl, 1267 "Link is Up - %s/%s - flow control %s\n", 1268 phy_speed_to_str(link_state.speed), 1269 phy_duplex_to_str(link_state.duplex), 1270 phylink_pause_to_str(link_state.pause)); 1271 } 1272 1273 static void phylink_link_down(struct phylink *pl) 1274 { 1275 struct net_device *ndev = pl->netdev; 1276 1277 if (ndev) 1278 netif_carrier_off(ndev); 1279 pl->mac_ops->mac_link_down(pl->config, pl->cur_link_an_mode, 1280 pl->cur_interface); 1281 phylink_info(pl, "Link is Down\n"); 1282 } 1283 1284 static void phylink_resolve(struct work_struct *w) 1285 { 1286 struct phylink *pl = container_of(w, struct phylink, resolve); 1287 struct phylink_link_state link_state; 1288 struct net_device *ndev = pl->netdev; 1289 bool mac_config = false; 1290 bool retrigger = false; 1291 bool cur_link_state; 1292 1293 mutex_lock(&pl->state_mutex); 1294 if (pl->netdev) 1295 cur_link_state = netif_carrier_ok(ndev); 1296 else 1297 cur_link_state = pl->old_link_state; 1298 1299 if (pl->phylink_disable_state) { 1300 pl->mac_link_dropped = false; 1301 link_state.link = false; 1302 } else if (pl->mac_link_dropped) { 1303 link_state.link = false; 1304 retrigger = true; 1305 } else { 1306 switch (pl->cur_link_an_mode) { 1307 case MLO_AN_PHY: 1308 link_state = pl->phy_state; 1309 phylink_apply_manual_flow(pl, &link_state); 1310 mac_config = link_state.link; 1311 break; 1312 1313 case MLO_AN_FIXED: 1314 phylink_get_fixed_state(pl, &link_state); 1315 mac_config = link_state.link; 1316 break; 1317 1318 case MLO_AN_INBAND: 1319 phylink_mac_pcs_get_state(pl, &link_state); 1320 1321 /* The PCS may have a latching link-fail indicator. 1322 * If the link was up, bring the link down and 1323 * re-trigger the resolve. Otherwise, re-read the 1324 * PCS state to get the current status of the link. 1325 */ 1326 if (!link_state.link) { 1327 if (cur_link_state) 1328 retrigger = true; 1329 else 1330 phylink_mac_pcs_get_state(pl, 1331 &link_state); 1332 } 1333 1334 /* If we have a phy, the "up" state is the union of 1335 * both the PHY and the MAC 1336 */ 1337 if (pl->phydev) 1338 link_state.link &= pl->phy_state.link; 1339 1340 /* Only update if the PHY link is up */ 1341 if (pl->phydev && pl->phy_state.link) { 1342 /* If the interface has changed, force a 1343 * link down event if the link isn't already 1344 * down, and re-resolve. 1345 */ 1346 if (link_state.interface != 1347 pl->phy_state.interface) { 1348 retrigger = true; 1349 link_state.link = false; 1350 } 1351 link_state.interface = pl->phy_state.interface; 1352 1353 /* If we are doing rate matching, then the 1354 * link speed/duplex comes from the PHY 1355 */ 1356 if (pl->phy_state.rate_matching) { 1357 link_state.rate_matching = 1358 pl->phy_state.rate_matching; 1359 link_state.speed = pl->phy_state.speed; 1360 link_state.duplex = 1361 pl->phy_state.duplex; 1362 } 1363 1364 /* If we have a PHY, we need to update with 1365 * the PHY flow control bits. 1366 */ 1367 link_state.pause = pl->phy_state.pause; 1368 mac_config = true; 1369 } 1370 phylink_apply_manual_flow(pl, &link_state); 1371 break; 1372 } 1373 } 1374 1375 if (mac_config) { 1376 if (link_state.interface != pl->link_config.interface) { 1377 /* The interface has changed, force the link down and 1378 * then reconfigure. 1379 */ 1380 if (cur_link_state) { 1381 phylink_link_down(pl); 1382 cur_link_state = false; 1383 } 1384 phylink_major_config(pl, false, &link_state); 1385 pl->link_config.interface = link_state.interface; 1386 } else if (!pl->pcs && pl->config->legacy_pre_march2020) { 1387 /* The interface remains unchanged, only the speed, 1388 * duplex or pause settings have changed. Call the 1389 * old mac_config() method to configure the MAC/PCS 1390 * only if we do not have a legacy MAC driver. 1391 */ 1392 phylink_mac_config(pl, &link_state); 1393 } 1394 } 1395 1396 if (link_state.link != cur_link_state) { 1397 pl->old_link_state = link_state.link; 1398 if (!link_state.link) 1399 phylink_link_down(pl); 1400 else 1401 phylink_link_up(pl, link_state); 1402 } 1403 if (!link_state.link && retrigger) { 1404 pl->mac_link_dropped = false; 1405 queue_work(system_power_efficient_wq, &pl->resolve); 1406 } 1407 mutex_unlock(&pl->state_mutex); 1408 } 1409 1410 static void phylink_run_resolve(struct phylink *pl) 1411 { 1412 if (!pl->phylink_disable_state) 1413 queue_work(system_power_efficient_wq, &pl->resolve); 1414 } 1415 1416 static void phylink_run_resolve_and_disable(struct phylink *pl, int bit) 1417 { 1418 unsigned long state = pl->phylink_disable_state; 1419 1420 set_bit(bit, &pl->phylink_disable_state); 1421 if (state == 0) { 1422 queue_work(system_power_efficient_wq, &pl->resolve); 1423 flush_work(&pl->resolve); 1424 } 1425 } 1426 1427 static void phylink_enable_and_run_resolve(struct phylink *pl, int bit) 1428 { 1429 clear_bit(bit, &pl->phylink_disable_state); 1430 phylink_run_resolve(pl); 1431 } 1432 1433 static void phylink_fixed_poll(struct timer_list *t) 1434 { 1435 struct phylink *pl = container_of(t, struct phylink, link_poll); 1436 1437 mod_timer(t, jiffies + HZ); 1438 1439 phylink_run_resolve(pl); 1440 } 1441 1442 static const struct sfp_upstream_ops sfp_phylink_ops; 1443 1444 static int phylink_register_sfp(struct phylink *pl, 1445 const struct fwnode_handle *fwnode) 1446 { 1447 struct sfp_bus *bus; 1448 int ret; 1449 1450 if (!fwnode) 1451 return 0; 1452 1453 bus = sfp_bus_find_fwnode(fwnode); 1454 if (IS_ERR(bus)) { 1455 phylink_err(pl, "unable to attach SFP bus: %pe\n", bus); 1456 return PTR_ERR(bus); 1457 } 1458 1459 pl->sfp_bus = bus; 1460 1461 ret = sfp_bus_add_upstream(bus, pl, &sfp_phylink_ops); 1462 sfp_bus_put(bus); 1463 1464 return ret; 1465 } 1466 1467 /** 1468 * phylink_create() - create a phylink instance 1469 * @config: a pointer to the target &struct phylink_config 1470 * @fwnode: a pointer to a &struct fwnode_handle describing the network 1471 * interface 1472 * @iface: the desired link mode defined by &typedef phy_interface_t 1473 * @mac_ops: a pointer to a &struct phylink_mac_ops for the MAC. 1474 * 1475 * Create a new phylink instance, and parse the link parameters found in @np. 1476 * This will parse in-band modes, fixed-link or SFP configuration. 1477 * 1478 * Note: the rtnl lock must not be held when calling this function. 1479 * 1480 * Returns a pointer to a &struct phylink, or an error-pointer value. Users 1481 * must use IS_ERR() to check for errors from this function. 1482 */ 1483 struct phylink *phylink_create(struct phylink_config *config, 1484 const struct fwnode_handle *fwnode, 1485 phy_interface_t iface, 1486 const struct phylink_mac_ops *mac_ops) 1487 { 1488 bool using_mac_select_pcs = false; 1489 struct phylink *pl; 1490 int ret; 1491 1492 if (mac_ops->mac_select_pcs && 1493 mac_ops->mac_select_pcs(config, PHY_INTERFACE_MODE_NA) != 1494 ERR_PTR(-EOPNOTSUPP)) 1495 using_mac_select_pcs = true; 1496 1497 /* Validate the supplied configuration */ 1498 if (using_mac_select_pcs && 1499 phy_interface_empty(config->supported_interfaces)) { 1500 dev_err(config->dev, 1501 "phylink: error: empty supported_interfaces but mac_select_pcs() method present\n"); 1502 return ERR_PTR(-EINVAL); 1503 } 1504 1505 pl = kzalloc(sizeof(*pl), GFP_KERNEL); 1506 if (!pl) 1507 return ERR_PTR(-ENOMEM); 1508 1509 mutex_init(&pl->state_mutex); 1510 INIT_WORK(&pl->resolve, phylink_resolve); 1511 1512 pl->config = config; 1513 if (config->type == PHYLINK_NETDEV) { 1514 pl->netdev = to_net_dev(config->dev); 1515 } else if (config->type == PHYLINK_DEV) { 1516 pl->dev = config->dev; 1517 } else { 1518 kfree(pl); 1519 return ERR_PTR(-EINVAL); 1520 } 1521 1522 pl->using_mac_select_pcs = using_mac_select_pcs; 1523 pl->phy_state.interface = iface; 1524 pl->link_interface = iface; 1525 if (iface == PHY_INTERFACE_MODE_MOCA) 1526 pl->link_port = PORT_BNC; 1527 else 1528 pl->link_port = PORT_MII; 1529 pl->link_config.interface = iface; 1530 pl->link_config.pause = MLO_PAUSE_AN; 1531 pl->link_config.speed = SPEED_UNKNOWN; 1532 pl->link_config.duplex = DUPLEX_UNKNOWN; 1533 pl->mac_ops = mac_ops; 1534 __set_bit(PHYLINK_DISABLE_STOPPED, &pl->phylink_disable_state); 1535 timer_setup(&pl->link_poll, phylink_fixed_poll, 0); 1536 1537 bitmap_fill(pl->supported, __ETHTOOL_LINK_MODE_MASK_NBITS); 1538 linkmode_copy(pl->link_config.advertising, pl->supported); 1539 phylink_validate(pl, pl->supported, &pl->link_config); 1540 1541 ret = phylink_parse_mode(pl, fwnode); 1542 if (ret < 0) { 1543 kfree(pl); 1544 return ERR_PTR(ret); 1545 } 1546 1547 if (pl->cfg_link_an_mode == MLO_AN_FIXED) { 1548 ret = phylink_parse_fixedlink(pl, fwnode); 1549 if (ret < 0) { 1550 kfree(pl); 1551 return ERR_PTR(ret); 1552 } 1553 } 1554 1555 pl->cur_link_an_mode = pl->cfg_link_an_mode; 1556 1557 ret = phylink_register_sfp(pl, fwnode); 1558 if (ret < 0) { 1559 kfree(pl); 1560 return ERR_PTR(ret); 1561 } 1562 1563 return pl; 1564 } 1565 EXPORT_SYMBOL_GPL(phylink_create); 1566 1567 /** 1568 * phylink_destroy() - cleanup and destroy the phylink instance 1569 * @pl: a pointer to a &struct phylink returned from phylink_create() 1570 * 1571 * Destroy a phylink instance. Any PHY that has been attached must have been 1572 * cleaned up via phylink_disconnect_phy() prior to calling this function. 1573 * 1574 * Note: the rtnl lock must not be held when calling this function. 1575 */ 1576 void phylink_destroy(struct phylink *pl) 1577 { 1578 sfp_bus_del_upstream(pl->sfp_bus); 1579 if (pl->link_gpio) 1580 gpiod_put(pl->link_gpio); 1581 1582 cancel_work_sync(&pl->resolve); 1583 kfree(pl); 1584 } 1585 EXPORT_SYMBOL_GPL(phylink_destroy); 1586 1587 /** 1588 * phylink_expects_phy() - Determine if phylink expects a phy to be attached 1589 * @pl: a pointer to a &struct phylink returned from phylink_create() 1590 * 1591 * When using fixed-link mode, or in-band mode with 1000base-X or 2500base-X, 1592 * no PHY is needed. 1593 * 1594 * Returns true if phylink will be expecting a PHY. 1595 */ 1596 bool phylink_expects_phy(struct phylink *pl) 1597 { 1598 if (pl->cfg_link_an_mode == MLO_AN_FIXED || 1599 (pl->cfg_link_an_mode == MLO_AN_INBAND && 1600 phy_interface_mode_is_8023z(pl->link_config.interface))) 1601 return false; 1602 return true; 1603 } 1604 EXPORT_SYMBOL_GPL(phylink_expects_phy); 1605 1606 static void phylink_phy_change(struct phy_device *phydev, bool up) 1607 { 1608 struct phylink *pl = phydev->phylink; 1609 bool tx_pause, rx_pause; 1610 1611 phy_get_pause(phydev, &tx_pause, &rx_pause); 1612 1613 mutex_lock(&pl->state_mutex); 1614 pl->phy_state.speed = phydev->speed; 1615 pl->phy_state.duplex = phydev->duplex; 1616 pl->phy_state.rate_matching = phydev->rate_matching; 1617 pl->phy_state.pause = MLO_PAUSE_NONE; 1618 if (tx_pause) 1619 pl->phy_state.pause |= MLO_PAUSE_TX; 1620 if (rx_pause) 1621 pl->phy_state.pause |= MLO_PAUSE_RX; 1622 pl->phy_state.interface = phydev->interface; 1623 pl->phy_state.link = up; 1624 mutex_unlock(&pl->state_mutex); 1625 1626 phylink_run_resolve(pl); 1627 1628 phylink_dbg(pl, "phy link %s %s/%s/%s/%s/%s\n", up ? "up" : "down", 1629 phy_modes(phydev->interface), 1630 phy_speed_to_str(phydev->speed), 1631 phy_duplex_to_str(phydev->duplex), 1632 phy_rate_matching_to_str(phydev->rate_matching), 1633 phylink_pause_to_str(pl->phy_state.pause)); 1634 } 1635 1636 static int phylink_bringup_phy(struct phylink *pl, struct phy_device *phy, 1637 phy_interface_t interface) 1638 { 1639 struct phylink_link_state config; 1640 __ETHTOOL_DECLARE_LINK_MODE_MASK(supported); 1641 char *irq_str; 1642 int ret; 1643 1644 /* 1645 * This is the new way of dealing with flow control for PHYs, 1646 * as described by Timur Tabi in commit 529ed1275263 ("net: phy: 1647 * phy drivers should not set SUPPORTED_[Asym_]Pause") except 1648 * using our validate call to the MAC, we rely upon the MAC 1649 * clearing the bits from both supported and advertising fields. 1650 */ 1651 phy_support_asym_pause(phy); 1652 1653 memset(&config, 0, sizeof(config)); 1654 linkmode_copy(supported, phy->supported); 1655 linkmode_copy(config.advertising, phy->advertising); 1656 1657 /* Check whether we would use rate matching for the proposed interface 1658 * mode. 1659 */ 1660 config.rate_matching = phy_get_rate_matching(phy, interface); 1661 1662 /* Clause 45 PHYs may switch their Serdes lane between, e.g. 10GBASE-R, 1663 * 5GBASE-R, 2500BASE-X and SGMII if they are not using rate matching. 1664 * For some interface modes (e.g. RXAUI, XAUI and USXGMII) switching 1665 * their Serdes is either unnecessary or not reasonable. 1666 * 1667 * For these which switch interface modes, we really need to know which 1668 * interface modes the PHY supports to properly work out which ethtool 1669 * linkmodes can be supported. For now, as a work-around, we validate 1670 * against all interface modes, which may lead to more ethtool link 1671 * modes being advertised than are actually supported. 1672 */ 1673 if (phy->is_c45 && config.rate_matching == RATE_MATCH_NONE && 1674 interface != PHY_INTERFACE_MODE_RXAUI && 1675 interface != PHY_INTERFACE_MODE_XAUI && 1676 interface != PHY_INTERFACE_MODE_USXGMII) 1677 config.interface = PHY_INTERFACE_MODE_NA; 1678 else 1679 config.interface = interface; 1680 1681 ret = phylink_validate(pl, supported, &config); 1682 if (ret) { 1683 phylink_warn(pl, "validation of %s with support %*pb and advertisement %*pb failed: %pe\n", 1684 phy_modes(config.interface), 1685 __ETHTOOL_LINK_MODE_MASK_NBITS, phy->supported, 1686 __ETHTOOL_LINK_MODE_MASK_NBITS, config.advertising, 1687 ERR_PTR(ret)); 1688 return ret; 1689 } 1690 1691 phy->phylink = pl; 1692 phy->phy_link_change = phylink_phy_change; 1693 1694 irq_str = phy_attached_info_irq(phy); 1695 phylink_info(pl, 1696 "PHY [%s] driver [%s] (irq=%s)\n", 1697 dev_name(&phy->mdio.dev), phy->drv->name, irq_str); 1698 kfree(irq_str); 1699 1700 mutex_lock(&phy->lock); 1701 mutex_lock(&pl->state_mutex); 1702 pl->phydev = phy; 1703 pl->phy_state.interface = interface; 1704 pl->phy_state.pause = MLO_PAUSE_NONE; 1705 pl->phy_state.speed = SPEED_UNKNOWN; 1706 pl->phy_state.duplex = DUPLEX_UNKNOWN; 1707 pl->phy_state.rate_matching = RATE_MATCH_NONE; 1708 linkmode_copy(pl->supported, supported); 1709 linkmode_copy(pl->link_config.advertising, config.advertising); 1710 1711 /* Restrict the phy advertisement according to the MAC support. */ 1712 linkmode_copy(phy->advertising, config.advertising); 1713 mutex_unlock(&pl->state_mutex); 1714 mutex_unlock(&phy->lock); 1715 1716 phylink_dbg(pl, 1717 "phy: %s setting supported %*pb advertising %*pb\n", 1718 phy_modes(interface), 1719 __ETHTOOL_LINK_MODE_MASK_NBITS, pl->supported, 1720 __ETHTOOL_LINK_MODE_MASK_NBITS, phy->advertising); 1721 1722 if (phy_interrupt_is_valid(phy)) 1723 phy_request_interrupt(phy); 1724 1725 if (pl->config->mac_managed_pm) 1726 phy->mac_managed_pm = true; 1727 1728 return 0; 1729 } 1730 1731 static int phylink_attach_phy(struct phylink *pl, struct phy_device *phy, 1732 phy_interface_t interface) 1733 { 1734 if (WARN_ON(pl->cfg_link_an_mode == MLO_AN_FIXED || 1735 (pl->cfg_link_an_mode == MLO_AN_INBAND && 1736 phy_interface_mode_is_8023z(interface) && !pl->sfp_bus))) 1737 return -EINVAL; 1738 1739 if (pl->phydev) 1740 return -EBUSY; 1741 1742 return phy_attach_direct(pl->netdev, phy, 0, interface); 1743 } 1744 1745 /** 1746 * phylink_connect_phy() - connect a PHY to the phylink instance 1747 * @pl: a pointer to a &struct phylink returned from phylink_create() 1748 * @phy: a pointer to a &struct phy_device. 1749 * 1750 * Connect @phy to the phylink instance specified by @pl by calling 1751 * phy_attach_direct(). Configure the @phy according to the MAC driver's 1752 * capabilities, start the PHYLIB state machine and enable any interrupts 1753 * that the PHY supports. 1754 * 1755 * This updates the phylink's ethtool supported and advertising link mode 1756 * masks. 1757 * 1758 * Returns 0 on success or a negative errno. 1759 */ 1760 int phylink_connect_phy(struct phylink *pl, struct phy_device *phy) 1761 { 1762 int ret; 1763 1764 /* Use PHY device/driver interface */ 1765 if (pl->link_interface == PHY_INTERFACE_MODE_NA) { 1766 pl->link_interface = phy->interface; 1767 pl->link_config.interface = pl->link_interface; 1768 } 1769 1770 ret = phylink_attach_phy(pl, phy, pl->link_interface); 1771 if (ret < 0) 1772 return ret; 1773 1774 ret = phylink_bringup_phy(pl, phy, pl->link_config.interface); 1775 if (ret) 1776 phy_detach(phy); 1777 1778 return ret; 1779 } 1780 EXPORT_SYMBOL_GPL(phylink_connect_phy); 1781 1782 /** 1783 * phylink_of_phy_connect() - connect the PHY specified in the DT mode. 1784 * @pl: a pointer to a &struct phylink returned from phylink_create() 1785 * @dn: a pointer to a &struct device_node. 1786 * @flags: PHY-specific flags to communicate to the PHY device driver 1787 * 1788 * Connect the phy specified in the device node @dn to the phylink instance 1789 * specified by @pl. Actions specified in phylink_connect_phy() will be 1790 * performed. 1791 * 1792 * Returns 0 on success or a negative errno. 1793 */ 1794 int phylink_of_phy_connect(struct phylink *pl, struct device_node *dn, 1795 u32 flags) 1796 { 1797 return phylink_fwnode_phy_connect(pl, of_fwnode_handle(dn), flags); 1798 } 1799 EXPORT_SYMBOL_GPL(phylink_of_phy_connect); 1800 1801 /** 1802 * phylink_fwnode_phy_connect() - connect the PHY specified in the fwnode. 1803 * @pl: a pointer to a &struct phylink returned from phylink_create() 1804 * @fwnode: a pointer to a &struct fwnode_handle. 1805 * @flags: PHY-specific flags to communicate to the PHY device driver 1806 * 1807 * Connect the phy specified @fwnode to the phylink instance specified 1808 * by @pl. 1809 * 1810 * Returns 0 on success or a negative errno. 1811 */ 1812 int phylink_fwnode_phy_connect(struct phylink *pl, 1813 const struct fwnode_handle *fwnode, 1814 u32 flags) 1815 { 1816 struct fwnode_handle *phy_fwnode; 1817 struct phy_device *phy_dev; 1818 int ret; 1819 1820 /* Fixed links and 802.3z are handled without needing a PHY */ 1821 if (pl->cfg_link_an_mode == MLO_AN_FIXED || 1822 (pl->cfg_link_an_mode == MLO_AN_INBAND && 1823 phy_interface_mode_is_8023z(pl->link_interface))) 1824 return 0; 1825 1826 phy_fwnode = fwnode_get_phy_node(fwnode); 1827 if (IS_ERR(phy_fwnode)) { 1828 if (pl->cfg_link_an_mode == MLO_AN_PHY) 1829 return -ENODEV; 1830 return 0; 1831 } 1832 1833 phy_dev = fwnode_phy_find_device(phy_fwnode); 1834 /* We're done with the phy_node handle */ 1835 fwnode_handle_put(phy_fwnode); 1836 if (!phy_dev) 1837 return -ENODEV; 1838 1839 /* Use PHY device/driver interface */ 1840 if (pl->link_interface == PHY_INTERFACE_MODE_NA) { 1841 pl->link_interface = phy_dev->interface; 1842 pl->link_config.interface = pl->link_interface; 1843 } 1844 1845 ret = phy_attach_direct(pl->netdev, phy_dev, flags, 1846 pl->link_interface); 1847 phy_device_free(phy_dev); 1848 if (ret) 1849 return ret; 1850 1851 ret = phylink_bringup_phy(pl, phy_dev, pl->link_config.interface); 1852 if (ret) 1853 phy_detach(phy_dev); 1854 1855 return ret; 1856 } 1857 EXPORT_SYMBOL_GPL(phylink_fwnode_phy_connect); 1858 1859 /** 1860 * phylink_disconnect_phy() - disconnect any PHY attached to the phylink 1861 * instance. 1862 * @pl: a pointer to a &struct phylink returned from phylink_create() 1863 * 1864 * Disconnect any current PHY from the phylink instance described by @pl. 1865 */ 1866 void phylink_disconnect_phy(struct phylink *pl) 1867 { 1868 struct phy_device *phy; 1869 1870 ASSERT_RTNL(); 1871 1872 phy = pl->phydev; 1873 if (phy) { 1874 mutex_lock(&phy->lock); 1875 mutex_lock(&pl->state_mutex); 1876 pl->phydev = NULL; 1877 mutex_unlock(&pl->state_mutex); 1878 mutex_unlock(&phy->lock); 1879 flush_work(&pl->resolve); 1880 1881 phy_disconnect(phy); 1882 } 1883 } 1884 EXPORT_SYMBOL_GPL(phylink_disconnect_phy); 1885 1886 /** 1887 * phylink_mac_change() - notify phylink of a change in MAC state 1888 * @pl: a pointer to a &struct phylink returned from phylink_create() 1889 * @up: indicates whether the link is currently up. 1890 * 1891 * The MAC driver should call this driver when the state of its link 1892 * changes (eg, link failure, new negotiation results, etc.) 1893 */ 1894 void phylink_mac_change(struct phylink *pl, bool up) 1895 { 1896 if (!up) 1897 pl->mac_link_dropped = true; 1898 phylink_run_resolve(pl); 1899 phylink_dbg(pl, "mac link %s\n", up ? "up" : "down"); 1900 } 1901 EXPORT_SYMBOL_GPL(phylink_mac_change); 1902 1903 static irqreturn_t phylink_link_handler(int irq, void *data) 1904 { 1905 struct phylink *pl = data; 1906 1907 phylink_run_resolve(pl); 1908 1909 return IRQ_HANDLED; 1910 } 1911 1912 /** 1913 * phylink_start() - start a phylink instance 1914 * @pl: a pointer to a &struct phylink returned from phylink_create() 1915 * 1916 * Start the phylink instance specified by @pl, configuring the MAC for the 1917 * desired link mode(s) and negotiation style. This should be called from the 1918 * network device driver's &struct net_device_ops ndo_open() method. 1919 */ 1920 void phylink_start(struct phylink *pl) 1921 { 1922 bool poll = false; 1923 1924 ASSERT_RTNL(); 1925 1926 phylink_info(pl, "configuring for %s/%s link mode\n", 1927 phylink_an_mode_str(pl->cur_link_an_mode), 1928 phy_modes(pl->link_config.interface)); 1929 1930 /* Always set the carrier off */ 1931 if (pl->netdev) 1932 netif_carrier_off(pl->netdev); 1933 1934 /* Apply the link configuration to the MAC when starting. This allows 1935 * a fixed-link to start with the correct parameters, and also 1936 * ensures that we set the appropriate advertisement for Serdes links. 1937 * 1938 * Restart autonegotiation if using 802.3z to ensure that the link 1939 * parameters are properly negotiated. This is necessary for DSA 1940 * switches using 802.3z negotiation to ensure they see our modes. 1941 */ 1942 phylink_mac_initial_config(pl, true); 1943 1944 phylink_enable_and_run_resolve(pl, PHYLINK_DISABLE_STOPPED); 1945 1946 if (pl->cfg_link_an_mode == MLO_AN_FIXED && pl->link_gpio) { 1947 int irq = gpiod_to_irq(pl->link_gpio); 1948 1949 if (irq > 0) { 1950 if (!request_irq(irq, phylink_link_handler, 1951 IRQF_TRIGGER_RISING | 1952 IRQF_TRIGGER_FALLING, 1953 "netdev link", pl)) 1954 pl->link_irq = irq; 1955 else 1956 irq = 0; 1957 } 1958 if (irq <= 0) 1959 poll = true; 1960 } 1961 1962 switch (pl->cfg_link_an_mode) { 1963 case MLO_AN_FIXED: 1964 poll |= pl->config->poll_fixed_state; 1965 break; 1966 case MLO_AN_INBAND: 1967 if (pl->pcs) 1968 poll |= pl->pcs->poll; 1969 break; 1970 } 1971 if (poll) 1972 mod_timer(&pl->link_poll, jiffies + HZ); 1973 if (pl->phydev) 1974 phy_start(pl->phydev); 1975 if (pl->sfp_bus) 1976 sfp_upstream_start(pl->sfp_bus); 1977 } 1978 EXPORT_SYMBOL_GPL(phylink_start); 1979 1980 /** 1981 * phylink_stop() - stop a phylink instance 1982 * @pl: a pointer to a &struct phylink returned from phylink_create() 1983 * 1984 * Stop the phylink instance specified by @pl. This should be called from the 1985 * network device driver's &struct net_device_ops ndo_stop() method. The 1986 * network device's carrier state should not be changed prior to calling this 1987 * function. 1988 * 1989 * This will synchronously bring down the link if the link is not already 1990 * down (in other words, it will trigger a mac_link_down() method call.) 1991 */ 1992 void phylink_stop(struct phylink *pl) 1993 { 1994 ASSERT_RTNL(); 1995 1996 if (pl->sfp_bus) 1997 sfp_upstream_stop(pl->sfp_bus); 1998 if (pl->phydev) 1999 phy_stop(pl->phydev); 2000 del_timer_sync(&pl->link_poll); 2001 if (pl->link_irq) { 2002 free_irq(pl->link_irq, pl); 2003 pl->link_irq = 0; 2004 } 2005 2006 phylink_run_resolve_and_disable(pl, PHYLINK_DISABLE_STOPPED); 2007 } 2008 EXPORT_SYMBOL_GPL(phylink_stop); 2009 2010 /** 2011 * phylink_suspend() - handle a network device suspend event 2012 * @pl: a pointer to a &struct phylink returned from phylink_create() 2013 * @mac_wol: true if the MAC needs to receive packets for Wake-on-Lan 2014 * 2015 * Handle a network device suspend event. There are several cases: 2016 * 2017 * - If Wake-on-Lan is not active, we can bring down the link between 2018 * the MAC and PHY by calling phylink_stop(). 2019 * - If Wake-on-Lan is active, and being handled only by the PHY, we 2020 * can also bring down the link between the MAC and PHY. 2021 * - If Wake-on-Lan is active, but being handled by the MAC, the MAC 2022 * still needs to receive packets, so we can not bring the link down. 2023 */ 2024 void phylink_suspend(struct phylink *pl, bool mac_wol) 2025 { 2026 ASSERT_RTNL(); 2027 2028 if (mac_wol && (!pl->netdev || pl->netdev->wol_enabled)) { 2029 /* Wake-on-Lan enabled, MAC handling */ 2030 mutex_lock(&pl->state_mutex); 2031 2032 /* Stop the resolver bringing the link up */ 2033 __set_bit(PHYLINK_DISABLE_MAC_WOL, &pl->phylink_disable_state); 2034 2035 /* Disable the carrier, to prevent transmit timeouts, 2036 * but one would hope all packets have been sent. This 2037 * also means phylink_resolve() will do nothing. 2038 */ 2039 if (pl->netdev) 2040 netif_carrier_off(pl->netdev); 2041 else 2042 pl->old_link_state = false; 2043 2044 /* We do not call mac_link_down() here as we want the 2045 * link to remain up to receive the WoL packets. 2046 */ 2047 mutex_unlock(&pl->state_mutex); 2048 } else { 2049 phylink_stop(pl); 2050 } 2051 } 2052 EXPORT_SYMBOL_GPL(phylink_suspend); 2053 2054 /** 2055 * phylink_resume() - handle a network device resume event 2056 * @pl: a pointer to a &struct phylink returned from phylink_create() 2057 * 2058 * Undo the effects of phylink_suspend(), returning the link to an 2059 * operational state. 2060 */ 2061 void phylink_resume(struct phylink *pl) 2062 { 2063 ASSERT_RTNL(); 2064 2065 if (test_bit(PHYLINK_DISABLE_MAC_WOL, &pl->phylink_disable_state)) { 2066 /* Wake-on-Lan enabled, MAC handling */ 2067 2068 /* Call mac_link_down() so we keep the overall state balanced. 2069 * Do this under the state_mutex lock for consistency. This 2070 * will cause a "Link Down" message to be printed during 2071 * resume, which is harmless - the true link state will be 2072 * printed when we run a resolve. 2073 */ 2074 mutex_lock(&pl->state_mutex); 2075 phylink_link_down(pl); 2076 mutex_unlock(&pl->state_mutex); 2077 2078 /* Re-apply the link parameters so that all the settings get 2079 * restored to the MAC. 2080 */ 2081 phylink_mac_initial_config(pl, true); 2082 2083 /* Re-enable and re-resolve the link parameters */ 2084 phylink_enable_and_run_resolve(pl, PHYLINK_DISABLE_MAC_WOL); 2085 } else { 2086 phylink_start(pl); 2087 } 2088 } 2089 EXPORT_SYMBOL_GPL(phylink_resume); 2090 2091 /** 2092 * phylink_ethtool_get_wol() - get the wake on lan parameters for the PHY 2093 * @pl: a pointer to a &struct phylink returned from phylink_create() 2094 * @wol: a pointer to &struct ethtool_wolinfo to hold the read parameters 2095 * 2096 * Read the wake on lan parameters from the PHY attached to the phylink 2097 * instance specified by @pl. If no PHY is currently attached, report no 2098 * support for wake on lan. 2099 */ 2100 void phylink_ethtool_get_wol(struct phylink *pl, struct ethtool_wolinfo *wol) 2101 { 2102 ASSERT_RTNL(); 2103 2104 wol->supported = 0; 2105 wol->wolopts = 0; 2106 2107 if (pl->phydev) 2108 phy_ethtool_get_wol(pl->phydev, wol); 2109 } 2110 EXPORT_SYMBOL_GPL(phylink_ethtool_get_wol); 2111 2112 /** 2113 * phylink_ethtool_set_wol() - set wake on lan parameters 2114 * @pl: a pointer to a &struct phylink returned from phylink_create() 2115 * @wol: a pointer to &struct ethtool_wolinfo for the desired parameters 2116 * 2117 * Set the wake on lan parameters for the PHY attached to the phylink 2118 * instance specified by @pl. If no PHY is attached, returns %EOPNOTSUPP 2119 * error. 2120 * 2121 * Returns zero on success or negative errno code. 2122 */ 2123 int phylink_ethtool_set_wol(struct phylink *pl, struct ethtool_wolinfo *wol) 2124 { 2125 int ret = -EOPNOTSUPP; 2126 2127 ASSERT_RTNL(); 2128 2129 if (pl->phydev) 2130 ret = phy_ethtool_set_wol(pl->phydev, wol); 2131 2132 return ret; 2133 } 2134 EXPORT_SYMBOL_GPL(phylink_ethtool_set_wol); 2135 2136 static void phylink_merge_link_mode(unsigned long *dst, const unsigned long *b) 2137 { 2138 __ETHTOOL_DECLARE_LINK_MODE_MASK(mask); 2139 2140 linkmode_zero(mask); 2141 phylink_set_port_modes(mask); 2142 2143 linkmode_and(dst, dst, mask); 2144 linkmode_or(dst, dst, b); 2145 } 2146 2147 static void phylink_get_ksettings(const struct phylink_link_state *state, 2148 struct ethtool_link_ksettings *kset) 2149 { 2150 phylink_merge_link_mode(kset->link_modes.advertising, state->advertising); 2151 linkmode_copy(kset->link_modes.lp_advertising, state->lp_advertising); 2152 if (kset->base.rate_matching == RATE_MATCH_NONE) { 2153 kset->base.speed = state->speed; 2154 kset->base.duplex = state->duplex; 2155 } 2156 kset->base.autoneg = linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, 2157 state->advertising) ? 2158 AUTONEG_ENABLE : AUTONEG_DISABLE; 2159 } 2160 2161 /** 2162 * phylink_ethtool_ksettings_get() - get the current link settings 2163 * @pl: a pointer to a &struct phylink returned from phylink_create() 2164 * @kset: a pointer to a &struct ethtool_link_ksettings to hold link settings 2165 * 2166 * Read the current link settings for the phylink instance specified by @pl. 2167 * This will be the link settings read from the MAC, PHY or fixed link 2168 * settings depending on the current negotiation mode. 2169 */ 2170 int phylink_ethtool_ksettings_get(struct phylink *pl, 2171 struct ethtool_link_ksettings *kset) 2172 { 2173 struct phylink_link_state link_state; 2174 2175 ASSERT_RTNL(); 2176 2177 if (pl->phydev) 2178 phy_ethtool_ksettings_get(pl->phydev, kset); 2179 else 2180 kset->base.port = pl->link_port; 2181 2182 linkmode_copy(kset->link_modes.supported, pl->supported); 2183 2184 switch (pl->cur_link_an_mode) { 2185 case MLO_AN_FIXED: 2186 /* We are using fixed settings. Report these as the 2187 * current link settings - and note that these also 2188 * represent the supported speeds/duplex/pause modes. 2189 */ 2190 phylink_get_fixed_state(pl, &link_state); 2191 phylink_get_ksettings(&link_state, kset); 2192 break; 2193 2194 case MLO_AN_INBAND: 2195 /* If there is a phy attached, then use the reported 2196 * settings from the phy with no modification. 2197 */ 2198 if (pl->phydev) 2199 break; 2200 2201 phylink_mac_pcs_get_state(pl, &link_state); 2202 2203 /* The MAC is reporting the link results from its own PCS 2204 * layer via in-band status. Report these as the current 2205 * link settings. 2206 */ 2207 phylink_get_ksettings(&link_state, kset); 2208 break; 2209 } 2210 2211 return 0; 2212 } 2213 EXPORT_SYMBOL_GPL(phylink_ethtool_ksettings_get); 2214 2215 /** 2216 * phylink_ethtool_ksettings_set() - set the link settings 2217 * @pl: a pointer to a &struct phylink returned from phylink_create() 2218 * @kset: a pointer to a &struct ethtool_link_ksettings for the desired modes 2219 */ 2220 int phylink_ethtool_ksettings_set(struct phylink *pl, 2221 const struct ethtool_link_ksettings *kset) 2222 { 2223 __ETHTOOL_DECLARE_LINK_MODE_MASK(support); 2224 struct phylink_link_state config; 2225 const struct phy_setting *s; 2226 2227 ASSERT_RTNL(); 2228 2229 if (pl->phydev) { 2230 /* We can rely on phylib for this update; we also do not need 2231 * to update the pl->link_config settings: 2232 * - the configuration returned via ksettings_get() will come 2233 * from phylib whenever a PHY is present. 2234 * - link_config.interface will be updated by the PHY calling 2235 * back via phylink_phy_change() and a subsequent resolve. 2236 * - initial link configuration for PHY mode comes from the 2237 * last phy state updated via phylink_phy_change(). 2238 * - other configuration changes (e.g. pause modes) are 2239 * performed directly via phylib. 2240 * - if in in-band mode with a PHY, the link configuration 2241 * is passed on the link from the PHY, and all of 2242 * link_config.{speed,duplex,an_enabled,pause} are not used. 2243 * - the only possible use would be link_config.advertising 2244 * pause modes when in 1000base-X mode with a PHY, but in 2245 * the presence of a PHY, this should not be changed as that 2246 * should be determined from the media side advertisement. 2247 */ 2248 return phy_ethtool_ksettings_set(pl->phydev, kset); 2249 } 2250 2251 config = pl->link_config; 2252 2253 /* Mask out unsupported advertisements */ 2254 linkmode_and(config.advertising, kset->link_modes.advertising, 2255 pl->supported); 2256 2257 /* FIXME: should we reject autoneg if phy/mac does not support it? */ 2258 switch (kset->base.autoneg) { 2259 case AUTONEG_DISABLE: 2260 /* Autonegotiation disabled, select a suitable speed and 2261 * duplex. 2262 */ 2263 s = phy_lookup_setting(kset->base.speed, kset->base.duplex, 2264 pl->supported, false); 2265 if (!s) 2266 return -EINVAL; 2267 2268 /* If we have a fixed link, refuse to change link parameters. 2269 * If the link parameters match, accept them but do nothing. 2270 */ 2271 if (pl->cur_link_an_mode == MLO_AN_FIXED) { 2272 if (s->speed != pl->link_config.speed || 2273 s->duplex != pl->link_config.duplex) 2274 return -EINVAL; 2275 return 0; 2276 } 2277 2278 config.speed = s->speed; 2279 config.duplex = s->duplex; 2280 break; 2281 2282 case AUTONEG_ENABLE: 2283 /* If we have a fixed link, allow autonegotiation (since that 2284 * is our default case) but do not allow the advertisement to 2285 * be changed. If the advertisement matches, simply return. 2286 */ 2287 if (pl->cur_link_an_mode == MLO_AN_FIXED) { 2288 if (!linkmode_equal(config.advertising, 2289 pl->link_config.advertising)) 2290 return -EINVAL; 2291 return 0; 2292 } 2293 2294 config.speed = SPEED_UNKNOWN; 2295 config.duplex = DUPLEX_UNKNOWN; 2296 break; 2297 2298 default: 2299 return -EINVAL; 2300 } 2301 2302 /* We have ruled out the case with a PHY attached, and the 2303 * fixed-link cases. All that is left are in-band links. 2304 */ 2305 linkmode_mod_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, config.advertising, 2306 kset->base.autoneg == AUTONEG_ENABLE); 2307 2308 /* If this link is with an SFP, ensure that changes to advertised modes 2309 * also cause the associated interface to be selected such that the 2310 * link can be configured correctly. 2311 */ 2312 if (pl->sfp_bus) { 2313 config.interface = sfp_select_interface(pl->sfp_bus, 2314 config.advertising); 2315 if (config.interface == PHY_INTERFACE_MODE_NA) { 2316 phylink_err(pl, 2317 "selection of interface failed, advertisement %*pb\n", 2318 __ETHTOOL_LINK_MODE_MASK_NBITS, 2319 config.advertising); 2320 return -EINVAL; 2321 } 2322 2323 /* Revalidate with the selected interface */ 2324 linkmode_copy(support, pl->supported); 2325 if (phylink_validate(pl, support, &config)) { 2326 phylink_err(pl, "validation of %s/%s with support %*pb failed\n", 2327 phylink_an_mode_str(pl->cur_link_an_mode), 2328 phy_modes(config.interface), 2329 __ETHTOOL_LINK_MODE_MASK_NBITS, support); 2330 return -EINVAL; 2331 } 2332 } else { 2333 /* Validate without changing the current supported mask. */ 2334 linkmode_copy(support, pl->supported); 2335 if (phylink_validate(pl, support, &config)) 2336 return -EINVAL; 2337 } 2338 2339 /* If autonegotiation is enabled, we must have an advertisement */ 2340 if (linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, 2341 config.advertising) && 2342 phylink_is_empty_linkmode(config.advertising)) 2343 return -EINVAL; 2344 2345 mutex_lock(&pl->state_mutex); 2346 pl->link_config.speed = config.speed; 2347 pl->link_config.duplex = config.duplex; 2348 2349 if (pl->link_config.interface != config.interface) { 2350 /* The interface changed, e.g. 1000base-X <-> 2500base-X */ 2351 /* We need to force the link down, then change the interface */ 2352 if (pl->old_link_state) { 2353 phylink_link_down(pl); 2354 pl->old_link_state = false; 2355 } 2356 if (!test_bit(PHYLINK_DISABLE_STOPPED, 2357 &pl->phylink_disable_state)) 2358 phylink_major_config(pl, false, &config); 2359 pl->link_config.interface = config.interface; 2360 linkmode_copy(pl->link_config.advertising, config.advertising); 2361 } else if (!linkmode_equal(pl->link_config.advertising, 2362 config.advertising)) { 2363 linkmode_copy(pl->link_config.advertising, config.advertising); 2364 phylink_change_inband_advert(pl); 2365 } 2366 mutex_unlock(&pl->state_mutex); 2367 2368 return 0; 2369 } 2370 EXPORT_SYMBOL_GPL(phylink_ethtool_ksettings_set); 2371 2372 /** 2373 * phylink_ethtool_nway_reset() - restart negotiation 2374 * @pl: a pointer to a &struct phylink returned from phylink_create() 2375 * 2376 * Restart negotiation for the phylink instance specified by @pl. This will 2377 * cause any attached phy to restart negotiation with the link partner, and 2378 * if the MAC is in a BaseX mode, the MAC will also be requested to restart 2379 * negotiation. 2380 * 2381 * Returns zero on success, or negative error code. 2382 */ 2383 int phylink_ethtool_nway_reset(struct phylink *pl) 2384 { 2385 int ret = 0; 2386 2387 ASSERT_RTNL(); 2388 2389 if (pl->phydev) 2390 ret = phy_restart_aneg(pl->phydev); 2391 phylink_mac_pcs_an_restart(pl); 2392 2393 return ret; 2394 } 2395 EXPORT_SYMBOL_GPL(phylink_ethtool_nway_reset); 2396 2397 /** 2398 * phylink_ethtool_get_pauseparam() - get the current pause parameters 2399 * @pl: a pointer to a &struct phylink returned from phylink_create() 2400 * @pause: a pointer to a &struct ethtool_pauseparam 2401 */ 2402 void phylink_ethtool_get_pauseparam(struct phylink *pl, 2403 struct ethtool_pauseparam *pause) 2404 { 2405 ASSERT_RTNL(); 2406 2407 pause->autoneg = !!(pl->link_config.pause & MLO_PAUSE_AN); 2408 pause->rx_pause = !!(pl->link_config.pause & MLO_PAUSE_RX); 2409 pause->tx_pause = !!(pl->link_config.pause & MLO_PAUSE_TX); 2410 } 2411 EXPORT_SYMBOL_GPL(phylink_ethtool_get_pauseparam); 2412 2413 /** 2414 * phylink_ethtool_set_pauseparam() - set the current pause parameters 2415 * @pl: a pointer to a &struct phylink returned from phylink_create() 2416 * @pause: a pointer to a &struct ethtool_pauseparam 2417 */ 2418 int phylink_ethtool_set_pauseparam(struct phylink *pl, 2419 struct ethtool_pauseparam *pause) 2420 { 2421 struct phylink_link_state *config = &pl->link_config; 2422 bool manual_changed; 2423 int pause_state; 2424 2425 ASSERT_RTNL(); 2426 2427 if (pl->cur_link_an_mode == MLO_AN_FIXED) 2428 return -EOPNOTSUPP; 2429 2430 if (!phylink_test(pl->supported, Pause) && 2431 !phylink_test(pl->supported, Asym_Pause)) 2432 return -EOPNOTSUPP; 2433 2434 if (!phylink_test(pl->supported, Asym_Pause) && 2435 pause->rx_pause != pause->tx_pause) 2436 return -EINVAL; 2437 2438 pause_state = 0; 2439 if (pause->autoneg) 2440 pause_state |= MLO_PAUSE_AN; 2441 if (pause->rx_pause) 2442 pause_state |= MLO_PAUSE_RX; 2443 if (pause->tx_pause) 2444 pause_state |= MLO_PAUSE_TX; 2445 2446 mutex_lock(&pl->state_mutex); 2447 /* 2448 * See the comments for linkmode_set_pause(), wrt the deficiencies 2449 * with the current implementation. A solution to this issue would 2450 * be: 2451 * ethtool Local device 2452 * rx tx Pause AsymDir 2453 * 0 0 0 0 2454 * 1 0 1 1 2455 * 0 1 0 1 2456 * 1 1 1 1 2457 * and then use the ethtool rx/tx enablement status to mask the 2458 * rx/tx pause resolution. 2459 */ 2460 linkmode_set_pause(config->advertising, pause->tx_pause, 2461 pause->rx_pause); 2462 2463 manual_changed = (config->pause ^ pause_state) & MLO_PAUSE_AN || 2464 (!(pause_state & MLO_PAUSE_AN) && 2465 (config->pause ^ pause_state) & MLO_PAUSE_TXRX_MASK); 2466 2467 config->pause = pause_state; 2468 2469 /* Update our in-band advertisement, triggering a renegotiation if 2470 * the advertisement changed. 2471 */ 2472 if (!pl->phydev) 2473 phylink_change_inband_advert(pl); 2474 2475 mutex_unlock(&pl->state_mutex); 2476 2477 /* If we have a PHY, a change of the pause frame advertisement will 2478 * cause phylib to renegotiate (if AN is enabled) which will in turn 2479 * call our phylink_phy_change() and trigger a resolve. Note that 2480 * we can't hold our state mutex while calling phy_set_asym_pause(). 2481 */ 2482 if (pl->phydev) 2483 phy_set_asym_pause(pl->phydev, pause->rx_pause, 2484 pause->tx_pause); 2485 2486 /* If the manual pause settings changed, make sure we trigger a 2487 * resolve to update their state; we can not guarantee that the 2488 * link will cycle. 2489 */ 2490 if (manual_changed) { 2491 pl->mac_link_dropped = true; 2492 phylink_run_resolve(pl); 2493 } 2494 2495 return 0; 2496 } 2497 EXPORT_SYMBOL_GPL(phylink_ethtool_set_pauseparam); 2498 2499 /** 2500 * phylink_get_eee_err() - read the energy efficient ethernet error 2501 * counter 2502 * @pl: a pointer to a &struct phylink returned from phylink_create(). 2503 * 2504 * Read the Energy Efficient Ethernet error counter from the PHY associated 2505 * with the phylink instance specified by @pl. 2506 * 2507 * Returns positive error counter value, or negative error code. 2508 */ 2509 int phylink_get_eee_err(struct phylink *pl) 2510 { 2511 int ret = 0; 2512 2513 ASSERT_RTNL(); 2514 2515 if (pl->phydev) 2516 ret = phy_get_eee_err(pl->phydev); 2517 2518 return ret; 2519 } 2520 EXPORT_SYMBOL_GPL(phylink_get_eee_err); 2521 2522 /** 2523 * phylink_init_eee() - init and check the EEE features 2524 * @pl: a pointer to a &struct phylink returned from phylink_create() 2525 * @clk_stop_enable: allow PHY to stop receive clock 2526 * 2527 * Must be called either with RTNL held or within mac_link_up() 2528 */ 2529 int phylink_init_eee(struct phylink *pl, bool clk_stop_enable) 2530 { 2531 int ret = -EOPNOTSUPP; 2532 2533 if (pl->phydev) 2534 ret = phy_init_eee(pl->phydev, clk_stop_enable); 2535 2536 return ret; 2537 } 2538 EXPORT_SYMBOL_GPL(phylink_init_eee); 2539 2540 /** 2541 * phylink_ethtool_get_eee() - read the energy efficient ethernet parameters 2542 * @pl: a pointer to a &struct phylink returned from phylink_create() 2543 * @eee: a pointer to a &struct ethtool_eee for the read parameters 2544 */ 2545 int phylink_ethtool_get_eee(struct phylink *pl, struct ethtool_eee *eee) 2546 { 2547 int ret = -EOPNOTSUPP; 2548 2549 ASSERT_RTNL(); 2550 2551 if (pl->phydev) 2552 ret = phy_ethtool_get_eee(pl->phydev, eee); 2553 2554 return ret; 2555 } 2556 EXPORT_SYMBOL_GPL(phylink_ethtool_get_eee); 2557 2558 /** 2559 * phylink_ethtool_set_eee() - set the energy efficient ethernet parameters 2560 * @pl: a pointer to a &struct phylink returned from phylink_create() 2561 * @eee: a pointer to a &struct ethtool_eee for the desired parameters 2562 */ 2563 int phylink_ethtool_set_eee(struct phylink *pl, struct ethtool_eee *eee) 2564 { 2565 int ret = -EOPNOTSUPP; 2566 2567 ASSERT_RTNL(); 2568 2569 if (pl->phydev) 2570 ret = phy_ethtool_set_eee(pl->phydev, eee); 2571 2572 return ret; 2573 } 2574 EXPORT_SYMBOL_GPL(phylink_ethtool_set_eee); 2575 2576 /* This emulates MII registers for a fixed-mode phy operating as per the 2577 * passed in state. "aneg" defines if we report negotiation is possible. 2578 * 2579 * FIXME: should deal with negotiation state too. 2580 */ 2581 static int phylink_mii_emul_read(unsigned int reg, 2582 struct phylink_link_state *state) 2583 { 2584 struct fixed_phy_status fs; 2585 unsigned long *lpa = state->lp_advertising; 2586 int val; 2587 2588 fs.link = state->link; 2589 fs.speed = state->speed; 2590 fs.duplex = state->duplex; 2591 fs.pause = test_bit(ETHTOOL_LINK_MODE_Pause_BIT, lpa); 2592 fs.asym_pause = test_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, lpa); 2593 2594 val = swphy_read_reg(reg, &fs); 2595 if (reg == MII_BMSR) { 2596 if (!state->an_complete) 2597 val &= ~BMSR_ANEGCOMPLETE; 2598 } 2599 return val; 2600 } 2601 2602 static int phylink_phy_read(struct phylink *pl, unsigned int phy_id, 2603 unsigned int reg) 2604 { 2605 struct phy_device *phydev = pl->phydev; 2606 int prtad, devad; 2607 2608 if (mdio_phy_id_is_c45(phy_id)) { 2609 prtad = mdio_phy_id_prtad(phy_id); 2610 devad = mdio_phy_id_devad(phy_id); 2611 return mdiobus_c45_read(pl->phydev->mdio.bus, prtad, devad, 2612 reg); 2613 } 2614 2615 if (phydev->is_c45) { 2616 switch (reg) { 2617 case MII_BMCR: 2618 case MII_BMSR: 2619 case MII_PHYSID1: 2620 case MII_PHYSID2: 2621 devad = __ffs(phydev->c45_ids.mmds_present); 2622 break; 2623 case MII_ADVERTISE: 2624 case MII_LPA: 2625 if (!(phydev->c45_ids.mmds_present & MDIO_DEVS_AN)) 2626 return -EINVAL; 2627 devad = MDIO_MMD_AN; 2628 if (reg == MII_ADVERTISE) 2629 reg = MDIO_AN_ADVERTISE; 2630 else 2631 reg = MDIO_AN_LPA; 2632 break; 2633 default: 2634 return -EINVAL; 2635 } 2636 prtad = phy_id; 2637 return mdiobus_c45_read(pl->phydev->mdio.bus, prtad, devad, 2638 reg); 2639 } 2640 2641 return mdiobus_read(pl->phydev->mdio.bus, phy_id, reg); 2642 } 2643 2644 static int phylink_phy_write(struct phylink *pl, unsigned int phy_id, 2645 unsigned int reg, unsigned int val) 2646 { 2647 struct phy_device *phydev = pl->phydev; 2648 int prtad, devad; 2649 2650 if (mdio_phy_id_is_c45(phy_id)) { 2651 prtad = mdio_phy_id_prtad(phy_id); 2652 devad = mdio_phy_id_devad(phy_id); 2653 return mdiobus_c45_write(pl->phydev->mdio.bus, prtad, devad, 2654 reg, val); 2655 } 2656 2657 if (phydev->is_c45) { 2658 switch (reg) { 2659 case MII_BMCR: 2660 case MII_BMSR: 2661 case MII_PHYSID1: 2662 case MII_PHYSID2: 2663 devad = __ffs(phydev->c45_ids.mmds_present); 2664 break; 2665 case MII_ADVERTISE: 2666 case MII_LPA: 2667 if (!(phydev->c45_ids.mmds_present & MDIO_DEVS_AN)) 2668 return -EINVAL; 2669 devad = MDIO_MMD_AN; 2670 if (reg == MII_ADVERTISE) 2671 reg = MDIO_AN_ADVERTISE; 2672 else 2673 reg = MDIO_AN_LPA; 2674 break; 2675 default: 2676 return -EINVAL; 2677 } 2678 return mdiobus_c45_write(pl->phydev->mdio.bus, phy_id, devad, 2679 reg, val); 2680 } 2681 2682 return mdiobus_write(phydev->mdio.bus, phy_id, reg, val); 2683 } 2684 2685 static int phylink_mii_read(struct phylink *pl, unsigned int phy_id, 2686 unsigned int reg) 2687 { 2688 struct phylink_link_state state; 2689 int val = 0xffff; 2690 2691 switch (pl->cur_link_an_mode) { 2692 case MLO_AN_FIXED: 2693 if (phy_id == 0) { 2694 phylink_get_fixed_state(pl, &state); 2695 val = phylink_mii_emul_read(reg, &state); 2696 } 2697 break; 2698 2699 case MLO_AN_PHY: 2700 return -EOPNOTSUPP; 2701 2702 case MLO_AN_INBAND: 2703 if (phy_id == 0) { 2704 phylink_mac_pcs_get_state(pl, &state); 2705 val = phylink_mii_emul_read(reg, &state); 2706 } 2707 break; 2708 } 2709 2710 return val & 0xffff; 2711 } 2712 2713 static int phylink_mii_write(struct phylink *pl, unsigned int phy_id, 2714 unsigned int reg, unsigned int val) 2715 { 2716 switch (pl->cur_link_an_mode) { 2717 case MLO_AN_FIXED: 2718 break; 2719 2720 case MLO_AN_PHY: 2721 return -EOPNOTSUPP; 2722 2723 case MLO_AN_INBAND: 2724 break; 2725 } 2726 2727 return 0; 2728 } 2729 2730 /** 2731 * phylink_mii_ioctl() - generic mii ioctl interface 2732 * @pl: a pointer to a &struct phylink returned from phylink_create() 2733 * @ifr: a pointer to a &struct ifreq for socket ioctls 2734 * @cmd: ioctl cmd to execute 2735 * 2736 * Perform the specified MII ioctl on the PHY attached to the phylink instance 2737 * specified by @pl. If no PHY is attached, emulate the presence of the PHY. 2738 * 2739 * Returns: zero on success or negative error code. 2740 * 2741 * %SIOCGMIIPHY: 2742 * read register from the current PHY. 2743 * %SIOCGMIIREG: 2744 * read register from the specified PHY. 2745 * %SIOCSMIIREG: 2746 * set a register on the specified PHY. 2747 */ 2748 int phylink_mii_ioctl(struct phylink *pl, struct ifreq *ifr, int cmd) 2749 { 2750 struct mii_ioctl_data *mii = if_mii(ifr); 2751 int ret; 2752 2753 ASSERT_RTNL(); 2754 2755 if (pl->phydev) { 2756 /* PHYs only exist for MLO_AN_PHY and SGMII */ 2757 switch (cmd) { 2758 case SIOCGMIIPHY: 2759 mii->phy_id = pl->phydev->mdio.addr; 2760 fallthrough; 2761 2762 case SIOCGMIIREG: 2763 ret = phylink_phy_read(pl, mii->phy_id, mii->reg_num); 2764 if (ret >= 0) { 2765 mii->val_out = ret; 2766 ret = 0; 2767 } 2768 break; 2769 2770 case SIOCSMIIREG: 2771 ret = phylink_phy_write(pl, mii->phy_id, mii->reg_num, 2772 mii->val_in); 2773 break; 2774 2775 default: 2776 ret = phy_mii_ioctl(pl->phydev, ifr, cmd); 2777 break; 2778 } 2779 } else { 2780 switch (cmd) { 2781 case SIOCGMIIPHY: 2782 mii->phy_id = 0; 2783 fallthrough; 2784 2785 case SIOCGMIIREG: 2786 ret = phylink_mii_read(pl, mii->phy_id, mii->reg_num); 2787 if (ret >= 0) { 2788 mii->val_out = ret; 2789 ret = 0; 2790 } 2791 break; 2792 2793 case SIOCSMIIREG: 2794 ret = phylink_mii_write(pl, mii->phy_id, mii->reg_num, 2795 mii->val_in); 2796 break; 2797 2798 default: 2799 ret = -EOPNOTSUPP; 2800 break; 2801 } 2802 } 2803 2804 return ret; 2805 } 2806 EXPORT_SYMBOL_GPL(phylink_mii_ioctl); 2807 2808 /** 2809 * phylink_speed_down() - set the non-SFP PHY to lowest speed supported by both 2810 * link partners 2811 * @pl: a pointer to a &struct phylink returned from phylink_create() 2812 * @sync: perform action synchronously 2813 * 2814 * If we have a PHY that is not part of a SFP module, then set the speed 2815 * as described in the phy_speed_down() function. Please see this function 2816 * for a description of the @sync parameter. 2817 * 2818 * Returns zero if there is no PHY, otherwise as per phy_speed_down(). 2819 */ 2820 int phylink_speed_down(struct phylink *pl, bool sync) 2821 { 2822 int ret = 0; 2823 2824 ASSERT_RTNL(); 2825 2826 if (!pl->sfp_bus && pl->phydev) 2827 ret = phy_speed_down(pl->phydev, sync); 2828 2829 return ret; 2830 } 2831 EXPORT_SYMBOL_GPL(phylink_speed_down); 2832 2833 /** 2834 * phylink_speed_up() - restore the advertised speeds prior to the call to 2835 * phylink_speed_down() 2836 * @pl: a pointer to a &struct phylink returned from phylink_create() 2837 * 2838 * If we have a PHY that is not part of a SFP module, then restore the 2839 * PHY speeds as per phy_speed_up(). 2840 * 2841 * Returns zero if there is no PHY, otherwise as per phy_speed_up(). 2842 */ 2843 int phylink_speed_up(struct phylink *pl) 2844 { 2845 int ret = 0; 2846 2847 ASSERT_RTNL(); 2848 2849 if (!pl->sfp_bus && pl->phydev) 2850 ret = phy_speed_up(pl->phydev); 2851 2852 return ret; 2853 } 2854 EXPORT_SYMBOL_GPL(phylink_speed_up); 2855 2856 static void phylink_sfp_attach(void *upstream, struct sfp_bus *bus) 2857 { 2858 struct phylink *pl = upstream; 2859 2860 pl->netdev->sfp_bus = bus; 2861 } 2862 2863 static void phylink_sfp_detach(void *upstream, struct sfp_bus *bus) 2864 { 2865 struct phylink *pl = upstream; 2866 2867 pl->netdev->sfp_bus = NULL; 2868 } 2869 2870 static const phy_interface_t phylink_sfp_interface_preference[] = { 2871 PHY_INTERFACE_MODE_25GBASER, 2872 PHY_INTERFACE_MODE_USXGMII, 2873 PHY_INTERFACE_MODE_10GBASER, 2874 PHY_INTERFACE_MODE_5GBASER, 2875 PHY_INTERFACE_MODE_2500BASEX, 2876 PHY_INTERFACE_MODE_SGMII, 2877 PHY_INTERFACE_MODE_1000BASEX, 2878 PHY_INTERFACE_MODE_100BASEX, 2879 }; 2880 2881 static DECLARE_PHY_INTERFACE_MASK(phylink_sfp_interfaces); 2882 2883 static phy_interface_t phylink_choose_sfp_interface(struct phylink *pl, 2884 const unsigned long *intf) 2885 { 2886 phy_interface_t interface; 2887 size_t i; 2888 2889 interface = PHY_INTERFACE_MODE_NA; 2890 for (i = 0; i < ARRAY_SIZE(phylink_sfp_interface_preference); i++) 2891 if (test_bit(phylink_sfp_interface_preference[i], intf)) { 2892 interface = phylink_sfp_interface_preference[i]; 2893 break; 2894 } 2895 2896 return interface; 2897 } 2898 2899 static void phylink_sfp_set_config(struct phylink *pl, u8 mode, 2900 unsigned long *supported, 2901 struct phylink_link_state *state) 2902 { 2903 bool changed = false; 2904 2905 phylink_dbg(pl, "requesting link mode %s/%s with support %*pb\n", 2906 phylink_an_mode_str(mode), phy_modes(state->interface), 2907 __ETHTOOL_LINK_MODE_MASK_NBITS, supported); 2908 2909 if (!linkmode_equal(pl->supported, supported)) { 2910 linkmode_copy(pl->supported, supported); 2911 changed = true; 2912 } 2913 2914 if (!linkmode_equal(pl->link_config.advertising, state->advertising)) { 2915 linkmode_copy(pl->link_config.advertising, state->advertising); 2916 changed = true; 2917 } 2918 2919 if (pl->cur_link_an_mode != mode || 2920 pl->link_config.interface != state->interface) { 2921 pl->cur_link_an_mode = mode; 2922 pl->link_config.interface = state->interface; 2923 2924 changed = true; 2925 2926 phylink_info(pl, "switched to %s/%s link mode\n", 2927 phylink_an_mode_str(mode), 2928 phy_modes(state->interface)); 2929 } 2930 2931 if (changed && !test_bit(PHYLINK_DISABLE_STOPPED, 2932 &pl->phylink_disable_state)) 2933 phylink_mac_initial_config(pl, false); 2934 } 2935 2936 static int phylink_sfp_config_phy(struct phylink *pl, u8 mode, 2937 struct phy_device *phy) 2938 { 2939 __ETHTOOL_DECLARE_LINK_MODE_MASK(support1); 2940 __ETHTOOL_DECLARE_LINK_MODE_MASK(support); 2941 struct phylink_link_state config; 2942 phy_interface_t iface; 2943 int ret; 2944 2945 linkmode_copy(support, phy->supported); 2946 2947 memset(&config, 0, sizeof(config)); 2948 linkmode_copy(config.advertising, phy->advertising); 2949 config.interface = PHY_INTERFACE_MODE_NA; 2950 config.speed = SPEED_UNKNOWN; 2951 config.duplex = DUPLEX_UNKNOWN; 2952 config.pause = MLO_PAUSE_AN; 2953 2954 /* Ignore errors if we're expecting a PHY to attach later */ 2955 ret = phylink_validate(pl, support, &config); 2956 if (ret) { 2957 phylink_err(pl, "validation with support %*pb failed: %pe\n", 2958 __ETHTOOL_LINK_MODE_MASK_NBITS, support, 2959 ERR_PTR(ret)); 2960 return ret; 2961 } 2962 2963 iface = sfp_select_interface(pl->sfp_bus, config.advertising); 2964 if (iface == PHY_INTERFACE_MODE_NA) { 2965 phylink_err(pl, 2966 "selection of interface failed, advertisement %*pb\n", 2967 __ETHTOOL_LINK_MODE_MASK_NBITS, config.advertising); 2968 return -EINVAL; 2969 } 2970 2971 config.interface = iface; 2972 linkmode_copy(support1, support); 2973 ret = phylink_validate(pl, support1, &config); 2974 if (ret) { 2975 phylink_err(pl, 2976 "validation of %s/%s with support %*pb failed: %pe\n", 2977 phylink_an_mode_str(mode), 2978 phy_modes(config.interface), 2979 __ETHTOOL_LINK_MODE_MASK_NBITS, support, 2980 ERR_PTR(ret)); 2981 return ret; 2982 } 2983 2984 pl->link_port = pl->sfp_port; 2985 2986 phylink_sfp_set_config(pl, mode, support, &config); 2987 2988 return 0; 2989 } 2990 2991 static int phylink_sfp_config_optical(struct phylink *pl) 2992 { 2993 __ETHTOOL_DECLARE_LINK_MODE_MASK(support); 2994 DECLARE_PHY_INTERFACE_MASK(interfaces); 2995 struct phylink_link_state config; 2996 phy_interface_t interface; 2997 int ret; 2998 2999 phylink_dbg(pl, "optical SFP: interfaces=[mac=%*pbl, sfp=%*pbl]\n", 3000 (int)PHY_INTERFACE_MODE_MAX, 3001 pl->config->supported_interfaces, 3002 (int)PHY_INTERFACE_MODE_MAX, 3003 pl->sfp_interfaces); 3004 3005 /* Find the union of the supported interfaces by the PCS/MAC and 3006 * the SFP module. 3007 */ 3008 phy_interface_and(interfaces, pl->config->supported_interfaces, 3009 pl->sfp_interfaces); 3010 if (phy_interface_empty(interfaces)) { 3011 phylink_err(pl, "unsupported SFP module: no common interface modes\n"); 3012 return -EINVAL; 3013 } 3014 3015 memset(&config, 0, sizeof(config)); 3016 linkmode_copy(support, pl->sfp_support); 3017 linkmode_copy(config.advertising, pl->sfp_support); 3018 config.speed = SPEED_UNKNOWN; 3019 config.duplex = DUPLEX_UNKNOWN; 3020 config.pause = MLO_PAUSE_AN; 3021 3022 /* For all the interfaces that are supported, reduce the sfp_support 3023 * mask to only those link modes that can be supported. 3024 */ 3025 ret = phylink_validate_mask(pl, pl->sfp_support, &config, interfaces); 3026 if (ret) { 3027 phylink_err(pl, "unsupported SFP module: validation with support %*pb failed\n", 3028 __ETHTOOL_LINK_MODE_MASK_NBITS, support); 3029 return ret; 3030 } 3031 3032 interface = phylink_choose_sfp_interface(pl, interfaces); 3033 if (interface == PHY_INTERFACE_MODE_NA) { 3034 phylink_err(pl, "failed to select SFP interface\n"); 3035 return -EINVAL; 3036 } 3037 3038 phylink_dbg(pl, "optical SFP: chosen %s interface\n", 3039 phy_modes(interface)); 3040 3041 config.interface = interface; 3042 3043 /* Ignore errors if we're expecting a PHY to attach later */ 3044 ret = phylink_validate(pl, support, &config); 3045 if (ret) { 3046 phylink_err(pl, "validation with support %*pb failed: %pe\n", 3047 __ETHTOOL_LINK_MODE_MASK_NBITS, support, 3048 ERR_PTR(ret)); 3049 return ret; 3050 } 3051 3052 pl->link_port = pl->sfp_port; 3053 3054 phylink_sfp_set_config(pl, MLO_AN_INBAND, pl->sfp_support, &config); 3055 3056 return 0; 3057 } 3058 3059 static int phylink_sfp_module_insert(void *upstream, 3060 const struct sfp_eeprom_id *id) 3061 { 3062 struct phylink *pl = upstream; 3063 3064 ASSERT_RTNL(); 3065 3066 linkmode_zero(pl->sfp_support); 3067 phy_interface_zero(pl->sfp_interfaces); 3068 sfp_parse_support(pl->sfp_bus, id, pl->sfp_support, pl->sfp_interfaces); 3069 pl->sfp_port = sfp_parse_port(pl->sfp_bus, id, pl->sfp_support); 3070 3071 /* If this module may have a PHY connecting later, defer until later */ 3072 pl->sfp_may_have_phy = sfp_may_have_phy(pl->sfp_bus, id); 3073 if (pl->sfp_may_have_phy) 3074 return 0; 3075 3076 return phylink_sfp_config_optical(pl); 3077 } 3078 3079 static int phylink_sfp_module_start(void *upstream) 3080 { 3081 struct phylink *pl = upstream; 3082 3083 /* If this SFP module has a PHY, start the PHY now. */ 3084 if (pl->phydev) { 3085 phy_start(pl->phydev); 3086 return 0; 3087 } 3088 3089 /* If the module may have a PHY but we didn't detect one we 3090 * need to configure the MAC here. 3091 */ 3092 if (!pl->sfp_may_have_phy) 3093 return 0; 3094 3095 return phylink_sfp_config_optical(pl); 3096 } 3097 3098 static void phylink_sfp_module_stop(void *upstream) 3099 { 3100 struct phylink *pl = upstream; 3101 3102 /* If this SFP module has a PHY, stop it. */ 3103 if (pl->phydev) 3104 phy_stop(pl->phydev); 3105 } 3106 3107 static void phylink_sfp_link_down(void *upstream) 3108 { 3109 struct phylink *pl = upstream; 3110 3111 ASSERT_RTNL(); 3112 3113 phylink_run_resolve_and_disable(pl, PHYLINK_DISABLE_LINK); 3114 } 3115 3116 static void phylink_sfp_link_up(void *upstream) 3117 { 3118 struct phylink *pl = upstream; 3119 3120 ASSERT_RTNL(); 3121 3122 phylink_enable_and_run_resolve(pl, PHYLINK_DISABLE_LINK); 3123 } 3124 3125 /* The Broadcom BCM84881 in the Methode DM7052 is unable to provide a SGMII 3126 * or 802.3z control word, so inband will not work. 3127 */ 3128 static bool phylink_phy_no_inband(struct phy_device *phy) 3129 { 3130 return phy->is_c45 && 3131 (phy->c45_ids.device_ids[1] & 0xfffffff0) == 0xae025150; 3132 } 3133 3134 static int phylink_sfp_connect_phy(void *upstream, struct phy_device *phy) 3135 { 3136 struct phylink *pl = upstream; 3137 phy_interface_t interface; 3138 u8 mode; 3139 int ret; 3140 3141 /* 3142 * This is the new way of dealing with flow control for PHYs, 3143 * as described by Timur Tabi in commit 529ed1275263 ("net: phy: 3144 * phy drivers should not set SUPPORTED_[Asym_]Pause") except 3145 * using our validate call to the MAC, we rely upon the MAC 3146 * clearing the bits from both supported and advertising fields. 3147 */ 3148 phy_support_asym_pause(phy); 3149 3150 if (phylink_phy_no_inband(phy)) 3151 mode = MLO_AN_PHY; 3152 else 3153 mode = MLO_AN_INBAND; 3154 3155 /* Set the PHY's host supported interfaces */ 3156 phy_interface_and(phy->host_interfaces, phylink_sfp_interfaces, 3157 pl->config->supported_interfaces); 3158 3159 /* Do the initial configuration */ 3160 ret = phylink_sfp_config_phy(pl, mode, phy); 3161 if (ret < 0) 3162 return ret; 3163 3164 interface = pl->link_config.interface; 3165 ret = phylink_attach_phy(pl, phy, interface); 3166 if (ret < 0) 3167 return ret; 3168 3169 ret = phylink_bringup_phy(pl, phy, interface); 3170 if (ret) 3171 phy_detach(phy); 3172 3173 return ret; 3174 } 3175 3176 static void phylink_sfp_disconnect_phy(void *upstream) 3177 { 3178 phylink_disconnect_phy(upstream); 3179 } 3180 3181 static const struct sfp_upstream_ops sfp_phylink_ops = { 3182 .attach = phylink_sfp_attach, 3183 .detach = phylink_sfp_detach, 3184 .module_insert = phylink_sfp_module_insert, 3185 .module_start = phylink_sfp_module_start, 3186 .module_stop = phylink_sfp_module_stop, 3187 .link_up = phylink_sfp_link_up, 3188 .link_down = phylink_sfp_link_down, 3189 .connect_phy = phylink_sfp_connect_phy, 3190 .disconnect_phy = phylink_sfp_disconnect_phy, 3191 }; 3192 3193 /* Helpers for MAC drivers */ 3194 3195 static void phylink_decode_c37_word(struct phylink_link_state *state, 3196 uint16_t config_reg, int speed) 3197 { 3198 bool tx_pause, rx_pause; 3199 int fd_bit; 3200 3201 if (speed == SPEED_2500) 3202 fd_bit = ETHTOOL_LINK_MODE_2500baseX_Full_BIT; 3203 else 3204 fd_bit = ETHTOOL_LINK_MODE_1000baseX_Full_BIT; 3205 3206 mii_lpa_mod_linkmode_x(state->lp_advertising, config_reg, fd_bit); 3207 3208 if (linkmode_test_bit(fd_bit, state->advertising) && 3209 linkmode_test_bit(fd_bit, state->lp_advertising)) { 3210 state->speed = speed; 3211 state->duplex = DUPLEX_FULL; 3212 } else { 3213 /* negotiation failure */ 3214 state->link = false; 3215 } 3216 3217 linkmode_resolve_pause(state->advertising, state->lp_advertising, 3218 &tx_pause, &rx_pause); 3219 3220 if (tx_pause) 3221 state->pause |= MLO_PAUSE_TX; 3222 if (rx_pause) 3223 state->pause |= MLO_PAUSE_RX; 3224 } 3225 3226 static void phylink_decode_sgmii_word(struct phylink_link_state *state, 3227 uint16_t config_reg) 3228 { 3229 if (!(config_reg & LPA_SGMII_LINK)) { 3230 state->link = false; 3231 return; 3232 } 3233 3234 switch (config_reg & LPA_SGMII_SPD_MASK) { 3235 case LPA_SGMII_10: 3236 state->speed = SPEED_10; 3237 break; 3238 case LPA_SGMII_100: 3239 state->speed = SPEED_100; 3240 break; 3241 case LPA_SGMII_1000: 3242 state->speed = SPEED_1000; 3243 break; 3244 default: 3245 state->link = false; 3246 return; 3247 } 3248 if (config_reg & LPA_SGMII_FULL_DUPLEX) 3249 state->duplex = DUPLEX_FULL; 3250 else 3251 state->duplex = DUPLEX_HALF; 3252 } 3253 3254 /** 3255 * phylink_decode_usxgmii_word() - decode the USXGMII word from a MAC PCS 3256 * @state: a pointer to a struct phylink_link_state. 3257 * @lpa: a 16 bit value which stores the USXGMII auto-negotiation word 3258 * 3259 * Helper for MAC PCS supporting the USXGMII protocol and the auto-negotiation 3260 * code word. Decode the USXGMII code word and populate the corresponding fields 3261 * (speed, duplex) into the phylink_link_state structure. 3262 */ 3263 void phylink_decode_usxgmii_word(struct phylink_link_state *state, 3264 uint16_t lpa) 3265 { 3266 switch (lpa & MDIO_USXGMII_SPD_MASK) { 3267 case MDIO_USXGMII_10: 3268 state->speed = SPEED_10; 3269 break; 3270 case MDIO_USXGMII_100: 3271 state->speed = SPEED_100; 3272 break; 3273 case MDIO_USXGMII_1000: 3274 state->speed = SPEED_1000; 3275 break; 3276 case MDIO_USXGMII_2500: 3277 state->speed = SPEED_2500; 3278 break; 3279 case MDIO_USXGMII_5000: 3280 state->speed = SPEED_5000; 3281 break; 3282 case MDIO_USXGMII_10G: 3283 state->speed = SPEED_10000; 3284 break; 3285 default: 3286 state->link = false; 3287 return; 3288 } 3289 3290 if (lpa & MDIO_USXGMII_FULL_DUPLEX) 3291 state->duplex = DUPLEX_FULL; 3292 else 3293 state->duplex = DUPLEX_HALF; 3294 } 3295 EXPORT_SYMBOL_GPL(phylink_decode_usxgmii_word); 3296 3297 /** 3298 * phylink_mii_c22_pcs_decode_state() - Decode MAC PCS state from MII registers 3299 * @state: a pointer to a &struct phylink_link_state. 3300 * @bmsr: The value of the %MII_BMSR register 3301 * @lpa: The value of the %MII_LPA register 3302 * 3303 * Helper for MAC PCS supporting the 802.3 clause 22 register set for 3304 * clause 37 negotiation and/or SGMII control. 3305 * 3306 * Parse the Clause 37 or Cisco SGMII link partner negotiation word into 3307 * the phylink @state structure. This is suitable to be used for implementing 3308 * the mac_pcs_get_state() member of the struct phylink_mac_ops structure if 3309 * accessing @bmsr and @lpa cannot be done with MDIO directly. 3310 */ 3311 void phylink_mii_c22_pcs_decode_state(struct phylink_link_state *state, 3312 u16 bmsr, u16 lpa) 3313 { 3314 state->link = !!(bmsr & BMSR_LSTATUS); 3315 state->an_complete = !!(bmsr & BMSR_ANEGCOMPLETE); 3316 /* If there is no link or autonegotiation is disabled, the LP advertisement 3317 * data is not meaningful, so don't go any further. 3318 */ 3319 if (!state->link || !linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, 3320 state->advertising)) 3321 return; 3322 3323 switch (state->interface) { 3324 case PHY_INTERFACE_MODE_1000BASEX: 3325 phylink_decode_c37_word(state, lpa, SPEED_1000); 3326 break; 3327 3328 case PHY_INTERFACE_MODE_2500BASEX: 3329 phylink_decode_c37_word(state, lpa, SPEED_2500); 3330 break; 3331 3332 case PHY_INTERFACE_MODE_SGMII: 3333 case PHY_INTERFACE_MODE_QSGMII: 3334 case PHY_INTERFACE_MODE_QUSGMII: 3335 phylink_decode_sgmii_word(state, lpa); 3336 break; 3337 3338 default: 3339 state->link = false; 3340 break; 3341 } 3342 } 3343 EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_decode_state); 3344 3345 /** 3346 * phylink_mii_c22_pcs_get_state() - read the MAC PCS state 3347 * @pcs: a pointer to a &struct mdio_device. 3348 * @state: a pointer to a &struct phylink_link_state. 3349 * 3350 * Helper for MAC PCS supporting the 802.3 clause 22 register set for 3351 * clause 37 negotiation and/or SGMII control. 3352 * 3353 * Read the MAC PCS state from the MII device configured in @config and 3354 * parse the Clause 37 or Cisco SGMII link partner negotiation word into 3355 * the phylink @state structure. This is suitable to be directly plugged 3356 * into the mac_pcs_get_state() member of the struct phylink_mac_ops 3357 * structure. 3358 */ 3359 void phylink_mii_c22_pcs_get_state(struct mdio_device *pcs, 3360 struct phylink_link_state *state) 3361 { 3362 int bmsr, lpa; 3363 3364 bmsr = mdiodev_read(pcs, MII_BMSR); 3365 lpa = mdiodev_read(pcs, MII_LPA); 3366 if (bmsr < 0 || lpa < 0) { 3367 state->link = false; 3368 return; 3369 } 3370 3371 phylink_mii_c22_pcs_decode_state(state, bmsr, lpa); 3372 } 3373 EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_get_state); 3374 3375 /** 3376 * phylink_mii_c22_pcs_encode_advertisement() - configure the clause 37 PCS 3377 * advertisement 3378 * @interface: the PHY interface mode being configured 3379 * @advertising: the ethtool advertisement mask 3380 * 3381 * Helper for MAC PCS supporting the 802.3 clause 22 register set for 3382 * clause 37 negotiation and/or SGMII control. 3383 * 3384 * Encode the clause 37 PCS advertisement as specified by @interface and 3385 * @advertising. 3386 * 3387 * Return: The new value for @adv, or ``-EINVAL`` if it should not be changed. 3388 */ 3389 int phylink_mii_c22_pcs_encode_advertisement(phy_interface_t interface, 3390 const unsigned long *advertising) 3391 { 3392 u16 adv; 3393 3394 switch (interface) { 3395 case PHY_INTERFACE_MODE_1000BASEX: 3396 case PHY_INTERFACE_MODE_2500BASEX: 3397 adv = ADVERTISE_1000XFULL; 3398 if (linkmode_test_bit(ETHTOOL_LINK_MODE_Pause_BIT, 3399 advertising)) 3400 adv |= ADVERTISE_1000XPAUSE; 3401 if (linkmode_test_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, 3402 advertising)) 3403 adv |= ADVERTISE_1000XPSE_ASYM; 3404 return adv; 3405 case PHY_INTERFACE_MODE_SGMII: 3406 case PHY_INTERFACE_MODE_QSGMII: 3407 return 0x0001; 3408 default: 3409 /* Nothing to do for other modes */ 3410 return -EINVAL; 3411 } 3412 } 3413 EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_encode_advertisement); 3414 3415 /** 3416 * phylink_mii_c22_pcs_config() - configure clause 22 PCS 3417 * @pcs: a pointer to a &struct mdio_device. 3418 * @mode: link autonegotiation mode 3419 * @interface: the PHY interface mode being configured 3420 * @advertising: the ethtool advertisement mask 3421 * 3422 * Configure a Clause 22 PCS PHY with the appropriate negotiation 3423 * parameters for the @mode, @interface and @advertising parameters. 3424 * Returns negative error number on failure, zero if the advertisement 3425 * has not changed, or positive if there is a change. 3426 */ 3427 int phylink_mii_c22_pcs_config(struct mdio_device *pcs, unsigned int mode, 3428 phy_interface_t interface, 3429 const unsigned long *advertising) 3430 { 3431 bool changed = 0; 3432 u16 bmcr; 3433 int ret, adv; 3434 3435 adv = phylink_mii_c22_pcs_encode_advertisement(interface, advertising); 3436 if (adv >= 0) { 3437 ret = mdiobus_modify_changed(pcs->bus, pcs->addr, 3438 MII_ADVERTISE, 0xffff, adv); 3439 if (ret < 0) 3440 return ret; 3441 changed = ret; 3442 } 3443 3444 /* Ensure ISOLATE bit is disabled */ 3445 if (mode == MLO_AN_INBAND && 3446 (interface == PHY_INTERFACE_MODE_SGMII || 3447 interface == PHY_INTERFACE_MODE_QSGMII || 3448 linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, advertising))) 3449 bmcr = BMCR_ANENABLE; 3450 else 3451 bmcr = 0; 3452 3453 ret = mdiodev_modify(pcs, MII_BMCR, BMCR_ANENABLE | BMCR_ISOLATE, bmcr); 3454 if (ret < 0) 3455 return ret; 3456 3457 return changed; 3458 } 3459 EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_config); 3460 3461 /** 3462 * phylink_mii_c22_pcs_an_restart() - restart 802.3z autonegotiation 3463 * @pcs: a pointer to a &struct mdio_device. 3464 * 3465 * Helper for MAC PCS supporting the 802.3 clause 22 register set for 3466 * clause 37 negotiation. 3467 * 3468 * Restart the clause 37 negotiation with the link partner. This is 3469 * suitable to be directly plugged into the mac_pcs_get_state() member 3470 * of the struct phylink_mac_ops structure. 3471 */ 3472 void phylink_mii_c22_pcs_an_restart(struct mdio_device *pcs) 3473 { 3474 int val = mdiodev_read(pcs, MII_BMCR); 3475 3476 if (val >= 0) { 3477 val |= BMCR_ANRESTART; 3478 3479 mdiodev_write(pcs, MII_BMCR, val); 3480 } 3481 } 3482 EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_an_restart); 3483 3484 void phylink_mii_c45_pcs_get_state(struct mdio_device *pcs, 3485 struct phylink_link_state *state) 3486 { 3487 struct mii_bus *bus = pcs->bus; 3488 int addr = pcs->addr; 3489 int stat; 3490 3491 stat = mdiobus_c45_read(bus, addr, MDIO_MMD_PCS, MDIO_STAT1); 3492 if (stat < 0) { 3493 state->link = false; 3494 return; 3495 } 3496 3497 state->link = !!(stat & MDIO_STAT1_LSTATUS); 3498 if (!state->link) 3499 return; 3500 3501 switch (state->interface) { 3502 case PHY_INTERFACE_MODE_10GBASER: 3503 state->speed = SPEED_10000; 3504 state->duplex = DUPLEX_FULL; 3505 break; 3506 3507 default: 3508 break; 3509 } 3510 } 3511 EXPORT_SYMBOL_GPL(phylink_mii_c45_pcs_get_state); 3512 3513 static int __init phylink_init(void) 3514 { 3515 for (int i = 0; i < ARRAY_SIZE(phylink_sfp_interface_preference); ++i) 3516 __set_bit(phylink_sfp_interface_preference[i], 3517 phylink_sfp_interfaces); 3518 3519 return 0; 3520 } 3521 3522 module_init(phylink_init); 3523 3524 MODULE_LICENSE("GPL v2"); 3525