1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * phylink models the MAC to optional PHY connection, supporting 4 * technologies such as SFP cages where the PHY is hot-pluggable. 5 * 6 * Copyright (C) 2015 Russell King 7 */ 8 #include <linux/acpi.h> 9 #include <linux/ethtool.h> 10 #include <linux/export.h> 11 #include <linux/gpio/consumer.h> 12 #include <linux/netdevice.h> 13 #include <linux/of.h> 14 #include <linux/of_mdio.h> 15 #include <linux/phy.h> 16 #include <linux/phy_fixed.h> 17 #include <linux/phylink.h> 18 #include <linux/rtnetlink.h> 19 #include <linux/spinlock.h> 20 #include <linux/timer.h> 21 #include <linux/workqueue.h> 22 23 #include "phy-caps.h" 24 #include "sfp.h" 25 #include "swphy.h" 26 27 enum { 28 PHYLINK_DISABLE_STOPPED, 29 PHYLINK_DISABLE_LINK, 30 PHYLINK_DISABLE_MAC_WOL, 31 PHYLINK_DISABLE_REPLAY, 32 33 PCS_STATE_DOWN = 0, 34 PCS_STATE_STARTING, 35 PCS_STATE_STARTED, 36 }; 37 38 /** 39 * struct phylink - internal data type for phylink 40 */ 41 struct phylink { 42 /* private: */ 43 struct net_device *netdev; 44 const struct phylink_mac_ops *mac_ops; 45 struct phylink_config *config; 46 struct phylink_pcs *pcs; 47 struct device *dev; 48 unsigned int old_link_state:1; 49 50 unsigned long phylink_disable_state; /* bitmask of disables */ 51 struct phy_device *phydev; 52 phy_interface_t link_interface; /* PHY_INTERFACE_xxx */ 53 u8 cfg_link_an_mode; /* MLO_AN_xxx */ 54 u8 req_link_an_mode; /* Requested MLO_AN_xxx mode */ 55 u8 act_link_an_mode; /* Active MLO_AN_xxx mode */ 56 u8 link_port; /* The current non-phy ethtool port */ 57 __ETHTOOL_DECLARE_LINK_MODE_MASK(supported); 58 __ETHTOOL_DECLARE_LINK_MODE_MASK(supported_lpi); 59 60 /* The link configuration settings */ 61 struct phylink_link_state link_config; 62 63 /* The current settings */ 64 phy_interface_t cur_interface; 65 66 struct gpio_desc *link_gpio; 67 unsigned int link_irq; 68 struct timer_list link_poll; 69 70 struct mutex state_mutex; 71 /* Serialize updates to pl->phydev with phylink_resolve() */ 72 struct mutex phydev_mutex; 73 struct phylink_link_state phy_state; 74 unsigned int phy_ib_mode; 75 struct work_struct resolve; 76 unsigned int pcs_neg_mode; 77 unsigned int pcs_state; 78 79 bool link_failed; 80 bool suspend_link_up; 81 bool force_major_config; 82 bool major_config_failed; 83 bool mac_supports_eee_ops; 84 bool mac_supports_eee; 85 bool phy_enable_tx_lpi; 86 bool mac_enable_tx_lpi; 87 bool mac_tx_clk_stop; 88 u32 mac_tx_lpi_timer; 89 u8 mac_rx_clk_stop_blocked; 90 91 struct sfp_bus *sfp_bus; 92 bool sfp_may_have_phy; 93 DECLARE_PHY_INTERFACE_MASK(sfp_interfaces); 94 __ETHTOOL_DECLARE_LINK_MODE_MASK(sfp_support); 95 u8 sfp_port; 96 97 struct eee_config eee_cfg; 98 99 u32 wolopts_mac; 100 u8 wol_sopass[SOPASS_MAX]; 101 }; 102 103 #define phylink_printk(level, pl, fmt, ...) \ 104 do { \ 105 if ((pl)->config->type == PHYLINK_NETDEV) \ 106 netdev_printk(level, (pl)->netdev, fmt, ##__VA_ARGS__); \ 107 else if ((pl)->config->type == PHYLINK_DEV) \ 108 dev_printk(level, (pl)->dev, fmt, ##__VA_ARGS__); \ 109 } while (0) 110 111 #define phylink_err(pl, fmt, ...) \ 112 phylink_printk(KERN_ERR, pl, fmt, ##__VA_ARGS__) 113 #define phylink_warn(pl, fmt, ...) \ 114 phylink_printk(KERN_WARNING, pl, fmt, ##__VA_ARGS__) 115 #define phylink_info(pl, fmt, ...) \ 116 phylink_printk(KERN_INFO, pl, fmt, ##__VA_ARGS__) 117 #if defined(CONFIG_DYNAMIC_DEBUG) 118 #define phylink_dbg(pl, fmt, ...) \ 119 do { \ 120 if ((pl)->config->type == PHYLINK_NETDEV) \ 121 netdev_dbg((pl)->netdev, fmt, ##__VA_ARGS__); \ 122 else if ((pl)->config->type == PHYLINK_DEV) \ 123 dev_dbg((pl)->dev, fmt, ##__VA_ARGS__); \ 124 } while (0) 125 #elif defined(DEBUG) 126 #define phylink_dbg(pl, fmt, ...) \ 127 phylink_printk(KERN_DEBUG, pl, fmt, ##__VA_ARGS__) 128 #else 129 #define phylink_dbg(pl, fmt, ...) \ 130 ({ \ 131 if (0) \ 132 phylink_printk(KERN_DEBUG, pl, fmt, ##__VA_ARGS__); \ 133 }) 134 #endif 135 136 static const phy_interface_t phylink_sfp_interface_preference[] = { 137 PHY_INTERFACE_MODE_100GBASEP, 138 PHY_INTERFACE_MODE_50GBASER, 139 PHY_INTERFACE_MODE_LAUI, 140 PHY_INTERFACE_MODE_25GBASER, 141 PHY_INTERFACE_MODE_USXGMII, 142 PHY_INTERFACE_MODE_10GBASER, 143 PHY_INTERFACE_MODE_5GBASER, 144 PHY_INTERFACE_MODE_2500BASEX, 145 PHY_INTERFACE_MODE_SGMII, 146 PHY_INTERFACE_MODE_1000BASEX, 147 PHY_INTERFACE_MODE_100BASEX, 148 }; 149 150 static DECLARE_PHY_INTERFACE_MASK(phylink_sfp_interfaces); 151 152 /** 153 * phylink_set_port_modes() - set the port type modes in the ethtool mask 154 * @mask: ethtool link mode mask 155 * 156 * Sets all the port type modes in the ethtool mask. 157 */ 158 void phylink_set_port_modes(unsigned long *mask) 159 { 160 phylink_set(mask, TP); 161 phylink_set(mask, AUI); 162 phylink_set(mask, MII); 163 phylink_set(mask, FIBRE); 164 phylink_set(mask, BNC); 165 phylink_set(mask, Backplane); 166 } 167 EXPORT_SYMBOL_GPL(phylink_set_port_modes); 168 169 static int phylink_is_empty_linkmode(const unsigned long *linkmode) 170 { 171 __ETHTOOL_DECLARE_LINK_MODE_MASK(tmp) = { 0, }; 172 173 phylink_set_port_modes(tmp); 174 phylink_set(tmp, Autoneg); 175 phylink_set(tmp, Pause); 176 phylink_set(tmp, Asym_Pause); 177 178 return linkmode_subset(linkmode, tmp); 179 } 180 181 static const char *phylink_an_mode_str(unsigned int mode) 182 { 183 static const char *modestr[] = { 184 [MLO_AN_PHY] = "phy", 185 [MLO_AN_FIXED] = "fixed", 186 [MLO_AN_INBAND] = "inband", 187 }; 188 189 return mode < ARRAY_SIZE(modestr) ? modestr[mode] : "unknown"; 190 } 191 192 static const char *phylink_pcs_mode_str(unsigned int mode) 193 { 194 if (!mode) 195 return "none"; 196 197 if (mode & PHYLINK_PCS_NEG_OUTBAND) 198 return "outband"; 199 200 if (mode & PHYLINK_PCS_NEG_INBAND) { 201 if (mode & PHYLINK_PCS_NEG_ENABLED) 202 return "inband,an-enabled"; 203 else 204 return "inband,an-disabled"; 205 } 206 207 return "unknown"; 208 } 209 210 static unsigned int phylink_interface_signal_rate(phy_interface_t interface) 211 { 212 switch (interface) { 213 case PHY_INTERFACE_MODE_SGMII: 214 case PHY_INTERFACE_MODE_1000BASEX: /* 1.25Mbd */ 215 return 1250; 216 case PHY_INTERFACE_MODE_2500BASEX: /* 3.125Mbd */ 217 return 3125; 218 case PHY_INTERFACE_MODE_5GBASER: /* 5.15625Mbd */ 219 return 5156; 220 case PHY_INTERFACE_MODE_10GBASER: /* 10.3125Mbd */ 221 return 10313; 222 default: 223 return 0; 224 } 225 } 226 227 /** 228 * phylink_interface_max_speed() - get the maximum speed of a phy interface 229 * @interface: phy interface mode defined by &typedef phy_interface_t 230 * 231 * Determine the maximum speed of a phy interface. This is intended to help 232 * determine the correct speed to pass to the MAC when the phy is performing 233 * rate matching. 234 * 235 * Return: The maximum speed of @interface 236 */ 237 static int phylink_interface_max_speed(phy_interface_t interface) 238 { 239 switch (interface) { 240 case PHY_INTERFACE_MODE_100BASEX: 241 case PHY_INTERFACE_MODE_REVRMII: 242 case PHY_INTERFACE_MODE_RMII: 243 case PHY_INTERFACE_MODE_SMII: 244 case PHY_INTERFACE_MODE_REVMII: 245 case PHY_INTERFACE_MODE_MII: 246 case PHY_INTERFACE_MODE_MIILITE: 247 return SPEED_100; 248 249 case PHY_INTERFACE_MODE_TBI: 250 case PHY_INTERFACE_MODE_MOCA: 251 case PHY_INTERFACE_MODE_RTBI: 252 case PHY_INTERFACE_MODE_1000BASEX: 253 case PHY_INTERFACE_MODE_1000BASEKX: 254 case PHY_INTERFACE_MODE_TRGMII: 255 case PHY_INTERFACE_MODE_RGMII_TXID: 256 case PHY_INTERFACE_MODE_RGMII_RXID: 257 case PHY_INTERFACE_MODE_RGMII_ID: 258 case PHY_INTERFACE_MODE_RGMII: 259 case PHY_INTERFACE_MODE_PSGMII: 260 case PHY_INTERFACE_MODE_QSGMII: 261 case PHY_INTERFACE_MODE_QUSGMII: 262 case PHY_INTERFACE_MODE_SGMII: 263 case PHY_INTERFACE_MODE_GMII: 264 return SPEED_1000; 265 266 case PHY_INTERFACE_MODE_2500BASEX: 267 case PHY_INTERFACE_MODE_10G_QXGMII: 268 return SPEED_2500; 269 270 case PHY_INTERFACE_MODE_5GBASER: 271 return SPEED_5000; 272 273 case PHY_INTERFACE_MODE_XGMII: 274 case PHY_INTERFACE_MODE_RXAUI: 275 case PHY_INTERFACE_MODE_XAUI: 276 case PHY_INTERFACE_MODE_10GBASER: 277 case PHY_INTERFACE_MODE_10GKR: 278 case PHY_INTERFACE_MODE_USXGMII: 279 return SPEED_10000; 280 281 case PHY_INTERFACE_MODE_25GBASER: 282 return SPEED_25000; 283 284 case PHY_INTERFACE_MODE_XLGMII: 285 return SPEED_40000; 286 287 case PHY_INTERFACE_MODE_50GBASER: 288 case PHY_INTERFACE_MODE_LAUI: 289 return SPEED_50000; 290 291 case PHY_INTERFACE_MODE_100GBASEP: 292 return SPEED_100000; 293 294 case PHY_INTERFACE_MODE_INTERNAL: 295 case PHY_INTERFACE_MODE_NA: 296 case PHY_INTERFACE_MODE_MAX: 297 /* No idea! Garbage in, unknown out */ 298 return SPEED_UNKNOWN; 299 } 300 301 /* If we get here, someone forgot to add an interface mode above */ 302 WARN_ON_ONCE(1); 303 return SPEED_UNKNOWN; 304 } 305 306 static struct { 307 unsigned long mask; 308 int speed; 309 unsigned int duplex; 310 unsigned int caps_bit; 311 } phylink_caps_params[] = { 312 { MAC_400000FD, SPEED_400000, DUPLEX_FULL, BIT(LINK_CAPA_400000FD) }, 313 { MAC_200000FD, SPEED_200000, DUPLEX_FULL, BIT(LINK_CAPA_200000FD) }, 314 { MAC_100000FD, SPEED_100000, DUPLEX_FULL, BIT(LINK_CAPA_100000FD) }, 315 { MAC_80000FD, SPEED_80000, DUPLEX_FULL, BIT(LINK_CAPA_80000FD) }, 316 { MAC_56000FD, SPEED_56000, DUPLEX_FULL, BIT(LINK_CAPA_56000FD) }, 317 { MAC_50000FD, SPEED_50000, DUPLEX_FULL, BIT(LINK_CAPA_50000FD) }, 318 { MAC_40000FD, SPEED_40000, DUPLEX_FULL, BIT(LINK_CAPA_40000FD) }, 319 { MAC_25000FD, SPEED_25000, DUPLEX_FULL, BIT(LINK_CAPA_25000FD) }, 320 { MAC_20000FD, SPEED_20000, DUPLEX_FULL, BIT(LINK_CAPA_20000FD) }, 321 { MAC_10000FD, SPEED_10000, DUPLEX_FULL, BIT(LINK_CAPA_10000FD) }, 322 { MAC_5000FD, SPEED_5000, DUPLEX_FULL, BIT(LINK_CAPA_5000FD) }, 323 { MAC_2500FD, SPEED_2500, DUPLEX_FULL, BIT(LINK_CAPA_2500FD) }, 324 { MAC_1000FD, SPEED_1000, DUPLEX_FULL, BIT(LINK_CAPA_1000FD) }, 325 { MAC_1000HD, SPEED_1000, DUPLEX_HALF, BIT(LINK_CAPA_1000HD) }, 326 { MAC_100FD, SPEED_100, DUPLEX_FULL, BIT(LINK_CAPA_100FD) }, 327 { MAC_100HD, SPEED_100, DUPLEX_HALF, BIT(LINK_CAPA_100HD) }, 328 { MAC_10FD, SPEED_10, DUPLEX_FULL, BIT(LINK_CAPA_10FD) }, 329 { MAC_10HD, SPEED_10, DUPLEX_HALF, BIT(LINK_CAPA_10HD) }, 330 }; 331 332 /** 333 * phylink_caps_to_link_caps() - Convert a set of MAC capabilities LINK caps 334 * @caps: A set of MAC capabilities 335 * 336 * Returns: The corresponding set of LINK_CAPA as defined in phy-caps.h 337 */ 338 static unsigned long phylink_caps_to_link_caps(unsigned long caps) 339 { 340 unsigned long link_caps = 0; 341 int i; 342 343 for (i = 0; i < ARRAY_SIZE(phylink_caps_params); i++) 344 if (caps & phylink_caps_params[i].mask) 345 link_caps |= phylink_caps_params[i].caps_bit; 346 347 return link_caps; 348 } 349 350 static unsigned long phylink_link_caps_to_mac_caps(unsigned long link_caps) 351 { 352 unsigned long caps = 0; 353 int i; 354 355 for (i = 0; i < ARRAY_SIZE(phylink_caps_params); i++) 356 if (link_caps & phylink_caps_params[i].caps_bit) 357 caps |= phylink_caps_params[i].mask; 358 359 return caps; 360 } 361 362 /** 363 * phylink_caps_to_linkmodes() - Convert capabilities to ethtool link modes 364 * @linkmodes: ethtool linkmode mask (must be already initialised) 365 * @caps: bitmask of MAC capabilities 366 * 367 * Set all possible pause, speed and duplex linkmodes in @linkmodes that are 368 * supported by the @caps. @linkmodes must have been initialised previously. 369 */ 370 static void phylink_caps_to_linkmodes(unsigned long *linkmodes, 371 unsigned long caps) 372 { 373 unsigned long link_caps = phylink_caps_to_link_caps(caps); 374 375 if (caps & MAC_SYM_PAUSE) 376 __set_bit(ETHTOOL_LINK_MODE_Pause_BIT, linkmodes); 377 378 if (caps & MAC_ASYM_PAUSE) 379 __set_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, linkmodes); 380 381 phy_caps_linkmodes(link_caps, linkmodes); 382 } 383 384 /** 385 * phylink_limit_mac_speed - limit the phylink_config to a maximum speed 386 * @config: pointer to a &struct phylink_config 387 * @max_speed: maximum speed 388 * 389 * Mask off MAC capabilities for speeds higher than the @max_speed parameter. 390 * Any further motifications of config.mac_capabilities will override this. 391 */ 392 void phylink_limit_mac_speed(struct phylink_config *config, u32 max_speed) 393 { 394 int i; 395 396 for (i = 0; i < ARRAY_SIZE(phylink_caps_params) && 397 phylink_caps_params[i].speed > max_speed; i++) 398 config->mac_capabilities &= ~phylink_caps_params[i].mask; 399 } 400 EXPORT_SYMBOL_GPL(phylink_limit_mac_speed); 401 402 /** 403 * phylink_cap_from_speed_duplex - Get mac capability from speed/duplex 404 * @speed: the speed to search for 405 * @duplex: the duplex to search for 406 * 407 * Find the mac capability for a given speed and duplex. 408 * 409 * Return: A mask with the mac capability patching @speed and @duplex, or 0 if 410 * there were no matches. 411 */ 412 static unsigned long phylink_cap_from_speed_duplex(int speed, 413 unsigned int duplex) 414 { 415 int i; 416 417 for (i = 0; i < ARRAY_SIZE(phylink_caps_params); i++) { 418 if (speed == phylink_caps_params[i].speed && 419 duplex == phylink_caps_params[i].duplex) 420 return phylink_caps_params[i].mask; 421 } 422 423 return 0; 424 } 425 426 /** 427 * phylink_get_capabilities() - get capabilities for a given MAC 428 * @interface: phy interface mode defined by &typedef phy_interface_t 429 * @mac_capabilities: bitmask of MAC capabilities 430 * @rate_matching: type of rate matching being performed 431 * 432 * Get the MAC capabilities that are supported by the @interface mode and 433 * @mac_capabilities. 434 */ 435 static unsigned long phylink_get_capabilities(phy_interface_t interface, 436 unsigned long mac_capabilities, 437 int rate_matching) 438 { 439 unsigned long link_caps = phy_caps_from_interface(interface); 440 int max_speed = phylink_interface_max_speed(interface); 441 unsigned long caps = MAC_SYM_PAUSE | MAC_ASYM_PAUSE; 442 unsigned long matched_caps = 0; 443 444 caps |= phylink_link_caps_to_mac_caps(link_caps); 445 446 switch (rate_matching) { 447 case RATE_MATCH_OPEN_LOOP: 448 /* TODO */ 449 fallthrough; 450 case RATE_MATCH_NONE: 451 matched_caps = 0; 452 break; 453 case RATE_MATCH_PAUSE: { 454 /* The MAC must support asymmetric pause towards the local 455 * device for this. We could allow just symmetric pause, but 456 * then we might have to renegotiate if the link partner 457 * doesn't support pause. This is because there's no way to 458 * accept pause frames without transmitting them if we only 459 * support symmetric pause. 460 */ 461 if (!(mac_capabilities & MAC_SYM_PAUSE) || 462 !(mac_capabilities & MAC_ASYM_PAUSE)) 463 break; 464 465 /* We can't adapt if the MAC doesn't support the interface's 466 * max speed at full duplex. 467 */ 468 if (mac_capabilities & 469 phylink_cap_from_speed_duplex(max_speed, DUPLEX_FULL)) 470 matched_caps = GENMASK(__fls(caps), __fls(MAC_10HD)); 471 break; 472 } 473 case RATE_MATCH_CRS: 474 /* The MAC must support half duplex at the interface's max 475 * speed. 476 */ 477 if (mac_capabilities & 478 phylink_cap_from_speed_duplex(max_speed, DUPLEX_HALF)) { 479 matched_caps = GENMASK(__fls(caps), __fls(MAC_10HD)); 480 matched_caps &= mac_capabilities; 481 } 482 break; 483 } 484 485 return (caps & mac_capabilities) | matched_caps; 486 } 487 488 /** 489 * phylink_validate_mask_caps() - Restrict link modes based on caps 490 * @supported: ethtool bitmask for supported link modes. 491 * @state: pointer to a &struct phylink_link_state. 492 * @mac_capabilities: bitmask of MAC capabilities 493 * 494 * Calculate the supported link modes based on @mac_capabilities, and restrict 495 * @supported and @state based on that. Use this function if your capabiliies 496 * aren't constant, such as if they vary depending on the interface. 497 */ 498 static void phylink_validate_mask_caps(unsigned long *supported, 499 struct phylink_link_state *state, 500 unsigned long mac_capabilities) 501 { 502 __ETHTOOL_DECLARE_LINK_MODE_MASK(mask) = { 0, }; 503 unsigned long caps; 504 505 phylink_set_port_modes(mask); 506 phylink_set(mask, Autoneg); 507 caps = phylink_get_capabilities(state->interface, mac_capabilities, 508 state->rate_matching); 509 phylink_caps_to_linkmodes(mask, caps); 510 511 linkmode_and(supported, supported, mask); 512 linkmode_and(state->advertising, state->advertising, mask); 513 } 514 515 static int phylink_validate_mac_and_pcs(struct phylink *pl, 516 unsigned long *supported, 517 struct phylink_link_state *state) 518 { 519 struct phylink_pcs *pcs = NULL; 520 unsigned long capabilities; 521 int ret; 522 523 /* Get the PCS for this interface mode */ 524 if (pl->mac_ops->mac_select_pcs) { 525 pcs = pl->mac_ops->mac_select_pcs(pl->config, state->interface); 526 if (IS_ERR(pcs)) 527 return PTR_ERR(pcs); 528 } 529 530 if (pcs) { 531 /* The PCS, if present, must be setup before phylink_create() 532 * has been called. If the ops is not initialised, print an 533 * error and backtrace rather than oopsing the kernel. 534 */ 535 if (!pcs->ops) { 536 phylink_err(pl, "interface %s: uninitialised PCS\n", 537 phy_modes(state->interface)); 538 dump_stack(); 539 return -EINVAL; 540 } 541 542 /* Ensure that this PCS supports the interface which the MAC 543 * returned it for. It is an error for the MAC to return a PCS 544 * that does not support the interface mode. 545 */ 546 if (!phy_interface_empty(pcs->supported_interfaces) && 547 !test_bit(state->interface, pcs->supported_interfaces)) { 548 phylink_err(pl, "MAC returned PCS which does not support %s\n", 549 phy_modes(state->interface)); 550 return -EINVAL; 551 } 552 553 /* Validate the link parameters with the PCS */ 554 if (pcs->ops->pcs_validate) { 555 ret = pcs->ops->pcs_validate(pcs, supported, state); 556 if (ret < 0 || phylink_is_empty_linkmode(supported)) 557 return -EINVAL; 558 559 /* Ensure the advertising mask is a subset of the 560 * supported mask. 561 */ 562 linkmode_and(state->advertising, state->advertising, 563 supported); 564 } 565 } 566 567 /* Then validate the link parameters with the MAC */ 568 if (pl->mac_ops->mac_get_caps) 569 capabilities = pl->mac_ops->mac_get_caps(pl->config, 570 state->interface); 571 else 572 capabilities = pl->config->mac_capabilities; 573 574 phylink_validate_mask_caps(supported, state, capabilities); 575 576 return phylink_is_empty_linkmode(supported) ? -EINVAL : 0; 577 } 578 579 static void phylink_validate_one(struct phylink *pl, struct phy_device *phy, 580 const unsigned long *supported, 581 const struct phylink_link_state *state, 582 phy_interface_t interface, 583 unsigned long *accum_supported, 584 unsigned long *accum_advertising) 585 { 586 __ETHTOOL_DECLARE_LINK_MODE_MASK(tmp_supported); 587 struct phylink_link_state tmp_state; 588 589 linkmode_copy(tmp_supported, supported); 590 591 tmp_state = *state; 592 tmp_state.interface = interface; 593 594 if (phy) 595 tmp_state.rate_matching = phy_get_rate_matching(phy, interface); 596 597 if (!phylink_validate_mac_and_pcs(pl, tmp_supported, &tmp_state)) { 598 phylink_dbg(pl, " interface %u (%s) rate match %s supports %*pbl\n", 599 interface, phy_modes(interface), 600 phy_rate_matching_to_str(tmp_state.rate_matching), 601 __ETHTOOL_LINK_MODE_MASK_NBITS, tmp_supported); 602 603 linkmode_or(accum_supported, accum_supported, tmp_supported); 604 linkmode_or(accum_advertising, accum_advertising, 605 tmp_state.advertising); 606 } 607 } 608 609 static int phylink_validate_mask(struct phylink *pl, struct phy_device *phy, 610 unsigned long *supported, 611 struct phylink_link_state *state, 612 const unsigned long *interfaces) 613 { 614 __ETHTOOL_DECLARE_LINK_MODE_MASK(all_adv) = { 0, }; 615 __ETHTOOL_DECLARE_LINK_MODE_MASK(all_s) = { 0, }; 616 int interface; 617 618 for_each_set_bit(interface, interfaces, PHY_INTERFACE_MODE_MAX) 619 phylink_validate_one(pl, phy, supported, state, interface, 620 all_s, all_adv); 621 622 linkmode_copy(supported, all_s); 623 linkmode_copy(state->advertising, all_adv); 624 625 return phylink_is_empty_linkmode(supported) ? -EINVAL : 0; 626 } 627 628 static int phylink_validate(struct phylink *pl, unsigned long *supported, 629 struct phylink_link_state *state) 630 { 631 const unsigned long *interfaces = pl->config->supported_interfaces; 632 633 if (state->interface == PHY_INTERFACE_MODE_NA) 634 return phylink_validate_mask(pl, NULL, supported, state, 635 interfaces); 636 637 if (!test_bit(state->interface, interfaces)) 638 return -EINVAL; 639 640 return phylink_validate_mac_and_pcs(pl, supported, state); 641 } 642 643 static void phylink_fill_fixedlink_supported(unsigned long *supported) 644 { 645 linkmode_set_bit(ETHTOOL_LINK_MODE_Pause_BIT, supported); 646 linkmode_set_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, supported); 647 linkmode_set_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, supported); 648 linkmode_set_bit(ETHTOOL_LINK_MODE_10baseT_Half_BIT, supported); 649 linkmode_set_bit(ETHTOOL_LINK_MODE_10baseT_Full_BIT, supported); 650 linkmode_set_bit(ETHTOOL_LINK_MODE_100baseT_Half_BIT, supported); 651 linkmode_set_bit(ETHTOOL_LINK_MODE_100baseT_Full_BIT, supported); 652 linkmode_set_bit(ETHTOOL_LINK_MODE_1000baseT_Half_BIT, supported); 653 linkmode_set_bit(ETHTOOL_LINK_MODE_1000baseT_Full_BIT, supported); 654 linkmode_set_bit(ETHTOOL_LINK_MODE_2500baseT_Full_BIT, supported); 655 linkmode_set_bit(ETHTOOL_LINK_MODE_5000baseT_Full_BIT, supported); 656 linkmode_set_bit(ETHTOOL_LINK_MODE_10000baseT_Full_BIT, supported); 657 } 658 659 static int phylink_parse_fixedlink(struct phylink *pl, 660 const struct fwnode_handle *fwnode) 661 { 662 __ETHTOOL_DECLARE_LINK_MODE_MASK(match) = { 0, }; 663 __ETHTOOL_DECLARE_LINK_MODE_MASK(mask) = { 0, }; 664 const struct link_capabilities *c; 665 struct fwnode_handle *fixed_node; 666 struct gpio_desc *desc; 667 u32 speed; 668 int ret; 669 670 fixed_node = fwnode_get_named_child_node(fwnode, "fixed-link"); 671 if (fixed_node) { 672 ret = fwnode_property_read_u32(fixed_node, "speed", &speed); 673 674 pl->link_config.speed = speed; 675 pl->link_config.duplex = DUPLEX_HALF; 676 677 if (fwnode_property_read_bool(fixed_node, "full-duplex")) 678 pl->link_config.duplex = DUPLEX_FULL; 679 680 /* We treat the "pause" and "asym-pause" terminology as 681 * defining the link partner's ability. 682 */ 683 if (fwnode_property_read_bool(fixed_node, "pause")) 684 __set_bit(ETHTOOL_LINK_MODE_Pause_BIT, 685 pl->link_config.lp_advertising); 686 if (fwnode_property_read_bool(fixed_node, "asym-pause")) 687 __set_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, 688 pl->link_config.lp_advertising); 689 690 if (ret == 0) { 691 desc = fwnode_gpiod_get_index(fixed_node, "link", 0, 692 GPIOD_IN, "?"); 693 694 if (!IS_ERR(desc)) 695 pl->link_gpio = desc; 696 else if (desc == ERR_PTR(-EPROBE_DEFER)) 697 ret = -EPROBE_DEFER; 698 } 699 fwnode_handle_put(fixed_node); 700 701 if (ret) 702 return ret; 703 } else { 704 u32 prop[5]; 705 706 ret = fwnode_property_read_u32_array(fwnode, "fixed-link", 707 NULL, 0); 708 if (ret != ARRAY_SIZE(prop)) { 709 phylink_err(pl, "broken fixed-link?\n"); 710 return -EINVAL; 711 } 712 713 phylink_warn(pl, "%pfw uses deprecated array-style fixed-link binding!\n", 714 fwnode); 715 716 ret = fwnode_property_read_u32_array(fwnode, "fixed-link", 717 prop, ARRAY_SIZE(prop)); 718 if (!ret) { 719 pl->link_config.duplex = prop[1] ? 720 DUPLEX_FULL : DUPLEX_HALF; 721 pl->link_config.speed = prop[2]; 722 if (prop[3]) 723 __set_bit(ETHTOOL_LINK_MODE_Pause_BIT, 724 pl->link_config.lp_advertising); 725 if (prop[4]) 726 __set_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, 727 pl->link_config.lp_advertising); 728 } 729 } 730 731 if (pl->link_config.speed > SPEED_1000 && 732 pl->link_config.duplex != DUPLEX_FULL) 733 phylink_warn(pl, "fixed link specifies half duplex for %dMbps link?\n", 734 pl->link_config.speed); 735 736 linkmode_zero(pl->supported); 737 phylink_fill_fixedlink_supported(pl->supported); 738 739 linkmode_copy(pl->link_config.advertising, pl->supported); 740 phylink_validate(pl, pl->supported, &pl->link_config); 741 742 c = phy_caps_lookup(pl->link_config.speed, pl->link_config.duplex, 743 pl->supported, true); 744 if (c) 745 linkmode_and(match, pl->supported, c->linkmodes); 746 747 linkmode_set_bit(ETHTOOL_LINK_MODE_Pause_BIT, mask); 748 linkmode_set_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, mask); 749 linkmode_set_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, mask); 750 linkmode_and(pl->supported, pl->supported, mask); 751 752 phylink_set(pl->supported, MII); 753 754 if (c) { 755 linkmode_or(pl->supported, pl->supported, match); 756 linkmode_or(pl->link_config.lp_advertising, 757 pl->link_config.lp_advertising, match); 758 } else { 759 phylink_warn(pl, "fixed link %s duplex %dMbps not recognised\n", 760 pl->link_config.duplex == DUPLEX_FULL ? "full" : "half", 761 pl->link_config.speed); 762 } 763 764 linkmode_and(pl->link_config.advertising, pl->link_config.advertising, 765 pl->supported); 766 767 pl->link_config.link = 1; 768 pl->link_config.an_complete = 1; 769 770 return 0; 771 } 772 773 static int phylink_parse_mode(struct phylink *pl, 774 const struct fwnode_handle *fwnode) 775 { 776 struct fwnode_handle *dn; 777 const char *managed; 778 unsigned long caps; 779 780 if (pl->config->default_an_inband) 781 pl->cfg_link_an_mode = MLO_AN_INBAND; 782 783 dn = fwnode_get_named_child_node(fwnode, "fixed-link"); 784 if (dn || fwnode_property_present(fwnode, "fixed-link")) 785 pl->cfg_link_an_mode = MLO_AN_FIXED; 786 fwnode_handle_put(dn); 787 788 if ((fwnode_property_read_string(fwnode, "managed", &managed) == 0 && 789 strcmp(managed, "in-band-status") == 0)) { 790 if (pl->cfg_link_an_mode == MLO_AN_FIXED) { 791 phylink_err(pl, 792 "can't use both fixed-link and in-band-status\n"); 793 return -EINVAL; 794 } 795 796 pl->cfg_link_an_mode = MLO_AN_INBAND; 797 } 798 799 if (pl->cfg_link_an_mode == MLO_AN_INBAND) { 800 linkmode_zero(pl->supported); 801 phylink_set(pl->supported, MII); 802 phylink_set(pl->supported, Autoneg); 803 phylink_set(pl->supported, Asym_Pause); 804 phylink_set(pl->supported, Pause); 805 806 switch (pl->link_config.interface) { 807 case PHY_INTERFACE_MODE_SGMII: 808 case PHY_INTERFACE_MODE_PSGMII: 809 case PHY_INTERFACE_MODE_QSGMII: 810 case PHY_INTERFACE_MODE_QUSGMII: 811 case PHY_INTERFACE_MODE_RGMII: 812 case PHY_INTERFACE_MODE_RGMII_ID: 813 case PHY_INTERFACE_MODE_RGMII_RXID: 814 case PHY_INTERFACE_MODE_RGMII_TXID: 815 case PHY_INTERFACE_MODE_RTBI: 816 case PHY_INTERFACE_MODE_1000BASEX: 817 case PHY_INTERFACE_MODE_2500BASEX: 818 case PHY_INTERFACE_MODE_5GBASER: 819 case PHY_INTERFACE_MODE_25GBASER: 820 case PHY_INTERFACE_MODE_USXGMII: 821 case PHY_INTERFACE_MODE_10G_QXGMII: 822 case PHY_INTERFACE_MODE_10GKR: 823 case PHY_INTERFACE_MODE_10GBASER: 824 case PHY_INTERFACE_MODE_XLGMII: 825 case PHY_INTERFACE_MODE_50GBASER: 826 case PHY_INTERFACE_MODE_LAUI: 827 case PHY_INTERFACE_MODE_100GBASEP: 828 caps = ~(MAC_SYM_PAUSE | MAC_ASYM_PAUSE); 829 caps = phylink_get_capabilities(pl->link_config.interface, caps, 830 RATE_MATCH_NONE); 831 phylink_caps_to_linkmodes(pl->supported, caps); 832 break; 833 834 default: 835 phylink_err(pl, 836 "incorrect link mode %s for in-band status\n", 837 phy_modes(pl->link_config.interface)); 838 return -EINVAL; 839 } 840 841 linkmode_copy(pl->link_config.advertising, pl->supported); 842 843 if (phylink_validate(pl, pl->supported, &pl->link_config)) { 844 phylink_err(pl, 845 "failed to validate link configuration for in-band status\n"); 846 return -EINVAL; 847 } 848 } 849 850 return 0; 851 } 852 853 static void phylink_apply_manual_flow(struct phylink *pl, 854 struct phylink_link_state *state) 855 { 856 /* If autoneg is disabled, pause AN is also disabled */ 857 if (!linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, 858 state->advertising)) 859 state->pause &= ~MLO_PAUSE_AN; 860 861 /* Manual configuration of pause modes */ 862 if (!(pl->link_config.pause & MLO_PAUSE_AN)) 863 state->pause = pl->link_config.pause; 864 } 865 866 static void phylink_resolve_an_pause(struct phylink_link_state *state) 867 { 868 bool tx_pause, rx_pause; 869 870 if (state->duplex == DUPLEX_FULL) { 871 linkmode_resolve_pause(state->advertising, 872 state->lp_advertising, 873 &tx_pause, &rx_pause); 874 if (tx_pause) 875 state->pause |= MLO_PAUSE_TX; 876 if (rx_pause) 877 state->pause |= MLO_PAUSE_RX; 878 } 879 } 880 881 static unsigned int phylink_pcs_inband_caps(struct phylink_pcs *pcs, 882 phy_interface_t interface) 883 { 884 if (pcs && pcs->ops->pcs_inband_caps) 885 return pcs->ops->pcs_inband_caps(pcs, interface); 886 887 return 0; 888 } 889 890 static void phylink_pcs_pre_config(struct phylink_pcs *pcs, 891 phy_interface_t interface) 892 { 893 if (pcs && pcs->ops->pcs_pre_config) 894 pcs->ops->pcs_pre_config(pcs, interface); 895 } 896 897 static int phylink_pcs_post_config(struct phylink_pcs *pcs, 898 phy_interface_t interface) 899 { 900 int err = 0; 901 902 if (pcs && pcs->ops->pcs_post_config) 903 err = pcs->ops->pcs_post_config(pcs, interface); 904 905 return err; 906 } 907 908 static void phylink_pcs_disable(struct phylink_pcs *pcs) 909 { 910 if (pcs && pcs->ops->pcs_disable) 911 pcs->ops->pcs_disable(pcs); 912 } 913 914 static int phylink_pcs_enable(struct phylink_pcs *pcs) 915 { 916 int err = 0; 917 918 if (pcs && pcs->ops->pcs_enable) 919 err = pcs->ops->pcs_enable(pcs); 920 921 return err; 922 } 923 924 static int phylink_pcs_config(struct phylink_pcs *pcs, unsigned int neg_mode, 925 const struct phylink_link_state *state, 926 bool permit_pause_to_mac) 927 { 928 if (!pcs) 929 return 0; 930 931 return pcs->ops->pcs_config(pcs, neg_mode, state->interface, 932 state->advertising, permit_pause_to_mac); 933 } 934 935 static void phylink_pcs_link_up(struct phylink_pcs *pcs, unsigned int neg_mode, 936 phy_interface_t interface, int speed, 937 int duplex) 938 { 939 if (pcs && pcs->ops->pcs_link_up) 940 pcs->ops->pcs_link_up(pcs, neg_mode, interface, speed, duplex); 941 } 942 943 static void phylink_pcs_disable_eee(struct phylink_pcs *pcs) 944 { 945 if (pcs && pcs->ops->pcs_disable_eee) 946 pcs->ops->pcs_disable_eee(pcs); 947 } 948 949 static void phylink_pcs_enable_eee(struct phylink_pcs *pcs) 950 { 951 if (pcs && pcs->ops->pcs_enable_eee) 952 pcs->ops->pcs_enable_eee(pcs); 953 } 954 955 /* Query inband for a specific interface mode, asking the MAC for the 956 * PCS which will be used to handle the interface mode. 957 */ 958 static unsigned int phylink_inband_caps(struct phylink *pl, 959 phy_interface_t interface) 960 { 961 struct phylink_pcs *pcs; 962 963 if (!pl->mac_ops->mac_select_pcs) 964 return 0; 965 966 pcs = pl->mac_ops->mac_select_pcs(pl->config, interface); 967 if (IS_ERR_OR_NULL(pcs)) 968 return 0; 969 970 return phylink_pcs_inband_caps(pcs, interface); 971 } 972 973 static void phylink_pcs_poll_stop(struct phylink *pl) 974 { 975 if (pl->cfg_link_an_mode == MLO_AN_INBAND) 976 timer_delete(&pl->link_poll); 977 } 978 979 static void phylink_pcs_poll_start(struct phylink *pl) 980 { 981 if (pl->pcs && pl->pcs->poll && pl->cfg_link_an_mode == MLO_AN_INBAND) 982 mod_timer(&pl->link_poll, jiffies + HZ); 983 } 984 985 int phylink_pcs_pre_init(struct phylink *pl, struct phylink_pcs *pcs) 986 { 987 int ret = 0; 988 989 /* Signal to PCS driver that MAC requires RX clock for init */ 990 if (pl->config->mac_requires_rxc) 991 pcs->rxc_always_on = true; 992 993 if (pcs->ops->pcs_pre_init) 994 ret = pcs->ops->pcs_pre_init(pcs); 995 996 return ret; 997 } 998 EXPORT_SYMBOL_GPL(phylink_pcs_pre_init); 999 1000 static void phylink_mac_config(struct phylink *pl, 1001 const struct phylink_link_state *state) 1002 { 1003 struct phylink_link_state st = *state; 1004 1005 /* Stop drivers incorrectly using these */ 1006 linkmode_zero(st.lp_advertising); 1007 st.speed = SPEED_UNKNOWN; 1008 st.duplex = DUPLEX_UNKNOWN; 1009 st.an_complete = false; 1010 st.link = false; 1011 1012 phylink_dbg(pl, 1013 "%s: mode=%s/%s/%s adv=%*pb pause=%02x\n", 1014 __func__, phylink_an_mode_str(pl->act_link_an_mode), 1015 phy_modes(st.interface), 1016 phy_rate_matching_to_str(st.rate_matching), 1017 __ETHTOOL_LINK_MODE_MASK_NBITS, st.advertising, 1018 st.pause); 1019 1020 pl->mac_ops->mac_config(pl->config, pl->act_link_an_mode, &st); 1021 } 1022 1023 static void phylink_pcs_an_restart(struct phylink *pl) 1024 { 1025 if (pl->pcs && linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, 1026 pl->link_config.advertising) && 1027 phy_interface_mode_is_8023z(pl->link_config.interface) && 1028 phylink_autoneg_inband(pl->act_link_an_mode)) 1029 pl->pcs->ops->pcs_an_restart(pl->pcs); 1030 } 1031 1032 enum inband_type { 1033 INBAND_NONE, 1034 INBAND_CISCO_SGMII, 1035 INBAND_BASEX, 1036 }; 1037 1038 static enum inband_type phylink_get_inband_type(phy_interface_t interface) 1039 { 1040 switch (interface) { 1041 case PHY_INTERFACE_MODE_SGMII: 1042 case PHY_INTERFACE_MODE_PSGMII: 1043 case PHY_INTERFACE_MODE_QSGMII: 1044 case PHY_INTERFACE_MODE_QUSGMII: 1045 case PHY_INTERFACE_MODE_USXGMII: 1046 case PHY_INTERFACE_MODE_10G_QXGMII: 1047 /* These protocols are designed for use with a PHY which 1048 * communicates its negotiation result back to the MAC via 1049 * inband communication. Note: there exist PHYs that run 1050 * with SGMII but do not send the inband data. 1051 */ 1052 return INBAND_CISCO_SGMII; 1053 1054 case PHY_INTERFACE_MODE_1000BASEX: 1055 case PHY_INTERFACE_MODE_2500BASEX: 1056 /* 1000base-X is designed for use media-side for Fibre 1057 * connections, and thus the Autoneg bit needs to be 1058 * taken into account. We also do this for 2500base-X 1059 * as well, but drivers may not support this, so may 1060 * need to override this. 1061 */ 1062 return INBAND_BASEX; 1063 1064 default: 1065 return INBAND_NONE; 1066 } 1067 } 1068 1069 /** 1070 * phylink_pcs_neg_mode() - helper to determine PCS inband mode 1071 * @pl: a pointer to a &struct phylink returned from phylink_create() 1072 * @pcs: a pointer to &struct phylink_pcs 1073 * @interface: interface mode to be used 1074 * @advertising: adertisement ethtool link mode mask 1075 * 1076 * Determines the negotiation mode to be used by the PCS, and returns 1077 * one of: 1078 * 1079 * - %PHYLINK_PCS_NEG_NONE: interface mode does not support inband 1080 * - %PHYLINK_PCS_NEG_OUTBAND: an out of band mode (e.g. reading the PHY) 1081 * will be used. 1082 * - %PHYLINK_PCS_NEG_INBAND_DISABLED: inband mode selected but autoneg 1083 * disabled 1084 * - %PHYLINK_PCS_NEG_INBAND_ENABLED: inband mode selected and autoneg enabled 1085 * 1086 * Note: this is for cases where the PCS itself is involved in negotiation 1087 * (e.g. Clause 37, SGMII and similar) not Clause 73. 1088 */ 1089 static void phylink_pcs_neg_mode(struct phylink *pl, struct phylink_pcs *pcs, 1090 phy_interface_t interface, 1091 const unsigned long *advertising) 1092 { 1093 unsigned int pcs_ib_caps = 0; 1094 unsigned int phy_ib_caps = 0; 1095 unsigned int neg_mode, mode; 1096 enum inband_type type; 1097 1098 type = phylink_get_inband_type(interface); 1099 if (type == INBAND_NONE) { 1100 pl->pcs_neg_mode = PHYLINK_PCS_NEG_NONE; 1101 pl->act_link_an_mode = pl->req_link_an_mode; 1102 return; 1103 } 1104 1105 mode = pl->req_link_an_mode; 1106 1107 pl->phy_ib_mode = 0; 1108 1109 if (pcs) 1110 pcs_ib_caps = phylink_pcs_inband_caps(pcs, interface); 1111 1112 if (pl->phydev) 1113 phy_ib_caps = phy_inband_caps(pl->phydev, interface); 1114 1115 phylink_dbg(pl, "interface %s inband modes: pcs=%02x phy=%02x\n", 1116 phy_modes(interface), pcs_ib_caps, phy_ib_caps); 1117 1118 if (!phylink_autoneg_inband(mode)) { 1119 bool pcs_ib_only = false; 1120 bool phy_ib_only = false; 1121 1122 if (pcs_ib_caps && pcs_ib_caps != LINK_INBAND_DISABLE) { 1123 /* PCS supports reporting in-band capabilities, and 1124 * supports more than disable mode. 1125 */ 1126 if (pcs_ib_caps & LINK_INBAND_DISABLE) 1127 neg_mode = PHYLINK_PCS_NEG_OUTBAND; 1128 else if (pcs_ib_caps & LINK_INBAND_ENABLE) 1129 pcs_ib_only = true; 1130 } 1131 1132 if (phy_ib_caps && phy_ib_caps != LINK_INBAND_DISABLE) { 1133 /* PHY supports in-band capabilities, and supports 1134 * more than disable mode. 1135 */ 1136 if (phy_ib_caps & LINK_INBAND_DISABLE) 1137 pl->phy_ib_mode = LINK_INBAND_DISABLE; 1138 else if (phy_ib_caps & LINK_INBAND_BYPASS) 1139 pl->phy_ib_mode = LINK_INBAND_BYPASS; 1140 else if (phy_ib_caps & LINK_INBAND_ENABLE) 1141 phy_ib_only = true; 1142 } 1143 1144 /* If either the PCS or PHY requires inband to be enabled, 1145 * this is an invalid configuration. Provide a diagnostic 1146 * message for this case, but don't try to force the issue. 1147 */ 1148 if (pcs_ib_only || phy_ib_only) 1149 phylink_warn(pl, 1150 "firmware wants %s mode, but %s%s%s requires inband\n", 1151 phylink_an_mode_str(mode), 1152 pcs_ib_only ? "PCS" : "", 1153 pcs_ib_only && phy_ib_only ? " and " : "", 1154 phy_ib_only ? "PHY" : ""); 1155 1156 neg_mode = PHYLINK_PCS_NEG_OUTBAND; 1157 } else if (type == INBAND_CISCO_SGMII || pl->phydev) { 1158 /* For SGMII modes which are designed to be used with PHYs, or 1159 * Base-X with a PHY, we try to use in-band mode where-ever 1160 * possible. However, there are some PHYs e.g. BCM84881 which 1161 * do not support in-band. 1162 */ 1163 const unsigned int inband_ok = LINK_INBAND_ENABLE | 1164 LINK_INBAND_BYPASS; 1165 const unsigned int outband_ok = LINK_INBAND_DISABLE | 1166 LINK_INBAND_BYPASS; 1167 /* PCS PHY 1168 * D E D E 1169 * 0 0 0 0 no information inband enabled 1170 * 1 0 0 0 pcs doesn't support outband 1171 * 0 1 0 0 pcs required inband enabled 1172 * 1 1 0 0 pcs optional inband enabled 1173 * 0 0 1 0 phy doesn't support outband 1174 * 1 0 1 0 pcs+phy doesn't support outband 1175 * 0 1 1 0 pcs required, phy doesn't support, invalid 1176 * 1 1 1 0 pcs optional, phy doesn't support, outband 1177 * 0 0 0 1 phy required inband enabled 1178 * 1 0 0 1 pcs doesn't support, phy required, invalid 1179 * 0 1 0 1 pcs+phy required inband enabled 1180 * 1 1 0 1 pcs optional, phy required inband enabled 1181 * 0 0 1 1 phy optional inband enabled 1182 * 1 0 1 1 pcs doesn't support, phy optional, outband 1183 * 0 1 1 1 pcs required, phy optional inband enabled 1184 * 1 1 1 1 pcs+phy optional inband enabled 1185 */ 1186 if ((!pcs_ib_caps || pcs_ib_caps & inband_ok) && 1187 (!phy_ib_caps || phy_ib_caps & inband_ok)) { 1188 /* In-band supported or unknown at both ends. Enable 1189 * in-band mode with or without bypass at the PHY. 1190 */ 1191 if (phy_ib_caps & LINK_INBAND_ENABLE) 1192 pl->phy_ib_mode = LINK_INBAND_ENABLE; 1193 else if (phy_ib_caps & LINK_INBAND_BYPASS) 1194 pl->phy_ib_mode = LINK_INBAND_BYPASS; 1195 1196 neg_mode = PHYLINK_PCS_NEG_INBAND_ENABLED; 1197 } else if ((!pcs_ib_caps || pcs_ib_caps & outband_ok) && 1198 (!phy_ib_caps || phy_ib_caps & outband_ok)) { 1199 /* Either in-band not supported at at least one end. 1200 * In-band bypass at the other end is possible. 1201 */ 1202 if (phy_ib_caps & LINK_INBAND_DISABLE) 1203 pl->phy_ib_mode = LINK_INBAND_DISABLE; 1204 else if (phy_ib_caps & LINK_INBAND_BYPASS) 1205 pl->phy_ib_mode = LINK_INBAND_BYPASS; 1206 1207 neg_mode = PHYLINK_PCS_NEG_OUTBAND; 1208 if (pl->phydev) 1209 mode = MLO_AN_PHY; 1210 } else { 1211 /* invalid */ 1212 phylink_warn(pl, "%s: incompatible in-band capabilities, trying in-band", 1213 phy_modes(interface)); 1214 neg_mode = PHYLINK_PCS_NEG_INBAND_ENABLED; 1215 } 1216 } else { 1217 /* For Base-X without a PHY */ 1218 if (pcs_ib_caps == LINK_INBAND_DISABLE) 1219 /* If the PCS doesn't support inband, then inband must 1220 * be disabled. 1221 */ 1222 neg_mode = PHYLINK_PCS_NEG_INBAND_DISABLED; 1223 else if (pcs_ib_caps == LINK_INBAND_ENABLE) 1224 /* If the PCS requires inband, then inband must always 1225 * be enabled. 1226 */ 1227 neg_mode = PHYLINK_PCS_NEG_INBAND_ENABLED; 1228 else if (linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, 1229 advertising)) 1230 neg_mode = PHYLINK_PCS_NEG_INBAND_ENABLED; 1231 else 1232 neg_mode = PHYLINK_PCS_NEG_INBAND_DISABLED; 1233 } 1234 1235 pl->pcs_neg_mode = neg_mode; 1236 pl->act_link_an_mode = mode; 1237 } 1238 1239 static void phylink_major_config(struct phylink *pl, bool restart, 1240 const struct phylink_link_state *state) 1241 { 1242 struct phylink_pcs *pcs = NULL; 1243 bool pcs_changed = false; 1244 unsigned int rate_kbd; 1245 int err; 1246 1247 phylink_dbg(pl, "major config, requested %s/%s\n", 1248 phylink_an_mode_str(pl->req_link_an_mode), 1249 phy_modes(state->interface)); 1250 1251 pl->major_config_failed = false; 1252 1253 if (pl->mac_ops->mac_select_pcs) { 1254 pcs = pl->mac_ops->mac_select_pcs(pl->config, state->interface); 1255 if (IS_ERR(pcs)) { 1256 phylink_err(pl, 1257 "mac_select_pcs unexpectedly failed: %pe\n", 1258 pcs); 1259 1260 pl->major_config_failed = true; 1261 return; 1262 } 1263 1264 pcs_changed = pl->pcs != pcs; 1265 } 1266 1267 phylink_pcs_neg_mode(pl, pcs, state->interface, state->advertising); 1268 1269 phylink_dbg(pl, "major config, active %s/%s/%s\n", 1270 phylink_an_mode_str(pl->act_link_an_mode), 1271 phylink_pcs_mode_str(pl->pcs_neg_mode), 1272 phy_modes(state->interface)); 1273 1274 phylink_pcs_poll_stop(pl); 1275 1276 if (pl->mac_ops->mac_prepare) { 1277 err = pl->mac_ops->mac_prepare(pl->config, pl->act_link_an_mode, 1278 state->interface); 1279 if (err < 0) { 1280 phylink_err(pl, "mac_prepare failed: %pe\n", 1281 ERR_PTR(err)); 1282 pl->major_config_failed = true; 1283 return; 1284 } 1285 } 1286 1287 /* If we have a new PCS, switch to the new PCS after preparing the MAC 1288 * for the change. 1289 */ 1290 if (pcs_changed) { 1291 phylink_pcs_disable(pl->pcs); 1292 1293 if (pl->pcs) 1294 pl->pcs->phylink = NULL; 1295 1296 if (pcs) 1297 pcs->phylink = pl; 1298 1299 pl->pcs = pcs; 1300 } 1301 1302 if (pl->pcs) 1303 phylink_pcs_pre_config(pl->pcs, state->interface); 1304 1305 phylink_mac_config(pl, state); 1306 1307 if (pl->pcs) { 1308 err = phylink_pcs_post_config(pl->pcs, state->interface); 1309 if (err < 0) { 1310 phylink_err(pl, "pcs_post_config failed: %pe\n", 1311 ERR_PTR(err)); 1312 1313 pl->major_config_failed = true; 1314 } 1315 } 1316 1317 if (pl->pcs_state == PCS_STATE_STARTING || pcs_changed) 1318 phylink_pcs_enable(pl->pcs); 1319 1320 err = phylink_pcs_config(pl->pcs, pl->pcs_neg_mode, state, 1321 !!(pl->link_config.pause & MLO_PAUSE_AN)); 1322 if (err < 0) { 1323 phylink_err(pl, "pcs_config failed: %pe\n", ERR_PTR(err)); 1324 pl->major_config_failed = true; 1325 } else if (err > 0) { 1326 restart = true; 1327 } 1328 1329 if (restart) 1330 phylink_pcs_an_restart(pl); 1331 1332 if (pl->mac_ops->mac_finish) { 1333 err = pl->mac_ops->mac_finish(pl->config, pl->act_link_an_mode, 1334 state->interface); 1335 if (err < 0) { 1336 phylink_err(pl, "mac_finish failed: %pe\n", 1337 ERR_PTR(err)); 1338 1339 pl->major_config_failed = true; 1340 } 1341 } 1342 1343 if (pl->phydev && pl->phy_ib_mode) { 1344 phylink_dbg(pl, "configuring PHY for inband%s%s%s\n", 1345 pl->phy_ib_mode & LINK_INBAND_DISABLE ? 1346 " disable" : "", 1347 pl->phy_ib_mode & LINK_INBAND_ENABLE ? 1348 " enable" : "", 1349 pl->phy_ib_mode & LINK_INBAND_BYPASS ? 1350 " bypass" : ""); 1351 err = phy_config_inband(pl->phydev, pl->phy_ib_mode); 1352 if (err < 0) { 1353 phylink_err(pl, "phy_config_inband: %pe\n", 1354 ERR_PTR(err)); 1355 1356 pl->major_config_failed = true; 1357 } 1358 } 1359 1360 if (pl->sfp_bus) { 1361 rate_kbd = phylink_interface_signal_rate(state->interface); 1362 if (rate_kbd) 1363 sfp_upstream_set_signal_rate(pl->sfp_bus, rate_kbd); 1364 } 1365 1366 phylink_pcs_poll_start(pl); 1367 } 1368 1369 /* 1370 * Reconfigure for a change of inband advertisement. 1371 * If we have a separate PCS, we only need to call its pcs_config() method, 1372 * and then restart AN if it indicates something changed. Otherwise, we do 1373 * the full MAC reconfiguration. 1374 */ 1375 static int phylink_change_inband_advert(struct phylink *pl) 1376 { 1377 int ret; 1378 1379 if (test_bit(PHYLINK_DISABLE_STOPPED, &pl->phylink_disable_state)) 1380 return 0; 1381 1382 phylink_dbg(pl, "%s: mode=%s/%s adv=%*pb pause=%02x\n", __func__, 1383 phylink_an_mode_str(pl->req_link_an_mode), 1384 phy_modes(pl->link_config.interface), 1385 __ETHTOOL_LINK_MODE_MASK_NBITS, pl->link_config.advertising, 1386 pl->link_config.pause); 1387 1388 /* Recompute the PCS neg mode */ 1389 phylink_pcs_neg_mode(pl, pl->pcs, pl->link_config.interface, 1390 pl->link_config.advertising); 1391 1392 /* Modern PCS-based method; update the advert at the PCS, and 1393 * restart negotiation if the pcs_config() helper indicates that 1394 * the programmed advertisement has changed. 1395 */ 1396 ret = phylink_pcs_config(pl->pcs, pl->pcs_neg_mode, &pl->link_config, 1397 !!(pl->link_config.pause & MLO_PAUSE_AN)); 1398 if (ret < 0) 1399 return ret; 1400 1401 if (ret > 0) 1402 phylink_pcs_an_restart(pl); 1403 1404 return 0; 1405 } 1406 1407 static void phylink_mac_pcs_get_state(struct phylink *pl, 1408 struct phylink_link_state *state) 1409 { 1410 struct phylink_pcs *pcs; 1411 bool autoneg; 1412 1413 linkmode_copy(state->advertising, pl->link_config.advertising); 1414 linkmode_zero(state->lp_advertising); 1415 state->interface = pl->link_config.interface; 1416 state->rate_matching = pl->link_config.rate_matching; 1417 state->an_complete = 0; 1418 state->link = 1; 1419 1420 autoneg = pl->pcs_neg_mode == PHYLINK_PCS_NEG_INBAND_ENABLED; 1421 if (autoneg) { 1422 state->speed = SPEED_UNKNOWN; 1423 state->duplex = DUPLEX_UNKNOWN; 1424 state->pause = MLO_PAUSE_NONE; 1425 } else { 1426 state->speed = pl->link_config.speed; 1427 state->duplex = pl->link_config.duplex; 1428 state->pause = pl->link_config.pause; 1429 } 1430 1431 pcs = pl->pcs; 1432 if (pcs) 1433 pcs->ops->pcs_get_state(pcs, pl->pcs_neg_mode, state); 1434 else 1435 state->link = 0; 1436 } 1437 1438 /* The fixed state is... fixed except for the link state, 1439 * which may be determined by a GPIO or a callback. 1440 */ 1441 static void phylink_get_fixed_state(struct phylink *pl, 1442 struct phylink_link_state *state) 1443 { 1444 *state = pl->link_config; 1445 if (pl->config->get_fixed_state) 1446 pl->config->get_fixed_state(pl->config, state); 1447 else if (pl->link_gpio) 1448 state->link = !!gpiod_get_value_cansleep(pl->link_gpio); 1449 1450 state->pause = MLO_PAUSE_NONE; 1451 phylink_resolve_an_pause(state); 1452 } 1453 1454 static void phylink_mac_initial_config(struct phylink *pl, bool force_restart) 1455 { 1456 struct phylink_link_state link_state; 1457 struct phy_device *phy = pl->phydev; 1458 1459 switch (pl->req_link_an_mode) { 1460 case MLO_AN_PHY: 1461 link_state = pl->phy_state; 1462 break; 1463 1464 case MLO_AN_FIXED: 1465 phylink_get_fixed_state(pl, &link_state); 1466 break; 1467 1468 case MLO_AN_INBAND: 1469 link_state = pl->link_config; 1470 if (link_state.interface == PHY_INTERFACE_MODE_SGMII) 1471 link_state.pause = MLO_PAUSE_NONE; 1472 break; 1473 1474 default: /* can't happen */ 1475 return; 1476 } 1477 1478 link_state.link = false; 1479 1480 phylink_apply_manual_flow(pl, &link_state); 1481 if (phy) 1482 mutex_lock(&phy->lock); 1483 phylink_major_config(pl, force_restart, &link_state); 1484 if (phy) 1485 mutex_unlock(&phy->lock); 1486 } 1487 1488 static const char *phylink_pause_to_str(int pause) 1489 { 1490 switch (pause & MLO_PAUSE_TXRX_MASK) { 1491 case MLO_PAUSE_TX | MLO_PAUSE_RX: 1492 return "rx/tx"; 1493 case MLO_PAUSE_TX: 1494 return "tx"; 1495 case MLO_PAUSE_RX: 1496 return "rx"; 1497 default: 1498 return "off"; 1499 } 1500 } 1501 1502 static void phylink_deactivate_lpi(struct phylink *pl) 1503 { 1504 if (pl->mac_enable_tx_lpi) { 1505 pl->mac_enable_tx_lpi = false; 1506 1507 phylink_dbg(pl, "disabling LPI\n"); 1508 1509 pl->mac_ops->mac_disable_tx_lpi(pl->config); 1510 1511 phylink_pcs_disable_eee(pl->pcs); 1512 } 1513 } 1514 1515 static void phylink_activate_lpi(struct phylink *pl) 1516 { 1517 int err; 1518 1519 if (!test_bit(pl->cur_interface, pl->config->lpi_interfaces)) { 1520 phylink_dbg(pl, "MAC does not support LPI with %s\n", 1521 phy_modes(pl->cur_interface)); 1522 return; 1523 } 1524 1525 phylink_dbg(pl, "LPI timer %uus, tx clock stop %u\n", 1526 pl->mac_tx_lpi_timer, pl->mac_tx_clk_stop); 1527 1528 phylink_pcs_enable_eee(pl->pcs); 1529 1530 err = pl->mac_ops->mac_enable_tx_lpi(pl->config, pl->mac_tx_lpi_timer, 1531 pl->mac_tx_clk_stop); 1532 if (err) { 1533 phylink_pcs_disable_eee(pl->pcs); 1534 phylink_err(pl, "%ps() failed: %pe\n", 1535 pl->mac_ops->mac_enable_tx_lpi, ERR_PTR(err)); 1536 return; 1537 } 1538 1539 pl->mac_enable_tx_lpi = true; 1540 } 1541 1542 static void phylink_link_up(struct phylink *pl, 1543 struct phylink_link_state link_state) 1544 { 1545 struct net_device *ndev = pl->netdev; 1546 int speed, duplex; 1547 bool rx_pause; 1548 1549 speed = link_state.speed; 1550 duplex = link_state.duplex; 1551 rx_pause = !!(link_state.pause & MLO_PAUSE_RX); 1552 1553 switch (link_state.rate_matching) { 1554 case RATE_MATCH_PAUSE: 1555 /* The PHY is doing rate matchion from the media rate (in 1556 * the link_state) to the interface speed, and will send 1557 * pause frames to the MAC to limit its transmission speed. 1558 */ 1559 speed = phylink_interface_max_speed(link_state.interface); 1560 duplex = DUPLEX_FULL; 1561 rx_pause = true; 1562 break; 1563 1564 case RATE_MATCH_CRS: 1565 /* The PHY is doing rate matchion from the media rate (in 1566 * the link_state) to the interface speed, and will cause 1567 * collisions to the MAC to limit its transmission speed. 1568 */ 1569 speed = phylink_interface_max_speed(link_state.interface); 1570 duplex = DUPLEX_HALF; 1571 break; 1572 } 1573 1574 pl->cur_interface = link_state.interface; 1575 1576 phylink_pcs_link_up(pl->pcs, pl->pcs_neg_mode, pl->cur_interface, speed, 1577 duplex); 1578 1579 pl->mac_ops->mac_link_up(pl->config, pl->phydev, pl->act_link_an_mode, 1580 pl->cur_interface, speed, duplex, 1581 !!(link_state.pause & MLO_PAUSE_TX), rx_pause); 1582 1583 if (pl->mac_supports_eee && pl->phy_enable_tx_lpi) 1584 phylink_activate_lpi(pl); 1585 1586 if (ndev) 1587 netif_carrier_on(ndev); 1588 1589 phylink_info(pl, 1590 "Link is Up - %s/%s - flow control %s\n", 1591 phy_speed_to_str(link_state.speed), 1592 phy_duplex_to_str(link_state.duplex), 1593 phylink_pause_to_str(link_state.pause)); 1594 } 1595 1596 static void phylink_link_down(struct phylink *pl) 1597 { 1598 struct net_device *ndev = pl->netdev; 1599 1600 if (ndev) 1601 netif_carrier_off(ndev); 1602 1603 phylink_deactivate_lpi(pl); 1604 1605 pl->mac_ops->mac_link_down(pl->config, pl->act_link_an_mode, 1606 pl->cur_interface); 1607 phylink_info(pl, "Link is Down\n"); 1608 } 1609 1610 static bool phylink_link_is_up(struct phylink *pl) 1611 { 1612 return pl->netdev ? netif_carrier_ok(pl->netdev) : pl->old_link_state; 1613 } 1614 1615 static void phylink_resolve(struct work_struct *w) 1616 { 1617 struct phylink *pl = container_of(w, struct phylink, resolve); 1618 struct phylink_link_state link_state; 1619 bool mac_config = false; 1620 bool retrigger = false; 1621 struct phy_device *phy; 1622 bool cur_link_state; 1623 1624 mutex_lock(&pl->phydev_mutex); 1625 phy = pl->phydev; 1626 if (phy) 1627 mutex_lock(&phy->lock); 1628 mutex_lock(&pl->state_mutex); 1629 cur_link_state = phylink_link_is_up(pl); 1630 1631 if (pl->phylink_disable_state) { 1632 pl->link_failed = false; 1633 link_state = pl->link_config; 1634 link_state.link = false; 1635 } else if (pl->link_failed) { 1636 link_state = pl->link_config; 1637 link_state.link = false; 1638 retrigger = true; 1639 } else if (pl->act_link_an_mode == MLO_AN_FIXED) { 1640 phylink_get_fixed_state(pl, &link_state); 1641 mac_config = link_state.link; 1642 } else if (pl->act_link_an_mode == MLO_AN_PHY) { 1643 link_state = pl->phy_state; 1644 mac_config = link_state.link; 1645 } else { 1646 phylink_mac_pcs_get_state(pl, &link_state); 1647 1648 /* The PCS may have a latching link-fail indicator. If the link 1649 * was up, bring the link down and re-trigger the resolve. 1650 * Otherwise, re-read the PCS state to get the current status 1651 * of the link. 1652 */ 1653 if (!link_state.link) { 1654 if (cur_link_state) 1655 retrigger = true; 1656 else 1657 phylink_mac_pcs_get_state(pl, &link_state); 1658 } 1659 1660 /* If we have a phy, the "up" state is the union of both the 1661 * PHY and the MAC 1662 */ 1663 if (phy) 1664 link_state.link &= pl->phy_state.link; 1665 1666 /* Only update if the PHY link is up */ 1667 if (phy && pl->phy_state.link) { 1668 /* If the interface has changed, force a link down 1669 * event if the link isn't already down, and re-resolve. 1670 */ 1671 if (link_state.interface != pl->phy_state.interface) { 1672 retrigger = true; 1673 link_state.link = false; 1674 } 1675 1676 link_state.interface = pl->phy_state.interface; 1677 1678 /* If we are doing rate matching, then the link 1679 * speed/duplex comes from the PHY 1680 */ 1681 if (pl->phy_state.rate_matching) { 1682 link_state.rate_matching = 1683 pl->phy_state.rate_matching; 1684 link_state.speed = pl->phy_state.speed; 1685 link_state.duplex = pl->phy_state.duplex; 1686 } 1687 1688 /* If we have a PHY, we need to update with the PHY 1689 * flow control bits. 1690 */ 1691 link_state.pause = pl->phy_state.pause; 1692 mac_config = true; 1693 } 1694 } 1695 1696 if (pl->act_link_an_mode != MLO_AN_FIXED) 1697 phylink_apply_manual_flow(pl, &link_state); 1698 1699 if ((mac_config && link_state.interface != pl->link_config.interface) || 1700 pl->force_major_config) { 1701 /* The interface has changed or a forced major configuration 1702 * was requested, so force the link down and then reconfigure. 1703 */ 1704 if (cur_link_state) { 1705 phylink_link_down(pl); 1706 cur_link_state = false; 1707 } 1708 phylink_major_config(pl, false, &link_state); 1709 pl->link_config.interface = link_state.interface; 1710 pl->force_major_config = false; 1711 } 1712 1713 /* If configuration of the interface failed, force the link down 1714 * until we get a successful configuration. 1715 */ 1716 if (pl->major_config_failed) 1717 link_state.link = false; 1718 1719 if (link_state.link != cur_link_state) { 1720 pl->old_link_state = link_state.link; 1721 if (!link_state.link) 1722 phylink_link_down(pl); 1723 else 1724 phylink_link_up(pl, link_state); 1725 } 1726 if (!link_state.link && retrigger) { 1727 pl->link_failed = false; 1728 queue_work(system_power_efficient_wq, &pl->resolve); 1729 } 1730 mutex_unlock(&pl->state_mutex); 1731 if (phy) 1732 mutex_unlock(&phy->lock); 1733 mutex_unlock(&pl->phydev_mutex); 1734 } 1735 1736 static void phylink_run_resolve(struct phylink *pl) 1737 { 1738 if (!pl->phylink_disable_state) 1739 queue_work(system_power_efficient_wq, &pl->resolve); 1740 } 1741 1742 static void phylink_run_resolve_and_disable(struct phylink *pl, int bit) 1743 { 1744 unsigned long state = pl->phylink_disable_state; 1745 1746 set_bit(bit, &pl->phylink_disable_state); 1747 if (state == 0) { 1748 queue_work(system_power_efficient_wq, &pl->resolve); 1749 flush_work(&pl->resolve); 1750 } 1751 } 1752 1753 static void phylink_enable_and_run_resolve(struct phylink *pl, int bit) 1754 { 1755 clear_bit(bit, &pl->phylink_disable_state); 1756 phylink_run_resolve(pl); 1757 } 1758 1759 static void phylink_fixed_poll(struct timer_list *t) 1760 { 1761 struct phylink *pl = container_of(t, struct phylink, link_poll); 1762 1763 mod_timer(t, jiffies + HZ); 1764 1765 phylink_run_resolve(pl); 1766 } 1767 1768 static const struct sfp_upstream_ops sfp_phylink_ops; 1769 1770 static int phylink_register_sfp(struct phylink *pl, 1771 const struct fwnode_handle *fwnode) 1772 { 1773 struct sfp_bus *bus; 1774 int ret; 1775 1776 if (!fwnode) 1777 return 0; 1778 1779 bus = sfp_bus_find_fwnode(fwnode); 1780 if (IS_ERR(bus)) { 1781 phylink_err(pl, "unable to attach SFP bus: %pe\n", bus); 1782 return PTR_ERR(bus); 1783 } 1784 1785 pl->sfp_bus = bus; 1786 1787 ret = sfp_bus_add_upstream(bus, pl, &sfp_phylink_ops); 1788 sfp_bus_put(bus); 1789 1790 return ret; 1791 } 1792 1793 /** 1794 * phylink_set_fixed_link() - set the fixed link 1795 * @pl: a pointer to a &struct phylink returned from phylink_create() 1796 * @state: a pointer to a struct phylink_link_state. 1797 * 1798 * This function is used when the link parameters are known and do not change, 1799 * making it suitable for certain types of network connections. 1800 * 1801 * Returns: zero on success or negative error code. 1802 */ 1803 int phylink_set_fixed_link(struct phylink *pl, 1804 const struct phylink_link_state *state) 1805 { 1806 const struct link_capabilities *c; 1807 unsigned long *adv; 1808 1809 if (pl->cfg_link_an_mode != MLO_AN_PHY || !state || 1810 !test_bit(PHYLINK_DISABLE_STOPPED, &pl->phylink_disable_state)) 1811 return -EINVAL; 1812 1813 c = phy_caps_lookup(state->speed, state->duplex, 1814 pl->supported, true); 1815 if (!c) 1816 return -EINVAL; 1817 1818 adv = pl->link_config.advertising; 1819 linkmode_and(adv, pl->supported, c->linkmodes); 1820 linkmode_set_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, adv); 1821 1822 pl->link_config.speed = state->speed; 1823 pl->link_config.duplex = state->duplex; 1824 pl->link_config.link = 1; 1825 pl->link_config.an_complete = 1; 1826 1827 pl->cfg_link_an_mode = MLO_AN_FIXED; 1828 pl->req_link_an_mode = pl->cfg_link_an_mode; 1829 1830 return 0; 1831 } 1832 EXPORT_SYMBOL_GPL(phylink_set_fixed_link); 1833 1834 /** 1835 * phylink_update_pause_state() - Update the phylink pause frame configuration 1836 * @pl: a pointer to a &struct phylink instance 1837 * @pause_state: bitmask indicating the new pause state 1838 * 1839 * Update the MAC pause frame (flow control) state for the phylink instance. 1840 */ 1841 static void phylink_update_pause_state(struct phylink *pl, int pause_state) 1842 { 1843 struct phylink_link_state *config = &pl->link_config; 1844 bool tx_pause = !!(pause_state & MLO_PAUSE_TX); 1845 bool rx_pause = !!(pause_state & MLO_PAUSE_RX); 1846 bool manual_changed; 1847 1848 mutex_lock(&pl->state_mutex); 1849 1850 /* 1851 * See the comments for linkmode_set_pause(), wrt the deficiencies 1852 * with the current implementation. A solution to this issue would 1853 * be: 1854 * ethtool Local device 1855 * rx tx Pause AsymDir 1856 * 0 0 0 0 1857 * 1 0 1 1 1858 * 0 1 0 1 1859 * 1 1 1 1 1860 * and then use the ethtool rx/tx enablement status to mask the 1861 * rx/tx pause resolution. 1862 */ 1863 linkmode_set_pause(config->advertising, tx_pause, 1864 rx_pause); 1865 1866 manual_changed = (config->pause ^ pause_state) & MLO_PAUSE_AN || 1867 (!(pause_state & MLO_PAUSE_AN) && 1868 (config->pause ^ pause_state) & MLO_PAUSE_TXRX_MASK); 1869 1870 config->pause = pause_state; 1871 1872 /* Update our in-band advertisement, triggering a renegotiation if 1873 * the advertisement changed. 1874 */ 1875 if (!pl->phydev) 1876 phylink_change_inband_advert(pl); 1877 1878 mutex_unlock(&pl->state_mutex); 1879 1880 /* If we have a PHY, a change of the pause frame advertisement will 1881 * cause phylib to renegotiate (if AN is enabled) which will in turn 1882 * call our phylink_phy_change() and trigger a resolve. Note that 1883 * we can't hold our state mutex while calling phy_set_asym_pause(). 1884 */ 1885 if (pl->phydev) 1886 phy_set_asym_pause(pl->phydev, rx_pause, tx_pause); 1887 1888 /* If the manual pause settings changed, make sure we trigger a 1889 * resolve to update their state; we can not guarantee that the 1890 * link will cycle. 1891 */ 1892 if (manual_changed) { 1893 pl->link_failed = true; 1894 phylink_run_resolve(pl); 1895 } 1896 } 1897 1898 /** 1899 * phylink_update_mac_pause_capabilities() - Dynamically update MAC pause 1900 * @pl: a pointer to a &struct phylink returned from phylink_create() 1901 * @mac_pause: the new MAC pause capabilities mask 1902 * 1903 * This function allows a MAC driver to dynamically change its pause state, 1904 * such as losing/gaining Pause frame support based on MTU size. 1905 * It recalculates supported link modes and triggers renegotiation if needed. 1906 */ 1907 void phylink_update_mac_pause_capabilities(struct phylink *pl, unsigned long mac_pause) 1908 { 1909 struct phylink_link_state *config = &pl->link_config; 1910 unsigned long old_pause; 1911 int pause_state; 1912 1913 ASSERT_RTNL(); 1914 1915 if (mac_pause & ~(MAC_SYM_PAUSE | MAC_ASYM_PAUSE)) { 1916 phylink_err(pl, "Attempted to dynamically change non-pause MAC capabilities\n"); 1917 return; 1918 } 1919 1920 old_pause = pl->config->mac_capabilities & (MAC_SYM_PAUSE | MAC_ASYM_PAUSE); 1921 if (old_pause == mac_pause) 1922 return; 1923 1924 mutex_lock(&pl->state_mutex); 1925 1926 pl->config->mac_capabilities &= ~(MAC_SYM_PAUSE | MAC_ASYM_PAUSE); 1927 pl->config->mac_capabilities |= mac_pause; 1928 1929 phylink_set(pl->supported, Pause); 1930 phylink_set(pl->supported, Asym_Pause); 1931 1932 if (pl->phydev) 1933 linkmode_and(pl->supported, pl->supported, pl->phydev->supported); 1934 else if (pl->sfp_bus) 1935 linkmode_and(pl->supported, pl->supported, pl->sfp_support); 1936 1937 phylink_validate(pl, pl->supported, config); 1938 1939 pause_state = config->pause; 1940 1941 if (!phylink_test(pl->supported, Pause)) { 1942 pause_state &= ~(MLO_PAUSE_RX | MLO_PAUSE_TX); 1943 } else if (!phylink_test(pl->supported, Asym_Pause)) { 1944 if ((pause_state & MLO_PAUSE_RX) ^ (pause_state & MLO_PAUSE_TX)) 1945 pause_state &= ~(MLO_PAUSE_RX | MLO_PAUSE_TX); 1946 } 1947 1948 mutex_unlock(&pl->state_mutex); 1949 1950 phylink_update_pause_state(pl, pause_state); 1951 } 1952 EXPORT_SYMBOL_GPL(phylink_update_mac_pause_capabilities); 1953 1954 /** 1955 * phylink_create() - create a phylink instance 1956 * @config: a pointer to the target &struct phylink_config 1957 * @fwnode: a pointer to a &struct fwnode_handle describing the network 1958 * interface 1959 * @iface: the desired link mode defined by &typedef phy_interface_t 1960 * @mac_ops: a pointer to a &struct phylink_mac_ops for the MAC. 1961 * 1962 * Create a new phylink instance, and parse the link parameters found in @np. 1963 * This will parse in-band modes, fixed-link or SFP configuration. 1964 * 1965 * Note: the rtnl lock must not be held when calling this function. 1966 * 1967 * Returns a pointer to a &struct phylink, or an error-pointer value. Users 1968 * must use IS_ERR() to check for errors from this function. 1969 */ 1970 struct phylink *phylink_create(struct phylink_config *config, 1971 const struct fwnode_handle *fwnode, 1972 phy_interface_t iface, 1973 const struct phylink_mac_ops *mac_ops) 1974 { 1975 struct phylink *pl; 1976 int ret; 1977 1978 /* Validate the supplied configuration */ 1979 if (phy_interface_empty(config->supported_interfaces)) { 1980 dev_err(config->dev, 1981 "phylink: error: empty supported_interfaces\n"); 1982 return ERR_PTR(-EINVAL); 1983 } 1984 1985 pl = kzalloc_obj(*pl); 1986 if (!pl) 1987 return ERR_PTR(-ENOMEM); 1988 1989 mutex_init(&pl->phydev_mutex); 1990 mutex_init(&pl->state_mutex); 1991 INIT_WORK(&pl->resolve, phylink_resolve); 1992 1993 pl->config = config; 1994 if (config->type == PHYLINK_NETDEV) { 1995 pl->netdev = to_net_dev(config->dev); 1996 netif_carrier_off(pl->netdev); 1997 } else if (config->type == PHYLINK_DEV) { 1998 pl->dev = config->dev; 1999 } else { 2000 ret = -EINVAL; 2001 goto free_pl; 2002 } 2003 2004 pl->mac_supports_eee_ops = phylink_mac_implements_lpi(mac_ops); 2005 pl->mac_supports_eee = pl->mac_supports_eee_ops && 2006 pl->config->lpi_capabilities && 2007 !phy_interface_empty(pl->config->lpi_interfaces); 2008 2009 /* Set the default EEE configuration */ 2010 pl->eee_cfg.eee_enabled = pl->config->eee_enabled_default; 2011 pl->eee_cfg.tx_lpi_enabled = pl->eee_cfg.eee_enabled; 2012 pl->eee_cfg.tx_lpi_timer = pl->config->lpi_timer_default; 2013 2014 pl->phy_state.interface = iface; 2015 pl->link_interface = iface; 2016 if (iface == PHY_INTERFACE_MODE_MOCA) 2017 pl->link_port = PORT_BNC; 2018 else 2019 pl->link_port = PORT_MII; 2020 pl->link_config.interface = iface; 2021 pl->link_config.pause = MLO_PAUSE_AN; 2022 pl->link_config.speed = SPEED_UNKNOWN; 2023 pl->link_config.duplex = DUPLEX_UNKNOWN; 2024 pl->pcs_state = PCS_STATE_DOWN; 2025 pl->mac_ops = mac_ops; 2026 __set_bit(PHYLINK_DISABLE_STOPPED, &pl->phylink_disable_state); 2027 timer_setup(&pl->link_poll, phylink_fixed_poll, 0); 2028 2029 linkmode_fill(pl->supported); 2030 linkmode_copy(pl->link_config.advertising, pl->supported); 2031 phylink_validate(pl, pl->supported, &pl->link_config); 2032 2033 ret = phylink_parse_mode(pl, fwnode); 2034 if (ret < 0) 2035 goto free_pl; 2036 2037 if (pl->cfg_link_an_mode == MLO_AN_FIXED) { 2038 ret = phylink_parse_fixedlink(pl, fwnode); 2039 if (ret < 0) 2040 goto release_link_gpio; 2041 } 2042 2043 pl->req_link_an_mode = pl->cfg_link_an_mode; 2044 2045 ret = phylink_register_sfp(pl, fwnode); 2046 if (ret < 0) 2047 goto release_link_gpio; 2048 2049 return pl; 2050 2051 release_link_gpio: 2052 if (pl->link_gpio) 2053 gpiod_put(pl->link_gpio); 2054 free_pl: 2055 kfree(pl); 2056 return ERR_PTR(ret); 2057 } 2058 EXPORT_SYMBOL_GPL(phylink_create); 2059 2060 /** 2061 * phylink_destroy() - cleanup and destroy the phylink instance 2062 * @pl: a pointer to a &struct phylink returned from phylink_create() 2063 * 2064 * Destroy a phylink instance. Any PHY that has been attached must have been 2065 * cleaned up via phylink_disconnect_phy() prior to calling this function. 2066 * 2067 * Note: the rtnl lock must not be held when calling this function. 2068 */ 2069 void phylink_destroy(struct phylink *pl) 2070 { 2071 sfp_bus_del_upstream(pl->sfp_bus); 2072 if (pl->link_gpio) 2073 gpiod_put(pl->link_gpio); 2074 2075 cancel_work_sync(&pl->resolve); 2076 kfree(pl); 2077 } 2078 EXPORT_SYMBOL_GPL(phylink_destroy); 2079 2080 /** 2081 * phylink_expects_phy() - Determine if phylink expects a phy to be attached 2082 * @pl: a pointer to a &struct phylink returned from phylink_create() 2083 * 2084 * When using fixed-link mode, or in-band mode with 1000base-X or 2500base-X, 2085 * no PHY is needed. 2086 * 2087 * Returns true if phylink will be expecting a PHY. 2088 */ 2089 bool phylink_expects_phy(struct phylink *pl) 2090 { 2091 if (pl->cfg_link_an_mode == MLO_AN_FIXED) 2092 return false; 2093 return true; 2094 } 2095 EXPORT_SYMBOL_GPL(phylink_expects_phy); 2096 2097 static void phylink_phy_change(struct phy_device *phydev, bool up) 2098 { 2099 struct phylink *pl = phydev->phylink; 2100 bool tx_pause, rx_pause; 2101 2102 phy_get_pause(phydev, &tx_pause, &rx_pause); 2103 2104 mutex_lock(&pl->state_mutex); 2105 pl->phy_state.speed = phydev->speed; 2106 pl->phy_state.duplex = phydev->duplex; 2107 pl->phy_state.rate_matching = phydev->rate_matching; 2108 pl->phy_state.pause = MLO_PAUSE_NONE; 2109 if (tx_pause) 2110 pl->phy_state.pause |= MLO_PAUSE_TX; 2111 if (rx_pause) 2112 pl->phy_state.pause |= MLO_PAUSE_RX; 2113 pl->phy_state.interface = phydev->interface; 2114 pl->phy_state.link = up; 2115 if (!up) 2116 pl->link_failed = true; 2117 2118 /* Get the LPI state from phylib */ 2119 pl->phy_enable_tx_lpi = phydev->enable_tx_lpi; 2120 pl->mac_tx_lpi_timer = phydev->eee_cfg.tx_lpi_timer; 2121 mutex_unlock(&pl->state_mutex); 2122 2123 phylink_run_resolve(pl); 2124 2125 phylink_dbg(pl, "phy link %s %s/%s/%s/%s/%s/%slpi\n", 2126 up ? "up" : "down", 2127 phy_modes(phydev->interface), 2128 phy_speed_to_str(phydev->speed), 2129 phy_duplex_to_str(phydev->duplex), 2130 phy_rate_matching_to_str(phydev->rate_matching), 2131 phylink_pause_to_str(pl->phy_state.pause), 2132 phydev->enable_tx_lpi ? "" : "no"); 2133 } 2134 2135 static int phylink_validate_phy(struct phylink *pl, struct phy_device *phy, 2136 unsigned long *supported, 2137 struct phylink_link_state *state) 2138 { 2139 DECLARE_PHY_INTERFACE_MASK(interfaces); 2140 2141 /* If the PHY provides a bitmap of the interfaces it will be using 2142 * depending on the negotiated media speeds, use this to validate 2143 * which ethtool link modes can be used. 2144 */ 2145 if (!phy_interface_empty(phy->possible_interfaces)) { 2146 /* We only care about the union of the PHY's interfaces and 2147 * those which the host supports. 2148 */ 2149 phy_interface_and(interfaces, phy->possible_interfaces, 2150 pl->config->supported_interfaces); 2151 2152 if (phy_interface_empty(interfaces)) { 2153 phylink_err(pl, "PHY has no common interfaces\n"); 2154 return -EINVAL; 2155 } 2156 2157 if (phy_on_sfp(phy)) { 2158 /* If the PHY is on a SFP, limit the interfaces to 2159 * those that can be used with a SFP module. 2160 */ 2161 phy_interface_and(interfaces, interfaces, 2162 phylink_sfp_interfaces); 2163 2164 if (phy_interface_empty(interfaces)) { 2165 phylink_err(pl, "SFP PHY's possible interfaces becomes empty\n"); 2166 return -EINVAL; 2167 } 2168 } 2169 2170 phylink_dbg(pl, "PHY %s uses interfaces %*pbl, validating %*pbl\n", 2171 phydev_name(phy), 2172 (int)PHY_INTERFACE_MODE_MAX, 2173 phy->possible_interfaces, 2174 (int)PHY_INTERFACE_MODE_MAX, interfaces); 2175 2176 return phylink_validate_mask(pl, phy, supported, state, 2177 interfaces); 2178 } 2179 2180 phylink_dbg(pl, "PHY %s doesn't supply possible interfaces\n", 2181 phydev_name(phy)); 2182 2183 /* Check whether we would use rate matching for the proposed interface 2184 * mode. 2185 */ 2186 state->rate_matching = phy_get_rate_matching(phy, state->interface); 2187 2188 /* Clause 45 PHYs may switch their Serdes lane between, e.g. 10GBASE-R, 2189 * 5GBASE-R, 2500BASE-X and SGMII if they are not using rate matching. 2190 * For some interface modes (e.g. RXAUI, XAUI and USXGMII) switching 2191 * their Serdes is either unnecessary or not reasonable. 2192 * 2193 * For these which switch interface modes, we really need to know which 2194 * interface modes the PHY supports to properly work out which ethtool 2195 * linkmodes can be supported. For now, as a work-around, we validate 2196 * against all interface modes, which may lead to more ethtool link 2197 * modes being advertised than are actually supported. 2198 */ 2199 if (phy->is_c45 && state->rate_matching == RATE_MATCH_NONE && 2200 state->interface != PHY_INTERFACE_MODE_RXAUI && 2201 state->interface != PHY_INTERFACE_MODE_XAUI && 2202 state->interface != PHY_INTERFACE_MODE_USXGMII) 2203 state->interface = PHY_INTERFACE_MODE_NA; 2204 2205 return phylink_validate(pl, supported, state); 2206 } 2207 2208 static int phylink_bringup_phy(struct phylink *pl, struct phy_device *phy, 2209 phy_interface_t interface) 2210 { 2211 struct phylink_link_state config; 2212 __ETHTOOL_DECLARE_LINK_MODE_MASK(supported); 2213 char *irq_str; 2214 int ret; 2215 2216 /* 2217 * This is the new way of dealing with flow control for PHYs, 2218 * as described by Timur Tabi in commit 529ed1275263 ("net: phy: 2219 * phy drivers should not set SUPPORTED_[Asym_]Pause"). MAC drivers 2220 * set their support using the MAC_SYM_PAUSE and MAC_ASYM_PAUSE 2221 * capabilities and must NOT change the phy's pause settings directly. 2222 */ 2223 phy_support_asym_pause(phy); 2224 2225 memset(&config, 0, sizeof(config)); 2226 linkmode_copy(supported, phy->supported); 2227 linkmode_copy(config.advertising, phy->advertising); 2228 config.interface = interface; 2229 2230 ret = phylink_validate_phy(pl, phy, supported, &config); 2231 if (ret) { 2232 phylink_warn(pl, "validation of %s with support %*pb and advertisement %*pb failed: %pe\n", 2233 phy_modes(config.interface), 2234 __ETHTOOL_LINK_MODE_MASK_NBITS, phy->supported, 2235 __ETHTOOL_LINK_MODE_MASK_NBITS, config.advertising, 2236 ERR_PTR(ret)); 2237 return ret; 2238 } 2239 2240 phy->phylink = pl; 2241 phy->phy_link_change = phylink_phy_change; 2242 2243 irq_str = phy_attached_info_irq(phy); 2244 phylink_info(pl, 2245 "PHY [%s] driver [%s] (irq=%s)\n", 2246 dev_name(&phy->mdio.dev), phy->drv->name, irq_str); 2247 kfree(irq_str); 2248 2249 mutex_lock(&pl->phydev_mutex); 2250 mutex_lock(&phy->lock); 2251 mutex_lock(&pl->state_mutex); 2252 pl->phy_state.interface = interface; 2253 pl->phy_state.pause = MLO_PAUSE_NONE; 2254 pl->phy_state.speed = SPEED_UNKNOWN; 2255 pl->phy_state.duplex = DUPLEX_UNKNOWN; 2256 pl->phy_state.rate_matching = RATE_MATCH_NONE; 2257 linkmode_copy(pl->supported, supported); 2258 linkmode_copy(pl->link_config.advertising, config.advertising); 2259 2260 /* Restrict the phy advertisement according to the MAC support. */ 2261 linkmode_copy(phy->advertising, config.advertising); 2262 2263 /* If the MAC supports phylink managed EEE, restrict the EEE 2264 * advertisement according to the MAC's LPI capabilities. 2265 */ 2266 if (pl->mac_supports_eee) { 2267 /* If EEE is enabled, then we need to call phy_support_eee() 2268 * to ensure that the advertising mask is appropriately set. 2269 * This also enables EEE at the PHY. 2270 */ 2271 if (pl->eee_cfg.eee_enabled) 2272 phy_support_eee(phy); 2273 2274 phy->eee_cfg.tx_lpi_enabled = pl->eee_cfg.tx_lpi_enabled; 2275 phy->eee_cfg.tx_lpi_timer = pl->eee_cfg.tx_lpi_timer; 2276 2277 /* Convert the MAC's LPI capabilities to linkmodes */ 2278 linkmode_zero(pl->supported_lpi); 2279 phylink_caps_to_linkmodes(pl->supported_lpi, 2280 pl->config->lpi_capabilities); 2281 2282 /* Restrict the PHYs EEE support/advertisement to the modes 2283 * that the MAC supports. 2284 */ 2285 linkmode_and(phy->advertising_eee, phy->advertising_eee, 2286 pl->supported_lpi); 2287 } else if (pl->mac_supports_eee_ops) { 2288 /* MAC supports phylink EEE, but wants EEE always disabled. */ 2289 phy_disable_eee(phy); 2290 } 2291 2292 mutex_unlock(&pl->state_mutex); 2293 mutex_unlock(&phy->lock); 2294 mutex_unlock(&pl->phydev_mutex); 2295 2296 phylink_dbg(pl, 2297 "phy: %s setting supported %*pb advertising %*pb\n", 2298 phy_modes(interface), 2299 __ETHTOOL_LINK_MODE_MASK_NBITS, pl->supported, 2300 __ETHTOOL_LINK_MODE_MASK_NBITS, phy->advertising); 2301 2302 if (pl->config->mac_managed_pm) 2303 phy->mac_managed_pm = true; 2304 2305 /* Allow the MAC to stop its clock if the PHY has the capability */ 2306 pl->mac_tx_clk_stop = phy_eee_tx_clock_stop_capable(phy) > 0; 2307 2308 if (pl->mac_supports_eee_ops) { 2309 /* Explicitly configure whether the PHY is allowed to stop it's 2310 * receive clock. 2311 */ 2312 ret = phy_eee_rx_clock_stop(phy, 2313 pl->config->eee_rx_clk_stop_enable); 2314 if (ret == -EOPNOTSUPP) 2315 ret = 0; 2316 } 2317 2318 if (ret) 2319 return ret; 2320 2321 /* Nothing below can fail, so the PHY can be recorded now. Doing it 2322 * here rather than above keeps a failed bringup from leaving 2323 * pl->phydev pointing at a PHY the caller is about to detach. 2324 */ 2325 mutex_lock(&pl->phydev_mutex); 2326 mutex_lock(&phy->lock); 2327 mutex_lock(&pl->state_mutex); 2328 pl->phydev = phy; 2329 mutex_unlock(&pl->state_mutex); 2330 mutex_unlock(&phy->lock); 2331 mutex_unlock(&pl->phydev_mutex); 2332 2333 if (phy_interrupt_is_valid(phy)) 2334 phy_request_interrupt(phy); 2335 2336 return 0; 2337 } 2338 2339 static int phylink_attach_phy(struct phylink *pl, struct phy_device *phy, 2340 phy_interface_t interface) 2341 { 2342 u32 flags = 0; 2343 2344 if (WARN_ON(pl->cfg_link_an_mode == MLO_AN_FIXED)) 2345 return -EINVAL; 2346 2347 if (pl->phydev) 2348 return -EBUSY; 2349 2350 if (pl->config->mac_requires_rxc) 2351 flags |= PHY_F_RXC_ALWAYS_ON; 2352 2353 return phy_attach_direct(pl->netdev, phy, flags, interface); 2354 } 2355 2356 /** 2357 * phylink_connect_phy() - connect a PHY to the phylink instance 2358 * @pl: a pointer to a &struct phylink returned from phylink_create() 2359 * @phy: a pointer to a &struct phy_device. 2360 * 2361 * Connect @phy to the phylink instance specified by @pl by calling 2362 * phy_attach_direct(). Configure the @phy according to the MAC driver's 2363 * capabilities, start the PHYLIB state machine and enable any interrupts 2364 * that the PHY supports. 2365 * 2366 * This updates the phylink's ethtool supported and advertising link mode 2367 * masks. 2368 * 2369 * Returns 0 on success or a negative errno. 2370 */ 2371 int phylink_connect_phy(struct phylink *pl, struct phy_device *phy) 2372 { 2373 int ret; 2374 2375 /* Use PHY device/driver interface */ 2376 if (pl->link_interface == PHY_INTERFACE_MODE_NA) { 2377 pl->link_interface = phy->interface; 2378 pl->link_config.interface = pl->link_interface; 2379 } 2380 2381 ret = phylink_attach_phy(pl, phy, pl->link_interface); 2382 if (ret < 0) 2383 return ret; 2384 2385 ret = phylink_bringup_phy(pl, phy, pl->link_config.interface); 2386 if (ret) 2387 phy_detach(phy); 2388 2389 return ret; 2390 } 2391 EXPORT_SYMBOL_GPL(phylink_connect_phy); 2392 2393 /** 2394 * phylink_of_phy_connect() - connect the PHY specified in the DT mode. 2395 * @pl: a pointer to a &struct phylink returned from phylink_create() 2396 * @dn: a pointer to a &struct device_node. 2397 * @flags: PHY-specific flags to communicate to the PHY device driver 2398 * 2399 * Connect the phy specified in the device node @dn to the phylink instance 2400 * specified by @pl. Actions specified in phylink_connect_phy() will be 2401 * performed. 2402 * 2403 * Returns 0 on success or a negative errno. 2404 */ 2405 int phylink_of_phy_connect(struct phylink *pl, struct device_node *dn, 2406 u32 flags) 2407 { 2408 return phylink_fwnode_phy_connect(pl, of_fwnode_handle(dn), flags); 2409 } 2410 EXPORT_SYMBOL_GPL(phylink_of_phy_connect); 2411 2412 /** 2413 * phylink_fwnode_phy_connect() - connect the PHY specified in the fwnode. 2414 * @pl: a pointer to a &struct phylink returned from phylink_create() 2415 * @fwnode: a pointer to a &struct fwnode_handle. 2416 * @flags: PHY-specific flags to communicate to the PHY device driver 2417 * 2418 * Connect the phy specified @fwnode to the phylink instance specified 2419 * by @pl. 2420 * 2421 * Returns 0 on success or a negative errno. 2422 */ 2423 int phylink_fwnode_phy_connect(struct phylink *pl, 2424 const struct fwnode_handle *fwnode, 2425 u32 flags) 2426 { 2427 struct fwnode_handle *phy_fwnode; 2428 struct phy_device *phy_dev; 2429 int ret; 2430 2431 if (!phylink_expects_phy(pl)) 2432 return 0; 2433 2434 phy_fwnode = fwnode_get_phy_node(fwnode); 2435 if (IS_ERR(phy_fwnode)) { 2436 /* PHY mode requires a PHY to be specified. */ 2437 if (pl->cfg_link_an_mode == MLO_AN_PHY) 2438 return -ENODEV; 2439 return 0; 2440 } 2441 2442 phy_dev = fwnode_phy_find_device(phy_fwnode); 2443 /* We're done with the phy_node handle */ 2444 fwnode_handle_put(phy_fwnode); 2445 if (!phy_dev) 2446 return -ENODEV; 2447 2448 /* Use PHY device/driver interface */ 2449 if (pl->link_interface == PHY_INTERFACE_MODE_NA) { 2450 pl->link_interface = phy_dev->interface; 2451 pl->link_config.interface = pl->link_interface; 2452 } 2453 2454 if (pl->config->mac_requires_rxc) 2455 flags |= PHY_F_RXC_ALWAYS_ON; 2456 2457 ret = phy_attach_direct(pl->netdev, phy_dev, flags, 2458 pl->link_interface); 2459 phy_device_free(phy_dev); 2460 if (ret) 2461 return ret; 2462 2463 ret = phylink_bringup_phy(pl, phy_dev, pl->link_config.interface); 2464 if (ret) 2465 phy_detach(phy_dev); 2466 2467 return ret; 2468 } 2469 EXPORT_SYMBOL_GPL(phylink_fwnode_phy_connect); 2470 2471 /** 2472 * phylink_disconnect_phy() - disconnect any PHY attached to the phylink 2473 * instance. 2474 * @pl: a pointer to a &struct phylink returned from phylink_create() 2475 * 2476 * Disconnect any current PHY from the phylink instance described by @pl. 2477 */ 2478 void phylink_disconnect_phy(struct phylink *pl) 2479 { 2480 struct phy_device *phy; 2481 2482 ASSERT_RTNL(); 2483 2484 mutex_lock(&pl->phydev_mutex); 2485 phy = pl->phydev; 2486 if (phy) { 2487 mutex_lock(&phy->lock); 2488 mutex_lock(&pl->state_mutex); 2489 pl->phydev = NULL; 2490 pl->phy_enable_tx_lpi = false; 2491 pl->mac_tx_clk_stop = false; 2492 mutex_unlock(&pl->state_mutex); 2493 mutex_unlock(&phy->lock); 2494 } 2495 mutex_unlock(&pl->phydev_mutex); 2496 2497 if (phy) { 2498 flush_work(&pl->resolve); 2499 phy_disconnect(phy); 2500 } 2501 } 2502 EXPORT_SYMBOL_GPL(phylink_disconnect_phy); 2503 2504 static void phylink_link_changed(struct phylink *pl, bool up, const char *what) 2505 { 2506 if (!up) 2507 pl->link_failed = true; 2508 phylink_run_resolve(pl); 2509 phylink_dbg(pl, "%s link %s\n", what, up ? "up" : "down"); 2510 } 2511 2512 /** 2513 * phylink_mac_change() - notify phylink of a change in MAC state 2514 * @pl: a pointer to a &struct phylink returned from phylink_create() 2515 * @up: indicates whether the link is currently up. 2516 * 2517 * The MAC driver should call this driver when the state of its link 2518 * changes (eg, link failure, new negotiation results, etc.) 2519 */ 2520 void phylink_mac_change(struct phylink *pl, bool up) 2521 { 2522 phylink_link_changed(pl, up, "mac"); 2523 } 2524 EXPORT_SYMBOL_GPL(phylink_mac_change); 2525 2526 /** 2527 * phylink_pcs_change() - notify phylink of a change to PCS link state 2528 * @pcs: pointer to &struct phylink_pcs 2529 * @up: indicates whether the link is currently up. 2530 * 2531 * The PCS driver should call this when the state of its link changes 2532 * (e.g. link failure, new negotiation results, etc.) Note: it should 2533 * not determine "up" by reading the BMSR. If in doubt about the link 2534 * state at interrupt time, then pass true if pcs_get_state() returns 2535 * the latched link-down state, otherwise pass false. 2536 */ 2537 void phylink_pcs_change(struct phylink_pcs *pcs, bool up) 2538 { 2539 struct phylink *pl = pcs->phylink; 2540 2541 if (pl) 2542 phylink_link_changed(pl, up, "pcs"); 2543 } 2544 EXPORT_SYMBOL_GPL(phylink_pcs_change); 2545 2546 static irqreturn_t phylink_link_handler(int irq, void *data) 2547 { 2548 struct phylink *pl = data; 2549 2550 phylink_run_resolve(pl); 2551 2552 return IRQ_HANDLED; 2553 } 2554 2555 /** 2556 * phylink_start() - start a phylink instance 2557 * @pl: a pointer to a &struct phylink returned from phylink_create() 2558 * 2559 * Start the phylink instance specified by @pl, configuring the MAC for the 2560 * desired link mode(s) and negotiation style. This should be called from the 2561 * network device driver's &struct net_device_ops ndo_open() method. 2562 */ 2563 void phylink_start(struct phylink *pl) 2564 { 2565 bool poll = false; 2566 2567 ASSERT_RTNL(); 2568 2569 phylink_info(pl, "configuring for %s/%s link mode\n", 2570 phylink_an_mode_str(pl->req_link_an_mode), 2571 phy_modes(pl->link_config.interface)); 2572 2573 /* Always set the carrier off */ 2574 if (pl->netdev) 2575 netif_carrier_off(pl->netdev); 2576 2577 pl->pcs_state = PCS_STATE_STARTING; 2578 2579 /* Apply the link configuration to the MAC when starting. This allows 2580 * a fixed-link to start with the correct parameters, and also 2581 * ensures that we set the appropriate advertisement for Serdes links. 2582 * 2583 * Restart autonegotiation if using 802.3z to ensure that the link 2584 * parameters are properly negotiated. This is necessary for DSA 2585 * switches using 802.3z negotiation to ensure they see our modes. 2586 */ 2587 phylink_mac_initial_config(pl, true); 2588 2589 pl->pcs_state = PCS_STATE_STARTED; 2590 2591 phylink_enable_and_run_resolve(pl, PHYLINK_DISABLE_STOPPED); 2592 2593 if (pl->cfg_link_an_mode == MLO_AN_FIXED && pl->link_gpio) { 2594 int irq = gpiod_to_irq(pl->link_gpio); 2595 2596 if (irq > 0) { 2597 if (!request_irq(irq, phylink_link_handler, 2598 IRQF_TRIGGER_RISING | 2599 IRQF_TRIGGER_FALLING, 2600 "netdev link", pl)) 2601 pl->link_irq = irq; 2602 else 2603 irq = 0; 2604 } 2605 if (irq <= 0) 2606 poll = true; 2607 } 2608 2609 if (pl->cfg_link_an_mode == MLO_AN_FIXED) 2610 poll |= pl->config->poll_fixed_state; 2611 2612 if (poll) 2613 mod_timer(&pl->link_poll, jiffies + HZ); 2614 if (pl->phydev) 2615 phy_start(pl->phydev); 2616 if (pl->sfp_bus) 2617 sfp_upstream_start(pl->sfp_bus); 2618 } 2619 EXPORT_SYMBOL_GPL(phylink_start); 2620 2621 /** 2622 * phylink_stop() - stop a phylink instance 2623 * @pl: a pointer to a &struct phylink returned from phylink_create() 2624 * 2625 * Stop the phylink instance specified by @pl. This should be called from the 2626 * network device driver's &struct net_device_ops ndo_stop() method. The 2627 * network device's carrier state should not be changed prior to calling this 2628 * function. 2629 * 2630 * This will synchronously bring down the link if the link is not already 2631 * down (in other words, it will trigger a mac_link_down() method call.) 2632 */ 2633 void phylink_stop(struct phylink *pl) 2634 { 2635 ASSERT_RTNL(); 2636 2637 if (pl->sfp_bus) 2638 sfp_upstream_stop(pl->sfp_bus); 2639 if (pl->phydev) 2640 phy_stop(pl->phydev); 2641 timer_delete_sync(&pl->link_poll); 2642 if (pl->link_irq) { 2643 free_irq(pl->link_irq, pl); 2644 pl->link_irq = 0; 2645 } 2646 2647 phylink_run_resolve_and_disable(pl, PHYLINK_DISABLE_STOPPED); 2648 2649 pl->pcs_state = PCS_STATE_DOWN; 2650 2651 phylink_pcs_disable(pl->pcs); 2652 } 2653 EXPORT_SYMBOL_GPL(phylink_stop); 2654 2655 /** 2656 * phylink_rx_clk_stop_block() - block PHY ability to stop receive clock in LPI 2657 * @pl: a pointer to a &struct phylink returned from phylink_create() 2658 * 2659 * Disable the PHY's ability to stop the receive clock while the receive path 2660 * is in EEE LPI state, until the number of calls to phylink_rx_clk_stop_block() 2661 * are balanced by calls to phylink_rx_clk_stop_unblock(). 2662 */ 2663 void phylink_rx_clk_stop_block(struct phylink *pl) 2664 { 2665 ASSERT_RTNL(); 2666 2667 if (pl->mac_rx_clk_stop_blocked == U8_MAX) { 2668 phylink_warn(pl, "%s called too many times - ignoring\n", 2669 __func__); 2670 dump_stack(); 2671 return; 2672 } 2673 2674 /* Disable PHY receive clock stop if this is the first time this 2675 * function has been called and clock-stop was previously enabled. 2676 */ 2677 if (pl->mac_rx_clk_stop_blocked++ == 0 && 2678 pl->mac_supports_eee_ops && pl->phydev && 2679 pl->config->eee_rx_clk_stop_enable) 2680 phy_eee_rx_clock_stop(pl->phydev, false); 2681 } 2682 EXPORT_SYMBOL_GPL(phylink_rx_clk_stop_block); 2683 2684 /** 2685 * phylink_rx_clk_stop_unblock() - unblock PHY ability to stop receive clock 2686 * @pl: a pointer to a &struct phylink returned from phylink_create() 2687 * 2688 * All calls to phylink_rx_clk_stop_block() must be balanced with a 2689 * corresponding call to phylink_rx_clk_stop_unblock() to restore the PHYs 2690 * ability to stop the receive clock when the receive path is in EEE LPI mode. 2691 */ 2692 void phylink_rx_clk_stop_unblock(struct phylink *pl) 2693 { 2694 ASSERT_RTNL(); 2695 2696 if (pl->mac_rx_clk_stop_blocked == 0) { 2697 phylink_warn(pl, "%s called too many times - ignoring\n", 2698 __func__); 2699 dump_stack(); 2700 return; 2701 } 2702 2703 /* Re-enable PHY receive clock stop if the number of unblocks matches 2704 * the number of calls to the block function above. 2705 */ 2706 if (--pl->mac_rx_clk_stop_blocked == 0 && 2707 pl->mac_supports_eee_ops && pl->phydev && 2708 pl->config->eee_rx_clk_stop_enable) 2709 phy_eee_rx_clock_stop(pl->phydev, true); 2710 } 2711 EXPORT_SYMBOL_GPL(phylink_rx_clk_stop_unblock); 2712 2713 static bool phylink_mac_supports_wol(struct phylink *pl) 2714 { 2715 return !!pl->mac_ops->mac_wol_set; 2716 } 2717 2718 static bool phylink_phy_supports_wol(struct phylink *pl, 2719 struct phy_device *phydev) 2720 { 2721 return phydev && (pl->config->wol_phy_legacy || phy_can_wakeup(phydev)); 2722 } 2723 2724 static bool phylink_phy_pm_speed_ctrl(struct phylink *pl) 2725 { 2726 return pl->config->wol_phy_speed_ctrl && !pl->wolopts_mac && 2727 pl->phydev && phy_may_wakeup(pl->phydev); 2728 } 2729 2730 /** 2731 * phylink_suspend() - handle a network device suspend event 2732 * @pl: a pointer to a &struct phylink returned from phylink_create() 2733 * @mac_wol: true if the MAC needs to receive packets for Wake-on-Lan 2734 * 2735 * Handle a network device suspend event. There are several cases: 2736 * 2737 * - If Wake-on-Lan is not active, we can bring down the link between 2738 * the MAC and PHY by calling phylink_stop(). 2739 * - If Wake-on-Lan is active, and being handled only by the PHY, we 2740 * can also bring down the link between the MAC and PHY. 2741 * - If Wake-on-Lan is active, but being handled by the MAC, the MAC 2742 * still needs to receive packets, so we can not bring the link down. 2743 * 2744 * Note: when phylink managed Wake-on-Lan is in use, @mac_wol is ignored. 2745 * (struct phylink_mac_ops.mac_set_wol populated.) 2746 */ 2747 void phylink_suspend(struct phylink *pl, bool mac_wol) 2748 { 2749 ASSERT_RTNL(); 2750 2751 if (phylink_mac_supports_wol(pl)) 2752 mac_wol = !!pl->wolopts_mac; 2753 2754 if (mac_wol && (!pl->netdev || pl->netdev->ethtool->wol_enabled)) { 2755 /* Wake-on-Lan enabled, MAC handling */ 2756 mutex_lock(&pl->state_mutex); 2757 2758 /* Stop the resolver bringing the link up */ 2759 __set_bit(PHYLINK_DISABLE_MAC_WOL, &pl->phylink_disable_state); 2760 2761 pl->suspend_link_up = phylink_link_is_up(pl); 2762 if (pl->suspend_link_up) { 2763 /* Disable the carrier, to prevent transmit timeouts, 2764 * but one would hope all packets have been sent. This 2765 * also means phylink_resolve() will do nothing. 2766 */ 2767 if (pl->netdev) 2768 netif_carrier_off(pl->netdev); 2769 pl->old_link_state = false; 2770 } 2771 2772 /* We do not call mac_link_down() here as we want the 2773 * link to remain up to receive the WoL packets. 2774 */ 2775 mutex_unlock(&pl->state_mutex); 2776 } else { 2777 phylink_stop(pl); 2778 } 2779 2780 if (phylink_phy_pm_speed_ctrl(pl)) 2781 phylink_speed_down(pl, false); 2782 } 2783 EXPORT_SYMBOL_GPL(phylink_suspend); 2784 2785 /** 2786 * phylink_prepare_resume() - prepare to resume a network device 2787 * @pl: a pointer to a &struct phylink returned from phylink_create() 2788 * 2789 * Optional, but if called must be called prior to phylink_resume(). 2790 * 2791 * Prepare to resume a network device, preparing the PHY as necessary. 2792 */ 2793 void phylink_prepare_resume(struct phylink *pl) 2794 { 2795 struct phy_device *phydev = pl->phydev; 2796 2797 ASSERT_RTNL(); 2798 2799 /* IEEE 802.3 22.2.4.1.5 allows PHYs to stop their receive clock 2800 * when PDOWN is set. However, some MACs require RXC to be running 2801 * in order to resume. If the MAC requires RXC, and we have a PHY, 2802 * then resume the PHY. Note that 802.3 allows PHYs 500ms before 2803 * the clock meets requirements. We do not implement this delay. 2804 */ 2805 if (pl->config->mac_requires_rxc && phydev && phydev->suspended) 2806 phy_resume(phydev); 2807 } 2808 EXPORT_SYMBOL_GPL(phylink_prepare_resume); 2809 2810 /** 2811 * phylink_resume() - handle a network device resume event 2812 * @pl: a pointer to a &struct phylink returned from phylink_create() 2813 * 2814 * Undo the effects of phylink_suspend(), returning the link to an 2815 * operational state. 2816 */ 2817 void phylink_resume(struct phylink *pl) 2818 { 2819 ASSERT_RTNL(); 2820 2821 if (phylink_phy_pm_speed_ctrl(pl)) 2822 phylink_speed_up(pl); 2823 2824 if (test_bit(PHYLINK_DISABLE_MAC_WOL, &pl->phylink_disable_state)) { 2825 /* Wake-on-Lan enabled, MAC handling */ 2826 2827 if (pl->suspend_link_up) { 2828 /* Call mac_link_down() so we keep the overall state 2829 * balanced. Do this under the state_mutex lock for 2830 * consistency. This will cause a "Link Down" message 2831 * to be printed during resume, which is harmless - 2832 * the true link state will be printed when we run a 2833 * resolve. 2834 */ 2835 mutex_lock(&pl->state_mutex); 2836 phylink_link_down(pl); 2837 mutex_unlock(&pl->state_mutex); 2838 } 2839 2840 /* Re-apply the link parameters so that all the settings get 2841 * restored to the MAC. 2842 */ 2843 phylink_mac_initial_config(pl, true); 2844 2845 /* Re-enable and re-resolve the link parameters */ 2846 phylink_enable_and_run_resolve(pl, PHYLINK_DISABLE_MAC_WOL); 2847 } else { 2848 phylink_start(pl); 2849 } 2850 } 2851 EXPORT_SYMBOL_GPL(phylink_resume); 2852 2853 /** 2854 * phylink_ethtool_get_wol() - get the wake on lan parameters for the PHY 2855 * @pl: a pointer to a &struct phylink returned from phylink_create() 2856 * @wol: a pointer to &struct ethtool_wolinfo to hold the read parameters 2857 * 2858 * Read the wake on lan parameters from the PHY attached to the phylink 2859 * instance specified by @pl. If no PHY is currently attached, report no 2860 * support for wake on lan. 2861 */ 2862 void phylink_ethtool_get_wol(struct phylink *pl, struct ethtool_wolinfo *wol) 2863 { 2864 ASSERT_RTNL(); 2865 2866 wol->supported = 0; 2867 wol->wolopts = 0; 2868 2869 if (phylink_mac_supports_wol(pl)) { 2870 if (phylink_phy_supports_wol(pl, pl->phydev)) 2871 phy_ethtool_get_wol(pl->phydev, wol); 2872 2873 /* Where the MAC augments the WoL support, merge its support and 2874 * current configuration. 2875 */ 2876 if (~wol->wolopts & pl->wolopts_mac & WAKE_MAGICSECURE) 2877 memcpy(wol->sopass, pl->wol_sopass, 2878 sizeof(wol->sopass)); 2879 2880 wol->supported |= pl->config->wol_mac_support; 2881 wol->wolopts |= pl->wolopts_mac; 2882 } else { 2883 /* Legacy */ 2884 if (pl->phydev) 2885 phy_ethtool_get_wol(pl->phydev, wol); 2886 } 2887 } 2888 EXPORT_SYMBOL_GPL(phylink_ethtool_get_wol); 2889 2890 /** 2891 * phylink_ethtool_set_wol() - set wake on lan parameters 2892 * @pl: a pointer to a &struct phylink returned from phylink_create() 2893 * @wol: a pointer to &struct ethtool_wolinfo for the desired parameters 2894 * 2895 * Set the wake on lan parameters for the PHY attached to the phylink 2896 * instance specified by @pl. If no PHY is attached, returns %EOPNOTSUPP 2897 * error. 2898 * 2899 * Returns zero on success or negative errno code. 2900 */ 2901 int phylink_ethtool_set_wol(struct phylink *pl, struct ethtool_wolinfo *wol) 2902 { 2903 struct ethtool_wolinfo w = { .cmd = ETHTOOL_GWOL }; 2904 int ret = -EOPNOTSUPP; 2905 bool changed; 2906 u32 wolopts; 2907 2908 ASSERT_RTNL(); 2909 2910 if (phylink_mac_supports_wol(pl)) { 2911 wolopts = wol->wolopts; 2912 2913 if (phylink_phy_supports_wol(pl, pl->phydev)) { 2914 ret = phy_ethtool_set_wol(pl->phydev, wol); 2915 if (ret != 0 && ret != -EOPNOTSUPP) 2916 return ret; 2917 2918 phy_ethtool_get_wol(pl->phydev, &w); 2919 2920 /* Any Wake-on-Lan modes which the PHY is handling 2921 * should not be passed on to the MAC. 2922 */ 2923 wolopts &= ~w.wolopts; 2924 } 2925 2926 wolopts &= pl->config->wol_mac_support; 2927 changed = pl->wolopts_mac != wolopts; 2928 if (wolopts & WAKE_MAGICSECURE) 2929 changed |= !!memcmp(wol->sopass, pl->wol_sopass, 2930 sizeof(wol->sopass)); 2931 memcpy(pl->wol_sopass, wol->sopass, sizeof(pl->wol_sopass)); 2932 2933 if (changed) { 2934 ret = pl->mac_ops->mac_wol_set(pl->config, wolopts, 2935 wol->sopass); 2936 if (!ret) 2937 pl->wolopts_mac = wolopts; 2938 } else { 2939 ret = 0; 2940 } 2941 } else { 2942 if (pl->phydev) 2943 ret = phy_ethtool_set_wol(pl->phydev, wol); 2944 } 2945 2946 return ret; 2947 } 2948 EXPORT_SYMBOL_GPL(phylink_ethtool_set_wol); 2949 2950 static phy_interface_t phylink_sfp_select_interface(struct phylink *pl, 2951 const unsigned long *link_modes) 2952 { 2953 phy_interface_t interface; 2954 2955 interface = sfp_select_interface(pl->sfp_bus, link_modes); 2956 if (interface == PHY_INTERFACE_MODE_NA) { 2957 phylink_err(pl, 2958 "selection of interface failed, advertisement %*pb\n", 2959 __ETHTOOL_LINK_MODE_MASK_NBITS, 2960 link_modes); 2961 return interface; 2962 } 2963 2964 if (!test_bit(interface, pl->config->supported_interfaces)) { 2965 phylink_err(pl, 2966 "selection of interface failed, SFP selected %s (%u) but MAC supports %*pbl\n", 2967 phy_modes(interface), interface, 2968 (int)PHY_INTERFACE_MODE_MAX, 2969 pl->config->supported_interfaces); 2970 return PHY_INTERFACE_MODE_NA; 2971 } 2972 2973 return interface; 2974 } 2975 2976 static phy_interface_t phylink_sfp_select_interface_speed(struct phylink *pl, 2977 u32 speed) 2978 { 2979 phy_interface_t best_interface = PHY_INTERFACE_MODE_NA; 2980 phy_interface_t interface; 2981 u32 max_speed; 2982 int i; 2983 2984 for (i = 0; i < ARRAY_SIZE(phylink_sfp_interface_preference); i++) { 2985 interface = phylink_sfp_interface_preference[i]; 2986 if (!test_bit(interface, pl->sfp_interfaces)) 2987 continue; 2988 2989 max_speed = phylink_interface_max_speed(interface); 2990 2991 /* The logic here is: if speed == max_speed, then we've found 2992 * the best interface. Otherwise we find the interface that 2993 * can just support the requested speed. 2994 */ 2995 if (max_speed >= speed) 2996 best_interface = interface; 2997 2998 if (max_speed <= speed) 2999 break; 3000 } 3001 3002 if (best_interface == PHY_INTERFACE_MODE_NA) 3003 phylink_err(pl, "selection of interface failed, speed %u\n", 3004 speed); 3005 3006 return best_interface; 3007 } 3008 3009 static void phylink_merge_link_mode(unsigned long *dst, const unsigned long *b) 3010 { 3011 __ETHTOOL_DECLARE_LINK_MODE_MASK(mask); 3012 3013 linkmode_zero(mask); 3014 phylink_set_port_modes(mask); 3015 3016 linkmode_and(dst, dst, mask); 3017 linkmode_or(dst, dst, b); 3018 } 3019 3020 static void phylink_get_ksettings(const struct phylink_link_state *state, 3021 struct ethtool_link_ksettings *kset) 3022 { 3023 phylink_merge_link_mode(kset->link_modes.advertising, state->advertising); 3024 linkmode_copy(kset->link_modes.lp_advertising, state->lp_advertising); 3025 if (kset->base.rate_matching == RATE_MATCH_NONE) { 3026 kset->base.speed = state->speed; 3027 kset->base.duplex = state->duplex; 3028 } 3029 kset->base.autoneg = linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, 3030 state->advertising) ? 3031 AUTONEG_ENABLE : AUTONEG_DISABLE; 3032 } 3033 3034 /** 3035 * phylink_ethtool_ksettings_get() - get the current link settings 3036 * @pl: a pointer to a &struct phylink returned from phylink_create() 3037 * @kset: a pointer to a &struct ethtool_link_ksettings to hold link settings 3038 * 3039 * Read the current link settings for the phylink instance specified by @pl. 3040 * This will be the link settings read from the MAC, PHY or fixed link 3041 * settings depending on the current negotiation mode. 3042 */ 3043 int phylink_ethtool_ksettings_get(struct phylink *pl, 3044 struct ethtool_link_ksettings *kset) 3045 { 3046 struct phylink_link_state link_state; 3047 3048 ASSERT_RTNL(); 3049 3050 if (pl->phydev) 3051 phy_ethtool_ksettings_get(pl->phydev, kset); 3052 else 3053 kset->base.port = pl->link_port; 3054 3055 linkmode_copy(kset->link_modes.supported, pl->supported); 3056 3057 switch (pl->act_link_an_mode) { 3058 case MLO_AN_FIXED: 3059 /* We are using fixed settings. Report these as the 3060 * current link settings - and note that these also 3061 * represent the supported speeds/duplex/pause modes. 3062 */ 3063 phylink_get_fixed_state(pl, &link_state); 3064 phylink_get_ksettings(&link_state, kset); 3065 break; 3066 3067 case MLO_AN_INBAND: 3068 /* If there is a phy attached, then use the reported 3069 * settings from the phy with no modification. 3070 */ 3071 if (pl->phydev) 3072 break; 3073 3074 phylink_mac_pcs_get_state(pl, &link_state); 3075 3076 /* The MAC is reporting the link results from its own PCS 3077 * layer via in-band status. Report these as the current 3078 * link settings. 3079 */ 3080 phylink_get_ksettings(&link_state, kset); 3081 break; 3082 } 3083 3084 return 0; 3085 } 3086 EXPORT_SYMBOL_GPL(phylink_ethtool_ksettings_get); 3087 3088 static bool phylink_validate_pcs_inband_autoneg(struct phylink *pl, 3089 phy_interface_t interface, 3090 unsigned long *adv) 3091 { 3092 unsigned int inband = phylink_inband_caps(pl, interface); 3093 unsigned int mask; 3094 3095 /* If the PCS doesn't implement inband support, be permissive. */ 3096 if (!inband) 3097 return true; 3098 3099 if (linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, adv)) 3100 mask = LINK_INBAND_ENABLE; 3101 else 3102 mask = LINK_INBAND_DISABLE; 3103 3104 /* Check whether the PCS implements the required mode */ 3105 return !!(inband & mask); 3106 } 3107 3108 /** 3109 * phylink_ethtool_ksettings_set() - set the link settings 3110 * @pl: a pointer to a &struct phylink returned from phylink_create() 3111 * @kset: a pointer to a &struct ethtool_link_ksettings for the desired modes 3112 */ 3113 int phylink_ethtool_ksettings_set(struct phylink *pl, 3114 const struct ethtool_link_ksettings *kset) 3115 { 3116 __ETHTOOL_DECLARE_LINK_MODE_MASK(support); 3117 const struct link_capabilities *c; 3118 struct phylink_link_state config; 3119 3120 ASSERT_RTNL(); 3121 3122 if (pl->phydev) { 3123 struct ethtool_link_ksettings phy_kset = *kset; 3124 3125 linkmode_and(phy_kset.link_modes.advertising, 3126 phy_kset.link_modes.advertising, 3127 pl->supported); 3128 3129 /* We can rely on phylib for this update; we also do not need 3130 * to update the pl->link_config settings: 3131 * - the configuration returned via ksettings_get() will come 3132 * from phylib whenever a PHY is present. 3133 * - link_config.interface will be updated by the PHY calling 3134 * back via phylink_phy_change() and a subsequent resolve. 3135 * - initial link configuration for PHY mode comes from the 3136 * last phy state updated via phylink_phy_change(). 3137 * - other configuration changes (e.g. pause modes) are 3138 * performed directly via phylib. 3139 * - if in in-band mode with a PHY, the link configuration 3140 * is passed on the link from the PHY, and all of 3141 * link_config.{speed,duplex,an_enabled,pause} are not used. 3142 * - the only possible use would be link_config.advertising 3143 * pause modes when in 1000base-X mode with a PHY, but in 3144 * the presence of a PHY, this should not be changed as that 3145 * should be determined from the media side advertisement. 3146 */ 3147 return phy_ethtool_ksettings_set(pl->phydev, &phy_kset); 3148 } 3149 3150 config = pl->link_config; 3151 /* Mask out unsupported advertisements */ 3152 linkmode_and(config.advertising, kset->link_modes.advertising, 3153 pl->supported); 3154 3155 /* FIXME: should we reject autoneg if phy/mac does not support it? */ 3156 switch (kset->base.autoneg) { 3157 case AUTONEG_DISABLE: 3158 /* Autonegotiation disabled, select a suitable speed and 3159 * duplex. 3160 */ 3161 c = phy_caps_lookup(kset->base.speed, kset->base.duplex, 3162 pl->supported, false); 3163 if (!c) 3164 return -EINVAL; 3165 3166 /* If we have a fixed link, refuse to change link parameters. 3167 * If the link parameters match, accept them but do nothing. 3168 */ 3169 if (pl->req_link_an_mode == MLO_AN_FIXED) { 3170 if (c->speed != pl->link_config.speed || 3171 c->duplex != pl->link_config.duplex) 3172 return -EINVAL; 3173 return 0; 3174 } 3175 3176 config.speed = c->speed; 3177 config.duplex = c->duplex; 3178 break; 3179 3180 case AUTONEG_ENABLE: 3181 /* If we have a fixed link, allow autonegotiation (since that 3182 * is our default case) but do not allow the advertisement to 3183 * be changed. If the advertisement matches, simply return. 3184 */ 3185 if (pl->req_link_an_mode == MLO_AN_FIXED) { 3186 if (!linkmode_equal(config.advertising, 3187 pl->link_config.advertising)) 3188 return -EINVAL; 3189 return 0; 3190 } 3191 3192 config.speed = SPEED_UNKNOWN; 3193 config.duplex = DUPLEX_UNKNOWN; 3194 break; 3195 3196 default: 3197 return -EINVAL; 3198 } 3199 3200 /* We have ruled out the case with a PHY attached, and the 3201 * fixed-link cases. All that is left are in-band links. 3202 */ 3203 linkmode_mod_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, config.advertising, 3204 kset->base.autoneg == AUTONEG_ENABLE); 3205 3206 /* If this link is with an SFP, ensure that changes to advertised modes 3207 * also cause the associated interface to be selected such that the 3208 * link can be configured correctly. 3209 */ 3210 if (pl->sfp_bus) { 3211 if (kset->base.autoneg == AUTONEG_ENABLE) 3212 config.interface = 3213 phylink_sfp_select_interface(pl, 3214 config.advertising); 3215 else 3216 config.interface = 3217 phylink_sfp_select_interface_speed(pl, 3218 config.speed); 3219 if (config.interface == PHY_INTERFACE_MODE_NA) 3220 return -EINVAL; 3221 3222 /* Revalidate with the selected interface */ 3223 linkmode_copy(support, pl->supported); 3224 if (phylink_validate(pl, support, &config)) { 3225 phylink_err(pl, "validation of %s/%s with support %*pb failed\n", 3226 phylink_an_mode_str(pl->req_link_an_mode), 3227 phy_modes(config.interface), 3228 __ETHTOOL_LINK_MODE_MASK_NBITS, support); 3229 return -EINVAL; 3230 } 3231 } else { 3232 /* Validate without changing the current supported mask. */ 3233 linkmode_copy(support, pl->supported); 3234 if (phylink_validate(pl, support, &config)) 3235 return -EINVAL; 3236 } 3237 3238 /* If autonegotiation is enabled, we must have an advertisement */ 3239 if (linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, 3240 config.advertising) && 3241 phylink_is_empty_linkmode(config.advertising)) 3242 return -EINVAL; 3243 3244 /* Validate the autonegotiation state. We don't have a PHY in this 3245 * situation, so the PCS is the media-facing entity. 3246 */ 3247 if (!phylink_validate_pcs_inband_autoneg(pl, config.interface, 3248 config.advertising)) 3249 return -EINVAL; 3250 3251 mutex_lock(&pl->state_mutex); 3252 pl->link_config.speed = config.speed; 3253 pl->link_config.duplex = config.duplex; 3254 3255 if (pl->link_config.interface != config.interface) { 3256 /* The interface changed, e.g. 1000base-X <-> 2500base-X */ 3257 /* We need to force the link down, then change the interface */ 3258 if (pl->old_link_state) { 3259 phylink_link_down(pl); 3260 pl->old_link_state = false; 3261 } 3262 if (!test_bit(PHYLINK_DISABLE_STOPPED, 3263 &pl->phylink_disable_state)) 3264 phylink_major_config(pl, false, &config); 3265 pl->link_config.interface = config.interface; 3266 linkmode_copy(pl->link_config.advertising, config.advertising); 3267 } else if (!linkmode_equal(pl->link_config.advertising, 3268 config.advertising)) { 3269 linkmode_copy(pl->link_config.advertising, config.advertising); 3270 phylink_change_inband_advert(pl); 3271 } 3272 mutex_unlock(&pl->state_mutex); 3273 3274 return 0; 3275 } 3276 EXPORT_SYMBOL_GPL(phylink_ethtool_ksettings_set); 3277 3278 /** 3279 * phylink_ethtool_nway_reset() - restart negotiation 3280 * @pl: a pointer to a &struct phylink returned from phylink_create() 3281 * 3282 * Restart negotiation for the phylink instance specified by @pl. This will 3283 * cause any attached phy to restart negotiation with the link partner, and 3284 * if the MAC is in a BaseX mode, the MAC will also be requested to restart 3285 * negotiation. 3286 * 3287 * Returns zero on success, or negative error code. 3288 */ 3289 int phylink_ethtool_nway_reset(struct phylink *pl) 3290 { 3291 int ret = 0; 3292 3293 ASSERT_RTNL(); 3294 3295 if (pl->phydev) 3296 ret = phy_restart_aneg(pl->phydev); 3297 phylink_pcs_an_restart(pl); 3298 3299 return ret; 3300 } 3301 EXPORT_SYMBOL_GPL(phylink_ethtool_nway_reset); 3302 3303 /** 3304 * phylink_ethtool_get_pauseparam() - get the current pause parameters 3305 * @pl: a pointer to a &struct phylink returned from phylink_create() 3306 * @pause: a pointer to a &struct ethtool_pauseparam 3307 */ 3308 void phylink_ethtool_get_pauseparam(struct phylink *pl, 3309 struct ethtool_pauseparam *pause) 3310 { 3311 ASSERT_RTNL(); 3312 3313 pause->autoneg = !!(pl->link_config.pause & MLO_PAUSE_AN); 3314 pause->rx_pause = !!(pl->link_config.pause & MLO_PAUSE_RX); 3315 pause->tx_pause = !!(pl->link_config.pause & MLO_PAUSE_TX); 3316 } 3317 EXPORT_SYMBOL_GPL(phylink_ethtool_get_pauseparam); 3318 3319 /** 3320 * phylink_ethtool_set_pauseparam() - set the current pause parameters 3321 * @pl: a pointer to a &struct phylink returned from phylink_create() 3322 * @pause: a pointer to a &struct ethtool_pauseparam 3323 */ 3324 int phylink_ethtool_set_pauseparam(struct phylink *pl, 3325 struct ethtool_pauseparam *pause) 3326 { 3327 int pause_state; 3328 3329 ASSERT_RTNL(); 3330 3331 if (pl->req_link_an_mode == MLO_AN_FIXED) 3332 return -EOPNOTSUPP; 3333 3334 if (!phylink_test(pl->supported, Pause) && 3335 !phylink_test(pl->supported, Asym_Pause)) 3336 return -EOPNOTSUPP; 3337 3338 if (!phylink_test(pl->supported, Asym_Pause) && 3339 pause->rx_pause != pause->tx_pause) 3340 return -EINVAL; 3341 3342 pause_state = 0; 3343 if (pause->autoneg) 3344 pause_state |= MLO_PAUSE_AN; 3345 if (pause->rx_pause) 3346 pause_state |= MLO_PAUSE_RX; 3347 if (pause->tx_pause) 3348 pause_state |= MLO_PAUSE_TX; 3349 3350 phylink_update_pause_state(pl, pause_state); 3351 3352 return 0; 3353 } 3354 EXPORT_SYMBOL_GPL(phylink_ethtool_set_pauseparam); 3355 3356 /** 3357 * phylink_get_eee_err() - read the energy efficient ethernet error 3358 * counter 3359 * @pl: a pointer to a &struct phylink returned from phylink_create(). 3360 * 3361 * Read the Energy Efficient Ethernet error counter from the PHY associated 3362 * with the phylink instance specified by @pl. 3363 * 3364 * Returns positive error counter value, or negative error code. 3365 */ 3366 int phylink_get_eee_err(struct phylink *pl) 3367 { 3368 int ret = 0; 3369 3370 ASSERT_RTNL(); 3371 3372 if (pl->phydev) 3373 ret = phy_get_eee_err(pl->phydev); 3374 3375 return ret; 3376 } 3377 EXPORT_SYMBOL_GPL(phylink_get_eee_err); 3378 3379 /** 3380 * phylink_ethtool_get_eee() - read the energy efficient ethernet parameters 3381 * @pl: a pointer to a &struct phylink returned from phylink_create() 3382 * @eee: a pointer to a &struct ethtool_keee for the read parameters 3383 */ 3384 int phylink_ethtool_get_eee(struct phylink *pl, struct ethtool_keee *eee) 3385 { 3386 int ret = -EOPNOTSUPP; 3387 3388 ASSERT_RTNL(); 3389 3390 if (pl->mac_supports_eee_ops && !pl->mac_supports_eee) 3391 return ret; 3392 3393 if (pl->phydev) { 3394 ret = phy_ethtool_get_eee(pl->phydev, eee); 3395 /* Restrict supported linkmode mask */ 3396 if (ret == 0 && pl->mac_supports_eee_ops) 3397 linkmode_and(eee->supported, eee->supported, 3398 pl->supported_lpi); 3399 } 3400 3401 return ret; 3402 } 3403 EXPORT_SYMBOL_GPL(phylink_ethtool_get_eee); 3404 3405 /** 3406 * phylink_ethtool_set_eee() - set the energy efficient ethernet parameters 3407 * @pl: a pointer to a &struct phylink returned from phylink_create() 3408 * @eee: a pointer to a &struct ethtool_keee for the desired parameters 3409 */ 3410 int phylink_ethtool_set_eee(struct phylink *pl, struct ethtool_keee *eee) 3411 { 3412 bool mac_eee = pl->mac_supports_eee; 3413 int ret = -EOPNOTSUPP; 3414 3415 ASSERT_RTNL(); 3416 3417 phylink_dbg(pl, "mac %s phylink EEE%s, adv %*pbl, LPI%s timer %uus\n", 3418 mac_eee ? "supports" : "does not support", 3419 eee->eee_enabled ? ", enabled" : "", 3420 __ETHTOOL_LINK_MODE_MASK_NBITS, eee->advertised, 3421 eee->tx_lpi_enabled ? " enabled" : "", eee->tx_lpi_timer); 3422 3423 if (pl->mac_supports_eee_ops && !mac_eee) 3424 return ret; 3425 3426 if (pl->phydev) { 3427 /* Restrict advertisement mask */ 3428 if (pl->mac_supports_eee_ops) 3429 linkmode_and(eee->advertised, eee->advertised, 3430 pl->supported_lpi); 3431 ret = phy_ethtool_set_eee(pl->phydev, eee); 3432 if (ret == 0) 3433 eee_to_eeecfg(&pl->eee_cfg, eee); 3434 } 3435 3436 return ret; 3437 } 3438 EXPORT_SYMBOL_GPL(phylink_ethtool_set_eee); 3439 3440 /* This emulates MII registers for a fixed-mode phy operating as per the 3441 * passed in state. "aneg" defines if we report negotiation is possible. 3442 * 3443 * FIXME: should deal with negotiation state too. 3444 */ 3445 static int phylink_mii_emul_read(unsigned int reg, 3446 struct phylink_link_state *state) 3447 { 3448 struct fixed_phy_status fs; 3449 unsigned long *lpa = state->lp_advertising; 3450 int val; 3451 3452 fs.link = state->link; 3453 fs.speed = state->speed; 3454 fs.duplex = state->duplex; 3455 fs.pause = test_bit(ETHTOOL_LINK_MODE_Pause_BIT, lpa); 3456 fs.asym_pause = test_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, lpa); 3457 3458 val = swphy_read_reg(reg, &fs); 3459 if (reg == MII_BMSR) { 3460 if (!state->an_complete) 3461 val &= ~BMSR_ANEGCOMPLETE; 3462 } 3463 return val; 3464 } 3465 3466 static int phylink_phy_read(struct phylink *pl, unsigned int phy_id, 3467 unsigned int reg) 3468 { 3469 struct phy_device *phydev = pl->phydev; 3470 int prtad, devad; 3471 3472 if (mdio_phy_id_is_c45(phy_id)) { 3473 prtad = mdio_phy_id_prtad(phy_id); 3474 devad = mdio_phy_id_devad(phy_id); 3475 return mdiobus_c45_read(pl->phydev->mdio.bus, prtad, devad, 3476 reg); 3477 } 3478 3479 if (phydev->is_c45) { 3480 switch (reg) { 3481 case MII_BMCR: 3482 case MII_BMSR: 3483 case MII_PHYSID1: 3484 case MII_PHYSID2: 3485 devad = __ffs(phydev->c45_ids.mmds_present); 3486 break; 3487 case MII_ADVERTISE: 3488 case MII_LPA: 3489 if (!(phydev->c45_ids.mmds_present & MDIO_DEVS_AN)) 3490 return -EINVAL; 3491 devad = MDIO_MMD_AN; 3492 if (reg == MII_ADVERTISE) 3493 reg = MDIO_AN_ADVERTISE; 3494 else 3495 reg = MDIO_AN_LPA; 3496 break; 3497 default: 3498 return -EINVAL; 3499 } 3500 prtad = phy_id; 3501 return mdiobus_c45_read(pl->phydev->mdio.bus, prtad, devad, 3502 reg); 3503 } 3504 3505 return mdiobus_read(pl->phydev->mdio.bus, phy_id, reg); 3506 } 3507 3508 static int phylink_phy_write(struct phylink *pl, unsigned int phy_id, 3509 unsigned int reg, unsigned int val) 3510 { 3511 struct phy_device *phydev = pl->phydev; 3512 int prtad, devad; 3513 3514 if (mdio_phy_id_is_c45(phy_id)) { 3515 prtad = mdio_phy_id_prtad(phy_id); 3516 devad = mdio_phy_id_devad(phy_id); 3517 return mdiobus_c45_write(pl->phydev->mdio.bus, prtad, devad, 3518 reg, val); 3519 } 3520 3521 if (phydev->is_c45) { 3522 switch (reg) { 3523 case MII_BMCR: 3524 case MII_BMSR: 3525 case MII_PHYSID1: 3526 case MII_PHYSID2: 3527 devad = __ffs(phydev->c45_ids.mmds_present); 3528 break; 3529 case MII_ADVERTISE: 3530 case MII_LPA: 3531 if (!(phydev->c45_ids.mmds_present & MDIO_DEVS_AN)) 3532 return -EINVAL; 3533 devad = MDIO_MMD_AN; 3534 if (reg == MII_ADVERTISE) 3535 reg = MDIO_AN_ADVERTISE; 3536 else 3537 reg = MDIO_AN_LPA; 3538 break; 3539 default: 3540 return -EINVAL; 3541 } 3542 return mdiobus_c45_write(pl->phydev->mdio.bus, phy_id, devad, 3543 reg, val); 3544 } 3545 3546 return mdiobus_write(phydev->mdio.bus, phy_id, reg, val); 3547 } 3548 3549 static int phylink_mii_read(struct phylink *pl, unsigned int phy_id, 3550 unsigned int reg) 3551 { 3552 struct phylink_link_state state; 3553 int val = 0xffff; 3554 3555 switch (pl->act_link_an_mode) { 3556 case MLO_AN_FIXED: 3557 if (phy_id == 0) { 3558 phylink_get_fixed_state(pl, &state); 3559 val = phylink_mii_emul_read(reg, &state); 3560 } 3561 break; 3562 3563 case MLO_AN_PHY: 3564 return -EOPNOTSUPP; 3565 3566 case MLO_AN_INBAND: 3567 if (phy_id == 0) { 3568 phylink_mac_pcs_get_state(pl, &state); 3569 val = phylink_mii_emul_read(reg, &state); 3570 } 3571 break; 3572 } 3573 3574 return val & 0xffff; 3575 } 3576 3577 static int phylink_mii_write(struct phylink *pl, unsigned int phy_id, 3578 unsigned int reg, unsigned int val) 3579 { 3580 switch (pl->act_link_an_mode) { 3581 case MLO_AN_FIXED: 3582 break; 3583 3584 case MLO_AN_PHY: 3585 return -EOPNOTSUPP; 3586 3587 case MLO_AN_INBAND: 3588 break; 3589 } 3590 3591 return 0; 3592 } 3593 3594 /** 3595 * phylink_mii_ioctl() - generic mii ioctl interface 3596 * @pl: a pointer to a &struct phylink returned from phylink_create() 3597 * @ifr: a pointer to a &struct ifreq for socket ioctls 3598 * @cmd: ioctl cmd to execute 3599 * 3600 * Perform the specified MII ioctl on the PHY attached to the phylink instance 3601 * specified by @pl. If no PHY is attached, emulate the presence of the PHY. 3602 * 3603 * Returns: zero on success or negative error code. 3604 * 3605 * %SIOCGMIIPHY: 3606 * read register from the current PHY. 3607 * %SIOCGMIIREG: 3608 * read register from the specified PHY. 3609 * %SIOCSMIIREG: 3610 * set a register on the specified PHY. 3611 */ 3612 int phylink_mii_ioctl(struct phylink *pl, struct ifreq *ifr, int cmd) 3613 { 3614 struct mii_ioctl_data *mii = if_mii(ifr); 3615 int ret; 3616 3617 ASSERT_RTNL(); 3618 3619 if (pl->phydev) { 3620 /* PHYs only exist for MLO_AN_PHY and SGMII */ 3621 switch (cmd) { 3622 case SIOCGMIIPHY: 3623 mii->phy_id = pl->phydev->mdio.addr; 3624 fallthrough; 3625 3626 case SIOCGMIIREG: 3627 ret = phylink_phy_read(pl, mii->phy_id, mii->reg_num); 3628 if (ret >= 0) { 3629 mii->val_out = ret; 3630 ret = 0; 3631 } 3632 break; 3633 3634 case SIOCSMIIREG: 3635 ret = phylink_phy_write(pl, mii->phy_id, mii->reg_num, 3636 mii->val_in); 3637 break; 3638 3639 default: 3640 ret = phy_mii_ioctl(pl->phydev, ifr, cmd); 3641 break; 3642 } 3643 } else { 3644 switch (cmd) { 3645 case SIOCGMIIPHY: 3646 mii->phy_id = 0; 3647 fallthrough; 3648 3649 case SIOCGMIIREG: 3650 ret = phylink_mii_read(pl, mii->phy_id, mii->reg_num); 3651 if (ret >= 0) { 3652 mii->val_out = ret; 3653 ret = 0; 3654 } 3655 break; 3656 3657 case SIOCSMIIREG: 3658 ret = phylink_mii_write(pl, mii->phy_id, mii->reg_num, 3659 mii->val_in); 3660 break; 3661 3662 default: 3663 ret = -EOPNOTSUPP; 3664 break; 3665 } 3666 } 3667 3668 return ret; 3669 } 3670 EXPORT_SYMBOL_GPL(phylink_mii_ioctl); 3671 3672 /** 3673 * phylink_speed_down() - set the non-SFP PHY to lowest speed supported by both 3674 * link partners 3675 * @pl: a pointer to a &struct phylink returned from phylink_create() 3676 * @sync: perform action synchronously 3677 * 3678 * If we have a PHY that is not part of a SFP module, then set the speed 3679 * as described in the phy_speed_down() function. Please see this function 3680 * for a description of the @sync parameter. 3681 * 3682 * Returns zero if there is no PHY, otherwise as per phy_speed_down(). 3683 */ 3684 int phylink_speed_down(struct phylink *pl, bool sync) 3685 { 3686 int ret = 0; 3687 3688 ASSERT_RTNL(); 3689 3690 if (!pl->sfp_bus && pl->phydev) 3691 ret = phy_speed_down(pl->phydev, sync); 3692 3693 return ret; 3694 } 3695 EXPORT_SYMBOL_GPL(phylink_speed_down); 3696 3697 /** 3698 * phylink_speed_up() - restore the advertised speeds prior to the call to 3699 * phylink_speed_down() 3700 * @pl: a pointer to a &struct phylink returned from phylink_create() 3701 * 3702 * If we have a PHY that is not part of a SFP module, then restore the 3703 * PHY speeds as per phy_speed_up(). 3704 * 3705 * Returns zero if there is no PHY, otherwise as per phy_speed_up(). 3706 */ 3707 int phylink_speed_up(struct phylink *pl) 3708 { 3709 int ret = 0; 3710 3711 ASSERT_RTNL(); 3712 3713 if (!pl->sfp_bus && pl->phydev) 3714 ret = phy_speed_up(pl->phydev); 3715 3716 return ret; 3717 } 3718 EXPORT_SYMBOL_GPL(phylink_speed_up); 3719 3720 static void phylink_sfp_attach(void *upstream, struct sfp_bus *bus) 3721 { 3722 struct phylink *pl = upstream; 3723 3724 pl->netdev->sfp_bus = bus; 3725 } 3726 3727 static void phylink_sfp_detach(void *upstream, struct sfp_bus *bus) 3728 { 3729 struct phylink *pl = upstream; 3730 3731 pl->netdev->sfp_bus = NULL; 3732 } 3733 3734 static phy_interface_t phylink_choose_sfp_interface(struct phylink *pl, 3735 const unsigned long *intf) 3736 { 3737 phy_interface_t interface; 3738 size_t i; 3739 3740 interface = PHY_INTERFACE_MODE_NA; 3741 for (i = 0; i < ARRAY_SIZE(phylink_sfp_interface_preference); i++) 3742 if (test_bit(phylink_sfp_interface_preference[i], intf)) { 3743 interface = phylink_sfp_interface_preference[i]; 3744 break; 3745 } 3746 3747 return interface; 3748 } 3749 3750 static void phylink_sfp_set_config(struct phylink *pl, unsigned long *supported, 3751 struct phylink_link_state *state, 3752 bool changed) 3753 { 3754 u8 mode = MLO_AN_INBAND; 3755 3756 phylink_dbg(pl, "requesting link mode %s/%s with support %*pb\n", 3757 phylink_an_mode_str(mode), phy_modes(state->interface), 3758 __ETHTOOL_LINK_MODE_MASK_NBITS, supported); 3759 3760 if (!linkmode_equal(pl->supported, supported)) { 3761 linkmode_copy(pl->supported, supported); 3762 changed = true; 3763 } 3764 3765 if (!linkmode_equal(pl->link_config.advertising, state->advertising)) { 3766 linkmode_copy(pl->link_config.advertising, state->advertising); 3767 changed = true; 3768 } 3769 3770 if (pl->req_link_an_mode != mode || 3771 pl->link_config.interface != state->interface) { 3772 pl->req_link_an_mode = mode; 3773 pl->link_config.interface = state->interface; 3774 3775 changed = true; 3776 3777 phylink_info(pl, "switched to %s/%s link mode\n", 3778 phylink_an_mode_str(mode), 3779 phy_modes(state->interface)); 3780 } 3781 3782 if (changed && !test_bit(PHYLINK_DISABLE_STOPPED, 3783 &pl->phylink_disable_state)) 3784 phylink_mac_initial_config(pl, false); 3785 } 3786 3787 static int phylink_sfp_config_phy(struct phylink *pl, struct phy_device *phy) 3788 { 3789 __ETHTOOL_DECLARE_LINK_MODE_MASK(support); 3790 struct phylink_link_state config; 3791 int ret; 3792 3793 /* We're not using pl->sfp_interfaces, so clear it. */ 3794 phy_interface_zero(pl->sfp_interfaces); 3795 linkmode_copy(support, phy->supported); 3796 3797 memset(&config, 0, sizeof(config)); 3798 linkmode_copy(config.advertising, phy->advertising); 3799 config.interface = PHY_INTERFACE_MODE_NA; 3800 config.speed = SPEED_UNKNOWN; 3801 config.duplex = DUPLEX_UNKNOWN; 3802 config.pause = MLO_PAUSE_AN; 3803 3804 /* Ignore errors if we're expecting a PHY to attach later */ 3805 ret = phylink_validate(pl, support, &config); 3806 if (ret) { 3807 phylink_err(pl, "validation with support %*pb failed: %pe\n", 3808 __ETHTOOL_LINK_MODE_MASK_NBITS, support, 3809 ERR_PTR(ret)); 3810 return ret; 3811 } 3812 3813 config.interface = phylink_sfp_select_interface(pl, config.advertising); 3814 if (config.interface == PHY_INTERFACE_MODE_NA) 3815 return -EINVAL; 3816 3817 /* Attach the PHY so that the PHY is present when we do the major 3818 * configuration step. 3819 */ 3820 ret = phylink_attach_phy(pl, phy, config.interface); 3821 if (ret < 0) 3822 return ret; 3823 3824 /* This will validate the configuration for us. */ 3825 ret = phylink_bringup_phy(pl, phy, config.interface); 3826 if (ret < 0) { 3827 phy_detach(phy); 3828 return ret; 3829 } 3830 3831 pl->link_port = pl->sfp_port; 3832 3833 phylink_sfp_set_config(pl, support, &config, true); 3834 3835 return 0; 3836 } 3837 3838 static int phylink_sfp_config_optical(struct phylink *pl) 3839 { 3840 __ETHTOOL_DECLARE_LINK_MODE_MASK(support); 3841 struct phylink_link_state config; 3842 enum inband_type inband_type; 3843 phy_interface_t interface; 3844 int ret; 3845 3846 phylink_dbg(pl, "optical SFP: interfaces=[mac=%*pbl, sfp=%*pbl]\n", 3847 (int)PHY_INTERFACE_MODE_MAX, 3848 pl->config->supported_interfaces, 3849 (int)PHY_INTERFACE_MODE_MAX, 3850 pl->sfp_interfaces); 3851 3852 /* Find the union of the supported interfaces by the PCS/MAC and 3853 * the SFP module. 3854 */ 3855 phy_interface_and(pl->sfp_interfaces, pl->config->supported_interfaces, 3856 pl->sfp_interfaces); 3857 if (phy_interface_empty(pl->sfp_interfaces)) { 3858 phylink_err(pl, "unsupported SFP module: no common interface modes\n"); 3859 return -EINVAL; 3860 } 3861 3862 memset(&config, 0, sizeof(config)); 3863 linkmode_copy(support, pl->sfp_support); 3864 linkmode_copy(config.advertising, pl->sfp_support); 3865 config.speed = SPEED_UNKNOWN; 3866 config.duplex = DUPLEX_UNKNOWN; 3867 config.pause = MLO_PAUSE_AN; 3868 3869 /* For all the interfaces that are supported, reduce the sfp_support 3870 * mask to only those link modes that can be supported. 3871 */ 3872 ret = phylink_validate_mask(pl, NULL, pl->sfp_support, &config, 3873 pl->sfp_interfaces); 3874 if (ret) { 3875 phylink_err(pl, "unsupported SFP module: validation with support %*pb failed\n", 3876 __ETHTOOL_LINK_MODE_MASK_NBITS, support); 3877 return ret; 3878 } 3879 3880 interface = phylink_choose_sfp_interface(pl, pl->sfp_interfaces); 3881 if (interface == PHY_INTERFACE_MODE_NA) { 3882 phylink_err(pl, "failed to select SFP interface\n"); 3883 return -EINVAL; 3884 } 3885 3886 phylink_dbg(pl, "optical SFP: chosen %s interface\n", 3887 phy_modes(interface)); 3888 3889 inband_type = phylink_get_inband_type(interface); 3890 if (inband_type == INBAND_NONE) { 3891 /* If this is the sole interface, and there is no inband 3892 * support, clear the advertising mask and Autoneg bit in 3893 * the support mask. Otherwise, just clear the Autoneg bit 3894 * in the advertising mask. 3895 */ 3896 if (phy_interface_weight(pl->sfp_interfaces) == 1) { 3897 linkmode_clear_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, 3898 pl->sfp_support); 3899 linkmode_zero(config.advertising); 3900 } else { 3901 linkmode_clear_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, 3902 config.advertising); 3903 } 3904 } 3905 3906 if (!phylink_validate_pcs_inband_autoneg(pl, interface, 3907 config.advertising)) { 3908 phylink_err(pl, "autoneg setting not compatible with PCS"); 3909 return -EINVAL; 3910 } 3911 3912 config.interface = interface; 3913 3914 /* Ignore errors if we're expecting a PHY to attach later */ 3915 ret = phylink_validate(pl, support, &config); 3916 if (ret) { 3917 phylink_err(pl, "validation with support %*pb failed: %pe\n", 3918 __ETHTOOL_LINK_MODE_MASK_NBITS, support, 3919 ERR_PTR(ret)); 3920 return ret; 3921 } 3922 3923 pl->link_port = pl->sfp_port; 3924 3925 phylink_sfp_set_config(pl, pl->sfp_support, &config, false); 3926 3927 return 0; 3928 } 3929 3930 static int phylink_sfp_module_insert(void *upstream, 3931 const struct sfp_eeprom_id *id) 3932 { 3933 const struct sfp_module_caps *caps; 3934 struct phylink *pl = upstream; 3935 3936 ASSERT_RTNL(); 3937 3938 caps = sfp_get_module_caps(pl->sfp_bus); 3939 phy_interface_copy(pl->sfp_interfaces, caps->interfaces); 3940 linkmode_copy(pl->sfp_support, caps->link_modes); 3941 pl->sfp_may_have_phy = caps->may_have_phy; 3942 pl->sfp_port = caps->port; 3943 3944 /* If this module may have a PHY connecting later, defer until later */ 3945 if (pl->sfp_may_have_phy) 3946 return 0; 3947 3948 return phylink_sfp_config_optical(pl); 3949 } 3950 3951 static void phylink_sfp_module_remove(void *upstream) 3952 { 3953 struct phylink *pl = upstream; 3954 3955 phy_interface_zero(pl->sfp_interfaces); 3956 } 3957 3958 static int phylink_sfp_module_start(void *upstream) 3959 { 3960 struct phylink *pl = upstream; 3961 3962 /* If this SFP module has a PHY, start the PHY now. */ 3963 if (pl->phydev) { 3964 phy_start(pl->phydev); 3965 return 0; 3966 } 3967 3968 /* If the module may have a PHY but we didn't detect one we 3969 * need to configure the MAC here. 3970 */ 3971 if (!pl->sfp_may_have_phy) 3972 return 0; 3973 3974 return phylink_sfp_config_optical(pl); 3975 } 3976 3977 static void phylink_sfp_module_stop(void *upstream) 3978 { 3979 struct phylink *pl = upstream; 3980 3981 /* If this SFP module has a PHY, stop it. */ 3982 if (pl->phydev) 3983 phy_stop(pl->phydev); 3984 } 3985 3986 static void phylink_sfp_link_down(void *upstream) 3987 { 3988 struct phylink *pl = upstream; 3989 3990 ASSERT_RTNL(); 3991 3992 phylink_run_resolve_and_disable(pl, PHYLINK_DISABLE_LINK); 3993 } 3994 3995 static void phylink_sfp_link_up(void *upstream) 3996 { 3997 struct phylink *pl = upstream; 3998 3999 ASSERT_RTNL(); 4000 4001 phylink_enable_and_run_resolve(pl, PHYLINK_DISABLE_LINK); 4002 } 4003 4004 static int phylink_sfp_connect_phy(void *upstream, struct phy_device *phy) 4005 { 4006 struct phylink *pl = upstream; 4007 4008 if (!phy->drv) { 4009 phylink_err(pl, "PHY %s (id 0x%.8lx) has no driver loaded\n", 4010 phydev_name(phy), (unsigned long)phy->phy_id); 4011 phylink_err(pl, "Drivers which handle known common cases: CONFIG_BCM84881_PHY, CONFIG_MARVELL_PHY\n"); 4012 return -EINVAL; 4013 } 4014 4015 /* 4016 * This is the new way of dealing with flow control for PHYs, 4017 * as described by Timur Tabi in commit 529ed1275263 ("net: phy: 4018 * phy drivers should not set SUPPORTED_[Asym_]Pause"). MAC drivers 4019 * set their support using the MAC_SYM_PAUSE and MAC_ASYM_PAUSE 4020 * capabilities and must NOT change the phy's pause settings directly. 4021 */ 4022 phy_support_asym_pause(phy); 4023 4024 /* Set the PHY's host supported interfaces */ 4025 phy_interface_and(phy->host_interfaces, phylink_sfp_interfaces, 4026 pl->config->supported_interfaces); 4027 4028 /* Do the initial configuration */ 4029 return phylink_sfp_config_phy(pl, phy); 4030 } 4031 4032 static void phylink_sfp_disconnect_phy(void *upstream, 4033 struct phy_device *phydev) 4034 { 4035 phylink_disconnect_phy(upstream); 4036 } 4037 4038 static const struct sfp_upstream_ops sfp_phylink_ops = { 4039 .attach = phylink_sfp_attach, 4040 .detach = phylink_sfp_detach, 4041 .module_insert = phylink_sfp_module_insert, 4042 .module_remove = phylink_sfp_module_remove, 4043 .module_start = phylink_sfp_module_start, 4044 .module_stop = phylink_sfp_module_stop, 4045 .link_up = phylink_sfp_link_up, 4046 .link_down = phylink_sfp_link_down, 4047 .connect_phy = phylink_sfp_connect_phy, 4048 .disconnect_phy = phylink_sfp_disconnect_phy, 4049 }; 4050 4051 /* Helpers for MAC drivers */ 4052 4053 static struct { 4054 int bit; 4055 int speed; 4056 } phylink_c73_priority_resolution[] = { 4057 { ETHTOOL_LINK_MODE_100000baseCR4_Full_BIT, SPEED_100000 }, 4058 { ETHTOOL_LINK_MODE_100000baseKR4_Full_BIT, SPEED_100000 }, 4059 /* 100GBASE-KP4 and 100GBASE-CR10 not supported */ 4060 { ETHTOOL_LINK_MODE_40000baseCR4_Full_BIT, SPEED_40000 }, 4061 { ETHTOOL_LINK_MODE_40000baseKR4_Full_BIT, SPEED_40000 }, 4062 { ETHTOOL_LINK_MODE_10000baseKR_Full_BIT, SPEED_10000 }, 4063 { ETHTOOL_LINK_MODE_10000baseKX4_Full_BIT, SPEED_10000 }, 4064 /* 5GBASE-KR not supported */ 4065 { ETHTOOL_LINK_MODE_2500baseX_Full_BIT, SPEED_2500 }, 4066 { ETHTOOL_LINK_MODE_1000baseKX_Full_BIT, SPEED_1000 }, 4067 }; 4068 4069 void phylink_resolve_c73(struct phylink_link_state *state) 4070 { 4071 int i; 4072 4073 for (i = 0; i < ARRAY_SIZE(phylink_c73_priority_resolution); i++) { 4074 int bit = phylink_c73_priority_resolution[i].bit; 4075 if (linkmode_test_bit(bit, state->advertising) && 4076 linkmode_test_bit(bit, state->lp_advertising)) 4077 break; 4078 } 4079 4080 if (i < ARRAY_SIZE(phylink_c73_priority_resolution)) { 4081 state->speed = phylink_c73_priority_resolution[i].speed; 4082 state->duplex = DUPLEX_FULL; 4083 } else { 4084 /* negotiation failure */ 4085 state->link = false; 4086 } 4087 4088 phylink_resolve_an_pause(state); 4089 } 4090 EXPORT_SYMBOL_GPL(phylink_resolve_c73); 4091 4092 static void phylink_decode_c37_word(struct phylink_link_state *state, 4093 uint16_t config_reg, int speed) 4094 { 4095 int fd_bit; 4096 4097 if (speed == SPEED_2500) 4098 fd_bit = ETHTOOL_LINK_MODE_2500baseX_Full_BIT; 4099 else 4100 fd_bit = ETHTOOL_LINK_MODE_1000baseX_Full_BIT; 4101 4102 mii_lpa_mod_linkmode_x(state->lp_advertising, config_reg, fd_bit); 4103 4104 if (linkmode_test_bit(fd_bit, state->advertising) && 4105 linkmode_test_bit(fd_bit, state->lp_advertising)) { 4106 state->speed = speed; 4107 state->duplex = DUPLEX_FULL; 4108 } else { 4109 /* negotiation failure */ 4110 state->link = false; 4111 } 4112 4113 phylink_resolve_an_pause(state); 4114 } 4115 4116 static void phylink_decode_sgmii_word(struct phylink_link_state *state, 4117 uint16_t config_reg) 4118 { 4119 if (!(config_reg & LPA_SGMII_LINK)) { 4120 state->link = false; 4121 return; 4122 } 4123 4124 switch (config_reg & LPA_SGMII_SPD_MASK) { 4125 case LPA_SGMII_10: 4126 state->speed = SPEED_10; 4127 break; 4128 case LPA_SGMII_100: 4129 state->speed = SPEED_100; 4130 break; 4131 case LPA_SGMII_1000: 4132 state->speed = SPEED_1000; 4133 break; 4134 default: 4135 state->link = false; 4136 return; 4137 } 4138 if (config_reg & LPA_SGMII_FULL_DUPLEX) 4139 state->duplex = DUPLEX_FULL; 4140 else 4141 state->duplex = DUPLEX_HALF; 4142 } 4143 4144 /** 4145 * phylink_decode_usxgmii_word() - decode the USXGMII word from a MAC PCS 4146 * @state: a pointer to a struct phylink_link_state. 4147 * @lpa: a 16 bit value which stores the USXGMII auto-negotiation word 4148 * 4149 * Helper for MAC PCS supporting the USXGMII protocol and the auto-negotiation 4150 * code word. Decode the USXGMII code word and populate the corresponding fields 4151 * (speed, duplex) into the phylink_link_state structure. 4152 */ 4153 void phylink_decode_usxgmii_word(struct phylink_link_state *state, 4154 uint16_t lpa) 4155 { 4156 switch (lpa & MDIO_USXGMII_SPD_MASK) { 4157 case MDIO_USXGMII_10: 4158 state->speed = SPEED_10; 4159 break; 4160 case MDIO_USXGMII_100: 4161 state->speed = SPEED_100; 4162 break; 4163 case MDIO_USXGMII_1000: 4164 state->speed = SPEED_1000; 4165 break; 4166 case MDIO_USXGMII_2500: 4167 state->speed = SPEED_2500; 4168 break; 4169 case MDIO_USXGMII_5000: 4170 state->speed = SPEED_5000; 4171 break; 4172 case MDIO_USXGMII_10G: 4173 state->speed = SPEED_10000; 4174 break; 4175 default: 4176 state->link = false; 4177 return; 4178 } 4179 4180 if (lpa & MDIO_USXGMII_FULL_DUPLEX) 4181 state->duplex = DUPLEX_FULL; 4182 else 4183 state->duplex = DUPLEX_HALF; 4184 } 4185 EXPORT_SYMBOL_GPL(phylink_decode_usxgmii_word); 4186 4187 /** 4188 * phylink_decode_usgmii_word() - decode the USGMII word from a MAC PCS 4189 * @state: a pointer to a struct phylink_link_state. 4190 * @lpa: a 16 bit value which stores the USGMII auto-negotiation word 4191 * 4192 * Helper for MAC PCS supporting the USGMII protocol and the auto-negotiation 4193 * code word. Decode the USGMII code word and populate the corresponding fields 4194 * (speed, duplex) into the phylink_link_state structure. The structure for this 4195 * word is the same as the USXGMII word, except it only supports speeds up to 4196 * 1Gbps. 4197 */ 4198 static void phylink_decode_usgmii_word(struct phylink_link_state *state, 4199 uint16_t lpa) 4200 { 4201 switch (lpa & MDIO_USXGMII_SPD_MASK) { 4202 case MDIO_USXGMII_10: 4203 state->speed = SPEED_10; 4204 break; 4205 case MDIO_USXGMII_100: 4206 state->speed = SPEED_100; 4207 break; 4208 case MDIO_USXGMII_1000: 4209 state->speed = SPEED_1000; 4210 break; 4211 default: 4212 state->link = false; 4213 return; 4214 } 4215 4216 if (lpa & MDIO_USXGMII_FULL_DUPLEX) 4217 state->duplex = DUPLEX_FULL; 4218 else 4219 state->duplex = DUPLEX_HALF; 4220 } 4221 4222 /** 4223 * phylink_mii_c22_pcs_decode_state() - Decode MAC PCS state from MII registers 4224 * @state: a pointer to a &struct phylink_link_state. 4225 * @neg_mode: link negotiation mode (PHYLINK_PCS_NEG_xxx) 4226 * @bmsr: The value of the %MII_BMSR register 4227 * @lpa: The value of the %MII_LPA register 4228 * 4229 * Helper for MAC PCS supporting the 802.3 clause 22 register set for 4230 * clause 37 negotiation and/or SGMII control. 4231 * 4232 * Parse the Clause 37 or Cisco SGMII link partner negotiation word into 4233 * the phylink @state structure. This is suitable to be used for implementing 4234 * the pcs_get_state() member of the struct phylink_pcs_ops structure if 4235 * accessing @bmsr and @lpa cannot be done with MDIO directly. 4236 */ 4237 void phylink_mii_c22_pcs_decode_state(struct phylink_link_state *state, 4238 unsigned int neg_mode, u16 bmsr, u16 lpa) 4239 { 4240 state->link = !!(bmsr & BMSR_LSTATUS); 4241 state->an_complete = !!(bmsr & BMSR_ANEGCOMPLETE); 4242 4243 /* If the link is down, the advertisement data is undefined. */ 4244 if (!state->link) 4245 return; 4246 4247 switch (state->interface) { 4248 case PHY_INTERFACE_MODE_1000BASEX: 4249 if (neg_mode == PHYLINK_PCS_NEG_INBAND_ENABLED) { 4250 phylink_decode_c37_word(state, lpa, SPEED_1000); 4251 } else { 4252 state->speed = SPEED_1000; 4253 state->duplex = DUPLEX_FULL; 4254 state->pause |= MLO_PAUSE_TX | MLO_PAUSE_RX; 4255 } 4256 break; 4257 4258 case PHY_INTERFACE_MODE_2500BASEX: 4259 if (neg_mode == PHYLINK_PCS_NEG_INBAND_ENABLED) { 4260 phylink_decode_c37_word(state, lpa, SPEED_2500); 4261 } else { 4262 state->speed = SPEED_2500; 4263 state->duplex = DUPLEX_FULL; 4264 state->pause |= MLO_PAUSE_TX | MLO_PAUSE_RX; 4265 } 4266 break; 4267 4268 case PHY_INTERFACE_MODE_SGMII: 4269 case PHY_INTERFACE_MODE_PSGMII: 4270 case PHY_INTERFACE_MODE_QSGMII: 4271 if (neg_mode == PHYLINK_PCS_NEG_INBAND_ENABLED) 4272 phylink_decode_sgmii_word(state, lpa); 4273 break; 4274 4275 case PHY_INTERFACE_MODE_QUSGMII: 4276 if (neg_mode == PHYLINK_PCS_NEG_INBAND_ENABLED) 4277 phylink_decode_usgmii_word(state, lpa); 4278 break; 4279 4280 default: 4281 state->link = false; 4282 break; 4283 } 4284 } 4285 EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_decode_state); 4286 4287 /** 4288 * phylink_mii_c22_pcs_get_state() - read the MAC PCS state 4289 * @pcs: a pointer to a &struct mdio_device. 4290 * @neg_mode: link negotiation mode (PHYLINK_PCS_NEG_xxx) 4291 * @state: a pointer to a &struct phylink_link_state. 4292 * 4293 * Helper for MAC PCS supporting the 802.3 clause 22 register set for 4294 * clause 37 negotiation and/or SGMII control. 4295 * 4296 * Read the MAC PCS state from the MII device configured in @config and 4297 * parse the Clause 37 or Cisco SGMII link partner negotiation word into 4298 * the phylink @state structure. This is suitable to be directly plugged 4299 * into the pcs_get_state() member of the struct phylink_pcs_ops 4300 * structure. 4301 */ 4302 void phylink_mii_c22_pcs_get_state(struct mdio_device *pcs, 4303 unsigned int neg_mode, 4304 struct phylink_link_state *state) 4305 { 4306 int bmsr, lpa; 4307 4308 bmsr = mdiodev_read(pcs, MII_BMSR); 4309 lpa = mdiodev_read(pcs, MII_LPA); 4310 if (bmsr < 0 || lpa < 0) { 4311 state->link = false; 4312 return; 4313 } 4314 4315 phylink_mii_c22_pcs_decode_state(state, neg_mode, bmsr, lpa); 4316 } 4317 EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_get_state); 4318 4319 /** 4320 * phylink_mii_c22_pcs_encode_advertisement() - configure the clause 37 PCS 4321 * advertisement 4322 * @interface: the PHY interface mode being configured 4323 * @advertising: the ethtool advertisement mask 4324 * 4325 * Helper for MAC PCS supporting the 802.3 clause 22 register set for 4326 * clause 37 negotiation and/or SGMII control. 4327 * 4328 * Encode the clause 37 PCS advertisement as specified by @interface and 4329 * @advertising. 4330 * 4331 * Return: The new value for @adv, or ``-EINVAL`` if it should not be changed. 4332 */ 4333 int phylink_mii_c22_pcs_encode_advertisement(phy_interface_t interface, 4334 const unsigned long *advertising) 4335 { 4336 u16 adv; 4337 4338 switch (interface) { 4339 case PHY_INTERFACE_MODE_1000BASEX: 4340 case PHY_INTERFACE_MODE_2500BASEX: 4341 adv = ADVERTISE_1000XFULL; 4342 if (linkmode_test_bit(ETHTOOL_LINK_MODE_Pause_BIT, 4343 advertising)) 4344 adv |= ADVERTISE_1000XPAUSE; 4345 if (linkmode_test_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, 4346 advertising)) 4347 adv |= ADVERTISE_1000XPSE_ASYM; 4348 return adv; 4349 case PHY_INTERFACE_MODE_SGMII: 4350 case PHY_INTERFACE_MODE_PSGMII: 4351 case PHY_INTERFACE_MODE_QSGMII: 4352 return 0x0001; 4353 default: 4354 /* Nothing to do for other modes */ 4355 return -EINVAL; 4356 } 4357 } 4358 EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_encode_advertisement); 4359 4360 /** 4361 * phylink_mii_c22_pcs_config() - configure clause 22 PCS 4362 * @pcs: a pointer to a &struct mdio_device. 4363 * @interface: the PHY interface mode being configured 4364 * @advertising: the ethtool advertisement mask 4365 * @neg_mode: PCS negotiation mode 4366 * 4367 * Configure a Clause 22 PCS PHY with the appropriate negotiation 4368 * parameters for the @mode, @interface and @advertising parameters. 4369 * Returns negative error number on failure, zero if the advertisement 4370 * has not changed, or positive if there is a change. 4371 */ 4372 int phylink_mii_c22_pcs_config(struct mdio_device *pcs, 4373 phy_interface_t interface, 4374 const unsigned long *advertising, 4375 unsigned int neg_mode) 4376 { 4377 bool changed = 0; 4378 u16 bmcr; 4379 int ret, adv; 4380 4381 adv = phylink_mii_c22_pcs_encode_advertisement(interface, advertising); 4382 if (adv >= 0) { 4383 ret = mdiobus_modify_changed(pcs->bus, pcs->addr, 4384 MII_ADVERTISE, 0xffff, adv); 4385 if (ret < 0) 4386 return ret; 4387 changed = ret; 4388 } 4389 4390 if (neg_mode == PHYLINK_PCS_NEG_INBAND_ENABLED) 4391 bmcr = BMCR_ANENABLE; 4392 else 4393 bmcr = 0; 4394 4395 /* Configure the inband state. Ensure ISOLATE bit is disabled */ 4396 ret = mdiodev_modify(pcs, MII_BMCR, BMCR_ANENABLE | BMCR_ISOLATE, bmcr); 4397 if (ret < 0) 4398 return ret; 4399 4400 return changed; 4401 } 4402 EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_config); 4403 4404 /** 4405 * phylink_mii_c22_pcs_an_restart() - restart 802.3z autonegotiation 4406 * @pcs: a pointer to a &struct mdio_device. 4407 * 4408 * Helper for MAC PCS supporting the 802.3 clause 22 register set for 4409 * clause 37 negotiation. 4410 * 4411 * Restart the clause 37 negotiation with the link partner. This is 4412 * suitable to be directly plugged into the pcs_get_state() member 4413 * of the struct phylink_pcs_ops structure. 4414 */ 4415 void phylink_mii_c22_pcs_an_restart(struct mdio_device *pcs) 4416 { 4417 int val = mdiodev_read(pcs, MII_BMCR); 4418 4419 if (val >= 0) { 4420 val |= BMCR_ANRESTART; 4421 4422 mdiodev_write(pcs, MII_BMCR, val); 4423 } 4424 } 4425 EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_an_restart); 4426 4427 void phylink_mii_c45_pcs_get_state(struct mdio_device *pcs, 4428 struct phylink_link_state *state) 4429 { 4430 struct mii_bus *bus = pcs->bus; 4431 int addr = pcs->addr; 4432 int stat; 4433 4434 stat = mdiobus_c45_read(bus, addr, MDIO_MMD_PCS, MDIO_STAT1); 4435 if (stat < 0) { 4436 state->link = false; 4437 return; 4438 } 4439 4440 state->link = !!(stat & MDIO_STAT1_LSTATUS); 4441 if (!state->link) 4442 return; 4443 4444 switch (state->interface) { 4445 case PHY_INTERFACE_MODE_10GBASER: 4446 state->speed = SPEED_10000; 4447 state->duplex = DUPLEX_FULL; 4448 break; 4449 4450 case PHY_INTERFACE_MODE_25GBASER: 4451 state->speed = SPEED_25000; 4452 state->duplex = DUPLEX_FULL; 4453 break; 4454 4455 default: 4456 break; 4457 } 4458 } 4459 EXPORT_SYMBOL_GPL(phylink_mii_c45_pcs_get_state); 4460 4461 /** 4462 * phylink_replay_link_begin() - begin replay of link callbacks for driver 4463 * which loses state 4464 * @pl: a pointer to a &struct phylink returned from phylink_create() 4465 * 4466 * Helper for MAC drivers which may perform a destructive reset at runtime. 4467 * Both the own driver's mac_link_down() method is called, as well as the 4468 * pcs_link_down() method of the split PCS (if any). 4469 * 4470 * This is similar to phylink_stop(), except it does not alter the state of 4471 * the phylib PHY (it is assumed that it is not affected by the MAC destructive 4472 * reset). 4473 */ 4474 void phylink_replay_link_begin(struct phylink *pl) 4475 { 4476 ASSERT_RTNL(); 4477 4478 phylink_run_resolve_and_disable(pl, PHYLINK_DISABLE_REPLAY); 4479 } 4480 EXPORT_SYMBOL_GPL(phylink_replay_link_begin); 4481 4482 /** 4483 * phylink_replay_link_end() - end replay of link callbacks for driver 4484 * which lost state 4485 * @pl: a pointer to a &struct phylink returned from phylink_create() 4486 * 4487 * Helper for MAC drivers which may perform a destructive reset at runtime. 4488 * Both the own driver's mac_config() and mac_link_up() methods, as well as the 4489 * pcs_config() and pcs_link_up() method of the split PCS (if any), are called. 4490 * 4491 * This is similar to phylink_start(), except it does not alter the state of 4492 * the phylib PHY. 4493 * 4494 * One must call this method only within the same rtnl_lock() critical section 4495 * as a previous phylink_replay_link_start(). 4496 */ 4497 void phylink_replay_link_end(struct phylink *pl) 4498 { 4499 ASSERT_RTNL(); 4500 4501 if (WARN(!test_bit(PHYLINK_DISABLE_REPLAY, 4502 &pl->phylink_disable_state), 4503 "phylink_replay_link_end() called without a prior phylink_replay_link_begin()\n")) 4504 return; 4505 4506 pl->force_major_config = true; 4507 phylink_enable_and_run_resolve(pl, PHYLINK_DISABLE_REPLAY); 4508 flush_work(&pl->resolve); 4509 } 4510 EXPORT_SYMBOL_GPL(phylink_replay_link_end); 4511 4512 static int __init phylink_init(void) 4513 { 4514 for (int i = 0; i < ARRAY_SIZE(phylink_sfp_interface_preference); ++i) 4515 __set_bit(phylink_sfp_interface_preference[i], 4516 phylink_sfp_interfaces); 4517 4518 return 0; 4519 } 4520 4521 module_init(phylink_init); 4522 4523 MODULE_LICENSE("GPL v2"); 4524 MODULE_DESCRIPTION("phylink models the MAC to optional PHY connection"); 4525