1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * phylink models the MAC to optional PHY connection, supporting 4 * technologies such as SFP cages where the PHY is hot-pluggable. 5 * 6 * Copyright (C) 2015 Russell King 7 */ 8 #include <linux/acpi.h> 9 #include <linux/ethtool.h> 10 #include <linux/export.h> 11 #include <linux/gpio/consumer.h> 12 #include <linux/netdevice.h> 13 #include <linux/of.h> 14 #include <linux/of_mdio.h> 15 #include <linux/phy.h> 16 #include <linux/phy_fixed.h> 17 #include <linux/phylink.h> 18 #include <linux/rtnetlink.h> 19 #include <linux/spinlock.h> 20 #include <linux/timer.h> 21 #include <linux/workqueue.h> 22 23 #include "sfp.h" 24 #include "swphy.h" 25 26 #define SUPPORTED_INTERFACES \ 27 (SUPPORTED_TP | SUPPORTED_MII | SUPPORTED_FIBRE | \ 28 SUPPORTED_BNC | SUPPORTED_AUI | SUPPORTED_Backplane) 29 #define ADVERTISED_INTERFACES \ 30 (ADVERTISED_TP | ADVERTISED_MII | ADVERTISED_FIBRE | \ 31 ADVERTISED_BNC | ADVERTISED_AUI | ADVERTISED_Backplane) 32 33 enum { 34 PHYLINK_DISABLE_STOPPED, 35 PHYLINK_DISABLE_LINK, 36 PHYLINK_DISABLE_MAC_WOL, 37 38 PCS_STATE_DOWN = 0, 39 PCS_STATE_STARTING, 40 PCS_STATE_STARTED, 41 }; 42 43 /** 44 * struct phylink - internal data type for phylink 45 */ 46 struct phylink { 47 /* private: */ 48 struct net_device *netdev; 49 const struct phylink_mac_ops *mac_ops; 50 struct phylink_config *config; 51 struct phylink_pcs *pcs; 52 struct device *dev; 53 unsigned int old_link_state:1; 54 55 unsigned long phylink_disable_state; /* bitmask of disables */ 56 struct phy_device *phydev; 57 phy_interface_t link_interface; /* PHY_INTERFACE_xxx */ 58 u8 cfg_link_an_mode; /* MLO_AN_xxx */ 59 u8 cur_link_an_mode; 60 u8 link_port; /* The current non-phy ethtool port */ 61 __ETHTOOL_DECLARE_LINK_MODE_MASK(supported); 62 63 /* The link configuration settings */ 64 struct phylink_link_state link_config; 65 66 /* The current settings */ 67 phy_interface_t cur_interface; 68 69 struct gpio_desc *link_gpio; 70 unsigned int link_irq; 71 struct timer_list link_poll; 72 void (*get_fixed_state)(struct net_device *dev, 73 struct phylink_link_state *s); 74 75 struct mutex state_mutex; 76 struct phylink_link_state phy_state; 77 struct work_struct resolve; 78 unsigned int pcs_neg_mode; 79 unsigned int pcs_state; 80 81 bool mac_link_dropped; 82 bool using_mac_select_pcs; 83 84 struct sfp_bus *sfp_bus; 85 bool sfp_may_have_phy; 86 DECLARE_PHY_INTERFACE_MASK(sfp_interfaces); 87 __ETHTOOL_DECLARE_LINK_MODE_MASK(sfp_support); 88 u8 sfp_port; 89 }; 90 91 #define phylink_printk(level, pl, fmt, ...) \ 92 do { \ 93 if ((pl)->config->type == PHYLINK_NETDEV) \ 94 netdev_printk(level, (pl)->netdev, fmt, ##__VA_ARGS__); \ 95 else if ((pl)->config->type == PHYLINK_DEV) \ 96 dev_printk(level, (pl)->dev, fmt, ##__VA_ARGS__); \ 97 } while (0) 98 99 #define phylink_err(pl, fmt, ...) \ 100 phylink_printk(KERN_ERR, pl, fmt, ##__VA_ARGS__) 101 #define phylink_warn(pl, fmt, ...) \ 102 phylink_printk(KERN_WARNING, pl, fmt, ##__VA_ARGS__) 103 #define phylink_info(pl, fmt, ...) \ 104 phylink_printk(KERN_INFO, pl, fmt, ##__VA_ARGS__) 105 #if defined(CONFIG_DYNAMIC_DEBUG) 106 #define phylink_dbg(pl, fmt, ...) \ 107 do { \ 108 if ((pl)->config->type == PHYLINK_NETDEV) \ 109 netdev_dbg((pl)->netdev, fmt, ##__VA_ARGS__); \ 110 else if ((pl)->config->type == PHYLINK_DEV) \ 111 dev_dbg((pl)->dev, fmt, ##__VA_ARGS__); \ 112 } while (0) 113 #elif defined(DEBUG) 114 #define phylink_dbg(pl, fmt, ...) \ 115 phylink_printk(KERN_DEBUG, pl, fmt, ##__VA_ARGS__) 116 #else 117 #define phylink_dbg(pl, fmt, ...) \ 118 ({ \ 119 if (0) \ 120 phylink_printk(KERN_DEBUG, pl, fmt, ##__VA_ARGS__); \ 121 }) 122 #endif 123 124 static const phy_interface_t phylink_sfp_interface_preference[] = { 125 PHY_INTERFACE_MODE_25GBASER, 126 PHY_INTERFACE_MODE_USXGMII, 127 PHY_INTERFACE_MODE_10GBASER, 128 PHY_INTERFACE_MODE_5GBASER, 129 PHY_INTERFACE_MODE_2500BASEX, 130 PHY_INTERFACE_MODE_SGMII, 131 PHY_INTERFACE_MODE_1000BASEX, 132 PHY_INTERFACE_MODE_100BASEX, 133 }; 134 135 static DECLARE_PHY_INTERFACE_MASK(phylink_sfp_interfaces); 136 137 /** 138 * phylink_set_port_modes() - set the port type modes in the ethtool mask 139 * @mask: ethtool link mode mask 140 * 141 * Sets all the port type modes in the ethtool mask. MAC drivers should 142 * use this in their 'validate' callback. 143 */ 144 void phylink_set_port_modes(unsigned long *mask) 145 { 146 phylink_set(mask, TP); 147 phylink_set(mask, AUI); 148 phylink_set(mask, MII); 149 phylink_set(mask, FIBRE); 150 phylink_set(mask, BNC); 151 phylink_set(mask, Backplane); 152 } 153 EXPORT_SYMBOL_GPL(phylink_set_port_modes); 154 155 static int phylink_is_empty_linkmode(const unsigned long *linkmode) 156 { 157 __ETHTOOL_DECLARE_LINK_MODE_MASK(tmp) = { 0, }; 158 159 phylink_set_port_modes(tmp); 160 phylink_set(tmp, Autoneg); 161 phylink_set(tmp, Pause); 162 phylink_set(tmp, Asym_Pause); 163 164 return linkmode_subset(linkmode, tmp); 165 } 166 167 static const char *phylink_an_mode_str(unsigned int mode) 168 { 169 static const char *modestr[] = { 170 [MLO_AN_PHY] = "phy", 171 [MLO_AN_FIXED] = "fixed", 172 [MLO_AN_INBAND] = "inband", 173 }; 174 175 return mode < ARRAY_SIZE(modestr) ? modestr[mode] : "unknown"; 176 } 177 178 static unsigned int phylink_interface_signal_rate(phy_interface_t interface) 179 { 180 switch (interface) { 181 case PHY_INTERFACE_MODE_SGMII: 182 case PHY_INTERFACE_MODE_1000BASEX: /* 1.25Mbd */ 183 return 1250; 184 case PHY_INTERFACE_MODE_2500BASEX: /* 3.125Mbd */ 185 return 3125; 186 case PHY_INTERFACE_MODE_5GBASER: /* 5.15625Mbd */ 187 return 5156; 188 case PHY_INTERFACE_MODE_10GBASER: /* 10.3125Mbd */ 189 return 10313; 190 default: 191 return 0; 192 } 193 } 194 195 /** 196 * phylink_interface_max_speed() - get the maximum speed of a phy interface 197 * @interface: phy interface mode defined by &typedef phy_interface_t 198 * 199 * Determine the maximum speed of a phy interface. This is intended to help 200 * determine the correct speed to pass to the MAC when the phy is performing 201 * rate matching. 202 * 203 * Return: The maximum speed of @interface 204 */ 205 static int phylink_interface_max_speed(phy_interface_t interface) 206 { 207 switch (interface) { 208 case PHY_INTERFACE_MODE_100BASEX: 209 case PHY_INTERFACE_MODE_REVRMII: 210 case PHY_INTERFACE_MODE_RMII: 211 case PHY_INTERFACE_MODE_SMII: 212 case PHY_INTERFACE_MODE_REVMII: 213 case PHY_INTERFACE_MODE_MII: 214 return SPEED_100; 215 216 case PHY_INTERFACE_MODE_TBI: 217 case PHY_INTERFACE_MODE_MOCA: 218 case PHY_INTERFACE_MODE_RTBI: 219 case PHY_INTERFACE_MODE_1000BASEX: 220 case PHY_INTERFACE_MODE_1000BASEKX: 221 case PHY_INTERFACE_MODE_TRGMII: 222 case PHY_INTERFACE_MODE_RGMII_TXID: 223 case PHY_INTERFACE_MODE_RGMII_RXID: 224 case PHY_INTERFACE_MODE_RGMII_ID: 225 case PHY_INTERFACE_MODE_RGMII: 226 case PHY_INTERFACE_MODE_PSGMII: 227 case PHY_INTERFACE_MODE_QSGMII: 228 case PHY_INTERFACE_MODE_QUSGMII: 229 case PHY_INTERFACE_MODE_SGMII: 230 case PHY_INTERFACE_MODE_GMII: 231 return SPEED_1000; 232 233 case PHY_INTERFACE_MODE_2500BASEX: 234 return SPEED_2500; 235 236 case PHY_INTERFACE_MODE_5GBASER: 237 return SPEED_5000; 238 239 case PHY_INTERFACE_MODE_XGMII: 240 case PHY_INTERFACE_MODE_RXAUI: 241 case PHY_INTERFACE_MODE_XAUI: 242 case PHY_INTERFACE_MODE_10GBASER: 243 case PHY_INTERFACE_MODE_10GKR: 244 case PHY_INTERFACE_MODE_USXGMII: 245 return SPEED_10000; 246 247 case PHY_INTERFACE_MODE_25GBASER: 248 return SPEED_25000; 249 250 case PHY_INTERFACE_MODE_XLGMII: 251 return SPEED_40000; 252 253 case PHY_INTERFACE_MODE_INTERNAL: 254 case PHY_INTERFACE_MODE_NA: 255 case PHY_INTERFACE_MODE_MAX: 256 /* No idea! Garbage in, unknown out */ 257 return SPEED_UNKNOWN; 258 } 259 260 /* If we get here, someone forgot to add an interface mode above */ 261 WARN_ON_ONCE(1); 262 return SPEED_UNKNOWN; 263 } 264 265 /** 266 * phylink_caps_to_linkmodes() - Convert capabilities to ethtool link modes 267 * @linkmodes: ethtool linkmode mask (must be already initialised) 268 * @caps: bitmask of MAC capabilities 269 * 270 * Set all possible pause, speed and duplex linkmodes in @linkmodes that are 271 * supported by the @caps. @linkmodes must have been initialised previously. 272 */ 273 static void phylink_caps_to_linkmodes(unsigned long *linkmodes, 274 unsigned long caps) 275 { 276 if (caps & MAC_SYM_PAUSE) 277 __set_bit(ETHTOOL_LINK_MODE_Pause_BIT, linkmodes); 278 279 if (caps & MAC_ASYM_PAUSE) 280 __set_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, linkmodes); 281 282 if (caps & MAC_10HD) { 283 __set_bit(ETHTOOL_LINK_MODE_10baseT_Half_BIT, linkmodes); 284 __set_bit(ETHTOOL_LINK_MODE_10baseT1S_Half_BIT, linkmodes); 285 __set_bit(ETHTOOL_LINK_MODE_10baseT1S_P2MP_Half_BIT, linkmodes); 286 } 287 288 if (caps & MAC_10FD) { 289 __set_bit(ETHTOOL_LINK_MODE_10baseT_Full_BIT, linkmodes); 290 __set_bit(ETHTOOL_LINK_MODE_10baseT1L_Full_BIT, linkmodes); 291 __set_bit(ETHTOOL_LINK_MODE_10baseT1S_Full_BIT, linkmodes); 292 } 293 294 if (caps & MAC_100HD) { 295 __set_bit(ETHTOOL_LINK_MODE_100baseT_Half_BIT, linkmodes); 296 __set_bit(ETHTOOL_LINK_MODE_100baseFX_Half_BIT, linkmodes); 297 } 298 299 if (caps & MAC_100FD) { 300 __set_bit(ETHTOOL_LINK_MODE_100baseT_Full_BIT, linkmodes); 301 __set_bit(ETHTOOL_LINK_MODE_100baseT1_Full_BIT, linkmodes); 302 __set_bit(ETHTOOL_LINK_MODE_100baseFX_Full_BIT, linkmodes); 303 } 304 305 if (caps & MAC_1000HD) 306 __set_bit(ETHTOOL_LINK_MODE_1000baseT_Half_BIT, linkmodes); 307 308 if (caps & MAC_1000FD) { 309 __set_bit(ETHTOOL_LINK_MODE_1000baseT_Full_BIT, linkmodes); 310 __set_bit(ETHTOOL_LINK_MODE_1000baseKX_Full_BIT, linkmodes); 311 __set_bit(ETHTOOL_LINK_MODE_1000baseX_Full_BIT, linkmodes); 312 __set_bit(ETHTOOL_LINK_MODE_1000baseT1_Full_BIT, linkmodes); 313 } 314 315 if (caps & MAC_2500FD) { 316 __set_bit(ETHTOOL_LINK_MODE_2500baseT_Full_BIT, linkmodes); 317 __set_bit(ETHTOOL_LINK_MODE_2500baseX_Full_BIT, linkmodes); 318 } 319 320 if (caps & MAC_5000FD) 321 __set_bit(ETHTOOL_LINK_MODE_5000baseT_Full_BIT, linkmodes); 322 323 if (caps & MAC_10000FD) { 324 __set_bit(ETHTOOL_LINK_MODE_10000baseT_Full_BIT, linkmodes); 325 __set_bit(ETHTOOL_LINK_MODE_10000baseKX4_Full_BIT, linkmodes); 326 __set_bit(ETHTOOL_LINK_MODE_10000baseKR_Full_BIT, linkmodes); 327 __set_bit(ETHTOOL_LINK_MODE_10000baseR_FEC_BIT, linkmodes); 328 __set_bit(ETHTOOL_LINK_MODE_10000baseCR_Full_BIT, linkmodes); 329 __set_bit(ETHTOOL_LINK_MODE_10000baseSR_Full_BIT, linkmodes); 330 __set_bit(ETHTOOL_LINK_MODE_10000baseLR_Full_BIT, linkmodes); 331 __set_bit(ETHTOOL_LINK_MODE_10000baseLRM_Full_BIT, linkmodes); 332 __set_bit(ETHTOOL_LINK_MODE_10000baseER_Full_BIT, linkmodes); 333 } 334 335 if (caps & MAC_25000FD) { 336 __set_bit(ETHTOOL_LINK_MODE_25000baseCR_Full_BIT, linkmodes); 337 __set_bit(ETHTOOL_LINK_MODE_25000baseKR_Full_BIT, linkmodes); 338 __set_bit(ETHTOOL_LINK_MODE_25000baseSR_Full_BIT, linkmodes); 339 } 340 341 if (caps & MAC_40000FD) { 342 __set_bit(ETHTOOL_LINK_MODE_40000baseKR4_Full_BIT, linkmodes); 343 __set_bit(ETHTOOL_LINK_MODE_40000baseCR4_Full_BIT, linkmodes); 344 __set_bit(ETHTOOL_LINK_MODE_40000baseSR4_Full_BIT, linkmodes); 345 __set_bit(ETHTOOL_LINK_MODE_40000baseLR4_Full_BIT, linkmodes); 346 } 347 348 if (caps & MAC_50000FD) { 349 __set_bit(ETHTOOL_LINK_MODE_50000baseCR2_Full_BIT, linkmodes); 350 __set_bit(ETHTOOL_LINK_MODE_50000baseKR2_Full_BIT, linkmodes); 351 __set_bit(ETHTOOL_LINK_MODE_50000baseSR2_Full_BIT, linkmodes); 352 __set_bit(ETHTOOL_LINK_MODE_50000baseKR_Full_BIT, linkmodes); 353 __set_bit(ETHTOOL_LINK_MODE_50000baseSR_Full_BIT, linkmodes); 354 __set_bit(ETHTOOL_LINK_MODE_50000baseCR_Full_BIT, linkmodes); 355 __set_bit(ETHTOOL_LINK_MODE_50000baseLR_ER_FR_Full_BIT, 356 linkmodes); 357 __set_bit(ETHTOOL_LINK_MODE_50000baseDR_Full_BIT, linkmodes); 358 } 359 360 if (caps & MAC_56000FD) { 361 __set_bit(ETHTOOL_LINK_MODE_56000baseKR4_Full_BIT, linkmodes); 362 __set_bit(ETHTOOL_LINK_MODE_56000baseCR4_Full_BIT, linkmodes); 363 __set_bit(ETHTOOL_LINK_MODE_56000baseSR4_Full_BIT, linkmodes); 364 __set_bit(ETHTOOL_LINK_MODE_56000baseLR4_Full_BIT, linkmodes); 365 } 366 367 if (caps & MAC_100000FD) { 368 __set_bit(ETHTOOL_LINK_MODE_100000baseKR4_Full_BIT, linkmodes); 369 __set_bit(ETHTOOL_LINK_MODE_100000baseSR4_Full_BIT, linkmodes); 370 __set_bit(ETHTOOL_LINK_MODE_100000baseCR4_Full_BIT, linkmodes); 371 __set_bit(ETHTOOL_LINK_MODE_100000baseLR4_ER4_Full_BIT, 372 linkmodes); 373 __set_bit(ETHTOOL_LINK_MODE_100000baseKR2_Full_BIT, linkmodes); 374 __set_bit(ETHTOOL_LINK_MODE_100000baseSR2_Full_BIT, linkmodes); 375 __set_bit(ETHTOOL_LINK_MODE_100000baseCR2_Full_BIT, linkmodes); 376 __set_bit(ETHTOOL_LINK_MODE_100000baseLR2_ER2_FR2_Full_BIT, 377 linkmodes); 378 __set_bit(ETHTOOL_LINK_MODE_100000baseDR2_Full_BIT, linkmodes); 379 __set_bit(ETHTOOL_LINK_MODE_100000baseKR_Full_BIT, linkmodes); 380 __set_bit(ETHTOOL_LINK_MODE_100000baseSR_Full_BIT, linkmodes); 381 __set_bit(ETHTOOL_LINK_MODE_100000baseLR_ER_FR_Full_BIT, 382 linkmodes); 383 __set_bit(ETHTOOL_LINK_MODE_100000baseCR_Full_BIT, linkmodes); 384 __set_bit(ETHTOOL_LINK_MODE_100000baseDR_Full_BIT, linkmodes); 385 } 386 387 if (caps & MAC_200000FD) { 388 __set_bit(ETHTOOL_LINK_MODE_200000baseKR4_Full_BIT, linkmodes); 389 __set_bit(ETHTOOL_LINK_MODE_200000baseSR4_Full_BIT, linkmodes); 390 __set_bit(ETHTOOL_LINK_MODE_200000baseLR4_ER4_FR4_Full_BIT, 391 linkmodes); 392 __set_bit(ETHTOOL_LINK_MODE_200000baseDR4_Full_BIT, linkmodes); 393 __set_bit(ETHTOOL_LINK_MODE_200000baseCR4_Full_BIT, linkmodes); 394 __set_bit(ETHTOOL_LINK_MODE_200000baseKR2_Full_BIT, linkmodes); 395 __set_bit(ETHTOOL_LINK_MODE_200000baseSR2_Full_BIT, linkmodes); 396 __set_bit(ETHTOOL_LINK_MODE_200000baseLR2_ER2_FR2_Full_BIT, 397 linkmodes); 398 __set_bit(ETHTOOL_LINK_MODE_200000baseDR2_Full_BIT, linkmodes); 399 __set_bit(ETHTOOL_LINK_MODE_200000baseCR2_Full_BIT, linkmodes); 400 } 401 402 if (caps & MAC_400000FD) { 403 __set_bit(ETHTOOL_LINK_MODE_400000baseKR8_Full_BIT, linkmodes); 404 __set_bit(ETHTOOL_LINK_MODE_400000baseSR8_Full_BIT, linkmodes); 405 __set_bit(ETHTOOL_LINK_MODE_400000baseLR8_ER8_FR8_Full_BIT, 406 linkmodes); 407 __set_bit(ETHTOOL_LINK_MODE_400000baseDR8_Full_BIT, linkmodes); 408 __set_bit(ETHTOOL_LINK_MODE_400000baseCR8_Full_BIT, linkmodes); 409 __set_bit(ETHTOOL_LINK_MODE_400000baseKR4_Full_BIT, linkmodes); 410 __set_bit(ETHTOOL_LINK_MODE_400000baseSR4_Full_BIT, linkmodes); 411 __set_bit(ETHTOOL_LINK_MODE_400000baseLR4_ER4_FR4_Full_BIT, 412 linkmodes); 413 __set_bit(ETHTOOL_LINK_MODE_400000baseDR4_Full_BIT, linkmodes); 414 __set_bit(ETHTOOL_LINK_MODE_400000baseCR4_Full_BIT, linkmodes); 415 } 416 } 417 418 static struct { 419 unsigned long mask; 420 int speed; 421 unsigned int duplex; 422 } phylink_caps_params[] = { 423 { MAC_400000FD, SPEED_400000, DUPLEX_FULL }, 424 { MAC_200000FD, SPEED_200000, DUPLEX_FULL }, 425 { MAC_100000FD, SPEED_100000, DUPLEX_FULL }, 426 { MAC_56000FD, SPEED_56000, DUPLEX_FULL }, 427 { MAC_50000FD, SPEED_50000, DUPLEX_FULL }, 428 { MAC_40000FD, SPEED_40000, DUPLEX_FULL }, 429 { MAC_25000FD, SPEED_25000, DUPLEX_FULL }, 430 { MAC_20000FD, SPEED_20000, DUPLEX_FULL }, 431 { MAC_10000FD, SPEED_10000, DUPLEX_FULL }, 432 { MAC_5000FD, SPEED_5000, DUPLEX_FULL }, 433 { MAC_2500FD, SPEED_2500, DUPLEX_FULL }, 434 { MAC_1000FD, SPEED_1000, DUPLEX_FULL }, 435 { MAC_1000HD, SPEED_1000, DUPLEX_HALF }, 436 { MAC_100FD, SPEED_100, DUPLEX_FULL }, 437 { MAC_100HD, SPEED_100, DUPLEX_HALF }, 438 { MAC_10FD, SPEED_10, DUPLEX_FULL }, 439 { MAC_10HD, SPEED_10, DUPLEX_HALF }, 440 }; 441 442 /** 443 * phylink_limit_mac_speed - limit the phylink_config to a maximum speed 444 * @config: pointer to a &struct phylink_config 445 * @max_speed: maximum speed 446 * 447 * Mask off MAC capabilities for speeds higher than the @max_speed parameter. 448 * Any further motifications of config.mac_capabilities will override this. 449 */ 450 void phylink_limit_mac_speed(struct phylink_config *config, u32 max_speed) 451 { 452 int i; 453 454 for (i = 0; i < ARRAY_SIZE(phylink_caps_params) && 455 phylink_caps_params[i].speed > max_speed; i++) 456 config->mac_capabilities &= ~phylink_caps_params[i].mask; 457 } 458 EXPORT_SYMBOL_GPL(phylink_limit_mac_speed); 459 460 /** 461 * phylink_cap_from_speed_duplex - Get mac capability from speed/duplex 462 * @speed: the speed to search for 463 * @duplex: the duplex to search for 464 * 465 * Find the mac capability for a given speed and duplex. 466 * 467 * Return: A mask with the mac capability patching @speed and @duplex, or 0 if 468 * there were no matches. 469 */ 470 static unsigned long phylink_cap_from_speed_duplex(int speed, 471 unsigned int duplex) 472 { 473 int i; 474 475 for (i = 0; i < ARRAY_SIZE(phylink_caps_params); i++) { 476 if (speed == phylink_caps_params[i].speed && 477 duplex == phylink_caps_params[i].duplex) 478 return phylink_caps_params[i].mask; 479 } 480 481 return 0; 482 } 483 484 /** 485 * phylink_get_capabilities() - get capabilities for a given MAC 486 * @interface: phy interface mode defined by &typedef phy_interface_t 487 * @mac_capabilities: bitmask of MAC capabilities 488 * @rate_matching: type of rate matching being performed 489 * 490 * Get the MAC capabilities that are supported by the @interface mode and 491 * @mac_capabilities. 492 */ 493 static unsigned long phylink_get_capabilities(phy_interface_t interface, 494 unsigned long mac_capabilities, 495 int rate_matching) 496 { 497 int max_speed = phylink_interface_max_speed(interface); 498 unsigned long caps = MAC_SYM_PAUSE | MAC_ASYM_PAUSE; 499 unsigned long matched_caps = 0; 500 501 switch (interface) { 502 case PHY_INTERFACE_MODE_USXGMII: 503 caps |= MAC_10000FD | MAC_5000FD | MAC_2500FD; 504 fallthrough; 505 506 case PHY_INTERFACE_MODE_RGMII_TXID: 507 case PHY_INTERFACE_MODE_RGMII_RXID: 508 case PHY_INTERFACE_MODE_RGMII_ID: 509 case PHY_INTERFACE_MODE_RGMII: 510 case PHY_INTERFACE_MODE_PSGMII: 511 case PHY_INTERFACE_MODE_QSGMII: 512 case PHY_INTERFACE_MODE_QUSGMII: 513 case PHY_INTERFACE_MODE_SGMII: 514 case PHY_INTERFACE_MODE_GMII: 515 caps |= MAC_1000HD | MAC_1000FD; 516 fallthrough; 517 518 case PHY_INTERFACE_MODE_REVRMII: 519 case PHY_INTERFACE_MODE_RMII: 520 case PHY_INTERFACE_MODE_SMII: 521 case PHY_INTERFACE_MODE_REVMII: 522 case PHY_INTERFACE_MODE_MII: 523 caps |= MAC_10HD | MAC_10FD; 524 fallthrough; 525 526 case PHY_INTERFACE_MODE_100BASEX: 527 caps |= MAC_100HD | MAC_100FD; 528 break; 529 530 case PHY_INTERFACE_MODE_TBI: 531 case PHY_INTERFACE_MODE_MOCA: 532 case PHY_INTERFACE_MODE_RTBI: 533 case PHY_INTERFACE_MODE_1000BASEX: 534 caps |= MAC_1000HD; 535 fallthrough; 536 case PHY_INTERFACE_MODE_1000BASEKX: 537 case PHY_INTERFACE_MODE_TRGMII: 538 caps |= MAC_1000FD; 539 break; 540 541 case PHY_INTERFACE_MODE_2500BASEX: 542 caps |= MAC_2500FD; 543 break; 544 545 case PHY_INTERFACE_MODE_5GBASER: 546 caps |= MAC_5000FD; 547 break; 548 549 case PHY_INTERFACE_MODE_XGMII: 550 case PHY_INTERFACE_MODE_RXAUI: 551 case PHY_INTERFACE_MODE_XAUI: 552 case PHY_INTERFACE_MODE_10GBASER: 553 case PHY_INTERFACE_MODE_10GKR: 554 caps |= MAC_10000FD; 555 break; 556 557 case PHY_INTERFACE_MODE_25GBASER: 558 caps |= MAC_25000FD; 559 break; 560 561 case PHY_INTERFACE_MODE_XLGMII: 562 caps |= MAC_40000FD; 563 break; 564 565 case PHY_INTERFACE_MODE_INTERNAL: 566 caps |= ~0; 567 break; 568 569 case PHY_INTERFACE_MODE_NA: 570 case PHY_INTERFACE_MODE_MAX: 571 break; 572 } 573 574 switch (rate_matching) { 575 case RATE_MATCH_OPEN_LOOP: 576 /* TODO */ 577 fallthrough; 578 case RATE_MATCH_NONE: 579 matched_caps = 0; 580 break; 581 case RATE_MATCH_PAUSE: { 582 /* The MAC must support asymmetric pause towards the local 583 * device for this. We could allow just symmetric pause, but 584 * then we might have to renegotiate if the link partner 585 * doesn't support pause. This is because there's no way to 586 * accept pause frames without transmitting them if we only 587 * support symmetric pause. 588 */ 589 if (!(mac_capabilities & MAC_SYM_PAUSE) || 590 !(mac_capabilities & MAC_ASYM_PAUSE)) 591 break; 592 593 /* We can't adapt if the MAC doesn't support the interface's 594 * max speed at full duplex. 595 */ 596 if (mac_capabilities & 597 phylink_cap_from_speed_duplex(max_speed, DUPLEX_FULL)) { 598 /* Although a duplex-matching phy might exist, we 599 * conservatively remove these modes because the MAC 600 * will not be aware of the half-duplex nature of the 601 * link. 602 */ 603 matched_caps = GENMASK(__fls(caps), __fls(MAC_10HD)); 604 matched_caps &= ~(MAC_1000HD | MAC_100HD | MAC_10HD); 605 } 606 break; 607 } 608 case RATE_MATCH_CRS: 609 /* The MAC must support half duplex at the interface's max 610 * speed. 611 */ 612 if (mac_capabilities & 613 phylink_cap_from_speed_duplex(max_speed, DUPLEX_HALF)) { 614 matched_caps = GENMASK(__fls(caps), __fls(MAC_10HD)); 615 matched_caps &= mac_capabilities; 616 } 617 break; 618 } 619 620 return (caps & mac_capabilities) | matched_caps; 621 } 622 623 /** 624 * phylink_validate_mask_caps() - Restrict link modes based on caps 625 * @supported: ethtool bitmask for supported link modes. 626 * @state: pointer to a &struct phylink_link_state. 627 * @mac_capabilities: bitmask of MAC capabilities 628 * 629 * Calculate the supported link modes based on @mac_capabilities, and restrict 630 * @supported and @state based on that. Use this function if your capabiliies 631 * aren't constant, such as if they vary depending on the interface. 632 */ 633 static void phylink_validate_mask_caps(unsigned long *supported, 634 struct phylink_link_state *state, 635 unsigned long mac_capabilities) 636 { 637 __ETHTOOL_DECLARE_LINK_MODE_MASK(mask) = { 0, }; 638 unsigned long caps; 639 640 phylink_set_port_modes(mask); 641 phylink_set(mask, Autoneg); 642 caps = phylink_get_capabilities(state->interface, mac_capabilities, 643 state->rate_matching); 644 phylink_caps_to_linkmodes(mask, caps); 645 646 linkmode_and(supported, supported, mask); 647 linkmode_and(state->advertising, state->advertising, mask); 648 } 649 650 static int phylink_validate_mac_and_pcs(struct phylink *pl, 651 unsigned long *supported, 652 struct phylink_link_state *state) 653 { 654 unsigned long capabilities; 655 struct phylink_pcs *pcs; 656 int ret; 657 658 /* Get the PCS for this interface mode */ 659 if (pl->using_mac_select_pcs) { 660 pcs = pl->mac_ops->mac_select_pcs(pl->config, state->interface); 661 if (IS_ERR(pcs)) 662 return PTR_ERR(pcs); 663 } else { 664 pcs = pl->pcs; 665 } 666 667 if (pcs) { 668 /* The PCS, if present, must be setup before phylink_create() 669 * has been called. If the ops is not initialised, print an 670 * error and backtrace rather than oopsing the kernel. 671 */ 672 if (!pcs->ops) { 673 phylink_err(pl, "interface %s: uninitialised PCS\n", 674 phy_modes(state->interface)); 675 dump_stack(); 676 return -EINVAL; 677 } 678 679 /* Validate the link parameters with the PCS */ 680 if (pcs->ops->pcs_validate) { 681 ret = pcs->ops->pcs_validate(pcs, supported, state); 682 if (ret < 0 || phylink_is_empty_linkmode(supported)) 683 return -EINVAL; 684 685 /* Ensure the advertising mask is a subset of the 686 * supported mask. 687 */ 688 linkmode_and(state->advertising, state->advertising, 689 supported); 690 } 691 } 692 693 /* Then validate the link parameters with the MAC */ 694 if (pl->mac_ops->mac_get_caps) 695 capabilities = pl->mac_ops->mac_get_caps(pl->config, 696 state->interface); 697 else 698 capabilities = pl->config->mac_capabilities; 699 700 phylink_validate_mask_caps(supported, state, capabilities); 701 702 return phylink_is_empty_linkmode(supported) ? -EINVAL : 0; 703 } 704 705 static void phylink_validate_one(struct phylink *pl, struct phy_device *phy, 706 const unsigned long *supported, 707 const struct phylink_link_state *state, 708 phy_interface_t interface, 709 unsigned long *accum_supported, 710 unsigned long *accum_advertising) 711 { 712 __ETHTOOL_DECLARE_LINK_MODE_MASK(tmp_supported); 713 struct phylink_link_state tmp_state; 714 715 linkmode_copy(tmp_supported, supported); 716 717 tmp_state = *state; 718 tmp_state.interface = interface; 719 720 if (phy) 721 tmp_state.rate_matching = phy_get_rate_matching(phy, interface); 722 723 if (!phylink_validate_mac_and_pcs(pl, tmp_supported, &tmp_state)) { 724 phylink_dbg(pl, " interface %u (%s) rate match %s supports %*pbl\n", 725 interface, phy_modes(interface), 726 phy_rate_matching_to_str(tmp_state.rate_matching), 727 __ETHTOOL_LINK_MODE_MASK_NBITS, tmp_supported); 728 729 linkmode_or(accum_supported, accum_supported, tmp_supported); 730 linkmode_or(accum_advertising, accum_advertising, 731 tmp_state.advertising); 732 } 733 } 734 735 static int phylink_validate_mask(struct phylink *pl, struct phy_device *phy, 736 unsigned long *supported, 737 struct phylink_link_state *state, 738 const unsigned long *interfaces) 739 { 740 __ETHTOOL_DECLARE_LINK_MODE_MASK(all_adv) = { 0, }; 741 __ETHTOOL_DECLARE_LINK_MODE_MASK(all_s) = { 0, }; 742 int interface; 743 744 for_each_set_bit(interface, interfaces, PHY_INTERFACE_MODE_MAX) 745 phylink_validate_one(pl, phy, supported, state, interface, 746 all_s, all_adv); 747 748 linkmode_copy(supported, all_s); 749 linkmode_copy(state->advertising, all_adv); 750 751 return phylink_is_empty_linkmode(supported) ? -EINVAL : 0; 752 } 753 754 static int phylink_validate(struct phylink *pl, unsigned long *supported, 755 struct phylink_link_state *state) 756 { 757 const unsigned long *interfaces = pl->config->supported_interfaces; 758 759 if (state->interface == PHY_INTERFACE_MODE_NA) 760 return phylink_validate_mask(pl, NULL, supported, state, 761 interfaces); 762 763 if (!test_bit(state->interface, interfaces)) 764 return -EINVAL; 765 766 return phylink_validate_mac_and_pcs(pl, supported, state); 767 } 768 769 static int phylink_parse_fixedlink(struct phylink *pl, 770 const struct fwnode_handle *fwnode) 771 { 772 struct fwnode_handle *fixed_node; 773 bool pause, asym_pause, autoneg; 774 const struct phy_setting *s; 775 struct gpio_desc *desc; 776 u32 speed; 777 int ret; 778 779 fixed_node = fwnode_get_named_child_node(fwnode, "fixed-link"); 780 if (fixed_node) { 781 ret = fwnode_property_read_u32(fixed_node, "speed", &speed); 782 783 pl->link_config.speed = speed; 784 pl->link_config.duplex = DUPLEX_HALF; 785 786 if (fwnode_property_read_bool(fixed_node, "full-duplex")) 787 pl->link_config.duplex = DUPLEX_FULL; 788 789 /* We treat the "pause" and "asym-pause" terminology as 790 * defining the link partner's ability. 791 */ 792 if (fwnode_property_read_bool(fixed_node, "pause")) 793 __set_bit(ETHTOOL_LINK_MODE_Pause_BIT, 794 pl->link_config.lp_advertising); 795 if (fwnode_property_read_bool(fixed_node, "asym-pause")) 796 __set_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, 797 pl->link_config.lp_advertising); 798 799 if (ret == 0) { 800 desc = fwnode_gpiod_get_index(fixed_node, "link", 0, 801 GPIOD_IN, "?"); 802 803 if (!IS_ERR(desc)) 804 pl->link_gpio = desc; 805 else if (desc == ERR_PTR(-EPROBE_DEFER)) 806 ret = -EPROBE_DEFER; 807 } 808 fwnode_handle_put(fixed_node); 809 810 if (ret) 811 return ret; 812 } else { 813 u32 prop[5]; 814 815 ret = fwnode_property_read_u32_array(fwnode, "fixed-link", 816 NULL, 0); 817 if (ret != ARRAY_SIZE(prop)) { 818 phylink_err(pl, "broken fixed-link?\n"); 819 return -EINVAL; 820 } 821 822 ret = fwnode_property_read_u32_array(fwnode, "fixed-link", 823 prop, ARRAY_SIZE(prop)); 824 if (!ret) { 825 pl->link_config.duplex = prop[1] ? 826 DUPLEX_FULL : DUPLEX_HALF; 827 pl->link_config.speed = prop[2]; 828 if (prop[3]) 829 __set_bit(ETHTOOL_LINK_MODE_Pause_BIT, 830 pl->link_config.lp_advertising); 831 if (prop[4]) 832 __set_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, 833 pl->link_config.lp_advertising); 834 } 835 } 836 837 if (pl->link_config.speed > SPEED_1000 && 838 pl->link_config.duplex != DUPLEX_FULL) 839 phylink_warn(pl, "fixed link specifies half duplex for %dMbps link?\n", 840 pl->link_config.speed); 841 842 linkmode_fill(pl->supported); 843 linkmode_copy(pl->link_config.advertising, pl->supported); 844 phylink_validate(pl, pl->supported, &pl->link_config); 845 846 pause = phylink_test(pl->supported, Pause); 847 asym_pause = phylink_test(pl->supported, Asym_Pause); 848 autoneg = phylink_test(pl->supported, Autoneg); 849 s = phy_lookup_setting(pl->link_config.speed, pl->link_config.duplex, 850 pl->supported, true); 851 linkmode_zero(pl->supported); 852 phylink_set(pl->supported, MII); 853 854 if (pause) 855 phylink_set(pl->supported, Pause); 856 857 if (asym_pause) 858 phylink_set(pl->supported, Asym_Pause); 859 860 if (autoneg) 861 phylink_set(pl->supported, Autoneg); 862 863 if (s) { 864 __set_bit(s->bit, pl->supported); 865 __set_bit(s->bit, pl->link_config.lp_advertising); 866 } else { 867 phylink_warn(pl, "fixed link %s duplex %dMbps not recognised\n", 868 pl->link_config.duplex == DUPLEX_FULL ? "full" : "half", 869 pl->link_config.speed); 870 } 871 872 linkmode_and(pl->link_config.advertising, pl->link_config.advertising, 873 pl->supported); 874 875 pl->link_config.link = 1; 876 pl->link_config.an_complete = 1; 877 878 return 0; 879 } 880 881 static int phylink_parse_mode(struct phylink *pl, 882 const struct fwnode_handle *fwnode) 883 { 884 struct fwnode_handle *dn; 885 const char *managed; 886 unsigned long caps; 887 888 if (pl->config->default_an_inband) 889 pl->cfg_link_an_mode = MLO_AN_INBAND; 890 891 dn = fwnode_get_named_child_node(fwnode, "fixed-link"); 892 if (dn || fwnode_property_present(fwnode, "fixed-link")) 893 pl->cfg_link_an_mode = MLO_AN_FIXED; 894 fwnode_handle_put(dn); 895 896 if ((fwnode_property_read_string(fwnode, "managed", &managed) == 0 && 897 strcmp(managed, "in-band-status") == 0)) { 898 if (pl->cfg_link_an_mode == MLO_AN_FIXED) { 899 phylink_err(pl, 900 "can't use both fixed-link and in-band-status\n"); 901 return -EINVAL; 902 } 903 904 pl->cfg_link_an_mode = MLO_AN_INBAND; 905 } 906 907 if (pl->cfg_link_an_mode == MLO_AN_INBAND) { 908 linkmode_zero(pl->supported); 909 phylink_set(pl->supported, MII); 910 phylink_set(pl->supported, Autoneg); 911 phylink_set(pl->supported, Asym_Pause); 912 phylink_set(pl->supported, Pause); 913 914 switch (pl->link_config.interface) { 915 case PHY_INTERFACE_MODE_SGMII: 916 case PHY_INTERFACE_MODE_PSGMII: 917 case PHY_INTERFACE_MODE_QSGMII: 918 case PHY_INTERFACE_MODE_QUSGMII: 919 case PHY_INTERFACE_MODE_RGMII: 920 case PHY_INTERFACE_MODE_RGMII_ID: 921 case PHY_INTERFACE_MODE_RGMII_RXID: 922 case PHY_INTERFACE_MODE_RGMII_TXID: 923 case PHY_INTERFACE_MODE_RTBI: 924 case PHY_INTERFACE_MODE_1000BASEX: 925 case PHY_INTERFACE_MODE_2500BASEX: 926 case PHY_INTERFACE_MODE_5GBASER: 927 case PHY_INTERFACE_MODE_25GBASER: 928 case PHY_INTERFACE_MODE_USXGMII: 929 case PHY_INTERFACE_MODE_10GKR: 930 case PHY_INTERFACE_MODE_10GBASER: 931 case PHY_INTERFACE_MODE_XLGMII: 932 caps = ~(MAC_SYM_PAUSE | MAC_ASYM_PAUSE); 933 caps = phylink_get_capabilities(pl->link_config.interface, caps, 934 RATE_MATCH_NONE); 935 phylink_caps_to_linkmodes(pl->supported, caps); 936 break; 937 938 default: 939 phylink_err(pl, 940 "incorrect link mode %s for in-band status\n", 941 phy_modes(pl->link_config.interface)); 942 return -EINVAL; 943 } 944 945 linkmode_copy(pl->link_config.advertising, pl->supported); 946 947 if (phylink_validate(pl, pl->supported, &pl->link_config)) { 948 phylink_err(pl, 949 "failed to validate link configuration for in-band status\n"); 950 return -EINVAL; 951 } 952 } 953 954 return 0; 955 } 956 957 static void phylink_apply_manual_flow(struct phylink *pl, 958 struct phylink_link_state *state) 959 { 960 /* If autoneg is disabled, pause AN is also disabled */ 961 if (!linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, 962 state->advertising)) 963 state->pause &= ~MLO_PAUSE_AN; 964 965 /* Manual configuration of pause modes */ 966 if (!(pl->link_config.pause & MLO_PAUSE_AN)) 967 state->pause = pl->link_config.pause; 968 } 969 970 static void phylink_resolve_an_pause(struct phylink_link_state *state) 971 { 972 bool tx_pause, rx_pause; 973 974 if (state->duplex == DUPLEX_FULL) { 975 linkmode_resolve_pause(state->advertising, 976 state->lp_advertising, 977 &tx_pause, &rx_pause); 978 if (tx_pause) 979 state->pause |= MLO_PAUSE_TX; 980 if (rx_pause) 981 state->pause |= MLO_PAUSE_RX; 982 } 983 } 984 985 static void phylink_pcs_pre_config(struct phylink_pcs *pcs, 986 phy_interface_t interface) 987 { 988 if (pcs && pcs->ops->pcs_pre_config) 989 pcs->ops->pcs_pre_config(pcs, interface); 990 } 991 992 static int phylink_pcs_post_config(struct phylink_pcs *pcs, 993 phy_interface_t interface) 994 { 995 int err = 0; 996 997 if (pcs && pcs->ops->pcs_post_config) 998 err = pcs->ops->pcs_post_config(pcs, interface); 999 1000 return err; 1001 } 1002 1003 static void phylink_pcs_disable(struct phylink_pcs *pcs) 1004 { 1005 if (pcs && pcs->ops->pcs_disable) 1006 pcs->ops->pcs_disable(pcs); 1007 } 1008 1009 static int phylink_pcs_enable(struct phylink_pcs *pcs) 1010 { 1011 int err = 0; 1012 1013 if (pcs && pcs->ops->pcs_enable) 1014 err = pcs->ops->pcs_enable(pcs); 1015 1016 return err; 1017 } 1018 1019 static int phylink_pcs_config(struct phylink_pcs *pcs, unsigned int neg_mode, 1020 const struct phylink_link_state *state, 1021 bool permit_pause_to_mac) 1022 { 1023 if (!pcs) 1024 return 0; 1025 1026 return pcs->ops->pcs_config(pcs, neg_mode, state->interface, 1027 state->advertising, permit_pause_to_mac); 1028 } 1029 1030 static void phylink_pcs_link_up(struct phylink_pcs *pcs, unsigned int neg_mode, 1031 phy_interface_t interface, int speed, 1032 int duplex) 1033 { 1034 if (pcs && pcs->ops->pcs_link_up) 1035 pcs->ops->pcs_link_up(pcs, neg_mode, interface, speed, duplex); 1036 } 1037 1038 static void phylink_pcs_poll_stop(struct phylink *pl) 1039 { 1040 if (pl->cfg_link_an_mode == MLO_AN_INBAND) 1041 del_timer(&pl->link_poll); 1042 } 1043 1044 static void phylink_pcs_poll_start(struct phylink *pl) 1045 { 1046 if (pl->pcs && pl->pcs->poll && pl->cfg_link_an_mode == MLO_AN_INBAND) 1047 mod_timer(&pl->link_poll, jiffies + HZ); 1048 } 1049 1050 int phylink_pcs_pre_init(struct phylink *pl, struct phylink_pcs *pcs) 1051 { 1052 int ret = 0; 1053 1054 /* Signal to PCS driver that MAC requires RX clock for init */ 1055 if (pl->config->mac_requires_rxc) 1056 pcs->rxc_always_on = true; 1057 1058 if (pcs->ops->pcs_pre_init) 1059 ret = pcs->ops->pcs_pre_init(pcs); 1060 1061 return ret; 1062 } 1063 EXPORT_SYMBOL_GPL(phylink_pcs_pre_init); 1064 1065 static void phylink_mac_config(struct phylink *pl, 1066 const struct phylink_link_state *state) 1067 { 1068 struct phylink_link_state st = *state; 1069 1070 /* Stop drivers incorrectly using these */ 1071 linkmode_zero(st.lp_advertising); 1072 st.speed = SPEED_UNKNOWN; 1073 st.duplex = DUPLEX_UNKNOWN; 1074 st.an_complete = false; 1075 st.link = false; 1076 1077 phylink_dbg(pl, 1078 "%s: mode=%s/%s/%s adv=%*pb pause=%02x\n", 1079 __func__, phylink_an_mode_str(pl->cur_link_an_mode), 1080 phy_modes(st.interface), 1081 phy_rate_matching_to_str(st.rate_matching), 1082 __ETHTOOL_LINK_MODE_MASK_NBITS, st.advertising, 1083 st.pause); 1084 1085 pl->mac_ops->mac_config(pl->config, pl->cur_link_an_mode, &st); 1086 } 1087 1088 static void phylink_pcs_an_restart(struct phylink *pl) 1089 { 1090 if (pl->pcs && linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, 1091 pl->link_config.advertising) && 1092 phy_interface_mode_is_8023z(pl->link_config.interface) && 1093 phylink_autoneg_inband(pl->cur_link_an_mode)) 1094 pl->pcs->ops->pcs_an_restart(pl->pcs); 1095 } 1096 1097 /** 1098 * phylink_pcs_neg_mode() - helper to determine PCS inband mode 1099 * @mode: one of %MLO_AN_FIXED, %MLO_AN_PHY, %MLO_AN_INBAND. 1100 * @interface: interface mode to be used 1101 * @advertising: adertisement ethtool link mode mask 1102 * 1103 * Determines the negotiation mode to be used by the PCS, and returns 1104 * one of: 1105 * 1106 * - %PHYLINK_PCS_NEG_NONE: interface mode does not support inband 1107 * - %PHYLINK_PCS_NEG_OUTBAND: an out of band mode (e.g. reading the PHY) 1108 * will be used. 1109 * - %PHYLINK_PCS_NEG_INBAND_DISABLED: inband mode selected but autoneg 1110 * disabled 1111 * - %PHYLINK_PCS_NEG_INBAND_ENABLED: inband mode selected and autoneg enabled 1112 * 1113 * Note: this is for cases where the PCS itself is involved in negotiation 1114 * (e.g. Clause 37, SGMII and similar) not Clause 73. 1115 */ 1116 static unsigned int phylink_pcs_neg_mode(unsigned int mode, 1117 phy_interface_t interface, 1118 const unsigned long *advertising) 1119 { 1120 unsigned int neg_mode; 1121 1122 switch (interface) { 1123 case PHY_INTERFACE_MODE_SGMII: 1124 case PHY_INTERFACE_MODE_QSGMII: 1125 case PHY_INTERFACE_MODE_QUSGMII: 1126 case PHY_INTERFACE_MODE_USXGMII: 1127 /* These protocols are designed for use with a PHY which 1128 * communicates its negotiation result back to the MAC via 1129 * inband communication. Note: there exist PHYs that run 1130 * with SGMII but do not send the inband data. 1131 */ 1132 if (!phylink_autoneg_inband(mode)) 1133 neg_mode = PHYLINK_PCS_NEG_OUTBAND; 1134 else 1135 neg_mode = PHYLINK_PCS_NEG_INBAND_ENABLED; 1136 break; 1137 1138 case PHY_INTERFACE_MODE_1000BASEX: 1139 case PHY_INTERFACE_MODE_2500BASEX: 1140 /* 1000base-X is designed for use media-side for Fibre 1141 * connections, and thus the Autoneg bit needs to be 1142 * taken into account. We also do this for 2500base-X 1143 * as well, but drivers may not support this, so may 1144 * need to override this. 1145 */ 1146 if (!phylink_autoneg_inband(mode)) 1147 neg_mode = PHYLINK_PCS_NEG_OUTBAND; 1148 else if (linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, 1149 advertising)) 1150 neg_mode = PHYLINK_PCS_NEG_INBAND_ENABLED; 1151 else 1152 neg_mode = PHYLINK_PCS_NEG_INBAND_DISABLED; 1153 break; 1154 1155 default: 1156 neg_mode = PHYLINK_PCS_NEG_NONE; 1157 break; 1158 } 1159 1160 return neg_mode; 1161 } 1162 1163 static void phylink_major_config(struct phylink *pl, bool restart, 1164 const struct phylink_link_state *state) 1165 { 1166 struct phylink_pcs *pcs = NULL; 1167 bool pcs_changed = false; 1168 unsigned int rate_kbd; 1169 unsigned int neg_mode; 1170 int err; 1171 1172 phylink_dbg(pl, "major config %s\n", phy_modes(state->interface)); 1173 1174 pl->pcs_neg_mode = phylink_pcs_neg_mode(pl->cur_link_an_mode, 1175 state->interface, 1176 state->advertising); 1177 1178 if (pl->using_mac_select_pcs) { 1179 pcs = pl->mac_ops->mac_select_pcs(pl->config, state->interface); 1180 if (IS_ERR(pcs)) { 1181 phylink_err(pl, 1182 "mac_select_pcs unexpectedly failed: %pe\n", 1183 pcs); 1184 return; 1185 } 1186 1187 pcs_changed = pcs && pl->pcs != pcs; 1188 } 1189 1190 phylink_pcs_poll_stop(pl); 1191 1192 if (pl->mac_ops->mac_prepare) { 1193 err = pl->mac_ops->mac_prepare(pl->config, pl->cur_link_an_mode, 1194 state->interface); 1195 if (err < 0) { 1196 phylink_err(pl, "mac_prepare failed: %pe\n", 1197 ERR_PTR(err)); 1198 return; 1199 } 1200 } 1201 1202 /* If we have a new PCS, switch to the new PCS after preparing the MAC 1203 * for the change. 1204 */ 1205 if (pcs_changed) { 1206 phylink_pcs_disable(pl->pcs); 1207 1208 if (pl->pcs) 1209 pl->pcs->phylink = NULL; 1210 1211 pcs->phylink = pl; 1212 1213 pl->pcs = pcs; 1214 } 1215 1216 if (pl->pcs) 1217 phylink_pcs_pre_config(pl->pcs, state->interface); 1218 1219 phylink_mac_config(pl, state); 1220 1221 if (pl->pcs) 1222 phylink_pcs_post_config(pl->pcs, state->interface); 1223 1224 if (pl->pcs_state == PCS_STATE_STARTING || pcs_changed) 1225 phylink_pcs_enable(pl->pcs); 1226 1227 neg_mode = pl->cur_link_an_mode; 1228 if (pl->pcs && pl->pcs->neg_mode) 1229 neg_mode = pl->pcs_neg_mode; 1230 1231 err = phylink_pcs_config(pl->pcs, neg_mode, state, 1232 !!(pl->link_config.pause & MLO_PAUSE_AN)); 1233 if (err < 0) 1234 phylink_err(pl, "pcs_config failed: %pe\n", 1235 ERR_PTR(err)); 1236 else if (err > 0) 1237 restart = true; 1238 1239 if (restart) 1240 phylink_pcs_an_restart(pl); 1241 1242 if (pl->mac_ops->mac_finish) { 1243 err = pl->mac_ops->mac_finish(pl->config, pl->cur_link_an_mode, 1244 state->interface); 1245 if (err < 0) 1246 phylink_err(pl, "mac_finish failed: %pe\n", 1247 ERR_PTR(err)); 1248 } 1249 1250 if (pl->sfp_bus) { 1251 rate_kbd = phylink_interface_signal_rate(state->interface); 1252 if (rate_kbd) 1253 sfp_upstream_set_signal_rate(pl->sfp_bus, rate_kbd); 1254 } 1255 1256 phylink_pcs_poll_start(pl); 1257 } 1258 1259 /* 1260 * Reconfigure for a change of inband advertisement. 1261 * If we have a separate PCS, we only need to call its pcs_config() method, 1262 * and then restart AN if it indicates something changed. Otherwise, we do 1263 * the full MAC reconfiguration. 1264 */ 1265 static int phylink_change_inband_advert(struct phylink *pl) 1266 { 1267 unsigned int neg_mode; 1268 int ret; 1269 1270 if (test_bit(PHYLINK_DISABLE_STOPPED, &pl->phylink_disable_state)) 1271 return 0; 1272 1273 phylink_dbg(pl, "%s: mode=%s/%s adv=%*pb pause=%02x\n", __func__, 1274 phylink_an_mode_str(pl->cur_link_an_mode), 1275 phy_modes(pl->link_config.interface), 1276 __ETHTOOL_LINK_MODE_MASK_NBITS, pl->link_config.advertising, 1277 pl->link_config.pause); 1278 1279 /* Recompute the PCS neg mode */ 1280 pl->pcs_neg_mode = phylink_pcs_neg_mode(pl->cur_link_an_mode, 1281 pl->link_config.interface, 1282 pl->link_config.advertising); 1283 1284 neg_mode = pl->cur_link_an_mode; 1285 if (pl->pcs->neg_mode) 1286 neg_mode = pl->pcs_neg_mode; 1287 1288 /* Modern PCS-based method; update the advert at the PCS, and 1289 * restart negotiation if the pcs_config() helper indicates that 1290 * the programmed advertisement has changed. 1291 */ 1292 ret = phylink_pcs_config(pl->pcs, neg_mode, &pl->link_config, 1293 !!(pl->link_config.pause & MLO_PAUSE_AN)); 1294 if (ret < 0) 1295 return ret; 1296 1297 if (ret > 0) 1298 phylink_pcs_an_restart(pl); 1299 1300 return 0; 1301 } 1302 1303 static void phylink_mac_pcs_get_state(struct phylink *pl, 1304 struct phylink_link_state *state) 1305 { 1306 linkmode_copy(state->advertising, pl->link_config.advertising); 1307 linkmode_zero(state->lp_advertising); 1308 state->interface = pl->link_config.interface; 1309 state->rate_matching = pl->link_config.rate_matching; 1310 if (linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, 1311 state->advertising)) { 1312 state->speed = SPEED_UNKNOWN; 1313 state->duplex = DUPLEX_UNKNOWN; 1314 state->pause = MLO_PAUSE_NONE; 1315 } else { 1316 state->speed = pl->link_config.speed; 1317 state->duplex = pl->link_config.duplex; 1318 state->pause = pl->link_config.pause; 1319 } 1320 state->an_complete = 0; 1321 state->link = 1; 1322 1323 if (pl->pcs) 1324 pl->pcs->ops->pcs_get_state(pl->pcs, state); 1325 else 1326 state->link = 0; 1327 } 1328 1329 /* The fixed state is... fixed except for the link state, 1330 * which may be determined by a GPIO or a callback. 1331 */ 1332 static void phylink_get_fixed_state(struct phylink *pl, 1333 struct phylink_link_state *state) 1334 { 1335 *state = pl->link_config; 1336 if (pl->config->get_fixed_state) 1337 pl->config->get_fixed_state(pl->config, state); 1338 else if (pl->link_gpio) 1339 state->link = !!gpiod_get_value_cansleep(pl->link_gpio); 1340 1341 state->pause = MLO_PAUSE_NONE; 1342 phylink_resolve_an_pause(state); 1343 } 1344 1345 static void phylink_mac_initial_config(struct phylink *pl, bool force_restart) 1346 { 1347 struct phylink_link_state link_state; 1348 1349 switch (pl->cur_link_an_mode) { 1350 case MLO_AN_PHY: 1351 link_state = pl->phy_state; 1352 break; 1353 1354 case MLO_AN_FIXED: 1355 phylink_get_fixed_state(pl, &link_state); 1356 break; 1357 1358 case MLO_AN_INBAND: 1359 link_state = pl->link_config; 1360 if (link_state.interface == PHY_INTERFACE_MODE_SGMII) 1361 link_state.pause = MLO_PAUSE_NONE; 1362 break; 1363 1364 default: /* can't happen */ 1365 return; 1366 } 1367 1368 link_state.link = false; 1369 1370 phylink_apply_manual_flow(pl, &link_state); 1371 phylink_major_config(pl, force_restart, &link_state); 1372 } 1373 1374 static const char *phylink_pause_to_str(int pause) 1375 { 1376 switch (pause & MLO_PAUSE_TXRX_MASK) { 1377 case MLO_PAUSE_TX | MLO_PAUSE_RX: 1378 return "rx/tx"; 1379 case MLO_PAUSE_TX: 1380 return "tx"; 1381 case MLO_PAUSE_RX: 1382 return "rx"; 1383 default: 1384 return "off"; 1385 } 1386 } 1387 1388 static void phylink_link_up(struct phylink *pl, 1389 struct phylink_link_state link_state) 1390 { 1391 struct net_device *ndev = pl->netdev; 1392 unsigned int neg_mode; 1393 int speed, duplex; 1394 bool rx_pause; 1395 1396 speed = link_state.speed; 1397 duplex = link_state.duplex; 1398 rx_pause = !!(link_state.pause & MLO_PAUSE_RX); 1399 1400 switch (link_state.rate_matching) { 1401 case RATE_MATCH_PAUSE: 1402 /* The PHY is doing rate matchion from the media rate (in 1403 * the link_state) to the interface speed, and will send 1404 * pause frames to the MAC to limit its transmission speed. 1405 */ 1406 speed = phylink_interface_max_speed(link_state.interface); 1407 duplex = DUPLEX_FULL; 1408 rx_pause = true; 1409 break; 1410 1411 case RATE_MATCH_CRS: 1412 /* The PHY is doing rate matchion from the media rate (in 1413 * the link_state) to the interface speed, and will cause 1414 * collisions to the MAC to limit its transmission speed. 1415 */ 1416 speed = phylink_interface_max_speed(link_state.interface); 1417 duplex = DUPLEX_HALF; 1418 break; 1419 } 1420 1421 pl->cur_interface = link_state.interface; 1422 1423 neg_mode = pl->cur_link_an_mode; 1424 if (pl->pcs && pl->pcs->neg_mode) 1425 neg_mode = pl->pcs_neg_mode; 1426 1427 phylink_pcs_link_up(pl->pcs, neg_mode, pl->cur_interface, speed, 1428 duplex); 1429 1430 pl->mac_ops->mac_link_up(pl->config, pl->phydev, pl->cur_link_an_mode, 1431 pl->cur_interface, speed, duplex, 1432 !!(link_state.pause & MLO_PAUSE_TX), rx_pause); 1433 1434 if (ndev) 1435 netif_carrier_on(ndev); 1436 1437 phylink_info(pl, 1438 "Link is Up - %s/%s - flow control %s\n", 1439 phy_speed_to_str(link_state.speed), 1440 phy_duplex_to_str(link_state.duplex), 1441 phylink_pause_to_str(link_state.pause)); 1442 } 1443 1444 static void phylink_link_down(struct phylink *pl) 1445 { 1446 struct net_device *ndev = pl->netdev; 1447 1448 if (ndev) 1449 netif_carrier_off(ndev); 1450 pl->mac_ops->mac_link_down(pl->config, pl->cur_link_an_mode, 1451 pl->cur_interface); 1452 phylink_info(pl, "Link is Down\n"); 1453 } 1454 1455 static void phylink_resolve(struct work_struct *w) 1456 { 1457 struct phylink *pl = container_of(w, struct phylink, resolve); 1458 struct phylink_link_state link_state; 1459 struct net_device *ndev = pl->netdev; 1460 bool mac_config = false; 1461 bool retrigger = false; 1462 bool cur_link_state; 1463 1464 mutex_lock(&pl->state_mutex); 1465 if (pl->netdev) 1466 cur_link_state = netif_carrier_ok(ndev); 1467 else 1468 cur_link_state = pl->old_link_state; 1469 1470 if (pl->phylink_disable_state) { 1471 pl->mac_link_dropped = false; 1472 link_state.link = false; 1473 } else if (pl->mac_link_dropped) { 1474 link_state.link = false; 1475 retrigger = true; 1476 } else { 1477 switch (pl->cur_link_an_mode) { 1478 case MLO_AN_PHY: 1479 link_state = pl->phy_state; 1480 phylink_apply_manual_flow(pl, &link_state); 1481 mac_config = link_state.link; 1482 break; 1483 1484 case MLO_AN_FIXED: 1485 phylink_get_fixed_state(pl, &link_state); 1486 mac_config = link_state.link; 1487 break; 1488 1489 case MLO_AN_INBAND: 1490 phylink_mac_pcs_get_state(pl, &link_state); 1491 1492 /* The PCS may have a latching link-fail indicator. 1493 * If the link was up, bring the link down and 1494 * re-trigger the resolve. Otherwise, re-read the 1495 * PCS state to get the current status of the link. 1496 */ 1497 if (!link_state.link) { 1498 if (cur_link_state) 1499 retrigger = true; 1500 else 1501 phylink_mac_pcs_get_state(pl, 1502 &link_state); 1503 } 1504 1505 /* If we have a phy, the "up" state is the union of 1506 * both the PHY and the MAC 1507 */ 1508 if (pl->phydev) 1509 link_state.link &= pl->phy_state.link; 1510 1511 /* Only update if the PHY link is up */ 1512 if (pl->phydev && pl->phy_state.link) { 1513 /* If the interface has changed, force a 1514 * link down event if the link isn't already 1515 * down, and re-resolve. 1516 */ 1517 if (link_state.interface != 1518 pl->phy_state.interface) { 1519 retrigger = true; 1520 link_state.link = false; 1521 } 1522 link_state.interface = pl->phy_state.interface; 1523 1524 /* If we are doing rate matching, then the 1525 * link speed/duplex comes from the PHY 1526 */ 1527 if (pl->phy_state.rate_matching) { 1528 link_state.rate_matching = 1529 pl->phy_state.rate_matching; 1530 link_state.speed = pl->phy_state.speed; 1531 link_state.duplex = 1532 pl->phy_state.duplex; 1533 } 1534 1535 /* If we have a PHY, we need to update with 1536 * the PHY flow control bits. 1537 */ 1538 link_state.pause = pl->phy_state.pause; 1539 mac_config = true; 1540 } 1541 phylink_apply_manual_flow(pl, &link_state); 1542 break; 1543 } 1544 } 1545 1546 if (mac_config) { 1547 if (link_state.interface != pl->link_config.interface) { 1548 /* The interface has changed, force the link down and 1549 * then reconfigure. 1550 */ 1551 if (cur_link_state) { 1552 phylink_link_down(pl); 1553 cur_link_state = false; 1554 } 1555 phylink_major_config(pl, false, &link_state); 1556 pl->link_config.interface = link_state.interface; 1557 } 1558 } 1559 1560 if (link_state.link != cur_link_state) { 1561 pl->old_link_state = link_state.link; 1562 if (!link_state.link) 1563 phylink_link_down(pl); 1564 else 1565 phylink_link_up(pl, link_state); 1566 } 1567 if (!link_state.link && retrigger) { 1568 pl->mac_link_dropped = false; 1569 queue_work(system_power_efficient_wq, &pl->resolve); 1570 } 1571 mutex_unlock(&pl->state_mutex); 1572 } 1573 1574 static void phylink_run_resolve(struct phylink *pl) 1575 { 1576 if (!pl->phylink_disable_state) 1577 queue_work(system_power_efficient_wq, &pl->resolve); 1578 } 1579 1580 static void phylink_run_resolve_and_disable(struct phylink *pl, int bit) 1581 { 1582 unsigned long state = pl->phylink_disable_state; 1583 1584 set_bit(bit, &pl->phylink_disable_state); 1585 if (state == 0) { 1586 queue_work(system_power_efficient_wq, &pl->resolve); 1587 flush_work(&pl->resolve); 1588 } 1589 } 1590 1591 static void phylink_enable_and_run_resolve(struct phylink *pl, int bit) 1592 { 1593 clear_bit(bit, &pl->phylink_disable_state); 1594 phylink_run_resolve(pl); 1595 } 1596 1597 static void phylink_fixed_poll(struct timer_list *t) 1598 { 1599 struct phylink *pl = container_of(t, struct phylink, link_poll); 1600 1601 mod_timer(t, jiffies + HZ); 1602 1603 phylink_run_resolve(pl); 1604 } 1605 1606 static const struct sfp_upstream_ops sfp_phylink_ops; 1607 1608 static int phylink_register_sfp(struct phylink *pl, 1609 const struct fwnode_handle *fwnode) 1610 { 1611 struct sfp_bus *bus; 1612 int ret; 1613 1614 if (!fwnode) 1615 return 0; 1616 1617 bus = sfp_bus_find_fwnode(fwnode); 1618 if (IS_ERR(bus)) { 1619 phylink_err(pl, "unable to attach SFP bus: %pe\n", bus); 1620 return PTR_ERR(bus); 1621 } 1622 1623 pl->sfp_bus = bus; 1624 1625 ret = sfp_bus_add_upstream(bus, pl, &sfp_phylink_ops); 1626 sfp_bus_put(bus); 1627 1628 return ret; 1629 } 1630 1631 /** 1632 * phylink_create() - create a phylink instance 1633 * @config: a pointer to the target &struct phylink_config 1634 * @fwnode: a pointer to a &struct fwnode_handle describing the network 1635 * interface 1636 * @iface: the desired link mode defined by &typedef phy_interface_t 1637 * @mac_ops: a pointer to a &struct phylink_mac_ops for the MAC. 1638 * 1639 * Create a new phylink instance, and parse the link parameters found in @np. 1640 * This will parse in-band modes, fixed-link or SFP configuration. 1641 * 1642 * Note: the rtnl lock must not be held when calling this function. 1643 * 1644 * Returns a pointer to a &struct phylink, or an error-pointer value. Users 1645 * must use IS_ERR() to check for errors from this function. 1646 */ 1647 struct phylink *phylink_create(struct phylink_config *config, 1648 const struct fwnode_handle *fwnode, 1649 phy_interface_t iface, 1650 const struct phylink_mac_ops *mac_ops) 1651 { 1652 bool using_mac_select_pcs = false; 1653 struct phylink *pl; 1654 int ret; 1655 1656 /* Validate the supplied configuration */ 1657 if (phy_interface_empty(config->supported_interfaces)) { 1658 dev_err(config->dev, 1659 "phylink: error: empty supported_interfaces\n"); 1660 return ERR_PTR(-EINVAL); 1661 } 1662 1663 if (mac_ops->mac_select_pcs && 1664 mac_ops->mac_select_pcs(config, PHY_INTERFACE_MODE_NA) != 1665 ERR_PTR(-EOPNOTSUPP)) 1666 using_mac_select_pcs = true; 1667 1668 pl = kzalloc(sizeof(*pl), GFP_KERNEL); 1669 if (!pl) 1670 return ERR_PTR(-ENOMEM); 1671 1672 mutex_init(&pl->state_mutex); 1673 INIT_WORK(&pl->resolve, phylink_resolve); 1674 1675 pl->config = config; 1676 if (config->type == PHYLINK_NETDEV) { 1677 pl->netdev = to_net_dev(config->dev); 1678 netif_carrier_off(pl->netdev); 1679 } else if (config->type == PHYLINK_DEV) { 1680 pl->dev = config->dev; 1681 } else { 1682 kfree(pl); 1683 return ERR_PTR(-EINVAL); 1684 } 1685 1686 pl->using_mac_select_pcs = using_mac_select_pcs; 1687 pl->phy_state.interface = iface; 1688 pl->link_interface = iface; 1689 if (iface == PHY_INTERFACE_MODE_MOCA) 1690 pl->link_port = PORT_BNC; 1691 else 1692 pl->link_port = PORT_MII; 1693 pl->link_config.interface = iface; 1694 pl->link_config.pause = MLO_PAUSE_AN; 1695 pl->link_config.speed = SPEED_UNKNOWN; 1696 pl->link_config.duplex = DUPLEX_UNKNOWN; 1697 pl->pcs_state = PCS_STATE_DOWN; 1698 pl->mac_ops = mac_ops; 1699 __set_bit(PHYLINK_DISABLE_STOPPED, &pl->phylink_disable_state); 1700 timer_setup(&pl->link_poll, phylink_fixed_poll, 0); 1701 1702 linkmode_fill(pl->supported); 1703 linkmode_copy(pl->link_config.advertising, pl->supported); 1704 phylink_validate(pl, pl->supported, &pl->link_config); 1705 1706 ret = phylink_parse_mode(pl, fwnode); 1707 if (ret < 0) { 1708 kfree(pl); 1709 return ERR_PTR(ret); 1710 } 1711 1712 if (pl->cfg_link_an_mode == MLO_AN_FIXED) { 1713 ret = phylink_parse_fixedlink(pl, fwnode); 1714 if (ret < 0) { 1715 kfree(pl); 1716 return ERR_PTR(ret); 1717 } 1718 } 1719 1720 pl->cur_link_an_mode = pl->cfg_link_an_mode; 1721 1722 ret = phylink_register_sfp(pl, fwnode); 1723 if (ret < 0) { 1724 kfree(pl); 1725 return ERR_PTR(ret); 1726 } 1727 1728 return pl; 1729 } 1730 EXPORT_SYMBOL_GPL(phylink_create); 1731 1732 /** 1733 * phylink_destroy() - cleanup and destroy the phylink instance 1734 * @pl: a pointer to a &struct phylink returned from phylink_create() 1735 * 1736 * Destroy a phylink instance. Any PHY that has been attached must have been 1737 * cleaned up via phylink_disconnect_phy() prior to calling this function. 1738 * 1739 * Note: the rtnl lock must not be held when calling this function. 1740 */ 1741 void phylink_destroy(struct phylink *pl) 1742 { 1743 sfp_bus_del_upstream(pl->sfp_bus); 1744 if (pl->link_gpio) 1745 gpiod_put(pl->link_gpio); 1746 1747 cancel_work_sync(&pl->resolve); 1748 kfree(pl); 1749 } 1750 EXPORT_SYMBOL_GPL(phylink_destroy); 1751 1752 /** 1753 * phylink_expects_phy() - Determine if phylink expects a phy to be attached 1754 * @pl: a pointer to a &struct phylink returned from phylink_create() 1755 * 1756 * When using fixed-link mode, or in-band mode with 1000base-X or 2500base-X, 1757 * no PHY is needed. 1758 * 1759 * Returns true if phylink will be expecting a PHY. 1760 */ 1761 bool phylink_expects_phy(struct phylink *pl) 1762 { 1763 if (pl->cfg_link_an_mode == MLO_AN_FIXED || 1764 (pl->cfg_link_an_mode == MLO_AN_INBAND && 1765 phy_interface_mode_is_8023z(pl->link_config.interface))) 1766 return false; 1767 return true; 1768 } 1769 EXPORT_SYMBOL_GPL(phylink_expects_phy); 1770 1771 static void phylink_phy_change(struct phy_device *phydev, bool up) 1772 { 1773 struct phylink *pl = phydev->phylink; 1774 bool tx_pause, rx_pause; 1775 1776 phy_get_pause(phydev, &tx_pause, &rx_pause); 1777 1778 mutex_lock(&pl->state_mutex); 1779 pl->phy_state.speed = phydev->speed; 1780 pl->phy_state.duplex = phydev->duplex; 1781 pl->phy_state.rate_matching = phydev->rate_matching; 1782 pl->phy_state.pause = MLO_PAUSE_NONE; 1783 if (tx_pause) 1784 pl->phy_state.pause |= MLO_PAUSE_TX; 1785 if (rx_pause) 1786 pl->phy_state.pause |= MLO_PAUSE_RX; 1787 pl->phy_state.interface = phydev->interface; 1788 pl->phy_state.link = up; 1789 mutex_unlock(&pl->state_mutex); 1790 1791 phylink_run_resolve(pl); 1792 1793 phylink_dbg(pl, "phy link %s %s/%s/%s/%s/%s\n", up ? "up" : "down", 1794 phy_modes(phydev->interface), 1795 phy_speed_to_str(phydev->speed), 1796 phy_duplex_to_str(phydev->duplex), 1797 phy_rate_matching_to_str(phydev->rate_matching), 1798 phylink_pause_to_str(pl->phy_state.pause)); 1799 } 1800 1801 static int phylink_validate_phy(struct phylink *pl, struct phy_device *phy, 1802 unsigned long *supported, 1803 struct phylink_link_state *state) 1804 { 1805 DECLARE_PHY_INTERFACE_MASK(interfaces); 1806 1807 /* If the PHY provides a bitmap of the interfaces it will be using 1808 * depending on the negotiated media speeds, use this to validate 1809 * which ethtool link modes can be used. 1810 */ 1811 if (!phy_interface_empty(phy->possible_interfaces)) { 1812 /* We only care about the union of the PHY's interfaces and 1813 * those which the host supports. 1814 */ 1815 phy_interface_and(interfaces, phy->possible_interfaces, 1816 pl->config->supported_interfaces); 1817 1818 if (phy_interface_empty(interfaces)) { 1819 phylink_err(pl, "PHY has no common interfaces\n"); 1820 return -EINVAL; 1821 } 1822 1823 if (phy_on_sfp(phy)) { 1824 /* If the PHY is on a SFP, limit the interfaces to 1825 * those that can be used with a SFP module. 1826 */ 1827 phy_interface_and(interfaces, interfaces, 1828 phylink_sfp_interfaces); 1829 1830 if (phy_interface_empty(interfaces)) { 1831 phylink_err(pl, "SFP PHY's possible interfaces becomes empty\n"); 1832 return -EINVAL; 1833 } 1834 } 1835 1836 phylink_dbg(pl, "PHY %s uses interfaces %*pbl, validating %*pbl\n", 1837 phydev_name(phy), 1838 (int)PHY_INTERFACE_MODE_MAX, 1839 phy->possible_interfaces, 1840 (int)PHY_INTERFACE_MODE_MAX, interfaces); 1841 1842 return phylink_validate_mask(pl, phy, supported, state, 1843 interfaces); 1844 } 1845 1846 phylink_dbg(pl, "PHY %s doesn't supply possible interfaces\n", 1847 phydev_name(phy)); 1848 1849 /* Check whether we would use rate matching for the proposed interface 1850 * mode. 1851 */ 1852 state->rate_matching = phy_get_rate_matching(phy, state->interface); 1853 1854 /* Clause 45 PHYs may switch their Serdes lane between, e.g. 10GBASE-R, 1855 * 5GBASE-R, 2500BASE-X and SGMII if they are not using rate matching. 1856 * For some interface modes (e.g. RXAUI, XAUI and USXGMII) switching 1857 * their Serdes is either unnecessary or not reasonable. 1858 * 1859 * For these which switch interface modes, we really need to know which 1860 * interface modes the PHY supports to properly work out which ethtool 1861 * linkmodes can be supported. For now, as a work-around, we validate 1862 * against all interface modes, which may lead to more ethtool link 1863 * modes being advertised than are actually supported. 1864 */ 1865 if (phy->is_c45 && state->rate_matching == RATE_MATCH_NONE && 1866 state->interface != PHY_INTERFACE_MODE_RXAUI && 1867 state->interface != PHY_INTERFACE_MODE_XAUI && 1868 state->interface != PHY_INTERFACE_MODE_USXGMII) 1869 state->interface = PHY_INTERFACE_MODE_NA; 1870 1871 return phylink_validate(pl, supported, state); 1872 } 1873 1874 static int phylink_bringup_phy(struct phylink *pl, struct phy_device *phy, 1875 phy_interface_t interface) 1876 { 1877 struct phylink_link_state config; 1878 __ETHTOOL_DECLARE_LINK_MODE_MASK(supported); 1879 char *irq_str; 1880 int ret; 1881 1882 /* 1883 * This is the new way of dealing with flow control for PHYs, 1884 * as described by Timur Tabi in commit 529ed1275263 ("net: phy: 1885 * phy drivers should not set SUPPORTED_[Asym_]Pause") except 1886 * using our validate call to the MAC, we rely upon the MAC 1887 * clearing the bits from both supported and advertising fields. 1888 */ 1889 phy_support_asym_pause(phy); 1890 1891 memset(&config, 0, sizeof(config)); 1892 linkmode_copy(supported, phy->supported); 1893 linkmode_copy(config.advertising, phy->advertising); 1894 config.interface = interface; 1895 1896 ret = phylink_validate_phy(pl, phy, supported, &config); 1897 if (ret) { 1898 phylink_warn(pl, "validation of %s with support %*pb and advertisement %*pb failed: %pe\n", 1899 phy_modes(config.interface), 1900 __ETHTOOL_LINK_MODE_MASK_NBITS, phy->supported, 1901 __ETHTOOL_LINK_MODE_MASK_NBITS, config.advertising, 1902 ERR_PTR(ret)); 1903 return ret; 1904 } 1905 1906 phy->phylink = pl; 1907 phy->phy_link_change = phylink_phy_change; 1908 1909 irq_str = phy_attached_info_irq(phy); 1910 phylink_info(pl, 1911 "PHY [%s] driver [%s] (irq=%s)\n", 1912 dev_name(&phy->mdio.dev), phy->drv->name, irq_str); 1913 kfree(irq_str); 1914 1915 mutex_lock(&phy->lock); 1916 mutex_lock(&pl->state_mutex); 1917 pl->phydev = phy; 1918 pl->phy_state.interface = interface; 1919 pl->phy_state.pause = MLO_PAUSE_NONE; 1920 pl->phy_state.speed = SPEED_UNKNOWN; 1921 pl->phy_state.duplex = DUPLEX_UNKNOWN; 1922 pl->phy_state.rate_matching = RATE_MATCH_NONE; 1923 linkmode_copy(pl->supported, supported); 1924 linkmode_copy(pl->link_config.advertising, config.advertising); 1925 1926 /* Restrict the phy advertisement according to the MAC support. */ 1927 linkmode_copy(phy->advertising, config.advertising); 1928 mutex_unlock(&pl->state_mutex); 1929 mutex_unlock(&phy->lock); 1930 1931 phylink_dbg(pl, 1932 "phy: %s setting supported %*pb advertising %*pb\n", 1933 phy_modes(interface), 1934 __ETHTOOL_LINK_MODE_MASK_NBITS, pl->supported, 1935 __ETHTOOL_LINK_MODE_MASK_NBITS, phy->advertising); 1936 1937 if (phy_interrupt_is_valid(phy)) 1938 phy_request_interrupt(phy); 1939 1940 if (pl->config->mac_managed_pm) 1941 phy->mac_managed_pm = true; 1942 1943 return 0; 1944 } 1945 1946 static int phylink_attach_phy(struct phylink *pl, struct phy_device *phy, 1947 phy_interface_t interface) 1948 { 1949 u32 flags = 0; 1950 1951 if (WARN_ON(pl->cfg_link_an_mode == MLO_AN_FIXED || 1952 (pl->cfg_link_an_mode == MLO_AN_INBAND && 1953 phy_interface_mode_is_8023z(interface) && !pl->sfp_bus))) 1954 return -EINVAL; 1955 1956 if (pl->phydev) 1957 return -EBUSY; 1958 1959 if (pl->config->mac_requires_rxc) 1960 flags |= PHY_F_RXC_ALWAYS_ON; 1961 1962 return phy_attach_direct(pl->netdev, phy, flags, interface); 1963 } 1964 1965 /** 1966 * phylink_connect_phy() - connect a PHY to the phylink instance 1967 * @pl: a pointer to a &struct phylink returned from phylink_create() 1968 * @phy: a pointer to a &struct phy_device. 1969 * 1970 * Connect @phy to the phylink instance specified by @pl by calling 1971 * phy_attach_direct(). Configure the @phy according to the MAC driver's 1972 * capabilities, start the PHYLIB state machine and enable any interrupts 1973 * that the PHY supports. 1974 * 1975 * This updates the phylink's ethtool supported and advertising link mode 1976 * masks. 1977 * 1978 * Returns 0 on success or a negative errno. 1979 */ 1980 int phylink_connect_phy(struct phylink *pl, struct phy_device *phy) 1981 { 1982 int ret; 1983 1984 /* Use PHY device/driver interface */ 1985 if (pl->link_interface == PHY_INTERFACE_MODE_NA) { 1986 pl->link_interface = phy->interface; 1987 pl->link_config.interface = pl->link_interface; 1988 } 1989 1990 ret = phylink_attach_phy(pl, phy, pl->link_interface); 1991 if (ret < 0) 1992 return ret; 1993 1994 ret = phylink_bringup_phy(pl, phy, pl->link_config.interface); 1995 if (ret) 1996 phy_detach(phy); 1997 1998 return ret; 1999 } 2000 EXPORT_SYMBOL_GPL(phylink_connect_phy); 2001 2002 /** 2003 * phylink_of_phy_connect() - connect the PHY specified in the DT mode. 2004 * @pl: a pointer to a &struct phylink returned from phylink_create() 2005 * @dn: a pointer to a &struct device_node. 2006 * @flags: PHY-specific flags to communicate to the PHY device driver 2007 * 2008 * Connect the phy specified in the device node @dn to the phylink instance 2009 * specified by @pl. Actions specified in phylink_connect_phy() will be 2010 * performed. 2011 * 2012 * Returns 0 on success or a negative errno. 2013 */ 2014 int phylink_of_phy_connect(struct phylink *pl, struct device_node *dn, 2015 u32 flags) 2016 { 2017 return phylink_fwnode_phy_connect(pl, of_fwnode_handle(dn), flags); 2018 } 2019 EXPORT_SYMBOL_GPL(phylink_of_phy_connect); 2020 2021 /** 2022 * phylink_fwnode_phy_connect() - connect the PHY specified in the fwnode. 2023 * @pl: a pointer to a &struct phylink returned from phylink_create() 2024 * @fwnode: a pointer to a &struct fwnode_handle. 2025 * @flags: PHY-specific flags to communicate to the PHY device driver 2026 * 2027 * Connect the phy specified @fwnode to the phylink instance specified 2028 * by @pl. 2029 * 2030 * Returns 0 on success or a negative errno. 2031 */ 2032 int phylink_fwnode_phy_connect(struct phylink *pl, 2033 const struct fwnode_handle *fwnode, 2034 u32 flags) 2035 { 2036 struct fwnode_handle *phy_fwnode; 2037 struct phy_device *phy_dev; 2038 int ret; 2039 2040 /* Fixed links and 802.3z are handled without needing a PHY */ 2041 if (pl->cfg_link_an_mode == MLO_AN_FIXED || 2042 (pl->cfg_link_an_mode == MLO_AN_INBAND && 2043 phy_interface_mode_is_8023z(pl->link_interface))) 2044 return 0; 2045 2046 phy_fwnode = fwnode_get_phy_node(fwnode); 2047 if (IS_ERR(phy_fwnode)) { 2048 if (pl->cfg_link_an_mode == MLO_AN_PHY) 2049 return -ENODEV; 2050 return 0; 2051 } 2052 2053 phy_dev = fwnode_phy_find_device(phy_fwnode); 2054 /* We're done with the phy_node handle */ 2055 fwnode_handle_put(phy_fwnode); 2056 if (!phy_dev) 2057 return -ENODEV; 2058 2059 /* Use PHY device/driver interface */ 2060 if (pl->link_interface == PHY_INTERFACE_MODE_NA) { 2061 pl->link_interface = phy_dev->interface; 2062 pl->link_config.interface = pl->link_interface; 2063 } 2064 2065 if (pl->config->mac_requires_rxc) 2066 flags |= PHY_F_RXC_ALWAYS_ON; 2067 2068 ret = phy_attach_direct(pl->netdev, phy_dev, flags, 2069 pl->link_interface); 2070 phy_device_free(phy_dev); 2071 if (ret) 2072 return ret; 2073 2074 ret = phylink_bringup_phy(pl, phy_dev, pl->link_config.interface); 2075 if (ret) 2076 phy_detach(phy_dev); 2077 2078 return ret; 2079 } 2080 EXPORT_SYMBOL_GPL(phylink_fwnode_phy_connect); 2081 2082 /** 2083 * phylink_disconnect_phy() - disconnect any PHY attached to the phylink 2084 * instance. 2085 * @pl: a pointer to a &struct phylink returned from phylink_create() 2086 * 2087 * Disconnect any current PHY from the phylink instance described by @pl. 2088 */ 2089 void phylink_disconnect_phy(struct phylink *pl) 2090 { 2091 struct phy_device *phy; 2092 2093 ASSERT_RTNL(); 2094 2095 phy = pl->phydev; 2096 if (phy) { 2097 mutex_lock(&phy->lock); 2098 mutex_lock(&pl->state_mutex); 2099 pl->phydev = NULL; 2100 mutex_unlock(&pl->state_mutex); 2101 mutex_unlock(&phy->lock); 2102 flush_work(&pl->resolve); 2103 2104 phy_disconnect(phy); 2105 } 2106 } 2107 EXPORT_SYMBOL_GPL(phylink_disconnect_phy); 2108 2109 static void phylink_link_changed(struct phylink *pl, bool up, const char *what) 2110 { 2111 if (!up) 2112 pl->mac_link_dropped = true; 2113 phylink_run_resolve(pl); 2114 phylink_dbg(pl, "%s link %s\n", what, up ? "up" : "down"); 2115 } 2116 2117 /** 2118 * phylink_mac_change() - notify phylink of a change in MAC state 2119 * @pl: a pointer to a &struct phylink returned from phylink_create() 2120 * @up: indicates whether the link is currently up. 2121 * 2122 * The MAC driver should call this driver when the state of its link 2123 * changes (eg, link failure, new negotiation results, etc.) 2124 */ 2125 void phylink_mac_change(struct phylink *pl, bool up) 2126 { 2127 phylink_link_changed(pl, up, "mac"); 2128 } 2129 EXPORT_SYMBOL_GPL(phylink_mac_change); 2130 2131 /** 2132 * phylink_pcs_change() - notify phylink of a change to PCS link state 2133 * @pcs: pointer to &struct phylink_pcs 2134 * @up: indicates whether the link is currently up. 2135 * 2136 * The PCS driver should call this when the state of its link changes 2137 * (e.g. link failure, new negotiation results, etc.) Note: it should 2138 * not determine "up" by reading the BMSR. If in doubt about the link 2139 * state at interrupt time, then pass true if pcs_get_state() returns 2140 * the latched link-down state, otherwise pass false. 2141 */ 2142 void phylink_pcs_change(struct phylink_pcs *pcs, bool up) 2143 { 2144 struct phylink *pl = pcs->phylink; 2145 2146 if (pl) 2147 phylink_link_changed(pl, up, "pcs"); 2148 } 2149 EXPORT_SYMBOL_GPL(phylink_pcs_change); 2150 2151 static irqreturn_t phylink_link_handler(int irq, void *data) 2152 { 2153 struct phylink *pl = data; 2154 2155 phylink_run_resolve(pl); 2156 2157 return IRQ_HANDLED; 2158 } 2159 2160 /** 2161 * phylink_start() - start a phylink instance 2162 * @pl: a pointer to a &struct phylink returned from phylink_create() 2163 * 2164 * Start the phylink instance specified by @pl, configuring the MAC for the 2165 * desired link mode(s) and negotiation style. This should be called from the 2166 * network device driver's &struct net_device_ops ndo_open() method. 2167 */ 2168 void phylink_start(struct phylink *pl) 2169 { 2170 bool poll = false; 2171 2172 ASSERT_RTNL(); 2173 2174 phylink_info(pl, "configuring for %s/%s link mode\n", 2175 phylink_an_mode_str(pl->cur_link_an_mode), 2176 phy_modes(pl->link_config.interface)); 2177 2178 /* Always set the carrier off */ 2179 if (pl->netdev) 2180 netif_carrier_off(pl->netdev); 2181 2182 pl->pcs_state = PCS_STATE_STARTING; 2183 2184 /* Apply the link configuration to the MAC when starting. This allows 2185 * a fixed-link to start with the correct parameters, and also 2186 * ensures that we set the appropriate advertisement for Serdes links. 2187 * 2188 * Restart autonegotiation if using 802.3z to ensure that the link 2189 * parameters are properly negotiated. This is necessary for DSA 2190 * switches using 802.3z negotiation to ensure they see our modes. 2191 */ 2192 phylink_mac_initial_config(pl, true); 2193 2194 pl->pcs_state = PCS_STATE_STARTED; 2195 2196 phylink_enable_and_run_resolve(pl, PHYLINK_DISABLE_STOPPED); 2197 2198 if (pl->cfg_link_an_mode == MLO_AN_FIXED && pl->link_gpio) { 2199 int irq = gpiod_to_irq(pl->link_gpio); 2200 2201 if (irq > 0) { 2202 if (!request_irq(irq, phylink_link_handler, 2203 IRQF_TRIGGER_RISING | 2204 IRQF_TRIGGER_FALLING, 2205 "netdev link", pl)) 2206 pl->link_irq = irq; 2207 else 2208 irq = 0; 2209 } 2210 if (irq <= 0) 2211 poll = true; 2212 } 2213 2214 if (pl->cfg_link_an_mode == MLO_AN_FIXED) 2215 poll |= pl->config->poll_fixed_state; 2216 2217 if (poll) 2218 mod_timer(&pl->link_poll, jiffies + HZ); 2219 if (pl->phydev) 2220 phy_start(pl->phydev); 2221 if (pl->sfp_bus) 2222 sfp_upstream_start(pl->sfp_bus); 2223 } 2224 EXPORT_SYMBOL_GPL(phylink_start); 2225 2226 /** 2227 * phylink_stop() - stop a phylink instance 2228 * @pl: a pointer to a &struct phylink returned from phylink_create() 2229 * 2230 * Stop the phylink instance specified by @pl. This should be called from the 2231 * network device driver's &struct net_device_ops ndo_stop() method. The 2232 * network device's carrier state should not be changed prior to calling this 2233 * function. 2234 * 2235 * This will synchronously bring down the link if the link is not already 2236 * down (in other words, it will trigger a mac_link_down() method call.) 2237 */ 2238 void phylink_stop(struct phylink *pl) 2239 { 2240 ASSERT_RTNL(); 2241 2242 if (pl->sfp_bus) 2243 sfp_upstream_stop(pl->sfp_bus); 2244 if (pl->phydev) 2245 phy_stop(pl->phydev); 2246 del_timer_sync(&pl->link_poll); 2247 if (pl->link_irq) { 2248 free_irq(pl->link_irq, pl); 2249 pl->link_irq = 0; 2250 } 2251 2252 phylink_run_resolve_and_disable(pl, PHYLINK_DISABLE_STOPPED); 2253 2254 pl->pcs_state = PCS_STATE_DOWN; 2255 2256 phylink_pcs_disable(pl->pcs); 2257 } 2258 EXPORT_SYMBOL_GPL(phylink_stop); 2259 2260 /** 2261 * phylink_suspend() - handle a network device suspend event 2262 * @pl: a pointer to a &struct phylink returned from phylink_create() 2263 * @mac_wol: true if the MAC needs to receive packets for Wake-on-Lan 2264 * 2265 * Handle a network device suspend event. There are several cases: 2266 * 2267 * - If Wake-on-Lan is not active, we can bring down the link between 2268 * the MAC and PHY by calling phylink_stop(). 2269 * - If Wake-on-Lan is active, and being handled only by the PHY, we 2270 * can also bring down the link between the MAC and PHY. 2271 * - If Wake-on-Lan is active, but being handled by the MAC, the MAC 2272 * still needs to receive packets, so we can not bring the link down. 2273 */ 2274 void phylink_suspend(struct phylink *pl, bool mac_wol) 2275 { 2276 ASSERT_RTNL(); 2277 2278 if (mac_wol && (!pl->netdev || pl->netdev->wol_enabled)) { 2279 /* Wake-on-Lan enabled, MAC handling */ 2280 mutex_lock(&pl->state_mutex); 2281 2282 /* Stop the resolver bringing the link up */ 2283 __set_bit(PHYLINK_DISABLE_MAC_WOL, &pl->phylink_disable_state); 2284 2285 /* Disable the carrier, to prevent transmit timeouts, 2286 * but one would hope all packets have been sent. This 2287 * also means phylink_resolve() will do nothing. 2288 */ 2289 if (pl->netdev) 2290 netif_carrier_off(pl->netdev); 2291 else 2292 pl->old_link_state = false; 2293 2294 /* We do not call mac_link_down() here as we want the 2295 * link to remain up to receive the WoL packets. 2296 */ 2297 mutex_unlock(&pl->state_mutex); 2298 } else { 2299 phylink_stop(pl); 2300 } 2301 } 2302 EXPORT_SYMBOL_GPL(phylink_suspend); 2303 2304 /** 2305 * phylink_resume() - handle a network device resume event 2306 * @pl: a pointer to a &struct phylink returned from phylink_create() 2307 * 2308 * Undo the effects of phylink_suspend(), returning the link to an 2309 * operational state. 2310 */ 2311 void phylink_resume(struct phylink *pl) 2312 { 2313 ASSERT_RTNL(); 2314 2315 if (test_bit(PHYLINK_DISABLE_MAC_WOL, &pl->phylink_disable_state)) { 2316 /* Wake-on-Lan enabled, MAC handling */ 2317 2318 /* Call mac_link_down() so we keep the overall state balanced. 2319 * Do this under the state_mutex lock for consistency. This 2320 * will cause a "Link Down" message to be printed during 2321 * resume, which is harmless - the true link state will be 2322 * printed when we run a resolve. 2323 */ 2324 mutex_lock(&pl->state_mutex); 2325 phylink_link_down(pl); 2326 mutex_unlock(&pl->state_mutex); 2327 2328 /* Re-apply the link parameters so that all the settings get 2329 * restored to the MAC. 2330 */ 2331 phylink_mac_initial_config(pl, true); 2332 2333 /* Re-enable and re-resolve the link parameters */ 2334 phylink_enable_and_run_resolve(pl, PHYLINK_DISABLE_MAC_WOL); 2335 } else { 2336 phylink_start(pl); 2337 } 2338 } 2339 EXPORT_SYMBOL_GPL(phylink_resume); 2340 2341 /** 2342 * phylink_ethtool_get_wol() - get the wake on lan parameters for the PHY 2343 * @pl: a pointer to a &struct phylink returned from phylink_create() 2344 * @wol: a pointer to &struct ethtool_wolinfo to hold the read parameters 2345 * 2346 * Read the wake on lan parameters from the PHY attached to the phylink 2347 * instance specified by @pl. If no PHY is currently attached, report no 2348 * support for wake on lan. 2349 */ 2350 void phylink_ethtool_get_wol(struct phylink *pl, struct ethtool_wolinfo *wol) 2351 { 2352 ASSERT_RTNL(); 2353 2354 wol->supported = 0; 2355 wol->wolopts = 0; 2356 2357 if (pl->phydev) 2358 phy_ethtool_get_wol(pl->phydev, wol); 2359 } 2360 EXPORT_SYMBOL_GPL(phylink_ethtool_get_wol); 2361 2362 /** 2363 * phylink_ethtool_set_wol() - set wake on lan parameters 2364 * @pl: a pointer to a &struct phylink returned from phylink_create() 2365 * @wol: a pointer to &struct ethtool_wolinfo for the desired parameters 2366 * 2367 * Set the wake on lan parameters for the PHY attached to the phylink 2368 * instance specified by @pl. If no PHY is attached, returns %EOPNOTSUPP 2369 * error. 2370 * 2371 * Returns zero on success or negative errno code. 2372 */ 2373 int phylink_ethtool_set_wol(struct phylink *pl, struct ethtool_wolinfo *wol) 2374 { 2375 int ret = -EOPNOTSUPP; 2376 2377 ASSERT_RTNL(); 2378 2379 if (pl->phydev) 2380 ret = phy_ethtool_set_wol(pl->phydev, wol); 2381 2382 return ret; 2383 } 2384 EXPORT_SYMBOL_GPL(phylink_ethtool_set_wol); 2385 2386 static void phylink_merge_link_mode(unsigned long *dst, const unsigned long *b) 2387 { 2388 __ETHTOOL_DECLARE_LINK_MODE_MASK(mask); 2389 2390 linkmode_zero(mask); 2391 phylink_set_port_modes(mask); 2392 2393 linkmode_and(dst, dst, mask); 2394 linkmode_or(dst, dst, b); 2395 } 2396 2397 static void phylink_get_ksettings(const struct phylink_link_state *state, 2398 struct ethtool_link_ksettings *kset) 2399 { 2400 phylink_merge_link_mode(kset->link_modes.advertising, state->advertising); 2401 linkmode_copy(kset->link_modes.lp_advertising, state->lp_advertising); 2402 if (kset->base.rate_matching == RATE_MATCH_NONE) { 2403 kset->base.speed = state->speed; 2404 kset->base.duplex = state->duplex; 2405 } 2406 kset->base.autoneg = linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, 2407 state->advertising) ? 2408 AUTONEG_ENABLE : AUTONEG_DISABLE; 2409 } 2410 2411 /** 2412 * phylink_ethtool_ksettings_get() - get the current link settings 2413 * @pl: a pointer to a &struct phylink returned from phylink_create() 2414 * @kset: a pointer to a &struct ethtool_link_ksettings to hold link settings 2415 * 2416 * Read the current link settings for the phylink instance specified by @pl. 2417 * This will be the link settings read from the MAC, PHY or fixed link 2418 * settings depending on the current negotiation mode. 2419 */ 2420 int phylink_ethtool_ksettings_get(struct phylink *pl, 2421 struct ethtool_link_ksettings *kset) 2422 { 2423 struct phylink_link_state link_state; 2424 2425 ASSERT_RTNL(); 2426 2427 if (pl->phydev) 2428 phy_ethtool_ksettings_get(pl->phydev, kset); 2429 else 2430 kset->base.port = pl->link_port; 2431 2432 linkmode_copy(kset->link_modes.supported, pl->supported); 2433 2434 switch (pl->cur_link_an_mode) { 2435 case MLO_AN_FIXED: 2436 /* We are using fixed settings. Report these as the 2437 * current link settings - and note that these also 2438 * represent the supported speeds/duplex/pause modes. 2439 */ 2440 phylink_get_fixed_state(pl, &link_state); 2441 phylink_get_ksettings(&link_state, kset); 2442 break; 2443 2444 case MLO_AN_INBAND: 2445 /* If there is a phy attached, then use the reported 2446 * settings from the phy with no modification. 2447 */ 2448 if (pl->phydev) 2449 break; 2450 2451 phylink_mac_pcs_get_state(pl, &link_state); 2452 2453 /* The MAC is reporting the link results from its own PCS 2454 * layer via in-band status. Report these as the current 2455 * link settings. 2456 */ 2457 phylink_get_ksettings(&link_state, kset); 2458 break; 2459 } 2460 2461 return 0; 2462 } 2463 EXPORT_SYMBOL_GPL(phylink_ethtool_ksettings_get); 2464 2465 /** 2466 * phylink_ethtool_ksettings_set() - set the link settings 2467 * @pl: a pointer to a &struct phylink returned from phylink_create() 2468 * @kset: a pointer to a &struct ethtool_link_ksettings for the desired modes 2469 */ 2470 int phylink_ethtool_ksettings_set(struct phylink *pl, 2471 const struct ethtool_link_ksettings *kset) 2472 { 2473 __ETHTOOL_DECLARE_LINK_MODE_MASK(support); 2474 struct phylink_link_state config; 2475 const struct phy_setting *s; 2476 2477 ASSERT_RTNL(); 2478 2479 if (pl->phydev) { 2480 struct ethtool_link_ksettings phy_kset = *kset; 2481 2482 linkmode_and(phy_kset.link_modes.advertising, 2483 phy_kset.link_modes.advertising, 2484 pl->supported); 2485 2486 /* We can rely on phylib for this update; we also do not need 2487 * to update the pl->link_config settings: 2488 * - the configuration returned via ksettings_get() will come 2489 * from phylib whenever a PHY is present. 2490 * - link_config.interface will be updated by the PHY calling 2491 * back via phylink_phy_change() and a subsequent resolve. 2492 * - initial link configuration for PHY mode comes from the 2493 * last phy state updated via phylink_phy_change(). 2494 * - other configuration changes (e.g. pause modes) are 2495 * performed directly via phylib. 2496 * - if in in-band mode with a PHY, the link configuration 2497 * is passed on the link from the PHY, and all of 2498 * link_config.{speed,duplex,an_enabled,pause} are not used. 2499 * - the only possible use would be link_config.advertising 2500 * pause modes when in 1000base-X mode with a PHY, but in 2501 * the presence of a PHY, this should not be changed as that 2502 * should be determined from the media side advertisement. 2503 */ 2504 return phy_ethtool_ksettings_set(pl->phydev, &phy_kset); 2505 } 2506 2507 config = pl->link_config; 2508 /* Mask out unsupported advertisements */ 2509 linkmode_and(config.advertising, kset->link_modes.advertising, 2510 pl->supported); 2511 2512 /* FIXME: should we reject autoneg if phy/mac does not support it? */ 2513 switch (kset->base.autoneg) { 2514 case AUTONEG_DISABLE: 2515 /* Autonegotiation disabled, select a suitable speed and 2516 * duplex. 2517 */ 2518 s = phy_lookup_setting(kset->base.speed, kset->base.duplex, 2519 pl->supported, false); 2520 if (!s) 2521 return -EINVAL; 2522 2523 /* If we have a fixed link, refuse to change link parameters. 2524 * If the link parameters match, accept them but do nothing. 2525 */ 2526 if (pl->cur_link_an_mode == MLO_AN_FIXED) { 2527 if (s->speed != pl->link_config.speed || 2528 s->duplex != pl->link_config.duplex) 2529 return -EINVAL; 2530 return 0; 2531 } 2532 2533 config.speed = s->speed; 2534 config.duplex = s->duplex; 2535 break; 2536 2537 case AUTONEG_ENABLE: 2538 /* If we have a fixed link, allow autonegotiation (since that 2539 * is our default case) but do not allow the advertisement to 2540 * be changed. If the advertisement matches, simply return. 2541 */ 2542 if (pl->cur_link_an_mode == MLO_AN_FIXED) { 2543 if (!linkmode_equal(config.advertising, 2544 pl->link_config.advertising)) 2545 return -EINVAL; 2546 return 0; 2547 } 2548 2549 config.speed = SPEED_UNKNOWN; 2550 config.duplex = DUPLEX_UNKNOWN; 2551 break; 2552 2553 default: 2554 return -EINVAL; 2555 } 2556 2557 /* We have ruled out the case with a PHY attached, and the 2558 * fixed-link cases. All that is left are in-band links. 2559 */ 2560 linkmode_mod_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, config.advertising, 2561 kset->base.autoneg == AUTONEG_ENABLE); 2562 2563 /* If this link is with an SFP, ensure that changes to advertised modes 2564 * also cause the associated interface to be selected such that the 2565 * link can be configured correctly. 2566 */ 2567 if (pl->sfp_bus) { 2568 config.interface = sfp_select_interface(pl->sfp_bus, 2569 config.advertising); 2570 if (config.interface == PHY_INTERFACE_MODE_NA) { 2571 phylink_err(pl, 2572 "selection of interface failed, advertisement %*pb\n", 2573 __ETHTOOL_LINK_MODE_MASK_NBITS, 2574 config.advertising); 2575 return -EINVAL; 2576 } 2577 2578 /* Revalidate with the selected interface */ 2579 linkmode_copy(support, pl->supported); 2580 if (phylink_validate(pl, support, &config)) { 2581 phylink_err(pl, "validation of %s/%s with support %*pb failed\n", 2582 phylink_an_mode_str(pl->cur_link_an_mode), 2583 phy_modes(config.interface), 2584 __ETHTOOL_LINK_MODE_MASK_NBITS, support); 2585 return -EINVAL; 2586 } 2587 } else { 2588 /* Validate without changing the current supported mask. */ 2589 linkmode_copy(support, pl->supported); 2590 if (phylink_validate(pl, support, &config)) 2591 return -EINVAL; 2592 } 2593 2594 /* If autonegotiation is enabled, we must have an advertisement */ 2595 if (linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, 2596 config.advertising) && 2597 phylink_is_empty_linkmode(config.advertising)) 2598 return -EINVAL; 2599 2600 mutex_lock(&pl->state_mutex); 2601 pl->link_config.speed = config.speed; 2602 pl->link_config.duplex = config.duplex; 2603 2604 if (pl->link_config.interface != config.interface) { 2605 /* The interface changed, e.g. 1000base-X <-> 2500base-X */ 2606 /* We need to force the link down, then change the interface */ 2607 if (pl->old_link_state) { 2608 phylink_link_down(pl); 2609 pl->old_link_state = false; 2610 } 2611 if (!test_bit(PHYLINK_DISABLE_STOPPED, 2612 &pl->phylink_disable_state)) 2613 phylink_major_config(pl, false, &config); 2614 pl->link_config.interface = config.interface; 2615 linkmode_copy(pl->link_config.advertising, config.advertising); 2616 } else if (!linkmode_equal(pl->link_config.advertising, 2617 config.advertising)) { 2618 linkmode_copy(pl->link_config.advertising, config.advertising); 2619 phylink_change_inband_advert(pl); 2620 } 2621 mutex_unlock(&pl->state_mutex); 2622 2623 return 0; 2624 } 2625 EXPORT_SYMBOL_GPL(phylink_ethtool_ksettings_set); 2626 2627 /** 2628 * phylink_ethtool_nway_reset() - restart negotiation 2629 * @pl: a pointer to a &struct phylink returned from phylink_create() 2630 * 2631 * Restart negotiation for the phylink instance specified by @pl. This will 2632 * cause any attached phy to restart negotiation with the link partner, and 2633 * if the MAC is in a BaseX mode, the MAC will also be requested to restart 2634 * negotiation. 2635 * 2636 * Returns zero on success, or negative error code. 2637 */ 2638 int phylink_ethtool_nway_reset(struct phylink *pl) 2639 { 2640 int ret = 0; 2641 2642 ASSERT_RTNL(); 2643 2644 if (pl->phydev) 2645 ret = phy_restart_aneg(pl->phydev); 2646 phylink_pcs_an_restart(pl); 2647 2648 return ret; 2649 } 2650 EXPORT_SYMBOL_GPL(phylink_ethtool_nway_reset); 2651 2652 /** 2653 * phylink_ethtool_get_pauseparam() - get the current pause parameters 2654 * @pl: a pointer to a &struct phylink returned from phylink_create() 2655 * @pause: a pointer to a &struct ethtool_pauseparam 2656 */ 2657 void phylink_ethtool_get_pauseparam(struct phylink *pl, 2658 struct ethtool_pauseparam *pause) 2659 { 2660 ASSERT_RTNL(); 2661 2662 pause->autoneg = !!(pl->link_config.pause & MLO_PAUSE_AN); 2663 pause->rx_pause = !!(pl->link_config.pause & MLO_PAUSE_RX); 2664 pause->tx_pause = !!(pl->link_config.pause & MLO_PAUSE_TX); 2665 } 2666 EXPORT_SYMBOL_GPL(phylink_ethtool_get_pauseparam); 2667 2668 /** 2669 * phylink_ethtool_set_pauseparam() - set the current pause parameters 2670 * @pl: a pointer to a &struct phylink returned from phylink_create() 2671 * @pause: a pointer to a &struct ethtool_pauseparam 2672 */ 2673 int phylink_ethtool_set_pauseparam(struct phylink *pl, 2674 struct ethtool_pauseparam *pause) 2675 { 2676 struct phylink_link_state *config = &pl->link_config; 2677 bool manual_changed; 2678 int pause_state; 2679 2680 ASSERT_RTNL(); 2681 2682 if (pl->cur_link_an_mode == MLO_AN_FIXED) 2683 return -EOPNOTSUPP; 2684 2685 if (!phylink_test(pl->supported, Pause) && 2686 !phylink_test(pl->supported, Asym_Pause)) 2687 return -EOPNOTSUPP; 2688 2689 if (!phylink_test(pl->supported, Asym_Pause) && 2690 pause->rx_pause != pause->tx_pause) 2691 return -EINVAL; 2692 2693 pause_state = 0; 2694 if (pause->autoneg) 2695 pause_state |= MLO_PAUSE_AN; 2696 if (pause->rx_pause) 2697 pause_state |= MLO_PAUSE_RX; 2698 if (pause->tx_pause) 2699 pause_state |= MLO_PAUSE_TX; 2700 2701 mutex_lock(&pl->state_mutex); 2702 /* 2703 * See the comments for linkmode_set_pause(), wrt the deficiencies 2704 * with the current implementation. A solution to this issue would 2705 * be: 2706 * ethtool Local device 2707 * rx tx Pause AsymDir 2708 * 0 0 0 0 2709 * 1 0 1 1 2710 * 0 1 0 1 2711 * 1 1 1 1 2712 * and then use the ethtool rx/tx enablement status to mask the 2713 * rx/tx pause resolution. 2714 */ 2715 linkmode_set_pause(config->advertising, pause->tx_pause, 2716 pause->rx_pause); 2717 2718 manual_changed = (config->pause ^ pause_state) & MLO_PAUSE_AN || 2719 (!(pause_state & MLO_PAUSE_AN) && 2720 (config->pause ^ pause_state) & MLO_PAUSE_TXRX_MASK); 2721 2722 config->pause = pause_state; 2723 2724 /* Update our in-band advertisement, triggering a renegotiation if 2725 * the advertisement changed. 2726 */ 2727 if (!pl->phydev) 2728 phylink_change_inband_advert(pl); 2729 2730 mutex_unlock(&pl->state_mutex); 2731 2732 /* If we have a PHY, a change of the pause frame advertisement will 2733 * cause phylib to renegotiate (if AN is enabled) which will in turn 2734 * call our phylink_phy_change() and trigger a resolve. Note that 2735 * we can't hold our state mutex while calling phy_set_asym_pause(). 2736 */ 2737 if (pl->phydev) 2738 phy_set_asym_pause(pl->phydev, pause->rx_pause, 2739 pause->tx_pause); 2740 2741 /* If the manual pause settings changed, make sure we trigger a 2742 * resolve to update their state; we can not guarantee that the 2743 * link will cycle. 2744 */ 2745 if (manual_changed) { 2746 pl->mac_link_dropped = true; 2747 phylink_run_resolve(pl); 2748 } 2749 2750 return 0; 2751 } 2752 EXPORT_SYMBOL_GPL(phylink_ethtool_set_pauseparam); 2753 2754 /** 2755 * phylink_get_eee_err() - read the energy efficient ethernet error 2756 * counter 2757 * @pl: a pointer to a &struct phylink returned from phylink_create(). 2758 * 2759 * Read the Energy Efficient Ethernet error counter from the PHY associated 2760 * with the phylink instance specified by @pl. 2761 * 2762 * Returns positive error counter value, or negative error code. 2763 */ 2764 int phylink_get_eee_err(struct phylink *pl) 2765 { 2766 int ret = 0; 2767 2768 ASSERT_RTNL(); 2769 2770 if (pl->phydev) 2771 ret = phy_get_eee_err(pl->phydev); 2772 2773 return ret; 2774 } 2775 EXPORT_SYMBOL_GPL(phylink_get_eee_err); 2776 2777 /** 2778 * phylink_init_eee() - init and check the EEE features 2779 * @pl: a pointer to a &struct phylink returned from phylink_create() 2780 * @clk_stop_enable: allow PHY to stop receive clock 2781 * 2782 * Must be called either with RTNL held or within mac_link_up() 2783 */ 2784 int phylink_init_eee(struct phylink *pl, bool clk_stop_enable) 2785 { 2786 int ret = -EOPNOTSUPP; 2787 2788 if (pl->phydev) 2789 ret = phy_init_eee(pl->phydev, clk_stop_enable); 2790 2791 return ret; 2792 } 2793 EXPORT_SYMBOL_GPL(phylink_init_eee); 2794 2795 /** 2796 * phylink_ethtool_get_eee() - read the energy efficient ethernet parameters 2797 * @pl: a pointer to a &struct phylink returned from phylink_create() 2798 * @eee: a pointer to a &struct ethtool_keee for the read parameters 2799 */ 2800 int phylink_ethtool_get_eee(struct phylink *pl, struct ethtool_keee *eee) 2801 { 2802 int ret = -EOPNOTSUPP; 2803 2804 ASSERT_RTNL(); 2805 2806 if (pl->phydev) 2807 ret = phy_ethtool_get_eee(pl->phydev, eee); 2808 2809 return ret; 2810 } 2811 EXPORT_SYMBOL_GPL(phylink_ethtool_get_eee); 2812 2813 /** 2814 * phylink_ethtool_set_eee() - set the energy efficient ethernet parameters 2815 * @pl: a pointer to a &struct phylink returned from phylink_create() 2816 * @eee: a pointer to a &struct ethtool_keee for the desired parameters 2817 */ 2818 int phylink_ethtool_set_eee(struct phylink *pl, struct ethtool_keee *eee) 2819 { 2820 int ret = -EOPNOTSUPP; 2821 2822 ASSERT_RTNL(); 2823 2824 if (pl->phydev) 2825 ret = phy_ethtool_set_eee(pl->phydev, eee); 2826 2827 return ret; 2828 } 2829 EXPORT_SYMBOL_GPL(phylink_ethtool_set_eee); 2830 2831 /* This emulates MII registers for a fixed-mode phy operating as per the 2832 * passed in state. "aneg" defines if we report negotiation is possible. 2833 * 2834 * FIXME: should deal with negotiation state too. 2835 */ 2836 static int phylink_mii_emul_read(unsigned int reg, 2837 struct phylink_link_state *state) 2838 { 2839 struct fixed_phy_status fs; 2840 unsigned long *lpa = state->lp_advertising; 2841 int val; 2842 2843 fs.link = state->link; 2844 fs.speed = state->speed; 2845 fs.duplex = state->duplex; 2846 fs.pause = test_bit(ETHTOOL_LINK_MODE_Pause_BIT, lpa); 2847 fs.asym_pause = test_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, lpa); 2848 2849 val = swphy_read_reg(reg, &fs); 2850 if (reg == MII_BMSR) { 2851 if (!state->an_complete) 2852 val &= ~BMSR_ANEGCOMPLETE; 2853 } 2854 return val; 2855 } 2856 2857 static int phylink_phy_read(struct phylink *pl, unsigned int phy_id, 2858 unsigned int reg) 2859 { 2860 struct phy_device *phydev = pl->phydev; 2861 int prtad, devad; 2862 2863 if (mdio_phy_id_is_c45(phy_id)) { 2864 prtad = mdio_phy_id_prtad(phy_id); 2865 devad = mdio_phy_id_devad(phy_id); 2866 return mdiobus_c45_read(pl->phydev->mdio.bus, prtad, devad, 2867 reg); 2868 } 2869 2870 if (phydev->is_c45) { 2871 switch (reg) { 2872 case MII_BMCR: 2873 case MII_BMSR: 2874 case MII_PHYSID1: 2875 case MII_PHYSID2: 2876 devad = __ffs(phydev->c45_ids.mmds_present); 2877 break; 2878 case MII_ADVERTISE: 2879 case MII_LPA: 2880 if (!(phydev->c45_ids.mmds_present & MDIO_DEVS_AN)) 2881 return -EINVAL; 2882 devad = MDIO_MMD_AN; 2883 if (reg == MII_ADVERTISE) 2884 reg = MDIO_AN_ADVERTISE; 2885 else 2886 reg = MDIO_AN_LPA; 2887 break; 2888 default: 2889 return -EINVAL; 2890 } 2891 prtad = phy_id; 2892 return mdiobus_c45_read(pl->phydev->mdio.bus, prtad, devad, 2893 reg); 2894 } 2895 2896 return mdiobus_read(pl->phydev->mdio.bus, phy_id, reg); 2897 } 2898 2899 static int phylink_phy_write(struct phylink *pl, unsigned int phy_id, 2900 unsigned int reg, unsigned int val) 2901 { 2902 struct phy_device *phydev = pl->phydev; 2903 int prtad, devad; 2904 2905 if (mdio_phy_id_is_c45(phy_id)) { 2906 prtad = mdio_phy_id_prtad(phy_id); 2907 devad = mdio_phy_id_devad(phy_id); 2908 return mdiobus_c45_write(pl->phydev->mdio.bus, prtad, devad, 2909 reg, val); 2910 } 2911 2912 if (phydev->is_c45) { 2913 switch (reg) { 2914 case MII_BMCR: 2915 case MII_BMSR: 2916 case MII_PHYSID1: 2917 case MII_PHYSID2: 2918 devad = __ffs(phydev->c45_ids.mmds_present); 2919 break; 2920 case MII_ADVERTISE: 2921 case MII_LPA: 2922 if (!(phydev->c45_ids.mmds_present & MDIO_DEVS_AN)) 2923 return -EINVAL; 2924 devad = MDIO_MMD_AN; 2925 if (reg == MII_ADVERTISE) 2926 reg = MDIO_AN_ADVERTISE; 2927 else 2928 reg = MDIO_AN_LPA; 2929 break; 2930 default: 2931 return -EINVAL; 2932 } 2933 return mdiobus_c45_write(pl->phydev->mdio.bus, phy_id, devad, 2934 reg, val); 2935 } 2936 2937 return mdiobus_write(phydev->mdio.bus, phy_id, reg, val); 2938 } 2939 2940 static int phylink_mii_read(struct phylink *pl, unsigned int phy_id, 2941 unsigned int reg) 2942 { 2943 struct phylink_link_state state; 2944 int val = 0xffff; 2945 2946 switch (pl->cur_link_an_mode) { 2947 case MLO_AN_FIXED: 2948 if (phy_id == 0) { 2949 phylink_get_fixed_state(pl, &state); 2950 val = phylink_mii_emul_read(reg, &state); 2951 } 2952 break; 2953 2954 case MLO_AN_PHY: 2955 return -EOPNOTSUPP; 2956 2957 case MLO_AN_INBAND: 2958 if (phy_id == 0) { 2959 phylink_mac_pcs_get_state(pl, &state); 2960 val = phylink_mii_emul_read(reg, &state); 2961 } 2962 break; 2963 } 2964 2965 return val & 0xffff; 2966 } 2967 2968 static int phylink_mii_write(struct phylink *pl, unsigned int phy_id, 2969 unsigned int reg, unsigned int val) 2970 { 2971 switch (pl->cur_link_an_mode) { 2972 case MLO_AN_FIXED: 2973 break; 2974 2975 case MLO_AN_PHY: 2976 return -EOPNOTSUPP; 2977 2978 case MLO_AN_INBAND: 2979 break; 2980 } 2981 2982 return 0; 2983 } 2984 2985 /** 2986 * phylink_mii_ioctl() - generic mii ioctl interface 2987 * @pl: a pointer to a &struct phylink returned from phylink_create() 2988 * @ifr: a pointer to a &struct ifreq for socket ioctls 2989 * @cmd: ioctl cmd to execute 2990 * 2991 * Perform the specified MII ioctl on the PHY attached to the phylink instance 2992 * specified by @pl. If no PHY is attached, emulate the presence of the PHY. 2993 * 2994 * Returns: zero on success or negative error code. 2995 * 2996 * %SIOCGMIIPHY: 2997 * read register from the current PHY. 2998 * %SIOCGMIIREG: 2999 * read register from the specified PHY. 3000 * %SIOCSMIIREG: 3001 * set a register on the specified PHY. 3002 */ 3003 int phylink_mii_ioctl(struct phylink *pl, struct ifreq *ifr, int cmd) 3004 { 3005 struct mii_ioctl_data *mii = if_mii(ifr); 3006 int ret; 3007 3008 ASSERT_RTNL(); 3009 3010 if (pl->phydev) { 3011 /* PHYs only exist for MLO_AN_PHY and SGMII */ 3012 switch (cmd) { 3013 case SIOCGMIIPHY: 3014 mii->phy_id = pl->phydev->mdio.addr; 3015 fallthrough; 3016 3017 case SIOCGMIIREG: 3018 ret = phylink_phy_read(pl, mii->phy_id, mii->reg_num); 3019 if (ret >= 0) { 3020 mii->val_out = ret; 3021 ret = 0; 3022 } 3023 break; 3024 3025 case SIOCSMIIREG: 3026 ret = phylink_phy_write(pl, mii->phy_id, mii->reg_num, 3027 mii->val_in); 3028 break; 3029 3030 default: 3031 ret = phy_mii_ioctl(pl->phydev, ifr, cmd); 3032 break; 3033 } 3034 } else { 3035 switch (cmd) { 3036 case SIOCGMIIPHY: 3037 mii->phy_id = 0; 3038 fallthrough; 3039 3040 case SIOCGMIIREG: 3041 ret = phylink_mii_read(pl, mii->phy_id, mii->reg_num); 3042 if (ret >= 0) { 3043 mii->val_out = ret; 3044 ret = 0; 3045 } 3046 break; 3047 3048 case SIOCSMIIREG: 3049 ret = phylink_mii_write(pl, mii->phy_id, mii->reg_num, 3050 mii->val_in); 3051 break; 3052 3053 default: 3054 ret = -EOPNOTSUPP; 3055 break; 3056 } 3057 } 3058 3059 return ret; 3060 } 3061 EXPORT_SYMBOL_GPL(phylink_mii_ioctl); 3062 3063 /** 3064 * phylink_speed_down() - set the non-SFP PHY to lowest speed supported by both 3065 * link partners 3066 * @pl: a pointer to a &struct phylink returned from phylink_create() 3067 * @sync: perform action synchronously 3068 * 3069 * If we have a PHY that is not part of a SFP module, then set the speed 3070 * as described in the phy_speed_down() function. Please see this function 3071 * for a description of the @sync parameter. 3072 * 3073 * Returns zero if there is no PHY, otherwise as per phy_speed_down(). 3074 */ 3075 int phylink_speed_down(struct phylink *pl, bool sync) 3076 { 3077 int ret = 0; 3078 3079 ASSERT_RTNL(); 3080 3081 if (!pl->sfp_bus && pl->phydev) 3082 ret = phy_speed_down(pl->phydev, sync); 3083 3084 return ret; 3085 } 3086 EXPORT_SYMBOL_GPL(phylink_speed_down); 3087 3088 /** 3089 * phylink_speed_up() - restore the advertised speeds prior to the call to 3090 * phylink_speed_down() 3091 * @pl: a pointer to a &struct phylink returned from phylink_create() 3092 * 3093 * If we have a PHY that is not part of a SFP module, then restore the 3094 * PHY speeds as per phy_speed_up(). 3095 * 3096 * Returns zero if there is no PHY, otherwise as per phy_speed_up(). 3097 */ 3098 int phylink_speed_up(struct phylink *pl) 3099 { 3100 int ret = 0; 3101 3102 ASSERT_RTNL(); 3103 3104 if (!pl->sfp_bus && pl->phydev) 3105 ret = phy_speed_up(pl->phydev); 3106 3107 return ret; 3108 } 3109 EXPORT_SYMBOL_GPL(phylink_speed_up); 3110 3111 static void phylink_sfp_attach(void *upstream, struct sfp_bus *bus) 3112 { 3113 struct phylink *pl = upstream; 3114 3115 pl->netdev->sfp_bus = bus; 3116 } 3117 3118 static void phylink_sfp_detach(void *upstream, struct sfp_bus *bus) 3119 { 3120 struct phylink *pl = upstream; 3121 3122 pl->netdev->sfp_bus = NULL; 3123 } 3124 3125 static phy_interface_t phylink_choose_sfp_interface(struct phylink *pl, 3126 const unsigned long *intf) 3127 { 3128 phy_interface_t interface; 3129 size_t i; 3130 3131 interface = PHY_INTERFACE_MODE_NA; 3132 for (i = 0; i < ARRAY_SIZE(phylink_sfp_interface_preference); i++) 3133 if (test_bit(phylink_sfp_interface_preference[i], intf)) { 3134 interface = phylink_sfp_interface_preference[i]; 3135 break; 3136 } 3137 3138 return interface; 3139 } 3140 3141 static void phylink_sfp_set_config(struct phylink *pl, u8 mode, 3142 unsigned long *supported, 3143 struct phylink_link_state *state) 3144 { 3145 bool changed = false; 3146 3147 phylink_dbg(pl, "requesting link mode %s/%s with support %*pb\n", 3148 phylink_an_mode_str(mode), phy_modes(state->interface), 3149 __ETHTOOL_LINK_MODE_MASK_NBITS, supported); 3150 3151 if (!linkmode_equal(pl->supported, supported)) { 3152 linkmode_copy(pl->supported, supported); 3153 changed = true; 3154 } 3155 3156 if (!linkmode_equal(pl->link_config.advertising, state->advertising)) { 3157 linkmode_copy(pl->link_config.advertising, state->advertising); 3158 changed = true; 3159 } 3160 3161 if (pl->cur_link_an_mode != mode || 3162 pl->link_config.interface != state->interface) { 3163 pl->cur_link_an_mode = mode; 3164 pl->link_config.interface = state->interface; 3165 3166 changed = true; 3167 3168 phylink_info(pl, "switched to %s/%s link mode\n", 3169 phylink_an_mode_str(mode), 3170 phy_modes(state->interface)); 3171 } 3172 3173 if (changed && !test_bit(PHYLINK_DISABLE_STOPPED, 3174 &pl->phylink_disable_state)) 3175 phylink_mac_initial_config(pl, false); 3176 } 3177 3178 static int phylink_sfp_config_phy(struct phylink *pl, u8 mode, 3179 struct phy_device *phy) 3180 { 3181 __ETHTOOL_DECLARE_LINK_MODE_MASK(support1); 3182 __ETHTOOL_DECLARE_LINK_MODE_MASK(support); 3183 struct phylink_link_state config; 3184 phy_interface_t iface; 3185 int ret; 3186 3187 linkmode_copy(support, phy->supported); 3188 3189 memset(&config, 0, sizeof(config)); 3190 linkmode_copy(config.advertising, phy->advertising); 3191 config.interface = PHY_INTERFACE_MODE_NA; 3192 config.speed = SPEED_UNKNOWN; 3193 config.duplex = DUPLEX_UNKNOWN; 3194 config.pause = MLO_PAUSE_AN; 3195 3196 /* Ignore errors if we're expecting a PHY to attach later */ 3197 ret = phylink_validate(pl, support, &config); 3198 if (ret) { 3199 phylink_err(pl, "validation with support %*pb failed: %pe\n", 3200 __ETHTOOL_LINK_MODE_MASK_NBITS, support, 3201 ERR_PTR(ret)); 3202 return ret; 3203 } 3204 3205 iface = sfp_select_interface(pl->sfp_bus, config.advertising); 3206 if (iface == PHY_INTERFACE_MODE_NA) { 3207 phylink_err(pl, 3208 "selection of interface failed, advertisement %*pb\n", 3209 __ETHTOOL_LINK_MODE_MASK_NBITS, config.advertising); 3210 return -EINVAL; 3211 } 3212 3213 config.interface = iface; 3214 linkmode_copy(support1, support); 3215 ret = phylink_validate(pl, support1, &config); 3216 if (ret) { 3217 phylink_err(pl, 3218 "validation of %s/%s with support %*pb failed: %pe\n", 3219 phylink_an_mode_str(mode), 3220 phy_modes(config.interface), 3221 __ETHTOOL_LINK_MODE_MASK_NBITS, support, 3222 ERR_PTR(ret)); 3223 return ret; 3224 } 3225 3226 pl->link_port = pl->sfp_port; 3227 3228 phylink_sfp_set_config(pl, mode, support, &config); 3229 3230 return 0; 3231 } 3232 3233 static int phylink_sfp_config_optical(struct phylink *pl) 3234 { 3235 __ETHTOOL_DECLARE_LINK_MODE_MASK(support); 3236 DECLARE_PHY_INTERFACE_MASK(interfaces); 3237 struct phylink_link_state config; 3238 phy_interface_t interface; 3239 int ret; 3240 3241 phylink_dbg(pl, "optical SFP: interfaces=[mac=%*pbl, sfp=%*pbl]\n", 3242 (int)PHY_INTERFACE_MODE_MAX, 3243 pl->config->supported_interfaces, 3244 (int)PHY_INTERFACE_MODE_MAX, 3245 pl->sfp_interfaces); 3246 3247 /* Find the union of the supported interfaces by the PCS/MAC and 3248 * the SFP module. 3249 */ 3250 phy_interface_and(interfaces, pl->config->supported_interfaces, 3251 pl->sfp_interfaces); 3252 if (phy_interface_empty(interfaces)) { 3253 phylink_err(pl, "unsupported SFP module: no common interface modes\n"); 3254 return -EINVAL; 3255 } 3256 3257 memset(&config, 0, sizeof(config)); 3258 linkmode_copy(support, pl->sfp_support); 3259 linkmode_copy(config.advertising, pl->sfp_support); 3260 config.speed = SPEED_UNKNOWN; 3261 config.duplex = DUPLEX_UNKNOWN; 3262 config.pause = MLO_PAUSE_AN; 3263 3264 /* For all the interfaces that are supported, reduce the sfp_support 3265 * mask to only those link modes that can be supported. 3266 */ 3267 ret = phylink_validate_mask(pl, NULL, pl->sfp_support, &config, 3268 interfaces); 3269 if (ret) { 3270 phylink_err(pl, "unsupported SFP module: validation with support %*pb failed\n", 3271 __ETHTOOL_LINK_MODE_MASK_NBITS, support); 3272 return ret; 3273 } 3274 3275 interface = phylink_choose_sfp_interface(pl, interfaces); 3276 if (interface == PHY_INTERFACE_MODE_NA) { 3277 phylink_err(pl, "failed to select SFP interface\n"); 3278 return -EINVAL; 3279 } 3280 3281 phylink_dbg(pl, "optical SFP: chosen %s interface\n", 3282 phy_modes(interface)); 3283 3284 config.interface = interface; 3285 3286 /* Ignore errors if we're expecting a PHY to attach later */ 3287 ret = phylink_validate(pl, support, &config); 3288 if (ret) { 3289 phylink_err(pl, "validation with support %*pb failed: %pe\n", 3290 __ETHTOOL_LINK_MODE_MASK_NBITS, support, 3291 ERR_PTR(ret)); 3292 return ret; 3293 } 3294 3295 pl->link_port = pl->sfp_port; 3296 3297 phylink_sfp_set_config(pl, MLO_AN_INBAND, pl->sfp_support, &config); 3298 3299 return 0; 3300 } 3301 3302 static int phylink_sfp_module_insert(void *upstream, 3303 const struct sfp_eeprom_id *id) 3304 { 3305 struct phylink *pl = upstream; 3306 3307 ASSERT_RTNL(); 3308 3309 linkmode_zero(pl->sfp_support); 3310 phy_interface_zero(pl->sfp_interfaces); 3311 sfp_parse_support(pl->sfp_bus, id, pl->sfp_support, pl->sfp_interfaces); 3312 pl->sfp_port = sfp_parse_port(pl->sfp_bus, id, pl->sfp_support); 3313 3314 /* If this module may have a PHY connecting later, defer until later */ 3315 pl->sfp_may_have_phy = sfp_may_have_phy(pl->sfp_bus, id); 3316 if (pl->sfp_may_have_phy) 3317 return 0; 3318 3319 return phylink_sfp_config_optical(pl); 3320 } 3321 3322 static int phylink_sfp_module_start(void *upstream) 3323 { 3324 struct phylink *pl = upstream; 3325 3326 /* If this SFP module has a PHY, start the PHY now. */ 3327 if (pl->phydev) { 3328 phy_start(pl->phydev); 3329 return 0; 3330 } 3331 3332 /* If the module may have a PHY but we didn't detect one we 3333 * need to configure the MAC here. 3334 */ 3335 if (!pl->sfp_may_have_phy) 3336 return 0; 3337 3338 return phylink_sfp_config_optical(pl); 3339 } 3340 3341 static void phylink_sfp_module_stop(void *upstream) 3342 { 3343 struct phylink *pl = upstream; 3344 3345 /* If this SFP module has a PHY, stop it. */ 3346 if (pl->phydev) 3347 phy_stop(pl->phydev); 3348 } 3349 3350 static void phylink_sfp_link_down(void *upstream) 3351 { 3352 struct phylink *pl = upstream; 3353 3354 ASSERT_RTNL(); 3355 3356 phylink_run_resolve_and_disable(pl, PHYLINK_DISABLE_LINK); 3357 } 3358 3359 static void phylink_sfp_link_up(void *upstream) 3360 { 3361 struct phylink *pl = upstream; 3362 3363 ASSERT_RTNL(); 3364 3365 phylink_enable_and_run_resolve(pl, PHYLINK_DISABLE_LINK); 3366 } 3367 3368 /* The Broadcom BCM84881 in the Methode DM7052 is unable to provide a SGMII 3369 * or 802.3z control word, so inband will not work. 3370 */ 3371 static bool phylink_phy_no_inband(struct phy_device *phy) 3372 { 3373 return phy->is_c45 && phy_id_compare(phy->c45_ids.device_ids[1], 3374 0xae025150, 0xfffffff0); 3375 } 3376 3377 static int phylink_sfp_connect_phy(void *upstream, struct phy_device *phy) 3378 { 3379 struct phylink *pl = upstream; 3380 phy_interface_t interface; 3381 u8 mode; 3382 int ret; 3383 3384 /* 3385 * This is the new way of dealing with flow control for PHYs, 3386 * as described by Timur Tabi in commit 529ed1275263 ("net: phy: 3387 * phy drivers should not set SUPPORTED_[Asym_]Pause") except 3388 * using our validate call to the MAC, we rely upon the MAC 3389 * clearing the bits from both supported and advertising fields. 3390 */ 3391 phy_support_asym_pause(phy); 3392 3393 if (phylink_phy_no_inband(phy)) 3394 mode = MLO_AN_PHY; 3395 else 3396 mode = MLO_AN_INBAND; 3397 3398 /* Set the PHY's host supported interfaces */ 3399 phy_interface_and(phy->host_interfaces, phylink_sfp_interfaces, 3400 pl->config->supported_interfaces); 3401 3402 /* Do the initial configuration */ 3403 ret = phylink_sfp_config_phy(pl, mode, phy); 3404 if (ret < 0) 3405 return ret; 3406 3407 interface = pl->link_config.interface; 3408 ret = phylink_attach_phy(pl, phy, interface); 3409 if (ret < 0) 3410 return ret; 3411 3412 ret = phylink_bringup_phy(pl, phy, interface); 3413 if (ret) 3414 phy_detach(phy); 3415 3416 return ret; 3417 } 3418 3419 static void phylink_sfp_disconnect_phy(void *upstream) 3420 { 3421 phylink_disconnect_phy(upstream); 3422 } 3423 3424 static const struct sfp_upstream_ops sfp_phylink_ops = { 3425 .attach = phylink_sfp_attach, 3426 .detach = phylink_sfp_detach, 3427 .module_insert = phylink_sfp_module_insert, 3428 .module_start = phylink_sfp_module_start, 3429 .module_stop = phylink_sfp_module_stop, 3430 .link_up = phylink_sfp_link_up, 3431 .link_down = phylink_sfp_link_down, 3432 .connect_phy = phylink_sfp_connect_phy, 3433 .disconnect_phy = phylink_sfp_disconnect_phy, 3434 }; 3435 3436 /* Helpers for MAC drivers */ 3437 3438 static struct { 3439 int bit; 3440 int speed; 3441 } phylink_c73_priority_resolution[] = { 3442 { ETHTOOL_LINK_MODE_100000baseCR4_Full_BIT, SPEED_100000 }, 3443 { ETHTOOL_LINK_MODE_100000baseKR4_Full_BIT, SPEED_100000 }, 3444 /* 100GBASE-KP4 and 100GBASE-CR10 not supported */ 3445 { ETHTOOL_LINK_MODE_40000baseCR4_Full_BIT, SPEED_40000 }, 3446 { ETHTOOL_LINK_MODE_40000baseKR4_Full_BIT, SPEED_40000 }, 3447 { ETHTOOL_LINK_MODE_10000baseKR_Full_BIT, SPEED_10000 }, 3448 { ETHTOOL_LINK_MODE_10000baseKX4_Full_BIT, SPEED_10000 }, 3449 /* 5GBASE-KR not supported */ 3450 { ETHTOOL_LINK_MODE_2500baseX_Full_BIT, SPEED_2500 }, 3451 { ETHTOOL_LINK_MODE_1000baseKX_Full_BIT, SPEED_1000 }, 3452 }; 3453 3454 void phylink_resolve_c73(struct phylink_link_state *state) 3455 { 3456 int i; 3457 3458 for (i = 0; i < ARRAY_SIZE(phylink_c73_priority_resolution); i++) { 3459 int bit = phylink_c73_priority_resolution[i].bit; 3460 if (linkmode_test_bit(bit, state->advertising) && 3461 linkmode_test_bit(bit, state->lp_advertising)) 3462 break; 3463 } 3464 3465 if (i < ARRAY_SIZE(phylink_c73_priority_resolution)) { 3466 state->speed = phylink_c73_priority_resolution[i].speed; 3467 state->duplex = DUPLEX_FULL; 3468 } else { 3469 /* negotiation failure */ 3470 state->link = false; 3471 } 3472 3473 phylink_resolve_an_pause(state); 3474 } 3475 EXPORT_SYMBOL_GPL(phylink_resolve_c73); 3476 3477 static void phylink_decode_c37_word(struct phylink_link_state *state, 3478 uint16_t config_reg, int speed) 3479 { 3480 int fd_bit; 3481 3482 if (speed == SPEED_2500) 3483 fd_bit = ETHTOOL_LINK_MODE_2500baseX_Full_BIT; 3484 else 3485 fd_bit = ETHTOOL_LINK_MODE_1000baseX_Full_BIT; 3486 3487 mii_lpa_mod_linkmode_x(state->lp_advertising, config_reg, fd_bit); 3488 3489 if (linkmode_test_bit(fd_bit, state->advertising) && 3490 linkmode_test_bit(fd_bit, state->lp_advertising)) { 3491 state->speed = speed; 3492 state->duplex = DUPLEX_FULL; 3493 } else { 3494 /* negotiation failure */ 3495 state->link = false; 3496 } 3497 3498 phylink_resolve_an_pause(state); 3499 } 3500 3501 static void phylink_decode_sgmii_word(struct phylink_link_state *state, 3502 uint16_t config_reg) 3503 { 3504 if (!(config_reg & LPA_SGMII_LINK)) { 3505 state->link = false; 3506 return; 3507 } 3508 3509 switch (config_reg & LPA_SGMII_SPD_MASK) { 3510 case LPA_SGMII_10: 3511 state->speed = SPEED_10; 3512 break; 3513 case LPA_SGMII_100: 3514 state->speed = SPEED_100; 3515 break; 3516 case LPA_SGMII_1000: 3517 state->speed = SPEED_1000; 3518 break; 3519 default: 3520 state->link = false; 3521 return; 3522 } 3523 if (config_reg & LPA_SGMII_FULL_DUPLEX) 3524 state->duplex = DUPLEX_FULL; 3525 else 3526 state->duplex = DUPLEX_HALF; 3527 } 3528 3529 /** 3530 * phylink_decode_usxgmii_word() - decode the USXGMII word from a MAC PCS 3531 * @state: a pointer to a struct phylink_link_state. 3532 * @lpa: a 16 bit value which stores the USXGMII auto-negotiation word 3533 * 3534 * Helper for MAC PCS supporting the USXGMII protocol and the auto-negotiation 3535 * code word. Decode the USXGMII code word and populate the corresponding fields 3536 * (speed, duplex) into the phylink_link_state structure. 3537 */ 3538 void phylink_decode_usxgmii_word(struct phylink_link_state *state, 3539 uint16_t lpa) 3540 { 3541 switch (lpa & MDIO_USXGMII_SPD_MASK) { 3542 case MDIO_USXGMII_10: 3543 state->speed = SPEED_10; 3544 break; 3545 case MDIO_USXGMII_100: 3546 state->speed = SPEED_100; 3547 break; 3548 case MDIO_USXGMII_1000: 3549 state->speed = SPEED_1000; 3550 break; 3551 case MDIO_USXGMII_2500: 3552 state->speed = SPEED_2500; 3553 break; 3554 case MDIO_USXGMII_5000: 3555 state->speed = SPEED_5000; 3556 break; 3557 case MDIO_USXGMII_10G: 3558 state->speed = SPEED_10000; 3559 break; 3560 default: 3561 state->link = false; 3562 return; 3563 } 3564 3565 if (lpa & MDIO_USXGMII_FULL_DUPLEX) 3566 state->duplex = DUPLEX_FULL; 3567 else 3568 state->duplex = DUPLEX_HALF; 3569 } 3570 EXPORT_SYMBOL_GPL(phylink_decode_usxgmii_word); 3571 3572 /** 3573 * phylink_decode_usgmii_word() - decode the USGMII word from a MAC PCS 3574 * @state: a pointer to a struct phylink_link_state. 3575 * @lpa: a 16 bit value which stores the USGMII auto-negotiation word 3576 * 3577 * Helper for MAC PCS supporting the USGMII protocol and the auto-negotiation 3578 * code word. Decode the USGMII code word and populate the corresponding fields 3579 * (speed, duplex) into the phylink_link_state structure. The structure for this 3580 * word is the same as the USXGMII word, except it only supports speeds up to 3581 * 1Gbps. 3582 */ 3583 static void phylink_decode_usgmii_word(struct phylink_link_state *state, 3584 uint16_t lpa) 3585 { 3586 switch (lpa & MDIO_USXGMII_SPD_MASK) { 3587 case MDIO_USXGMII_10: 3588 state->speed = SPEED_10; 3589 break; 3590 case MDIO_USXGMII_100: 3591 state->speed = SPEED_100; 3592 break; 3593 case MDIO_USXGMII_1000: 3594 state->speed = SPEED_1000; 3595 break; 3596 default: 3597 state->link = false; 3598 return; 3599 } 3600 3601 if (lpa & MDIO_USXGMII_FULL_DUPLEX) 3602 state->duplex = DUPLEX_FULL; 3603 else 3604 state->duplex = DUPLEX_HALF; 3605 } 3606 3607 /** 3608 * phylink_mii_c22_pcs_decode_state() - Decode MAC PCS state from MII registers 3609 * @state: a pointer to a &struct phylink_link_state. 3610 * @bmsr: The value of the %MII_BMSR register 3611 * @lpa: The value of the %MII_LPA register 3612 * 3613 * Helper for MAC PCS supporting the 802.3 clause 22 register set for 3614 * clause 37 negotiation and/or SGMII control. 3615 * 3616 * Parse the Clause 37 or Cisco SGMII link partner negotiation word into 3617 * the phylink @state structure. This is suitable to be used for implementing 3618 * the pcs_get_state() member of the struct phylink_pcs_ops structure if 3619 * accessing @bmsr and @lpa cannot be done with MDIO directly. 3620 */ 3621 void phylink_mii_c22_pcs_decode_state(struct phylink_link_state *state, 3622 u16 bmsr, u16 lpa) 3623 { 3624 state->link = !!(bmsr & BMSR_LSTATUS); 3625 state->an_complete = !!(bmsr & BMSR_ANEGCOMPLETE); 3626 /* If there is no link or autonegotiation is disabled, the LP advertisement 3627 * data is not meaningful, so don't go any further. 3628 */ 3629 if (!state->link || !linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, 3630 state->advertising)) 3631 return; 3632 3633 switch (state->interface) { 3634 case PHY_INTERFACE_MODE_1000BASEX: 3635 phylink_decode_c37_word(state, lpa, SPEED_1000); 3636 break; 3637 3638 case PHY_INTERFACE_MODE_2500BASEX: 3639 phylink_decode_c37_word(state, lpa, SPEED_2500); 3640 break; 3641 3642 case PHY_INTERFACE_MODE_SGMII: 3643 case PHY_INTERFACE_MODE_QSGMII: 3644 phylink_decode_sgmii_word(state, lpa); 3645 break; 3646 case PHY_INTERFACE_MODE_QUSGMII: 3647 phylink_decode_usgmii_word(state, lpa); 3648 break; 3649 3650 default: 3651 state->link = false; 3652 break; 3653 } 3654 } 3655 EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_decode_state); 3656 3657 /** 3658 * phylink_mii_c22_pcs_get_state() - read the MAC PCS state 3659 * @pcs: a pointer to a &struct mdio_device. 3660 * @state: a pointer to a &struct phylink_link_state. 3661 * 3662 * Helper for MAC PCS supporting the 802.3 clause 22 register set for 3663 * clause 37 negotiation and/or SGMII control. 3664 * 3665 * Read the MAC PCS state from the MII device configured in @config and 3666 * parse the Clause 37 or Cisco SGMII link partner negotiation word into 3667 * the phylink @state structure. This is suitable to be directly plugged 3668 * into the pcs_get_state() member of the struct phylink_pcs_ops 3669 * structure. 3670 */ 3671 void phylink_mii_c22_pcs_get_state(struct mdio_device *pcs, 3672 struct phylink_link_state *state) 3673 { 3674 int bmsr, lpa; 3675 3676 bmsr = mdiodev_read(pcs, MII_BMSR); 3677 lpa = mdiodev_read(pcs, MII_LPA); 3678 if (bmsr < 0 || lpa < 0) { 3679 state->link = false; 3680 return; 3681 } 3682 3683 phylink_mii_c22_pcs_decode_state(state, bmsr, lpa); 3684 } 3685 EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_get_state); 3686 3687 /** 3688 * phylink_mii_c22_pcs_encode_advertisement() - configure the clause 37 PCS 3689 * advertisement 3690 * @interface: the PHY interface mode being configured 3691 * @advertising: the ethtool advertisement mask 3692 * 3693 * Helper for MAC PCS supporting the 802.3 clause 22 register set for 3694 * clause 37 negotiation and/or SGMII control. 3695 * 3696 * Encode the clause 37 PCS advertisement as specified by @interface and 3697 * @advertising. 3698 * 3699 * Return: The new value for @adv, or ``-EINVAL`` if it should not be changed. 3700 */ 3701 int phylink_mii_c22_pcs_encode_advertisement(phy_interface_t interface, 3702 const unsigned long *advertising) 3703 { 3704 u16 adv; 3705 3706 switch (interface) { 3707 case PHY_INTERFACE_MODE_1000BASEX: 3708 case PHY_INTERFACE_MODE_2500BASEX: 3709 adv = ADVERTISE_1000XFULL; 3710 if (linkmode_test_bit(ETHTOOL_LINK_MODE_Pause_BIT, 3711 advertising)) 3712 adv |= ADVERTISE_1000XPAUSE; 3713 if (linkmode_test_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, 3714 advertising)) 3715 adv |= ADVERTISE_1000XPSE_ASYM; 3716 return adv; 3717 case PHY_INTERFACE_MODE_SGMII: 3718 case PHY_INTERFACE_MODE_QSGMII: 3719 return 0x0001; 3720 default: 3721 /* Nothing to do for other modes */ 3722 return -EINVAL; 3723 } 3724 } 3725 EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_encode_advertisement); 3726 3727 /** 3728 * phylink_mii_c22_pcs_config() - configure clause 22 PCS 3729 * @pcs: a pointer to a &struct mdio_device. 3730 * @interface: the PHY interface mode being configured 3731 * @advertising: the ethtool advertisement mask 3732 * @neg_mode: PCS negotiation mode 3733 * 3734 * Configure a Clause 22 PCS PHY with the appropriate negotiation 3735 * parameters for the @mode, @interface and @advertising parameters. 3736 * Returns negative error number on failure, zero if the advertisement 3737 * has not changed, or positive if there is a change. 3738 */ 3739 int phylink_mii_c22_pcs_config(struct mdio_device *pcs, 3740 phy_interface_t interface, 3741 const unsigned long *advertising, 3742 unsigned int neg_mode) 3743 { 3744 bool changed = 0; 3745 u16 bmcr; 3746 int ret, adv; 3747 3748 adv = phylink_mii_c22_pcs_encode_advertisement(interface, advertising); 3749 if (adv >= 0) { 3750 ret = mdiobus_modify_changed(pcs->bus, pcs->addr, 3751 MII_ADVERTISE, 0xffff, adv); 3752 if (ret < 0) 3753 return ret; 3754 changed = ret; 3755 } 3756 3757 if (neg_mode == PHYLINK_PCS_NEG_INBAND_ENABLED) 3758 bmcr = BMCR_ANENABLE; 3759 else 3760 bmcr = 0; 3761 3762 /* Configure the inband state. Ensure ISOLATE bit is disabled */ 3763 ret = mdiodev_modify(pcs, MII_BMCR, BMCR_ANENABLE | BMCR_ISOLATE, bmcr); 3764 if (ret < 0) 3765 return ret; 3766 3767 return changed; 3768 } 3769 EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_config); 3770 3771 /** 3772 * phylink_mii_c22_pcs_an_restart() - restart 802.3z autonegotiation 3773 * @pcs: a pointer to a &struct mdio_device. 3774 * 3775 * Helper for MAC PCS supporting the 802.3 clause 22 register set for 3776 * clause 37 negotiation. 3777 * 3778 * Restart the clause 37 negotiation with the link partner. This is 3779 * suitable to be directly plugged into the pcs_get_state() member 3780 * of the struct phylink_pcs_ops structure. 3781 */ 3782 void phylink_mii_c22_pcs_an_restart(struct mdio_device *pcs) 3783 { 3784 int val = mdiodev_read(pcs, MII_BMCR); 3785 3786 if (val >= 0) { 3787 val |= BMCR_ANRESTART; 3788 3789 mdiodev_write(pcs, MII_BMCR, val); 3790 } 3791 } 3792 EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_an_restart); 3793 3794 void phylink_mii_c45_pcs_get_state(struct mdio_device *pcs, 3795 struct phylink_link_state *state) 3796 { 3797 struct mii_bus *bus = pcs->bus; 3798 int addr = pcs->addr; 3799 int stat; 3800 3801 stat = mdiobus_c45_read(bus, addr, MDIO_MMD_PCS, MDIO_STAT1); 3802 if (stat < 0) { 3803 state->link = false; 3804 return; 3805 } 3806 3807 state->link = !!(stat & MDIO_STAT1_LSTATUS); 3808 if (!state->link) 3809 return; 3810 3811 switch (state->interface) { 3812 case PHY_INTERFACE_MODE_10GBASER: 3813 state->speed = SPEED_10000; 3814 state->duplex = DUPLEX_FULL; 3815 break; 3816 3817 default: 3818 break; 3819 } 3820 } 3821 EXPORT_SYMBOL_GPL(phylink_mii_c45_pcs_get_state); 3822 3823 static int __init phylink_init(void) 3824 { 3825 for (int i = 0; i < ARRAY_SIZE(phylink_sfp_interface_preference); ++i) 3826 __set_bit(phylink_sfp_interface_preference[i], 3827 phylink_sfp_interfaces); 3828 3829 return 0; 3830 } 3831 3832 module_init(phylink_init); 3833 3834 MODULE_LICENSE("GPL v2"); 3835 MODULE_DESCRIPTION("phylink models the MAC to optional PHY connection"); 3836