1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * phylink models the MAC to optional PHY connection, supporting 4 * technologies such as SFP cages where the PHY is hot-pluggable. 5 * 6 * Copyright (C) 2015 Russell King 7 */ 8 #include <linux/acpi.h> 9 #include <linux/ethtool.h> 10 #include <linux/export.h> 11 #include <linux/gpio/consumer.h> 12 #include <linux/netdevice.h> 13 #include <linux/of.h> 14 #include <linux/of_mdio.h> 15 #include <linux/phy.h> 16 #include <linux/phy_fixed.h> 17 #include <linux/phylink.h> 18 #include <linux/rtnetlink.h> 19 #include <linux/spinlock.h> 20 #include <linux/timer.h> 21 #include <linux/workqueue.h> 22 23 #include "phy-caps.h" 24 #include "sfp.h" 25 #include "swphy.h" 26 27 enum { 28 PHYLINK_DISABLE_STOPPED, 29 PHYLINK_DISABLE_LINK, 30 PHYLINK_DISABLE_MAC_WOL, 31 PHYLINK_DISABLE_REPLAY, 32 33 PCS_STATE_DOWN = 0, 34 PCS_STATE_STARTING, 35 PCS_STATE_STARTED, 36 }; 37 38 /** 39 * struct phylink - internal data type for phylink 40 */ 41 struct phylink { 42 /* private: */ 43 struct net_device *netdev; 44 const struct phylink_mac_ops *mac_ops; 45 struct phylink_config *config; 46 struct phylink_pcs *pcs; 47 struct device *dev; 48 unsigned int old_link_state:1; 49 50 unsigned long phylink_disable_state; /* bitmask of disables */ 51 struct phy_device *phydev; 52 phy_interface_t link_interface; /* PHY_INTERFACE_xxx */ 53 u8 cfg_link_an_mode; /* MLO_AN_xxx */ 54 u8 req_link_an_mode; /* Requested MLO_AN_xxx mode */ 55 u8 act_link_an_mode; /* Active MLO_AN_xxx mode */ 56 u8 link_port; /* The current non-phy ethtool port */ 57 __ETHTOOL_DECLARE_LINK_MODE_MASK(supported); 58 __ETHTOOL_DECLARE_LINK_MODE_MASK(supported_lpi); 59 60 /* The link configuration settings */ 61 struct phylink_link_state link_config; 62 63 /* The current settings */ 64 phy_interface_t cur_interface; 65 66 struct gpio_desc *link_gpio; 67 unsigned int link_irq; 68 struct timer_list link_poll; 69 70 struct mutex state_mutex; 71 /* Serialize updates to pl->phydev with phylink_resolve() */ 72 struct mutex phydev_mutex; 73 struct phylink_link_state phy_state; 74 unsigned int phy_ib_mode; 75 struct work_struct resolve; 76 unsigned int pcs_neg_mode; 77 unsigned int pcs_state; 78 79 bool link_failed; 80 bool suspend_link_up; 81 bool force_major_config; 82 bool major_config_failed; 83 bool mac_supports_eee_ops; 84 bool mac_supports_eee; 85 bool phy_enable_tx_lpi; 86 bool mac_enable_tx_lpi; 87 bool mac_tx_clk_stop; 88 u32 mac_tx_lpi_timer; 89 u8 mac_rx_clk_stop_blocked; 90 91 struct sfp_bus *sfp_bus; 92 bool sfp_may_have_phy; 93 DECLARE_PHY_INTERFACE_MASK(sfp_interfaces); 94 __ETHTOOL_DECLARE_LINK_MODE_MASK(sfp_support); 95 u8 sfp_port; 96 97 struct eee_config eee_cfg; 98 99 u32 wolopts_mac; 100 u8 wol_sopass[SOPASS_MAX]; 101 }; 102 103 #define phylink_printk(level, pl, fmt, ...) \ 104 do { \ 105 if ((pl)->config->type == PHYLINK_NETDEV) \ 106 netdev_printk(level, (pl)->netdev, fmt, ##__VA_ARGS__); \ 107 else if ((pl)->config->type == PHYLINK_DEV) \ 108 dev_printk(level, (pl)->dev, fmt, ##__VA_ARGS__); \ 109 } while (0) 110 111 #define phylink_err(pl, fmt, ...) \ 112 phylink_printk(KERN_ERR, pl, fmt, ##__VA_ARGS__) 113 #define phylink_warn(pl, fmt, ...) \ 114 phylink_printk(KERN_WARNING, pl, fmt, ##__VA_ARGS__) 115 #define phylink_info(pl, fmt, ...) \ 116 phylink_printk(KERN_INFO, pl, fmt, ##__VA_ARGS__) 117 #if defined(CONFIG_DYNAMIC_DEBUG) 118 #define phylink_dbg(pl, fmt, ...) \ 119 do { \ 120 if ((pl)->config->type == PHYLINK_NETDEV) \ 121 netdev_dbg((pl)->netdev, fmt, ##__VA_ARGS__); \ 122 else if ((pl)->config->type == PHYLINK_DEV) \ 123 dev_dbg((pl)->dev, fmt, ##__VA_ARGS__); \ 124 } while (0) 125 #elif defined(DEBUG) 126 #define phylink_dbg(pl, fmt, ...) \ 127 phylink_printk(KERN_DEBUG, pl, fmt, ##__VA_ARGS__) 128 #else 129 #define phylink_dbg(pl, fmt, ...) \ 130 ({ \ 131 if (0) \ 132 phylink_printk(KERN_DEBUG, pl, fmt, ##__VA_ARGS__); \ 133 }) 134 #endif 135 136 static const phy_interface_t phylink_sfp_interface_preference[] = { 137 PHY_INTERFACE_MODE_100GBASEP, 138 PHY_INTERFACE_MODE_50GBASER, 139 PHY_INTERFACE_MODE_LAUI, 140 PHY_INTERFACE_MODE_25GBASER, 141 PHY_INTERFACE_MODE_USXGMII, 142 PHY_INTERFACE_MODE_10GBASER, 143 PHY_INTERFACE_MODE_5GBASER, 144 PHY_INTERFACE_MODE_2500BASEX, 145 PHY_INTERFACE_MODE_SGMII, 146 PHY_INTERFACE_MODE_1000BASEX, 147 PHY_INTERFACE_MODE_100BASEX, 148 }; 149 150 static DECLARE_PHY_INTERFACE_MASK(phylink_sfp_interfaces); 151 152 /** 153 * phylink_set_port_modes() - set the port type modes in the ethtool mask 154 * @mask: ethtool link mode mask 155 * 156 * Sets all the port type modes in the ethtool mask. 157 */ 158 void phylink_set_port_modes(unsigned long *mask) 159 { 160 phylink_set(mask, TP); 161 phylink_set(mask, AUI); 162 phylink_set(mask, MII); 163 phylink_set(mask, FIBRE); 164 phylink_set(mask, BNC); 165 phylink_set(mask, Backplane); 166 } 167 EXPORT_SYMBOL_GPL(phylink_set_port_modes); 168 169 static int phylink_is_empty_linkmode(const unsigned long *linkmode) 170 { 171 __ETHTOOL_DECLARE_LINK_MODE_MASK(tmp) = { 0, }; 172 173 phylink_set_port_modes(tmp); 174 phylink_set(tmp, Autoneg); 175 phylink_set(tmp, Pause); 176 phylink_set(tmp, Asym_Pause); 177 178 return linkmode_subset(linkmode, tmp); 179 } 180 181 static const char *phylink_an_mode_str(unsigned int mode) 182 { 183 static const char *modestr[] = { 184 [MLO_AN_PHY] = "phy", 185 [MLO_AN_FIXED] = "fixed", 186 [MLO_AN_INBAND] = "inband", 187 }; 188 189 return mode < ARRAY_SIZE(modestr) ? modestr[mode] : "unknown"; 190 } 191 192 static const char *phylink_pcs_mode_str(unsigned int mode) 193 { 194 if (!mode) 195 return "none"; 196 197 if (mode & PHYLINK_PCS_NEG_OUTBAND) 198 return "outband"; 199 200 if (mode & PHYLINK_PCS_NEG_INBAND) { 201 if (mode & PHYLINK_PCS_NEG_ENABLED) 202 return "inband,an-enabled"; 203 else 204 return "inband,an-disabled"; 205 } 206 207 return "unknown"; 208 } 209 210 static unsigned int phylink_interface_signal_rate(phy_interface_t interface) 211 { 212 switch (interface) { 213 case PHY_INTERFACE_MODE_SGMII: 214 case PHY_INTERFACE_MODE_1000BASEX: /* 1.25Mbd */ 215 return 1250; 216 case PHY_INTERFACE_MODE_2500BASEX: /* 3.125Mbd */ 217 return 3125; 218 case PHY_INTERFACE_MODE_5GBASER: /* 5.15625Mbd */ 219 return 5156; 220 case PHY_INTERFACE_MODE_10GBASER: /* 10.3125Mbd */ 221 return 10313; 222 default: 223 return 0; 224 } 225 } 226 227 /** 228 * phylink_interface_max_speed() - get the maximum speed of a phy interface 229 * @interface: phy interface mode defined by &typedef phy_interface_t 230 * 231 * Determine the maximum speed of a phy interface. This is intended to help 232 * determine the correct speed to pass to the MAC when the phy is performing 233 * rate matching. 234 * 235 * Return: The maximum speed of @interface 236 */ 237 static int phylink_interface_max_speed(phy_interface_t interface) 238 { 239 switch (interface) { 240 case PHY_INTERFACE_MODE_100BASEX: 241 case PHY_INTERFACE_MODE_REVRMII: 242 case PHY_INTERFACE_MODE_RMII: 243 case PHY_INTERFACE_MODE_SMII: 244 case PHY_INTERFACE_MODE_REVMII: 245 case PHY_INTERFACE_MODE_MII: 246 case PHY_INTERFACE_MODE_MIILITE: 247 return SPEED_100; 248 249 case PHY_INTERFACE_MODE_TBI: 250 case PHY_INTERFACE_MODE_MOCA: 251 case PHY_INTERFACE_MODE_RTBI: 252 case PHY_INTERFACE_MODE_1000BASEX: 253 case PHY_INTERFACE_MODE_1000BASEKX: 254 case PHY_INTERFACE_MODE_TRGMII: 255 case PHY_INTERFACE_MODE_RGMII_TXID: 256 case PHY_INTERFACE_MODE_RGMII_RXID: 257 case PHY_INTERFACE_MODE_RGMII_ID: 258 case PHY_INTERFACE_MODE_RGMII: 259 case PHY_INTERFACE_MODE_PSGMII: 260 case PHY_INTERFACE_MODE_QSGMII: 261 case PHY_INTERFACE_MODE_QUSGMII: 262 case PHY_INTERFACE_MODE_SGMII: 263 case PHY_INTERFACE_MODE_GMII: 264 return SPEED_1000; 265 266 case PHY_INTERFACE_MODE_2500BASEX: 267 case PHY_INTERFACE_MODE_10G_QXGMII: 268 return SPEED_2500; 269 270 case PHY_INTERFACE_MODE_5GBASER: 271 return SPEED_5000; 272 273 case PHY_INTERFACE_MODE_XGMII: 274 case PHY_INTERFACE_MODE_RXAUI: 275 case PHY_INTERFACE_MODE_XAUI: 276 case PHY_INTERFACE_MODE_10GBASER: 277 case PHY_INTERFACE_MODE_10GKR: 278 case PHY_INTERFACE_MODE_USXGMII: 279 return SPEED_10000; 280 281 case PHY_INTERFACE_MODE_25GBASER: 282 return SPEED_25000; 283 284 case PHY_INTERFACE_MODE_XLGMII: 285 return SPEED_40000; 286 287 case PHY_INTERFACE_MODE_50GBASER: 288 case PHY_INTERFACE_MODE_LAUI: 289 return SPEED_50000; 290 291 case PHY_INTERFACE_MODE_100GBASEP: 292 return SPEED_100000; 293 294 case PHY_INTERFACE_MODE_INTERNAL: 295 case PHY_INTERFACE_MODE_NA: 296 case PHY_INTERFACE_MODE_MAX: 297 /* No idea! Garbage in, unknown out */ 298 return SPEED_UNKNOWN; 299 } 300 301 /* If we get here, someone forgot to add an interface mode above */ 302 WARN_ON_ONCE(1); 303 return SPEED_UNKNOWN; 304 } 305 306 static struct { 307 unsigned long mask; 308 int speed; 309 unsigned int duplex; 310 unsigned int caps_bit; 311 } phylink_caps_params[] = { 312 { MAC_400000FD, SPEED_400000, DUPLEX_FULL, BIT(LINK_CAPA_400000FD) }, 313 { MAC_200000FD, SPEED_200000, DUPLEX_FULL, BIT(LINK_CAPA_200000FD) }, 314 { MAC_100000FD, SPEED_100000, DUPLEX_FULL, BIT(LINK_CAPA_100000FD) }, 315 { MAC_80000FD, SPEED_80000, DUPLEX_FULL, BIT(LINK_CAPA_80000FD) }, 316 { MAC_56000FD, SPEED_56000, DUPLEX_FULL, BIT(LINK_CAPA_56000FD) }, 317 { MAC_50000FD, SPEED_50000, DUPLEX_FULL, BIT(LINK_CAPA_50000FD) }, 318 { MAC_40000FD, SPEED_40000, DUPLEX_FULL, BIT(LINK_CAPA_40000FD) }, 319 { MAC_25000FD, SPEED_25000, DUPLEX_FULL, BIT(LINK_CAPA_25000FD) }, 320 { MAC_20000FD, SPEED_20000, DUPLEX_FULL, BIT(LINK_CAPA_20000FD) }, 321 { MAC_10000FD, SPEED_10000, DUPLEX_FULL, BIT(LINK_CAPA_10000FD) }, 322 { MAC_5000FD, SPEED_5000, DUPLEX_FULL, BIT(LINK_CAPA_5000FD) }, 323 { MAC_2500FD, SPEED_2500, DUPLEX_FULL, BIT(LINK_CAPA_2500FD) }, 324 { MAC_1000FD, SPEED_1000, DUPLEX_FULL, BIT(LINK_CAPA_1000FD) }, 325 { MAC_1000HD, SPEED_1000, DUPLEX_HALF, BIT(LINK_CAPA_1000HD) }, 326 { MAC_100FD, SPEED_100, DUPLEX_FULL, BIT(LINK_CAPA_100FD) }, 327 { MAC_100HD, SPEED_100, DUPLEX_HALF, BIT(LINK_CAPA_100HD) }, 328 { MAC_10FD, SPEED_10, DUPLEX_FULL, BIT(LINK_CAPA_10FD) }, 329 { MAC_10HD, SPEED_10, DUPLEX_HALF, BIT(LINK_CAPA_10HD) }, 330 }; 331 332 /** 333 * phylink_caps_to_link_caps() - Convert a set of MAC capabilities LINK caps 334 * @caps: A set of MAC capabilities 335 * 336 * Returns: The corresponding set of LINK_CAPA as defined in phy-caps.h 337 */ 338 static unsigned long phylink_caps_to_link_caps(unsigned long caps) 339 { 340 unsigned long link_caps = 0; 341 int i; 342 343 for (i = 0; i < ARRAY_SIZE(phylink_caps_params); i++) 344 if (caps & phylink_caps_params[i].mask) 345 link_caps |= phylink_caps_params[i].caps_bit; 346 347 return link_caps; 348 } 349 350 static unsigned long phylink_link_caps_to_mac_caps(unsigned long link_caps) 351 { 352 unsigned long caps = 0; 353 int i; 354 355 for (i = 0; i < ARRAY_SIZE(phylink_caps_params); i++) 356 if (link_caps & phylink_caps_params[i].caps_bit) 357 caps |= phylink_caps_params[i].mask; 358 359 return caps; 360 } 361 362 /** 363 * phylink_caps_to_linkmodes() - Convert capabilities to ethtool link modes 364 * @linkmodes: ethtool linkmode mask (must be already initialised) 365 * @caps: bitmask of MAC capabilities 366 * 367 * Set all possible pause, speed and duplex linkmodes in @linkmodes that are 368 * supported by the @caps. @linkmodes must have been initialised previously. 369 */ 370 static void phylink_caps_to_linkmodes(unsigned long *linkmodes, 371 unsigned long caps) 372 { 373 unsigned long link_caps = phylink_caps_to_link_caps(caps); 374 375 if (caps & MAC_SYM_PAUSE) 376 __set_bit(ETHTOOL_LINK_MODE_Pause_BIT, linkmodes); 377 378 if (caps & MAC_ASYM_PAUSE) 379 __set_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, linkmodes); 380 381 phy_caps_linkmodes(link_caps, linkmodes); 382 } 383 384 /** 385 * phylink_limit_mac_speed - limit the phylink_config to a maximum speed 386 * @config: pointer to a &struct phylink_config 387 * @max_speed: maximum speed 388 * 389 * Mask off MAC capabilities for speeds higher than the @max_speed parameter. 390 * Any further motifications of config.mac_capabilities will override this. 391 */ 392 void phylink_limit_mac_speed(struct phylink_config *config, u32 max_speed) 393 { 394 int i; 395 396 for (i = 0; i < ARRAY_SIZE(phylink_caps_params) && 397 phylink_caps_params[i].speed > max_speed; i++) 398 config->mac_capabilities &= ~phylink_caps_params[i].mask; 399 } 400 EXPORT_SYMBOL_GPL(phylink_limit_mac_speed); 401 402 /** 403 * phylink_cap_from_speed_duplex - Get mac capability from speed/duplex 404 * @speed: the speed to search for 405 * @duplex: the duplex to search for 406 * 407 * Find the mac capability for a given speed and duplex. 408 * 409 * Return: A mask with the mac capability patching @speed and @duplex, or 0 if 410 * there were no matches. 411 */ 412 static unsigned long phylink_cap_from_speed_duplex(int speed, 413 unsigned int duplex) 414 { 415 int i; 416 417 for (i = 0; i < ARRAY_SIZE(phylink_caps_params); i++) { 418 if (speed == phylink_caps_params[i].speed && 419 duplex == phylink_caps_params[i].duplex) 420 return phylink_caps_params[i].mask; 421 } 422 423 return 0; 424 } 425 426 /** 427 * phylink_get_capabilities() - get capabilities for a given MAC 428 * @interface: phy interface mode defined by &typedef phy_interface_t 429 * @mac_capabilities: bitmask of MAC capabilities 430 * @rate_matching: type of rate matching being performed 431 * 432 * Get the MAC capabilities that are supported by the @interface mode and 433 * @mac_capabilities. 434 */ 435 static unsigned long phylink_get_capabilities(phy_interface_t interface, 436 unsigned long mac_capabilities, 437 int rate_matching) 438 { 439 unsigned long link_caps = phy_caps_from_interface(interface); 440 int max_speed = phylink_interface_max_speed(interface); 441 unsigned long caps = MAC_SYM_PAUSE | MAC_ASYM_PAUSE; 442 unsigned long matched_caps = 0; 443 444 caps |= phylink_link_caps_to_mac_caps(link_caps); 445 446 switch (rate_matching) { 447 case RATE_MATCH_OPEN_LOOP: 448 /* TODO */ 449 fallthrough; 450 case RATE_MATCH_NONE: 451 matched_caps = 0; 452 break; 453 case RATE_MATCH_PAUSE: { 454 /* The MAC must support asymmetric pause towards the local 455 * device for this. We could allow just symmetric pause, but 456 * then we might have to renegotiate if the link partner 457 * doesn't support pause. This is because there's no way to 458 * accept pause frames without transmitting them if we only 459 * support symmetric pause. 460 */ 461 if (!(mac_capabilities & MAC_SYM_PAUSE) || 462 !(mac_capabilities & MAC_ASYM_PAUSE)) 463 break; 464 465 /* We can't adapt if the MAC doesn't support the interface's 466 * max speed at full duplex. 467 */ 468 if (mac_capabilities & 469 phylink_cap_from_speed_duplex(max_speed, DUPLEX_FULL)) 470 matched_caps = GENMASK(__fls(caps), __fls(MAC_10HD)); 471 break; 472 } 473 case RATE_MATCH_CRS: 474 /* The MAC must support half duplex at the interface's max 475 * speed. 476 */ 477 if (mac_capabilities & 478 phylink_cap_from_speed_duplex(max_speed, DUPLEX_HALF)) { 479 matched_caps = GENMASK(__fls(caps), __fls(MAC_10HD)); 480 matched_caps &= mac_capabilities; 481 } 482 break; 483 } 484 485 return (caps & mac_capabilities) | matched_caps; 486 } 487 488 /** 489 * phylink_validate_mask_caps() - Restrict link modes based on caps 490 * @supported: ethtool bitmask for supported link modes. 491 * @state: pointer to a &struct phylink_link_state. 492 * @mac_capabilities: bitmask of MAC capabilities 493 * 494 * Calculate the supported link modes based on @mac_capabilities, and restrict 495 * @supported and @state based on that. Use this function if your capabiliies 496 * aren't constant, such as if they vary depending on the interface. 497 */ 498 static void phylink_validate_mask_caps(unsigned long *supported, 499 struct phylink_link_state *state, 500 unsigned long mac_capabilities) 501 { 502 __ETHTOOL_DECLARE_LINK_MODE_MASK(mask) = { 0, }; 503 unsigned long caps; 504 505 phylink_set_port_modes(mask); 506 phylink_set(mask, Autoneg); 507 caps = phylink_get_capabilities(state->interface, mac_capabilities, 508 state->rate_matching); 509 phylink_caps_to_linkmodes(mask, caps); 510 511 linkmode_and(supported, supported, mask); 512 linkmode_and(state->advertising, state->advertising, mask); 513 } 514 515 static int phylink_validate_mac_and_pcs(struct phylink *pl, 516 unsigned long *supported, 517 struct phylink_link_state *state) 518 { 519 struct phylink_pcs *pcs = NULL; 520 unsigned long capabilities; 521 int ret; 522 523 /* Get the PCS for this interface mode */ 524 if (pl->mac_ops->mac_select_pcs) { 525 pcs = pl->mac_ops->mac_select_pcs(pl->config, state->interface); 526 if (IS_ERR(pcs)) 527 return PTR_ERR(pcs); 528 } 529 530 if (pcs) { 531 /* The PCS, if present, must be setup before phylink_create() 532 * has been called. If the ops is not initialised, print an 533 * error and backtrace rather than oopsing the kernel. 534 */ 535 if (!pcs->ops) { 536 phylink_err(pl, "interface %s: uninitialised PCS\n", 537 phy_modes(state->interface)); 538 dump_stack(); 539 return -EINVAL; 540 } 541 542 /* Ensure that this PCS supports the interface which the MAC 543 * returned it for. It is an error for the MAC to return a PCS 544 * that does not support the interface mode. 545 */ 546 if (!phy_interface_empty(pcs->supported_interfaces) && 547 !test_bit(state->interface, pcs->supported_interfaces)) { 548 phylink_err(pl, "MAC returned PCS which does not support %s\n", 549 phy_modes(state->interface)); 550 return -EINVAL; 551 } 552 553 /* Validate the link parameters with the PCS */ 554 if (pcs->ops->pcs_validate) { 555 ret = pcs->ops->pcs_validate(pcs, supported, state); 556 if (ret < 0 || phylink_is_empty_linkmode(supported)) 557 return -EINVAL; 558 559 /* Ensure the advertising mask is a subset of the 560 * supported mask. 561 */ 562 linkmode_and(state->advertising, state->advertising, 563 supported); 564 } 565 } 566 567 /* Then validate the link parameters with the MAC */ 568 if (pl->mac_ops->mac_get_caps) 569 capabilities = pl->mac_ops->mac_get_caps(pl->config, 570 state->interface); 571 else 572 capabilities = pl->config->mac_capabilities; 573 574 phylink_validate_mask_caps(supported, state, capabilities); 575 576 return phylink_is_empty_linkmode(supported) ? -EINVAL : 0; 577 } 578 579 static void phylink_validate_one(struct phylink *pl, struct phy_device *phy, 580 const unsigned long *supported, 581 const struct phylink_link_state *state, 582 phy_interface_t interface, 583 unsigned long *accum_supported, 584 unsigned long *accum_advertising) 585 { 586 __ETHTOOL_DECLARE_LINK_MODE_MASK(tmp_supported); 587 struct phylink_link_state tmp_state; 588 589 linkmode_copy(tmp_supported, supported); 590 591 tmp_state = *state; 592 tmp_state.interface = interface; 593 594 if (phy) 595 tmp_state.rate_matching = phy_get_rate_matching(phy, interface); 596 597 if (!phylink_validate_mac_and_pcs(pl, tmp_supported, &tmp_state)) { 598 phylink_dbg(pl, " interface %u (%s) rate match %s supports %*pbl\n", 599 interface, phy_modes(interface), 600 phy_rate_matching_to_str(tmp_state.rate_matching), 601 __ETHTOOL_LINK_MODE_MASK_NBITS, tmp_supported); 602 603 linkmode_or(accum_supported, accum_supported, tmp_supported); 604 linkmode_or(accum_advertising, accum_advertising, 605 tmp_state.advertising); 606 } 607 } 608 609 static int phylink_validate_mask(struct phylink *pl, struct phy_device *phy, 610 unsigned long *supported, 611 struct phylink_link_state *state, 612 const unsigned long *interfaces) 613 { 614 __ETHTOOL_DECLARE_LINK_MODE_MASK(all_adv) = { 0, }; 615 __ETHTOOL_DECLARE_LINK_MODE_MASK(all_s) = { 0, }; 616 int interface; 617 618 for_each_set_bit(interface, interfaces, PHY_INTERFACE_MODE_MAX) 619 phylink_validate_one(pl, phy, supported, state, interface, 620 all_s, all_adv); 621 622 linkmode_copy(supported, all_s); 623 linkmode_copy(state->advertising, all_adv); 624 625 return phylink_is_empty_linkmode(supported) ? -EINVAL : 0; 626 } 627 628 static int phylink_validate(struct phylink *pl, unsigned long *supported, 629 struct phylink_link_state *state) 630 { 631 const unsigned long *interfaces = pl->config->supported_interfaces; 632 633 if (state->interface == PHY_INTERFACE_MODE_NA) 634 return phylink_validate_mask(pl, NULL, supported, state, 635 interfaces); 636 637 if (!test_bit(state->interface, interfaces)) 638 return -EINVAL; 639 640 return phylink_validate_mac_and_pcs(pl, supported, state); 641 } 642 643 static void phylink_fill_fixedlink_supported(unsigned long *supported) 644 { 645 linkmode_set_bit(ETHTOOL_LINK_MODE_Pause_BIT, supported); 646 linkmode_set_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, supported); 647 linkmode_set_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, supported); 648 linkmode_set_bit(ETHTOOL_LINK_MODE_10baseT_Half_BIT, supported); 649 linkmode_set_bit(ETHTOOL_LINK_MODE_10baseT_Full_BIT, supported); 650 linkmode_set_bit(ETHTOOL_LINK_MODE_100baseT_Half_BIT, supported); 651 linkmode_set_bit(ETHTOOL_LINK_MODE_100baseT_Full_BIT, supported); 652 linkmode_set_bit(ETHTOOL_LINK_MODE_1000baseT_Half_BIT, supported); 653 linkmode_set_bit(ETHTOOL_LINK_MODE_1000baseT_Full_BIT, supported); 654 linkmode_set_bit(ETHTOOL_LINK_MODE_2500baseT_Full_BIT, supported); 655 linkmode_set_bit(ETHTOOL_LINK_MODE_5000baseT_Full_BIT, supported); 656 linkmode_set_bit(ETHTOOL_LINK_MODE_10000baseT_Full_BIT, supported); 657 } 658 659 static int phylink_parse_fixedlink(struct phylink *pl, 660 const struct fwnode_handle *fwnode) 661 { 662 __ETHTOOL_DECLARE_LINK_MODE_MASK(match) = { 0, }; 663 __ETHTOOL_DECLARE_LINK_MODE_MASK(mask) = { 0, }; 664 const struct link_capabilities *c; 665 struct fwnode_handle *fixed_node; 666 struct gpio_desc *desc; 667 u32 speed; 668 int ret; 669 670 fixed_node = fwnode_get_named_child_node(fwnode, "fixed-link"); 671 if (fixed_node) { 672 ret = fwnode_property_read_u32(fixed_node, "speed", &speed); 673 674 pl->link_config.speed = speed; 675 pl->link_config.duplex = DUPLEX_HALF; 676 677 if (fwnode_property_read_bool(fixed_node, "full-duplex")) 678 pl->link_config.duplex = DUPLEX_FULL; 679 680 /* We treat the "pause" and "asym-pause" terminology as 681 * defining the link partner's ability. 682 */ 683 if (fwnode_property_read_bool(fixed_node, "pause")) 684 __set_bit(ETHTOOL_LINK_MODE_Pause_BIT, 685 pl->link_config.lp_advertising); 686 if (fwnode_property_read_bool(fixed_node, "asym-pause")) 687 __set_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, 688 pl->link_config.lp_advertising); 689 690 if (ret == 0) { 691 desc = fwnode_gpiod_get_index(fixed_node, "link", 0, 692 GPIOD_IN, "?"); 693 694 if (!IS_ERR(desc)) 695 pl->link_gpio = desc; 696 else if (desc == ERR_PTR(-EPROBE_DEFER)) 697 ret = -EPROBE_DEFER; 698 } 699 fwnode_handle_put(fixed_node); 700 701 if (ret) 702 return ret; 703 } else { 704 u32 prop[5]; 705 706 ret = fwnode_property_read_u32_array(fwnode, "fixed-link", 707 NULL, 0); 708 if (ret != ARRAY_SIZE(prop)) { 709 phylink_err(pl, "broken fixed-link?\n"); 710 return -EINVAL; 711 } 712 713 phylink_warn(pl, "%pfw uses deprecated array-style fixed-link binding!\n", 714 fwnode); 715 716 ret = fwnode_property_read_u32_array(fwnode, "fixed-link", 717 prop, ARRAY_SIZE(prop)); 718 if (!ret) { 719 pl->link_config.duplex = prop[1] ? 720 DUPLEX_FULL : DUPLEX_HALF; 721 pl->link_config.speed = prop[2]; 722 if (prop[3]) 723 __set_bit(ETHTOOL_LINK_MODE_Pause_BIT, 724 pl->link_config.lp_advertising); 725 if (prop[4]) 726 __set_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, 727 pl->link_config.lp_advertising); 728 } 729 } 730 731 if (pl->link_config.speed > SPEED_1000 && 732 pl->link_config.duplex != DUPLEX_FULL) 733 phylink_warn(pl, "fixed link specifies half duplex for %dMbps link?\n", 734 pl->link_config.speed); 735 736 linkmode_zero(pl->supported); 737 phylink_fill_fixedlink_supported(pl->supported); 738 739 linkmode_copy(pl->link_config.advertising, pl->supported); 740 phylink_validate(pl, pl->supported, &pl->link_config); 741 742 c = phy_caps_lookup(pl->link_config.speed, pl->link_config.duplex, 743 pl->supported, true); 744 if (c) 745 linkmode_and(match, pl->supported, c->linkmodes); 746 747 linkmode_set_bit(ETHTOOL_LINK_MODE_Pause_BIT, mask); 748 linkmode_set_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, mask); 749 linkmode_set_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, mask); 750 linkmode_and(pl->supported, pl->supported, mask); 751 752 phylink_set(pl->supported, MII); 753 754 if (c) { 755 linkmode_or(pl->supported, pl->supported, match); 756 linkmode_or(pl->link_config.lp_advertising, 757 pl->link_config.lp_advertising, match); 758 } else { 759 phylink_warn(pl, "fixed link %s duplex %dMbps not recognised\n", 760 pl->link_config.duplex == DUPLEX_FULL ? "full" : "half", 761 pl->link_config.speed); 762 } 763 764 linkmode_and(pl->link_config.advertising, pl->link_config.advertising, 765 pl->supported); 766 767 pl->link_config.link = 1; 768 pl->link_config.an_complete = 1; 769 770 return 0; 771 } 772 773 static int phylink_parse_mode(struct phylink *pl, 774 const struct fwnode_handle *fwnode) 775 { 776 struct fwnode_handle *dn; 777 const char *managed; 778 unsigned long caps; 779 780 if (pl->config->default_an_inband) 781 pl->cfg_link_an_mode = MLO_AN_INBAND; 782 783 dn = fwnode_get_named_child_node(fwnode, "fixed-link"); 784 if (dn || fwnode_property_present(fwnode, "fixed-link")) 785 pl->cfg_link_an_mode = MLO_AN_FIXED; 786 fwnode_handle_put(dn); 787 788 if ((fwnode_property_read_string(fwnode, "managed", &managed) == 0 && 789 strcmp(managed, "in-band-status") == 0)) { 790 if (pl->cfg_link_an_mode == MLO_AN_FIXED) { 791 phylink_err(pl, 792 "can't use both fixed-link and in-band-status\n"); 793 return -EINVAL; 794 } 795 796 pl->cfg_link_an_mode = MLO_AN_INBAND; 797 } 798 799 if (pl->cfg_link_an_mode == MLO_AN_INBAND) { 800 linkmode_zero(pl->supported); 801 phylink_set(pl->supported, MII); 802 phylink_set(pl->supported, Autoneg); 803 phylink_set(pl->supported, Asym_Pause); 804 phylink_set(pl->supported, Pause); 805 806 switch (pl->link_config.interface) { 807 case PHY_INTERFACE_MODE_SGMII: 808 case PHY_INTERFACE_MODE_PSGMII: 809 case PHY_INTERFACE_MODE_QSGMII: 810 case PHY_INTERFACE_MODE_QUSGMII: 811 case PHY_INTERFACE_MODE_RGMII: 812 case PHY_INTERFACE_MODE_RGMII_ID: 813 case PHY_INTERFACE_MODE_RGMII_RXID: 814 case PHY_INTERFACE_MODE_RGMII_TXID: 815 case PHY_INTERFACE_MODE_RTBI: 816 case PHY_INTERFACE_MODE_1000BASEX: 817 case PHY_INTERFACE_MODE_2500BASEX: 818 case PHY_INTERFACE_MODE_5GBASER: 819 case PHY_INTERFACE_MODE_25GBASER: 820 case PHY_INTERFACE_MODE_USXGMII: 821 case PHY_INTERFACE_MODE_10G_QXGMII: 822 case PHY_INTERFACE_MODE_10GKR: 823 case PHY_INTERFACE_MODE_10GBASER: 824 case PHY_INTERFACE_MODE_XLGMII: 825 case PHY_INTERFACE_MODE_50GBASER: 826 case PHY_INTERFACE_MODE_LAUI: 827 case PHY_INTERFACE_MODE_100GBASEP: 828 caps = ~(MAC_SYM_PAUSE | MAC_ASYM_PAUSE); 829 caps = phylink_get_capabilities(pl->link_config.interface, caps, 830 RATE_MATCH_NONE); 831 phylink_caps_to_linkmodes(pl->supported, caps); 832 break; 833 834 default: 835 phylink_err(pl, 836 "incorrect link mode %s for in-band status\n", 837 phy_modes(pl->link_config.interface)); 838 return -EINVAL; 839 } 840 841 linkmode_copy(pl->link_config.advertising, pl->supported); 842 843 if (phylink_validate(pl, pl->supported, &pl->link_config)) { 844 phylink_err(pl, 845 "failed to validate link configuration for in-band status\n"); 846 return -EINVAL; 847 } 848 } 849 850 return 0; 851 } 852 853 static void phylink_apply_manual_flow(struct phylink *pl, 854 struct phylink_link_state *state) 855 { 856 /* If autoneg is disabled, pause AN is also disabled */ 857 if (!linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, 858 state->advertising)) 859 state->pause &= ~MLO_PAUSE_AN; 860 861 /* Manual configuration of pause modes */ 862 if (!(pl->link_config.pause & MLO_PAUSE_AN)) 863 state->pause = pl->link_config.pause; 864 } 865 866 static void phylink_resolve_an_pause(struct phylink_link_state *state) 867 { 868 bool tx_pause, rx_pause; 869 870 if (state->duplex == DUPLEX_FULL) { 871 linkmode_resolve_pause(state->advertising, 872 state->lp_advertising, 873 &tx_pause, &rx_pause); 874 if (tx_pause) 875 state->pause |= MLO_PAUSE_TX; 876 if (rx_pause) 877 state->pause |= MLO_PAUSE_RX; 878 } 879 } 880 881 static unsigned int phylink_pcs_inband_caps(struct phylink_pcs *pcs, 882 phy_interface_t interface) 883 { 884 if (pcs && pcs->ops->pcs_inband_caps) 885 return pcs->ops->pcs_inband_caps(pcs, interface); 886 887 return 0; 888 } 889 890 static void phylink_pcs_pre_config(struct phylink_pcs *pcs, 891 phy_interface_t interface) 892 { 893 if (pcs && pcs->ops->pcs_pre_config) 894 pcs->ops->pcs_pre_config(pcs, interface); 895 } 896 897 static int phylink_pcs_post_config(struct phylink_pcs *pcs, 898 phy_interface_t interface) 899 { 900 int err = 0; 901 902 if (pcs && pcs->ops->pcs_post_config) 903 err = pcs->ops->pcs_post_config(pcs, interface); 904 905 return err; 906 } 907 908 static void phylink_pcs_disable(struct phylink_pcs *pcs) 909 { 910 if (pcs && pcs->ops->pcs_disable) 911 pcs->ops->pcs_disable(pcs); 912 } 913 914 static int phylink_pcs_enable(struct phylink_pcs *pcs) 915 { 916 int err = 0; 917 918 if (pcs && pcs->ops->pcs_enable) 919 err = pcs->ops->pcs_enable(pcs); 920 921 return err; 922 } 923 924 static int phylink_pcs_config(struct phylink_pcs *pcs, unsigned int neg_mode, 925 const struct phylink_link_state *state, 926 bool permit_pause_to_mac) 927 { 928 if (!pcs) 929 return 0; 930 931 return pcs->ops->pcs_config(pcs, neg_mode, state->interface, 932 state->advertising, permit_pause_to_mac); 933 } 934 935 static void phylink_pcs_link_up(struct phylink_pcs *pcs, unsigned int neg_mode, 936 phy_interface_t interface, int speed, 937 int duplex) 938 { 939 if (pcs && pcs->ops->pcs_link_up) 940 pcs->ops->pcs_link_up(pcs, neg_mode, interface, speed, duplex); 941 } 942 943 static void phylink_pcs_disable_eee(struct phylink_pcs *pcs) 944 { 945 if (pcs && pcs->ops->pcs_disable_eee) 946 pcs->ops->pcs_disable_eee(pcs); 947 } 948 949 static void phylink_pcs_enable_eee(struct phylink_pcs *pcs) 950 { 951 if (pcs && pcs->ops->pcs_enable_eee) 952 pcs->ops->pcs_enable_eee(pcs); 953 } 954 955 /* Query inband for a specific interface mode, asking the MAC for the 956 * PCS which will be used to handle the interface mode. 957 */ 958 static unsigned int phylink_inband_caps(struct phylink *pl, 959 phy_interface_t interface) 960 { 961 struct phylink_pcs *pcs; 962 963 if (!pl->mac_ops->mac_select_pcs) 964 return 0; 965 966 pcs = pl->mac_ops->mac_select_pcs(pl->config, interface); 967 if (!pcs) 968 return 0; 969 970 return phylink_pcs_inband_caps(pcs, interface); 971 } 972 973 static void phylink_pcs_poll_stop(struct phylink *pl) 974 { 975 if (pl->cfg_link_an_mode == MLO_AN_INBAND) 976 timer_delete(&pl->link_poll); 977 } 978 979 static void phylink_pcs_poll_start(struct phylink *pl) 980 { 981 if (pl->pcs && pl->pcs->poll && pl->cfg_link_an_mode == MLO_AN_INBAND) 982 mod_timer(&pl->link_poll, jiffies + HZ); 983 } 984 985 int phylink_pcs_pre_init(struct phylink *pl, struct phylink_pcs *pcs) 986 { 987 int ret = 0; 988 989 /* Signal to PCS driver that MAC requires RX clock for init */ 990 if (pl->config->mac_requires_rxc) 991 pcs->rxc_always_on = true; 992 993 if (pcs->ops->pcs_pre_init) 994 ret = pcs->ops->pcs_pre_init(pcs); 995 996 return ret; 997 } 998 EXPORT_SYMBOL_GPL(phylink_pcs_pre_init); 999 1000 static void phylink_mac_config(struct phylink *pl, 1001 const struct phylink_link_state *state) 1002 { 1003 struct phylink_link_state st = *state; 1004 1005 /* Stop drivers incorrectly using these */ 1006 linkmode_zero(st.lp_advertising); 1007 st.speed = SPEED_UNKNOWN; 1008 st.duplex = DUPLEX_UNKNOWN; 1009 st.an_complete = false; 1010 st.link = false; 1011 1012 phylink_dbg(pl, 1013 "%s: mode=%s/%s/%s adv=%*pb pause=%02x\n", 1014 __func__, phylink_an_mode_str(pl->act_link_an_mode), 1015 phy_modes(st.interface), 1016 phy_rate_matching_to_str(st.rate_matching), 1017 __ETHTOOL_LINK_MODE_MASK_NBITS, st.advertising, 1018 st.pause); 1019 1020 pl->mac_ops->mac_config(pl->config, pl->act_link_an_mode, &st); 1021 } 1022 1023 static void phylink_pcs_an_restart(struct phylink *pl) 1024 { 1025 if (pl->pcs && linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, 1026 pl->link_config.advertising) && 1027 phy_interface_mode_is_8023z(pl->link_config.interface) && 1028 phylink_autoneg_inband(pl->act_link_an_mode)) 1029 pl->pcs->ops->pcs_an_restart(pl->pcs); 1030 } 1031 1032 enum inband_type { 1033 INBAND_NONE, 1034 INBAND_CISCO_SGMII, 1035 INBAND_BASEX, 1036 }; 1037 1038 static enum inband_type phylink_get_inband_type(phy_interface_t interface) 1039 { 1040 switch (interface) { 1041 case PHY_INTERFACE_MODE_SGMII: 1042 case PHY_INTERFACE_MODE_QSGMII: 1043 case PHY_INTERFACE_MODE_QUSGMII: 1044 case PHY_INTERFACE_MODE_USXGMII: 1045 case PHY_INTERFACE_MODE_10G_QXGMII: 1046 /* These protocols are designed for use with a PHY which 1047 * communicates its negotiation result back to the MAC via 1048 * inband communication. Note: there exist PHYs that run 1049 * with SGMII but do not send the inband data. 1050 */ 1051 return INBAND_CISCO_SGMII; 1052 1053 case PHY_INTERFACE_MODE_1000BASEX: 1054 case PHY_INTERFACE_MODE_2500BASEX: 1055 /* 1000base-X is designed for use media-side for Fibre 1056 * connections, and thus the Autoneg bit needs to be 1057 * taken into account. We also do this for 2500base-X 1058 * as well, but drivers may not support this, so may 1059 * need to override this. 1060 */ 1061 return INBAND_BASEX; 1062 1063 default: 1064 return INBAND_NONE; 1065 } 1066 } 1067 1068 /** 1069 * phylink_pcs_neg_mode() - helper to determine PCS inband mode 1070 * @pl: a pointer to a &struct phylink returned from phylink_create() 1071 * @pcs: a pointer to &struct phylink_pcs 1072 * @interface: interface mode to be used 1073 * @advertising: adertisement ethtool link mode mask 1074 * 1075 * Determines the negotiation mode to be used by the PCS, and returns 1076 * one of: 1077 * 1078 * - %PHYLINK_PCS_NEG_NONE: interface mode does not support inband 1079 * - %PHYLINK_PCS_NEG_OUTBAND: an out of band mode (e.g. reading the PHY) 1080 * will be used. 1081 * - %PHYLINK_PCS_NEG_INBAND_DISABLED: inband mode selected but autoneg 1082 * disabled 1083 * - %PHYLINK_PCS_NEG_INBAND_ENABLED: inband mode selected and autoneg enabled 1084 * 1085 * Note: this is for cases where the PCS itself is involved in negotiation 1086 * (e.g. Clause 37, SGMII and similar) not Clause 73. 1087 */ 1088 static void phylink_pcs_neg_mode(struct phylink *pl, struct phylink_pcs *pcs, 1089 phy_interface_t interface, 1090 const unsigned long *advertising) 1091 { 1092 unsigned int pcs_ib_caps = 0; 1093 unsigned int phy_ib_caps = 0; 1094 unsigned int neg_mode, mode; 1095 enum inband_type type; 1096 1097 type = phylink_get_inband_type(interface); 1098 if (type == INBAND_NONE) { 1099 pl->pcs_neg_mode = PHYLINK_PCS_NEG_NONE; 1100 pl->act_link_an_mode = pl->req_link_an_mode; 1101 return; 1102 } 1103 1104 mode = pl->req_link_an_mode; 1105 1106 pl->phy_ib_mode = 0; 1107 1108 if (pcs) 1109 pcs_ib_caps = phylink_pcs_inband_caps(pcs, interface); 1110 1111 if (pl->phydev) 1112 phy_ib_caps = phy_inband_caps(pl->phydev, interface); 1113 1114 phylink_dbg(pl, "interface %s inband modes: pcs=%02x phy=%02x\n", 1115 phy_modes(interface), pcs_ib_caps, phy_ib_caps); 1116 1117 if (!phylink_autoneg_inband(mode)) { 1118 bool pcs_ib_only = false; 1119 bool phy_ib_only = false; 1120 1121 if (pcs_ib_caps && pcs_ib_caps != LINK_INBAND_DISABLE) { 1122 /* PCS supports reporting in-band capabilities, and 1123 * supports more than disable mode. 1124 */ 1125 if (pcs_ib_caps & LINK_INBAND_DISABLE) 1126 neg_mode = PHYLINK_PCS_NEG_OUTBAND; 1127 else if (pcs_ib_caps & LINK_INBAND_ENABLE) 1128 pcs_ib_only = true; 1129 } 1130 1131 if (phy_ib_caps && phy_ib_caps != LINK_INBAND_DISABLE) { 1132 /* PHY supports in-band capabilities, and supports 1133 * more than disable mode. 1134 */ 1135 if (phy_ib_caps & LINK_INBAND_DISABLE) 1136 pl->phy_ib_mode = LINK_INBAND_DISABLE; 1137 else if (phy_ib_caps & LINK_INBAND_BYPASS) 1138 pl->phy_ib_mode = LINK_INBAND_BYPASS; 1139 else if (phy_ib_caps & LINK_INBAND_ENABLE) 1140 phy_ib_only = true; 1141 } 1142 1143 /* If either the PCS or PHY requires inband to be enabled, 1144 * this is an invalid configuration. Provide a diagnostic 1145 * message for this case, but don't try to force the issue. 1146 */ 1147 if (pcs_ib_only || phy_ib_only) 1148 phylink_warn(pl, 1149 "firmware wants %s mode, but %s%s%s requires inband\n", 1150 phylink_an_mode_str(mode), 1151 pcs_ib_only ? "PCS" : "", 1152 pcs_ib_only && phy_ib_only ? " and " : "", 1153 phy_ib_only ? "PHY" : ""); 1154 1155 neg_mode = PHYLINK_PCS_NEG_OUTBAND; 1156 } else if (type == INBAND_CISCO_SGMII || pl->phydev) { 1157 /* For SGMII modes which are designed to be used with PHYs, or 1158 * Base-X with a PHY, we try to use in-band mode where-ever 1159 * possible. However, there are some PHYs e.g. BCM84881 which 1160 * do not support in-band. 1161 */ 1162 const unsigned int inband_ok = LINK_INBAND_ENABLE | 1163 LINK_INBAND_BYPASS; 1164 const unsigned int outband_ok = LINK_INBAND_DISABLE | 1165 LINK_INBAND_BYPASS; 1166 /* PCS PHY 1167 * D E D E 1168 * 0 0 0 0 no information inband enabled 1169 * 1 0 0 0 pcs doesn't support outband 1170 * 0 1 0 0 pcs required inband enabled 1171 * 1 1 0 0 pcs optional inband enabled 1172 * 0 0 1 0 phy doesn't support outband 1173 * 1 0 1 0 pcs+phy doesn't support outband 1174 * 0 1 1 0 pcs required, phy doesn't support, invalid 1175 * 1 1 1 0 pcs optional, phy doesn't support, outband 1176 * 0 0 0 1 phy required inband enabled 1177 * 1 0 0 1 pcs doesn't support, phy required, invalid 1178 * 0 1 0 1 pcs+phy required inband enabled 1179 * 1 1 0 1 pcs optional, phy required inband enabled 1180 * 0 0 1 1 phy optional inband enabled 1181 * 1 0 1 1 pcs doesn't support, phy optional, outband 1182 * 0 1 1 1 pcs required, phy optional inband enabled 1183 * 1 1 1 1 pcs+phy optional inband enabled 1184 */ 1185 if ((!pcs_ib_caps || pcs_ib_caps & inband_ok) && 1186 (!phy_ib_caps || phy_ib_caps & inband_ok)) { 1187 /* In-band supported or unknown at both ends. Enable 1188 * in-band mode with or without bypass at the PHY. 1189 */ 1190 if (phy_ib_caps & LINK_INBAND_ENABLE) 1191 pl->phy_ib_mode = LINK_INBAND_ENABLE; 1192 else if (phy_ib_caps & LINK_INBAND_BYPASS) 1193 pl->phy_ib_mode = LINK_INBAND_BYPASS; 1194 1195 neg_mode = PHYLINK_PCS_NEG_INBAND_ENABLED; 1196 } else if ((!pcs_ib_caps || pcs_ib_caps & outband_ok) && 1197 (!phy_ib_caps || phy_ib_caps & outband_ok)) { 1198 /* Either in-band not supported at at least one end. 1199 * In-band bypass at the other end is possible. 1200 */ 1201 if (phy_ib_caps & LINK_INBAND_DISABLE) 1202 pl->phy_ib_mode = LINK_INBAND_DISABLE; 1203 else if (phy_ib_caps & LINK_INBAND_BYPASS) 1204 pl->phy_ib_mode = LINK_INBAND_BYPASS; 1205 1206 neg_mode = PHYLINK_PCS_NEG_OUTBAND; 1207 if (pl->phydev) 1208 mode = MLO_AN_PHY; 1209 } else { 1210 /* invalid */ 1211 phylink_warn(pl, "%s: incompatible in-band capabilities, trying in-band", 1212 phy_modes(interface)); 1213 neg_mode = PHYLINK_PCS_NEG_INBAND_ENABLED; 1214 } 1215 } else { 1216 /* For Base-X without a PHY */ 1217 if (pcs_ib_caps == LINK_INBAND_DISABLE) 1218 /* If the PCS doesn't support inband, then inband must 1219 * be disabled. 1220 */ 1221 neg_mode = PHYLINK_PCS_NEG_INBAND_DISABLED; 1222 else if (pcs_ib_caps == LINK_INBAND_ENABLE) 1223 /* If the PCS requires inband, then inband must always 1224 * be enabled. 1225 */ 1226 neg_mode = PHYLINK_PCS_NEG_INBAND_ENABLED; 1227 else if (linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, 1228 advertising)) 1229 neg_mode = PHYLINK_PCS_NEG_INBAND_ENABLED; 1230 else 1231 neg_mode = PHYLINK_PCS_NEG_INBAND_DISABLED; 1232 } 1233 1234 pl->pcs_neg_mode = neg_mode; 1235 pl->act_link_an_mode = mode; 1236 } 1237 1238 static void phylink_major_config(struct phylink *pl, bool restart, 1239 const struct phylink_link_state *state) 1240 { 1241 struct phylink_pcs *pcs = NULL; 1242 bool pcs_changed = false; 1243 unsigned int rate_kbd; 1244 int err; 1245 1246 phylink_dbg(pl, "major config, requested %s/%s\n", 1247 phylink_an_mode_str(pl->req_link_an_mode), 1248 phy_modes(state->interface)); 1249 1250 pl->major_config_failed = false; 1251 1252 if (pl->mac_ops->mac_select_pcs) { 1253 pcs = pl->mac_ops->mac_select_pcs(pl->config, state->interface); 1254 if (IS_ERR(pcs)) { 1255 phylink_err(pl, 1256 "mac_select_pcs unexpectedly failed: %pe\n", 1257 pcs); 1258 1259 pl->major_config_failed = true; 1260 return; 1261 } 1262 1263 pcs_changed = pl->pcs != pcs; 1264 } 1265 1266 phylink_pcs_neg_mode(pl, pcs, state->interface, state->advertising); 1267 1268 phylink_dbg(pl, "major config, active %s/%s/%s\n", 1269 phylink_an_mode_str(pl->act_link_an_mode), 1270 phylink_pcs_mode_str(pl->pcs_neg_mode), 1271 phy_modes(state->interface)); 1272 1273 phylink_pcs_poll_stop(pl); 1274 1275 if (pl->mac_ops->mac_prepare) { 1276 err = pl->mac_ops->mac_prepare(pl->config, pl->act_link_an_mode, 1277 state->interface); 1278 if (err < 0) { 1279 phylink_err(pl, "mac_prepare failed: %pe\n", 1280 ERR_PTR(err)); 1281 pl->major_config_failed = true; 1282 return; 1283 } 1284 } 1285 1286 /* If we have a new PCS, switch to the new PCS after preparing the MAC 1287 * for the change. 1288 */ 1289 if (pcs_changed) { 1290 phylink_pcs_disable(pl->pcs); 1291 1292 if (pl->pcs) 1293 pl->pcs->phylink = NULL; 1294 1295 if (pcs) 1296 pcs->phylink = pl; 1297 1298 pl->pcs = pcs; 1299 } 1300 1301 if (pl->pcs) 1302 phylink_pcs_pre_config(pl->pcs, state->interface); 1303 1304 phylink_mac_config(pl, state); 1305 1306 if (pl->pcs) { 1307 err = phylink_pcs_post_config(pl->pcs, state->interface); 1308 if (err < 0) { 1309 phylink_err(pl, "pcs_post_config failed: %pe\n", 1310 ERR_PTR(err)); 1311 1312 pl->major_config_failed = true; 1313 } 1314 } 1315 1316 if (pl->pcs_state == PCS_STATE_STARTING || pcs_changed) 1317 phylink_pcs_enable(pl->pcs); 1318 1319 err = phylink_pcs_config(pl->pcs, pl->pcs_neg_mode, state, 1320 !!(pl->link_config.pause & MLO_PAUSE_AN)); 1321 if (err < 0) { 1322 phylink_err(pl, "pcs_config failed: %pe\n", ERR_PTR(err)); 1323 pl->major_config_failed = true; 1324 } else if (err > 0) { 1325 restart = true; 1326 } 1327 1328 if (restart) 1329 phylink_pcs_an_restart(pl); 1330 1331 if (pl->mac_ops->mac_finish) { 1332 err = pl->mac_ops->mac_finish(pl->config, pl->act_link_an_mode, 1333 state->interface); 1334 if (err < 0) { 1335 phylink_err(pl, "mac_finish failed: %pe\n", 1336 ERR_PTR(err)); 1337 1338 pl->major_config_failed = true; 1339 } 1340 } 1341 1342 if (pl->phydev && pl->phy_ib_mode) { 1343 phylink_dbg(pl, "configuring PHY for inband%s%s%s\n", 1344 pl->phy_ib_mode & LINK_INBAND_DISABLE ? 1345 " disable" : "", 1346 pl->phy_ib_mode & LINK_INBAND_ENABLE ? 1347 " enable" : "", 1348 pl->phy_ib_mode & LINK_INBAND_BYPASS ? 1349 " bypass" : ""); 1350 err = phy_config_inband(pl->phydev, pl->phy_ib_mode); 1351 if (err < 0) { 1352 phylink_err(pl, "phy_config_inband: %pe\n", 1353 ERR_PTR(err)); 1354 1355 pl->major_config_failed = true; 1356 } 1357 } 1358 1359 if (pl->sfp_bus) { 1360 rate_kbd = phylink_interface_signal_rate(state->interface); 1361 if (rate_kbd) 1362 sfp_upstream_set_signal_rate(pl->sfp_bus, rate_kbd); 1363 } 1364 1365 phylink_pcs_poll_start(pl); 1366 } 1367 1368 /* 1369 * Reconfigure for a change of inband advertisement. 1370 * If we have a separate PCS, we only need to call its pcs_config() method, 1371 * and then restart AN if it indicates something changed. Otherwise, we do 1372 * the full MAC reconfiguration. 1373 */ 1374 static int phylink_change_inband_advert(struct phylink *pl) 1375 { 1376 int ret; 1377 1378 if (test_bit(PHYLINK_DISABLE_STOPPED, &pl->phylink_disable_state)) 1379 return 0; 1380 1381 phylink_dbg(pl, "%s: mode=%s/%s adv=%*pb pause=%02x\n", __func__, 1382 phylink_an_mode_str(pl->req_link_an_mode), 1383 phy_modes(pl->link_config.interface), 1384 __ETHTOOL_LINK_MODE_MASK_NBITS, pl->link_config.advertising, 1385 pl->link_config.pause); 1386 1387 /* Recompute the PCS neg mode */ 1388 phylink_pcs_neg_mode(pl, pl->pcs, pl->link_config.interface, 1389 pl->link_config.advertising); 1390 1391 /* Modern PCS-based method; update the advert at the PCS, and 1392 * restart negotiation if the pcs_config() helper indicates that 1393 * the programmed advertisement has changed. 1394 */ 1395 ret = phylink_pcs_config(pl->pcs, pl->pcs_neg_mode, &pl->link_config, 1396 !!(pl->link_config.pause & MLO_PAUSE_AN)); 1397 if (ret < 0) 1398 return ret; 1399 1400 if (ret > 0) 1401 phylink_pcs_an_restart(pl); 1402 1403 return 0; 1404 } 1405 1406 static void phylink_mac_pcs_get_state(struct phylink *pl, 1407 struct phylink_link_state *state) 1408 { 1409 struct phylink_pcs *pcs; 1410 bool autoneg; 1411 1412 linkmode_copy(state->advertising, pl->link_config.advertising); 1413 linkmode_zero(state->lp_advertising); 1414 state->interface = pl->link_config.interface; 1415 state->rate_matching = pl->link_config.rate_matching; 1416 state->an_complete = 0; 1417 state->link = 1; 1418 1419 autoneg = pl->pcs_neg_mode == PHYLINK_PCS_NEG_INBAND_ENABLED; 1420 if (autoneg) { 1421 state->speed = SPEED_UNKNOWN; 1422 state->duplex = DUPLEX_UNKNOWN; 1423 state->pause = MLO_PAUSE_NONE; 1424 } else { 1425 state->speed = pl->link_config.speed; 1426 state->duplex = pl->link_config.duplex; 1427 state->pause = pl->link_config.pause; 1428 } 1429 1430 pcs = pl->pcs; 1431 if (pcs) 1432 pcs->ops->pcs_get_state(pcs, pl->pcs_neg_mode, state); 1433 else 1434 state->link = 0; 1435 } 1436 1437 /* The fixed state is... fixed except for the link state, 1438 * which may be determined by a GPIO or a callback. 1439 */ 1440 static void phylink_get_fixed_state(struct phylink *pl, 1441 struct phylink_link_state *state) 1442 { 1443 *state = pl->link_config; 1444 if (pl->config->get_fixed_state) 1445 pl->config->get_fixed_state(pl->config, state); 1446 else if (pl->link_gpio) 1447 state->link = !!gpiod_get_value_cansleep(pl->link_gpio); 1448 1449 state->pause = MLO_PAUSE_NONE; 1450 phylink_resolve_an_pause(state); 1451 } 1452 1453 static void phylink_mac_initial_config(struct phylink *pl, bool force_restart) 1454 { 1455 struct phylink_link_state link_state; 1456 struct phy_device *phy = pl->phydev; 1457 1458 switch (pl->req_link_an_mode) { 1459 case MLO_AN_PHY: 1460 link_state = pl->phy_state; 1461 break; 1462 1463 case MLO_AN_FIXED: 1464 phylink_get_fixed_state(pl, &link_state); 1465 break; 1466 1467 case MLO_AN_INBAND: 1468 link_state = pl->link_config; 1469 if (link_state.interface == PHY_INTERFACE_MODE_SGMII) 1470 link_state.pause = MLO_PAUSE_NONE; 1471 break; 1472 1473 default: /* can't happen */ 1474 return; 1475 } 1476 1477 link_state.link = false; 1478 1479 phylink_apply_manual_flow(pl, &link_state); 1480 if (phy) 1481 mutex_lock(&phy->lock); 1482 phylink_major_config(pl, force_restart, &link_state); 1483 if (phy) 1484 mutex_unlock(&phy->lock); 1485 } 1486 1487 static const char *phylink_pause_to_str(int pause) 1488 { 1489 switch (pause & MLO_PAUSE_TXRX_MASK) { 1490 case MLO_PAUSE_TX | MLO_PAUSE_RX: 1491 return "rx/tx"; 1492 case MLO_PAUSE_TX: 1493 return "tx"; 1494 case MLO_PAUSE_RX: 1495 return "rx"; 1496 default: 1497 return "off"; 1498 } 1499 } 1500 1501 static void phylink_deactivate_lpi(struct phylink *pl) 1502 { 1503 if (pl->mac_enable_tx_lpi) { 1504 pl->mac_enable_tx_lpi = false; 1505 1506 phylink_dbg(pl, "disabling LPI\n"); 1507 1508 pl->mac_ops->mac_disable_tx_lpi(pl->config); 1509 1510 phylink_pcs_disable_eee(pl->pcs); 1511 } 1512 } 1513 1514 static void phylink_activate_lpi(struct phylink *pl) 1515 { 1516 int err; 1517 1518 if (!test_bit(pl->cur_interface, pl->config->lpi_interfaces)) { 1519 phylink_dbg(pl, "MAC does not support LPI with %s\n", 1520 phy_modes(pl->cur_interface)); 1521 return; 1522 } 1523 1524 phylink_dbg(pl, "LPI timer %uus, tx clock stop %u\n", 1525 pl->mac_tx_lpi_timer, pl->mac_tx_clk_stop); 1526 1527 phylink_pcs_enable_eee(pl->pcs); 1528 1529 err = pl->mac_ops->mac_enable_tx_lpi(pl->config, pl->mac_tx_lpi_timer, 1530 pl->mac_tx_clk_stop); 1531 if (err) { 1532 phylink_pcs_disable_eee(pl->pcs); 1533 phylink_err(pl, "%ps() failed: %pe\n", 1534 pl->mac_ops->mac_enable_tx_lpi, ERR_PTR(err)); 1535 return; 1536 } 1537 1538 pl->mac_enable_tx_lpi = true; 1539 } 1540 1541 static void phylink_link_up(struct phylink *pl, 1542 struct phylink_link_state link_state) 1543 { 1544 struct net_device *ndev = pl->netdev; 1545 int speed, duplex; 1546 bool rx_pause; 1547 1548 speed = link_state.speed; 1549 duplex = link_state.duplex; 1550 rx_pause = !!(link_state.pause & MLO_PAUSE_RX); 1551 1552 switch (link_state.rate_matching) { 1553 case RATE_MATCH_PAUSE: 1554 /* The PHY is doing rate matchion from the media rate (in 1555 * the link_state) to the interface speed, and will send 1556 * pause frames to the MAC to limit its transmission speed. 1557 */ 1558 speed = phylink_interface_max_speed(link_state.interface); 1559 duplex = DUPLEX_FULL; 1560 rx_pause = true; 1561 break; 1562 1563 case RATE_MATCH_CRS: 1564 /* The PHY is doing rate matchion from the media rate (in 1565 * the link_state) to the interface speed, and will cause 1566 * collisions to the MAC to limit its transmission speed. 1567 */ 1568 speed = phylink_interface_max_speed(link_state.interface); 1569 duplex = DUPLEX_HALF; 1570 break; 1571 } 1572 1573 pl->cur_interface = link_state.interface; 1574 1575 phylink_pcs_link_up(pl->pcs, pl->pcs_neg_mode, pl->cur_interface, speed, 1576 duplex); 1577 1578 pl->mac_ops->mac_link_up(pl->config, pl->phydev, pl->act_link_an_mode, 1579 pl->cur_interface, speed, duplex, 1580 !!(link_state.pause & MLO_PAUSE_TX), rx_pause); 1581 1582 if (pl->mac_supports_eee && pl->phy_enable_tx_lpi) 1583 phylink_activate_lpi(pl); 1584 1585 if (ndev) 1586 netif_carrier_on(ndev); 1587 1588 phylink_info(pl, 1589 "Link is Up - %s/%s - flow control %s\n", 1590 phy_speed_to_str(link_state.speed), 1591 phy_duplex_to_str(link_state.duplex), 1592 phylink_pause_to_str(link_state.pause)); 1593 } 1594 1595 static void phylink_link_down(struct phylink *pl) 1596 { 1597 struct net_device *ndev = pl->netdev; 1598 1599 if (ndev) 1600 netif_carrier_off(ndev); 1601 1602 phylink_deactivate_lpi(pl); 1603 1604 pl->mac_ops->mac_link_down(pl->config, pl->act_link_an_mode, 1605 pl->cur_interface); 1606 phylink_info(pl, "Link is Down\n"); 1607 } 1608 1609 static bool phylink_link_is_up(struct phylink *pl) 1610 { 1611 return pl->netdev ? netif_carrier_ok(pl->netdev) : pl->old_link_state; 1612 } 1613 1614 static void phylink_resolve(struct work_struct *w) 1615 { 1616 struct phylink *pl = container_of(w, struct phylink, resolve); 1617 struct phylink_link_state link_state; 1618 bool mac_config = false; 1619 bool retrigger = false; 1620 struct phy_device *phy; 1621 bool cur_link_state; 1622 1623 mutex_lock(&pl->phydev_mutex); 1624 phy = pl->phydev; 1625 if (phy) 1626 mutex_lock(&phy->lock); 1627 mutex_lock(&pl->state_mutex); 1628 cur_link_state = phylink_link_is_up(pl); 1629 1630 if (pl->phylink_disable_state) { 1631 pl->link_failed = false; 1632 link_state.link = false; 1633 } else if (pl->link_failed) { 1634 link_state.link = false; 1635 retrigger = true; 1636 } else if (pl->act_link_an_mode == MLO_AN_FIXED) { 1637 phylink_get_fixed_state(pl, &link_state); 1638 mac_config = link_state.link; 1639 } else if (pl->act_link_an_mode == MLO_AN_PHY) { 1640 link_state = pl->phy_state; 1641 mac_config = link_state.link; 1642 } else { 1643 phylink_mac_pcs_get_state(pl, &link_state); 1644 1645 /* The PCS may have a latching link-fail indicator. If the link 1646 * was up, bring the link down and re-trigger the resolve. 1647 * Otherwise, re-read the PCS state to get the current status 1648 * of the link. 1649 */ 1650 if (!link_state.link) { 1651 if (cur_link_state) 1652 retrigger = true; 1653 else 1654 phylink_mac_pcs_get_state(pl, &link_state); 1655 } 1656 1657 /* If we have a phy, the "up" state is the union of both the 1658 * PHY and the MAC 1659 */ 1660 if (phy) 1661 link_state.link &= pl->phy_state.link; 1662 1663 /* Only update if the PHY link is up */ 1664 if (phy && pl->phy_state.link) { 1665 /* If the interface has changed, force a link down 1666 * event if the link isn't already down, and re-resolve. 1667 */ 1668 if (link_state.interface != pl->phy_state.interface) { 1669 retrigger = true; 1670 link_state.link = false; 1671 } 1672 1673 link_state.interface = pl->phy_state.interface; 1674 1675 /* If we are doing rate matching, then the link 1676 * speed/duplex comes from the PHY 1677 */ 1678 if (pl->phy_state.rate_matching) { 1679 link_state.rate_matching = 1680 pl->phy_state.rate_matching; 1681 link_state.speed = pl->phy_state.speed; 1682 link_state.duplex = pl->phy_state.duplex; 1683 } 1684 1685 /* If we have a PHY, we need to update with the PHY 1686 * flow control bits. 1687 */ 1688 link_state.pause = pl->phy_state.pause; 1689 mac_config = true; 1690 } 1691 } 1692 1693 if (pl->act_link_an_mode != MLO_AN_FIXED) 1694 phylink_apply_manual_flow(pl, &link_state); 1695 1696 if ((mac_config && link_state.interface != pl->link_config.interface) || 1697 pl->force_major_config) { 1698 /* The interface has changed or a forced major configuration 1699 * was requested, so force the link down and then reconfigure. 1700 */ 1701 if (cur_link_state) { 1702 phylink_link_down(pl); 1703 cur_link_state = false; 1704 } 1705 phylink_major_config(pl, false, &link_state); 1706 pl->link_config.interface = link_state.interface; 1707 pl->force_major_config = false; 1708 } 1709 1710 /* If configuration of the interface failed, force the link down 1711 * until we get a successful configuration. 1712 */ 1713 if (pl->major_config_failed) 1714 link_state.link = false; 1715 1716 if (link_state.link != cur_link_state) { 1717 pl->old_link_state = link_state.link; 1718 if (!link_state.link) 1719 phylink_link_down(pl); 1720 else 1721 phylink_link_up(pl, link_state); 1722 } 1723 if (!link_state.link && retrigger) { 1724 pl->link_failed = false; 1725 queue_work(system_power_efficient_wq, &pl->resolve); 1726 } 1727 mutex_unlock(&pl->state_mutex); 1728 if (phy) 1729 mutex_unlock(&phy->lock); 1730 mutex_unlock(&pl->phydev_mutex); 1731 } 1732 1733 static void phylink_run_resolve(struct phylink *pl) 1734 { 1735 if (!pl->phylink_disable_state) 1736 queue_work(system_power_efficient_wq, &pl->resolve); 1737 } 1738 1739 static void phylink_run_resolve_and_disable(struct phylink *pl, int bit) 1740 { 1741 unsigned long state = pl->phylink_disable_state; 1742 1743 set_bit(bit, &pl->phylink_disable_state); 1744 if (state == 0) { 1745 queue_work(system_power_efficient_wq, &pl->resolve); 1746 flush_work(&pl->resolve); 1747 } 1748 } 1749 1750 static void phylink_enable_and_run_resolve(struct phylink *pl, int bit) 1751 { 1752 clear_bit(bit, &pl->phylink_disable_state); 1753 phylink_run_resolve(pl); 1754 } 1755 1756 static void phylink_fixed_poll(struct timer_list *t) 1757 { 1758 struct phylink *pl = container_of(t, struct phylink, link_poll); 1759 1760 mod_timer(t, jiffies + HZ); 1761 1762 phylink_run_resolve(pl); 1763 } 1764 1765 static const struct sfp_upstream_ops sfp_phylink_ops; 1766 1767 static int phylink_register_sfp(struct phylink *pl, 1768 const struct fwnode_handle *fwnode) 1769 { 1770 struct sfp_bus *bus; 1771 int ret; 1772 1773 if (!fwnode) 1774 return 0; 1775 1776 bus = sfp_bus_find_fwnode(fwnode); 1777 if (IS_ERR(bus)) { 1778 phylink_err(pl, "unable to attach SFP bus: %pe\n", bus); 1779 return PTR_ERR(bus); 1780 } 1781 1782 pl->sfp_bus = bus; 1783 1784 ret = sfp_bus_add_upstream(bus, pl, &sfp_phylink_ops); 1785 sfp_bus_put(bus); 1786 1787 return ret; 1788 } 1789 1790 /** 1791 * phylink_set_fixed_link() - set the fixed link 1792 * @pl: a pointer to a &struct phylink returned from phylink_create() 1793 * @state: a pointer to a struct phylink_link_state. 1794 * 1795 * This function is used when the link parameters are known and do not change, 1796 * making it suitable for certain types of network connections. 1797 * 1798 * Returns: zero on success or negative error code. 1799 */ 1800 int phylink_set_fixed_link(struct phylink *pl, 1801 const struct phylink_link_state *state) 1802 { 1803 const struct link_capabilities *c; 1804 unsigned long *adv; 1805 1806 if (pl->cfg_link_an_mode != MLO_AN_PHY || !state || 1807 !test_bit(PHYLINK_DISABLE_STOPPED, &pl->phylink_disable_state)) 1808 return -EINVAL; 1809 1810 c = phy_caps_lookup(state->speed, state->duplex, 1811 pl->supported, true); 1812 if (!c) 1813 return -EINVAL; 1814 1815 adv = pl->link_config.advertising; 1816 linkmode_and(adv, pl->supported, c->linkmodes); 1817 linkmode_set_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, adv); 1818 1819 pl->link_config.speed = state->speed; 1820 pl->link_config.duplex = state->duplex; 1821 pl->link_config.link = 1; 1822 pl->link_config.an_complete = 1; 1823 1824 pl->cfg_link_an_mode = MLO_AN_FIXED; 1825 pl->req_link_an_mode = pl->cfg_link_an_mode; 1826 1827 return 0; 1828 } 1829 EXPORT_SYMBOL_GPL(phylink_set_fixed_link); 1830 1831 /** 1832 * phylink_create() - create a phylink instance 1833 * @config: a pointer to the target &struct phylink_config 1834 * @fwnode: a pointer to a &struct fwnode_handle describing the network 1835 * interface 1836 * @iface: the desired link mode defined by &typedef phy_interface_t 1837 * @mac_ops: a pointer to a &struct phylink_mac_ops for the MAC. 1838 * 1839 * Create a new phylink instance, and parse the link parameters found in @np. 1840 * This will parse in-band modes, fixed-link or SFP configuration. 1841 * 1842 * Note: the rtnl lock must not be held when calling this function. 1843 * 1844 * Returns a pointer to a &struct phylink, or an error-pointer value. Users 1845 * must use IS_ERR() to check for errors from this function. 1846 */ 1847 struct phylink *phylink_create(struct phylink_config *config, 1848 const struct fwnode_handle *fwnode, 1849 phy_interface_t iface, 1850 const struct phylink_mac_ops *mac_ops) 1851 { 1852 struct phylink *pl; 1853 int ret; 1854 1855 /* Validate the supplied configuration */ 1856 if (phy_interface_empty(config->supported_interfaces)) { 1857 dev_err(config->dev, 1858 "phylink: error: empty supported_interfaces\n"); 1859 return ERR_PTR(-EINVAL); 1860 } 1861 1862 pl = kzalloc_obj(*pl); 1863 if (!pl) 1864 return ERR_PTR(-ENOMEM); 1865 1866 mutex_init(&pl->phydev_mutex); 1867 mutex_init(&pl->state_mutex); 1868 INIT_WORK(&pl->resolve, phylink_resolve); 1869 1870 pl->config = config; 1871 if (config->type == PHYLINK_NETDEV) { 1872 pl->netdev = to_net_dev(config->dev); 1873 netif_carrier_off(pl->netdev); 1874 } else if (config->type == PHYLINK_DEV) { 1875 pl->dev = config->dev; 1876 } else { 1877 ret = -EINVAL; 1878 goto free_pl; 1879 } 1880 1881 pl->mac_supports_eee_ops = phylink_mac_implements_lpi(mac_ops); 1882 pl->mac_supports_eee = pl->mac_supports_eee_ops && 1883 pl->config->lpi_capabilities && 1884 !phy_interface_empty(pl->config->lpi_interfaces); 1885 1886 /* Set the default EEE configuration */ 1887 pl->eee_cfg.eee_enabled = pl->config->eee_enabled_default; 1888 pl->eee_cfg.tx_lpi_enabled = pl->eee_cfg.eee_enabled; 1889 pl->eee_cfg.tx_lpi_timer = pl->config->lpi_timer_default; 1890 1891 pl->phy_state.interface = iface; 1892 pl->link_interface = iface; 1893 if (iface == PHY_INTERFACE_MODE_MOCA) 1894 pl->link_port = PORT_BNC; 1895 else 1896 pl->link_port = PORT_MII; 1897 pl->link_config.interface = iface; 1898 pl->link_config.pause = MLO_PAUSE_AN; 1899 pl->link_config.speed = SPEED_UNKNOWN; 1900 pl->link_config.duplex = DUPLEX_UNKNOWN; 1901 pl->pcs_state = PCS_STATE_DOWN; 1902 pl->mac_ops = mac_ops; 1903 __set_bit(PHYLINK_DISABLE_STOPPED, &pl->phylink_disable_state); 1904 timer_setup(&pl->link_poll, phylink_fixed_poll, 0); 1905 1906 linkmode_fill(pl->supported); 1907 linkmode_copy(pl->link_config.advertising, pl->supported); 1908 phylink_validate(pl, pl->supported, &pl->link_config); 1909 1910 ret = phylink_parse_mode(pl, fwnode); 1911 if (ret < 0) 1912 goto free_pl; 1913 1914 if (pl->cfg_link_an_mode == MLO_AN_FIXED) { 1915 ret = phylink_parse_fixedlink(pl, fwnode); 1916 if (ret < 0) 1917 goto release_link_gpio; 1918 } 1919 1920 pl->req_link_an_mode = pl->cfg_link_an_mode; 1921 1922 ret = phylink_register_sfp(pl, fwnode); 1923 if (ret < 0) 1924 goto release_link_gpio; 1925 1926 return pl; 1927 1928 release_link_gpio: 1929 if (pl->link_gpio) 1930 gpiod_put(pl->link_gpio); 1931 free_pl: 1932 kfree(pl); 1933 return ERR_PTR(ret); 1934 } 1935 EXPORT_SYMBOL_GPL(phylink_create); 1936 1937 /** 1938 * phylink_destroy() - cleanup and destroy the phylink instance 1939 * @pl: a pointer to a &struct phylink returned from phylink_create() 1940 * 1941 * Destroy a phylink instance. Any PHY that has been attached must have been 1942 * cleaned up via phylink_disconnect_phy() prior to calling this function. 1943 * 1944 * Note: the rtnl lock must not be held when calling this function. 1945 */ 1946 void phylink_destroy(struct phylink *pl) 1947 { 1948 sfp_bus_del_upstream(pl->sfp_bus); 1949 if (pl->link_gpio) 1950 gpiod_put(pl->link_gpio); 1951 1952 cancel_work_sync(&pl->resolve); 1953 kfree(pl); 1954 } 1955 EXPORT_SYMBOL_GPL(phylink_destroy); 1956 1957 /** 1958 * phylink_expects_phy() - Determine if phylink expects a phy to be attached 1959 * @pl: a pointer to a &struct phylink returned from phylink_create() 1960 * 1961 * When using fixed-link mode, or in-band mode with 1000base-X or 2500base-X, 1962 * no PHY is needed. 1963 * 1964 * Returns true if phylink will be expecting a PHY. 1965 */ 1966 bool phylink_expects_phy(struct phylink *pl) 1967 { 1968 if (pl->cfg_link_an_mode == MLO_AN_FIXED) 1969 return false; 1970 return true; 1971 } 1972 EXPORT_SYMBOL_GPL(phylink_expects_phy); 1973 1974 static void phylink_phy_change(struct phy_device *phydev, bool up) 1975 { 1976 struct phylink *pl = phydev->phylink; 1977 bool tx_pause, rx_pause; 1978 1979 phy_get_pause(phydev, &tx_pause, &rx_pause); 1980 1981 mutex_lock(&pl->state_mutex); 1982 pl->phy_state.speed = phydev->speed; 1983 pl->phy_state.duplex = phydev->duplex; 1984 pl->phy_state.rate_matching = phydev->rate_matching; 1985 pl->phy_state.pause = MLO_PAUSE_NONE; 1986 if (tx_pause) 1987 pl->phy_state.pause |= MLO_PAUSE_TX; 1988 if (rx_pause) 1989 pl->phy_state.pause |= MLO_PAUSE_RX; 1990 pl->phy_state.interface = phydev->interface; 1991 pl->phy_state.link = up; 1992 if (!up) 1993 pl->link_failed = true; 1994 1995 /* Get the LPI state from phylib */ 1996 pl->phy_enable_tx_lpi = phydev->enable_tx_lpi; 1997 pl->mac_tx_lpi_timer = phydev->eee_cfg.tx_lpi_timer; 1998 mutex_unlock(&pl->state_mutex); 1999 2000 phylink_run_resolve(pl); 2001 2002 phylink_dbg(pl, "phy link %s %s/%s/%s/%s/%s/%slpi\n", 2003 up ? "up" : "down", 2004 phy_modes(phydev->interface), 2005 phy_speed_to_str(phydev->speed), 2006 phy_duplex_to_str(phydev->duplex), 2007 phy_rate_matching_to_str(phydev->rate_matching), 2008 phylink_pause_to_str(pl->phy_state.pause), 2009 phydev->enable_tx_lpi ? "" : "no"); 2010 } 2011 2012 static int phylink_validate_phy(struct phylink *pl, struct phy_device *phy, 2013 unsigned long *supported, 2014 struct phylink_link_state *state) 2015 { 2016 DECLARE_PHY_INTERFACE_MASK(interfaces); 2017 2018 /* If the PHY provides a bitmap of the interfaces it will be using 2019 * depending on the negotiated media speeds, use this to validate 2020 * which ethtool link modes can be used. 2021 */ 2022 if (!phy_interface_empty(phy->possible_interfaces)) { 2023 /* We only care about the union of the PHY's interfaces and 2024 * those which the host supports. 2025 */ 2026 phy_interface_and(interfaces, phy->possible_interfaces, 2027 pl->config->supported_interfaces); 2028 2029 if (phy_interface_empty(interfaces)) { 2030 phylink_err(pl, "PHY has no common interfaces\n"); 2031 return -EINVAL; 2032 } 2033 2034 if (phy_on_sfp(phy)) { 2035 /* If the PHY is on a SFP, limit the interfaces to 2036 * those that can be used with a SFP module. 2037 */ 2038 phy_interface_and(interfaces, interfaces, 2039 phylink_sfp_interfaces); 2040 2041 if (phy_interface_empty(interfaces)) { 2042 phylink_err(pl, "SFP PHY's possible interfaces becomes empty\n"); 2043 return -EINVAL; 2044 } 2045 } 2046 2047 phylink_dbg(pl, "PHY %s uses interfaces %*pbl, validating %*pbl\n", 2048 phydev_name(phy), 2049 (int)PHY_INTERFACE_MODE_MAX, 2050 phy->possible_interfaces, 2051 (int)PHY_INTERFACE_MODE_MAX, interfaces); 2052 2053 return phylink_validate_mask(pl, phy, supported, state, 2054 interfaces); 2055 } 2056 2057 phylink_dbg(pl, "PHY %s doesn't supply possible interfaces\n", 2058 phydev_name(phy)); 2059 2060 /* Check whether we would use rate matching for the proposed interface 2061 * mode. 2062 */ 2063 state->rate_matching = phy_get_rate_matching(phy, state->interface); 2064 2065 /* Clause 45 PHYs may switch their Serdes lane between, e.g. 10GBASE-R, 2066 * 5GBASE-R, 2500BASE-X and SGMII if they are not using rate matching. 2067 * For some interface modes (e.g. RXAUI, XAUI and USXGMII) switching 2068 * their Serdes is either unnecessary or not reasonable. 2069 * 2070 * For these which switch interface modes, we really need to know which 2071 * interface modes the PHY supports to properly work out which ethtool 2072 * linkmodes can be supported. For now, as a work-around, we validate 2073 * against all interface modes, which may lead to more ethtool link 2074 * modes being advertised than are actually supported. 2075 */ 2076 if (phy->is_c45 && state->rate_matching == RATE_MATCH_NONE && 2077 state->interface != PHY_INTERFACE_MODE_RXAUI && 2078 state->interface != PHY_INTERFACE_MODE_XAUI && 2079 state->interface != PHY_INTERFACE_MODE_USXGMII) 2080 state->interface = PHY_INTERFACE_MODE_NA; 2081 2082 return phylink_validate(pl, supported, state); 2083 } 2084 2085 static int phylink_bringup_phy(struct phylink *pl, struct phy_device *phy, 2086 phy_interface_t interface) 2087 { 2088 struct phylink_link_state config; 2089 __ETHTOOL_DECLARE_LINK_MODE_MASK(supported); 2090 char *irq_str; 2091 int ret; 2092 2093 /* 2094 * This is the new way of dealing with flow control for PHYs, 2095 * as described by Timur Tabi in commit 529ed1275263 ("net: phy: 2096 * phy drivers should not set SUPPORTED_[Asym_]Pause"). MAC drivers 2097 * set their support using the MAC_SYM_PAUSE and MAC_ASYM_PAUSE 2098 * capabilities and must NOT change the phy's pause settings directly. 2099 */ 2100 phy_support_asym_pause(phy); 2101 2102 memset(&config, 0, sizeof(config)); 2103 linkmode_copy(supported, phy->supported); 2104 linkmode_copy(config.advertising, phy->advertising); 2105 config.interface = interface; 2106 2107 ret = phylink_validate_phy(pl, phy, supported, &config); 2108 if (ret) { 2109 phylink_warn(pl, "validation of %s with support %*pb and advertisement %*pb failed: %pe\n", 2110 phy_modes(config.interface), 2111 __ETHTOOL_LINK_MODE_MASK_NBITS, phy->supported, 2112 __ETHTOOL_LINK_MODE_MASK_NBITS, config.advertising, 2113 ERR_PTR(ret)); 2114 return ret; 2115 } 2116 2117 phy->phylink = pl; 2118 phy->phy_link_change = phylink_phy_change; 2119 2120 irq_str = phy_attached_info_irq(phy); 2121 phylink_info(pl, 2122 "PHY [%s] driver [%s] (irq=%s)\n", 2123 dev_name(&phy->mdio.dev), phy->drv->name, irq_str); 2124 kfree(irq_str); 2125 2126 mutex_lock(&pl->phydev_mutex); 2127 mutex_lock(&phy->lock); 2128 mutex_lock(&pl->state_mutex); 2129 pl->phydev = phy; 2130 pl->phy_state.interface = interface; 2131 pl->phy_state.pause = MLO_PAUSE_NONE; 2132 pl->phy_state.speed = SPEED_UNKNOWN; 2133 pl->phy_state.duplex = DUPLEX_UNKNOWN; 2134 pl->phy_state.rate_matching = RATE_MATCH_NONE; 2135 linkmode_copy(pl->supported, supported); 2136 linkmode_copy(pl->link_config.advertising, config.advertising); 2137 2138 /* Restrict the phy advertisement according to the MAC support. */ 2139 linkmode_copy(phy->advertising, config.advertising); 2140 2141 /* If the MAC supports phylink managed EEE, restrict the EEE 2142 * advertisement according to the MAC's LPI capabilities. 2143 */ 2144 if (pl->mac_supports_eee) { 2145 /* If EEE is enabled, then we need to call phy_support_eee() 2146 * to ensure that the advertising mask is appropriately set. 2147 * This also enables EEE at the PHY. 2148 */ 2149 if (pl->eee_cfg.eee_enabled) 2150 phy_support_eee(phy); 2151 2152 phy->eee_cfg.tx_lpi_enabled = pl->eee_cfg.tx_lpi_enabled; 2153 phy->eee_cfg.tx_lpi_timer = pl->eee_cfg.tx_lpi_timer; 2154 2155 /* Convert the MAC's LPI capabilities to linkmodes */ 2156 linkmode_zero(pl->supported_lpi); 2157 phylink_caps_to_linkmodes(pl->supported_lpi, 2158 pl->config->lpi_capabilities); 2159 2160 /* Restrict the PHYs EEE support/advertisement to the modes 2161 * that the MAC supports. 2162 */ 2163 linkmode_and(phy->advertising_eee, phy->advertising_eee, 2164 pl->supported_lpi); 2165 } else if (pl->mac_supports_eee_ops) { 2166 /* MAC supports phylink EEE, but wants EEE always disabled. */ 2167 phy_disable_eee(phy); 2168 } 2169 2170 mutex_unlock(&pl->state_mutex); 2171 mutex_unlock(&phy->lock); 2172 mutex_unlock(&pl->phydev_mutex); 2173 2174 phylink_dbg(pl, 2175 "phy: %s setting supported %*pb advertising %*pb\n", 2176 phy_modes(interface), 2177 __ETHTOOL_LINK_MODE_MASK_NBITS, pl->supported, 2178 __ETHTOOL_LINK_MODE_MASK_NBITS, phy->advertising); 2179 2180 if (pl->config->mac_managed_pm) 2181 phy->mac_managed_pm = true; 2182 2183 /* Allow the MAC to stop its clock if the PHY has the capability */ 2184 pl->mac_tx_clk_stop = phy_eee_tx_clock_stop_capable(phy) > 0; 2185 2186 if (pl->mac_supports_eee_ops) { 2187 /* Explicitly configure whether the PHY is allowed to stop it's 2188 * receive clock. 2189 */ 2190 ret = phy_eee_rx_clock_stop(phy, 2191 pl->config->eee_rx_clk_stop_enable); 2192 if (ret == -EOPNOTSUPP) 2193 ret = 0; 2194 } 2195 2196 if (ret == 0 && phy_interrupt_is_valid(phy)) 2197 phy_request_interrupt(phy); 2198 2199 return ret; 2200 } 2201 2202 static int phylink_attach_phy(struct phylink *pl, struct phy_device *phy, 2203 phy_interface_t interface) 2204 { 2205 u32 flags = 0; 2206 2207 if (WARN_ON(pl->cfg_link_an_mode == MLO_AN_FIXED)) 2208 return -EINVAL; 2209 2210 if (pl->phydev) 2211 return -EBUSY; 2212 2213 if (pl->config->mac_requires_rxc) 2214 flags |= PHY_F_RXC_ALWAYS_ON; 2215 2216 return phy_attach_direct(pl->netdev, phy, flags, interface); 2217 } 2218 2219 /** 2220 * phylink_connect_phy() - connect a PHY to the phylink instance 2221 * @pl: a pointer to a &struct phylink returned from phylink_create() 2222 * @phy: a pointer to a &struct phy_device. 2223 * 2224 * Connect @phy to the phylink instance specified by @pl by calling 2225 * phy_attach_direct(). Configure the @phy according to the MAC driver's 2226 * capabilities, start the PHYLIB state machine and enable any interrupts 2227 * that the PHY supports. 2228 * 2229 * This updates the phylink's ethtool supported and advertising link mode 2230 * masks. 2231 * 2232 * Returns 0 on success or a negative errno. 2233 */ 2234 int phylink_connect_phy(struct phylink *pl, struct phy_device *phy) 2235 { 2236 int ret; 2237 2238 /* Use PHY device/driver interface */ 2239 if (pl->link_interface == PHY_INTERFACE_MODE_NA) { 2240 pl->link_interface = phy->interface; 2241 pl->link_config.interface = pl->link_interface; 2242 } 2243 2244 ret = phylink_attach_phy(pl, phy, pl->link_interface); 2245 if (ret < 0) 2246 return ret; 2247 2248 ret = phylink_bringup_phy(pl, phy, pl->link_config.interface); 2249 if (ret) 2250 phy_detach(phy); 2251 2252 return ret; 2253 } 2254 EXPORT_SYMBOL_GPL(phylink_connect_phy); 2255 2256 /** 2257 * phylink_of_phy_connect() - connect the PHY specified in the DT mode. 2258 * @pl: a pointer to a &struct phylink returned from phylink_create() 2259 * @dn: a pointer to a &struct device_node. 2260 * @flags: PHY-specific flags to communicate to the PHY device driver 2261 * 2262 * Connect the phy specified in the device node @dn to the phylink instance 2263 * specified by @pl. Actions specified in phylink_connect_phy() will be 2264 * performed. 2265 * 2266 * Returns 0 on success or a negative errno. 2267 */ 2268 int phylink_of_phy_connect(struct phylink *pl, struct device_node *dn, 2269 u32 flags) 2270 { 2271 return phylink_fwnode_phy_connect(pl, of_fwnode_handle(dn), flags); 2272 } 2273 EXPORT_SYMBOL_GPL(phylink_of_phy_connect); 2274 2275 /** 2276 * phylink_fwnode_phy_connect() - connect the PHY specified in the fwnode. 2277 * @pl: a pointer to a &struct phylink returned from phylink_create() 2278 * @fwnode: a pointer to a &struct fwnode_handle. 2279 * @flags: PHY-specific flags to communicate to the PHY device driver 2280 * 2281 * Connect the phy specified @fwnode to the phylink instance specified 2282 * by @pl. 2283 * 2284 * Returns 0 on success or a negative errno. 2285 */ 2286 int phylink_fwnode_phy_connect(struct phylink *pl, 2287 const struct fwnode_handle *fwnode, 2288 u32 flags) 2289 { 2290 struct fwnode_handle *phy_fwnode; 2291 struct phy_device *phy_dev; 2292 int ret; 2293 2294 if (!phylink_expects_phy(pl)) 2295 return 0; 2296 2297 phy_fwnode = fwnode_get_phy_node(fwnode); 2298 if (IS_ERR(phy_fwnode)) { 2299 /* PHY mode requires a PHY to be specified. */ 2300 if (pl->cfg_link_an_mode == MLO_AN_PHY) 2301 return -ENODEV; 2302 return 0; 2303 } 2304 2305 phy_dev = fwnode_phy_find_device(phy_fwnode); 2306 /* We're done with the phy_node handle */ 2307 fwnode_handle_put(phy_fwnode); 2308 if (!phy_dev) 2309 return -ENODEV; 2310 2311 /* Use PHY device/driver interface */ 2312 if (pl->link_interface == PHY_INTERFACE_MODE_NA) { 2313 pl->link_interface = phy_dev->interface; 2314 pl->link_config.interface = pl->link_interface; 2315 } 2316 2317 if (pl->config->mac_requires_rxc) 2318 flags |= PHY_F_RXC_ALWAYS_ON; 2319 2320 ret = phy_attach_direct(pl->netdev, phy_dev, flags, 2321 pl->link_interface); 2322 phy_device_free(phy_dev); 2323 if (ret) 2324 return ret; 2325 2326 ret = phylink_bringup_phy(pl, phy_dev, pl->link_config.interface); 2327 if (ret) 2328 phy_detach(phy_dev); 2329 2330 return ret; 2331 } 2332 EXPORT_SYMBOL_GPL(phylink_fwnode_phy_connect); 2333 2334 /** 2335 * phylink_disconnect_phy() - disconnect any PHY attached to the phylink 2336 * instance. 2337 * @pl: a pointer to a &struct phylink returned from phylink_create() 2338 * 2339 * Disconnect any current PHY from the phylink instance described by @pl. 2340 */ 2341 void phylink_disconnect_phy(struct phylink *pl) 2342 { 2343 struct phy_device *phy; 2344 2345 ASSERT_RTNL(); 2346 2347 mutex_lock(&pl->phydev_mutex); 2348 phy = pl->phydev; 2349 if (phy) { 2350 mutex_lock(&phy->lock); 2351 mutex_lock(&pl->state_mutex); 2352 pl->phydev = NULL; 2353 pl->phy_enable_tx_lpi = false; 2354 pl->mac_tx_clk_stop = false; 2355 mutex_unlock(&pl->state_mutex); 2356 mutex_unlock(&phy->lock); 2357 } 2358 mutex_unlock(&pl->phydev_mutex); 2359 2360 if (phy) { 2361 flush_work(&pl->resolve); 2362 phy_disconnect(phy); 2363 } 2364 } 2365 EXPORT_SYMBOL_GPL(phylink_disconnect_phy); 2366 2367 static void phylink_link_changed(struct phylink *pl, bool up, const char *what) 2368 { 2369 if (!up) 2370 pl->link_failed = true; 2371 phylink_run_resolve(pl); 2372 phylink_dbg(pl, "%s link %s\n", what, up ? "up" : "down"); 2373 } 2374 2375 /** 2376 * phylink_mac_change() - notify phylink of a change in MAC state 2377 * @pl: a pointer to a &struct phylink returned from phylink_create() 2378 * @up: indicates whether the link is currently up. 2379 * 2380 * The MAC driver should call this driver when the state of its link 2381 * changes (eg, link failure, new negotiation results, etc.) 2382 */ 2383 void phylink_mac_change(struct phylink *pl, bool up) 2384 { 2385 phylink_link_changed(pl, up, "mac"); 2386 } 2387 EXPORT_SYMBOL_GPL(phylink_mac_change); 2388 2389 /** 2390 * phylink_pcs_change() - notify phylink of a change to PCS link state 2391 * @pcs: pointer to &struct phylink_pcs 2392 * @up: indicates whether the link is currently up. 2393 * 2394 * The PCS driver should call this when the state of its link changes 2395 * (e.g. link failure, new negotiation results, etc.) Note: it should 2396 * not determine "up" by reading the BMSR. If in doubt about the link 2397 * state at interrupt time, then pass true if pcs_get_state() returns 2398 * the latched link-down state, otherwise pass false. 2399 */ 2400 void phylink_pcs_change(struct phylink_pcs *pcs, bool up) 2401 { 2402 struct phylink *pl = pcs->phylink; 2403 2404 if (pl) 2405 phylink_link_changed(pl, up, "pcs"); 2406 } 2407 EXPORT_SYMBOL_GPL(phylink_pcs_change); 2408 2409 static irqreturn_t phylink_link_handler(int irq, void *data) 2410 { 2411 struct phylink *pl = data; 2412 2413 phylink_run_resolve(pl); 2414 2415 return IRQ_HANDLED; 2416 } 2417 2418 /** 2419 * phylink_start() - start a phylink instance 2420 * @pl: a pointer to a &struct phylink returned from phylink_create() 2421 * 2422 * Start the phylink instance specified by @pl, configuring the MAC for the 2423 * desired link mode(s) and negotiation style. This should be called from the 2424 * network device driver's &struct net_device_ops ndo_open() method. 2425 */ 2426 void phylink_start(struct phylink *pl) 2427 { 2428 bool poll = false; 2429 2430 ASSERT_RTNL(); 2431 2432 phylink_info(pl, "configuring for %s/%s link mode\n", 2433 phylink_an_mode_str(pl->req_link_an_mode), 2434 phy_modes(pl->link_config.interface)); 2435 2436 /* Always set the carrier off */ 2437 if (pl->netdev) 2438 netif_carrier_off(pl->netdev); 2439 2440 pl->pcs_state = PCS_STATE_STARTING; 2441 2442 /* Apply the link configuration to the MAC when starting. This allows 2443 * a fixed-link to start with the correct parameters, and also 2444 * ensures that we set the appropriate advertisement for Serdes links. 2445 * 2446 * Restart autonegotiation if using 802.3z to ensure that the link 2447 * parameters are properly negotiated. This is necessary for DSA 2448 * switches using 802.3z negotiation to ensure they see our modes. 2449 */ 2450 phylink_mac_initial_config(pl, true); 2451 2452 pl->pcs_state = PCS_STATE_STARTED; 2453 2454 phylink_enable_and_run_resolve(pl, PHYLINK_DISABLE_STOPPED); 2455 2456 if (pl->cfg_link_an_mode == MLO_AN_FIXED && pl->link_gpio) { 2457 int irq = gpiod_to_irq(pl->link_gpio); 2458 2459 if (irq > 0) { 2460 if (!request_irq(irq, phylink_link_handler, 2461 IRQF_TRIGGER_RISING | 2462 IRQF_TRIGGER_FALLING, 2463 "netdev link", pl)) 2464 pl->link_irq = irq; 2465 else 2466 irq = 0; 2467 } 2468 if (irq <= 0) 2469 poll = true; 2470 } 2471 2472 if (pl->cfg_link_an_mode == MLO_AN_FIXED) 2473 poll |= pl->config->poll_fixed_state; 2474 2475 if (poll) 2476 mod_timer(&pl->link_poll, jiffies + HZ); 2477 if (pl->phydev) 2478 phy_start(pl->phydev); 2479 if (pl->sfp_bus) 2480 sfp_upstream_start(pl->sfp_bus); 2481 } 2482 EXPORT_SYMBOL_GPL(phylink_start); 2483 2484 /** 2485 * phylink_stop() - stop a phylink instance 2486 * @pl: a pointer to a &struct phylink returned from phylink_create() 2487 * 2488 * Stop the phylink instance specified by @pl. This should be called from the 2489 * network device driver's &struct net_device_ops ndo_stop() method. The 2490 * network device's carrier state should not be changed prior to calling this 2491 * function. 2492 * 2493 * This will synchronously bring down the link if the link is not already 2494 * down (in other words, it will trigger a mac_link_down() method call.) 2495 */ 2496 void phylink_stop(struct phylink *pl) 2497 { 2498 ASSERT_RTNL(); 2499 2500 if (pl->sfp_bus) 2501 sfp_upstream_stop(pl->sfp_bus); 2502 if (pl->phydev) 2503 phy_stop(pl->phydev); 2504 timer_delete_sync(&pl->link_poll); 2505 if (pl->link_irq) { 2506 free_irq(pl->link_irq, pl); 2507 pl->link_irq = 0; 2508 } 2509 2510 phylink_run_resolve_and_disable(pl, PHYLINK_DISABLE_STOPPED); 2511 2512 pl->pcs_state = PCS_STATE_DOWN; 2513 2514 phylink_pcs_disable(pl->pcs); 2515 } 2516 EXPORT_SYMBOL_GPL(phylink_stop); 2517 2518 /** 2519 * phylink_rx_clk_stop_block() - block PHY ability to stop receive clock in LPI 2520 * @pl: a pointer to a &struct phylink returned from phylink_create() 2521 * 2522 * Disable the PHY's ability to stop the receive clock while the receive path 2523 * is in EEE LPI state, until the number of calls to phylink_rx_clk_stop_block() 2524 * are balanced by calls to phylink_rx_clk_stop_unblock(). 2525 */ 2526 void phylink_rx_clk_stop_block(struct phylink *pl) 2527 { 2528 ASSERT_RTNL(); 2529 2530 if (pl->mac_rx_clk_stop_blocked == U8_MAX) { 2531 phylink_warn(pl, "%s called too many times - ignoring\n", 2532 __func__); 2533 dump_stack(); 2534 return; 2535 } 2536 2537 /* Disable PHY receive clock stop if this is the first time this 2538 * function has been called and clock-stop was previously enabled. 2539 */ 2540 if (pl->mac_rx_clk_stop_blocked++ == 0 && 2541 pl->mac_supports_eee_ops && pl->phydev && 2542 pl->config->eee_rx_clk_stop_enable) 2543 phy_eee_rx_clock_stop(pl->phydev, false); 2544 } 2545 EXPORT_SYMBOL_GPL(phylink_rx_clk_stop_block); 2546 2547 /** 2548 * phylink_rx_clk_stop_unblock() - unblock PHY ability to stop receive clock 2549 * @pl: a pointer to a &struct phylink returned from phylink_create() 2550 * 2551 * All calls to phylink_rx_clk_stop_block() must be balanced with a 2552 * corresponding call to phylink_rx_clk_stop_unblock() to restore the PHYs 2553 * ability to stop the receive clock when the receive path is in EEE LPI mode. 2554 */ 2555 void phylink_rx_clk_stop_unblock(struct phylink *pl) 2556 { 2557 ASSERT_RTNL(); 2558 2559 if (pl->mac_rx_clk_stop_blocked == 0) { 2560 phylink_warn(pl, "%s called too many times - ignoring\n", 2561 __func__); 2562 dump_stack(); 2563 return; 2564 } 2565 2566 /* Re-enable PHY receive clock stop if the number of unblocks matches 2567 * the number of calls to the block function above. 2568 */ 2569 if (--pl->mac_rx_clk_stop_blocked == 0 && 2570 pl->mac_supports_eee_ops && pl->phydev && 2571 pl->config->eee_rx_clk_stop_enable) 2572 phy_eee_rx_clock_stop(pl->phydev, true); 2573 } 2574 EXPORT_SYMBOL_GPL(phylink_rx_clk_stop_unblock); 2575 2576 static bool phylink_mac_supports_wol(struct phylink *pl) 2577 { 2578 return !!pl->mac_ops->mac_wol_set; 2579 } 2580 2581 static bool phylink_phy_supports_wol(struct phylink *pl, 2582 struct phy_device *phydev) 2583 { 2584 return phydev && (pl->config->wol_phy_legacy || phy_can_wakeup(phydev)); 2585 } 2586 2587 static bool phylink_phy_pm_speed_ctrl(struct phylink *pl) 2588 { 2589 return pl->config->wol_phy_speed_ctrl && !pl->wolopts_mac && 2590 pl->phydev && phy_may_wakeup(pl->phydev); 2591 } 2592 2593 /** 2594 * phylink_suspend() - handle a network device suspend event 2595 * @pl: a pointer to a &struct phylink returned from phylink_create() 2596 * @mac_wol: true if the MAC needs to receive packets for Wake-on-Lan 2597 * 2598 * Handle a network device suspend event. There are several cases: 2599 * 2600 * - If Wake-on-Lan is not active, we can bring down the link between 2601 * the MAC and PHY by calling phylink_stop(). 2602 * - If Wake-on-Lan is active, and being handled only by the PHY, we 2603 * can also bring down the link between the MAC and PHY. 2604 * - If Wake-on-Lan is active, but being handled by the MAC, the MAC 2605 * still needs to receive packets, so we can not bring the link down. 2606 * 2607 * Note: when phylink managed Wake-on-Lan is in use, @mac_wol is ignored. 2608 * (struct phylink_mac_ops.mac_set_wol populated.) 2609 */ 2610 void phylink_suspend(struct phylink *pl, bool mac_wol) 2611 { 2612 ASSERT_RTNL(); 2613 2614 if (phylink_mac_supports_wol(pl)) 2615 mac_wol = !!pl->wolopts_mac; 2616 2617 if (mac_wol && (!pl->netdev || pl->netdev->ethtool->wol_enabled)) { 2618 /* Wake-on-Lan enabled, MAC handling */ 2619 mutex_lock(&pl->state_mutex); 2620 2621 /* Stop the resolver bringing the link up */ 2622 __set_bit(PHYLINK_DISABLE_MAC_WOL, &pl->phylink_disable_state); 2623 2624 pl->suspend_link_up = phylink_link_is_up(pl); 2625 if (pl->suspend_link_up) { 2626 /* Disable the carrier, to prevent transmit timeouts, 2627 * but one would hope all packets have been sent. This 2628 * also means phylink_resolve() will do nothing. 2629 */ 2630 if (pl->netdev) 2631 netif_carrier_off(pl->netdev); 2632 pl->old_link_state = false; 2633 } 2634 2635 /* We do not call mac_link_down() here as we want the 2636 * link to remain up to receive the WoL packets. 2637 */ 2638 mutex_unlock(&pl->state_mutex); 2639 } else { 2640 phylink_stop(pl); 2641 } 2642 2643 if (phylink_phy_pm_speed_ctrl(pl)) 2644 phylink_speed_down(pl, false); 2645 } 2646 EXPORT_SYMBOL_GPL(phylink_suspend); 2647 2648 /** 2649 * phylink_prepare_resume() - prepare to resume a network device 2650 * @pl: a pointer to a &struct phylink returned from phylink_create() 2651 * 2652 * Optional, but if called must be called prior to phylink_resume(). 2653 * 2654 * Prepare to resume a network device, preparing the PHY as necessary. 2655 */ 2656 void phylink_prepare_resume(struct phylink *pl) 2657 { 2658 struct phy_device *phydev = pl->phydev; 2659 2660 ASSERT_RTNL(); 2661 2662 /* IEEE 802.3 22.2.4.1.5 allows PHYs to stop their receive clock 2663 * when PDOWN is set. However, some MACs require RXC to be running 2664 * in order to resume. If the MAC requires RXC, and we have a PHY, 2665 * then resume the PHY. Note that 802.3 allows PHYs 500ms before 2666 * the clock meets requirements. We do not implement this delay. 2667 */ 2668 if (pl->config->mac_requires_rxc && phydev && phydev->suspended) 2669 phy_resume(phydev); 2670 } 2671 EXPORT_SYMBOL_GPL(phylink_prepare_resume); 2672 2673 /** 2674 * phylink_resume() - handle a network device resume event 2675 * @pl: a pointer to a &struct phylink returned from phylink_create() 2676 * 2677 * Undo the effects of phylink_suspend(), returning the link to an 2678 * operational state. 2679 */ 2680 void phylink_resume(struct phylink *pl) 2681 { 2682 ASSERT_RTNL(); 2683 2684 if (phylink_phy_pm_speed_ctrl(pl)) 2685 phylink_speed_up(pl); 2686 2687 if (test_bit(PHYLINK_DISABLE_MAC_WOL, &pl->phylink_disable_state)) { 2688 /* Wake-on-Lan enabled, MAC handling */ 2689 2690 if (pl->suspend_link_up) { 2691 /* Call mac_link_down() so we keep the overall state 2692 * balanced. Do this under the state_mutex lock for 2693 * consistency. This will cause a "Link Down" message 2694 * to be printed during resume, which is harmless - 2695 * the true link state will be printed when we run a 2696 * resolve. 2697 */ 2698 mutex_lock(&pl->state_mutex); 2699 phylink_link_down(pl); 2700 mutex_unlock(&pl->state_mutex); 2701 } 2702 2703 /* Re-apply the link parameters so that all the settings get 2704 * restored to the MAC. 2705 */ 2706 phylink_mac_initial_config(pl, true); 2707 2708 /* Re-enable and re-resolve the link parameters */ 2709 phylink_enable_and_run_resolve(pl, PHYLINK_DISABLE_MAC_WOL); 2710 } else { 2711 phylink_start(pl); 2712 } 2713 } 2714 EXPORT_SYMBOL_GPL(phylink_resume); 2715 2716 /** 2717 * phylink_ethtool_get_wol() - get the wake on lan parameters for the PHY 2718 * @pl: a pointer to a &struct phylink returned from phylink_create() 2719 * @wol: a pointer to &struct ethtool_wolinfo to hold the read parameters 2720 * 2721 * Read the wake on lan parameters from the PHY attached to the phylink 2722 * instance specified by @pl. If no PHY is currently attached, report no 2723 * support for wake on lan. 2724 */ 2725 void phylink_ethtool_get_wol(struct phylink *pl, struct ethtool_wolinfo *wol) 2726 { 2727 ASSERT_RTNL(); 2728 2729 wol->supported = 0; 2730 wol->wolopts = 0; 2731 2732 if (phylink_mac_supports_wol(pl)) { 2733 if (phylink_phy_supports_wol(pl, pl->phydev)) 2734 phy_ethtool_get_wol(pl->phydev, wol); 2735 2736 /* Where the MAC augments the WoL support, merge its support and 2737 * current configuration. 2738 */ 2739 if (~wol->wolopts & pl->wolopts_mac & WAKE_MAGICSECURE) 2740 memcpy(wol->sopass, pl->wol_sopass, 2741 sizeof(wol->sopass)); 2742 2743 wol->supported |= pl->config->wol_mac_support; 2744 wol->wolopts |= pl->wolopts_mac; 2745 } else { 2746 /* Legacy */ 2747 if (pl->phydev) 2748 phy_ethtool_get_wol(pl->phydev, wol); 2749 } 2750 } 2751 EXPORT_SYMBOL_GPL(phylink_ethtool_get_wol); 2752 2753 /** 2754 * phylink_ethtool_set_wol() - set wake on lan parameters 2755 * @pl: a pointer to a &struct phylink returned from phylink_create() 2756 * @wol: a pointer to &struct ethtool_wolinfo for the desired parameters 2757 * 2758 * Set the wake on lan parameters for the PHY attached to the phylink 2759 * instance specified by @pl. If no PHY is attached, returns %EOPNOTSUPP 2760 * error. 2761 * 2762 * Returns zero on success or negative errno code. 2763 */ 2764 int phylink_ethtool_set_wol(struct phylink *pl, struct ethtool_wolinfo *wol) 2765 { 2766 struct ethtool_wolinfo w = { .cmd = ETHTOOL_GWOL }; 2767 int ret = -EOPNOTSUPP; 2768 bool changed; 2769 u32 wolopts; 2770 2771 ASSERT_RTNL(); 2772 2773 if (phylink_mac_supports_wol(pl)) { 2774 wolopts = wol->wolopts; 2775 2776 if (phylink_phy_supports_wol(pl, pl->phydev)) { 2777 ret = phy_ethtool_set_wol(pl->phydev, wol); 2778 if (ret != 0 && ret != -EOPNOTSUPP) 2779 return ret; 2780 2781 phy_ethtool_get_wol(pl->phydev, &w); 2782 2783 /* Any Wake-on-Lan modes which the PHY is handling 2784 * should not be passed on to the MAC. 2785 */ 2786 wolopts &= ~w.wolopts; 2787 } 2788 2789 wolopts &= pl->config->wol_mac_support; 2790 changed = pl->wolopts_mac != wolopts; 2791 if (wolopts & WAKE_MAGICSECURE) 2792 changed |= !!memcmp(wol->sopass, pl->wol_sopass, 2793 sizeof(wol->sopass)); 2794 memcpy(pl->wol_sopass, wol->sopass, sizeof(pl->wol_sopass)); 2795 2796 if (changed) { 2797 ret = pl->mac_ops->mac_wol_set(pl->config, wolopts, 2798 wol->sopass); 2799 if (!ret) 2800 pl->wolopts_mac = wolopts; 2801 } else { 2802 ret = 0; 2803 } 2804 } else { 2805 if (pl->phydev) 2806 ret = phy_ethtool_set_wol(pl->phydev, wol); 2807 } 2808 2809 return ret; 2810 } 2811 EXPORT_SYMBOL_GPL(phylink_ethtool_set_wol); 2812 2813 static phy_interface_t phylink_sfp_select_interface(struct phylink *pl, 2814 const unsigned long *link_modes) 2815 { 2816 phy_interface_t interface; 2817 2818 interface = sfp_select_interface(pl->sfp_bus, link_modes); 2819 if (interface == PHY_INTERFACE_MODE_NA) { 2820 phylink_err(pl, 2821 "selection of interface failed, advertisement %*pb\n", 2822 __ETHTOOL_LINK_MODE_MASK_NBITS, 2823 link_modes); 2824 return interface; 2825 } 2826 2827 if (!test_bit(interface, pl->config->supported_interfaces)) { 2828 phylink_err(pl, 2829 "selection of interface failed, SFP selected %s (%u) but MAC supports %*pbl\n", 2830 phy_modes(interface), interface, 2831 (int)PHY_INTERFACE_MODE_MAX, 2832 pl->config->supported_interfaces); 2833 return PHY_INTERFACE_MODE_NA; 2834 } 2835 2836 return interface; 2837 } 2838 2839 static phy_interface_t phylink_sfp_select_interface_speed(struct phylink *pl, 2840 u32 speed) 2841 { 2842 phy_interface_t best_interface = PHY_INTERFACE_MODE_NA; 2843 phy_interface_t interface; 2844 u32 max_speed; 2845 int i; 2846 2847 for (i = 0; i < ARRAY_SIZE(phylink_sfp_interface_preference); i++) { 2848 interface = phylink_sfp_interface_preference[i]; 2849 if (!test_bit(interface, pl->sfp_interfaces)) 2850 continue; 2851 2852 max_speed = phylink_interface_max_speed(interface); 2853 2854 /* The logic here is: if speed == max_speed, then we've found 2855 * the best interface. Otherwise we find the interface that 2856 * can just support the requested speed. 2857 */ 2858 if (max_speed >= speed) 2859 best_interface = interface; 2860 2861 if (max_speed <= speed) 2862 break; 2863 } 2864 2865 if (best_interface == PHY_INTERFACE_MODE_NA) 2866 phylink_err(pl, "selection of interface failed, speed %u\n", 2867 speed); 2868 2869 return best_interface; 2870 } 2871 2872 static void phylink_merge_link_mode(unsigned long *dst, const unsigned long *b) 2873 { 2874 __ETHTOOL_DECLARE_LINK_MODE_MASK(mask); 2875 2876 linkmode_zero(mask); 2877 phylink_set_port_modes(mask); 2878 2879 linkmode_and(dst, dst, mask); 2880 linkmode_or(dst, dst, b); 2881 } 2882 2883 static void phylink_get_ksettings(const struct phylink_link_state *state, 2884 struct ethtool_link_ksettings *kset) 2885 { 2886 phylink_merge_link_mode(kset->link_modes.advertising, state->advertising); 2887 linkmode_copy(kset->link_modes.lp_advertising, state->lp_advertising); 2888 if (kset->base.rate_matching == RATE_MATCH_NONE) { 2889 kset->base.speed = state->speed; 2890 kset->base.duplex = state->duplex; 2891 } 2892 kset->base.autoneg = linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, 2893 state->advertising) ? 2894 AUTONEG_ENABLE : AUTONEG_DISABLE; 2895 } 2896 2897 /** 2898 * phylink_ethtool_ksettings_get() - get the current link settings 2899 * @pl: a pointer to a &struct phylink returned from phylink_create() 2900 * @kset: a pointer to a &struct ethtool_link_ksettings to hold link settings 2901 * 2902 * Read the current link settings for the phylink instance specified by @pl. 2903 * This will be the link settings read from the MAC, PHY or fixed link 2904 * settings depending on the current negotiation mode. 2905 */ 2906 int phylink_ethtool_ksettings_get(struct phylink *pl, 2907 struct ethtool_link_ksettings *kset) 2908 { 2909 struct phylink_link_state link_state; 2910 2911 ASSERT_RTNL(); 2912 2913 if (pl->phydev) 2914 phy_ethtool_ksettings_get(pl->phydev, kset); 2915 else 2916 kset->base.port = pl->link_port; 2917 2918 linkmode_copy(kset->link_modes.supported, pl->supported); 2919 2920 switch (pl->act_link_an_mode) { 2921 case MLO_AN_FIXED: 2922 /* We are using fixed settings. Report these as the 2923 * current link settings - and note that these also 2924 * represent the supported speeds/duplex/pause modes. 2925 */ 2926 phylink_get_fixed_state(pl, &link_state); 2927 phylink_get_ksettings(&link_state, kset); 2928 break; 2929 2930 case MLO_AN_INBAND: 2931 /* If there is a phy attached, then use the reported 2932 * settings from the phy with no modification. 2933 */ 2934 if (pl->phydev) 2935 break; 2936 2937 phylink_mac_pcs_get_state(pl, &link_state); 2938 2939 /* The MAC is reporting the link results from its own PCS 2940 * layer via in-band status. Report these as the current 2941 * link settings. 2942 */ 2943 phylink_get_ksettings(&link_state, kset); 2944 break; 2945 } 2946 2947 return 0; 2948 } 2949 EXPORT_SYMBOL_GPL(phylink_ethtool_ksettings_get); 2950 2951 static bool phylink_validate_pcs_inband_autoneg(struct phylink *pl, 2952 phy_interface_t interface, 2953 unsigned long *adv) 2954 { 2955 unsigned int inband = phylink_inband_caps(pl, interface); 2956 unsigned int mask; 2957 2958 /* If the PCS doesn't implement inband support, be permissive. */ 2959 if (!inband) 2960 return true; 2961 2962 if (linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, adv)) 2963 mask = LINK_INBAND_ENABLE; 2964 else 2965 mask = LINK_INBAND_DISABLE; 2966 2967 /* Check whether the PCS implements the required mode */ 2968 return !!(inband & mask); 2969 } 2970 2971 /** 2972 * phylink_ethtool_ksettings_set() - set the link settings 2973 * @pl: a pointer to a &struct phylink returned from phylink_create() 2974 * @kset: a pointer to a &struct ethtool_link_ksettings for the desired modes 2975 */ 2976 int phylink_ethtool_ksettings_set(struct phylink *pl, 2977 const struct ethtool_link_ksettings *kset) 2978 { 2979 __ETHTOOL_DECLARE_LINK_MODE_MASK(support); 2980 const struct link_capabilities *c; 2981 struct phylink_link_state config; 2982 2983 ASSERT_RTNL(); 2984 2985 if (pl->phydev) { 2986 struct ethtool_link_ksettings phy_kset = *kset; 2987 2988 linkmode_and(phy_kset.link_modes.advertising, 2989 phy_kset.link_modes.advertising, 2990 pl->supported); 2991 2992 /* We can rely on phylib for this update; we also do not need 2993 * to update the pl->link_config settings: 2994 * - the configuration returned via ksettings_get() will come 2995 * from phylib whenever a PHY is present. 2996 * - link_config.interface will be updated by the PHY calling 2997 * back via phylink_phy_change() and a subsequent resolve. 2998 * - initial link configuration for PHY mode comes from the 2999 * last phy state updated via phylink_phy_change(). 3000 * - other configuration changes (e.g. pause modes) are 3001 * performed directly via phylib. 3002 * - if in in-band mode with a PHY, the link configuration 3003 * is passed on the link from the PHY, and all of 3004 * link_config.{speed,duplex,an_enabled,pause} are not used. 3005 * - the only possible use would be link_config.advertising 3006 * pause modes when in 1000base-X mode with a PHY, but in 3007 * the presence of a PHY, this should not be changed as that 3008 * should be determined from the media side advertisement. 3009 */ 3010 return phy_ethtool_ksettings_set(pl->phydev, &phy_kset); 3011 } 3012 3013 config = pl->link_config; 3014 /* Mask out unsupported advertisements */ 3015 linkmode_and(config.advertising, kset->link_modes.advertising, 3016 pl->supported); 3017 3018 /* FIXME: should we reject autoneg if phy/mac does not support it? */ 3019 switch (kset->base.autoneg) { 3020 case AUTONEG_DISABLE: 3021 /* Autonegotiation disabled, select a suitable speed and 3022 * duplex. 3023 */ 3024 c = phy_caps_lookup(kset->base.speed, kset->base.duplex, 3025 pl->supported, false); 3026 if (!c) 3027 return -EINVAL; 3028 3029 /* If we have a fixed link, refuse to change link parameters. 3030 * If the link parameters match, accept them but do nothing. 3031 */ 3032 if (pl->req_link_an_mode == MLO_AN_FIXED) { 3033 if (c->speed != pl->link_config.speed || 3034 c->duplex != pl->link_config.duplex) 3035 return -EINVAL; 3036 return 0; 3037 } 3038 3039 config.speed = c->speed; 3040 config.duplex = c->duplex; 3041 break; 3042 3043 case AUTONEG_ENABLE: 3044 /* If we have a fixed link, allow autonegotiation (since that 3045 * is our default case) but do not allow the advertisement to 3046 * be changed. If the advertisement matches, simply return. 3047 */ 3048 if (pl->req_link_an_mode == MLO_AN_FIXED) { 3049 if (!linkmode_equal(config.advertising, 3050 pl->link_config.advertising)) 3051 return -EINVAL; 3052 return 0; 3053 } 3054 3055 config.speed = SPEED_UNKNOWN; 3056 config.duplex = DUPLEX_UNKNOWN; 3057 break; 3058 3059 default: 3060 return -EINVAL; 3061 } 3062 3063 /* We have ruled out the case with a PHY attached, and the 3064 * fixed-link cases. All that is left are in-band links. 3065 */ 3066 linkmode_mod_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, config.advertising, 3067 kset->base.autoneg == AUTONEG_ENABLE); 3068 3069 /* If this link is with an SFP, ensure that changes to advertised modes 3070 * also cause the associated interface to be selected such that the 3071 * link can be configured correctly. 3072 */ 3073 if (pl->sfp_bus) { 3074 if (kset->base.autoneg == AUTONEG_ENABLE) 3075 config.interface = 3076 phylink_sfp_select_interface(pl, 3077 config.advertising); 3078 else 3079 config.interface = 3080 phylink_sfp_select_interface_speed(pl, 3081 config.speed); 3082 if (config.interface == PHY_INTERFACE_MODE_NA) 3083 return -EINVAL; 3084 3085 /* Revalidate with the selected interface */ 3086 linkmode_copy(support, pl->supported); 3087 if (phylink_validate(pl, support, &config)) { 3088 phylink_err(pl, "validation of %s/%s with support %*pb failed\n", 3089 phylink_an_mode_str(pl->req_link_an_mode), 3090 phy_modes(config.interface), 3091 __ETHTOOL_LINK_MODE_MASK_NBITS, support); 3092 return -EINVAL; 3093 } 3094 } else { 3095 /* Validate without changing the current supported mask. */ 3096 linkmode_copy(support, pl->supported); 3097 if (phylink_validate(pl, support, &config)) 3098 return -EINVAL; 3099 } 3100 3101 /* If autonegotiation is enabled, we must have an advertisement */ 3102 if (linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, 3103 config.advertising) && 3104 phylink_is_empty_linkmode(config.advertising)) 3105 return -EINVAL; 3106 3107 /* Validate the autonegotiation state. We don't have a PHY in this 3108 * situation, so the PCS is the media-facing entity. 3109 */ 3110 if (!phylink_validate_pcs_inband_autoneg(pl, config.interface, 3111 config.advertising)) 3112 return -EINVAL; 3113 3114 mutex_lock(&pl->state_mutex); 3115 pl->link_config.speed = config.speed; 3116 pl->link_config.duplex = config.duplex; 3117 3118 if (pl->link_config.interface != config.interface) { 3119 /* The interface changed, e.g. 1000base-X <-> 2500base-X */ 3120 /* We need to force the link down, then change the interface */ 3121 if (pl->old_link_state) { 3122 phylink_link_down(pl); 3123 pl->old_link_state = false; 3124 } 3125 if (!test_bit(PHYLINK_DISABLE_STOPPED, 3126 &pl->phylink_disable_state)) 3127 phylink_major_config(pl, false, &config); 3128 pl->link_config.interface = config.interface; 3129 linkmode_copy(pl->link_config.advertising, config.advertising); 3130 } else if (!linkmode_equal(pl->link_config.advertising, 3131 config.advertising)) { 3132 linkmode_copy(pl->link_config.advertising, config.advertising); 3133 phylink_change_inband_advert(pl); 3134 } 3135 mutex_unlock(&pl->state_mutex); 3136 3137 return 0; 3138 } 3139 EXPORT_SYMBOL_GPL(phylink_ethtool_ksettings_set); 3140 3141 /** 3142 * phylink_ethtool_nway_reset() - restart negotiation 3143 * @pl: a pointer to a &struct phylink returned from phylink_create() 3144 * 3145 * Restart negotiation for the phylink instance specified by @pl. This will 3146 * cause any attached phy to restart negotiation with the link partner, and 3147 * if the MAC is in a BaseX mode, the MAC will also be requested to restart 3148 * negotiation. 3149 * 3150 * Returns zero on success, or negative error code. 3151 */ 3152 int phylink_ethtool_nway_reset(struct phylink *pl) 3153 { 3154 int ret = 0; 3155 3156 ASSERT_RTNL(); 3157 3158 if (pl->phydev) 3159 ret = phy_restart_aneg(pl->phydev); 3160 phylink_pcs_an_restart(pl); 3161 3162 return ret; 3163 } 3164 EXPORT_SYMBOL_GPL(phylink_ethtool_nway_reset); 3165 3166 /** 3167 * phylink_ethtool_get_pauseparam() - get the current pause parameters 3168 * @pl: a pointer to a &struct phylink returned from phylink_create() 3169 * @pause: a pointer to a &struct ethtool_pauseparam 3170 */ 3171 void phylink_ethtool_get_pauseparam(struct phylink *pl, 3172 struct ethtool_pauseparam *pause) 3173 { 3174 ASSERT_RTNL(); 3175 3176 pause->autoneg = !!(pl->link_config.pause & MLO_PAUSE_AN); 3177 pause->rx_pause = !!(pl->link_config.pause & MLO_PAUSE_RX); 3178 pause->tx_pause = !!(pl->link_config.pause & MLO_PAUSE_TX); 3179 } 3180 EXPORT_SYMBOL_GPL(phylink_ethtool_get_pauseparam); 3181 3182 /** 3183 * phylink_ethtool_set_pauseparam() - set the current pause parameters 3184 * @pl: a pointer to a &struct phylink returned from phylink_create() 3185 * @pause: a pointer to a &struct ethtool_pauseparam 3186 */ 3187 int phylink_ethtool_set_pauseparam(struct phylink *pl, 3188 struct ethtool_pauseparam *pause) 3189 { 3190 struct phylink_link_state *config = &pl->link_config; 3191 bool manual_changed; 3192 int pause_state; 3193 3194 ASSERT_RTNL(); 3195 3196 if (pl->req_link_an_mode == MLO_AN_FIXED) 3197 return -EOPNOTSUPP; 3198 3199 if (!phylink_test(pl->supported, Pause) && 3200 !phylink_test(pl->supported, Asym_Pause)) 3201 return -EOPNOTSUPP; 3202 3203 if (!phylink_test(pl->supported, Asym_Pause) && 3204 pause->rx_pause != pause->tx_pause) 3205 return -EINVAL; 3206 3207 pause_state = 0; 3208 if (pause->autoneg) 3209 pause_state |= MLO_PAUSE_AN; 3210 if (pause->rx_pause) 3211 pause_state |= MLO_PAUSE_RX; 3212 if (pause->tx_pause) 3213 pause_state |= MLO_PAUSE_TX; 3214 3215 mutex_lock(&pl->state_mutex); 3216 /* 3217 * See the comments for linkmode_set_pause(), wrt the deficiencies 3218 * with the current implementation. A solution to this issue would 3219 * be: 3220 * ethtool Local device 3221 * rx tx Pause AsymDir 3222 * 0 0 0 0 3223 * 1 0 1 1 3224 * 0 1 0 1 3225 * 1 1 1 1 3226 * and then use the ethtool rx/tx enablement status to mask the 3227 * rx/tx pause resolution. 3228 */ 3229 linkmode_set_pause(config->advertising, pause->tx_pause, 3230 pause->rx_pause); 3231 3232 manual_changed = (config->pause ^ pause_state) & MLO_PAUSE_AN || 3233 (!(pause_state & MLO_PAUSE_AN) && 3234 (config->pause ^ pause_state) & MLO_PAUSE_TXRX_MASK); 3235 3236 config->pause = pause_state; 3237 3238 /* Update our in-band advertisement, triggering a renegotiation if 3239 * the advertisement changed. 3240 */ 3241 if (!pl->phydev) 3242 phylink_change_inband_advert(pl); 3243 3244 mutex_unlock(&pl->state_mutex); 3245 3246 /* If we have a PHY, a change of the pause frame advertisement will 3247 * cause phylib to renegotiate (if AN is enabled) which will in turn 3248 * call our phylink_phy_change() and trigger a resolve. Note that 3249 * we can't hold our state mutex while calling phy_set_asym_pause(). 3250 */ 3251 if (pl->phydev) 3252 phy_set_asym_pause(pl->phydev, pause->rx_pause, 3253 pause->tx_pause); 3254 3255 /* If the manual pause settings changed, make sure we trigger a 3256 * resolve to update their state; we can not guarantee that the 3257 * link will cycle. 3258 */ 3259 if (manual_changed) { 3260 pl->link_failed = true; 3261 phylink_run_resolve(pl); 3262 } 3263 3264 return 0; 3265 } 3266 EXPORT_SYMBOL_GPL(phylink_ethtool_set_pauseparam); 3267 3268 /** 3269 * phylink_get_eee_err() - read the energy efficient ethernet error 3270 * counter 3271 * @pl: a pointer to a &struct phylink returned from phylink_create(). 3272 * 3273 * Read the Energy Efficient Ethernet error counter from the PHY associated 3274 * with the phylink instance specified by @pl. 3275 * 3276 * Returns positive error counter value, or negative error code. 3277 */ 3278 int phylink_get_eee_err(struct phylink *pl) 3279 { 3280 int ret = 0; 3281 3282 ASSERT_RTNL(); 3283 3284 if (pl->phydev) 3285 ret = phy_get_eee_err(pl->phydev); 3286 3287 return ret; 3288 } 3289 EXPORT_SYMBOL_GPL(phylink_get_eee_err); 3290 3291 /** 3292 * phylink_ethtool_get_eee() - read the energy efficient ethernet parameters 3293 * @pl: a pointer to a &struct phylink returned from phylink_create() 3294 * @eee: a pointer to a &struct ethtool_keee for the read parameters 3295 */ 3296 int phylink_ethtool_get_eee(struct phylink *pl, struct ethtool_keee *eee) 3297 { 3298 int ret = -EOPNOTSUPP; 3299 3300 ASSERT_RTNL(); 3301 3302 if (pl->mac_supports_eee_ops && !pl->mac_supports_eee) 3303 return ret; 3304 3305 if (pl->phydev) { 3306 ret = phy_ethtool_get_eee(pl->phydev, eee); 3307 /* Restrict supported linkmode mask */ 3308 if (ret == 0 && pl->mac_supports_eee_ops) 3309 linkmode_and(eee->supported, eee->supported, 3310 pl->supported_lpi); 3311 } 3312 3313 return ret; 3314 } 3315 EXPORT_SYMBOL_GPL(phylink_ethtool_get_eee); 3316 3317 /** 3318 * phylink_ethtool_set_eee() - set the energy efficient ethernet parameters 3319 * @pl: a pointer to a &struct phylink returned from phylink_create() 3320 * @eee: a pointer to a &struct ethtool_keee for the desired parameters 3321 */ 3322 int phylink_ethtool_set_eee(struct phylink *pl, struct ethtool_keee *eee) 3323 { 3324 bool mac_eee = pl->mac_supports_eee; 3325 int ret = -EOPNOTSUPP; 3326 3327 ASSERT_RTNL(); 3328 3329 phylink_dbg(pl, "mac %s phylink EEE%s, adv %*pbl, LPI%s timer %uus\n", 3330 mac_eee ? "supports" : "does not support", 3331 eee->eee_enabled ? ", enabled" : "", 3332 __ETHTOOL_LINK_MODE_MASK_NBITS, eee->advertised, 3333 eee->tx_lpi_enabled ? " enabled" : "", eee->tx_lpi_timer); 3334 3335 if (pl->mac_supports_eee_ops && !mac_eee) 3336 return ret; 3337 3338 if (pl->phydev) { 3339 /* Restrict advertisement mask */ 3340 if (pl->mac_supports_eee_ops) 3341 linkmode_and(eee->advertised, eee->advertised, 3342 pl->supported_lpi); 3343 ret = phy_ethtool_set_eee(pl->phydev, eee); 3344 if (ret == 0) 3345 eee_to_eeecfg(&pl->eee_cfg, eee); 3346 } 3347 3348 return ret; 3349 } 3350 EXPORT_SYMBOL_GPL(phylink_ethtool_set_eee); 3351 3352 /* This emulates MII registers for a fixed-mode phy operating as per the 3353 * passed in state. "aneg" defines if we report negotiation is possible. 3354 * 3355 * FIXME: should deal with negotiation state too. 3356 */ 3357 static int phylink_mii_emul_read(unsigned int reg, 3358 struct phylink_link_state *state) 3359 { 3360 struct fixed_phy_status fs; 3361 unsigned long *lpa = state->lp_advertising; 3362 int val; 3363 3364 fs.link = state->link; 3365 fs.speed = state->speed; 3366 fs.duplex = state->duplex; 3367 fs.pause = test_bit(ETHTOOL_LINK_MODE_Pause_BIT, lpa); 3368 fs.asym_pause = test_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, lpa); 3369 3370 val = swphy_read_reg(reg, &fs); 3371 if (reg == MII_BMSR) { 3372 if (!state->an_complete) 3373 val &= ~BMSR_ANEGCOMPLETE; 3374 } 3375 return val; 3376 } 3377 3378 static int phylink_phy_read(struct phylink *pl, unsigned int phy_id, 3379 unsigned int reg) 3380 { 3381 struct phy_device *phydev = pl->phydev; 3382 int prtad, devad; 3383 3384 if (mdio_phy_id_is_c45(phy_id)) { 3385 prtad = mdio_phy_id_prtad(phy_id); 3386 devad = mdio_phy_id_devad(phy_id); 3387 return mdiobus_c45_read(pl->phydev->mdio.bus, prtad, devad, 3388 reg); 3389 } 3390 3391 if (phydev->is_c45) { 3392 switch (reg) { 3393 case MII_BMCR: 3394 case MII_BMSR: 3395 case MII_PHYSID1: 3396 case MII_PHYSID2: 3397 devad = __ffs(phydev->c45_ids.mmds_present); 3398 break; 3399 case MII_ADVERTISE: 3400 case MII_LPA: 3401 if (!(phydev->c45_ids.mmds_present & MDIO_DEVS_AN)) 3402 return -EINVAL; 3403 devad = MDIO_MMD_AN; 3404 if (reg == MII_ADVERTISE) 3405 reg = MDIO_AN_ADVERTISE; 3406 else 3407 reg = MDIO_AN_LPA; 3408 break; 3409 default: 3410 return -EINVAL; 3411 } 3412 prtad = phy_id; 3413 return mdiobus_c45_read(pl->phydev->mdio.bus, prtad, devad, 3414 reg); 3415 } 3416 3417 return mdiobus_read(pl->phydev->mdio.bus, phy_id, reg); 3418 } 3419 3420 static int phylink_phy_write(struct phylink *pl, unsigned int phy_id, 3421 unsigned int reg, unsigned int val) 3422 { 3423 struct phy_device *phydev = pl->phydev; 3424 int prtad, devad; 3425 3426 if (mdio_phy_id_is_c45(phy_id)) { 3427 prtad = mdio_phy_id_prtad(phy_id); 3428 devad = mdio_phy_id_devad(phy_id); 3429 return mdiobus_c45_write(pl->phydev->mdio.bus, prtad, devad, 3430 reg, val); 3431 } 3432 3433 if (phydev->is_c45) { 3434 switch (reg) { 3435 case MII_BMCR: 3436 case MII_BMSR: 3437 case MII_PHYSID1: 3438 case MII_PHYSID2: 3439 devad = __ffs(phydev->c45_ids.mmds_present); 3440 break; 3441 case MII_ADVERTISE: 3442 case MII_LPA: 3443 if (!(phydev->c45_ids.mmds_present & MDIO_DEVS_AN)) 3444 return -EINVAL; 3445 devad = MDIO_MMD_AN; 3446 if (reg == MII_ADVERTISE) 3447 reg = MDIO_AN_ADVERTISE; 3448 else 3449 reg = MDIO_AN_LPA; 3450 break; 3451 default: 3452 return -EINVAL; 3453 } 3454 return mdiobus_c45_write(pl->phydev->mdio.bus, phy_id, devad, 3455 reg, val); 3456 } 3457 3458 return mdiobus_write(phydev->mdio.bus, phy_id, reg, val); 3459 } 3460 3461 static int phylink_mii_read(struct phylink *pl, unsigned int phy_id, 3462 unsigned int reg) 3463 { 3464 struct phylink_link_state state; 3465 int val = 0xffff; 3466 3467 switch (pl->act_link_an_mode) { 3468 case MLO_AN_FIXED: 3469 if (phy_id == 0) { 3470 phylink_get_fixed_state(pl, &state); 3471 val = phylink_mii_emul_read(reg, &state); 3472 } 3473 break; 3474 3475 case MLO_AN_PHY: 3476 return -EOPNOTSUPP; 3477 3478 case MLO_AN_INBAND: 3479 if (phy_id == 0) { 3480 phylink_mac_pcs_get_state(pl, &state); 3481 val = phylink_mii_emul_read(reg, &state); 3482 } 3483 break; 3484 } 3485 3486 return val & 0xffff; 3487 } 3488 3489 static int phylink_mii_write(struct phylink *pl, unsigned int phy_id, 3490 unsigned int reg, unsigned int val) 3491 { 3492 switch (pl->act_link_an_mode) { 3493 case MLO_AN_FIXED: 3494 break; 3495 3496 case MLO_AN_PHY: 3497 return -EOPNOTSUPP; 3498 3499 case MLO_AN_INBAND: 3500 break; 3501 } 3502 3503 return 0; 3504 } 3505 3506 /** 3507 * phylink_mii_ioctl() - generic mii ioctl interface 3508 * @pl: a pointer to a &struct phylink returned from phylink_create() 3509 * @ifr: a pointer to a &struct ifreq for socket ioctls 3510 * @cmd: ioctl cmd to execute 3511 * 3512 * Perform the specified MII ioctl on the PHY attached to the phylink instance 3513 * specified by @pl. If no PHY is attached, emulate the presence of the PHY. 3514 * 3515 * Returns: zero on success or negative error code. 3516 * 3517 * %SIOCGMIIPHY: 3518 * read register from the current PHY. 3519 * %SIOCGMIIREG: 3520 * read register from the specified PHY. 3521 * %SIOCSMIIREG: 3522 * set a register on the specified PHY. 3523 */ 3524 int phylink_mii_ioctl(struct phylink *pl, struct ifreq *ifr, int cmd) 3525 { 3526 struct mii_ioctl_data *mii = if_mii(ifr); 3527 int ret; 3528 3529 ASSERT_RTNL(); 3530 3531 if (pl->phydev) { 3532 /* PHYs only exist for MLO_AN_PHY and SGMII */ 3533 switch (cmd) { 3534 case SIOCGMIIPHY: 3535 mii->phy_id = pl->phydev->mdio.addr; 3536 fallthrough; 3537 3538 case SIOCGMIIREG: 3539 ret = phylink_phy_read(pl, mii->phy_id, mii->reg_num); 3540 if (ret >= 0) { 3541 mii->val_out = ret; 3542 ret = 0; 3543 } 3544 break; 3545 3546 case SIOCSMIIREG: 3547 ret = phylink_phy_write(pl, mii->phy_id, mii->reg_num, 3548 mii->val_in); 3549 break; 3550 3551 default: 3552 ret = phy_mii_ioctl(pl->phydev, ifr, cmd); 3553 break; 3554 } 3555 } else { 3556 switch (cmd) { 3557 case SIOCGMIIPHY: 3558 mii->phy_id = 0; 3559 fallthrough; 3560 3561 case SIOCGMIIREG: 3562 ret = phylink_mii_read(pl, mii->phy_id, mii->reg_num); 3563 if (ret >= 0) { 3564 mii->val_out = ret; 3565 ret = 0; 3566 } 3567 break; 3568 3569 case SIOCSMIIREG: 3570 ret = phylink_mii_write(pl, mii->phy_id, mii->reg_num, 3571 mii->val_in); 3572 break; 3573 3574 default: 3575 ret = -EOPNOTSUPP; 3576 break; 3577 } 3578 } 3579 3580 return ret; 3581 } 3582 EXPORT_SYMBOL_GPL(phylink_mii_ioctl); 3583 3584 /** 3585 * phylink_speed_down() - set the non-SFP PHY to lowest speed supported by both 3586 * link partners 3587 * @pl: a pointer to a &struct phylink returned from phylink_create() 3588 * @sync: perform action synchronously 3589 * 3590 * If we have a PHY that is not part of a SFP module, then set the speed 3591 * as described in the phy_speed_down() function. Please see this function 3592 * for a description of the @sync parameter. 3593 * 3594 * Returns zero if there is no PHY, otherwise as per phy_speed_down(). 3595 */ 3596 int phylink_speed_down(struct phylink *pl, bool sync) 3597 { 3598 int ret = 0; 3599 3600 ASSERT_RTNL(); 3601 3602 if (!pl->sfp_bus && pl->phydev) 3603 ret = phy_speed_down(pl->phydev, sync); 3604 3605 return ret; 3606 } 3607 EXPORT_SYMBOL_GPL(phylink_speed_down); 3608 3609 /** 3610 * phylink_speed_up() - restore the advertised speeds prior to the call to 3611 * phylink_speed_down() 3612 * @pl: a pointer to a &struct phylink returned from phylink_create() 3613 * 3614 * If we have a PHY that is not part of a SFP module, then restore the 3615 * PHY speeds as per phy_speed_up(). 3616 * 3617 * Returns zero if there is no PHY, otherwise as per phy_speed_up(). 3618 */ 3619 int phylink_speed_up(struct phylink *pl) 3620 { 3621 int ret = 0; 3622 3623 ASSERT_RTNL(); 3624 3625 if (!pl->sfp_bus && pl->phydev) 3626 ret = phy_speed_up(pl->phydev); 3627 3628 return ret; 3629 } 3630 EXPORT_SYMBOL_GPL(phylink_speed_up); 3631 3632 static void phylink_sfp_attach(void *upstream, struct sfp_bus *bus) 3633 { 3634 struct phylink *pl = upstream; 3635 3636 pl->netdev->sfp_bus = bus; 3637 } 3638 3639 static void phylink_sfp_detach(void *upstream, struct sfp_bus *bus) 3640 { 3641 struct phylink *pl = upstream; 3642 3643 pl->netdev->sfp_bus = NULL; 3644 } 3645 3646 static phy_interface_t phylink_choose_sfp_interface(struct phylink *pl, 3647 const unsigned long *intf) 3648 { 3649 phy_interface_t interface; 3650 size_t i; 3651 3652 interface = PHY_INTERFACE_MODE_NA; 3653 for (i = 0; i < ARRAY_SIZE(phylink_sfp_interface_preference); i++) 3654 if (test_bit(phylink_sfp_interface_preference[i], intf)) { 3655 interface = phylink_sfp_interface_preference[i]; 3656 break; 3657 } 3658 3659 return interface; 3660 } 3661 3662 static void phylink_sfp_set_config(struct phylink *pl, unsigned long *supported, 3663 struct phylink_link_state *state, 3664 bool changed) 3665 { 3666 u8 mode = MLO_AN_INBAND; 3667 3668 phylink_dbg(pl, "requesting link mode %s/%s with support %*pb\n", 3669 phylink_an_mode_str(mode), phy_modes(state->interface), 3670 __ETHTOOL_LINK_MODE_MASK_NBITS, supported); 3671 3672 if (!linkmode_equal(pl->supported, supported)) { 3673 linkmode_copy(pl->supported, supported); 3674 changed = true; 3675 } 3676 3677 if (!linkmode_equal(pl->link_config.advertising, state->advertising)) { 3678 linkmode_copy(pl->link_config.advertising, state->advertising); 3679 changed = true; 3680 } 3681 3682 if (pl->req_link_an_mode != mode || 3683 pl->link_config.interface != state->interface) { 3684 pl->req_link_an_mode = mode; 3685 pl->link_config.interface = state->interface; 3686 3687 changed = true; 3688 3689 phylink_info(pl, "switched to %s/%s link mode\n", 3690 phylink_an_mode_str(mode), 3691 phy_modes(state->interface)); 3692 } 3693 3694 if (changed && !test_bit(PHYLINK_DISABLE_STOPPED, 3695 &pl->phylink_disable_state)) 3696 phylink_mac_initial_config(pl, false); 3697 } 3698 3699 static int phylink_sfp_config_phy(struct phylink *pl, struct phy_device *phy) 3700 { 3701 __ETHTOOL_DECLARE_LINK_MODE_MASK(support); 3702 struct phylink_link_state config; 3703 int ret; 3704 3705 /* We're not using pl->sfp_interfaces, so clear it. */ 3706 phy_interface_zero(pl->sfp_interfaces); 3707 linkmode_copy(support, phy->supported); 3708 3709 memset(&config, 0, sizeof(config)); 3710 linkmode_copy(config.advertising, phy->advertising); 3711 config.interface = PHY_INTERFACE_MODE_NA; 3712 config.speed = SPEED_UNKNOWN; 3713 config.duplex = DUPLEX_UNKNOWN; 3714 config.pause = MLO_PAUSE_AN; 3715 3716 /* Ignore errors if we're expecting a PHY to attach later */ 3717 ret = phylink_validate(pl, support, &config); 3718 if (ret) { 3719 phylink_err(pl, "validation with support %*pb failed: %pe\n", 3720 __ETHTOOL_LINK_MODE_MASK_NBITS, support, 3721 ERR_PTR(ret)); 3722 return ret; 3723 } 3724 3725 config.interface = phylink_sfp_select_interface(pl, config.advertising); 3726 if (config.interface == PHY_INTERFACE_MODE_NA) 3727 return -EINVAL; 3728 3729 /* Attach the PHY so that the PHY is present when we do the major 3730 * configuration step. 3731 */ 3732 ret = phylink_attach_phy(pl, phy, config.interface); 3733 if (ret < 0) 3734 return ret; 3735 3736 /* This will validate the configuration for us. */ 3737 ret = phylink_bringup_phy(pl, phy, config.interface); 3738 if (ret < 0) { 3739 phy_detach(phy); 3740 return ret; 3741 } 3742 3743 pl->link_port = pl->sfp_port; 3744 3745 phylink_sfp_set_config(pl, support, &config, true); 3746 3747 return 0; 3748 } 3749 3750 static int phylink_sfp_config_optical(struct phylink *pl) 3751 { 3752 __ETHTOOL_DECLARE_LINK_MODE_MASK(support); 3753 struct phylink_link_state config; 3754 enum inband_type inband_type; 3755 phy_interface_t interface; 3756 int ret; 3757 3758 phylink_dbg(pl, "optical SFP: interfaces=[mac=%*pbl, sfp=%*pbl]\n", 3759 (int)PHY_INTERFACE_MODE_MAX, 3760 pl->config->supported_interfaces, 3761 (int)PHY_INTERFACE_MODE_MAX, 3762 pl->sfp_interfaces); 3763 3764 /* Find the union of the supported interfaces by the PCS/MAC and 3765 * the SFP module. 3766 */ 3767 phy_interface_and(pl->sfp_interfaces, pl->config->supported_interfaces, 3768 pl->sfp_interfaces); 3769 if (phy_interface_empty(pl->sfp_interfaces)) { 3770 phylink_err(pl, "unsupported SFP module: no common interface modes\n"); 3771 return -EINVAL; 3772 } 3773 3774 memset(&config, 0, sizeof(config)); 3775 linkmode_copy(support, pl->sfp_support); 3776 linkmode_copy(config.advertising, pl->sfp_support); 3777 config.speed = SPEED_UNKNOWN; 3778 config.duplex = DUPLEX_UNKNOWN; 3779 config.pause = MLO_PAUSE_AN; 3780 3781 /* For all the interfaces that are supported, reduce the sfp_support 3782 * mask to only those link modes that can be supported. 3783 */ 3784 ret = phylink_validate_mask(pl, NULL, pl->sfp_support, &config, 3785 pl->sfp_interfaces); 3786 if (ret) { 3787 phylink_err(pl, "unsupported SFP module: validation with support %*pb failed\n", 3788 __ETHTOOL_LINK_MODE_MASK_NBITS, support); 3789 return ret; 3790 } 3791 3792 interface = phylink_choose_sfp_interface(pl, pl->sfp_interfaces); 3793 if (interface == PHY_INTERFACE_MODE_NA) { 3794 phylink_err(pl, "failed to select SFP interface\n"); 3795 return -EINVAL; 3796 } 3797 3798 phylink_dbg(pl, "optical SFP: chosen %s interface\n", 3799 phy_modes(interface)); 3800 3801 inband_type = phylink_get_inband_type(interface); 3802 if (inband_type == INBAND_NONE) { 3803 /* If this is the sole interface, and there is no inband 3804 * support, clear the advertising mask and Autoneg bit in 3805 * the support mask. Otherwise, just clear the Autoneg bit 3806 * in the advertising mask. 3807 */ 3808 if (phy_interface_weight(pl->sfp_interfaces) == 1) { 3809 linkmode_clear_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, 3810 pl->sfp_support); 3811 linkmode_zero(config.advertising); 3812 } else { 3813 linkmode_clear_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, 3814 config.advertising); 3815 } 3816 } 3817 3818 if (!phylink_validate_pcs_inband_autoneg(pl, interface, 3819 config.advertising)) { 3820 phylink_err(pl, "autoneg setting not compatible with PCS"); 3821 return -EINVAL; 3822 } 3823 3824 config.interface = interface; 3825 3826 /* Ignore errors if we're expecting a PHY to attach later */ 3827 ret = phylink_validate(pl, support, &config); 3828 if (ret) { 3829 phylink_err(pl, "validation with support %*pb failed: %pe\n", 3830 __ETHTOOL_LINK_MODE_MASK_NBITS, support, 3831 ERR_PTR(ret)); 3832 return ret; 3833 } 3834 3835 pl->link_port = pl->sfp_port; 3836 3837 phylink_sfp_set_config(pl, pl->sfp_support, &config, false); 3838 3839 return 0; 3840 } 3841 3842 static int phylink_sfp_module_insert(void *upstream, 3843 const struct sfp_eeprom_id *id) 3844 { 3845 const struct sfp_module_caps *caps; 3846 struct phylink *pl = upstream; 3847 3848 ASSERT_RTNL(); 3849 3850 caps = sfp_get_module_caps(pl->sfp_bus); 3851 phy_interface_copy(pl->sfp_interfaces, caps->interfaces); 3852 linkmode_copy(pl->sfp_support, caps->link_modes); 3853 pl->sfp_may_have_phy = caps->may_have_phy; 3854 pl->sfp_port = caps->port; 3855 3856 /* If this module may have a PHY connecting later, defer until later */ 3857 if (pl->sfp_may_have_phy) 3858 return 0; 3859 3860 return phylink_sfp_config_optical(pl); 3861 } 3862 3863 static void phylink_sfp_module_remove(void *upstream) 3864 { 3865 struct phylink *pl = upstream; 3866 3867 phy_interface_zero(pl->sfp_interfaces); 3868 } 3869 3870 static int phylink_sfp_module_start(void *upstream) 3871 { 3872 struct phylink *pl = upstream; 3873 3874 /* If this SFP module has a PHY, start the PHY now. */ 3875 if (pl->phydev) { 3876 phy_start(pl->phydev); 3877 return 0; 3878 } 3879 3880 /* If the module may have a PHY but we didn't detect one we 3881 * need to configure the MAC here. 3882 */ 3883 if (!pl->sfp_may_have_phy) 3884 return 0; 3885 3886 return phylink_sfp_config_optical(pl); 3887 } 3888 3889 static void phylink_sfp_module_stop(void *upstream) 3890 { 3891 struct phylink *pl = upstream; 3892 3893 /* If this SFP module has a PHY, stop it. */ 3894 if (pl->phydev) 3895 phy_stop(pl->phydev); 3896 } 3897 3898 static void phylink_sfp_link_down(void *upstream) 3899 { 3900 struct phylink *pl = upstream; 3901 3902 ASSERT_RTNL(); 3903 3904 phylink_run_resolve_and_disable(pl, PHYLINK_DISABLE_LINK); 3905 } 3906 3907 static void phylink_sfp_link_up(void *upstream) 3908 { 3909 struct phylink *pl = upstream; 3910 3911 ASSERT_RTNL(); 3912 3913 phylink_enable_and_run_resolve(pl, PHYLINK_DISABLE_LINK); 3914 } 3915 3916 static int phylink_sfp_connect_phy(void *upstream, struct phy_device *phy) 3917 { 3918 struct phylink *pl = upstream; 3919 3920 if (!phy->drv) { 3921 phylink_err(pl, "PHY %s (id 0x%.8lx) has no driver loaded\n", 3922 phydev_name(phy), (unsigned long)phy->phy_id); 3923 phylink_err(pl, "Drivers which handle known common cases: CONFIG_BCM84881_PHY, CONFIG_MARVELL_PHY\n"); 3924 return -EINVAL; 3925 } 3926 3927 /* 3928 * This is the new way of dealing with flow control for PHYs, 3929 * as described by Timur Tabi in commit 529ed1275263 ("net: phy: 3930 * phy drivers should not set SUPPORTED_[Asym_]Pause"). MAC drivers 3931 * set their support using the MAC_SYM_PAUSE and MAC_ASYM_PAUSE 3932 * capabilities and must NOT change the phy's pause settings directly. 3933 */ 3934 phy_support_asym_pause(phy); 3935 3936 /* Set the PHY's host supported interfaces */ 3937 phy_interface_and(phy->host_interfaces, phylink_sfp_interfaces, 3938 pl->config->supported_interfaces); 3939 3940 /* Do the initial configuration */ 3941 return phylink_sfp_config_phy(pl, phy); 3942 } 3943 3944 static void phylink_sfp_disconnect_phy(void *upstream, 3945 struct phy_device *phydev) 3946 { 3947 phylink_disconnect_phy(upstream); 3948 } 3949 3950 static const struct sfp_upstream_ops sfp_phylink_ops = { 3951 .attach = phylink_sfp_attach, 3952 .detach = phylink_sfp_detach, 3953 .module_insert = phylink_sfp_module_insert, 3954 .module_remove = phylink_sfp_module_remove, 3955 .module_start = phylink_sfp_module_start, 3956 .module_stop = phylink_sfp_module_stop, 3957 .link_up = phylink_sfp_link_up, 3958 .link_down = phylink_sfp_link_down, 3959 .connect_phy = phylink_sfp_connect_phy, 3960 .disconnect_phy = phylink_sfp_disconnect_phy, 3961 }; 3962 3963 /* Helpers for MAC drivers */ 3964 3965 static struct { 3966 int bit; 3967 int speed; 3968 } phylink_c73_priority_resolution[] = { 3969 { ETHTOOL_LINK_MODE_100000baseCR4_Full_BIT, SPEED_100000 }, 3970 { ETHTOOL_LINK_MODE_100000baseKR4_Full_BIT, SPEED_100000 }, 3971 /* 100GBASE-KP4 and 100GBASE-CR10 not supported */ 3972 { ETHTOOL_LINK_MODE_40000baseCR4_Full_BIT, SPEED_40000 }, 3973 { ETHTOOL_LINK_MODE_40000baseKR4_Full_BIT, SPEED_40000 }, 3974 { ETHTOOL_LINK_MODE_10000baseKR_Full_BIT, SPEED_10000 }, 3975 { ETHTOOL_LINK_MODE_10000baseKX4_Full_BIT, SPEED_10000 }, 3976 /* 5GBASE-KR not supported */ 3977 { ETHTOOL_LINK_MODE_2500baseX_Full_BIT, SPEED_2500 }, 3978 { ETHTOOL_LINK_MODE_1000baseKX_Full_BIT, SPEED_1000 }, 3979 }; 3980 3981 void phylink_resolve_c73(struct phylink_link_state *state) 3982 { 3983 int i; 3984 3985 for (i = 0; i < ARRAY_SIZE(phylink_c73_priority_resolution); i++) { 3986 int bit = phylink_c73_priority_resolution[i].bit; 3987 if (linkmode_test_bit(bit, state->advertising) && 3988 linkmode_test_bit(bit, state->lp_advertising)) 3989 break; 3990 } 3991 3992 if (i < ARRAY_SIZE(phylink_c73_priority_resolution)) { 3993 state->speed = phylink_c73_priority_resolution[i].speed; 3994 state->duplex = DUPLEX_FULL; 3995 } else { 3996 /* negotiation failure */ 3997 state->link = false; 3998 } 3999 4000 phylink_resolve_an_pause(state); 4001 } 4002 EXPORT_SYMBOL_GPL(phylink_resolve_c73); 4003 4004 static void phylink_decode_c37_word(struct phylink_link_state *state, 4005 uint16_t config_reg, int speed) 4006 { 4007 int fd_bit; 4008 4009 if (speed == SPEED_2500) 4010 fd_bit = ETHTOOL_LINK_MODE_2500baseX_Full_BIT; 4011 else 4012 fd_bit = ETHTOOL_LINK_MODE_1000baseX_Full_BIT; 4013 4014 mii_lpa_mod_linkmode_x(state->lp_advertising, config_reg, fd_bit); 4015 4016 if (linkmode_test_bit(fd_bit, state->advertising) && 4017 linkmode_test_bit(fd_bit, state->lp_advertising)) { 4018 state->speed = speed; 4019 state->duplex = DUPLEX_FULL; 4020 } else { 4021 /* negotiation failure */ 4022 state->link = false; 4023 } 4024 4025 phylink_resolve_an_pause(state); 4026 } 4027 4028 static void phylink_decode_sgmii_word(struct phylink_link_state *state, 4029 uint16_t config_reg) 4030 { 4031 if (!(config_reg & LPA_SGMII_LINK)) { 4032 state->link = false; 4033 return; 4034 } 4035 4036 switch (config_reg & LPA_SGMII_SPD_MASK) { 4037 case LPA_SGMII_10: 4038 state->speed = SPEED_10; 4039 break; 4040 case LPA_SGMII_100: 4041 state->speed = SPEED_100; 4042 break; 4043 case LPA_SGMII_1000: 4044 state->speed = SPEED_1000; 4045 break; 4046 default: 4047 state->link = false; 4048 return; 4049 } 4050 if (config_reg & LPA_SGMII_FULL_DUPLEX) 4051 state->duplex = DUPLEX_FULL; 4052 else 4053 state->duplex = DUPLEX_HALF; 4054 } 4055 4056 /** 4057 * phylink_decode_usxgmii_word() - decode the USXGMII word from a MAC PCS 4058 * @state: a pointer to a struct phylink_link_state. 4059 * @lpa: a 16 bit value which stores the USXGMII auto-negotiation word 4060 * 4061 * Helper for MAC PCS supporting the USXGMII protocol and the auto-negotiation 4062 * code word. Decode the USXGMII code word and populate the corresponding fields 4063 * (speed, duplex) into the phylink_link_state structure. 4064 */ 4065 void phylink_decode_usxgmii_word(struct phylink_link_state *state, 4066 uint16_t lpa) 4067 { 4068 switch (lpa & MDIO_USXGMII_SPD_MASK) { 4069 case MDIO_USXGMII_10: 4070 state->speed = SPEED_10; 4071 break; 4072 case MDIO_USXGMII_100: 4073 state->speed = SPEED_100; 4074 break; 4075 case MDIO_USXGMII_1000: 4076 state->speed = SPEED_1000; 4077 break; 4078 case MDIO_USXGMII_2500: 4079 state->speed = SPEED_2500; 4080 break; 4081 case MDIO_USXGMII_5000: 4082 state->speed = SPEED_5000; 4083 break; 4084 case MDIO_USXGMII_10G: 4085 state->speed = SPEED_10000; 4086 break; 4087 default: 4088 state->link = false; 4089 return; 4090 } 4091 4092 if (lpa & MDIO_USXGMII_FULL_DUPLEX) 4093 state->duplex = DUPLEX_FULL; 4094 else 4095 state->duplex = DUPLEX_HALF; 4096 } 4097 EXPORT_SYMBOL_GPL(phylink_decode_usxgmii_word); 4098 4099 /** 4100 * phylink_decode_usgmii_word() - decode the USGMII word from a MAC PCS 4101 * @state: a pointer to a struct phylink_link_state. 4102 * @lpa: a 16 bit value which stores the USGMII auto-negotiation word 4103 * 4104 * Helper for MAC PCS supporting the USGMII protocol and the auto-negotiation 4105 * code word. Decode the USGMII code word and populate the corresponding fields 4106 * (speed, duplex) into the phylink_link_state structure. The structure for this 4107 * word is the same as the USXGMII word, except it only supports speeds up to 4108 * 1Gbps. 4109 */ 4110 static void phylink_decode_usgmii_word(struct phylink_link_state *state, 4111 uint16_t lpa) 4112 { 4113 switch (lpa & MDIO_USXGMII_SPD_MASK) { 4114 case MDIO_USXGMII_10: 4115 state->speed = SPEED_10; 4116 break; 4117 case MDIO_USXGMII_100: 4118 state->speed = SPEED_100; 4119 break; 4120 case MDIO_USXGMII_1000: 4121 state->speed = SPEED_1000; 4122 break; 4123 default: 4124 state->link = false; 4125 return; 4126 } 4127 4128 if (lpa & MDIO_USXGMII_FULL_DUPLEX) 4129 state->duplex = DUPLEX_FULL; 4130 else 4131 state->duplex = DUPLEX_HALF; 4132 } 4133 4134 /** 4135 * phylink_mii_c22_pcs_decode_state() - Decode MAC PCS state from MII registers 4136 * @state: a pointer to a &struct phylink_link_state. 4137 * @neg_mode: link negotiation mode (PHYLINK_PCS_NEG_xxx) 4138 * @bmsr: The value of the %MII_BMSR register 4139 * @lpa: The value of the %MII_LPA register 4140 * 4141 * Helper for MAC PCS supporting the 802.3 clause 22 register set for 4142 * clause 37 negotiation and/or SGMII control. 4143 * 4144 * Parse the Clause 37 or Cisco SGMII link partner negotiation word into 4145 * the phylink @state structure. This is suitable to be used for implementing 4146 * the pcs_get_state() member of the struct phylink_pcs_ops structure if 4147 * accessing @bmsr and @lpa cannot be done with MDIO directly. 4148 */ 4149 void phylink_mii_c22_pcs_decode_state(struct phylink_link_state *state, 4150 unsigned int neg_mode, u16 bmsr, u16 lpa) 4151 { 4152 state->link = !!(bmsr & BMSR_LSTATUS); 4153 state->an_complete = !!(bmsr & BMSR_ANEGCOMPLETE); 4154 4155 /* If the link is down, the advertisement data is undefined. */ 4156 if (!state->link) 4157 return; 4158 4159 switch (state->interface) { 4160 case PHY_INTERFACE_MODE_1000BASEX: 4161 if (neg_mode == PHYLINK_PCS_NEG_INBAND_ENABLED) { 4162 phylink_decode_c37_word(state, lpa, SPEED_1000); 4163 } else { 4164 state->speed = SPEED_1000; 4165 state->duplex = DUPLEX_FULL; 4166 state->pause |= MLO_PAUSE_TX | MLO_PAUSE_RX; 4167 } 4168 break; 4169 4170 case PHY_INTERFACE_MODE_2500BASEX: 4171 if (neg_mode == PHYLINK_PCS_NEG_INBAND_ENABLED) { 4172 phylink_decode_c37_word(state, lpa, SPEED_2500); 4173 } else { 4174 state->speed = SPEED_2500; 4175 state->duplex = DUPLEX_FULL; 4176 state->pause |= MLO_PAUSE_TX | MLO_PAUSE_RX; 4177 } 4178 break; 4179 4180 case PHY_INTERFACE_MODE_SGMII: 4181 case PHY_INTERFACE_MODE_QSGMII: 4182 if (neg_mode == PHYLINK_PCS_NEG_INBAND_ENABLED) 4183 phylink_decode_sgmii_word(state, lpa); 4184 break; 4185 4186 case PHY_INTERFACE_MODE_QUSGMII: 4187 if (neg_mode == PHYLINK_PCS_NEG_INBAND_ENABLED) 4188 phylink_decode_usgmii_word(state, lpa); 4189 break; 4190 4191 default: 4192 state->link = false; 4193 break; 4194 } 4195 } 4196 EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_decode_state); 4197 4198 /** 4199 * phylink_mii_c22_pcs_get_state() - read the MAC PCS state 4200 * @pcs: a pointer to a &struct mdio_device. 4201 * @neg_mode: link negotiation mode (PHYLINK_PCS_NEG_xxx) 4202 * @state: a pointer to a &struct phylink_link_state. 4203 * 4204 * Helper for MAC PCS supporting the 802.3 clause 22 register set for 4205 * clause 37 negotiation and/or SGMII control. 4206 * 4207 * Read the MAC PCS state from the MII device configured in @config and 4208 * parse the Clause 37 or Cisco SGMII link partner negotiation word into 4209 * the phylink @state structure. This is suitable to be directly plugged 4210 * into the pcs_get_state() member of the struct phylink_pcs_ops 4211 * structure. 4212 */ 4213 void phylink_mii_c22_pcs_get_state(struct mdio_device *pcs, 4214 unsigned int neg_mode, 4215 struct phylink_link_state *state) 4216 { 4217 int bmsr, lpa; 4218 4219 bmsr = mdiodev_read(pcs, MII_BMSR); 4220 lpa = mdiodev_read(pcs, MII_LPA); 4221 if (bmsr < 0 || lpa < 0) { 4222 state->link = false; 4223 return; 4224 } 4225 4226 phylink_mii_c22_pcs_decode_state(state, neg_mode, bmsr, lpa); 4227 } 4228 EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_get_state); 4229 4230 /** 4231 * phylink_mii_c22_pcs_encode_advertisement() - configure the clause 37 PCS 4232 * advertisement 4233 * @interface: the PHY interface mode being configured 4234 * @advertising: the ethtool advertisement mask 4235 * 4236 * Helper for MAC PCS supporting the 802.3 clause 22 register set for 4237 * clause 37 negotiation and/or SGMII control. 4238 * 4239 * Encode the clause 37 PCS advertisement as specified by @interface and 4240 * @advertising. 4241 * 4242 * Return: The new value for @adv, or ``-EINVAL`` if it should not be changed. 4243 */ 4244 int phylink_mii_c22_pcs_encode_advertisement(phy_interface_t interface, 4245 const unsigned long *advertising) 4246 { 4247 u16 adv; 4248 4249 switch (interface) { 4250 case PHY_INTERFACE_MODE_1000BASEX: 4251 case PHY_INTERFACE_MODE_2500BASEX: 4252 adv = ADVERTISE_1000XFULL; 4253 if (linkmode_test_bit(ETHTOOL_LINK_MODE_Pause_BIT, 4254 advertising)) 4255 adv |= ADVERTISE_1000XPAUSE; 4256 if (linkmode_test_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, 4257 advertising)) 4258 adv |= ADVERTISE_1000XPSE_ASYM; 4259 return adv; 4260 case PHY_INTERFACE_MODE_SGMII: 4261 case PHY_INTERFACE_MODE_QSGMII: 4262 return 0x0001; 4263 default: 4264 /* Nothing to do for other modes */ 4265 return -EINVAL; 4266 } 4267 } 4268 EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_encode_advertisement); 4269 4270 /** 4271 * phylink_mii_c22_pcs_config() - configure clause 22 PCS 4272 * @pcs: a pointer to a &struct mdio_device. 4273 * @interface: the PHY interface mode being configured 4274 * @advertising: the ethtool advertisement mask 4275 * @neg_mode: PCS negotiation mode 4276 * 4277 * Configure a Clause 22 PCS PHY with the appropriate negotiation 4278 * parameters for the @mode, @interface and @advertising parameters. 4279 * Returns negative error number on failure, zero if the advertisement 4280 * has not changed, or positive if there is a change. 4281 */ 4282 int phylink_mii_c22_pcs_config(struct mdio_device *pcs, 4283 phy_interface_t interface, 4284 const unsigned long *advertising, 4285 unsigned int neg_mode) 4286 { 4287 bool changed = 0; 4288 u16 bmcr; 4289 int ret, adv; 4290 4291 adv = phylink_mii_c22_pcs_encode_advertisement(interface, advertising); 4292 if (adv >= 0) { 4293 ret = mdiobus_modify_changed(pcs->bus, pcs->addr, 4294 MII_ADVERTISE, 0xffff, adv); 4295 if (ret < 0) 4296 return ret; 4297 changed = ret; 4298 } 4299 4300 if (neg_mode == PHYLINK_PCS_NEG_INBAND_ENABLED) 4301 bmcr = BMCR_ANENABLE; 4302 else 4303 bmcr = 0; 4304 4305 /* Configure the inband state. Ensure ISOLATE bit is disabled */ 4306 ret = mdiodev_modify(pcs, MII_BMCR, BMCR_ANENABLE | BMCR_ISOLATE, bmcr); 4307 if (ret < 0) 4308 return ret; 4309 4310 return changed; 4311 } 4312 EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_config); 4313 4314 /** 4315 * phylink_mii_c22_pcs_an_restart() - restart 802.3z autonegotiation 4316 * @pcs: a pointer to a &struct mdio_device. 4317 * 4318 * Helper for MAC PCS supporting the 802.3 clause 22 register set for 4319 * clause 37 negotiation. 4320 * 4321 * Restart the clause 37 negotiation with the link partner. This is 4322 * suitable to be directly plugged into the pcs_get_state() member 4323 * of the struct phylink_pcs_ops structure. 4324 */ 4325 void phylink_mii_c22_pcs_an_restart(struct mdio_device *pcs) 4326 { 4327 int val = mdiodev_read(pcs, MII_BMCR); 4328 4329 if (val >= 0) { 4330 val |= BMCR_ANRESTART; 4331 4332 mdiodev_write(pcs, MII_BMCR, val); 4333 } 4334 } 4335 EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_an_restart); 4336 4337 void phylink_mii_c45_pcs_get_state(struct mdio_device *pcs, 4338 struct phylink_link_state *state) 4339 { 4340 struct mii_bus *bus = pcs->bus; 4341 int addr = pcs->addr; 4342 int stat; 4343 4344 stat = mdiobus_c45_read(bus, addr, MDIO_MMD_PCS, MDIO_STAT1); 4345 if (stat < 0) { 4346 state->link = false; 4347 return; 4348 } 4349 4350 state->link = !!(stat & MDIO_STAT1_LSTATUS); 4351 if (!state->link) 4352 return; 4353 4354 switch (state->interface) { 4355 case PHY_INTERFACE_MODE_10GBASER: 4356 state->speed = SPEED_10000; 4357 state->duplex = DUPLEX_FULL; 4358 break; 4359 4360 default: 4361 break; 4362 } 4363 } 4364 EXPORT_SYMBOL_GPL(phylink_mii_c45_pcs_get_state); 4365 4366 /** 4367 * phylink_replay_link_begin() - begin replay of link callbacks for driver 4368 * which loses state 4369 * @pl: a pointer to a &struct phylink returned from phylink_create() 4370 * 4371 * Helper for MAC drivers which may perform a destructive reset at runtime. 4372 * Both the own driver's mac_link_down() method is called, as well as the 4373 * pcs_link_down() method of the split PCS (if any). 4374 * 4375 * This is similar to phylink_stop(), except it does not alter the state of 4376 * the phylib PHY (it is assumed that it is not affected by the MAC destructive 4377 * reset). 4378 */ 4379 void phylink_replay_link_begin(struct phylink *pl) 4380 { 4381 ASSERT_RTNL(); 4382 4383 phylink_run_resolve_and_disable(pl, PHYLINK_DISABLE_REPLAY); 4384 } 4385 EXPORT_SYMBOL_GPL(phylink_replay_link_begin); 4386 4387 /** 4388 * phylink_replay_link_end() - end replay of link callbacks for driver 4389 * which lost state 4390 * @pl: a pointer to a &struct phylink returned from phylink_create() 4391 * 4392 * Helper for MAC drivers which may perform a destructive reset at runtime. 4393 * Both the own driver's mac_config() and mac_link_up() methods, as well as the 4394 * pcs_config() and pcs_link_up() method of the split PCS (if any), are called. 4395 * 4396 * This is similar to phylink_start(), except it does not alter the state of 4397 * the phylib PHY. 4398 * 4399 * One must call this method only within the same rtnl_lock() critical section 4400 * as a previous phylink_replay_link_start(). 4401 */ 4402 void phylink_replay_link_end(struct phylink *pl) 4403 { 4404 ASSERT_RTNL(); 4405 4406 if (WARN(!test_bit(PHYLINK_DISABLE_REPLAY, 4407 &pl->phylink_disable_state), 4408 "phylink_replay_link_end() called without a prior phylink_replay_link_begin()\n")) 4409 return; 4410 4411 pl->force_major_config = true; 4412 phylink_enable_and_run_resolve(pl, PHYLINK_DISABLE_REPLAY); 4413 flush_work(&pl->resolve); 4414 } 4415 EXPORT_SYMBOL_GPL(phylink_replay_link_end); 4416 4417 static int __init phylink_init(void) 4418 { 4419 for (int i = 0; i < ARRAY_SIZE(phylink_sfp_interface_preference); ++i) 4420 __set_bit(phylink_sfp_interface_preference[i], 4421 phylink_sfp_interfaces); 4422 4423 return 0; 4424 } 4425 4426 module_init(phylink_init); 4427 4428 MODULE_LICENSE("GPL v2"); 4429 MODULE_DESCRIPTION("phylink models the MAC to optional PHY connection"); 4430