1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * phylink models the MAC to optional PHY connection, supporting 4 * technologies such as SFP cages where the PHY is hot-pluggable. 5 * 6 * Copyright (C) 2015 Russell King 7 */ 8 #include <linux/acpi.h> 9 #include <linux/ethtool.h> 10 #include <linux/export.h> 11 #include <linux/gpio/consumer.h> 12 #include <linux/netdevice.h> 13 #include <linux/of.h> 14 #include <linux/of_mdio.h> 15 #include <linux/phy.h> 16 #include <linux/phy_fixed.h> 17 #include <linux/phylink.h> 18 #include <linux/rtnetlink.h> 19 #include <linux/spinlock.h> 20 #include <linux/timer.h> 21 #include <linux/workqueue.h> 22 23 #include "sfp.h" 24 #include "swphy.h" 25 26 #define SUPPORTED_INTERFACES \ 27 (SUPPORTED_TP | SUPPORTED_MII | SUPPORTED_FIBRE | \ 28 SUPPORTED_BNC | SUPPORTED_AUI | SUPPORTED_Backplane) 29 #define ADVERTISED_INTERFACES \ 30 (ADVERTISED_TP | ADVERTISED_MII | ADVERTISED_FIBRE | \ 31 ADVERTISED_BNC | ADVERTISED_AUI | ADVERTISED_Backplane) 32 33 enum { 34 PHYLINK_DISABLE_STOPPED, 35 PHYLINK_DISABLE_LINK, 36 PHYLINK_DISABLE_MAC_WOL, 37 38 PCS_STATE_DOWN = 0, 39 PCS_STATE_STARTING, 40 PCS_STATE_STARTED, 41 }; 42 43 /** 44 * struct phylink - internal data type for phylink 45 */ 46 struct phylink { 47 /* private: */ 48 struct net_device *netdev; 49 const struct phylink_mac_ops *mac_ops; 50 struct phylink_config *config; 51 struct phylink_pcs *pcs; 52 struct device *dev; 53 unsigned int old_link_state:1; 54 55 unsigned long phylink_disable_state; /* bitmask of disables */ 56 struct phy_device *phydev; 57 phy_interface_t link_interface; /* PHY_INTERFACE_xxx */ 58 u8 cfg_link_an_mode; /* MLO_AN_xxx */ 59 u8 cur_link_an_mode; 60 u8 link_port; /* The current non-phy ethtool port */ 61 __ETHTOOL_DECLARE_LINK_MODE_MASK(supported); 62 63 /* The link configuration settings */ 64 struct phylink_link_state link_config; 65 66 /* The current settings */ 67 phy_interface_t cur_interface; 68 69 struct gpio_desc *link_gpio; 70 unsigned int link_irq; 71 struct timer_list link_poll; 72 void (*get_fixed_state)(struct net_device *dev, 73 struct phylink_link_state *s); 74 75 struct mutex state_mutex; 76 struct phylink_link_state phy_state; 77 struct work_struct resolve; 78 unsigned int pcs_neg_mode; 79 unsigned int pcs_state; 80 81 bool mac_link_dropped; 82 bool using_mac_select_pcs; 83 84 struct sfp_bus *sfp_bus; 85 bool sfp_may_have_phy; 86 DECLARE_PHY_INTERFACE_MASK(sfp_interfaces); 87 __ETHTOOL_DECLARE_LINK_MODE_MASK(sfp_support); 88 u8 sfp_port; 89 }; 90 91 #define phylink_printk(level, pl, fmt, ...) \ 92 do { \ 93 if ((pl)->config->type == PHYLINK_NETDEV) \ 94 netdev_printk(level, (pl)->netdev, fmt, ##__VA_ARGS__); \ 95 else if ((pl)->config->type == PHYLINK_DEV) \ 96 dev_printk(level, (pl)->dev, fmt, ##__VA_ARGS__); \ 97 } while (0) 98 99 #define phylink_err(pl, fmt, ...) \ 100 phylink_printk(KERN_ERR, pl, fmt, ##__VA_ARGS__) 101 #define phylink_warn(pl, fmt, ...) \ 102 phylink_printk(KERN_WARNING, pl, fmt, ##__VA_ARGS__) 103 #define phylink_info(pl, fmt, ...) \ 104 phylink_printk(KERN_INFO, pl, fmt, ##__VA_ARGS__) 105 #if defined(CONFIG_DYNAMIC_DEBUG) 106 #define phylink_dbg(pl, fmt, ...) \ 107 do { \ 108 if ((pl)->config->type == PHYLINK_NETDEV) \ 109 netdev_dbg((pl)->netdev, fmt, ##__VA_ARGS__); \ 110 else if ((pl)->config->type == PHYLINK_DEV) \ 111 dev_dbg((pl)->dev, fmt, ##__VA_ARGS__); \ 112 } while (0) 113 #elif defined(DEBUG) 114 #define phylink_dbg(pl, fmt, ...) \ 115 phylink_printk(KERN_DEBUG, pl, fmt, ##__VA_ARGS__) 116 #else 117 #define phylink_dbg(pl, fmt, ...) \ 118 ({ \ 119 if (0) \ 120 phylink_printk(KERN_DEBUG, pl, fmt, ##__VA_ARGS__); \ 121 }) 122 #endif 123 124 static const phy_interface_t phylink_sfp_interface_preference[] = { 125 PHY_INTERFACE_MODE_25GBASER, 126 PHY_INTERFACE_MODE_USXGMII, 127 PHY_INTERFACE_MODE_10GBASER, 128 PHY_INTERFACE_MODE_5GBASER, 129 PHY_INTERFACE_MODE_2500BASEX, 130 PHY_INTERFACE_MODE_SGMII, 131 PHY_INTERFACE_MODE_1000BASEX, 132 PHY_INTERFACE_MODE_100BASEX, 133 }; 134 135 static DECLARE_PHY_INTERFACE_MASK(phylink_sfp_interfaces); 136 137 /** 138 * phylink_set_port_modes() - set the port type modes in the ethtool mask 139 * @mask: ethtool link mode mask 140 * 141 * Sets all the port type modes in the ethtool mask. MAC drivers should 142 * use this in their 'validate' callback. 143 */ 144 void phylink_set_port_modes(unsigned long *mask) 145 { 146 phylink_set(mask, TP); 147 phylink_set(mask, AUI); 148 phylink_set(mask, MII); 149 phylink_set(mask, FIBRE); 150 phylink_set(mask, BNC); 151 phylink_set(mask, Backplane); 152 } 153 EXPORT_SYMBOL_GPL(phylink_set_port_modes); 154 155 static int phylink_is_empty_linkmode(const unsigned long *linkmode) 156 { 157 __ETHTOOL_DECLARE_LINK_MODE_MASK(tmp) = { 0, }; 158 159 phylink_set_port_modes(tmp); 160 phylink_set(tmp, Autoneg); 161 phylink_set(tmp, Pause); 162 phylink_set(tmp, Asym_Pause); 163 164 return linkmode_subset(linkmode, tmp); 165 } 166 167 static const char *phylink_an_mode_str(unsigned int mode) 168 { 169 static const char *modestr[] = { 170 [MLO_AN_PHY] = "phy", 171 [MLO_AN_FIXED] = "fixed", 172 [MLO_AN_INBAND] = "inband", 173 }; 174 175 return mode < ARRAY_SIZE(modestr) ? modestr[mode] : "unknown"; 176 } 177 178 static unsigned int phylink_interface_signal_rate(phy_interface_t interface) 179 { 180 switch (interface) { 181 case PHY_INTERFACE_MODE_SGMII: 182 case PHY_INTERFACE_MODE_1000BASEX: /* 1.25Mbd */ 183 return 1250; 184 case PHY_INTERFACE_MODE_2500BASEX: /* 3.125Mbd */ 185 return 3125; 186 case PHY_INTERFACE_MODE_5GBASER: /* 5.15625Mbd */ 187 return 5156; 188 case PHY_INTERFACE_MODE_10GBASER: /* 10.3125Mbd */ 189 return 10313; 190 default: 191 return 0; 192 } 193 } 194 195 /** 196 * phylink_interface_max_speed() - get the maximum speed of a phy interface 197 * @interface: phy interface mode defined by &typedef phy_interface_t 198 * 199 * Determine the maximum speed of a phy interface. This is intended to help 200 * determine the correct speed to pass to the MAC when the phy is performing 201 * rate matching. 202 * 203 * Return: The maximum speed of @interface 204 */ 205 static int phylink_interface_max_speed(phy_interface_t interface) 206 { 207 switch (interface) { 208 case PHY_INTERFACE_MODE_100BASEX: 209 case PHY_INTERFACE_MODE_REVRMII: 210 case PHY_INTERFACE_MODE_RMII: 211 case PHY_INTERFACE_MODE_SMII: 212 case PHY_INTERFACE_MODE_REVMII: 213 case PHY_INTERFACE_MODE_MII: 214 return SPEED_100; 215 216 case PHY_INTERFACE_MODE_TBI: 217 case PHY_INTERFACE_MODE_MOCA: 218 case PHY_INTERFACE_MODE_RTBI: 219 case PHY_INTERFACE_MODE_1000BASEX: 220 case PHY_INTERFACE_MODE_1000BASEKX: 221 case PHY_INTERFACE_MODE_TRGMII: 222 case PHY_INTERFACE_MODE_RGMII_TXID: 223 case PHY_INTERFACE_MODE_RGMII_RXID: 224 case PHY_INTERFACE_MODE_RGMII_ID: 225 case PHY_INTERFACE_MODE_RGMII: 226 case PHY_INTERFACE_MODE_PSGMII: 227 case PHY_INTERFACE_MODE_QSGMII: 228 case PHY_INTERFACE_MODE_QUSGMII: 229 case PHY_INTERFACE_MODE_SGMII: 230 case PHY_INTERFACE_MODE_GMII: 231 return SPEED_1000; 232 233 case PHY_INTERFACE_MODE_2500BASEX: 234 return SPEED_2500; 235 236 case PHY_INTERFACE_MODE_5GBASER: 237 return SPEED_5000; 238 239 case PHY_INTERFACE_MODE_XGMII: 240 case PHY_INTERFACE_MODE_RXAUI: 241 case PHY_INTERFACE_MODE_XAUI: 242 case PHY_INTERFACE_MODE_10GBASER: 243 case PHY_INTERFACE_MODE_10GKR: 244 case PHY_INTERFACE_MODE_USXGMII: 245 return SPEED_10000; 246 247 case PHY_INTERFACE_MODE_25GBASER: 248 return SPEED_25000; 249 250 case PHY_INTERFACE_MODE_XLGMII: 251 return SPEED_40000; 252 253 case PHY_INTERFACE_MODE_INTERNAL: 254 case PHY_INTERFACE_MODE_NA: 255 case PHY_INTERFACE_MODE_MAX: 256 /* No idea! Garbage in, unknown out */ 257 return SPEED_UNKNOWN; 258 } 259 260 /* If we get here, someone forgot to add an interface mode above */ 261 WARN_ON_ONCE(1); 262 return SPEED_UNKNOWN; 263 } 264 265 /** 266 * phylink_caps_to_linkmodes() - Convert capabilities to ethtool link modes 267 * @linkmodes: ethtool linkmode mask (must be already initialised) 268 * @caps: bitmask of MAC capabilities 269 * 270 * Set all possible pause, speed and duplex linkmodes in @linkmodes that are 271 * supported by the @caps. @linkmodes must have been initialised previously. 272 */ 273 static void phylink_caps_to_linkmodes(unsigned long *linkmodes, 274 unsigned long caps) 275 { 276 if (caps & MAC_SYM_PAUSE) 277 __set_bit(ETHTOOL_LINK_MODE_Pause_BIT, linkmodes); 278 279 if (caps & MAC_ASYM_PAUSE) 280 __set_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, linkmodes); 281 282 if (caps & MAC_10HD) { 283 __set_bit(ETHTOOL_LINK_MODE_10baseT_Half_BIT, linkmodes); 284 __set_bit(ETHTOOL_LINK_MODE_10baseT1S_Half_BIT, linkmodes); 285 __set_bit(ETHTOOL_LINK_MODE_10baseT1S_P2MP_Half_BIT, linkmodes); 286 } 287 288 if (caps & MAC_10FD) { 289 __set_bit(ETHTOOL_LINK_MODE_10baseT_Full_BIT, linkmodes); 290 __set_bit(ETHTOOL_LINK_MODE_10baseT1L_Full_BIT, linkmodes); 291 __set_bit(ETHTOOL_LINK_MODE_10baseT1S_Full_BIT, linkmodes); 292 } 293 294 if (caps & MAC_100HD) { 295 __set_bit(ETHTOOL_LINK_MODE_100baseT_Half_BIT, linkmodes); 296 __set_bit(ETHTOOL_LINK_MODE_100baseFX_Half_BIT, linkmodes); 297 } 298 299 if (caps & MAC_100FD) { 300 __set_bit(ETHTOOL_LINK_MODE_100baseT_Full_BIT, linkmodes); 301 __set_bit(ETHTOOL_LINK_MODE_100baseT1_Full_BIT, linkmodes); 302 __set_bit(ETHTOOL_LINK_MODE_100baseFX_Full_BIT, linkmodes); 303 } 304 305 if (caps & MAC_1000HD) 306 __set_bit(ETHTOOL_LINK_MODE_1000baseT_Half_BIT, linkmodes); 307 308 if (caps & MAC_1000FD) { 309 __set_bit(ETHTOOL_LINK_MODE_1000baseT_Full_BIT, linkmodes); 310 __set_bit(ETHTOOL_LINK_MODE_1000baseKX_Full_BIT, linkmodes); 311 __set_bit(ETHTOOL_LINK_MODE_1000baseX_Full_BIT, linkmodes); 312 __set_bit(ETHTOOL_LINK_MODE_1000baseT1_Full_BIT, linkmodes); 313 } 314 315 if (caps & MAC_2500FD) { 316 __set_bit(ETHTOOL_LINK_MODE_2500baseT_Full_BIT, linkmodes); 317 __set_bit(ETHTOOL_LINK_MODE_2500baseX_Full_BIT, linkmodes); 318 } 319 320 if (caps & MAC_5000FD) 321 __set_bit(ETHTOOL_LINK_MODE_5000baseT_Full_BIT, linkmodes); 322 323 if (caps & MAC_10000FD) { 324 __set_bit(ETHTOOL_LINK_MODE_10000baseT_Full_BIT, linkmodes); 325 __set_bit(ETHTOOL_LINK_MODE_10000baseKX4_Full_BIT, linkmodes); 326 __set_bit(ETHTOOL_LINK_MODE_10000baseKR_Full_BIT, linkmodes); 327 __set_bit(ETHTOOL_LINK_MODE_10000baseR_FEC_BIT, linkmodes); 328 __set_bit(ETHTOOL_LINK_MODE_10000baseCR_Full_BIT, linkmodes); 329 __set_bit(ETHTOOL_LINK_MODE_10000baseSR_Full_BIT, linkmodes); 330 __set_bit(ETHTOOL_LINK_MODE_10000baseLR_Full_BIT, linkmodes); 331 __set_bit(ETHTOOL_LINK_MODE_10000baseLRM_Full_BIT, linkmodes); 332 __set_bit(ETHTOOL_LINK_MODE_10000baseER_Full_BIT, linkmodes); 333 } 334 335 if (caps & MAC_25000FD) { 336 __set_bit(ETHTOOL_LINK_MODE_25000baseCR_Full_BIT, linkmodes); 337 __set_bit(ETHTOOL_LINK_MODE_25000baseKR_Full_BIT, linkmodes); 338 __set_bit(ETHTOOL_LINK_MODE_25000baseSR_Full_BIT, linkmodes); 339 } 340 341 if (caps & MAC_40000FD) { 342 __set_bit(ETHTOOL_LINK_MODE_40000baseKR4_Full_BIT, linkmodes); 343 __set_bit(ETHTOOL_LINK_MODE_40000baseCR4_Full_BIT, linkmodes); 344 __set_bit(ETHTOOL_LINK_MODE_40000baseSR4_Full_BIT, linkmodes); 345 __set_bit(ETHTOOL_LINK_MODE_40000baseLR4_Full_BIT, linkmodes); 346 } 347 348 if (caps & MAC_50000FD) { 349 __set_bit(ETHTOOL_LINK_MODE_50000baseCR2_Full_BIT, linkmodes); 350 __set_bit(ETHTOOL_LINK_MODE_50000baseKR2_Full_BIT, linkmodes); 351 __set_bit(ETHTOOL_LINK_MODE_50000baseSR2_Full_BIT, linkmodes); 352 __set_bit(ETHTOOL_LINK_MODE_50000baseKR_Full_BIT, linkmodes); 353 __set_bit(ETHTOOL_LINK_MODE_50000baseSR_Full_BIT, linkmodes); 354 __set_bit(ETHTOOL_LINK_MODE_50000baseCR_Full_BIT, linkmodes); 355 __set_bit(ETHTOOL_LINK_MODE_50000baseLR_ER_FR_Full_BIT, 356 linkmodes); 357 __set_bit(ETHTOOL_LINK_MODE_50000baseDR_Full_BIT, linkmodes); 358 } 359 360 if (caps & MAC_56000FD) { 361 __set_bit(ETHTOOL_LINK_MODE_56000baseKR4_Full_BIT, linkmodes); 362 __set_bit(ETHTOOL_LINK_MODE_56000baseCR4_Full_BIT, linkmodes); 363 __set_bit(ETHTOOL_LINK_MODE_56000baseSR4_Full_BIT, linkmodes); 364 __set_bit(ETHTOOL_LINK_MODE_56000baseLR4_Full_BIT, linkmodes); 365 } 366 367 if (caps & MAC_100000FD) { 368 __set_bit(ETHTOOL_LINK_MODE_100000baseKR4_Full_BIT, linkmodes); 369 __set_bit(ETHTOOL_LINK_MODE_100000baseSR4_Full_BIT, linkmodes); 370 __set_bit(ETHTOOL_LINK_MODE_100000baseCR4_Full_BIT, linkmodes); 371 __set_bit(ETHTOOL_LINK_MODE_100000baseLR4_ER4_Full_BIT, 372 linkmodes); 373 __set_bit(ETHTOOL_LINK_MODE_100000baseKR2_Full_BIT, linkmodes); 374 __set_bit(ETHTOOL_LINK_MODE_100000baseSR2_Full_BIT, linkmodes); 375 __set_bit(ETHTOOL_LINK_MODE_100000baseCR2_Full_BIT, linkmodes); 376 __set_bit(ETHTOOL_LINK_MODE_100000baseLR2_ER2_FR2_Full_BIT, 377 linkmodes); 378 __set_bit(ETHTOOL_LINK_MODE_100000baseDR2_Full_BIT, linkmodes); 379 __set_bit(ETHTOOL_LINK_MODE_100000baseKR_Full_BIT, linkmodes); 380 __set_bit(ETHTOOL_LINK_MODE_100000baseSR_Full_BIT, linkmodes); 381 __set_bit(ETHTOOL_LINK_MODE_100000baseLR_ER_FR_Full_BIT, 382 linkmodes); 383 __set_bit(ETHTOOL_LINK_MODE_100000baseCR_Full_BIT, linkmodes); 384 __set_bit(ETHTOOL_LINK_MODE_100000baseDR_Full_BIT, linkmodes); 385 } 386 387 if (caps & MAC_200000FD) { 388 __set_bit(ETHTOOL_LINK_MODE_200000baseKR4_Full_BIT, linkmodes); 389 __set_bit(ETHTOOL_LINK_MODE_200000baseSR4_Full_BIT, linkmodes); 390 __set_bit(ETHTOOL_LINK_MODE_200000baseLR4_ER4_FR4_Full_BIT, 391 linkmodes); 392 __set_bit(ETHTOOL_LINK_MODE_200000baseDR4_Full_BIT, linkmodes); 393 __set_bit(ETHTOOL_LINK_MODE_200000baseCR4_Full_BIT, linkmodes); 394 __set_bit(ETHTOOL_LINK_MODE_200000baseKR2_Full_BIT, linkmodes); 395 __set_bit(ETHTOOL_LINK_MODE_200000baseSR2_Full_BIT, linkmodes); 396 __set_bit(ETHTOOL_LINK_MODE_200000baseLR2_ER2_FR2_Full_BIT, 397 linkmodes); 398 __set_bit(ETHTOOL_LINK_MODE_200000baseDR2_Full_BIT, linkmodes); 399 __set_bit(ETHTOOL_LINK_MODE_200000baseCR2_Full_BIT, linkmodes); 400 } 401 402 if (caps & MAC_400000FD) { 403 __set_bit(ETHTOOL_LINK_MODE_400000baseKR8_Full_BIT, linkmodes); 404 __set_bit(ETHTOOL_LINK_MODE_400000baseSR8_Full_BIT, linkmodes); 405 __set_bit(ETHTOOL_LINK_MODE_400000baseLR8_ER8_FR8_Full_BIT, 406 linkmodes); 407 __set_bit(ETHTOOL_LINK_MODE_400000baseDR8_Full_BIT, linkmodes); 408 __set_bit(ETHTOOL_LINK_MODE_400000baseCR8_Full_BIT, linkmodes); 409 __set_bit(ETHTOOL_LINK_MODE_400000baseKR4_Full_BIT, linkmodes); 410 __set_bit(ETHTOOL_LINK_MODE_400000baseSR4_Full_BIT, linkmodes); 411 __set_bit(ETHTOOL_LINK_MODE_400000baseLR4_ER4_FR4_Full_BIT, 412 linkmodes); 413 __set_bit(ETHTOOL_LINK_MODE_400000baseDR4_Full_BIT, linkmodes); 414 __set_bit(ETHTOOL_LINK_MODE_400000baseCR4_Full_BIT, linkmodes); 415 } 416 } 417 418 static struct { 419 unsigned long mask; 420 int speed; 421 unsigned int duplex; 422 } phylink_caps_params[] = { 423 { MAC_400000FD, SPEED_400000, DUPLEX_FULL }, 424 { MAC_200000FD, SPEED_200000, DUPLEX_FULL }, 425 { MAC_100000FD, SPEED_100000, DUPLEX_FULL }, 426 { MAC_56000FD, SPEED_56000, DUPLEX_FULL }, 427 { MAC_50000FD, SPEED_50000, DUPLEX_FULL }, 428 { MAC_40000FD, SPEED_40000, DUPLEX_FULL }, 429 { MAC_25000FD, SPEED_25000, DUPLEX_FULL }, 430 { MAC_20000FD, SPEED_20000, DUPLEX_FULL }, 431 { MAC_10000FD, SPEED_10000, DUPLEX_FULL }, 432 { MAC_5000FD, SPEED_5000, DUPLEX_FULL }, 433 { MAC_2500FD, SPEED_2500, DUPLEX_FULL }, 434 { MAC_1000FD, SPEED_1000, DUPLEX_FULL }, 435 { MAC_1000HD, SPEED_1000, DUPLEX_HALF }, 436 { MAC_100FD, SPEED_100, DUPLEX_FULL }, 437 { MAC_100HD, SPEED_100, DUPLEX_HALF }, 438 { MAC_10FD, SPEED_10, DUPLEX_FULL }, 439 { MAC_10HD, SPEED_10, DUPLEX_HALF }, 440 }; 441 442 /** 443 * phylink_limit_mac_speed - limit the phylink_config to a maximum speed 444 * @config: pointer to a &struct phylink_config 445 * @max_speed: maximum speed 446 * 447 * Mask off MAC capabilities for speeds higher than the @max_speed parameter. 448 * Any further motifications of config.mac_capabilities will override this. 449 */ 450 void phylink_limit_mac_speed(struct phylink_config *config, u32 max_speed) 451 { 452 int i; 453 454 for (i = 0; i < ARRAY_SIZE(phylink_caps_params) && 455 phylink_caps_params[i].speed > max_speed; i++) 456 config->mac_capabilities &= ~phylink_caps_params[i].mask; 457 } 458 EXPORT_SYMBOL_GPL(phylink_limit_mac_speed); 459 460 /** 461 * phylink_cap_from_speed_duplex - Get mac capability from speed/duplex 462 * @speed: the speed to search for 463 * @duplex: the duplex to search for 464 * 465 * Find the mac capability for a given speed and duplex. 466 * 467 * Return: A mask with the mac capability patching @speed and @duplex, or 0 if 468 * there were no matches. 469 */ 470 static unsigned long phylink_cap_from_speed_duplex(int speed, 471 unsigned int duplex) 472 { 473 int i; 474 475 for (i = 0; i < ARRAY_SIZE(phylink_caps_params); i++) { 476 if (speed == phylink_caps_params[i].speed && 477 duplex == phylink_caps_params[i].duplex) 478 return phylink_caps_params[i].mask; 479 } 480 481 return 0; 482 } 483 484 /** 485 * phylink_get_capabilities() - get capabilities for a given MAC 486 * @interface: phy interface mode defined by &typedef phy_interface_t 487 * @mac_capabilities: bitmask of MAC capabilities 488 * @rate_matching: type of rate matching being performed 489 * 490 * Get the MAC capabilities that are supported by the @interface mode and 491 * @mac_capabilities. 492 */ 493 static unsigned long phylink_get_capabilities(phy_interface_t interface, 494 unsigned long mac_capabilities, 495 int rate_matching) 496 { 497 int max_speed = phylink_interface_max_speed(interface); 498 unsigned long caps = MAC_SYM_PAUSE | MAC_ASYM_PAUSE; 499 unsigned long matched_caps = 0; 500 501 switch (interface) { 502 case PHY_INTERFACE_MODE_USXGMII: 503 caps |= MAC_10000FD | MAC_5000FD | MAC_2500FD; 504 fallthrough; 505 506 case PHY_INTERFACE_MODE_RGMII_TXID: 507 case PHY_INTERFACE_MODE_RGMII_RXID: 508 case PHY_INTERFACE_MODE_RGMII_ID: 509 case PHY_INTERFACE_MODE_RGMII: 510 case PHY_INTERFACE_MODE_PSGMII: 511 case PHY_INTERFACE_MODE_QSGMII: 512 case PHY_INTERFACE_MODE_QUSGMII: 513 case PHY_INTERFACE_MODE_SGMII: 514 case PHY_INTERFACE_MODE_GMII: 515 caps |= MAC_1000HD | MAC_1000FD; 516 fallthrough; 517 518 case PHY_INTERFACE_MODE_REVRMII: 519 case PHY_INTERFACE_MODE_RMII: 520 case PHY_INTERFACE_MODE_SMII: 521 case PHY_INTERFACE_MODE_REVMII: 522 case PHY_INTERFACE_MODE_MII: 523 caps |= MAC_10HD | MAC_10FD; 524 fallthrough; 525 526 case PHY_INTERFACE_MODE_100BASEX: 527 caps |= MAC_100HD | MAC_100FD; 528 break; 529 530 case PHY_INTERFACE_MODE_TBI: 531 case PHY_INTERFACE_MODE_MOCA: 532 case PHY_INTERFACE_MODE_RTBI: 533 case PHY_INTERFACE_MODE_1000BASEX: 534 caps |= MAC_1000HD; 535 fallthrough; 536 case PHY_INTERFACE_MODE_1000BASEKX: 537 case PHY_INTERFACE_MODE_TRGMII: 538 caps |= MAC_1000FD; 539 break; 540 541 case PHY_INTERFACE_MODE_2500BASEX: 542 caps |= MAC_2500FD; 543 break; 544 545 case PHY_INTERFACE_MODE_5GBASER: 546 caps |= MAC_5000FD; 547 break; 548 549 case PHY_INTERFACE_MODE_XGMII: 550 case PHY_INTERFACE_MODE_RXAUI: 551 case PHY_INTERFACE_MODE_XAUI: 552 case PHY_INTERFACE_MODE_10GBASER: 553 case PHY_INTERFACE_MODE_10GKR: 554 caps |= MAC_10000FD; 555 break; 556 557 case PHY_INTERFACE_MODE_25GBASER: 558 caps |= MAC_25000FD; 559 break; 560 561 case PHY_INTERFACE_MODE_XLGMII: 562 caps |= MAC_40000FD; 563 break; 564 565 case PHY_INTERFACE_MODE_INTERNAL: 566 caps |= ~0; 567 break; 568 569 case PHY_INTERFACE_MODE_NA: 570 case PHY_INTERFACE_MODE_MAX: 571 break; 572 } 573 574 switch (rate_matching) { 575 case RATE_MATCH_OPEN_LOOP: 576 /* TODO */ 577 fallthrough; 578 case RATE_MATCH_NONE: 579 matched_caps = 0; 580 break; 581 case RATE_MATCH_PAUSE: { 582 /* The MAC must support asymmetric pause towards the local 583 * device for this. We could allow just symmetric pause, but 584 * then we might have to renegotiate if the link partner 585 * doesn't support pause. This is because there's no way to 586 * accept pause frames without transmitting them if we only 587 * support symmetric pause. 588 */ 589 if (!(mac_capabilities & MAC_SYM_PAUSE) || 590 !(mac_capabilities & MAC_ASYM_PAUSE)) 591 break; 592 593 /* We can't adapt if the MAC doesn't support the interface's 594 * max speed at full duplex. 595 */ 596 if (mac_capabilities & 597 phylink_cap_from_speed_duplex(max_speed, DUPLEX_FULL)) { 598 /* Although a duplex-matching phy might exist, we 599 * conservatively remove these modes because the MAC 600 * will not be aware of the half-duplex nature of the 601 * link. 602 */ 603 matched_caps = GENMASK(__fls(caps), __fls(MAC_10HD)); 604 matched_caps &= ~(MAC_1000HD | MAC_100HD | MAC_10HD); 605 } 606 break; 607 } 608 case RATE_MATCH_CRS: 609 /* The MAC must support half duplex at the interface's max 610 * speed. 611 */ 612 if (mac_capabilities & 613 phylink_cap_from_speed_duplex(max_speed, DUPLEX_HALF)) { 614 matched_caps = GENMASK(__fls(caps), __fls(MAC_10HD)); 615 matched_caps &= mac_capabilities; 616 } 617 break; 618 } 619 620 return (caps & mac_capabilities) | matched_caps; 621 } 622 623 /** 624 * phylink_validate_mask_caps() - Restrict link modes based on caps 625 * @supported: ethtool bitmask for supported link modes. 626 * @state: pointer to a &struct phylink_link_state. 627 * @mac_capabilities: bitmask of MAC capabilities 628 * 629 * Calculate the supported link modes based on @mac_capabilities, and restrict 630 * @supported and @state based on that. Use this function if your capabiliies 631 * aren't constant, such as if they vary depending on the interface. 632 */ 633 static void phylink_validate_mask_caps(unsigned long *supported, 634 struct phylink_link_state *state, 635 unsigned long mac_capabilities) 636 { 637 __ETHTOOL_DECLARE_LINK_MODE_MASK(mask) = { 0, }; 638 unsigned long caps; 639 640 phylink_set_port_modes(mask); 641 phylink_set(mask, Autoneg); 642 caps = phylink_get_capabilities(state->interface, mac_capabilities, 643 state->rate_matching); 644 phylink_caps_to_linkmodes(mask, caps); 645 646 linkmode_and(supported, supported, mask); 647 linkmode_and(state->advertising, state->advertising, mask); 648 } 649 650 static int phylink_validate_mac_and_pcs(struct phylink *pl, 651 unsigned long *supported, 652 struct phylink_link_state *state) 653 { 654 unsigned long capabilities; 655 struct phylink_pcs *pcs; 656 int ret; 657 658 /* Get the PCS for this interface mode */ 659 if (pl->using_mac_select_pcs) { 660 pcs = pl->mac_ops->mac_select_pcs(pl->config, state->interface); 661 if (IS_ERR(pcs)) 662 return PTR_ERR(pcs); 663 } else { 664 pcs = pl->pcs; 665 } 666 667 if (pcs) { 668 /* The PCS, if present, must be setup before phylink_create() 669 * has been called. If the ops is not initialised, print an 670 * error and backtrace rather than oopsing the kernel. 671 */ 672 if (!pcs->ops) { 673 phylink_err(pl, "interface %s: uninitialised PCS\n", 674 phy_modes(state->interface)); 675 dump_stack(); 676 return -EINVAL; 677 } 678 679 /* Validate the link parameters with the PCS */ 680 if (pcs->ops->pcs_validate) { 681 ret = pcs->ops->pcs_validate(pcs, supported, state); 682 if (ret < 0 || phylink_is_empty_linkmode(supported)) 683 return -EINVAL; 684 685 /* Ensure the advertising mask is a subset of the 686 * supported mask. 687 */ 688 linkmode_and(state->advertising, state->advertising, 689 supported); 690 } 691 } 692 693 /* Then validate the link parameters with the MAC */ 694 if (pl->mac_ops->mac_get_caps) 695 capabilities = pl->mac_ops->mac_get_caps(pl->config, 696 state->interface); 697 else 698 capabilities = pl->config->mac_capabilities; 699 700 phylink_validate_mask_caps(supported, state, capabilities); 701 702 return phylink_is_empty_linkmode(supported) ? -EINVAL : 0; 703 } 704 705 static void phylink_validate_one(struct phylink *pl, struct phy_device *phy, 706 const unsigned long *supported, 707 const struct phylink_link_state *state, 708 phy_interface_t interface, 709 unsigned long *accum_supported, 710 unsigned long *accum_advertising) 711 { 712 __ETHTOOL_DECLARE_LINK_MODE_MASK(tmp_supported); 713 struct phylink_link_state tmp_state; 714 715 linkmode_copy(tmp_supported, supported); 716 717 tmp_state = *state; 718 tmp_state.interface = interface; 719 720 if (phy) 721 tmp_state.rate_matching = phy_get_rate_matching(phy, interface); 722 723 if (!phylink_validate_mac_and_pcs(pl, tmp_supported, &tmp_state)) { 724 phylink_dbg(pl, " interface %u (%s) rate match %s supports %*pbl\n", 725 interface, phy_modes(interface), 726 phy_rate_matching_to_str(tmp_state.rate_matching), 727 __ETHTOOL_LINK_MODE_MASK_NBITS, tmp_supported); 728 729 linkmode_or(accum_supported, accum_supported, tmp_supported); 730 linkmode_or(accum_advertising, accum_advertising, 731 tmp_state.advertising); 732 } 733 } 734 735 static int phylink_validate_mask(struct phylink *pl, struct phy_device *phy, 736 unsigned long *supported, 737 struct phylink_link_state *state, 738 const unsigned long *interfaces) 739 { 740 __ETHTOOL_DECLARE_LINK_MODE_MASK(all_adv) = { 0, }; 741 __ETHTOOL_DECLARE_LINK_MODE_MASK(all_s) = { 0, }; 742 int interface; 743 744 for_each_set_bit(interface, interfaces, PHY_INTERFACE_MODE_MAX) 745 phylink_validate_one(pl, phy, supported, state, interface, 746 all_s, all_adv); 747 748 linkmode_copy(supported, all_s); 749 linkmode_copy(state->advertising, all_adv); 750 751 return phylink_is_empty_linkmode(supported) ? -EINVAL : 0; 752 } 753 754 static int phylink_validate(struct phylink *pl, unsigned long *supported, 755 struct phylink_link_state *state) 756 { 757 const unsigned long *interfaces = pl->config->supported_interfaces; 758 759 if (state->interface == PHY_INTERFACE_MODE_NA) 760 return phylink_validate_mask(pl, NULL, supported, state, 761 interfaces); 762 763 if (!test_bit(state->interface, interfaces)) 764 return -EINVAL; 765 766 return phylink_validate_mac_and_pcs(pl, supported, state); 767 } 768 769 static int phylink_parse_fixedlink(struct phylink *pl, 770 const struct fwnode_handle *fwnode) 771 { 772 struct fwnode_handle *fixed_node; 773 bool pause, asym_pause, autoneg; 774 const struct phy_setting *s; 775 struct gpio_desc *desc; 776 u32 speed; 777 int ret; 778 779 fixed_node = fwnode_get_named_child_node(fwnode, "fixed-link"); 780 if (fixed_node) { 781 ret = fwnode_property_read_u32(fixed_node, "speed", &speed); 782 783 pl->link_config.speed = speed; 784 pl->link_config.duplex = DUPLEX_HALF; 785 786 if (fwnode_property_read_bool(fixed_node, "full-duplex")) 787 pl->link_config.duplex = DUPLEX_FULL; 788 789 /* We treat the "pause" and "asym-pause" terminology as 790 * defining the link partner's ability. 791 */ 792 if (fwnode_property_read_bool(fixed_node, "pause")) 793 __set_bit(ETHTOOL_LINK_MODE_Pause_BIT, 794 pl->link_config.lp_advertising); 795 if (fwnode_property_read_bool(fixed_node, "asym-pause")) 796 __set_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, 797 pl->link_config.lp_advertising); 798 799 if (ret == 0) { 800 desc = fwnode_gpiod_get_index(fixed_node, "link", 0, 801 GPIOD_IN, "?"); 802 803 if (!IS_ERR(desc)) 804 pl->link_gpio = desc; 805 else if (desc == ERR_PTR(-EPROBE_DEFER)) 806 ret = -EPROBE_DEFER; 807 } 808 fwnode_handle_put(fixed_node); 809 810 if (ret) 811 return ret; 812 } else { 813 u32 prop[5]; 814 815 ret = fwnode_property_read_u32_array(fwnode, "fixed-link", 816 NULL, 0); 817 if (ret != ARRAY_SIZE(prop)) { 818 phylink_err(pl, "broken fixed-link?\n"); 819 return -EINVAL; 820 } 821 822 ret = fwnode_property_read_u32_array(fwnode, "fixed-link", 823 prop, ARRAY_SIZE(prop)); 824 if (!ret) { 825 pl->link_config.duplex = prop[1] ? 826 DUPLEX_FULL : DUPLEX_HALF; 827 pl->link_config.speed = prop[2]; 828 if (prop[3]) 829 __set_bit(ETHTOOL_LINK_MODE_Pause_BIT, 830 pl->link_config.lp_advertising); 831 if (prop[4]) 832 __set_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, 833 pl->link_config.lp_advertising); 834 } 835 } 836 837 if (pl->link_config.speed > SPEED_1000 && 838 pl->link_config.duplex != DUPLEX_FULL) 839 phylink_warn(pl, "fixed link specifies half duplex for %dMbps link?\n", 840 pl->link_config.speed); 841 842 linkmode_fill(pl->supported); 843 linkmode_copy(pl->link_config.advertising, pl->supported); 844 phylink_validate(pl, pl->supported, &pl->link_config); 845 846 pause = phylink_test(pl->supported, Pause); 847 asym_pause = phylink_test(pl->supported, Asym_Pause); 848 autoneg = phylink_test(pl->supported, Autoneg); 849 s = phy_lookup_setting(pl->link_config.speed, pl->link_config.duplex, 850 pl->supported, true); 851 linkmode_zero(pl->supported); 852 phylink_set(pl->supported, MII); 853 854 if (pause) 855 phylink_set(pl->supported, Pause); 856 857 if (asym_pause) 858 phylink_set(pl->supported, Asym_Pause); 859 860 if (autoneg) 861 phylink_set(pl->supported, Autoneg); 862 863 if (s) { 864 __set_bit(s->bit, pl->supported); 865 __set_bit(s->bit, pl->link_config.lp_advertising); 866 } else { 867 phylink_warn(pl, "fixed link %s duplex %dMbps not recognised\n", 868 pl->link_config.duplex == DUPLEX_FULL ? "full" : "half", 869 pl->link_config.speed); 870 } 871 872 linkmode_and(pl->link_config.advertising, pl->link_config.advertising, 873 pl->supported); 874 875 pl->link_config.link = 1; 876 pl->link_config.an_complete = 1; 877 878 return 0; 879 } 880 881 static int phylink_parse_mode(struct phylink *pl, 882 const struct fwnode_handle *fwnode) 883 { 884 struct fwnode_handle *dn; 885 const char *managed; 886 unsigned long caps; 887 888 dn = fwnode_get_named_child_node(fwnode, "fixed-link"); 889 if (dn || fwnode_property_present(fwnode, "fixed-link")) 890 pl->cfg_link_an_mode = MLO_AN_FIXED; 891 fwnode_handle_put(dn); 892 893 if ((fwnode_property_read_string(fwnode, "managed", &managed) == 0 && 894 strcmp(managed, "in-band-status") == 0) || 895 pl->config->ovr_an_inband) { 896 if (pl->cfg_link_an_mode == MLO_AN_FIXED) { 897 phylink_err(pl, 898 "can't use both fixed-link and in-band-status\n"); 899 return -EINVAL; 900 } 901 902 linkmode_zero(pl->supported); 903 phylink_set(pl->supported, MII); 904 phylink_set(pl->supported, Autoneg); 905 phylink_set(pl->supported, Asym_Pause); 906 phylink_set(pl->supported, Pause); 907 pl->cfg_link_an_mode = MLO_AN_INBAND; 908 909 switch (pl->link_config.interface) { 910 case PHY_INTERFACE_MODE_SGMII: 911 case PHY_INTERFACE_MODE_PSGMII: 912 case PHY_INTERFACE_MODE_QSGMII: 913 case PHY_INTERFACE_MODE_QUSGMII: 914 case PHY_INTERFACE_MODE_RGMII: 915 case PHY_INTERFACE_MODE_RGMII_ID: 916 case PHY_INTERFACE_MODE_RGMII_RXID: 917 case PHY_INTERFACE_MODE_RGMII_TXID: 918 case PHY_INTERFACE_MODE_RTBI: 919 case PHY_INTERFACE_MODE_1000BASEX: 920 case PHY_INTERFACE_MODE_2500BASEX: 921 case PHY_INTERFACE_MODE_5GBASER: 922 case PHY_INTERFACE_MODE_25GBASER: 923 case PHY_INTERFACE_MODE_USXGMII: 924 case PHY_INTERFACE_MODE_10GKR: 925 case PHY_INTERFACE_MODE_10GBASER: 926 case PHY_INTERFACE_MODE_XLGMII: 927 caps = ~(MAC_SYM_PAUSE | MAC_ASYM_PAUSE); 928 caps = phylink_get_capabilities(pl->link_config.interface, caps, 929 RATE_MATCH_NONE); 930 phylink_caps_to_linkmodes(pl->supported, caps); 931 break; 932 933 default: 934 phylink_err(pl, 935 "incorrect link mode %s for in-band status\n", 936 phy_modes(pl->link_config.interface)); 937 return -EINVAL; 938 } 939 940 linkmode_copy(pl->link_config.advertising, pl->supported); 941 942 if (phylink_validate(pl, pl->supported, &pl->link_config)) { 943 phylink_err(pl, 944 "failed to validate link configuration for in-band status\n"); 945 return -EINVAL; 946 } 947 } 948 949 return 0; 950 } 951 952 static void phylink_apply_manual_flow(struct phylink *pl, 953 struct phylink_link_state *state) 954 { 955 /* If autoneg is disabled, pause AN is also disabled */ 956 if (!linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, 957 state->advertising)) 958 state->pause &= ~MLO_PAUSE_AN; 959 960 /* Manual configuration of pause modes */ 961 if (!(pl->link_config.pause & MLO_PAUSE_AN)) 962 state->pause = pl->link_config.pause; 963 } 964 965 static void phylink_resolve_an_pause(struct phylink_link_state *state) 966 { 967 bool tx_pause, rx_pause; 968 969 if (state->duplex == DUPLEX_FULL) { 970 linkmode_resolve_pause(state->advertising, 971 state->lp_advertising, 972 &tx_pause, &rx_pause); 973 if (tx_pause) 974 state->pause |= MLO_PAUSE_TX; 975 if (rx_pause) 976 state->pause |= MLO_PAUSE_RX; 977 } 978 } 979 980 static void phylink_pcs_pre_config(struct phylink_pcs *pcs, 981 phy_interface_t interface) 982 { 983 if (pcs && pcs->ops->pcs_pre_config) 984 pcs->ops->pcs_pre_config(pcs, interface); 985 } 986 987 static int phylink_pcs_post_config(struct phylink_pcs *pcs, 988 phy_interface_t interface) 989 { 990 int err = 0; 991 992 if (pcs && pcs->ops->pcs_post_config) 993 err = pcs->ops->pcs_post_config(pcs, interface); 994 995 return err; 996 } 997 998 static void phylink_pcs_disable(struct phylink_pcs *pcs) 999 { 1000 if (pcs && pcs->ops->pcs_disable) 1001 pcs->ops->pcs_disable(pcs); 1002 } 1003 1004 static int phylink_pcs_enable(struct phylink_pcs *pcs) 1005 { 1006 int err = 0; 1007 1008 if (pcs && pcs->ops->pcs_enable) 1009 err = pcs->ops->pcs_enable(pcs); 1010 1011 return err; 1012 } 1013 1014 static int phylink_pcs_config(struct phylink_pcs *pcs, unsigned int neg_mode, 1015 const struct phylink_link_state *state, 1016 bool permit_pause_to_mac) 1017 { 1018 if (!pcs) 1019 return 0; 1020 1021 return pcs->ops->pcs_config(pcs, neg_mode, state->interface, 1022 state->advertising, permit_pause_to_mac); 1023 } 1024 1025 static void phylink_pcs_link_up(struct phylink_pcs *pcs, unsigned int neg_mode, 1026 phy_interface_t interface, int speed, 1027 int duplex) 1028 { 1029 if (pcs && pcs->ops->pcs_link_up) 1030 pcs->ops->pcs_link_up(pcs, neg_mode, interface, speed, duplex); 1031 } 1032 1033 static void phylink_pcs_poll_stop(struct phylink *pl) 1034 { 1035 if (pl->cfg_link_an_mode == MLO_AN_INBAND) 1036 del_timer(&pl->link_poll); 1037 } 1038 1039 static void phylink_pcs_poll_start(struct phylink *pl) 1040 { 1041 if (pl->pcs && pl->pcs->poll && pl->cfg_link_an_mode == MLO_AN_INBAND) 1042 mod_timer(&pl->link_poll, jiffies + HZ); 1043 } 1044 1045 int phylink_pcs_pre_init(struct phylink *pl, struct phylink_pcs *pcs) 1046 { 1047 int ret = 0; 1048 1049 /* Signal to PCS driver that MAC requires RX clock for init */ 1050 if (pl->config->mac_requires_rxc) 1051 pcs->rxc_always_on = true; 1052 1053 if (pcs->ops->pcs_pre_init) 1054 ret = pcs->ops->pcs_pre_init(pcs); 1055 1056 return ret; 1057 } 1058 EXPORT_SYMBOL_GPL(phylink_pcs_pre_init); 1059 1060 static void phylink_mac_config(struct phylink *pl, 1061 const struct phylink_link_state *state) 1062 { 1063 struct phylink_link_state st = *state; 1064 1065 /* Stop drivers incorrectly using these */ 1066 linkmode_zero(st.lp_advertising); 1067 st.speed = SPEED_UNKNOWN; 1068 st.duplex = DUPLEX_UNKNOWN; 1069 st.an_complete = false; 1070 st.link = false; 1071 1072 phylink_dbg(pl, 1073 "%s: mode=%s/%s/%s adv=%*pb pause=%02x\n", 1074 __func__, phylink_an_mode_str(pl->cur_link_an_mode), 1075 phy_modes(st.interface), 1076 phy_rate_matching_to_str(st.rate_matching), 1077 __ETHTOOL_LINK_MODE_MASK_NBITS, st.advertising, 1078 st.pause); 1079 1080 pl->mac_ops->mac_config(pl->config, pl->cur_link_an_mode, &st); 1081 } 1082 1083 static void phylink_pcs_an_restart(struct phylink *pl) 1084 { 1085 if (pl->pcs && linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, 1086 pl->link_config.advertising) && 1087 phy_interface_mode_is_8023z(pl->link_config.interface) && 1088 phylink_autoneg_inband(pl->cur_link_an_mode)) 1089 pl->pcs->ops->pcs_an_restart(pl->pcs); 1090 } 1091 1092 /** 1093 * phylink_pcs_neg_mode() - helper to determine PCS inband mode 1094 * @mode: one of %MLO_AN_FIXED, %MLO_AN_PHY, %MLO_AN_INBAND. 1095 * @interface: interface mode to be used 1096 * @advertising: adertisement ethtool link mode mask 1097 * 1098 * Determines the negotiation mode to be used by the PCS, and returns 1099 * one of: 1100 * 1101 * - %PHYLINK_PCS_NEG_NONE: interface mode does not support inband 1102 * - %PHYLINK_PCS_NEG_OUTBAND: an out of band mode (e.g. reading the PHY) 1103 * will be used. 1104 * - %PHYLINK_PCS_NEG_INBAND_DISABLED: inband mode selected but autoneg 1105 * disabled 1106 * - %PHYLINK_PCS_NEG_INBAND_ENABLED: inband mode selected and autoneg enabled 1107 * 1108 * Note: this is for cases where the PCS itself is involved in negotiation 1109 * (e.g. Clause 37, SGMII and similar) not Clause 73. 1110 */ 1111 static unsigned int phylink_pcs_neg_mode(unsigned int mode, 1112 phy_interface_t interface, 1113 const unsigned long *advertising) 1114 { 1115 unsigned int neg_mode; 1116 1117 switch (interface) { 1118 case PHY_INTERFACE_MODE_SGMII: 1119 case PHY_INTERFACE_MODE_QSGMII: 1120 case PHY_INTERFACE_MODE_QUSGMII: 1121 case PHY_INTERFACE_MODE_USXGMII: 1122 /* These protocols are designed for use with a PHY which 1123 * communicates its negotiation result back to the MAC via 1124 * inband communication. Note: there exist PHYs that run 1125 * with SGMII but do not send the inband data. 1126 */ 1127 if (!phylink_autoneg_inband(mode)) 1128 neg_mode = PHYLINK_PCS_NEG_OUTBAND; 1129 else 1130 neg_mode = PHYLINK_PCS_NEG_INBAND_ENABLED; 1131 break; 1132 1133 case PHY_INTERFACE_MODE_1000BASEX: 1134 case PHY_INTERFACE_MODE_2500BASEX: 1135 /* 1000base-X is designed for use media-side for Fibre 1136 * connections, and thus the Autoneg bit needs to be 1137 * taken into account. We also do this for 2500base-X 1138 * as well, but drivers may not support this, so may 1139 * need to override this. 1140 */ 1141 if (!phylink_autoneg_inband(mode)) 1142 neg_mode = PHYLINK_PCS_NEG_OUTBAND; 1143 else if (linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, 1144 advertising)) 1145 neg_mode = PHYLINK_PCS_NEG_INBAND_ENABLED; 1146 else 1147 neg_mode = PHYLINK_PCS_NEG_INBAND_DISABLED; 1148 break; 1149 1150 default: 1151 neg_mode = PHYLINK_PCS_NEG_NONE; 1152 break; 1153 } 1154 1155 return neg_mode; 1156 } 1157 1158 static void phylink_major_config(struct phylink *pl, bool restart, 1159 const struct phylink_link_state *state) 1160 { 1161 struct phylink_pcs *pcs = NULL; 1162 bool pcs_changed = false; 1163 unsigned int rate_kbd; 1164 unsigned int neg_mode; 1165 int err; 1166 1167 phylink_dbg(pl, "major config %s\n", phy_modes(state->interface)); 1168 1169 pl->pcs_neg_mode = phylink_pcs_neg_mode(pl->cur_link_an_mode, 1170 state->interface, 1171 state->advertising); 1172 1173 if (pl->using_mac_select_pcs) { 1174 pcs = pl->mac_ops->mac_select_pcs(pl->config, state->interface); 1175 if (IS_ERR(pcs)) { 1176 phylink_err(pl, 1177 "mac_select_pcs unexpectedly failed: %pe\n", 1178 pcs); 1179 return; 1180 } 1181 1182 pcs_changed = pcs && pl->pcs != pcs; 1183 } 1184 1185 phylink_pcs_poll_stop(pl); 1186 1187 if (pl->mac_ops->mac_prepare) { 1188 err = pl->mac_ops->mac_prepare(pl->config, pl->cur_link_an_mode, 1189 state->interface); 1190 if (err < 0) { 1191 phylink_err(pl, "mac_prepare failed: %pe\n", 1192 ERR_PTR(err)); 1193 return; 1194 } 1195 } 1196 1197 /* If we have a new PCS, switch to the new PCS after preparing the MAC 1198 * for the change. 1199 */ 1200 if (pcs_changed) { 1201 phylink_pcs_disable(pl->pcs); 1202 1203 if (pl->pcs) 1204 pl->pcs->phylink = NULL; 1205 1206 pcs->phylink = pl; 1207 1208 pl->pcs = pcs; 1209 } 1210 1211 if (pl->pcs) 1212 phylink_pcs_pre_config(pl->pcs, state->interface); 1213 1214 phylink_mac_config(pl, state); 1215 1216 if (pl->pcs) 1217 phylink_pcs_post_config(pl->pcs, state->interface); 1218 1219 if (pl->pcs_state == PCS_STATE_STARTING || pcs_changed) 1220 phylink_pcs_enable(pl->pcs); 1221 1222 neg_mode = pl->cur_link_an_mode; 1223 if (pl->pcs && pl->pcs->neg_mode) 1224 neg_mode = pl->pcs_neg_mode; 1225 1226 err = phylink_pcs_config(pl->pcs, neg_mode, state, 1227 !!(pl->link_config.pause & MLO_PAUSE_AN)); 1228 if (err < 0) 1229 phylink_err(pl, "pcs_config failed: %pe\n", 1230 ERR_PTR(err)); 1231 else if (err > 0) 1232 restart = true; 1233 1234 if (restart) 1235 phylink_pcs_an_restart(pl); 1236 1237 if (pl->mac_ops->mac_finish) { 1238 err = pl->mac_ops->mac_finish(pl->config, pl->cur_link_an_mode, 1239 state->interface); 1240 if (err < 0) 1241 phylink_err(pl, "mac_finish failed: %pe\n", 1242 ERR_PTR(err)); 1243 } 1244 1245 if (pl->sfp_bus) { 1246 rate_kbd = phylink_interface_signal_rate(state->interface); 1247 if (rate_kbd) 1248 sfp_upstream_set_signal_rate(pl->sfp_bus, rate_kbd); 1249 } 1250 1251 phylink_pcs_poll_start(pl); 1252 } 1253 1254 /* 1255 * Reconfigure for a change of inband advertisement. 1256 * If we have a separate PCS, we only need to call its pcs_config() method, 1257 * and then restart AN if it indicates something changed. Otherwise, we do 1258 * the full MAC reconfiguration. 1259 */ 1260 static int phylink_change_inband_advert(struct phylink *pl) 1261 { 1262 unsigned int neg_mode; 1263 int ret; 1264 1265 if (test_bit(PHYLINK_DISABLE_STOPPED, &pl->phylink_disable_state)) 1266 return 0; 1267 1268 phylink_dbg(pl, "%s: mode=%s/%s adv=%*pb pause=%02x\n", __func__, 1269 phylink_an_mode_str(pl->cur_link_an_mode), 1270 phy_modes(pl->link_config.interface), 1271 __ETHTOOL_LINK_MODE_MASK_NBITS, pl->link_config.advertising, 1272 pl->link_config.pause); 1273 1274 /* Recompute the PCS neg mode */ 1275 pl->pcs_neg_mode = phylink_pcs_neg_mode(pl->cur_link_an_mode, 1276 pl->link_config.interface, 1277 pl->link_config.advertising); 1278 1279 neg_mode = pl->cur_link_an_mode; 1280 if (pl->pcs->neg_mode) 1281 neg_mode = pl->pcs_neg_mode; 1282 1283 /* Modern PCS-based method; update the advert at the PCS, and 1284 * restart negotiation if the pcs_config() helper indicates that 1285 * the programmed advertisement has changed. 1286 */ 1287 ret = phylink_pcs_config(pl->pcs, neg_mode, &pl->link_config, 1288 !!(pl->link_config.pause & MLO_PAUSE_AN)); 1289 if (ret < 0) 1290 return ret; 1291 1292 if (ret > 0) 1293 phylink_pcs_an_restart(pl); 1294 1295 return 0; 1296 } 1297 1298 static void phylink_mac_pcs_get_state(struct phylink *pl, 1299 struct phylink_link_state *state) 1300 { 1301 linkmode_copy(state->advertising, pl->link_config.advertising); 1302 linkmode_zero(state->lp_advertising); 1303 state->interface = pl->link_config.interface; 1304 state->rate_matching = pl->link_config.rate_matching; 1305 if (linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, 1306 state->advertising)) { 1307 state->speed = SPEED_UNKNOWN; 1308 state->duplex = DUPLEX_UNKNOWN; 1309 state->pause = MLO_PAUSE_NONE; 1310 } else { 1311 state->speed = pl->link_config.speed; 1312 state->duplex = pl->link_config.duplex; 1313 state->pause = pl->link_config.pause; 1314 } 1315 state->an_complete = 0; 1316 state->link = 1; 1317 1318 if (pl->pcs) 1319 pl->pcs->ops->pcs_get_state(pl->pcs, state); 1320 else 1321 state->link = 0; 1322 } 1323 1324 /* The fixed state is... fixed except for the link state, 1325 * which may be determined by a GPIO or a callback. 1326 */ 1327 static void phylink_get_fixed_state(struct phylink *pl, 1328 struct phylink_link_state *state) 1329 { 1330 *state = pl->link_config; 1331 if (pl->config->get_fixed_state) 1332 pl->config->get_fixed_state(pl->config, state); 1333 else if (pl->link_gpio) 1334 state->link = !!gpiod_get_value_cansleep(pl->link_gpio); 1335 1336 state->pause = MLO_PAUSE_NONE; 1337 phylink_resolve_an_pause(state); 1338 } 1339 1340 static void phylink_mac_initial_config(struct phylink *pl, bool force_restart) 1341 { 1342 struct phylink_link_state link_state; 1343 1344 switch (pl->cur_link_an_mode) { 1345 case MLO_AN_PHY: 1346 link_state = pl->phy_state; 1347 break; 1348 1349 case MLO_AN_FIXED: 1350 phylink_get_fixed_state(pl, &link_state); 1351 break; 1352 1353 case MLO_AN_INBAND: 1354 link_state = pl->link_config; 1355 if (link_state.interface == PHY_INTERFACE_MODE_SGMII) 1356 link_state.pause = MLO_PAUSE_NONE; 1357 break; 1358 1359 default: /* can't happen */ 1360 return; 1361 } 1362 1363 link_state.link = false; 1364 1365 phylink_apply_manual_flow(pl, &link_state); 1366 phylink_major_config(pl, force_restart, &link_state); 1367 } 1368 1369 static const char *phylink_pause_to_str(int pause) 1370 { 1371 switch (pause & MLO_PAUSE_TXRX_MASK) { 1372 case MLO_PAUSE_TX | MLO_PAUSE_RX: 1373 return "rx/tx"; 1374 case MLO_PAUSE_TX: 1375 return "tx"; 1376 case MLO_PAUSE_RX: 1377 return "rx"; 1378 default: 1379 return "off"; 1380 } 1381 } 1382 1383 static void phylink_link_up(struct phylink *pl, 1384 struct phylink_link_state link_state) 1385 { 1386 struct net_device *ndev = pl->netdev; 1387 unsigned int neg_mode; 1388 int speed, duplex; 1389 bool rx_pause; 1390 1391 speed = link_state.speed; 1392 duplex = link_state.duplex; 1393 rx_pause = !!(link_state.pause & MLO_PAUSE_RX); 1394 1395 switch (link_state.rate_matching) { 1396 case RATE_MATCH_PAUSE: 1397 /* The PHY is doing rate matchion from the media rate (in 1398 * the link_state) to the interface speed, and will send 1399 * pause frames to the MAC to limit its transmission speed. 1400 */ 1401 speed = phylink_interface_max_speed(link_state.interface); 1402 duplex = DUPLEX_FULL; 1403 rx_pause = true; 1404 break; 1405 1406 case RATE_MATCH_CRS: 1407 /* The PHY is doing rate matchion from the media rate (in 1408 * the link_state) to the interface speed, and will cause 1409 * collisions to the MAC to limit its transmission speed. 1410 */ 1411 speed = phylink_interface_max_speed(link_state.interface); 1412 duplex = DUPLEX_HALF; 1413 break; 1414 } 1415 1416 pl->cur_interface = link_state.interface; 1417 1418 neg_mode = pl->cur_link_an_mode; 1419 if (pl->pcs && pl->pcs->neg_mode) 1420 neg_mode = pl->pcs_neg_mode; 1421 1422 phylink_pcs_link_up(pl->pcs, neg_mode, pl->cur_interface, speed, 1423 duplex); 1424 1425 pl->mac_ops->mac_link_up(pl->config, pl->phydev, pl->cur_link_an_mode, 1426 pl->cur_interface, speed, duplex, 1427 !!(link_state.pause & MLO_PAUSE_TX), rx_pause); 1428 1429 if (ndev) 1430 netif_carrier_on(ndev); 1431 1432 phylink_info(pl, 1433 "Link is Up - %s/%s - flow control %s\n", 1434 phy_speed_to_str(link_state.speed), 1435 phy_duplex_to_str(link_state.duplex), 1436 phylink_pause_to_str(link_state.pause)); 1437 } 1438 1439 static void phylink_link_down(struct phylink *pl) 1440 { 1441 struct net_device *ndev = pl->netdev; 1442 1443 if (ndev) 1444 netif_carrier_off(ndev); 1445 pl->mac_ops->mac_link_down(pl->config, pl->cur_link_an_mode, 1446 pl->cur_interface); 1447 phylink_info(pl, "Link is Down\n"); 1448 } 1449 1450 static void phylink_resolve(struct work_struct *w) 1451 { 1452 struct phylink *pl = container_of(w, struct phylink, resolve); 1453 struct phylink_link_state link_state; 1454 struct net_device *ndev = pl->netdev; 1455 bool mac_config = false; 1456 bool retrigger = false; 1457 bool cur_link_state; 1458 1459 mutex_lock(&pl->state_mutex); 1460 if (pl->netdev) 1461 cur_link_state = netif_carrier_ok(ndev); 1462 else 1463 cur_link_state = pl->old_link_state; 1464 1465 if (pl->phylink_disable_state) { 1466 pl->mac_link_dropped = false; 1467 link_state.link = false; 1468 } else if (pl->mac_link_dropped) { 1469 link_state.link = false; 1470 retrigger = true; 1471 } else { 1472 switch (pl->cur_link_an_mode) { 1473 case MLO_AN_PHY: 1474 link_state = pl->phy_state; 1475 phylink_apply_manual_flow(pl, &link_state); 1476 mac_config = link_state.link; 1477 break; 1478 1479 case MLO_AN_FIXED: 1480 phylink_get_fixed_state(pl, &link_state); 1481 mac_config = link_state.link; 1482 break; 1483 1484 case MLO_AN_INBAND: 1485 phylink_mac_pcs_get_state(pl, &link_state); 1486 1487 /* The PCS may have a latching link-fail indicator. 1488 * If the link was up, bring the link down and 1489 * re-trigger the resolve. Otherwise, re-read the 1490 * PCS state to get the current status of the link. 1491 */ 1492 if (!link_state.link) { 1493 if (cur_link_state) 1494 retrigger = true; 1495 else 1496 phylink_mac_pcs_get_state(pl, 1497 &link_state); 1498 } 1499 1500 /* If we have a phy, the "up" state is the union of 1501 * both the PHY and the MAC 1502 */ 1503 if (pl->phydev) 1504 link_state.link &= pl->phy_state.link; 1505 1506 /* Only update if the PHY link is up */ 1507 if (pl->phydev && pl->phy_state.link) { 1508 /* If the interface has changed, force a 1509 * link down event if the link isn't already 1510 * down, and re-resolve. 1511 */ 1512 if (link_state.interface != 1513 pl->phy_state.interface) { 1514 retrigger = true; 1515 link_state.link = false; 1516 } 1517 link_state.interface = pl->phy_state.interface; 1518 1519 /* If we are doing rate matching, then the 1520 * link speed/duplex comes from the PHY 1521 */ 1522 if (pl->phy_state.rate_matching) { 1523 link_state.rate_matching = 1524 pl->phy_state.rate_matching; 1525 link_state.speed = pl->phy_state.speed; 1526 link_state.duplex = 1527 pl->phy_state.duplex; 1528 } 1529 1530 /* If we have a PHY, we need to update with 1531 * the PHY flow control bits. 1532 */ 1533 link_state.pause = pl->phy_state.pause; 1534 mac_config = true; 1535 } 1536 phylink_apply_manual_flow(pl, &link_state); 1537 break; 1538 } 1539 } 1540 1541 if (mac_config) { 1542 if (link_state.interface != pl->link_config.interface) { 1543 /* The interface has changed, force the link down and 1544 * then reconfigure. 1545 */ 1546 if (cur_link_state) { 1547 phylink_link_down(pl); 1548 cur_link_state = false; 1549 } 1550 phylink_major_config(pl, false, &link_state); 1551 pl->link_config.interface = link_state.interface; 1552 } 1553 } 1554 1555 if (link_state.link != cur_link_state) { 1556 pl->old_link_state = link_state.link; 1557 if (!link_state.link) 1558 phylink_link_down(pl); 1559 else 1560 phylink_link_up(pl, link_state); 1561 } 1562 if (!link_state.link && retrigger) { 1563 pl->mac_link_dropped = false; 1564 queue_work(system_power_efficient_wq, &pl->resolve); 1565 } 1566 mutex_unlock(&pl->state_mutex); 1567 } 1568 1569 static void phylink_run_resolve(struct phylink *pl) 1570 { 1571 if (!pl->phylink_disable_state) 1572 queue_work(system_power_efficient_wq, &pl->resolve); 1573 } 1574 1575 static void phylink_run_resolve_and_disable(struct phylink *pl, int bit) 1576 { 1577 unsigned long state = pl->phylink_disable_state; 1578 1579 set_bit(bit, &pl->phylink_disable_state); 1580 if (state == 0) { 1581 queue_work(system_power_efficient_wq, &pl->resolve); 1582 flush_work(&pl->resolve); 1583 } 1584 } 1585 1586 static void phylink_enable_and_run_resolve(struct phylink *pl, int bit) 1587 { 1588 clear_bit(bit, &pl->phylink_disable_state); 1589 phylink_run_resolve(pl); 1590 } 1591 1592 static void phylink_fixed_poll(struct timer_list *t) 1593 { 1594 struct phylink *pl = container_of(t, struct phylink, link_poll); 1595 1596 mod_timer(t, jiffies + HZ); 1597 1598 phylink_run_resolve(pl); 1599 } 1600 1601 static const struct sfp_upstream_ops sfp_phylink_ops; 1602 1603 static int phylink_register_sfp(struct phylink *pl, 1604 const struct fwnode_handle *fwnode) 1605 { 1606 struct sfp_bus *bus; 1607 int ret; 1608 1609 if (!fwnode) 1610 return 0; 1611 1612 bus = sfp_bus_find_fwnode(fwnode); 1613 if (IS_ERR(bus)) { 1614 phylink_err(pl, "unable to attach SFP bus: %pe\n", bus); 1615 return PTR_ERR(bus); 1616 } 1617 1618 pl->sfp_bus = bus; 1619 1620 ret = sfp_bus_add_upstream(bus, pl, &sfp_phylink_ops); 1621 sfp_bus_put(bus); 1622 1623 return ret; 1624 } 1625 1626 /** 1627 * phylink_create() - create a phylink instance 1628 * @config: a pointer to the target &struct phylink_config 1629 * @fwnode: a pointer to a &struct fwnode_handle describing the network 1630 * interface 1631 * @iface: the desired link mode defined by &typedef phy_interface_t 1632 * @mac_ops: a pointer to a &struct phylink_mac_ops for the MAC. 1633 * 1634 * Create a new phylink instance, and parse the link parameters found in @np. 1635 * This will parse in-band modes, fixed-link or SFP configuration. 1636 * 1637 * Note: the rtnl lock must not be held when calling this function. 1638 * 1639 * Returns a pointer to a &struct phylink, or an error-pointer value. Users 1640 * must use IS_ERR() to check for errors from this function. 1641 */ 1642 struct phylink *phylink_create(struct phylink_config *config, 1643 const struct fwnode_handle *fwnode, 1644 phy_interface_t iface, 1645 const struct phylink_mac_ops *mac_ops) 1646 { 1647 bool using_mac_select_pcs = false; 1648 struct phylink *pl; 1649 int ret; 1650 1651 /* Validate the supplied configuration */ 1652 if (phy_interface_empty(config->supported_interfaces)) { 1653 dev_err(config->dev, 1654 "phylink: error: empty supported_interfaces\n"); 1655 return ERR_PTR(-EINVAL); 1656 } 1657 1658 if (mac_ops->mac_select_pcs && 1659 mac_ops->mac_select_pcs(config, PHY_INTERFACE_MODE_NA) != 1660 ERR_PTR(-EOPNOTSUPP)) 1661 using_mac_select_pcs = true; 1662 1663 pl = kzalloc(sizeof(*pl), GFP_KERNEL); 1664 if (!pl) 1665 return ERR_PTR(-ENOMEM); 1666 1667 mutex_init(&pl->state_mutex); 1668 INIT_WORK(&pl->resolve, phylink_resolve); 1669 1670 pl->config = config; 1671 if (config->type == PHYLINK_NETDEV) { 1672 pl->netdev = to_net_dev(config->dev); 1673 netif_carrier_off(pl->netdev); 1674 } else if (config->type == PHYLINK_DEV) { 1675 pl->dev = config->dev; 1676 } else { 1677 kfree(pl); 1678 return ERR_PTR(-EINVAL); 1679 } 1680 1681 pl->using_mac_select_pcs = using_mac_select_pcs; 1682 pl->phy_state.interface = iface; 1683 pl->link_interface = iface; 1684 if (iface == PHY_INTERFACE_MODE_MOCA) 1685 pl->link_port = PORT_BNC; 1686 else 1687 pl->link_port = PORT_MII; 1688 pl->link_config.interface = iface; 1689 pl->link_config.pause = MLO_PAUSE_AN; 1690 pl->link_config.speed = SPEED_UNKNOWN; 1691 pl->link_config.duplex = DUPLEX_UNKNOWN; 1692 pl->pcs_state = PCS_STATE_DOWN; 1693 pl->mac_ops = mac_ops; 1694 __set_bit(PHYLINK_DISABLE_STOPPED, &pl->phylink_disable_state); 1695 timer_setup(&pl->link_poll, phylink_fixed_poll, 0); 1696 1697 linkmode_fill(pl->supported); 1698 linkmode_copy(pl->link_config.advertising, pl->supported); 1699 phylink_validate(pl, pl->supported, &pl->link_config); 1700 1701 ret = phylink_parse_mode(pl, fwnode); 1702 if (ret < 0) { 1703 kfree(pl); 1704 return ERR_PTR(ret); 1705 } 1706 1707 if (pl->cfg_link_an_mode == MLO_AN_FIXED) { 1708 ret = phylink_parse_fixedlink(pl, fwnode); 1709 if (ret < 0) { 1710 kfree(pl); 1711 return ERR_PTR(ret); 1712 } 1713 } 1714 1715 pl->cur_link_an_mode = pl->cfg_link_an_mode; 1716 1717 ret = phylink_register_sfp(pl, fwnode); 1718 if (ret < 0) { 1719 kfree(pl); 1720 return ERR_PTR(ret); 1721 } 1722 1723 return pl; 1724 } 1725 EXPORT_SYMBOL_GPL(phylink_create); 1726 1727 /** 1728 * phylink_destroy() - cleanup and destroy the phylink instance 1729 * @pl: a pointer to a &struct phylink returned from phylink_create() 1730 * 1731 * Destroy a phylink instance. Any PHY that has been attached must have been 1732 * cleaned up via phylink_disconnect_phy() prior to calling this function. 1733 * 1734 * Note: the rtnl lock must not be held when calling this function. 1735 */ 1736 void phylink_destroy(struct phylink *pl) 1737 { 1738 sfp_bus_del_upstream(pl->sfp_bus); 1739 if (pl->link_gpio) 1740 gpiod_put(pl->link_gpio); 1741 1742 cancel_work_sync(&pl->resolve); 1743 kfree(pl); 1744 } 1745 EXPORT_SYMBOL_GPL(phylink_destroy); 1746 1747 /** 1748 * phylink_expects_phy() - Determine if phylink expects a phy to be attached 1749 * @pl: a pointer to a &struct phylink returned from phylink_create() 1750 * 1751 * When using fixed-link mode, or in-band mode with 1000base-X or 2500base-X, 1752 * no PHY is needed. 1753 * 1754 * Returns true if phylink will be expecting a PHY. 1755 */ 1756 bool phylink_expects_phy(struct phylink *pl) 1757 { 1758 if (pl->cfg_link_an_mode == MLO_AN_FIXED || 1759 (pl->cfg_link_an_mode == MLO_AN_INBAND && 1760 phy_interface_mode_is_8023z(pl->link_config.interface))) 1761 return false; 1762 return true; 1763 } 1764 EXPORT_SYMBOL_GPL(phylink_expects_phy); 1765 1766 static void phylink_phy_change(struct phy_device *phydev, bool up) 1767 { 1768 struct phylink *pl = phydev->phylink; 1769 bool tx_pause, rx_pause; 1770 1771 phy_get_pause(phydev, &tx_pause, &rx_pause); 1772 1773 mutex_lock(&pl->state_mutex); 1774 pl->phy_state.speed = phydev->speed; 1775 pl->phy_state.duplex = phydev->duplex; 1776 pl->phy_state.rate_matching = phydev->rate_matching; 1777 pl->phy_state.pause = MLO_PAUSE_NONE; 1778 if (tx_pause) 1779 pl->phy_state.pause |= MLO_PAUSE_TX; 1780 if (rx_pause) 1781 pl->phy_state.pause |= MLO_PAUSE_RX; 1782 pl->phy_state.interface = phydev->interface; 1783 pl->phy_state.link = up; 1784 mutex_unlock(&pl->state_mutex); 1785 1786 phylink_run_resolve(pl); 1787 1788 phylink_dbg(pl, "phy link %s %s/%s/%s/%s/%s\n", up ? "up" : "down", 1789 phy_modes(phydev->interface), 1790 phy_speed_to_str(phydev->speed), 1791 phy_duplex_to_str(phydev->duplex), 1792 phy_rate_matching_to_str(phydev->rate_matching), 1793 phylink_pause_to_str(pl->phy_state.pause)); 1794 } 1795 1796 static int phylink_validate_phy(struct phylink *pl, struct phy_device *phy, 1797 unsigned long *supported, 1798 struct phylink_link_state *state) 1799 { 1800 DECLARE_PHY_INTERFACE_MASK(interfaces); 1801 1802 /* If the PHY provides a bitmap of the interfaces it will be using 1803 * depending on the negotiated media speeds, use this to validate 1804 * which ethtool link modes can be used. 1805 */ 1806 if (!phy_interface_empty(phy->possible_interfaces)) { 1807 /* We only care about the union of the PHY's interfaces and 1808 * those which the host supports. 1809 */ 1810 phy_interface_and(interfaces, phy->possible_interfaces, 1811 pl->config->supported_interfaces); 1812 1813 if (phy_interface_empty(interfaces)) { 1814 phylink_err(pl, "PHY has no common interfaces\n"); 1815 return -EINVAL; 1816 } 1817 1818 if (phy_on_sfp(phy)) { 1819 /* If the PHY is on a SFP, limit the interfaces to 1820 * those that can be used with a SFP module. 1821 */ 1822 phy_interface_and(interfaces, interfaces, 1823 phylink_sfp_interfaces); 1824 1825 if (phy_interface_empty(interfaces)) { 1826 phylink_err(pl, "SFP PHY's possible interfaces becomes empty\n"); 1827 return -EINVAL; 1828 } 1829 } 1830 1831 phylink_dbg(pl, "PHY %s uses interfaces %*pbl, validating %*pbl\n", 1832 phydev_name(phy), 1833 (int)PHY_INTERFACE_MODE_MAX, 1834 phy->possible_interfaces, 1835 (int)PHY_INTERFACE_MODE_MAX, interfaces); 1836 1837 return phylink_validate_mask(pl, phy, supported, state, 1838 interfaces); 1839 } 1840 1841 phylink_dbg(pl, "PHY %s doesn't supply possible interfaces\n", 1842 phydev_name(phy)); 1843 1844 /* Check whether we would use rate matching for the proposed interface 1845 * mode. 1846 */ 1847 state->rate_matching = phy_get_rate_matching(phy, state->interface); 1848 1849 /* Clause 45 PHYs may switch their Serdes lane between, e.g. 10GBASE-R, 1850 * 5GBASE-R, 2500BASE-X and SGMII if they are not using rate matching. 1851 * For some interface modes (e.g. RXAUI, XAUI and USXGMII) switching 1852 * their Serdes is either unnecessary or not reasonable. 1853 * 1854 * For these which switch interface modes, we really need to know which 1855 * interface modes the PHY supports to properly work out which ethtool 1856 * linkmodes can be supported. For now, as a work-around, we validate 1857 * against all interface modes, which may lead to more ethtool link 1858 * modes being advertised than are actually supported. 1859 */ 1860 if (phy->is_c45 && state->rate_matching == RATE_MATCH_NONE && 1861 state->interface != PHY_INTERFACE_MODE_RXAUI && 1862 state->interface != PHY_INTERFACE_MODE_XAUI && 1863 state->interface != PHY_INTERFACE_MODE_USXGMII) 1864 state->interface = PHY_INTERFACE_MODE_NA; 1865 1866 return phylink_validate(pl, supported, state); 1867 } 1868 1869 static int phylink_bringup_phy(struct phylink *pl, struct phy_device *phy, 1870 phy_interface_t interface) 1871 { 1872 struct phylink_link_state config; 1873 __ETHTOOL_DECLARE_LINK_MODE_MASK(supported); 1874 char *irq_str; 1875 int ret; 1876 1877 /* 1878 * This is the new way of dealing with flow control for PHYs, 1879 * as described by Timur Tabi in commit 529ed1275263 ("net: phy: 1880 * phy drivers should not set SUPPORTED_[Asym_]Pause") except 1881 * using our validate call to the MAC, we rely upon the MAC 1882 * clearing the bits from both supported and advertising fields. 1883 */ 1884 phy_support_asym_pause(phy); 1885 1886 memset(&config, 0, sizeof(config)); 1887 linkmode_copy(supported, phy->supported); 1888 linkmode_copy(config.advertising, phy->advertising); 1889 config.interface = interface; 1890 1891 ret = phylink_validate_phy(pl, phy, supported, &config); 1892 if (ret) { 1893 phylink_warn(pl, "validation of %s with support %*pb and advertisement %*pb failed: %pe\n", 1894 phy_modes(config.interface), 1895 __ETHTOOL_LINK_MODE_MASK_NBITS, phy->supported, 1896 __ETHTOOL_LINK_MODE_MASK_NBITS, config.advertising, 1897 ERR_PTR(ret)); 1898 return ret; 1899 } 1900 1901 phy->phylink = pl; 1902 phy->phy_link_change = phylink_phy_change; 1903 1904 irq_str = phy_attached_info_irq(phy); 1905 phylink_info(pl, 1906 "PHY [%s] driver [%s] (irq=%s)\n", 1907 dev_name(&phy->mdio.dev), phy->drv->name, irq_str); 1908 kfree(irq_str); 1909 1910 mutex_lock(&phy->lock); 1911 mutex_lock(&pl->state_mutex); 1912 pl->phydev = phy; 1913 pl->phy_state.interface = interface; 1914 pl->phy_state.pause = MLO_PAUSE_NONE; 1915 pl->phy_state.speed = SPEED_UNKNOWN; 1916 pl->phy_state.duplex = DUPLEX_UNKNOWN; 1917 pl->phy_state.rate_matching = RATE_MATCH_NONE; 1918 linkmode_copy(pl->supported, supported); 1919 linkmode_copy(pl->link_config.advertising, config.advertising); 1920 1921 /* Restrict the phy advertisement according to the MAC support. */ 1922 linkmode_copy(phy->advertising, config.advertising); 1923 mutex_unlock(&pl->state_mutex); 1924 mutex_unlock(&phy->lock); 1925 1926 phylink_dbg(pl, 1927 "phy: %s setting supported %*pb advertising %*pb\n", 1928 phy_modes(interface), 1929 __ETHTOOL_LINK_MODE_MASK_NBITS, pl->supported, 1930 __ETHTOOL_LINK_MODE_MASK_NBITS, phy->advertising); 1931 1932 if (phy_interrupt_is_valid(phy)) 1933 phy_request_interrupt(phy); 1934 1935 if (pl->config->mac_managed_pm) 1936 phy->mac_managed_pm = true; 1937 1938 return 0; 1939 } 1940 1941 static int phylink_attach_phy(struct phylink *pl, struct phy_device *phy, 1942 phy_interface_t interface) 1943 { 1944 u32 flags = 0; 1945 1946 if (WARN_ON(pl->cfg_link_an_mode == MLO_AN_FIXED || 1947 (pl->cfg_link_an_mode == MLO_AN_INBAND && 1948 phy_interface_mode_is_8023z(interface) && !pl->sfp_bus))) 1949 return -EINVAL; 1950 1951 if (pl->phydev) 1952 return -EBUSY; 1953 1954 if (pl->config->mac_requires_rxc) 1955 flags |= PHY_F_RXC_ALWAYS_ON; 1956 1957 return phy_attach_direct(pl->netdev, phy, flags, interface); 1958 } 1959 1960 /** 1961 * phylink_connect_phy() - connect a PHY to the phylink instance 1962 * @pl: a pointer to a &struct phylink returned from phylink_create() 1963 * @phy: a pointer to a &struct phy_device. 1964 * 1965 * Connect @phy to the phylink instance specified by @pl by calling 1966 * phy_attach_direct(). Configure the @phy according to the MAC driver's 1967 * capabilities, start the PHYLIB state machine and enable any interrupts 1968 * that the PHY supports. 1969 * 1970 * This updates the phylink's ethtool supported and advertising link mode 1971 * masks. 1972 * 1973 * Returns 0 on success or a negative errno. 1974 */ 1975 int phylink_connect_phy(struct phylink *pl, struct phy_device *phy) 1976 { 1977 int ret; 1978 1979 /* Use PHY device/driver interface */ 1980 if (pl->link_interface == PHY_INTERFACE_MODE_NA) { 1981 pl->link_interface = phy->interface; 1982 pl->link_config.interface = pl->link_interface; 1983 } 1984 1985 ret = phylink_attach_phy(pl, phy, pl->link_interface); 1986 if (ret < 0) 1987 return ret; 1988 1989 ret = phylink_bringup_phy(pl, phy, pl->link_config.interface); 1990 if (ret) 1991 phy_detach(phy); 1992 1993 return ret; 1994 } 1995 EXPORT_SYMBOL_GPL(phylink_connect_phy); 1996 1997 /** 1998 * phylink_of_phy_connect() - connect the PHY specified in the DT mode. 1999 * @pl: a pointer to a &struct phylink returned from phylink_create() 2000 * @dn: a pointer to a &struct device_node. 2001 * @flags: PHY-specific flags to communicate to the PHY device driver 2002 * 2003 * Connect the phy specified in the device node @dn to the phylink instance 2004 * specified by @pl. Actions specified in phylink_connect_phy() will be 2005 * performed. 2006 * 2007 * Returns 0 on success or a negative errno. 2008 */ 2009 int phylink_of_phy_connect(struct phylink *pl, struct device_node *dn, 2010 u32 flags) 2011 { 2012 return phylink_fwnode_phy_connect(pl, of_fwnode_handle(dn), flags); 2013 } 2014 EXPORT_SYMBOL_GPL(phylink_of_phy_connect); 2015 2016 /** 2017 * phylink_fwnode_phy_connect() - connect the PHY specified in the fwnode. 2018 * @pl: a pointer to a &struct phylink returned from phylink_create() 2019 * @fwnode: a pointer to a &struct fwnode_handle. 2020 * @flags: PHY-specific flags to communicate to the PHY device driver 2021 * 2022 * Connect the phy specified @fwnode to the phylink instance specified 2023 * by @pl. 2024 * 2025 * Returns 0 on success or a negative errno. 2026 */ 2027 int phylink_fwnode_phy_connect(struct phylink *pl, 2028 const struct fwnode_handle *fwnode, 2029 u32 flags) 2030 { 2031 struct fwnode_handle *phy_fwnode; 2032 struct phy_device *phy_dev; 2033 int ret; 2034 2035 /* Fixed links and 802.3z are handled without needing a PHY */ 2036 if (pl->cfg_link_an_mode == MLO_AN_FIXED || 2037 (pl->cfg_link_an_mode == MLO_AN_INBAND && 2038 phy_interface_mode_is_8023z(pl->link_interface))) 2039 return 0; 2040 2041 phy_fwnode = fwnode_get_phy_node(fwnode); 2042 if (IS_ERR(phy_fwnode)) { 2043 if (pl->cfg_link_an_mode == MLO_AN_PHY) 2044 return -ENODEV; 2045 return 0; 2046 } 2047 2048 phy_dev = fwnode_phy_find_device(phy_fwnode); 2049 /* We're done with the phy_node handle */ 2050 fwnode_handle_put(phy_fwnode); 2051 if (!phy_dev) 2052 return -ENODEV; 2053 2054 /* Use PHY device/driver interface */ 2055 if (pl->link_interface == PHY_INTERFACE_MODE_NA) { 2056 pl->link_interface = phy_dev->interface; 2057 pl->link_config.interface = pl->link_interface; 2058 } 2059 2060 if (pl->config->mac_requires_rxc) 2061 flags |= PHY_F_RXC_ALWAYS_ON; 2062 2063 ret = phy_attach_direct(pl->netdev, phy_dev, flags, 2064 pl->link_interface); 2065 phy_device_free(phy_dev); 2066 if (ret) 2067 return ret; 2068 2069 ret = phylink_bringup_phy(pl, phy_dev, pl->link_config.interface); 2070 if (ret) 2071 phy_detach(phy_dev); 2072 2073 return ret; 2074 } 2075 EXPORT_SYMBOL_GPL(phylink_fwnode_phy_connect); 2076 2077 /** 2078 * phylink_disconnect_phy() - disconnect any PHY attached to the phylink 2079 * instance. 2080 * @pl: a pointer to a &struct phylink returned from phylink_create() 2081 * 2082 * Disconnect any current PHY from the phylink instance described by @pl. 2083 */ 2084 void phylink_disconnect_phy(struct phylink *pl) 2085 { 2086 struct phy_device *phy; 2087 2088 ASSERT_RTNL(); 2089 2090 phy = pl->phydev; 2091 if (phy) { 2092 mutex_lock(&phy->lock); 2093 mutex_lock(&pl->state_mutex); 2094 pl->phydev = NULL; 2095 mutex_unlock(&pl->state_mutex); 2096 mutex_unlock(&phy->lock); 2097 flush_work(&pl->resolve); 2098 2099 phy_disconnect(phy); 2100 } 2101 } 2102 EXPORT_SYMBOL_GPL(phylink_disconnect_phy); 2103 2104 static void phylink_link_changed(struct phylink *pl, bool up, const char *what) 2105 { 2106 if (!up) 2107 pl->mac_link_dropped = true; 2108 phylink_run_resolve(pl); 2109 phylink_dbg(pl, "%s link %s\n", what, up ? "up" : "down"); 2110 } 2111 2112 /** 2113 * phylink_mac_change() - notify phylink of a change in MAC state 2114 * @pl: a pointer to a &struct phylink returned from phylink_create() 2115 * @up: indicates whether the link is currently up. 2116 * 2117 * The MAC driver should call this driver when the state of its link 2118 * changes (eg, link failure, new negotiation results, etc.) 2119 */ 2120 void phylink_mac_change(struct phylink *pl, bool up) 2121 { 2122 phylink_link_changed(pl, up, "mac"); 2123 } 2124 EXPORT_SYMBOL_GPL(phylink_mac_change); 2125 2126 /** 2127 * phylink_pcs_change() - notify phylink of a change to PCS link state 2128 * @pcs: pointer to &struct phylink_pcs 2129 * @up: indicates whether the link is currently up. 2130 * 2131 * The PCS driver should call this when the state of its link changes 2132 * (e.g. link failure, new negotiation results, etc.) Note: it should 2133 * not determine "up" by reading the BMSR. If in doubt about the link 2134 * state at interrupt time, then pass true if pcs_get_state() returns 2135 * the latched link-down state, otherwise pass false. 2136 */ 2137 void phylink_pcs_change(struct phylink_pcs *pcs, bool up) 2138 { 2139 struct phylink *pl = pcs->phylink; 2140 2141 if (pl) 2142 phylink_link_changed(pl, up, "pcs"); 2143 } 2144 EXPORT_SYMBOL_GPL(phylink_pcs_change); 2145 2146 static irqreturn_t phylink_link_handler(int irq, void *data) 2147 { 2148 struct phylink *pl = data; 2149 2150 phylink_run_resolve(pl); 2151 2152 return IRQ_HANDLED; 2153 } 2154 2155 /** 2156 * phylink_start() - start a phylink instance 2157 * @pl: a pointer to a &struct phylink returned from phylink_create() 2158 * 2159 * Start the phylink instance specified by @pl, configuring the MAC for the 2160 * desired link mode(s) and negotiation style. This should be called from the 2161 * network device driver's &struct net_device_ops ndo_open() method. 2162 */ 2163 void phylink_start(struct phylink *pl) 2164 { 2165 bool poll = false; 2166 2167 ASSERT_RTNL(); 2168 2169 phylink_info(pl, "configuring for %s/%s link mode\n", 2170 phylink_an_mode_str(pl->cur_link_an_mode), 2171 phy_modes(pl->link_config.interface)); 2172 2173 /* Always set the carrier off */ 2174 if (pl->netdev) 2175 netif_carrier_off(pl->netdev); 2176 2177 pl->pcs_state = PCS_STATE_STARTING; 2178 2179 /* Apply the link configuration to the MAC when starting. This allows 2180 * a fixed-link to start with the correct parameters, and also 2181 * ensures that we set the appropriate advertisement for Serdes links. 2182 * 2183 * Restart autonegotiation if using 802.3z to ensure that the link 2184 * parameters are properly negotiated. This is necessary for DSA 2185 * switches using 802.3z negotiation to ensure they see our modes. 2186 */ 2187 phylink_mac_initial_config(pl, true); 2188 2189 pl->pcs_state = PCS_STATE_STARTED; 2190 2191 phylink_enable_and_run_resolve(pl, PHYLINK_DISABLE_STOPPED); 2192 2193 if (pl->cfg_link_an_mode == MLO_AN_FIXED && pl->link_gpio) { 2194 int irq = gpiod_to_irq(pl->link_gpio); 2195 2196 if (irq > 0) { 2197 if (!request_irq(irq, phylink_link_handler, 2198 IRQF_TRIGGER_RISING | 2199 IRQF_TRIGGER_FALLING, 2200 "netdev link", pl)) 2201 pl->link_irq = irq; 2202 else 2203 irq = 0; 2204 } 2205 if (irq <= 0) 2206 poll = true; 2207 } 2208 2209 if (pl->cfg_link_an_mode == MLO_AN_FIXED) 2210 poll |= pl->config->poll_fixed_state; 2211 2212 if (poll) 2213 mod_timer(&pl->link_poll, jiffies + HZ); 2214 if (pl->phydev) 2215 phy_start(pl->phydev); 2216 if (pl->sfp_bus) 2217 sfp_upstream_start(pl->sfp_bus); 2218 } 2219 EXPORT_SYMBOL_GPL(phylink_start); 2220 2221 /** 2222 * phylink_stop() - stop a phylink instance 2223 * @pl: a pointer to a &struct phylink returned from phylink_create() 2224 * 2225 * Stop the phylink instance specified by @pl. This should be called from the 2226 * network device driver's &struct net_device_ops ndo_stop() method. The 2227 * network device's carrier state should not be changed prior to calling this 2228 * function. 2229 * 2230 * This will synchronously bring down the link if the link is not already 2231 * down (in other words, it will trigger a mac_link_down() method call.) 2232 */ 2233 void phylink_stop(struct phylink *pl) 2234 { 2235 ASSERT_RTNL(); 2236 2237 if (pl->sfp_bus) 2238 sfp_upstream_stop(pl->sfp_bus); 2239 if (pl->phydev) 2240 phy_stop(pl->phydev); 2241 del_timer_sync(&pl->link_poll); 2242 if (pl->link_irq) { 2243 free_irq(pl->link_irq, pl); 2244 pl->link_irq = 0; 2245 } 2246 2247 phylink_run_resolve_and_disable(pl, PHYLINK_DISABLE_STOPPED); 2248 2249 pl->pcs_state = PCS_STATE_DOWN; 2250 2251 phylink_pcs_disable(pl->pcs); 2252 } 2253 EXPORT_SYMBOL_GPL(phylink_stop); 2254 2255 /** 2256 * phylink_suspend() - handle a network device suspend event 2257 * @pl: a pointer to a &struct phylink returned from phylink_create() 2258 * @mac_wol: true if the MAC needs to receive packets for Wake-on-Lan 2259 * 2260 * Handle a network device suspend event. There are several cases: 2261 * 2262 * - If Wake-on-Lan is not active, we can bring down the link between 2263 * the MAC and PHY by calling phylink_stop(). 2264 * - If Wake-on-Lan is active, and being handled only by the PHY, we 2265 * can also bring down the link between the MAC and PHY. 2266 * - If Wake-on-Lan is active, but being handled by the MAC, the MAC 2267 * still needs to receive packets, so we can not bring the link down. 2268 */ 2269 void phylink_suspend(struct phylink *pl, bool mac_wol) 2270 { 2271 ASSERT_RTNL(); 2272 2273 if (mac_wol && (!pl->netdev || pl->netdev->wol_enabled)) { 2274 /* Wake-on-Lan enabled, MAC handling */ 2275 mutex_lock(&pl->state_mutex); 2276 2277 /* Stop the resolver bringing the link up */ 2278 __set_bit(PHYLINK_DISABLE_MAC_WOL, &pl->phylink_disable_state); 2279 2280 /* Disable the carrier, to prevent transmit timeouts, 2281 * but one would hope all packets have been sent. This 2282 * also means phylink_resolve() will do nothing. 2283 */ 2284 if (pl->netdev) 2285 netif_carrier_off(pl->netdev); 2286 else 2287 pl->old_link_state = false; 2288 2289 /* We do not call mac_link_down() here as we want the 2290 * link to remain up to receive the WoL packets. 2291 */ 2292 mutex_unlock(&pl->state_mutex); 2293 } else { 2294 phylink_stop(pl); 2295 } 2296 } 2297 EXPORT_SYMBOL_GPL(phylink_suspend); 2298 2299 /** 2300 * phylink_resume() - handle a network device resume event 2301 * @pl: a pointer to a &struct phylink returned from phylink_create() 2302 * 2303 * Undo the effects of phylink_suspend(), returning the link to an 2304 * operational state. 2305 */ 2306 void phylink_resume(struct phylink *pl) 2307 { 2308 ASSERT_RTNL(); 2309 2310 if (test_bit(PHYLINK_DISABLE_MAC_WOL, &pl->phylink_disable_state)) { 2311 /* Wake-on-Lan enabled, MAC handling */ 2312 2313 /* Call mac_link_down() so we keep the overall state balanced. 2314 * Do this under the state_mutex lock for consistency. This 2315 * will cause a "Link Down" message to be printed during 2316 * resume, which is harmless - the true link state will be 2317 * printed when we run a resolve. 2318 */ 2319 mutex_lock(&pl->state_mutex); 2320 phylink_link_down(pl); 2321 mutex_unlock(&pl->state_mutex); 2322 2323 /* Re-apply the link parameters so that all the settings get 2324 * restored to the MAC. 2325 */ 2326 phylink_mac_initial_config(pl, true); 2327 2328 /* Re-enable and re-resolve the link parameters */ 2329 phylink_enable_and_run_resolve(pl, PHYLINK_DISABLE_MAC_WOL); 2330 } else { 2331 phylink_start(pl); 2332 } 2333 } 2334 EXPORT_SYMBOL_GPL(phylink_resume); 2335 2336 /** 2337 * phylink_ethtool_get_wol() - get the wake on lan parameters for the PHY 2338 * @pl: a pointer to a &struct phylink returned from phylink_create() 2339 * @wol: a pointer to &struct ethtool_wolinfo to hold the read parameters 2340 * 2341 * Read the wake on lan parameters from the PHY attached to the phylink 2342 * instance specified by @pl. If no PHY is currently attached, report no 2343 * support for wake on lan. 2344 */ 2345 void phylink_ethtool_get_wol(struct phylink *pl, struct ethtool_wolinfo *wol) 2346 { 2347 ASSERT_RTNL(); 2348 2349 wol->supported = 0; 2350 wol->wolopts = 0; 2351 2352 if (pl->phydev) 2353 phy_ethtool_get_wol(pl->phydev, wol); 2354 } 2355 EXPORT_SYMBOL_GPL(phylink_ethtool_get_wol); 2356 2357 /** 2358 * phylink_ethtool_set_wol() - set wake on lan parameters 2359 * @pl: a pointer to a &struct phylink returned from phylink_create() 2360 * @wol: a pointer to &struct ethtool_wolinfo for the desired parameters 2361 * 2362 * Set the wake on lan parameters for the PHY attached to the phylink 2363 * instance specified by @pl. If no PHY is attached, returns %EOPNOTSUPP 2364 * error. 2365 * 2366 * Returns zero on success or negative errno code. 2367 */ 2368 int phylink_ethtool_set_wol(struct phylink *pl, struct ethtool_wolinfo *wol) 2369 { 2370 int ret = -EOPNOTSUPP; 2371 2372 ASSERT_RTNL(); 2373 2374 if (pl->phydev) 2375 ret = phy_ethtool_set_wol(pl->phydev, wol); 2376 2377 return ret; 2378 } 2379 EXPORT_SYMBOL_GPL(phylink_ethtool_set_wol); 2380 2381 static void phylink_merge_link_mode(unsigned long *dst, const unsigned long *b) 2382 { 2383 __ETHTOOL_DECLARE_LINK_MODE_MASK(mask); 2384 2385 linkmode_zero(mask); 2386 phylink_set_port_modes(mask); 2387 2388 linkmode_and(dst, dst, mask); 2389 linkmode_or(dst, dst, b); 2390 } 2391 2392 static void phylink_get_ksettings(const struct phylink_link_state *state, 2393 struct ethtool_link_ksettings *kset) 2394 { 2395 phylink_merge_link_mode(kset->link_modes.advertising, state->advertising); 2396 linkmode_copy(kset->link_modes.lp_advertising, state->lp_advertising); 2397 if (kset->base.rate_matching == RATE_MATCH_NONE) { 2398 kset->base.speed = state->speed; 2399 kset->base.duplex = state->duplex; 2400 } 2401 kset->base.autoneg = linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, 2402 state->advertising) ? 2403 AUTONEG_ENABLE : AUTONEG_DISABLE; 2404 } 2405 2406 /** 2407 * phylink_ethtool_ksettings_get() - get the current link settings 2408 * @pl: a pointer to a &struct phylink returned from phylink_create() 2409 * @kset: a pointer to a &struct ethtool_link_ksettings to hold link settings 2410 * 2411 * Read the current link settings for the phylink instance specified by @pl. 2412 * This will be the link settings read from the MAC, PHY or fixed link 2413 * settings depending on the current negotiation mode. 2414 */ 2415 int phylink_ethtool_ksettings_get(struct phylink *pl, 2416 struct ethtool_link_ksettings *kset) 2417 { 2418 struct phylink_link_state link_state; 2419 2420 ASSERT_RTNL(); 2421 2422 if (pl->phydev) 2423 phy_ethtool_ksettings_get(pl->phydev, kset); 2424 else 2425 kset->base.port = pl->link_port; 2426 2427 linkmode_copy(kset->link_modes.supported, pl->supported); 2428 2429 switch (pl->cur_link_an_mode) { 2430 case MLO_AN_FIXED: 2431 /* We are using fixed settings. Report these as the 2432 * current link settings - and note that these also 2433 * represent the supported speeds/duplex/pause modes. 2434 */ 2435 phylink_get_fixed_state(pl, &link_state); 2436 phylink_get_ksettings(&link_state, kset); 2437 break; 2438 2439 case MLO_AN_INBAND: 2440 /* If there is a phy attached, then use the reported 2441 * settings from the phy with no modification. 2442 */ 2443 if (pl->phydev) 2444 break; 2445 2446 phylink_mac_pcs_get_state(pl, &link_state); 2447 2448 /* The MAC is reporting the link results from its own PCS 2449 * layer via in-band status. Report these as the current 2450 * link settings. 2451 */ 2452 phylink_get_ksettings(&link_state, kset); 2453 break; 2454 } 2455 2456 return 0; 2457 } 2458 EXPORT_SYMBOL_GPL(phylink_ethtool_ksettings_get); 2459 2460 /** 2461 * phylink_ethtool_ksettings_set() - set the link settings 2462 * @pl: a pointer to a &struct phylink returned from phylink_create() 2463 * @kset: a pointer to a &struct ethtool_link_ksettings for the desired modes 2464 */ 2465 int phylink_ethtool_ksettings_set(struct phylink *pl, 2466 const struct ethtool_link_ksettings *kset) 2467 { 2468 __ETHTOOL_DECLARE_LINK_MODE_MASK(support); 2469 struct phylink_link_state config; 2470 const struct phy_setting *s; 2471 2472 ASSERT_RTNL(); 2473 2474 if (pl->phydev) { 2475 struct ethtool_link_ksettings phy_kset = *kset; 2476 2477 linkmode_and(phy_kset.link_modes.advertising, 2478 phy_kset.link_modes.advertising, 2479 pl->supported); 2480 2481 /* We can rely on phylib for this update; we also do not need 2482 * to update the pl->link_config settings: 2483 * - the configuration returned via ksettings_get() will come 2484 * from phylib whenever a PHY is present. 2485 * - link_config.interface will be updated by the PHY calling 2486 * back via phylink_phy_change() and a subsequent resolve. 2487 * - initial link configuration for PHY mode comes from the 2488 * last phy state updated via phylink_phy_change(). 2489 * - other configuration changes (e.g. pause modes) are 2490 * performed directly via phylib. 2491 * - if in in-band mode with a PHY, the link configuration 2492 * is passed on the link from the PHY, and all of 2493 * link_config.{speed,duplex,an_enabled,pause} are not used. 2494 * - the only possible use would be link_config.advertising 2495 * pause modes when in 1000base-X mode with a PHY, but in 2496 * the presence of a PHY, this should not be changed as that 2497 * should be determined from the media side advertisement. 2498 */ 2499 return phy_ethtool_ksettings_set(pl->phydev, &phy_kset); 2500 } 2501 2502 config = pl->link_config; 2503 /* Mask out unsupported advertisements */ 2504 linkmode_and(config.advertising, kset->link_modes.advertising, 2505 pl->supported); 2506 2507 /* FIXME: should we reject autoneg if phy/mac does not support it? */ 2508 switch (kset->base.autoneg) { 2509 case AUTONEG_DISABLE: 2510 /* Autonegotiation disabled, select a suitable speed and 2511 * duplex. 2512 */ 2513 s = phy_lookup_setting(kset->base.speed, kset->base.duplex, 2514 pl->supported, false); 2515 if (!s) 2516 return -EINVAL; 2517 2518 /* If we have a fixed link, refuse to change link parameters. 2519 * If the link parameters match, accept them but do nothing. 2520 */ 2521 if (pl->cur_link_an_mode == MLO_AN_FIXED) { 2522 if (s->speed != pl->link_config.speed || 2523 s->duplex != pl->link_config.duplex) 2524 return -EINVAL; 2525 return 0; 2526 } 2527 2528 config.speed = s->speed; 2529 config.duplex = s->duplex; 2530 break; 2531 2532 case AUTONEG_ENABLE: 2533 /* If we have a fixed link, allow autonegotiation (since that 2534 * is our default case) but do not allow the advertisement to 2535 * be changed. If the advertisement matches, simply return. 2536 */ 2537 if (pl->cur_link_an_mode == MLO_AN_FIXED) { 2538 if (!linkmode_equal(config.advertising, 2539 pl->link_config.advertising)) 2540 return -EINVAL; 2541 return 0; 2542 } 2543 2544 config.speed = SPEED_UNKNOWN; 2545 config.duplex = DUPLEX_UNKNOWN; 2546 break; 2547 2548 default: 2549 return -EINVAL; 2550 } 2551 2552 /* We have ruled out the case with a PHY attached, and the 2553 * fixed-link cases. All that is left are in-band links. 2554 */ 2555 linkmode_mod_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, config.advertising, 2556 kset->base.autoneg == AUTONEG_ENABLE); 2557 2558 /* If this link is with an SFP, ensure that changes to advertised modes 2559 * also cause the associated interface to be selected such that the 2560 * link can be configured correctly. 2561 */ 2562 if (pl->sfp_bus) { 2563 config.interface = sfp_select_interface(pl->sfp_bus, 2564 config.advertising); 2565 if (config.interface == PHY_INTERFACE_MODE_NA) { 2566 phylink_err(pl, 2567 "selection of interface failed, advertisement %*pb\n", 2568 __ETHTOOL_LINK_MODE_MASK_NBITS, 2569 config.advertising); 2570 return -EINVAL; 2571 } 2572 2573 /* Revalidate with the selected interface */ 2574 linkmode_copy(support, pl->supported); 2575 if (phylink_validate(pl, support, &config)) { 2576 phylink_err(pl, "validation of %s/%s with support %*pb failed\n", 2577 phylink_an_mode_str(pl->cur_link_an_mode), 2578 phy_modes(config.interface), 2579 __ETHTOOL_LINK_MODE_MASK_NBITS, support); 2580 return -EINVAL; 2581 } 2582 } else { 2583 /* Validate without changing the current supported mask. */ 2584 linkmode_copy(support, pl->supported); 2585 if (phylink_validate(pl, support, &config)) 2586 return -EINVAL; 2587 } 2588 2589 /* If autonegotiation is enabled, we must have an advertisement */ 2590 if (linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, 2591 config.advertising) && 2592 phylink_is_empty_linkmode(config.advertising)) 2593 return -EINVAL; 2594 2595 mutex_lock(&pl->state_mutex); 2596 pl->link_config.speed = config.speed; 2597 pl->link_config.duplex = config.duplex; 2598 2599 if (pl->link_config.interface != config.interface) { 2600 /* The interface changed, e.g. 1000base-X <-> 2500base-X */ 2601 /* We need to force the link down, then change the interface */ 2602 if (pl->old_link_state) { 2603 phylink_link_down(pl); 2604 pl->old_link_state = false; 2605 } 2606 if (!test_bit(PHYLINK_DISABLE_STOPPED, 2607 &pl->phylink_disable_state)) 2608 phylink_major_config(pl, false, &config); 2609 pl->link_config.interface = config.interface; 2610 linkmode_copy(pl->link_config.advertising, config.advertising); 2611 } else if (!linkmode_equal(pl->link_config.advertising, 2612 config.advertising)) { 2613 linkmode_copy(pl->link_config.advertising, config.advertising); 2614 phylink_change_inband_advert(pl); 2615 } 2616 mutex_unlock(&pl->state_mutex); 2617 2618 return 0; 2619 } 2620 EXPORT_SYMBOL_GPL(phylink_ethtool_ksettings_set); 2621 2622 /** 2623 * phylink_ethtool_nway_reset() - restart negotiation 2624 * @pl: a pointer to a &struct phylink returned from phylink_create() 2625 * 2626 * Restart negotiation for the phylink instance specified by @pl. This will 2627 * cause any attached phy to restart negotiation with the link partner, and 2628 * if the MAC is in a BaseX mode, the MAC will also be requested to restart 2629 * negotiation. 2630 * 2631 * Returns zero on success, or negative error code. 2632 */ 2633 int phylink_ethtool_nway_reset(struct phylink *pl) 2634 { 2635 int ret = 0; 2636 2637 ASSERT_RTNL(); 2638 2639 if (pl->phydev) 2640 ret = phy_restart_aneg(pl->phydev); 2641 phylink_pcs_an_restart(pl); 2642 2643 return ret; 2644 } 2645 EXPORT_SYMBOL_GPL(phylink_ethtool_nway_reset); 2646 2647 /** 2648 * phylink_ethtool_get_pauseparam() - get the current pause parameters 2649 * @pl: a pointer to a &struct phylink returned from phylink_create() 2650 * @pause: a pointer to a &struct ethtool_pauseparam 2651 */ 2652 void phylink_ethtool_get_pauseparam(struct phylink *pl, 2653 struct ethtool_pauseparam *pause) 2654 { 2655 ASSERT_RTNL(); 2656 2657 pause->autoneg = !!(pl->link_config.pause & MLO_PAUSE_AN); 2658 pause->rx_pause = !!(pl->link_config.pause & MLO_PAUSE_RX); 2659 pause->tx_pause = !!(pl->link_config.pause & MLO_PAUSE_TX); 2660 } 2661 EXPORT_SYMBOL_GPL(phylink_ethtool_get_pauseparam); 2662 2663 /** 2664 * phylink_ethtool_set_pauseparam() - set the current pause parameters 2665 * @pl: a pointer to a &struct phylink returned from phylink_create() 2666 * @pause: a pointer to a &struct ethtool_pauseparam 2667 */ 2668 int phylink_ethtool_set_pauseparam(struct phylink *pl, 2669 struct ethtool_pauseparam *pause) 2670 { 2671 struct phylink_link_state *config = &pl->link_config; 2672 bool manual_changed; 2673 int pause_state; 2674 2675 ASSERT_RTNL(); 2676 2677 if (pl->cur_link_an_mode == MLO_AN_FIXED) 2678 return -EOPNOTSUPP; 2679 2680 if (!phylink_test(pl->supported, Pause) && 2681 !phylink_test(pl->supported, Asym_Pause)) 2682 return -EOPNOTSUPP; 2683 2684 if (!phylink_test(pl->supported, Asym_Pause) && 2685 pause->rx_pause != pause->tx_pause) 2686 return -EINVAL; 2687 2688 pause_state = 0; 2689 if (pause->autoneg) 2690 pause_state |= MLO_PAUSE_AN; 2691 if (pause->rx_pause) 2692 pause_state |= MLO_PAUSE_RX; 2693 if (pause->tx_pause) 2694 pause_state |= MLO_PAUSE_TX; 2695 2696 mutex_lock(&pl->state_mutex); 2697 /* 2698 * See the comments for linkmode_set_pause(), wrt the deficiencies 2699 * with the current implementation. A solution to this issue would 2700 * be: 2701 * ethtool Local device 2702 * rx tx Pause AsymDir 2703 * 0 0 0 0 2704 * 1 0 1 1 2705 * 0 1 0 1 2706 * 1 1 1 1 2707 * and then use the ethtool rx/tx enablement status to mask the 2708 * rx/tx pause resolution. 2709 */ 2710 linkmode_set_pause(config->advertising, pause->tx_pause, 2711 pause->rx_pause); 2712 2713 manual_changed = (config->pause ^ pause_state) & MLO_PAUSE_AN || 2714 (!(pause_state & MLO_PAUSE_AN) && 2715 (config->pause ^ pause_state) & MLO_PAUSE_TXRX_MASK); 2716 2717 config->pause = pause_state; 2718 2719 /* Update our in-band advertisement, triggering a renegotiation if 2720 * the advertisement changed. 2721 */ 2722 if (!pl->phydev) 2723 phylink_change_inband_advert(pl); 2724 2725 mutex_unlock(&pl->state_mutex); 2726 2727 /* If we have a PHY, a change of the pause frame advertisement will 2728 * cause phylib to renegotiate (if AN is enabled) which will in turn 2729 * call our phylink_phy_change() and trigger a resolve. Note that 2730 * we can't hold our state mutex while calling phy_set_asym_pause(). 2731 */ 2732 if (pl->phydev) 2733 phy_set_asym_pause(pl->phydev, pause->rx_pause, 2734 pause->tx_pause); 2735 2736 /* If the manual pause settings changed, make sure we trigger a 2737 * resolve to update their state; we can not guarantee that the 2738 * link will cycle. 2739 */ 2740 if (manual_changed) { 2741 pl->mac_link_dropped = true; 2742 phylink_run_resolve(pl); 2743 } 2744 2745 return 0; 2746 } 2747 EXPORT_SYMBOL_GPL(phylink_ethtool_set_pauseparam); 2748 2749 /** 2750 * phylink_get_eee_err() - read the energy efficient ethernet error 2751 * counter 2752 * @pl: a pointer to a &struct phylink returned from phylink_create(). 2753 * 2754 * Read the Energy Efficient Ethernet error counter from the PHY associated 2755 * with the phylink instance specified by @pl. 2756 * 2757 * Returns positive error counter value, or negative error code. 2758 */ 2759 int phylink_get_eee_err(struct phylink *pl) 2760 { 2761 int ret = 0; 2762 2763 ASSERT_RTNL(); 2764 2765 if (pl->phydev) 2766 ret = phy_get_eee_err(pl->phydev); 2767 2768 return ret; 2769 } 2770 EXPORT_SYMBOL_GPL(phylink_get_eee_err); 2771 2772 /** 2773 * phylink_init_eee() - init and check the EEE features 2774 * @pl: a pointer to a &struct phylink returned from phylink_create() 2775 * @clk_stop_enable: allow PHY to stop receive clock 2776 * 2777 * Must be called either with RTNL held or within mac_link_up() 2778 */ 2779 int phylink_init_eee(struct phylink *pl, bool clk_stop_enable) 2780 { 2781 int ret = -EOPNOTSUPP; 2782 2783 if (pl->phydev) 2784 ret = phy_init_eee(pl->phydev, clk_stop_enable); 2785 2786 return ret; 2787 } 2788 EXPORT_SYMBOL_GPL(phylink_init_eee); 2789 2790 /** 2791 * phylink_ethtool_get_eee() - read the energy efficient ethernet parameters 2792 * @pl: a pointer to a &struct phylink returned from phylink_create() 2793 * @eee: a pointer to a &struct ethtool_keee for the read parameters 2794 */ 2795 int phylink_ethtool_get_eee(struct phylink *pl, struct ethtool_keee *eee) 2796 { 2797 int ret = -EOPNOTSUPP; 2798 2799 ASSERT_RTNL(); 2800 2801 if (pl->phydev) 2802 ret = phy_ethtool_get_eee(pl->phydev, eee); 2803 2804 return ret; 2805 } 2806 EXPORT_SYMBOL_GPL(phylink_ethtool_get_eee); 2807 2808 /** 2809 * phylink_ethtool_set_eee() - set the energy efficient ethernet parameters 2810 * @pl: a pointer to a &struct phylink returned from phylink_create() 2811 * @eee: a pointer to a &struct ethtool_keee for the desired parameters 2812 */ 2813 int phylink_ethtool_set_eee(struct phylink *pl, struct ethtool_keee *eee) 2814 { 2815 int ret = -EOPNOTSUPP; 2816 2817 ASSERT_RTNL(); 2818 2819 if (pl->phydev) 2820 ret = phy_ethtool_set_eee(pl->phydev, eee); 2821 2822 return ret; 2823 } 2824 EXPORT_SYMBOL_GPL(phylink_ethtool_set_eee); 2825 2826 /* This emulates MII registers for a fixed-mode phy operating as per the 2827 * passed in state. "aneg" defines if we report negotiation is possible. 2828 * 2829 * FIXME: should deal with negotiation state too. 2830 */ 2831 static int phylink_mii_emul_read(unsigned int reg, 2832 struct phylink_link_state *state) 2833 { 2834 struct fixed_phy_status fs; 2835 unsigned long *lpa = state->lp_advertising; 2836 int val; 2837 2838 fs.link = state->link; 2839 fs.speed = state->speed; 2840 fs.duplex = state->duplex; 2841 fs.pause = test_bit(ETHTOOL_LINK_MODE_Pause_BIT, lpa); 2842 fs.asym_pause = test_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, lpa); 2843 2844 val = swphy_read_reg(reg, &fs); 2845 if (reg == MII_BMSR) { 2846 if (!state->an_complete) 2847 val &= ~BMSR_ANEGCOMPLETE; 2848 } 2849 return val; 2850 } 2851 2852 static int phylink_phy_read(struct phylink *pl, unsigned int phy_id, 2853 unsigned int reg) 2854 { 2855 struct phy_device *phydev = pl->phydev; 2856 int prtad, devad; 2857 2858 if (mdio_phy_id_is_c45(phy_id)) { 2859 prtad = mdio_phy_id_prtad(phy_id); 2860 devad = mdio_phy_id_devad(phy_id); 2861 return mdiobus_c45_read(pl->phydev->mdio.bus, prtad, devad, 2862 reg); 2863 } 2864 2865 if (phydev->is_c45) { 2866 switch (reg) { 2867 case MII_BMCR: 2868 case MII_BMSR: 2869 case MII_PHYSID1: 2870 case MII_PHYSID2: 2871 devad = __ffs(phydev->c45_ids.mmds_present); 2872 break; 2873 case MII_ADVERTISE: 2874 case MII_LPA: 2875 if (!(phydev->c45_ids.mmds_present & MDIO_DEVS_AN)) 2876 return -EINVAL; 2877 devad = MDIO_MMD_AN; 2878 if (reg == MII_ADVERTISE) 2879 reg = MDIO_AN_ADVERTISE; 2880 else 2881 reg = MDIO_AN_LPA; 2882 break; 2883 default: 2884 return -EINVAL; 2885 } 2886 prtad = phy_id; 2887 return mdiobus_c45_read(pl->phydev->mdio.bus, prtad, devad, 2888 reg); 2889 } 2890 2891 return mdiobus_read(pl->phydev->mdio.bus, phy_id, reg); 2892 } 2893 2894 static int phylink_phy_write(struct phylink *pl, unsigned int phy_id, 2895 unsigned int reg, unsigned int val) 2896 { 2897 struct phy_device *phydev = pl->phydev; 2898 int prtad, devad; 2899 2900 if (mdio_phy_id_is_c45(phy_id)) { 2901 prtad = mdio_phy_id_prtad(phy_id); 2902 devad = mdio_phy_id_devad(phy_id); 2903 return mdiobus_c45_write(pl->phydev->mdio.bus, prtad, devad, 2904 reg, val); 2905 } 2906 2907 if (phydev->is_c45) { 2908 switch (reg) { 2909 case MII_BMCR: 2910 case MII_BMSR: 2911 case MII_PHYSID1: 2912 case MII_PHYSID2: 2913 devad = __ffs(phydev->c45_ids.mmds_present); 2914 break; 2915 case MII_ADVERTISE: 2916 case MII_LPA: 2917 if (!(phydev->c45_ids.mmds_present & MDIO_DEVS_AN)) 2918 return -EINVAL; 2919 devad = MDIO_MMD_AN; 2920 if (reg == MII_ADVERTISE) 2921 reg = MDIO_AN_ADVERTISE; 2922 else 2923 reg = MDIO_AN_LPA; 2924 break; 2925 default: 2926 return -EINVAL; 2927 } 2928 return mdiobus_c45_write(pl->phydev->mdio.bus, phy_id, devad, 2929 reg, val); 2930 } 2931 2932 return mdiobus_write(phydev->mdio.bus, phy_id, reg, val); 2933 } 2934 2935 static int phylink_mii_read(struct phylink *pl, unsigned int phy_id, 2936 unsigned int reg) 2937 { 2938 struct phylink_link_state state; 2939 int val = 0xffff; 2940 2941 switch (pl->cur_link_an_mode) { 2942 case MLO_AN_FIXED: 2943 if (phy_id == 0) { 2944 phylink_get_fixed_state(pl, &state); 2945 val = phylink_mii_emul_read(reg, &state); 2946 } 2947 break; 2948 2949 case MLO_AN_PHY: 2950 return -EOPNOTSUPP; 2951 2952 case MLO_AN_INBAND: 2953 if (phy_id == 0) { 2954 phylink_mac_pcs_get_state(pl, &state); 2955 val = phylink_mii_emul_read(reg, &state); 2956 } 2957 break; 2958 } 2959 2960 return val & 0xffff; 2961 } 2962 2963 static int phylink_mii_write(struct phylink *pl, unsigned int phy_id, 2964 unsigned int reg, unsigned int val) 2965 { 2966 switch (pl->cur_link_an_mode) { 2967 case MLO_AN_FIXED: 2968 break; 2969 2970 case MLO_AN_PHY: 2971 return -EOPNOTSUPP; 2972 2973 case MLO_AN_INBAND: 2974 break; 2975 } 2976 2977 return 0; 2978 } 2979 2980 /** 2981 * phylink_mii_ioctl() - generic mii ioctl interface 2982 * @pl: a pointer to a &struct phylink returned from phylink_create() 2983 * @ifr: a pointer to a &struct ifreq for socket ioctls 2984 * @cmd: ioctl cmd to execute 2985 * 2986 * Perform the specified MII ioctl on the PHY attached to the phylink instance 2987 * specified by @pl. If no PHY is attached, emulate the presence of the PHY. 2988 * 2989 * Returns: zero on success or negative error code. 2990 * 2991 * %SIOCGMIIPHY: 2992 * read register from the current PHY. 2993 * %SIOCGMIIREG: 2994 * read register from the specified PHY. 2995 * %SIOCSMIIREG: 2996 * set a register on the specified PHY. 2997 */ 2998 int phylink_mii_ioctl(struct phylink *pl, struct ifreq *ifr, int cmd) 2999 { 3000 struct mii_ioctl_data *mii = if_mii(ifr); 3001 int ret; 3002 3003 ASSERT_RTNL(); 3004 3005 if (pl->phydev) { 3006 /* PHYs only exist for MLO_AN_PHY and SGMII */ 3007 switch (cmd) { 3008 case SIOCGMIIPHY: 3009 mii->phy_id = pl->phydev->mdio.addr; 3010 fallthrough; 3011 3012 case SIOCGMIIREG: 3013 ret = phylink_phy_read(pl, mii->phy_id, mii->reg_num); 3014 if (ret >= 0) { 3015 mii->val_out = ret; 3016 ret = 0; 3017 } 3018 break; 3019 3020 case SIOCSMIIREG: 3021 ret = phylink_phy_write(pl, mii->phy_id, mii->reg_num, 3022 mii->val_in); 3023 break; 3024 3025 default: 3026 ret = phy_mii_ioctl(pl->phydev, ifr, cmd); 3027 break; 3028 } 3029 } else { 3030 switch (cmd) { 3031 case SIOCGMIIPHY: 3032 mii->phy_id = 0; 3033 fallthrough; 3034 3035 case SIOCGMIIREG: 3036 ret = phylink_mii_read(pl, mii->phy_id, mii->reg_num); 3037 if (ret >= 0) { 3038 mii->val_out = ret; 3039 ret = 0; 3040 } 3041 break; 3042 3043 case SIOCSMIIREG: 3044 ret = phylink_mii_write(pl, mii->phy_id, mii->reg_num, 3045 mii->val_in); 3046 break; 3047 3048 default: 3049 ret = -EOPNOTSUPP; 3050 break; 3051 } 3052 } 3053 3054 return ret; 3055 } 3056 EXPORT_SYMBOL_GPL(phylink_mii_ioctl); 3057 3058 /** 3059 * phylink_speed_down() - set the non-SFP PHY to lowest speed supported by both 3060 * link partners 3061 * @pl: a pointer to a &struct phylink returned from phylink_create() 3062 * @sync: perform action synchronously 3063 * 3064 * If we have a PHY that is not part of a SFP module, then set the speed 3065 * as described in the phy_speed_down() function. Please see this function 3066 * for a description of the @sync parameter. 3067 * 3068 * Returns zero if there is no PHY, otherwise as per phy_speed_down(). 3069 */ 3070 int phylink_speed_down(struct phylink *pl, bool sync) 3071 { 3072 int ret = 0; 3073 3074 ASSERT_RTNL(); 3075 3076 if (!pl->sfp_bus && pl->phydev) 3077 ret = phy_speed_down(pl->phydev, sync); 3078 3079 return ret; 3080 } 3081 EXPORT_SYMBOL_GPL(phylink_speed_down); 3082 3083 /** 3084 * phylink_speed_up() - restore the advertised speeds prior to the call to 3085 * phylink_speed_down() 3086 * @pl: a pointer to a &struct phylink returned from phylink_create() 3087 * 3088 * If we have a PHY that is not part of a SFP module, then restore the 3089 * PHY speeds as per phy_speed_up(). 3090 * 3091 * Returns zero if there is no PHY, otherwise as per phy_speed_up(). 3092 */ 3093 int phylink_speed_up(struct phylink *pl) 3094 { 3095 int ret = 0; 3096 3097 ASSERT_RTNL(); 3098 3099 if (!pl->sfp_bus && pl->phydev) 3100 ret = phy_speed_up(pl->phydev); 3101 3102 return ret; 3103 } 3104 EXPORT_SYMBOL_GPL(phylink_speed_up); 3105 3106 static void phylink_sfp_attach(void *upstream, struct sfp_bus *bus) 3107 { 3108 struct phylink *pl = upstream; 3109 3110 pl->netdev->sfp_bus = bus; 3111 } 3112 3113 static void phylink_sfp_detach(void *upstream, struct sfp_bus *bus) 3114 { 3115 struct phylink *pl = upstream; 3116 3117 pl->netdev->sfp_bus = NULL; 3118 } 3119 3120 static phy_interface_t phylink_choose_sfp_interface(struct phylink *pl, 3121 const unsigned long *intf) 3122 { 3123 phy_interface_t interface; 3124 size_t i; 3125 3126 interface = PHY_INTERFACE_MODE_NA; 3127 for (i = 0; i < ARRAY_SIZE(phylink_sfp_interface_preference); i++) 3128 if (test_bit(phylink_sfp_interface_preference[i], intf)) { 3129 interface = phylink_sfp_interface_preference[i]; 3130 break; 3131 } 3132 3133 return interface; 3134 } 3135 3136 static void phylink_sfp_set_config(struct phylink *pl, u8 mode, 3137 unsigned long *supported, 3138 struct phylink_link_state *state) 3139 { 3140 bool changed = false; 3141 3142 phylink_dbg(pl, "requesting link mode %s/%s with support %*pb\n", 3143 phylink_an_mode_str(mode), phy_modes(state->interface), 3144 __ETHTOOL_LINK_MODE_MASK_NBITS, supported); 3145 3146 if (!linkmode_equal(pl->supported, supported)) { 3147 linkmode_copy(pl->supported, supported); 3148 changed = true; 3149 } 3150 3151 if (!linkmode_equal(pl->link_config.advertising, state->advertising)) { 3152 linkmode_copy(pl->link_config.advertising, state->advertising); 3153 changed = true; 3154 } 3155 3156 if (pl->cur_link_an_mode != mode || 3157 pl->link_config.interface != state->interface) { 3158 pl->cur_link_an_mode = mode; 3159 pl->link_config.interface = state->interface; 3160 3161 changed = true; 3162 3163 phylink_info(pl, "switched to %s/%s link mode\n", 3164 phylink_an_mode_str(mode), 3165 phy_modes(state->interface)); 3166 } 3167 3168 if (changed && !test_bit(PHYLINK_DISABLE_STOPPED, 3169 &pl->phylink_disable_state)) 3170 phylink_mac_initial_config(pl, false); 3171 } 3172 3173 static int phylink_sfp_config_phy(struct phylink *pl, u8 mode, 3174 struct phy_device *phy) 3175 { 3176 __ETHTOOL_DECLARE_LINK_MODE_MASK(support1); 3177 __ETHTOOL_DECLARE_LINK_MODE_MASK(support); 3178 struct phylink_link_state config; 3179 phy_interface_t iface; 3180 int ret; 3181 3182 linkmode_copy(support, phy->supported); 3183 3184 memset(&config, 0, sizeof(config)); 3185 linkmode_copy(config.advertising, phy->advertising); 3186 config.interface = PHY_INTERFACE_MODE_NA; 3187 config.speed = SPEED_UNKNOWN; 3188 config.duplex = DUPLEX_UNKNOWN; 3189 config.pause = MLO_PAUSE_AN; 3190 3191 /* Ignore errors if we're expecting a PHY to attach later */ 3192 ret = phylink_validate(pl, support, &config); 3193 if (ret) { 3194 phylink_err(pl, "validation with support %*pb failed: %pe\n", 3195 __ETHTOOL_LINK_MODE_MASK_NBITS, support, 3196 ERR_PTR(ret)); 3197 return ret; 3198 } 3199 3200 iface = sfp_select_interface(pl->sfp_bus, config.advertising); 3201 if (iface == PHY_INTERFACE_MODE_NA) { 3202 phylink_err(pl, 3203 "selection of interface failed, advertisement %*pb\n", 3204 __ETHTOOL_LINK_MODE_MASK_NBITS, config.advertising); 3205 return -EINVAL; 3206 } 3207 3208 config.interface = iface; 3209 linkmode_copy(support1, support); 3210 ret = phylink_validate(pl, support1, &config); 3211 if (ret) { 3212 phylink_err(pl, 3213 "validation of %s/%s with support %*pb failed: %pe\n", 3214 phylink_an_mode_str(mode), 3215 phy_modes(config.interface), 3216 __ETHTOOL_LINK_MODE_MASK_NBITS, support, 3217 ERR_PTR(ret)); 3218 return ret; 3219 } 3220 3221 pl->link_port = pl->sfp_port; 3222 3223 phylink_sfp_set_config(pl, mode, support, &config); 3224 3225 return 0; 3226 } 3227 3228 static int phylink_sfp_config_optical(struct phylink *pl) 3229 { 3230 __ETHTOOL_DECLARE_LINK_MODE_MASK(support); 3231 DECLARE_PHY_INTERFACE_MASK(interfaces); 3232 struct phylink_link_state config; 3233 phy_interface_t interface; 3234 int ret; 3235 3236 phylink_dbg(pl, "optical SFP: interfaces=[mac=%*pbl, sfp=%*pbl]\n", 3237 (int)PHY_INTERFACE_MODE_MAX, 3238 pl->config->supported_interfaces, 3239 (int)PHY_INTERFACE_MODE_MAX, 3240 pl->sfp_interfaces); 3241 3242 /* Find the union of the supported interfaces by the PCS/MAC and 3243 * the SFP module. 3244 */ 3245 phy_interface_and(interfaces, pl->config->supported_interfaces, 3246 pl->sfp_interfaces); 3247 if (phy_interface_empty(interfaces)) { 3248 phylink_err(pl, "unsupported SFP module: no common interface modes\n"); 3249 return -EINVAL; 3250 } 3251 3252 memset(&config, 0, sizeof(config)); 3253 linkmode_copy(support, pl->sfp_support); 3254 linkmode_copy(config.advertising, pl->sfp_support); 3255 config.speed = SPEED_UNKNOWN; 3256 config.duplex = DUPLEX_UNKNOWN; 3257 config.pause = MLO_PAUSE_AN; 3258 3259 /* For all the interfaces that are supported, reduce the sfp_support 3260 * mask to only those link modes that can be supported. 3261 */ 3262 ret = phylink_validate_mask(pl, NULL, pl->sfp_support, &config, 3263 interfaces); 3264 if (ret) { 3265 phylink_err(pl, "unsupported SFP module: validation with support %*pb failed\n", 3266 __ETHTOOL_LINK_MODE_MASK_NBITS, support); 3267 return ret; 3268 } 3269 3270 interface = phylink_choose_sfp_interface(pl, interfaces); 3271 if (interface == PHY_INTERFACE_MODE_NA) { 3272 phylink_err(pl, "failed to select SFP interface\n"); 3273 return -EINVAL; 3274 } 3275 3276 phylink_dbg(pl, "optical SFP: chosen %s interface\n", 3277 phy_modes(interface)); 3278 3279 config.interface = interface; 3280 3281 /* Ignore errors if we're expecting a PHY to attach later */ 3282 ret = phylink_validate(pl, support, &config); 3283 if (ret) { 3284 phylink_err(pl, "validation with support %*pb failed: %pe\n", 3285 __ETHTOOL_LINK_MODE_MASK_NBITS, support, 3286 ERR_PTR(ret)); 3287 return ret; 3288 } 3289 3290 pl->link_port = pl->sfp_port; 3291 3292 phylink_sfp_set_config(pl, MLO_AN_INBAND, pl->sfp_support, &config); 3293 3294 return 0; 3295 } 3296 3297 static int phylink_sfp_module_insert(void *upstream, 3298 const struct sfp_eeprom_id *id) 3299 { 3300 struct phylink *pl = upstream; 3301 3302 ASSERT_RTNL(); 3303 3304 linkmode_zero(pl->sfp_support); 3305 phy_interface_zero(pl->sfp_interfaces); 3306 sfp_parse_support(pl->sfp_bus, id, pl->sfp_support, pl->sfp_interfaces); 3307 pl->sfp_port = sfp_parse_port(pl->sfp_bus, id, pl->sfp_support); 3308 3309 /* If this module may have a PHY connecting later, defer until later */ 3310 pl->sfp_may_have_phy = sfp_may_have_phy(pl->sfp_bus, id); 3311 if (pl->sfp_may_have_phy) 3312 return 0; 3313 3314 return phylink_sfp_config_optical(pl); 3315 } 3316 3317 static int phylink_sfp_module_start(void *upstream) 3318 { 3319 struct phylink *pl = upstream; 3320 3321 /* If this SFP module has a PHY, start the PHY now. */ 3322 if (pl->phydev) { 3323 phy_start(pl->phydev); 3324 return 0; 3325 } 3326 3327 /* If the module may have a PHY but we didn't detect one we 3328 * need to configure the MAC here. 3329 */ 3330 if (!pl->sfp_may_have_phy) 3331 return 0; 3332 3333 return phylink_sfp_config_optical(pl); 3334 } 3335 3336 static void phylink_sfp_module_stop(void *upstream) 3337 { 3338 struct phylink *pl = upstream; 3339 3340 /* If this SFP module has a PHY, stop it. */ 3341 if (pl->phydev) 3342 phy_stop(pl->phydev); 3343 } 3344 3345 static void phylink_sfp_link_down(void *upstream) 3346 { 3347 struct phylink *pl = upstream; 3348 3349 ASSERT_RTNL(); 3350 3351 phylink_run_resolve_and_disable(pl, PHYLINK_DISABLE_LINK); 3352 } 3353 3354 static void phylink_sfp_link_up(void *upstream) 3355 { 3356 struct phylink *pl = upstream; 3357 3358 ASSERT_RTNL(); 3359 3360 phylink_enable_and_run_resolve(pl, PHYLINK_DISABLE_LINK); 3361 } 3362 3363 /* The Broadcom BCM84881 in the Methode DM7052 is unable to provide a SGMII 3364 * or 802.3z control word, so inband will not work. 3365 */ 3366 static bool phylink_phy_no_inband(struct phy_device *phy) 3367 { 3368 return phy->is_c45 && phy_id_compare(phy->c45_ids.device_ids[1], 3369 0xae025150, 0xfffffff0); 3370 } 3371 3372 static int phylink_sfp_connect_phy(void *upstream, struct phy_device *phy) 3373 { 3374 struct phylink *pl = upstream; 3375 phy_interface_t interface; 3376 u8 mode; 3377 int ret; 3378 3379 /* 3380 * This is the new way of dealing with flow control for PHYs, 3381 * as described by Timur Tabi in commit 529ed1275263 ("net: phy: 3382 * phy drivers should not set SUPPORTED_[Asym_]Pause") except 3383 * using our validate call to the MAC, we rely upon the MAC 3384 * clearing the bits from both supported and advertising fields. 3385 */ 3386 phy_support_asym_pause(phy); 3387 3388 if (phylink_phy_no_inband(phy)) 3389 mode = MLO_AN_PHY; 3390 else 3391 mode = MLO_AN_INBAND; 3392 3393 /* Set the PHY's host supported interfaces */ 3394 phy_interface_and(phy->host_interfaces, phylink_sfp_interfaces, 3395 pl->config->supported_interfaces); 3396 3397 /* Do the initial configuration */ 3398 ret = phylink_sfp_config_phy(pl, mode, phy); 3399 if (ret < 0) 3400 return ret; 3401 3402 interface = pl->link_config.interface; 3403 ret = phylink_attach_phy(pl, phy, interface); 3404 if (ret < 0) 3405 return ret; 3406 3407 ret = phylink_bringup_phy(pl, phy, interface); 3408 if (ret) 3409 phy_detach(phy); 3410 3411 return ret; 3412 } 3413 3414 static void phylink_sfp_disconnect_phy(void *upstream) 3415 { 3416 phylink_disconnect_phy(upstream); 3417 } 3418 3419 static const struct sfp_upstream_ops sfp_phylink_ops = { 3420 .attach = phylink_sfp_attach, 3421 .detach = phylink_sfp_detach, 3422 .module_insert = phylink_sfp_module_insert, 3423 .module_start = phylink_sfp_module_start, 3424 .module_stop = phylink_sfp_module_stop, 3425 .link_up = phylink_sfp_link_up, 3426 .link_down = phylink_sfp_link_down, 3427 .connect_phy = phylink_sfp_connect_phy, 3428 .disconnect_phy = phylink_sfp_disconnect_phy, 3429 }; 3430 3431 /* Helpers for MAC drivers */ 3432 3433 static struct { 3434 int bit; 3435 int speed; 3436 } phylink_c73_priority_resolution[] = { 3437 { ETHTOOL_LINK_MODE_100000baseCR4_Full_BIT, SPEED_100000 }, 3438 { ETHTOOL_LINK_MODE_100000baseKR4_Full_BIT, SPEED_100000 }, 3439 /* 100GBASE-KP4 and 100GBASE-CR10 not supported */ 3440 { ETHTOOL_LINK_MODE_40000baseCR4_Full_BIT, SPEED_40000 }, 3441 { ETHTOOL_LINK_MODE_40000baseKR4_Full_BIT, SPEED_40000 }, 3442 { ETHTOOL_LINK_MODE_10000baseKR_Full_BIT, SPEED_10000 }, 3443 { ETHTOOL_LINK_MODE_10000baseKX4_Full_BIT, SPEED_10000 }, 3444 /* 5GBASE-KR not supported */ 3445 { ETHTOOL_LINK_MODE_2500baseX_Full_BIT, SPEED_2500 }, 3446 { ETHTOOL_LINK_MODE_1000baseKX_Full_BIT, SPEED_1000 }, 3447 }; 3448 3449 void phylink_resolve_c73(struct phylink_link_state *state) 3450 { 3451 int i; 3452 3453 for (i = 0; i < ARRAY_SIZE(phylink_c73_priority_resolution); i++) { 3454 int bit = phylink_c73_priority_resolution[i].bit; 3455 if (linkmode_test_bit(bit, state->advertising) && 3456 linkmode_test_bit(bit, state->lp_advertising)) 3457 break; 3458 } 3459 3460 if (i < ARRAY_SIZE(phylink_c73_priority_resolution)) { 3461 state->speed = phylink_c73_priority_resolution[i].speed; 3462 state->duplex = DUPLEX_FULL; 3463 } else { 3464 /* negotiation failure */ 3465 state->link = false; 3466 } 3467 3468 phylink_resolve_an_pause(state); 3469 } 3470 EXPORT_SYMBOL_GPL(phylink_resolve_c73); 3471 3472 static void phylink_decode_c37_word(struct phylink_link_state *state, 3473 uint16_t config_reg, int speed) 3474 { 3475 int fd_bit; 3476 3477 if (speed == SPEED_2500) 3478 fd_bit = ETHTOOL_LINK_MODE_2500baseX_Full_BIT; 3479 else 3480 fd_bit = ETHTOOL_LINK_MODE_1000baseX_Full_BIT; 3481 3482 mii_lpa_mod_linkmode_x(state->lp_advertising, config_reg, fd_bit); 3483 3484 if (linkmode_test_bit(fd_bit, state->advertising) && 3485 linkmode_test_bit(fd_bit, state->lp_advertising)) { 3486 state->speed = speed; 3487 state->duplex = DUPLEX_FULL; 3488 } else { 3489 /* negotiation failure */ 3490 state->link = false; 3491 } 3492 3493 phylink_resolve_an_pause(state); 3494 } 3495 3496 static void phylink_decode_sgmii_word(struct phylink_link_state *state, 3497 uint16_t config_reg) 3498 { 3499 if (!(config_reg & LPA_SGMII_LINK)) { 3500 state->link = false; 3501 return; 3502 } 3503 3504 switch (config_reg & LPA_SGMII_SPD_MASK) { 3505 case LPA_SGMII_10: 3506 state->speed = SPEED_10; 3507 break; 3508 case LPA_SGMII_100: 3509 state->speed = SPEED_100; 3510 break; 3511 case LPA_SGMII_1000: 3512 state->speed = SPEED_1000; 3513 break; 3514 default: 3515 state->link = false; 3516 return; 3517 } 3518 if (config_reg & LPA_SGMII_FULL_DUPLEX) 3519 state->duplex = DUPLEX_FULL; 3520 else 3521 state->duplex = DUPLEX_HALF; 3522 } 3523 3524 /** 3525 * phylink_decode_usxgmii_word() - decode the USXGMII word from a MAC PCS 3526 * @state: a pointer to a struct phylink_link_state. 3527 * @lpa: a 16 bit value which stores the USXGMII auto-negotiation word 3528 * 3529 * Helper for MAC PCS supporting the USXGMII protocol and the auto-negotiation 3530 * code word. Decode the USXGMII code word and populate the corresponding fields 3531 * (speed, duplex) into the phylink_link_state structure. 3532 */ 3533 void phylink_decode_usxgmii_word(struct phylink_link_state *state, 3534 uint16_t lpa) 3535 { 3536 switch (lpa & MDIO_USXGMII_SPD_MASK) { 3537 case MDIO_USXGMII_10: 3538 state->speed = SPEED_10; 3539 break; 3540 case MDIO_USXGMII_100: 3541 state->speed = SPEED_100; 3542 break; 3543 case MDIO_USXGMII_1000: 3544 state->speed = SPEED_1000; 3545 break; 3546 case MDIO_USXGMII_2500: 3547 state->speed = SPEED_2500; 3548 break; 3549 case MDIO_USXGMII_5000: 3550 state->speed = SPEED_5000; 3551 break; 3552 case MDIO_USXGMII_10G: 3553 state->speed = SPEED_10000; 3554 break; 3555 default: 3556 state->link = false; 3557 return; 3558 } 3559 3560 if (lpa & MDIO_USXGMII_FULL_DUPLEX) 3561 state->duplex = DUPLEX_FULL; 3562 else 3563 state->duplex = DUPLEX_HALF; 3564 } 3565 EXPORT_SYMBOL_GPL(phylink_decode_usxgmii_word); 3566 3567 /** 3568 * phylink_decode_usgmii_word() - decode the USGMII word from a MAC PCS 3569 * @state: a pointer to a struct phylink_link_state. 3570 * @lpa: a 16 bit value which stores the USGMII auto-negotiation word 3571 * 3572 * Helper for MAC PCS supporting the USGMII protocol and the auto-negotiation 3573 * code word. Decode the USGMII code word and populate the corresponding fields 3574 * (speed, duplex) into the phylink_link_state structure. The structure for this 3575 * word is the same as the USXGMII word, except it only supports speeds up to 3576 * 1Gbps. 3577 */ 3578 static void phylink_decode_usgmii_word(struct phylink_link_state *state, 3579 uint16_t lpa) 3580 { 3581 switch (lpa & MDIO_USXGMII_SPD_MASK) { 3582 case MDIO_USXGMII_10: 3583 state->speed = SPEED_10; 3584 break; 3585 case MDIO_USXGMII_100: 3586 state->speed = SPEED_100; 3587 break; 3588 case MDIO_USXGMII_1000: 3589 state->speed = SPEED_1000; 3590 break; 3591 default: 3592 state->link = false; 3593 return; 3594 } 3595 3596 if (lpa & MDIO_USXGMII_FULL_DUPLEX) 3597 state->duplex = DUPLEX_FULL; 3598 else 3599 state->duplex = DUPLEX_HALF; 3600 } 3601 3602 /** 3603 * phylink_mii_c22_pcs_decode_state() - Decode MAC PCS state from MII registers 3604 * @state: a pointer to a &struct phylink_link_state. 3605 * @bmsr: The value of the %MII_BMSR register 3606 * @lpa: The value of the %MII_LPA register 3607 * 3608 * Helper for MAC PCS supporting the 802.3 clause 22 register set for 3609 * clause 37 negotiation and/or SGMII control. 3610 * 3611 * Parse the Clause 37 or Cisco SGMII link partner negotiation word into 3612 * the phylink @state structure. This is suitable to be used for implementing 3613 * the pcs_get_state() member of the struct phylink_pcs_ops structure if 3614 * accessing @bmsr and @lpa cannot be done with MDIO directly. 3615 */ 3616 void phylink_mii_c22_pcs_decode_state(struct phylink_link_state *state, 3617 u16 bmsr, u16 lpa) 3618 { 3619 state->link = !!(bmsr & BMSR_LSTATUS); 3620 state->an_complete = !!(bmsr & BMSR_ANEGCOMPLETE); 3621 /* If there is no link or autonegotiation is disabled, the LP advertisement 3622 * data is not meaningful, so don't go any further. 3623 */ 3624 if (!state->link || !linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, 3625 state->advertising)) 3626 return; 3627 3628 switch (state->interface) { 3629 case PHY_INTERFACE_MODE_1000BASEX: 3630 phylink_decode_c37_word(state, lpa, SPEED_1000); 3631 break; 3632 3633 case PHY_INTERFACE_MODE_2500BASEX: 3634 phylink_decode_c37_word(state, lpa, SPEED_2500); 3635 break; 3636 3637 case PHY_INTERFACE_MODE_SGMII: 3638 case PHY_INTERFACE_MODE_QSGMII: 3639 phylink_decode_sgmii_word(state, lpa); 3640 break; 3641 case PHY_INTERFACE_MODE_QUSGMII: 3642 phylink_decode_usgmii_word(state, lpa); 3643 break; 3644 3645 default: 3646 state->link = false; 3647 break; 3648 } 3649 } 3650 EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_decode_state); 3651 3652 /** 3653 * phylink_mii_c22_pcs_get_state() - read the MAC PCS state 3654 * @pcs: a pointer to a &struct mdio_device. 3655 * @state: a pointer to a &struct phylink_link_state. 3656 * 3657 * Helper for MAC PCS supporting the 802.3 clause 22 register set for 3658 * clause 37 negotiation and/or SGMII control. 3659 * 3660 * Read the MAC PCS state from the MII device configured in @config and 3661 * parse the Clause 37 or Cisco SGMII link partner negotiation word into 3662 * the phylink @state structure. This is suitable to be directly plugged 3663 * into the pcs_get_state() member of the struct phylink_pcs_ops 3664 * structure. 3665 */ 3666 void phylink_mii_c22_pcs_get_state(struct mdio_device *pcs, 3667 struct phylink_link_state *state) 3668 { 3669 int bmsr, lpa; 3670 3671 bmsr = mdiodev_read(pcs, MII_BMSR); 3672 lpa = mdiodev_read(pcs, MII_LPA); 3673 if (bmsr < 0 || lpa < 0) { 3674 state->link = false; 3675 return; 3676 } 3677 3678 phylink_mii_c22_pcs_decode_state(state, bmsr, lpa); 3679 } 3680 EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_get_state); 3681 3682 /** 3683 * phylink_mii_c22_pcs_encode_advertisement() - configure the clause 37 PCS 3684 * advertisement 3685 * @interface: the PHY interface mode being configured 3686 * @advertising: the ethtool advertisement mask 3687 * 3688 * Helper for MAC PCS supporting the 802.3 clause 22 register set for 3689 * clause 37 negotiation and/or SGMII control. 3690 * 3691 * Encode the clause 37 PCS advertisement as specified by @interface and 3692 * @advertising. 3693 * 3694 * Return: The new value for @adv, or ``-EINVAL`` if it should not be changed. 3695 */ 3696 int phylink_mii_c22_pcs_encode_advertisement(phy_interface_t interface, 3697 const unsigned long *advertising) 3698 { 3699 u16 adv; 3700 3701 switch (interface) { 3702 case PHY_INTERFACE_MODE_1000BASEX: 3703 case PHY_INTERFACE_MODE_2500BASEX: 3704 adv = ADVERTISE_1000XFULL; 3705 if (linkmode_test_bit(ETHTOOL_LINK_MODE_Pause_BIT, 3706 advertising)) 3707 adv |= ADVERTISE_1000XPAUSE; 3708 if (linkmode_test_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, 3709 advertising)) 3710 adv |= ADVERTISE_1000XPSE_ASYM; 3711 return adv; 3712 case PHY_INTERFACE_MODE_SGMII: 3713 case PHY_INTERFACE_MODE_QSGMII: 3714 return 0x0001; 3715 default: 3716 /* Nothing to do for other modes */ 3717 return -EINVAL; 3718 } 3719 } 3720 EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_encode_advertisement); 3721 3722 /** 3723 * phylink_mii_c22_pcs_config() - configure clause 22 PCS 3724 * @pcs: a pointer to a &struct mdio_device. 3725 * @interface: the PHY interface mode being configured 3726 * @advertising: the ethtool advertisement mask 3727 * @neg_mode: PCS negotiation mode 3728 * 3729 * Configure a Clause 22 PCS PHY with the appropriate negotiation 3730 * parameters for the @mode, @interface and @advertising parameters. 3731 * Returns negative error number on failure, zero if the advertisement 3732 * has not changed, or positive if there is a change. 3733 */ 3734 int phylink_mii_c22_pcs_config(struct mdio_device *pcs, 3735 phy_interface_t interface, 3736 const unsigned long *advertising, 3737 unsigned int neg_mode) 3738 { 3739 bool changed = 0; 3740 u16 bmcr; 3741 int ret, adv; 3742 3743 adv = phylink_mii_c22_pcs_encode_advertisement(interface, advertising); 3744 if (adv >= 0) { 3745 ret = mdiobus_modify_changed(pcs->bus, pcs->addr, 3746 MII_ADVERTISE, 0xffff, adv); 3747 if (ret < 0) 3748 return ret; 3749 changed = ret; 3750 } 3751 3752 if (neg_mode == PHYLINK_PCS_NEG_INBAND_ENABLED) 3753 bmcr = BMCR_ANENABLE; 3754 else 3755 bmcr = 0; 3756 3757 /* Configure the inband state. Ensure ISOLATE bit is disabled */ 3758 ret = mdiodev_modify(pcs, MII_BMCR, BMCR_ANENABLE | BMCR_ISOLATE, bmcr); 3759 if (ret < 0) 3760 return ret; 3761 3762 return changed; 3763 } 3764 EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_config); 3765 3766 /** 3767 * phylink_mii_c22_pcs_an_restart() - restart 802.3z autonegotiation 3768 * @pcs: a pointer to a &struct mdio_device. 3769 * 3770 * Helper for MAC PCS supporting the 802.3 clause 22 register set for 3771 * clause 37 negotiation. 3772 * 3773 * Restart the clause 37 negotiation with the link partner. This is 3774 * suitable to be directly plugged into the pcs_get_state() member 3775 * of the struct phylink_pcs_ops structure. 3776 */ 3777 void phylink_mii_c22_pcs_an_restart(struct mdio_device *pcs) 3778 { 3779 int val = mdiodev_read(pcs, MII_BMCR); 3780 3781 if (val >= 0) { 3782 val |= BMCR_ANRESTART; 3783 3784 mdiodev_write(pcs, MII_BMCR, val); 3785 } 3786 } 3787 EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_an_restart); 3788 3789 void phylink_mii_c45_pcs_get_state(struct mdio_device *pcs, 3790 struct phylink_link_state *state) 3791 { 3792 struct mii_bus *bus = pcs->bus; 3793 int addr = pcs->addr; 3794 int stat; 3795 3796 stat = mdiobus_c45_read(bus, addr, MDIO_MMD_PCS, MDIO_STAT1); 3797 if (stat < 0) { 3798 state->link = false; 3799 return; 3800 } 3801 3802 state->link = !!(stat & MDIO_STAT1_LSTATUS); 3803 if (!state->link) 3804 return; 3805 3806 switch (state->interface) { 3807 case PHY_INTERFACE_MODE_10GBASER: 3808 state->speed = SPEED_10000; 3809 state->duplex = DUPLEX_FULL; 3810 break; 3811 3812 default: 3813 break; 3814 } 3815 } 3816 EXPORT_SYMBOL_GPL(phylink_mii_c45_pcs_get_state); 3817 3818 static int __init phylink_init(void) 3819 { 3820 for (int i = 0; i < ARRAY_SIZE(phylink_sfp_interface_preference); ++i) 3821 __set_bit(phylink_sfp_interface_preference[i], 3822 phylink_sfp_interfaces); 3823 3824 return 0; 3825 } 3826 3827 module_init(phylink_init); 3828 3829 MODULE_LICENSE("GPL v2"); 3830 MODULE_DESCRIPTION("phylink models the MAC to optional PHY connection"); 3831