1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * phylink models the MAC to optional PHY connection, supporting 4 * technologies such as SFP cages where the PHY is hot-pluggable. 5 * 6 * Copyright (C) 2015 Russell King 7 */ 8 #include <linux/acpi.h> 9 #include <linux/ethtool.h> 10 #include <linux/export.h> 11 #include <linux/gpio/consumer.h> 12 #include <linux/netdevice.h> 13 #include <linux/of.h> 14 #include <linux/of_mdio.h> 15 #include <linux/phy.h> 16 #include <linux/phy_fixed.h> 17 #include <linux/phylink.h> 18 #include <linux/rtnetlink.h> 19 #include <linux/spinlock.h> 20 #include <linux/timer.h> 21 #include <linux/workqueue.h> 22 23 #include "phy-caps.h" 24 #include "sfp.h" 25 #include "swphy.h" 26 27 enum { 28 PHYLINK_DISABLE_STOPPED, 29 PHYLINK_DISABLE_LINK, 30 PHYLINK_DISABLE_MAC_WOL, 31 32 PCS_STATE_DOWN = 0, 33 PCS_STATE_STARTING, 34 PCS_STATE_STARTED, 35 }; 36 37 /** 38 * struct phylink - internal data type for phylink 39 */ 40 struct phylink { 41 /* private: */ 42 struct net_device *netdev; 43 const struct phylink_mac_ops *mac_ops; 44 struct phylink_config *config; 45 struct phylink_pcs *pcs; 46 struct device *dev; 47 unsigned int old_link_state:1; 48 49 unsigned long phylink_disable_state; /* bitmask of disables */ 50 struct phy_device *phydev; 51 phy_interface_t link_interface; /* PHY_INTERFACE_xxx */ 52 u8 cfg_link_an_mode; /* MLO_AN_xxx */ 53 u8 req_link_an_mode; /* Requested MLO_AN_xxx mode */ 54 u8 act_link_an_mode; /* Active MLO_AN_xxx mode */ 55 u8 link_port; /* The current non-phy ethtool port */ 56 __ETHTOOL_DECLARE_LINK_MODE_MASK(supported); 57 __ETHTOOL_DECLARE_LINK_MODE_MASK(supported_lpi); 58 59 /* The link configuration settings */ 60 struct phylink_link_state link_config; 61 62 /* The current settings */ 63 phy_interface_t cur_interface; 64 65 struct gpio_desc *link_gpio; 66 unsigned int link_irq; 67 struct timer_list link_poll; 68 69 struct mutex state_mutex; 70 /* Serialize updates to pl->phydev with phylink_resolve() */ 71 struct mutex phydev_mutex; 72 struct phylink_link_state phy_state; 73 unsigned int phy_ib_mode; 74 struct work_struct resolve; 75 unsigned int pcs_neg_mode; 76 unsigned int pcs_state; 77 78 bool link_failed; 79 bool suspend_link_up; 80 bool major_config_failed; 81 bool mac_supports_eee_ops; 82 bool mac_supports_eee; 83 bool phy_enable_tx_lpi; 84 bool mac_enable_tx_lpi; 85 bool mac_tx_clk_stop; 86 u32 mac_tx_lpi_timer; 87 u8 mac_rx_clk_stop_blocked; 88 89 struct sfp_bus *sfp_bus; 90 bool sfp_may_have_phy; 91 DECLARE_PHY_INTERFACE_MASK(sfp_interfaces); 92 __ETHTOOL_DECLARE_LINK_MODE_MASK(sfp_support); 93 u8 sfp_port; 94 95 struct eee_config eee_cfg; 96 97 u32 wolopts_mac; 98 u8 wol_sopass[SOPASS_MAX]; 99 }; 100 101 #define phylink_printk(level, pl, fmt, ...) \ 102 do { \ 103 if ((pl)->config->type == PHYLINK_NETDEV) \ 104 netdev_printk(level, (pl)->netdev, fmt, ##__VA_ARGS__); \ 105 else if ((pl)->config->type == PHYLINK_DEV) \ 106 dev_printk(level, (pl)->dev, fmt, ##__VA_ARGS__); \ 107 } while (0) 108 109 #define phylink_err(pl, fmt, ...) \ 110 phylink_printk(KERN_ERR, pl, fmt, ##__VA_ARGS__) 111 #define phylink_warn(pl, fmt, ...) \ 112 phylink_printk(KERN_WARNING, pl, fmt, ##__VA_ARGS__) 113 #define phylink_info(pl, fmt, ...) \ 114 phylink_printk(KERN_INFO, pl, fmt, ##__VA_ARGS__) 115 #if defined(CONFIG_DYNAMIC_DEBUG) 116 #define phylink_dbg(pl, fmt, ...) \ 117 do { \ 118 if ((pl)->config->type == PHYLINK_NETDEV) \ 119 netdev_dbg((pl)->netdev, fmt, ##__VA_ARGS__); \ 120 else if ((pl)->config->type == PHYLINK_DEV) \ 121 dev_dbg((pl)->dev, fmt, ##__VA_ARGS__); \ 122 } while (0) 123 #elif defined(DEBUG) 124 #define phylink_dbg(pl, fmt, ...) \ 125 phylink_printk(KERN_DEBUG, pl, fmt, ##__VA_ARGS__) 126 #else 127 #define phylink_dbg(pl, fmt, ...) \ 128 ({ \ 129 if (0) \ 130 phylink_printk(KERN_DEBUG, pl, fmt, ##__VA_ARGS__); \ 131 }) 132 #endif 133 134 static const phy_interface_t phylink_sfp_interface_preference[] = { 135 PHY_INTERFACE_MODE_100GBASEP, 136 PHY_INTERFACE_MODE_50GBASER, 137 PHY_INTERFACE_MODE_LAUI, 138 PHY_INTERFACE_MODE_25GBASER, 139 PHY_INTERFACE_MODE_USXGMII, 140 PHY_INTERFACE_MODE_10GBASER, 141 PHY_INTERFACE_MODE_5GBASER, 142 PHY_INTERFACE_MODE_2500BASEX, 143 PHY_INTERFACE_MODE_SGMII, 144 PHY_INTERFACE_MODE_1000BASEX, 145 PHY_INTERFACE_MODE_100BASEX, 146 }; 147 148 static DECLARE_PHY_INTERFACE_MASK(phylink_sfp_interfaces); 149 150 /** 151 * phylink_set_port_modes() - set the port type modes in the ethtool mask 152 * @mask: ethtool link mode mask 153 * 154 * Sets all the port type modes in the ethtool mask. MAC drivers should 155 * use this in their 'validate' callback. 156 */ 157 void phylink_set_port_modes(unsigned long *mask) 158 { 159 phylink_set(mask, TP); 160 phylink_set(mask, AUI); 161 phylink_set(mask, MII); 162 phylink_set(mask, FIBRE); 163 phylink_set(mask, BNC); 164 phylink_set(mask, Backplane); 165 } 166 EXPORT_SYMBOL_GPL(phylink_set_port_modes); 167 168 static int phylink_is_empty_linkmode(const unsigned long *linkmode) 169 { 170 __ETHTOOL_DECLARE_LINK_MODE_MASK(tmp) = { 0, }; 171 172 phylink_set_port_modes(tmp); 173 phylink_set(tmp, Autoneg); 174 phylink_set(tmp, Pause); 175 phylink_set(tmp, Asym_Pause); 176 177 return linkmode_subset(linkmode, tmp); 178 } 179 180 static const char *phylink_an_mode_str(unsigned int mode) 181 { 182 static const char *modestr[] = { 183 [MLO_AN_PHY] = "phy", 184 [MLO_AN_FIXED] = "fixed", 185 [MLO_AN_INBAND] = "inband", 186 }; 187 188 return mode < ARRAY_SIZE(modestr) ? modestr[mode] : "unknown"; 189 } 190 191 static const char *phylink_pcs_mode_str(unsigned int mode) 192 { 193 if (!mode) 194 return "none"; 195 196 if (mode & PHYLINK_PCS_NEG_OUTBAND) 197 return "outband"; 198 199 if (mode & PHYLINK_PCS_NEG_INBAND) { 200 if (mode & PHYLINK_PCS_NEG_ENABLED) 201 return "inband,an-enabled"; 202 else 203 return "inband,an-disabled"; 204 } 205 206 return "unknown"; 207 } 208 209 static unsigned int phylink_interface_signal_rate(phy_interface_t interface) 210 { 211 switch (interface) { 212 case PHY_INTERFACE_MODE_SGMII: 213 case PHY_INTERFACE_MODE_1000BASEX: /* 1.25Mbd */ 214 return 1250; 215 case PHY_INTERFACE_MODE_2500BASEX: /* 3.125Mbd */ 216 return 3125; 217 case PHY_INTERFACE_MODE_5GBASER: /* 5.15625Mbd */ 218 return 5156; 219 case PHY_INTERFACE_MODE_10GBASER: /* 10.3125Mbd */ 220 return 10313; 221 default: 222 return 0; 223 } 224 } 225 226 /** 227 * phylink_interface_max_speed() - get the maximum speed of a phy interface 228 * @interface: phy interface mode defined by &typedef phy_interface_t 229 * 230 * Determine the maximum speed of a phy interface. This is intended to help 231 * determine the correct speed to pass to the MAC when the phy is performing 232 * rate matching. 233 * 234 * Return: The maximum speed of @interface 235 */ 236 static int phylink_interface_max_speed(phy_interface_t interface) 237 { 238 switch (interface) { 239 case PHY_INTERFACE_MODE_100BASEX: 240 case PHY_INTERFACE_MODE_REVRMII: 241 case PHY_INTERFACE_MODE_RMII: 242 case PHY_INTERFACE_MODE_SMII: 243 case PHY_INTERFACE_MODE_REVMII: 244 case PHY_INTERFACE_MODE_MII: 245 case PHY_INTERFACE_MODE_MIILITE: 246 return SPEED_100; 247 248 case PHY_INTERFACE_MODE_TBI: 249 case PHY_INTERFACE_MODE_MOCA: 250 case PHY_INTERFACE_MODE_RTBI: 251 case PHY_INTERFACE_MODE_1000BASEX: 252 case PHY_INTERFACE_MODE_1000BASEKX: 253 case PHY_INTERFACE_MODE_TRGMII: 254 case PHY_INTERFACE_MODE_RGMII_TXID: 255 case PHY_INTERFACE_MODE_RGMII_RXID: 256 case PHY_INTERFACE_MODE_RGMII_ID: 257 case PHY_INTERFACE_MODE_RGMII: 258 case PHY_INTERFACE_MODE_PSGMII: 259 case PHY_INTERFACE_MODE_QSGMII: 260 case PHY_INTERFACE_MODE_QUSGMII: 261 case PHY_INTERFACE_MODE_SGMII: 262 case PHY_INTERFACE_MODE_GMII: 263 return SPEED_1000; 264 265 case PHY_INTERFACE_MODE_2500BASEX: 266 case PHY_INTERFACE_MODE_10G_QXGMII: 267 return SPEED_2500; 268 269 case PHY_INTERFACE_MODE_5GBASER: 270 return SPEED_5000; 271 272 case PHY_INTERFACE_MODE_XGMII: 273 case PHY_INTERFACE_MODE_RXAUI: 274 case PHY_INTERFACE_MODE_XAUI: 275 case PHY_INTERFACE_MODE_10GBASER: 276 case PHY_INTERFACE_MODE_10GKR: 277 case PHY_INTERFACE_MODE_USXGMII: 278 return SPEED_10000; 279 280 case PHY_INTERFACE_MODE_25GBASER: 281 return SPEED_25000; 282 283 case PHY_INTERFACE_MODE_XLGMII: 284 return SPEED_40000; 285 286 case PHY_INTERFACE_MODE_50GBASER: 287 case PHY_INTERFACE_MODE_LAUI: 288 return SPEED_50000; 289 290 case PHY_INTERFACE_MODE_100GBASEP: 291 return SPEED_100000; 292 293 case PHY_INTERFACE_MODE_INTERNAL: 294 case PHY_INTERFACE_MODE_NA: 295 case PHY_INTERFACE_MODE_MAX: 296 /* No idea! Garbage in, unknown out */ 297 return SPEED_UNKNOWN; 298 } 299 300 /* If we get here, someone forgot to add an interface mode above */ 301 WARN_ON_ONCE(1); 302 return SPEED_UNKNOWN; 303 } 304 305 static struct { 306 unsigned long mask; 307 int speed; 308 unsigned int duplex; 309 unsigned int caps_bit; 310 } phylink_caps_params[] = { 311 { MAC_400000FD, SPEED_400000, DUPLEX_FULL, BIT(LINK_CAPA_400000FD) }, 312 { MAC_200000FD, SPEED_200000, DUPLEX_FULL, BIT(LINK_CAPA_200000FD) }, 313 { MAC_100000FD, SPEED_100000, DUPLEX_FULL, BIT(LINK_CAPA_100000FD) }, 314 { MAC_56000FD, SPEED_56000, DUPLEX_FULL, BIT(LINK_CAPA_56000FD) }, 315 { MAC_50000FD, SPEED_50000, DUPLEX_FULL, BIT(LINK_CAPA_50000FD) }, 316 { MAC_40000FD, SPEED_40000, DUPLEX_FULL, BIT(LINK_CAPA_40000FD) }, 317 { MAC_25000FD, SPEED_25000, DUPLEX_FULL, BIT(LINK_CAPA_25000FD) }, 318 { MAC_20000FD, SPEED_20000, DUPLEX_FULL, BIT(LINK_CAPA_20000FD) }, 319 { MAC_10000FD, SPEED_10000, DUPLEX_FULL, BIT(LINK_CAPA_10000FD) }, 320 { MAC_5000FD, SPEED_5000, DUPLEX_FULL, BIT(LINK_CAPA_5000FD) }, 321 { MAC_2500FD, SPEED_2500, DUPLEX_FULL, BIT(LINK_CAPA_2500FD) }, 322 { MAC_1000FD, SPEED_1000, DUPLEX_FULL, BIT(LINK_CAPA_1000FD) }, 323 { MAC_1000HD, SPEED_1000, DUPLEX_HALF, BIT(LINK_CAPA_1000HD) }, 324 { MAC_100FD, SPEED_100, DUPLEX_FULL, BIT(LINK_CAPA_100FD) }, 325 { MAC_100HD, SPEED_100, DUPLEX_HALF, BIT(LINK_CAPA_100HD) }, 326 { MAC_10FD, SPEED_10, DUPLEX_FULL, BIT(LINK_CAPA_10FD) }, 327 { MAC_10HD, SPEED_10, DUPLEX_HALF, BIT(LINK_CAPA_10HD) }, 328 }; 329 330 /** 331 * phylink_caps_to_link_caps() - Convert a set of MAC capabilities LINK caps 332 * @caps: A set of MAC capabilities 333 * 334 * Returns: The corresponding set of LINK_CAPA as defined in phy-caps.h 335 */ 336 static unsigned long phylink_caps_to_link_caps(unsigned long caps) 337 { 338 unsigned long link_caps = 0; 339 int i; 340 341 for (i = 0; i < ARRAY_SIZE(phylink_caps_params); i++) 342 if (caps & phylink_caps_params[i].mask) 343 link_caps |= phylink_caps_params[i].caps_bit; 344 345 return link_caps; 346 } 347 348 static unsigned long phylink_link_caps_to_mac_caps(unsigned long link_caps) 349 { 350 unsigned long caps = 0; 351 int i; 352 353 for (i = 0; i < ARRAY_SIZE(phylink_caps_params); i++) 354 if (link_caps & phylink_caps_params[i].caps_bit) 355 caps |= phylink_caps_params[i].mask; 356 357 return caps; 358 } 359 360 /** 361 * phylink_caps_to_linkmodes() - Convert capabilities to ethtool link modes 362 * @linkmodes: ethtool linkmode mask (must be already initialised) 363 * @caps: bitmask of MAC capabilities 364 * 365 * Set all possible pause, speed and duplex linkmodes in @linkmodes that are 366 * supported by the @caps. @linkmodes must have been initialised previously. 367 */ 368 static void phylink_caps_to_linkmodes(unsigned long *linkmodes, 369 unsigned long caps) 370 { 371 unsigned long link_caps = phylink_caps_to_link_caps(caps); 372 373 if (caps & MAC_SYM_PAUSE) 374 __set_bit(ETHTOOL_LINK_MODE_Pause_BIT, linkmodes); 375 376 if (caps & MAC_ASYM_PAUSE) 377 __set_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, linkmodes); 378 379 phy_caps_linkmodes(link_caps, linkmodes); 380 } 381 382 /** 383 * phylink_limit_mac_speed - limit the phylink_config to a maximum speed 384 * @config: pointer to a &struct phylink_config 385 * @max_speed: maximum speed 386 * 387 * Mask off MAC capabilities for speeds higher than the @max_speed parameter. 388 * Any further motifications of config.mac_capabilities will override this. 389 */ 390 void phylink_limit_mac_speed(struct phylink_config *config, u32 max_speed) 391 { 392 int i; 393 394 for (i = 0; i < ARRAY_SIZE(phylink_caps_params) && 395 phylink_caps_params[i].speed > max_speed; i++) 396 config->mac_capabilities &= ~phylink_caps_params[i].mask; 397 } 398 EXPORT_SYMBOL_GPL(phylink_limit_mac_speed); 399 400 /** 401 * phylink_cap_from_speed_duplex - Get mac capability from speed/duplex 402 * @speed: the speed to search for 403 * @duplex: the duplex to search for 404 * 405 * Find the mac capability for a given speed and duplex. 406 * 407 * Return: A mask with the mac capability patching @speed and @duplex, or 0 if 408 * there were no matches. 409 */ 410 static unsigned long phylink_cap_from_speed_duplex(int speed, 411 unsigned int duplex) 412 { 413 int i; 414 415 for (i = 0; i < ARRAY_SIZE(phylink_caps_params); i++) { 416 if (speed == phylink_caps_params[i].speed && 417 duplex == phylink_caps_params[i].duplex) 418 return phylink_caps_params[i].mask; 419 } 420 421 return 0; 422 } 423 424 /** 425 * phylink_get_capabilities() - get capabilities for a given MAC 426 * @interface: phy interface mode defined by &typedef phy_interface_t 427 * @mac_capabilities: bitmask of MAC capabilities 428 * @rate_matching: type of rate matching being performed 429 * 430 * Get the MAC capabilities that are supported by the @interface mode and 431 * @mac_capabilities. 432 */ 433 static unsigned long phylink_get_capabilities(phy_interface_t interface, 434 unsigned long mac_capabilities, 435 int rate_matching) 436 { 437 unsigned long link_caps = phy_caps_from_interface(interface); 438 int max_speed = phylink_interface_max_speed(interface); 439 unsigned long caps = MAC_SYM_PAUSE | MAC_ASYM_PAUSE; 440 unsigned long matched_caps = 0; 441 442 caps |= phylink_link_caps_to_mac_caps(link_caps); 443 444 switch (rate_matching) { 445 case RATE_MATCH_OPEN_LOOP: 446 /* TODO */ 447 fallthrough; 448 case RATE_MATCH_NONE: 449 matched_caps = 0; 450 break; 451 case RATE_MATCH_PAUSE: { 452 /* The MAC must support asymmetric pause towards the local 453 * device for this. We could allow just symmetric pause, but 454 * then we might have to renegotiate if the link partner 455 * doesn't support pause. This is because there's no way to 456 * accept pause frames without transmitting them if we only 457 * support symmetric pause. 458 */ 459 if (!(mac_capabilities & MAC_SYM_PAUSE) || 460 !(mac_capabilities & MAC_ASYM_PAUSE)) 461 break; 462 463 /* We can't adapt if the MAC doesn't support the interface's 464 * max speed at full duplex. 465 */ 466 if (mac_capabilities & 467 phylink_cap_from_speed_duplex(max_speed, DUPLEX_FULL)) 468 matched_caps = GENMASK(__fls(caps), __fls(MAC_10HD)); 469 break; 470 } 471 case RATE_MATCH_CRS: 472 /* The MAC must support half duplex at the interface's max 473 * speed. 474 */ 475 if (mac_capabilities & 476 phylink_cap_from_speed_duplex(max_speed, DUPLEX_HALF)) { 477 matched_caps = GENMASK(__fls(caps), __fls(MAC_10HD)); 478 matched_caps &= mac_capabilities; 479 } 480 break; 481 } 482 483 return (caps & mac_capabilities) | matched_caps; 484 } 485 486 /** 487 * phylink_validate_mask_caps() - Restrict link modes based on caps 488 * @supported: ethtool bitmask for supported link modes. 489 * @state: pointer to a &struct phylink_link_state. 490 * @mac_capabilities: bitmask of MAC capabilities 491 * 492 * Calculate the supported link modes based on @mac_capabilities, and restrict 493 * @supported and @state based on that. Use this function if your capabiliies 494 * aren't constant, such as if they vary depending on the interface. 495 */ 496 static void phylink_validate_mask_caps(unsigned long *supported, 497 struct phylink_link_state *state, 498 unsigned long mac_capabilities) 499 { 500 __ETHTOOL_DECLARE_LINK_MODE_MASK(mask) = { 0, }; 501 unsigned long caps; 502 503 phylink_set_port_modes(mask); 504 phylink_set(mask, Autoneg); 505 caps = phylink_get_capabilities(state->interface, mac_capabilities, 506 state->rate_matching); 507 phylink_caps_to_linkmodes(mask, caps); 508 509 linkmode_and(supported, supported, mask); 510 linkmode_and(state->advertising, state->advertising, mask); 511 } 512 513 static int phylink_validate_mac_and_pcs(struct phylink *pl, 514 unsigned long *supported, 515 struct phylink_link_state *state) 516 { 517 struct phylink_pcs *pcs = NULL; 518 unsigned long capabilities; 519 int ret; 520 521 /* Get the PCS for this interface mode */ 522 if (pl->mac_ops->mac_select_pcs) { 523 pcs = pl->mac_ops->mac_select_pcs(pl->config, state->interface); 524 if (IS_ERR(pcs)) 525 return PTR_ERR(pcs); 526 } 527 528 if (pcs) { 529 /* The PCS, if present, must be setup before phylink_create() 530 * has been called. If the ops is not initialised, print an 531 * error and backtrace rather than oopsing the kernel. 532 */ 533 if (!pcs->ops) { 534 phylink_err(pl, "interface %s: uninitialised PCS\n", 535 phy_modes(state->interface)); 536 dump_stack(); 537 return -EINVAL; 538 } 539 540 /* Ensure that this PCS supports the interface which the MAC 541 * returned it for. It is an error for the MAC to return a PCS 542 * that does not support the interface mode. 543 */ 544 if (!phy_interface_empty(pcs->supported_interfaces) && 545 !test_bit(state->interface, pcs->supported_interfaces)) { 546 phylink_err(pl, "MAC returned PCS which does not support %s\n", 547 phy_modes(state->interface)); 548 return -EINVAL; 549 } 550 551 /* Validate the link parameters with the PCS */ 552 if (pcs->ops->pcs_validate) { 553 ret = pcs->ops->pcs_validate(pcs, supported, state); 554 if (ret < 0 || phylink_is_empty_linkmode(supported)) 555 return -EINVAL; 556 557 /* Ensure the advertising mask is a subset of the 558 * supported mask. 559 */ 560 linkmode_and(state->advertising, state->advertising, 561 supported); 562 } 563 } 564 565 /* Then validate the link parameters with the MAC */ 566 if (pl->mac_ops->mac_get_caps) 567 capabilities = pl->mac_ops->mac_get_caps(pl->config, 568 state->interface); 569 else 570 capabilities = pl->config->mac_capabilities; 571 572 phylink_validate_mask_caps(supported, state, capabilities); 573 574 return phylink_is_empty_linkmode(supported) ? -EINVAL : 0; 575 } 576 577 static void phylink_validate_one(struct phylink *pl, struct phy_device *phy, 578 const unsigned long *supported, 579 const struct phylink_link_state *state, 580 phy_interface_t interface, 581 unsigned long *accum_supported, 582 unsigned long *accum_advertising) 583 { 584 __ETHTOOL_DECLARE_LINK_MODE_MASK(tmp_supported); 585 struct phylink_link_state tmp_state; 586 587 linkmode_copy(tmp_supported, supported); 588 589 tmp_state = *state; 590 tmp_state.interface = interface; 591 592 if (phy) 593 tmp_state.rate_matching = phy_get_rate_matching(phy, interface); 594 595 if (!phylink_validate_mac_and_pcs(pl, tmp_supported, &tmp_state)) { 596 phylink_dbg(pl, " interface %u (%s) rate match %s supports %*pbl\n", 597 interface, phy_modes(interface), 598 phy_rate_matching_to_str(tmp_state.rate_matching), 599 __ETHTOOL_LINK_MODE_MASK_NBITS, tmp_supported); 600 601 linkmode_or(accum_supported, accum_supported, tmp_supported); 602 linkmode_or(accum_advertising, accum_advertising, 603 tmp_state.advertising); 604 } 605 } 606 607 static int phylink_validate_mask(struct phylink *pl, struct phy_device *phy, 608 unsigned long *supported, 609 struct phylink_link_state *state, 610 const unsigned long *interfaces) 611 { 612 __ETHTOOL_DECLARE_LINK_MODE_MASK(all_adv) = { 0, }; 613 __ETHTOOL_DECLARE_LINK_MODE_MASK(all_s) = { 0, }; 614 int interface; 615 616 for_each_set_bit(interface, interfaces, PHY_INTERFACE_MODE_MAX) 617 phylink_validate_one(pl, phy, supported, state, interface, 618 all_s, all_adv); 619 620 linkmode_copy(supported, all_s); 621 linkmode_copy(state->advertising, all_adv); 622 623 return phylink_is_empty_linkmode(supported) ? -EINVAL : 0; 624 } 625 626 static int phylink_validate(struct phylink *pl, unsigned long *supported, 627 struct phylink_link_state *state) 628 { 629 const unsigned long *interfaces = pl->config->supported_interfaces; 630 631 if (state->interface == PHY_INTERFACE_MODE_NA) 632 return phylink_validate_mask(pl, NULL, supported, state, 633 interfaces); 634 635 if (!test_bit(state->interface, interfaces)) 636 return -EINVAL; 637 638 return phylink_validate_mac_and_pcs(pl, supported, state); 639 } 640 641 static void phylink_fill_fixedlink_supported(unsigned long *supported) 642 { 643 linkmode_set_bit(ETHTOOL_LINK_MODE_10baseT_Half_BIT, supported); 644 linkmode_set_bit(ETHTOOL_LINK_MODE_10baseT_Full_BIT, supported); 645 linkmode_set_bit(ETHTOOL_LINK_MODE_100baseT_Half_BIT, supported); 646 linkmode_set_bit(ETHTOOL_LINK_MODE_100baseT_Full_BIT, supported); 647 linkmode_set_bit(ETHTOOL_LINK_MODE_1000baseT_Half_BIT, supported); 648 linkmode_set_bit(ETHTOOL_LINK_MODE_1000baseT_Full_BIT, supported); 649 linkmode_set_bit(ETHTOOL_LINK_MODE_2500baseT_Full_BIT, supported); 650 linkmode_set_bit(ETHTOOL_LINK_MODE_5000baseT_Full_BIT, supported); 651 linkmode_set_bit(ETHTOOL_LINK_MODE_10000baseT_Full_BIT, supported); 652 } 653 654 static int phylink_parse_fixedlink(struct phylink *pl, 655 const struct fwnode_handle *fwnode) 656 { 657 __ETHTOOL_DECLARE_LINK_MODE_MASK(match) = { 0, }; 658 __ETHTOOL_DECLARE_LINK_MODE_MASK(mask) = { 0, }; 659 const struct link_capabilities *c; 660 struct fwnode_handle *fixed_node; 661 struct gpio_desc *desc; 662 u32 speed; 663 int ret; 664 665 fixed_node = fwnode_get_named_child_node(fwnode, "fixed-link"); 666 if (fixed_node) { 667 ret = fwnode_property_read_u32(fixed_node, "speed", &speed); 668 669 pl->link_config.speed = speed; 670 pl->link_config.duplex = DUPLEX_HALF; 671 672 if (fwnode_property_read_bool(fixed_node, "full-duplex")) 673 pl->link_config.duplex = DUPLEX_FULL; 674 675 /* We treat the "pause" and "asym-pause" terminology as 676 * defining the link partner's ability. 677 */ 678 if (fwnode_property_read_bool(fixed_node, "pause")) 679 __set_bit(ETHTOOL_LINK_MODE_Pause_BIT, 680 pl->link_config.lp_advertising); 681 if (fwnode_property_read_bool(fixed_node, "asym-pause")) 682 __set_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, 683 pl->link_config.lp_advertising); 684 685 if (ret == 0) { 686 desc = fwnode_gpiod_get_index(fixed_node, "link", 0, 687 GPIOD_IN, "?"); 688 689 if (!IS_ERR(desc)) 690 pl->link_gpio = desc; 691 else if (desc == ERR_PTR(-EPROBE_DEFER)) 692 ret = -EPROBE_DEFER; 693 } 694 fwnode_handle_put(fixed_node); 695 696 if (ret) 697 return ret; 698 } else { 699 u32 prop[5]; 700 701 ret = fwnode_property_read_u32_array(fwnode, "fixed-link", 702 NULL, 0); 703 if (ret != ARRAY_SIZE(prop)) { 704 phylink_err(pl, "broken fixed-link?\n"); 705 return -EINVAL; 706 } 707 708 phylink_warn(pl, "%pfw uses deprecated array-style fixed-link binding!\n", 709 fwnode); 710 711 ret = fwnode_property_read_u32_array(fwnode, "fixed-link", 712 prop, ARRAY_SIZE(prop)); 713 if (!ret) { 714 pl->link_config.duplex = prop[1] ? 715 DUPLEX_FULL : DUPLEX_HALF; 716 pl->link_config.speed = prop[2]; 717 if (prop[3]) 718 __set_bit(ETHTOOL_LINK_MODE_Pause_BIT, 719 pl->link_config.lp_advertising); 720 if (prop[4]) 721 __set_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, 722 pl->link_config.lp_advertising); 723 } 724 } 725 726 if (pl->link_config.speed > SPEED_1000 && 727 pl->link_config.duplex != DUPLEX_FULL) 728 phylink_warn(pl, "fixed link specifies half duplex for %dMbps link?\n", 729 pl->link_config.speed); 730 731 linkmode_zero(pl->supported); 732 phylink_fill_fixedlink_supported(pl->supported); 733 734 linkmode_copy(pl->link_config.advertising, pl->supported); 735 phylink_validate(pl, pl->supported, &pl->link_config); 736 737 c = phy_caps_lookup(pl->link_config.speed, pl->link_config.duplex, 738 pl->supported, true); 739 if (c) 740 linkmode_and(match, pl->supported, c->linkmodes); 741 742 linkmode_set_bit(ETHTOOL_LINK_MODE_Pause_BIT, mask); 743 linkmode_set_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, mask); 744 linkmode_set_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, mask); 745 linkmode_and(pl->supported, pl->supported, mask); 746 747 phylink_set(pl->supported, MII); 748 749 if (c) { 750 linkmode_or(pl->supported, pl->supported, match); 751 linkmode_or(pl->link_config.lp_advertising, 752 pl->link_config.lp_advertising, match); 753 } else { 754 phylink_warn(pl, "fixed link %s duplex %dMbps not recognised\n", 755 pl->link_config.duplex == DUPLEX_FULL ? "full" : "half", 756 pl->link_config.speed); 757 } 758 759 linkmode_and(pl->link_config.advertising, pl->link_config.advertising, 760 pl->supported); 761 762 pl->link_config.link = 1; 763 pl->link_config.an_complete = 1; 764 765 return 0; 766 } 767 768 static int phylink_parse_mode(struct phylink *pl, 769 const struct fwnode_handle *fwnode) 770 { 771 struct fwnode_handle *dn; 772 const char *managed; 773 unsigned long caps; 774 775 if (pl->config->default_an_inband) 776 pl->cfg_link_an_mode = MLO_AN_INBAND; 777 778 dn = fwnode_get_named_child_node(fwnode, "fixed-link"); 779 if (dn || fwnode_property_present(fwnode, "fixed-link")) 780 pl->cfg_link_an_mode = MLO_AN_FIXED; 781 fwnode_handle_put(dn); 782 783 if ((fwnode_property_read_string(fwnode, "managed", &managed) == 0 && 784 strcmp(managed, "in-band-status") == 0)) { 785 if (pl->cfg_link_an_mode == MLO_AN_FIXED) { 786 phylink_err(pl, 787 "can't use both fixed-link and in-band-status\n"); 788 return -EINVAL; 789 } 790 791 pl->cfg_link_an_mode = MLO_AN_INBAND; 792 } 793 794 if (pl->cfg_link_an_mode == MLO_AN_INBAND) { 795 linkmode_zero(pl->supported); 796 phylink_set(pl->supported, MII); 797 phylink_set(pl->supported, Autoneg); 798 phylink_set(pl->supported, Asym_Pause); 799 phylink_set(pl->supported, Pause); 800 801 switch (pl->link_config.interface) { 802 case PHY_INTERFACE_MODE_SGMII: 803 case PHY_INTERFACE_MODE_PSGMII: 804 case PHY_INTERFACE_MODE_QSGMII: 805 case PHY_INTERFACE_MODE_QUSGMII: 806 case PHY_INTERFACE_MODE_RGMII: 807 case PHY_INTERFACE_MODE_RGMII_ID: 808 case PHY_INTERFACE_MODE_RGMII_RXID: 809 case PHY_INTERFACE_MODE_RGMII_TXID: 810 case PHY_INTERFACE_MODE_RTBI: 811 case PHY_INTERFACE_MODE_1000BASEX: 812 case PHY_INTERFACE_MODE_2500BASEX: 813 case PHY_INTERFACE_MODE_5GBASER: 814 case PHY_INTERFACE_MODE_25GBASER: 815 case PHY_INTERFACE_MODE_USXGMII: 816 case PHY_INTERFACE_MODE_10G_QXGMII: 817 case PHY_INTERFACE_MODE_10GKR: 818 case PHY_INTERFACE_MODE_10GBASER: 819 case PHY_INTERFACE_MODE_XLGMII: 820 case PHY_INTERFACE_MODE_50GBASER: 821 case PHY_INTERFACE_MODE_LAUI: 822 case PHY_INTERFACE_MODE_100GBASEP: 823 caps = ~(MAC_SYM_PAUSE | MAC_ASYM_PAUSE); 824 caps = phylink_get_capabilities(pl->link_config.interface, caps, 825 RATE_MATCH_NONE); 826 phylink_caps_to_linkmodes(pl->supported, caps); 827 break; 828 829 default: 830 phylink_err(pl, 831 "incorrect link mode %s for in-band status\n", 832 phy_modes(pl->link_config.interface)); 833 return -EINVAL; 834 } 835 836 linkmode_copy(pl->link_config.advertising, pl->supported); 837 838 if (phylink_validate(pl, pl->supported, &pl->link_config)) { 839 phylink_err(pl, 840 "failed to validate link configuration for in-band status\n"); 841 return -EINVAL; 842 } 843 } 844 845 return 0; 846 } 847 848 static void phylink_apply_manual_flow(struct phylink *pl, 849 struct phylink_link_state *state) 850 { 851 /* If autoneg is disabled, pause AN is also disabled */ 852 if (!linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, 853 state->advertising)) 854 state->pause &= ~MLO_PAUSE_AN; 855 856 /* Manual configuration of pause modes */ 857 if (!(pl->link_config.pause & MLO_PAUSE_AN)) 858 state->pause = pl->link_config.pause; 859 } 860 861 static void phylink_resolve_an_pause(struct phylink_link_state *state) 862 { 863 bool tx_pause, rx_pause; 864 865 if (state->duplex == DUPLEX_FULL) { 866 linkmode_resolve_pause(state->advertising, 867 state->lp_advertising, 868 &tx_pause, &rx_pause); 869 if (tx_pause) 870 state->pause |= MLO_PAUSE_TX; 871 if (rx_pause) 872 state->pause |= MLO_PAUSE_RX; 873 } 874 } 875 876 static unsigned int phylink_pcs_inband_caps(struct phylink_pcs *pcs, 877 phy_interface_t interface) 878 { 879 if (pcs && pcs->ops->pcs_inband_caps) 880 return pcs->ops->pcs_inband_caps(pcs, interface); 881 882 return 0; 883 } 884 885 static void phylink_pcs_pre_config(struct phylink_pcs *pcs, 886 phy_interface_t interface) 887 { 888 if (pcs && pcs->ops->pcs_pre_config) 889 pcs->ops->pcs_pre_config(pcs, interface); 890 } 891 892 static int phylink_pcs_post_config(struct phylink_pcs *pcs, 893 phy_interface_t interface) 894 { 895 int err = 0; 896 897 if (pcs && pcs->ops->pcs_post_config) 898 err = pcs->ops->pcs_post_config(pcs, interface); 899 900 return err; 901 } 902 903 static void phylink_pcs_disable(struct phylink_pcs *pcs) 904 { 905 if (pcs && pcs->ops->pcs_disable) 906 pcs->ops->pcs_disable(pcs); 907 } 908 909 static int phylink_pcs_enable(struct phylink_pcs *pcs) 910 { 911 int err = 0; 912 913 if (pcs && pcs->ops->pcs_enable) 914 err = pcs->ops->pcs_enable(pcs); 915 916 return err; 917 } 918 919 static int phylink_pcs_config(struct phylink_pcs *pcs, unsigned int neg_mode, 920 const struct phylink_link_state *state, 921 bool permit_pause_to_mac) 922 { 923 if (!pcs) 924 return 0; 925 926 return pcs->ops->pcs_config(pcs, neg_mode, state->interface, 927 state->advertising, permit_pause_to_mac); 928 } 929 930 static void phylink_pcs_link_up(struct phylink_pcs *pcs, unsigned int neg_mode, 931 phy_interface_t interface, int speed, 932 int duplex) 933 { 934 if (pcs && pcs->ops->pcs_link_up) 935 pcs->ops->pcs_link_up(pcs, neg_mode, interface, speed, duplex); 936 } 937 938 static void phylink_pcs_disable_eee(struct phylink_pcs *pcs) 939 { 940 if (pcs && pcs->ops->pcs_disable_eee) 941 pcs->ops->pcs_disable_eee(pcs); 942 } 943 944 static void phylink_pcs_enable_eee(struct phylink_pcs *pcs) 945 { 946 if (pcs && pcs->ops->pcs_enable_eee) 947 pcs->ops->pcs_enable_eee(pcs); 948 } 949 950 /* Query inband for a specific interface mode, asking the MAC for the 951 * PCS which will be used to handle the interface mode. 952 */ 953 static unsigned int phylink_inband_caps(struct phylink *pl, 954 phy_interface_t interface) 955 { 956 struct phylink_pcs *pcs; 957 958 if (!pl->mac_ops->mac_select_pcs) 959 return 0; 960 961 pcs = pl->mac_ops->mac_select_pcs(pl->config, interface); 962 if (!pcs) 963 return 0; 964 965 return phylink_pcs_inband_caps(pcs, interface); 966 } 967 968 static void phylink_pcs_poll_stop(struct phylink *pl) 969 { 970 if (pl->cfg_link_an_mode == MLO_AN_INBAND) 971 timer_delete(&pl->link_poll); 972 } 973 974 static void phylink_pcs_poll_start(struct phylink *pl) 975 { 976 if (pl->pcs && pl->pcs->poll && pl->cfg_link_an_mode == MLO_AN_INBAND) 977 mod_timer(&pl->link_poll, jiffies + HZ); 978 } 979 980 int phylink_pcs_pre_init(struct phylink *pl, struct phylink_pcs *pcs) 981 { 982 int ret = 0; 983 984 /* Signal to PCS driver that MAC requires RX clock for init */ 985 if (pl->config->mac_requires_rxc) 986 pcs->rxc_always_on = true; 987 988 if (pcs->ops->pcs_pre_init) 989 ret = pcs->ops->pcs_pre_init(pcs); 990 991 return ret; 992 } 993 EXPORT_SYMBOL_GPL(phylink_pcs_pre_init); 994 995 static void phylink_mac_config(struct phylink *pl, 996 const struct phylink_link_state *state) 997 { 998 struct phylink_link_state st = *state; 999 1000 /* Stop drivers incorrectly using these */ 1001 linkmode_zero(st.lp_advertising); 1002 st.speed = SPEED_UNKNOWN; 1003 st.duplex = DUPLEX_UNKNOWN; 1004 st.an_complete = false; 1005 st.link = false; 1006 1007 phylink_dbg(pl, 1008 "%s: mode=%s/%s/%s adv=%*pb pause=%02x\n", 1009 __func__, phylink_an_mode_str(pl->act_link_an_mode), 1010 phy_modes(st.interface), 1011 phy_rate_matching_to_str(st.rate_matching), 1012 __ETHTOOL_LINK_MODE_MASK_NBITS, st.advertising, 1013 st.pause); 1014 1015 pl->mac_ops->mac_config(pl->config, pl->act_link_an_mode, &st); 1016 } 1017 1018 static void phylink_pcs_an_restart(struct phylink *pl) 1019 { 1020 if (pl->pcs && linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, 1021 pl->link_config.advertising) && 1022 phy_interface_mode_is_8023z(pl->link_config.interface) && 1023 phylink_autoneg_inband(pl->act_link_an_mode)) 1024 pl->pcs->ops->pcs_an_restart(pl->pcs); 1025 } 1026 1027 enum inband_type { 1028 INBAND_NONE, 1029 INBAND_CISCO_SGMII, 1030 INBAND_BASEX, 1031 }; 1032 1033 static enum inband_type phylink_get_inband_type(phy_interface_t interface) 1034 { 1035 switch (interface) { 1036 case PHY_INTERFACE_MODE_SGMII: 1037 case PHY_INTERFACE_MODE_QSGMII: 1038 case PHY_INTERFACE_MODE_QUSGMII: 1039 case PHY_INTERFACE_MODE_USXGMII: 1040 case PHY_INTERFACE_MODE_10G_QXGMII: 1041 /* These protocols are designed for use with a PHY which 1042 * communicates its negotiation result back to the MAC via 1043 * inband communication. Note: there exist PHYs that run 1044 * with SGMII but do not send the inband data. 1045 */ 1046 return INBAND_CISCO_SGMII; 1047 1048 case PHY_INTERFACE_MODE_1000BASEX: 1049 case PHY_INTERFACE_MODE_2500BASEX: 1050 /* 1000base-X is designed for use media-side for Fibre 1051 * connections, and thus the Autoneg bit needs to be 1052 * taken into account. We also do this for 2500base-X 1053 * as well, but drivers may not support this, so may 1054 * need to override this. 1055 */ 1056 return INBAND_BASEX; 1057 1058 default: 1059 return INBAND_NONE; 1060 } 1061 } 1062 1063 /** 1064 * phylink_pcs_neg_mode() - helper to determine PCS inband mode 1065 * @pl: a pointer to a &struct phylink returned from phylink_create() 1066 * @pcs: a pointer to &struct phylink_pcs 1067 * @interface: interface mode to be used 1068 * @advertising: adertisement ethtool link mode mask 1069 * 1070 * Determines the negotiation mode to be used by the PCS, and returns 1071 * one of: 1072 * 1073 * - %PHYLINK_PCS_NEG_NONE: interface mode does not support inband 1074 * - %PHYLINK_PCS_NEG_OUTBAND: an out of band mode (e.g. reading the PHY) 1075 * will be used. 1076 * - %PHYLINK_PCS_NEG_INBAND_DISABLED: inband mode selected but autoneg 1077 * disabled 1078 * - %PHYLINK_PCS_NEG_INBAND_ENABLED: inband mode selected and autoneg enabled 1079 * 1080 * Note: this is for cases where the PCS itself is involved in negotiation 1081 * (e.g. Clause 37, SGMII and similar) not Clause 73. 1082 */ 1083 static void phylink_pcs_neg_mode(struct phylink *pl, struct phylink_pcs *pcs, 1084 phy_interface_t interface, 1085 const unsigned long *advertising) 1086 { 1087 unsigned int pcs_ib_caps = 0; 1088 unsigned int phy_ib_caps = 0; 1089 unsigned int neg_mode, mode; 1090 enum inband_type type; 1091 1092 type = phylink_get_inband_type(interface); 1093 if (type == INBAND_NONE) { 1094 pl->pcs_neg_mode = PHYLINK_PCS_NEG_NONE; 1095 pl->act_link_an_mode = pl->req_link_an_mode; 1096 return; 1097 } 1098 1099 mode = pl->req_link_an_mode; 1100 1101 pl->phy_ib_mode = 0; 1102 1103 if (pcs) 1104 pcs_ib_caps = phylink_pcs_inband_caps(pcs, interface); 1105 1106 if (pl->phydev) 1107 phy_ib_caps = phy_inband_caps(pl->phydev, interface); 1108 1109 phylink_dbg(pl, "interface %s inband modes: pcs=%02x phy=%02x\n", 1110 phy_modes(interface), pcs_ib_caps, phy_ib_caps); 1111 1112 if (!phylink_autoneg_inband(mode)) { 1113 bool pcs_ib_only = false; 1114 bool phy_ib_only = false; 1115 1116 if (pcs_ib_caps && pcs_ib_caps != LINK_INBAND_DISABLE) { 1117 /* PCS supports reporting in-band capabilities, and 1118 * supports more than disable mode. 1119 */ 1120 if (pcs_ib_caps & LINK_INBAND_DISABLE) 1121 neg_mode = PHYLINK_PCS_NEG_OUTBAND; 1122 else if (pcs_ib_caps & LINK_INBAND_ENABLE) 1123 pcs_ib_only = true; 1124 } 1125 1126 if (phy_ib_caps && phy_ib_caps != LINK_INBAND_DISABLE) { 1127 /* PHY supports in-band capabilities, and supports 1128 * more than disable mode. 1129 */ 1130 if (phy_ib_caps & LINK_INBAND_DISABLE) 1131 pl->phy_ib_mode = LINK_INBAND_DISABLE; 1132 else if (phy_ib_caps & LINK_INBAND_BYPASS) 1133 pl->phy_ib_mode = LINK_INBAND_BYPASS; 1134 else if (phy_ib_caps & LINK_INBAND_ENABLE) 1135 phy_ib_only = true; 1136 } 1137 1138 /* If either the PCS or PHY requires inband to be enabled, 1139 * this is an invalid configuration. Provide a diagnostic 1140 * message for this case, but don't try to force the issue. 1141 */ 1142 if (pcs_ib_only || phy_ib_only) 1143 phylink_warn(pl, 1144 "firmware wants %s mode, but %s%s%s requires inband\n", 1145 phylink_an_mode_str(mode), 1146 pcs_ib_only ? "PCS" : "", 1147 pcs_ib_only && phy_ib_only ? " and " : "", 1148 phy_ib_only ? "PHY" : ""); 1149 1150 neg_mode = PHYLINK_PCS_NEG_OUTBAND; 1151 } else if (type == INBAND_CISCO_SGMII || pl->phydev) { 1152 /* For SGMII modes which are designed to be used with PHYs, or 1153 * Base-X with a PHY, we try to use in-band mode where-ever 1154 * possible. However, there are some PHYs e.g. BCM84881 which 1155 * do not support in-band. 1156 */ 1157 const unsigned int inband_ok = LINK_INBAND_ENABLE | 1158 LINK_INBAND_BYPASS; 1159 const unsigned int outband_ok = LINK_INBAND_DISABLE | 1160 LINK_INBAND_BYPASS; 1161 /* PCS PHY 1162 * D E D E 1163 * 0 0 0 0 no information inband enabled 1164 * 1 0 0 0 pcs doesn't support outband 1165 * 0 1 0 0 pcs required inband enabled 1166 * 1 1 0 0 pcs optional inband enabled 1167 * 0 0 1 0 phy doesn't support outband 1168 * 1 0 1 0 pcs+phy doesn't support outband 1169 * 0 1 1 0 pcs required, phy doesn't support, invalid 1170 * 1 1 1 0 pcs optional, phy doesn't support, outband 1171 * 0 0 0 1 phy required inband enabled 1172 * 1 0 0 1 pcs doesn't support, phy required, invalid 1173 * 0 1 0 1 pcs+phy required inband enabled 1174 * 1 1 0 1 pcs optional, phy required inband enabled 1175 * 0 0 1 1 phy optional inband enabled 1176 * 1 0 1 1 pcs doesn't support, phy optional, outband 1177 * 0 1 1 1 pcs required, phy optional inband enabled 1178 * 1 1 1 1 pcs+phy optional inband enabled 1179 */ 1180 if ((!pcs_ib_caps || pcs_ib_caps & inband_ok) && 1181 (!phy_ib_caps || phy_ib_caps & inband_ok)) { 1182 /* In-band supported or unknown at both ends. Enable 1183 * in-band mode with or without bypass at the PHY. 1184 */ 1185 if (phy_ib_caps & LINK_INBAND_ENABLE) 1186 pl->phy_ib_mode = LINK_INBAND_ENABLE; 1187 else if (phy_ib_caps & LINK_INBAND_BYPASS) 1188 pl->phy_ib_mode = LINK_INBAND_BYPASS; 1189 1190 neg_mode = PHYLINK_PCS_NEG_INBAND_ENABLED; 1191 } else if ((!pcs_ib_caps || pcs_ib_caps & outband_ok) && 1192 (!phy_ib_caps || phy_ib_caps & outband_ok)) { 1193 /* Either in-band not supported at at least one end. 1194 * In-band bypass at the other end is possible. 1195 */ 1196 if (phy_ib_caps & LINK_INBAND_DISABLE) 1197 pl->phy_ib_mode = LINK_INBAND_DISABLE; 1198 else if (phy_ib_caps & LINK_INBAND_BYPASS) 1199 pl->phy_ib_mode = LINK_INBAND_BYPASS; 1200 1201 neg_mode = PHYLINK_PCS_NEG_OUTBAND; 1202 if (pl->phydev) 1203 mode = MLO_AN_PHY; 1204 } else { 1205 /* invalid */ 1206 phylink_warn(pl, "%s: incompatible in-band capabilities, trying in-band", 1207 phy_modes(interface)); 1208 neg_mode = PHYLINK_PCS_NEG_INBAND_ENABLED; 1209 } 1210 } else { 1211 /* For Base-X without a PHY */ 1212 if (pcs_ib_caps == LINK_INBAND_DISABLE) 1213 /* If the PCS doesn't support inband, then inband must 1214 * be disabled. 1215 */ 1216 neg_mode = PHYLINK_PCS_NEG_INBAND_DISABLED; 1217 else if (pcs_ib_caps == LINK_INBAND_ENABLE) 1218 /* If the PCS requires inband, then inband must always 1219 * be enabled. 1220 */ 1221 neg_mode = PHYLINK_PCS_NEG_INBAND_ENABLED; 1222 else if (linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, 1223 advertising)) 1224 neg_mode = PHYLINK_PCS_NEG_INBAND_ENABLED; 1225 else 1226 neg_mode = PHYLINK_PCS_NEG_INBAND_DISABLED; 1227 } 1228 1229 pl->pcs_neg_mode = neg_mode; 1230 pl->act_link_an_mode = mode; 1231 } 1232 1233 static void phylink_major_config(struct phylink *pl, bool restart, 1234 const struct phylink_link_state *state) 1235 { 1236 struct phylink_pcs *pcs = NULL; 1237 bool pcs_changed = false; 1238 unsigned int rate_kbd; 1239 int err; 1240 1241 phylink_dbg(pl, "major config, requested %s/%s\n", 1242 phylink_an_mode_str(pl->req_link_an_mode), 1243 phy_modes(state->interface)); 1244 1245 pl->major_config_failed = false; 1246 1247 if (pl->mac_ops->mac_select_pcs) { 1248 pcs = pl->mac_ops->mac_select_pcs(pl->config, state->interface); 1249 if (IS_ERR(pcs)) { 1250 phylink_err(pl, 1251 "mac_select_pcs unexpectedly failed: %pe\n", 1252 pcs); 1253 1254 pl->major_config_failed = true; 1255 return; 1256 } 1257 1258 pcs_changed = pl->pcs != pcs; 1259 } 1260 1261 phylink_pcs_neg_mode(pl, pcs, state->interface, state->advertising); 1262 1263 phylink_dbg(pl, "major config, active %s/%s/%s\n", 1264 phylink_an_mode_str(pl->act_link_an_mode), 1265 phylink_pcs_mode_str(pl->pcs_neg_mode), 1266 phy_modes(state->interface)); 1267 1268 phylink_pcs_poll_stop(pl); 1269 1270 if (pl->mac_ops->mac_prepare) { 1271 err = pl->mac_ops->mac_prepare(pl->config, pl->act_link_an_mode, 1272 state->interface); 1273 if (err < 0) { 1274 phylink_err(pl, "mac_prepare failed: %pe\n", 1275 ERR_PTR(err)); 1276 pl->major_config_failed = true; 1277 return; 1278 } 1279 } 1280 1281 /* If we have a new PCS, switch to the new PCS after preparing the MAC 1282 * for the change. 1283 */ 1284 if (pcs_changed) { 1285 phylink_pcs_disable(pl->pcs); 1286 1287 if (pl->pcs) 1288 pl->pcs->phylink = NULL; 1289 1290 pcs->phylink = pl; 1291 1292 pl->pcs = pcs; 1293 } 1294 1295 if (pl->pcs) 1296 phylink_pcs_pre_config(pl->pcs, state->interface); 1297 1298 phylink_mac_config(pl, state); 1299 1300 if (pl->pcs) { 1301 err = phylink_pcs_post_config(pl->pcs, state->interface); 1302 if (err < 0) { 1303 phylink_err(pl, "pcs_post_config failed: %pe\n", 1304 ERR_PTR(err)); 1305 1306 pl->major_config_failed = true; 1307 } 1308 } 1309 1310 if (pl->pcs_state == PCS_STATE_STARTING || pcs_changed) 1311 phylink_pcs_enable(pl->pcs); 1312 1313 err = phylink_pcs_config(pl->pcs, pl->pcs_neg_mode, state, 1314 !!(pl->link_config.pause & MLO_PAUSE_AN)); 1315 if (err < 0) { 1316 phylink_err(pl, "pcs_config failed: %pe\n", ERR_PTR(err)); 1317 pl->major_config_failed = true; 1318 } else if (err > 0) { 1319 restart = true; 1320 } 1321 1322 if (restart) 1323 phylink_pcs_an_restart(pl); 1324 1325 if (pl->mac_ops->mac_finish) { 1326 err = pl->mac_ops->mac_finish(pl->config, pl->act_link_an_mode, 1327 state->interface); 1328 if (err < 0) { 1329 phylink_err(pl, "mac_finish failed: %pe\n", 1330 ERR_PTR(err)); 1331 1332 pl->major_config_failed = true; 1333 } 1334 } 1335 1336 if (pl->phydev && pl->phy_ib_mode) { 1337 err = phy_config_inband(pl->phydev, pl->phy_ib_mode); 1338 if (err < 0) { 1339 phylink_err(pl, "phy_config_inband: %pe\n", 1340 ERR_PTR(err)); 1341 1342 pl->major_config_failed = true; 1343 } 1344 } 1345 1346 if (pl->sfp_bus) { 1347 rate_kbd = phylink_interface_signal_rate(state->interface); 1348 if (rate_kbd) 1349 sfp_upstream_set_signal_rate(pl->sfp_bus, rate_kbd); 1350 } 1351 1352 phylink_pcs_poll_start(pl); 1353 } 1354 1355 /* 1356 * Reconfigure for a change of inband advertisement. 1357 * If we have a separate PCS, we only need to call its pcs_config() method, 1358 * and then restart AN if it indicates something changed. Otherwise, we do 1359 * the full MAC reconfiguration. 1360 */ 1361 static int phylink_change_inband_advert(struct phylink *pl) 1362 { 1363 int ret; 1364 1365 if (test_bit(PHYLINK_DISABLE_STOPPED, &pl->phylink_disable_state)) 1366 return 0; 1367 1368 phylink_dbg(pl, "%s: mode=%s/%s adv=%*pb pause=%02x\n", __func__, 1369 phylink_an_mode_str(pl->req_link_an_mode), 1370 phy_modes(pl->link_config.interface), 1371 __ETHTOOL_LINK_MODE_MASK_NBITS, pl->link_config.advertising, 1372 pl->link_config.pause); 1373 1374 /* Recompute the PCS neg mode */ 1375 phylink_pcs_neg_mode(pl, pl->pcs, pl->link_config.interface, 1376 pl->link_config.advertising); 1377 1378 /* Modern PCS-based method; update the advert at the PCS, and 1379 * restart negotiation if the pcs_config() helper indicates that 1380 * the programmed advertisement has changed. 1381 */ 1382 ret = phylink_pcs_config(pl->pcs, pl->pcs_neg_mode, &pl->link_config, 1383 !!(pl->link_config.pause & MLO_PAUSE_AN)); 1384 if (ret < 0) 1385 return ret; 1386 1387 if (ret > 0) 1388 phylink_pcs_an_restart(pl); 1389 1390 return 0; 1391 } 1392 1393 static void phylink_mac_pcs_get_state(struct phylink *pl, 1394 struct phylink_link_state *state) 1395 { 1396 struct phylink_pcs *pcs; 1397 bool autoneg; 1398 1399 linkmode_copy(state->advertising, pl->link_config.advertising); 1400 linkmode_zero(state->lp_advertising); 1401 state->interface = pl->link_config.interface; 1402 state->rate_matching = pl->link_config.rate_matching; 1403 state->an_complete = 0; 1404 state->link = 1; 1405 1406 autoneg = pl->pcs_neg_mode == PHYLINK_PCS_NEG_INBAND_ENABLED; 1407 if (autoneg) { 1408 state->speed = SPEED_UNKNOWN; 1409 state->duplex = DUPLEX_UNKNOWN; 1410 state->pause = MLO_PAUSE_NONE; 1411 } else { 1412 state->speed = pl->link_config.speed; 1413 state->duplex = pl->link_config.duplex; 1414 state->pause = pl->link_config.pause; 1415 } 1416 1417 pcs = pl->pcs; 1418 if (pcs) 1419 pcs->ops->pcs_get_state(pcs, pl->pcs_neg_mode, state); 1420 else 1421 state->link = 0; 1422 } 1423 1424 /* The fixed state is... fixed except for the link state, 1425 * which may be determined by a GPIO or a callback. 1426 */ 1427 static void phylink_get_fixed_state(struct phylink *pl, 1428 struct phylink_link_state *state) 1429 { 1430 *state = pl->link_config; 1431 if (pl->config->get_fixed_state) 1432 pl->config->get_fixed_state(pl->config, state); 1433 else if (pl->link_gpio) 1434 state->link = !!gpiod_get_value_cansleep(pl->link_gpio); 1435 1436 state->pause = MLO_PAUSE_NONE; 1437 phylink_resolve_an_pause(state); 1438 } 1439 1440 static void phylink_mac_initial_config(struct phylink *pl, bool force_restart) 1441 { 1442 struct phylink_link_state link_state; 1443 struct phy_device *phy = pl->phydev; 1444 1445 switch (pl->req_link_an_mode) { 1446 case MLO_AN_PHY: 1447 link_state = pl->phy_state; 1448 break; 1449 1450 case MLO_AN_FIXED: 1451 phylink_get_fixed_state(pl, &link_state); 1452 break; 1453 1454 case MLO_AN_INBAND: 1455 link_state = pl->link_config; 1456 if (link_state.interface == PHY_INTERFACE_MODE_SGMII) 1457 link_state.pause = MLO_PAUSE_NONE; 1458 break; 1459 1460 default: /* can't happen */ 1461 return; 1462 } 1463 1464 link_state.link = false; 1465 1466 phylink_apply_manual_flow(pl, &link_state); 1467 if (phy) 1468 mutex_lock(&phy->lock); 1469 phylink_major_config(pl, force_restart, &link_state); 1470 if (phy) 1471 mutex_unlock(&phy->lock); 1472 } 1473 1474 static const char *phylink_pause_to_str(int pause) 1475 { 1476 switch (pause & MLO_PAUSE_TXRX_MASK) { 1477 case MLO_PAUSE_TX | MLO_PAUSE_RX: 1478 return "rx/tx"; 1479 case MLO_PAUSE_TX: 1480 return "tx"; 1481 case MLO_PAUSE_RX: 1482 return "rx"; 1483 default: 1484 return "off"; 1485 } 1486 } 1487 1488 static void phylink_deactivate_lpi(struct phylink *pl) 1489 { 1490 if (pl->mac_enable_tx_lpi) { 1491 pl->mac_enable_tx_lpi = false; 1492 1493 phylink_dbg(pl, "disabling LPI\n"); 1494 1495 pl->mac_ops->mac_disable_tx_lpi(pl->config); 1496 1497 phylink_pcs_disable_eee(pl->pcs); 1498 } 1499 } 1500 1501 static void phylink_activate_lpi(struct phylink *pl) 1502 { 1503 int err; 1504 1505 if (!test_bit(pl->cur_interface, pl->config->lpi_interfaces)) { 1506 phylink_dbg(pl, "MAC does not support LPI with %s\n", 1507 phy_modes(pl->cur_interface)); 1508 return; 1509 } 1510 1511 phylink_dbg(pl, "LPI timer %uus, tx clock stop %u\n", 1512 pl->mac_tx_lpi_timer, pl->mac_tx_clk_stop); 1513 1514 phylink_pcs_enable_eee(pl->pcs); 1515 1516 err = pl->mac_ops->mac_enable_tx_lpi(pl->config, pl->mac_tx_lpi_timer, 1517 pl->mac_tx_clk_stop); 1518 if (err) { 1519 phylink_pcs_disable_eee(pl->pcs); 1520 phylink_err(pl, "%ps() failed: %pe\n", 1521 pl->mac_ops->mac_enable_tx_lpi, ERR_PTR(err)); 1522 return; 1523 } 1524 1525 pl->mac_enable_tx_lpi = true; 1526 } 1527 1528 static void phylink_link_up(struct phylink *pl, 1529 struct phylink_link_state link_state) 1530 { 1531 struct net_device *ndev = pl->netdev; 1532 int speed, duplex; 1533 bool rx_pause; 1534 1535 speed = link_state.speed; 1536 duplex = link_state.duplex; 1537 rx_pause = !!(link_state.pause & MLO_PAUSE_RX); 1538 1539 switch (link_state.rate_matching) { 1540 case RATE_MATCH_PAUSE: 1541 /* The PHY is doing rate matchion from the media rate (in 1542 * the link_state) to the interface speed, and will send 1543 * pause frames to the MAC to limit its transmission speed. 1544 */ 1545 speed = phylink_interface_max_speed(link_state.interface); 1546 duplex = DUPLEX_FULL; 1547 rx_pause = true; 1548 break; 1549 1550 case RATE_MATCH_CRS: 1551 /* The PHY is doing rate matchion from the media rate (in 1552 * the link_state) to the interface speed, and will cause 1553 * collisions to the MAC to limit its transmission speed. 1554 */ 1555 speed = phylink_interface_max_speed(link_state.interface); 1556 duplex = DUPLEX_HALF; 1557 break; 1558 } 1559 1560 pl->cur_interface = link_state.interface; 1561 1562 phylink_pcs_link_up(pl->pcs, pl->pcs_neg_mode, pl->cur_interface, speed, 1563 duplex); 1564 1565 pl->mac_ops->mac_link_up(pl->config, pl->phydev, pl->act_link_an_mode, 1566 pl->cur_interface, speed, duplex, 1567 !!(link_state.pause & MLO_PAUSE_TX), rx_pause); 1568 1569 if (pl->mac_supports_eee && pl->phy_enable_tx_lpi) 1570 phylink_activate_lpi(pl); 1571 1572 if (ndev) 1573 netif_carrier_on(ndev); 1574 1575 phylink_info(pl, 1576 "Link is Up - %s/%s - flow control %s\n", 1577 phy_speed_to_str(link_state.speed), 1578 phy_duplex_to_str(link_state.duplex), 1579 phylink_pause_to_str(link_state.pause)); 1580 } 1581 1582 static void phylink_link_down(struct phylink *pl) 1583 { 1584 struct net_device *ndev = pl->netdev; 1585 1586 if (ndev) 1587 netif_carrier_off(ndev); 1588 1589 phylink_deactivate_lpi(pl); 1590 1591 pl->mac_ops->mac_link_down(pl->config, pl->act_link_an_mode, 1592 pl->cur_interface); 1593 phylink_info(pl, "Link is Down\n"); 1594 } 1595 1596 static bool phylink_link_is_up(struct phylink *pl) 1597 { 1598 return pl->netdev ? netif_carrier_ok(pl->netdev) : pl->old_link_state; 1599 } 1600 1601 static void phylink_resolve(struct work_struct *w) 1602 { 1603 struct phylink *pl = container_of(w, struct phylink, resolve); 1604 struct phylink_link_state link_state; 1605 bool mac_config = false; 1606 bool retrigger = false; 1607 struct phy_device *phy; 1608 bool cur_link_state; 1609 1610 mutex_lock(&pl->phydev_mutex); 1611 phy = pl->phydev; 1612 if (phy) 1613 mutex_lock(&phy->lock); 1614 mutex_lock(&pl->state_mutex); 1615 cur_link_state = phylink_link_is_up(pl); 1616 1617 if (pl->phylink_disable_state) { 1618 pl->link_failed = false; 1619 link_state.link = false; 1620 } else if (pl->link_failed) { 1621 link_state.link = false; 1622 retrigger = true; 1623 } else if (pl->act_link_an_mode == MLO_AN_FIXED) { 1624 phylink_get_fixed_state(pl, &link_state); 1625 mac_config = link_state.link; 1626 } else if (pl->act_link_an_mode == MLO_AN_PHY) { 1627 link_state = pl->phy_state; 1628 mac_config = link_state.link; 1629 } else { 1630 phylink_mac_pcs_get_state(pl, &link_state); 1631 1632 /* The PCS may have a latching link-fail indicator. If the link 1633 * was up, bring the link down and re-trigger the resolve. 1634 * Otherwise, re-read the PCS state to get the current status 1635 * of the link. 1636 */ 1637 if (!link_state.link) { 1638 if (cur_link_state) 1639 retrigger = true; 1640 else 1641 phylink_mac_pcs_get_state(pl, &link_state); 1642 } 1643 1644 /* If we have a phy, the "up" state is the union of both the 1645 * PHY and the MAC 1646 */ 1647 if (phy) 1648 link_state.link &= pl->phy_state.link; 1649 1650 /* Only update if the PHY link is up */ 1651 if (phy && pl->phy_state.link) { 1652 /* If the interface has changed, force a link down 1653 * event if the link isn't already down, and re-resolve. 1654 */ 1655 if (link_state.interface != pl->phy_state.interface) { 1656 retrigger = true; 1657 link_state.link = false; 1658 } 1659 1660 link_state.interface = pl->phy_state.interface; 1661 1662 /* If we are doing rate matching, then the link 1663 * speed/duplex comes from the PHY 1664 */ 1665 if (pl->phy_state.rate_matching) { 1666 link_state.rate_matching = 1667 pl->phy_state.rate_matching; 1668 link_state.speed = pl->phy_state.speed; 1669 link_state.duplex = pl->phy_state.duplex; 1670 } 1671 1672 /* If we have a PHY, we need to update with the PHY 1673 * flow control bits. 1674 */ 1675 link_state.pause = pl->phy_state.pause; 1676 mac_config = true; 1677 } 1678 } 1679 1680 if (pl->act_link_an_mode != MLO_AN_FIXED) 1681 phylink_apply_manual_flow(pl, &link_state); 1682 1683 if (mac_config) { 1684 if (link_state.interface != pl->link_config.interface) { 1685 /* The interface has changed, force the link down and 1686 * then reconfigure. 1687 */ 1688 if (cur_link_state) { 1689 phylink_link_down(pl); 1690 cur_link_state = false; 1691 } 1692 phylink_major_config(pl, false, &link_state); 1693 pl->link_config.interface = link_state.interface; 1694 } 1695 } 1696 1697 /* If configuration of the interface failed, force the link down 1698 * until we get a successful configuration. 1699 */ 1700 if (pl->major_config_failed) 1701 link_state.link = false; 1702 1703 if (link_state.link != cur_link_state) { 1704 pl->old_link_state = link_state.link; 1705 if (!link_state.link) 1706 phylink_link_down(pl); 1707 else 1708 phylink_link_up(pl, link_state); 1709 } 1710 if (!link_state.link && retrigger) { 1711 pl->link_failed = false; 1712 queue_work(system_power_efficient_wq, &pl->resolve); 1713 } 1714 mutex_unlock(&pl->state_mutex); 1715 if (phy) 1716 mutex_unlock(&phy->lock); 1717 mutex_unlock(&pl->phydev_mutex); 1718 } 1719 1720 static void phylink_run_resolve(struct phylink *pl) 1721 { 1722 if (!pl->phylink_disable_state) 1723 queue_work(system_power_efficient_wq, &pl->resolve); 1724 } 1725 1726 static void phylink_run_resolve_and_disable(struct phylink *pl, int bit) 1727 { 1728 unsigned long state = pl->phylink_disable_state; 1729 1730 set_bit(bit, &pl->phylink_disable_state); 1731 if (state == 0) { 1732 queue_work(system_power_efficient_wq, &pl->resolve); 1733 flush_work(&pl->resolve); 1734 } 1735 } 1736 1737 static void phylink_enable_and_run_resolve(struct phylink *pl, int bit) 1738 { 1739 clear_bit(bit, &pl->phylink_disable_state); 1740 phylink_run_resolve(pl); 1741 } 1742 1743 static void phylink_fixed_poll(struct timer_list *t) 1744 { 1745 struct phylink *pl = container_of(t, struct phylink, link_poll); 1746 1747 mod_timer(t, jiffies + HZ); 1748 1749 phylink_run_resolve(pl); 1750 } 1751 1752 static const struct sfp_upstream_ops sfp_phylink_ops; 1753 1754 static int phylink_register_sfp(struct phylink *pl, 1755 const struct fwnode_handle *fwnode) 1756 { 1757 struct sfp_bus *bus; 1758 int ret; 1759 1760 if (!fwnode) 1761 return 0; 1762 1763 bus = sfp_bus_find_fwnode(fwnode); 1764 if (IS_ERR(bus)) { 1765 phylink_err(pl, "unable to attach SFP bus: %pe\n", bus); 1766 return PTR_ERR(bus); 1767 } 1768 1769 pl->sfp_bus = bus; 1770 1771 ret = sfp_bus_add_upstream(bus, pl, &sfp_phylink_ops); 1772 sfp_bus_put(bus); 1773 1774 return ret; 1775 } 1776 1777 /** 1778 * phylink_set_fixed_link() - set the fixed link 1779 * @pl: a pointer to a &struct phylink returned from phylink_create() 1780 * @state: a pointer to a struct phylink_link_state. 1781 * 1782 * This function is used when the link parameters are known and do not change, 1783 * making it suitable for certain types of network connections. 1784 * 1785 * Returns: zero on success or negative error code. 1786 */ 1787 int phylink_set_fixed_link(struct phylink *pl, 1788 const struct phylink_link_state *state) 1789 { 1790 const struct link_capabilities *c; 1791 unsigned long *adv; 1792 1793 if (pl->cfg_link_an_mode != MLO_AN_PHY || !state || 1794 !test_bit(PHYLINK_DISABLE_STOPPED, &pl->phylink_disable_state)) 1795 return -EINVAL; 1796 1797 c = phy_caps_lookup(state->speed, state->duplex, 1798 pl->supported, true); 1799 if (!c) 1800 return -EINVAL; 1801 1802 adv = pl->link_config.advertising; 1803 linkmode_and(adv, pl->supported, c->linkmodes); 1804 linkmode_set_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, adv); 1805 1806 pl->link_config.speed = state->speed; 1807 pl->link_config.duplex = state->duplex; 1808 pl->link_config.link = 1; 1809 pl->link_config.an_complete = 1; 1810 1811 pl->cfg_link_an_mode = MLO_AN_FIXED; 1812 pl->req_link_an_mode = pl->cfg_link_an_mode; 1813 1814 return 0; 1815 } 1816 EXPORT_SYMBOL_GPL(phylink_set_fixed_link); 1817 1818 /** 1819 * phylink_create() - create a phylink instance 1820 * @config: a pointer to the target &struct phylink_config 1821 * @fwnode: a pointer to a &struct fwnode_handle describing the network 1822 * interface 1823 * @iface: the desired link mode defined by &typedef phy_interface_t 1824 * @mac_ops: a pointer to a &struct phylink_mac_ops for the MAC. 1825 * 1826 * Create a new phylink instance, and parse the link parameters found in @np. 1827 * This will parse in-band modes, fixed-link or SFP configuration. 1828 * 1829 * Note: the rtnl lock must not be held when calling this function. 1830 * 1831 * Returns a pointer to a &struct phylink, or an error-pointer value. Users 1832 * must use IS_ERR() to check for errors from this function. 1833 */ 1834 struct phylink *phylink_create(struct phylink_config *config, 1835 const struct fwnode_handle *fwnode, 1836 phy_interface_t iface, 1837 const struct phylink_mac_ops *mac_ops) 1838 { 1839 struct phylink *pl; 1840 int ret; 1841 1842 /* Validate the supplied configuration */ 1843 if (phy_interface_empty(config->supported_interfaces)) { 1844 dev_err(config->dev, 1845 "phylink: error: empty supported_interfaces\n"); 1846 return ERR_PTR(-EINVAL); 1847 } 1848 1849 pl = kzalloc(sizeof(*pl), GFP_KERNEL); 1850 if (!pl) 1851 return ERR_PTR(-ENOMEM); 1852 1853 mutex_init(&pl->phydev_mutex); 1854 mutex_init(&pl->state_mutex); 1855 INIT_WORK(&pl->resolve, phylink_resolve); 1856 1857 pl->config = config; 1858 if (config->type == PHYLINK_NETDEV) { 1859 pl->netdev = to_net_dev(config->dev); 1860 netif_carrier_off(pl->netdev); 1861 } else if (config->type == PHYLINK_DEV) { 1862 pl->dev = config->dev; 1863 } else { 1864 kfree(pl); 1865 return ERR_PTR(-EINVAL); 1866 } 1867 1868 pl->mac_supports_eee_ops = phylink_mac_implements_lpi(mac_ops); 1869 pl->mac_supports_eee = pl->mac_supports_eee_ops && 1870 pl->config->lpi_capabilities && 1871 !phy_interface_empty(pl->config->lpi_interfaces); 1872 1873 /* Set the default EEE configuration */ 1874 pl->eee_cfg.eee_enabled = pl->config->eee_enabled_default; 1875 pl->eee_cfg.tx_lpi_enabled = pl->eee_cfg.eee_enabled; 1876 pl->eee_cfg.tx_lpi_timer = pl->config->lpi_timer_default; 1877 1878 pl->phy_state.interface = iface; 1879 pl->link_interface = iface; 1880 if (iface == PHY_INTERFACE_MODE_MOCA) 1881 pl->link_port = PORT_BNC; 1882 else 1883 pl->link_port = PORT_MII; 1884 pl->link_config.interface = iface; 1885 pl->link_config.pause = MLO_PAUSE_AN; 1886 pl->link_config.speed = SPEED_UNKNOWN; 1887 pl->link_config.duplex = DUPLEX_UNKNOWN; 1888 pl->pcs_state = PCS_STATE_DOWN; 1889 pl->mac_ops = mac_ops; 1890 __set_bit(PHYLINK_DISABLE_STOPPED, &pl->phylink_disable_state); 1891 timer_setup(&pl->link_poll, phylink_fixed_poll, 0); 1892 1893 linkmode_fill(pl->supported); 1894 linkmode_copy(pl->link_config.advertising, pl->supported); 1895 phylink_validate(pl, pl->supported, &pl->link_config); 1896 1897 ret = phylink_parse_mode(pl, fwnode); 1898 if (ret < 0) { 1899 kfree(pl); 1900 return ERR_PTR(ret); 1901 } 1902 1903 if (pl->cfg_link_an_mode == MLO_AN_FIXED) { 1904 ret = phylink_parse_fixedlink(pl, fwnode); 1905 if (ret < 0) { 1906 kfree(pl); 1907 return ERR_PTR(ret); 1908 } 1909 } 1910 1911 pl->req_link_an_mode = pl->cfg_link_an_mode; 1912 1913 ret = phylink_register_sfp(pl, fwnode); 1914 if (ret < 0) { 1915 kfree(pl); 1916 return ERR_PTR(ret); 1917 } 1918 1919 return pl; 1920 } 1921 EXPORT_SYMBOL_GPL(phylink_create); 1922 1923 /** 1924 * phylink_destroy() - cleanup and destroy the phylink instance 1925 * @pl: a pointer to a &struct phylink returned from phylink_create() 1926 * 1927 * Destroy a phylink instance. Any PHY that has been attached must have been 1928 * cleaned up via phylink_disconnect_phy() prior to calling this function. 1929 * 1930 * Note: the rtnl lock must not be held when calling this function. 1931 */ 1932 void phylink_destroy(struct phylink *pl) 1933 { 1934 sfp_bus_del_upstream(pl->sfp_bus); 1935 if (pl->link_gpio) 1936 gpiod_put(pl->link_gpio); 1937 1938 cancel_work_sync(&pl->resolve); 1939 kfree(pl); 1940 } 1941 EXPORT_SYMBOL_GPL(phylink_destroy); 1942 1943 /** 1944 * phylink_expects_phy() - Determine if phylink expects a phy to be attached 1945 * @pl: a pointer to a &struct phylink returned from phylink_create() 1946 * 1947 * When using fixed-link mode, or in-band mode with 1000base-X or 2500base-X, 1948 * no PHY is needed. 1949 * 1950 * Returns true if phylink will be expecting a PHY. 1951 */ 1952 bool phylink_expects_phy(struct phylink *pl) 1953 { 1954 if (pl->cfg_link_an_mode == MLO_AN_FIXED || 1955 (pl->cfg_link_an_mode == MLO_AN_INBAND && 1956 phy_interface_mode_is_8023z(pl->link_interface))) 1957 return false; 1958 return true; 1959 } 1960 EXPORT_SYMBOL_GPL(phylink_expects_phy); 1961 1962 static void phylink_phy_change(struct phy_device *phydev, bool up) 1963 { 1964 struct phylink *pl = phydev->phylink; 1965 bool tx_pause, rx_pause; 1966 1967 phy_get_pause(phydev, &tx_pause, &rx_pause); 1968 1969 mutex_lock(&pl->state_mutex); 1970 pl->phy_state.speed = phydev->speed; 1971 pl->phy_state.duplex = phydev->duplex; 1972 pl->phy_state.rate_matching = phydev->rate_matching; 1973 pl->phy_state.pause = MLO_PAUSE_NONE; 1974 if (tx_pause) 1975 pl->phy_state.pause |= MLO_PAUSE_TX; 1976 if (rx_pause) 1977 pl->phy_state.pause |= MLO_PAUSE_RX; 1978 pl->phy_state.interface = phydev->interface; 1979 pl->phy_state.link = up; 1980 if (!up) 1981 pl->link_failed = true; 1982 1983 /* Get the LPI state from phylib */ 1984 pl->phy_enable_tx_lpi = phydev->enable_tx_lpi; 1985 pl->mac_tx_lpi_timer = phydev->eee_cfg.tx_lpi_timer; 1986 mutex_unlock(&pl->state_mutex); 1987 1988 phylink_run_resolve(pl); 1989 1990 phylink_dbg(pl, "phy link %s %s/%s/%s/%s/%s/%slpi\n", 1991 up ? "up" : "down", 1992 phy_modes(phydev->interface), 1993 phy_speed_to_str(phydev->speed), 1994 phy_duplex_to_str(phydev->duplex), 1995 phy_rate_matching_to_str(phydev->rate_matching), 1996 phylink_pause_to_str(pl->phy_state.pause), 1997 phydev->enable_tx_lpi ? "" : "no"); 1998 } 1999 2000 static int phylink_validate_phy(struct phylink *pl, struct phy_device *phy, 2001 unsigned long *supported, 2002 struct phylink_link_state *state) 2003 { 2004 DECLARE_PHY_INTERFACE_MASK(interfaces); 2005 2006 /* If the PHY provides a bitmap of the interfaces it will be using 2007 * depending on the negotiated media speeds, use this to validate 2008 * which ethtool link modes can be used. 2009 */ 2010 if (!phy_interface_empty(phy->possible_interfaces)) { 2011 /* We only care about the union of the PHY's interfaces and 2012 * those which the host supports. 2013 */ 2014 phy_interface_and(interfaces, phy->possible_interfaces, 2015 pl->config->supported_interfaces); 2016 2017 if (phy_interface_empty(interfaces)) { 2018 phylink_err(pl, "PHY has no common interfaces\n"); 2019 return -EINVAL; 2020 } 2021 2022 if (phy_on_sfp(phy)) { 2023 /* If the PHY is on a SFP, limit the interfaces to 2024 * those that can be used with a SFP module. 2025 */ 2026 phy_interface_and(interfaces, interfaces, 2027 phylink_sfp_interfaces); 2028 2029 if (phy_interface_empty(interfaces)) { 2030 phylink_err(pl, "SFP PHY's possible interfaces becomes empty\n"); 2031 return -EINVAL; 2032 } 2033 } 2034 2035 phylink_dbg(pl, "PHY %s uses interfaces %*pbl, validating %*pbl\n", 2036 phydev_name(phy), 2037 (int)PHY_INTERFACE_MODE_MAX, 2038 phy->possible_interfaces, 2039 (int)PHY_INTERFACE_MODE_MAX, interfaces); 2040 2041 return phylink_validate_mask(pl, phy, supported, state, 2042 interfaces); 2043 } 2044 2045 phylink_dbg(pl, "PHY %s doesn't supply possible interfaces\n", 2046 phydev_name(phy)); 2047 2048 /* Check whether we would use rate matching for the proposed interface 2049 * mode. 2050 */ 2051 state->rate_matching = phy_get_rate_matching(phy, state->interface); 2052 2053 /* Clause 45 PHYs may switch their Serdes lane between, e.g. 10GBASE-R, 2054 * 5GBASE-R, 2500BASE-X and SGMII if they are not using rate matching. 2055 * For some interface modes (e.g. RXAUI, XAUI and USXGMII) switching 2056 * their Serdes is either unnecessary or not reasonable. 2057 * 2058 * For these which switch interface modes, we really need to know which 2059 * interface modes the PHY supports to properly work out which ethtool 2060 * linkmodes can be supported. For now, as a work-around, we validate 2061 * against all interface modes, which may lead to more ethtool link 2062 * modes being advertised than are actually supported. 2063 */ 2064 if (phy->is_c45 && state->rate_matching == RATE_MATCH_NONE && 2065 state->interface != PHY_INTERFACE_MODE_RXAUI && 2066 state->interface != PHY_INTERFACE_MODE_XAUI && 2067 state->interface != PHY_INTERFACE_MODE_USXGMII) 2068 state->interface = PHY_INTERFACE_MODE_NA; 2069 2070 return phylink_validate(pl, supported, state); 2071 } 2072 2073 static int phylink_bringup_phy(struct phylink *pl, struct phy_device *phy, 2074 phy_interface_t interface) 2075 { 2076 struct phylink_link_state config; 2077 __ETHTOOL_DECLARE_LINK_MODE_MASK(supported); 2078 char *irq_str; 2079 int ret; 2080 2081 /* 2082 * This is the new way of dealing with flow control for PHYs, 2083 * as described by Timur Tabi in commit 529ed1275263 ("net: phy: 2084 * phy drivers should not set SUPPORTED_[Asym_]Pause") except 2085 * using our validate call to the MAC, we rely upon the MAC 2086 * clearing the bits from both supported and advertising fields. 2087 */ 2088 phy_support_asym_pause(phy); 2089 2090 memset(&config, 0, sizeof(config)); 2091 linkmode_copy(supported, phy->supported); 2092 linkmode_copy(config.advertising, phy->advertising); 2093 config.interface = interface; 2094 2095 ret = phylink_validate_phy(pl, phy, supported, &config); 2096 if (ret) { 2097 phylink_warn(pl, "validation of %s with support %*pb and advertisement %*pb failed: %pe\n", 2098 phy_modes(config.interface), 2099 __ETHTOOL_LINK_MODE_MASK_NBITS, phy->supported, 2100 __ETHTOOL_LINK_MODE_MASK_NBITS, config.advertising, 2101 ERR_PTR(ret)); 2102 return ret; 2103 } 2104 2105 phy->phylink = pl; 2106 phy->phy_link_change = phylink_phy_change; 2107 2108 irq_str = phy_attached_info_irq(phy); 2109 phylink_info(pl, 2110 "PHY [%s] driver [%s] (irq=%s)\n", 2111 dev_name(&phy->mdio.dev), phy->drv->name, irq_str); 2112 kfree(irq_str); 2113 2114 mutex_lock(&pl->phydev_mutex); 2115 mutex_lock(&phy->lock); 2116 mutex_lock(&pl->state_mutex); 2117 pl->phydev = phy; 2118 pl->phy_state.interface = interface; 2119 pl->phy_state.pause = MLO_PAUSE_NONE; 2120 pl->phy_state.speed = SPEED_UNKNOWN; 2121 pl->phy_state.duplex = DUPLEX_UNKNOWN; 2122 pl->phy_state.rate_matching = RATE_MATCH_NONE; 2123 linkmode_copy(pl->supported, supported); 2124 linkmode_copy(pl->link_config.advertising, config.advertising); 2125 2126 /* Restrict the phy advertisement according to the MAC support. */ 2127 linkmode_copy(phy->advertising, config.advertising); 2128 2129 /* If the MAC supports phylink managed EEE, restrict the EEE 2130 * advertisement according to the MAC's LPI capabilities. 2131 */ 2132 if (pl->mac_supports_eee) { 2133 /* If EEE is enabled, then we need to call phy_support_eee() 2134 * to ensure that the advertising mask is appropriately set. 2135 * This also enables EEE at the PHY. 2136 */ 2137 if (pl->eee_cfg.eee_enabled) 2138 phy_support_eee(phy); 2139 2140 phy->eee_cfg.tx_lpi_enabled = pl->eee_cfg.tx_lpi_enabled; 2141 phy->eee_cfg.tx_lpi_timer = pl->eee_cfg.tx_lpi_timer; 2142 2143 /* Convert the MAC's LPI capabilities to linkmodes */ 2144 linkmode_zero(pl->supported_lpi); 2145 phylink_caps_to_linkmodes(pl->supported_lpi, 2146 pl->config->lpi_capabilities); 2147 2148 /* Restrict the PHYs EEE support/advertisement to the modes 2149 * that the MAC supports. 2150 */ 2151 linkmode_and(phy->advertising_eee, phy->advertising_eee, 2152 pl->supported_lpi); 2153 } else if (pl->mac_supports_eee_ops) { 2154 /* MAC supports phylink EEE, but wants EEE always disabled. */ 2155 phy_disable_eee(phy); 2156 } 2157 2158 mutex_unlock(&pl->state_mutex); 2159 mutex_unlock(&phy->lock); 2160 mutex_unlock(&pl->phydev_mutex); 2161 2162 phylink_dbg(pl, 2163 "phy: %s setting supported %*pb advertising %*pb\n", 2164 phy_modes(interface), 2165 __ETHTOOL_LINK_MODE_MASK_NBITS, pl->supported, 2166 __ETHTOOL_LINK_MODE_MASK_NBITS, phy->advertising); 2167 2168 if (pl->config->mac_managed_pm) 2169 phy->mac_managed_pm = true; 2170 2171 /* Allow the MAC to stop its clock if the PHY has the capability */ 2172 pl->mac_tx_clk_stop = phy_eee_tx_clock_stop_capable(phy) > 0; 2173 2174 if (pl->mac_supports_eee_ops) { 2175 /* Explicitly configure whether the PHY is allowed to stop it's 2176 * receive clock. 2177 */ 2178 ret = phy_eee_rx_clock_stop(phy, 2179 pl->config->eee_rx_clk_stop_enable); 2180 if (ret == -EOPNOTSUPP) 2181 ret = 0; 2182 } 2183 2184 if (ret == 0 && phy_interrupt_is_valid(phy)) 2185 phy_request_interrupt(phy); 2186 2187 return ret; 2188 } 2189 2190 static int phylink_attach_phy(struct phylink *pl, struct phy_device *phy, 2191 phy_interface_t interface) 2192 { 2193 u32 flags = 0; 2194 2195 if (WARN_ON(pl->cfg_link_an_mode == MLO_AN_FIXED || 2196 (pl->cfg_link_an_mode == MLO_AN_INBAND && 2197 phy_interface_mode_is_8023z(interface) && !pl->sfp_bus))) 2198 return -EINVAL; 2199 2200 if (pl->phydev) 2201 return -EBUSY; 2202 2203 if (pl->config->mac_requires_rxc) 2204 flags |= PHY_F_RXC_ALWAYS_ON; 2205 2206 return phy_attach_direct(pl->netdev, phy, flags, interface); 2207 } 2208 2209 /** 2210 * phylink_connect_phy() - connect a PHY to the phylink instance 2211 * @pl: a pointer to a &struct phylink returned from phylink_create() 2212 * @phy: a pointer to a &struct phy_device. 2213 * 2214 * Connect @phy to the phylink instance specified by @pl by calling 2215 * phy_attach_direct(). Configure the @phy according to the MAC driver's 2216 * capabilities, start the PHYLIB state machine and enable any interrupts 2217 * that the PHY supports. 2218 * 2219 * This updates the phylink's ethtool supported and advertising link mode 2220 * masks. 2221 * 2222 * Returns 0 on success or a negative errno. 2223 */ 2224 int phylink_connect_phy(struct phylink *pl, struct phy_device *phy) 2225 { 2226 int ret; 2227 2228 /* Use PHY device/driver interface */ 2229 if (pl->link_interface == PHY_INTERFACE_MODE_NA) { 2230 pl->link_interface = phy->interface; 2231 pl->link_config.interface = pl->link_interface; 2232 } 2233 2234 ret = phylink_attach_phy(pl, phy, pl->link_interface); 2235 if (ret < 0) 2236 return ret; 2237 2238 ret = phylink_bringup_phy(pl, phy, pl->link_config.interface); 2239 if (ret) 2240 phy_detach(phy); 2241 2242 return ret; 2243 } 2244 EXPORT_SYMBOL_GPL(phylink_connect_phy); 2245 2246 /** 2247 * phylink_of_phy_connect() - connect the PHY specified in the DT mode. 2248 * @pl: a pointer to a &struct phylink returned from phylink_create() 2249 * @dn: a pointer to a &struct device_node. 2250 * @flags: PHY-specific flags to communicate to the PHY device driver 2251 * 2252 * Connect the phy specified in the device node @dn to the phylink instance 2253 * specified by @pl. Actions specified in phylink_connect_phy() will be 2254 * performed. 2255 * 2256 * Returns 0 on success or a negative errno. 2257 */ 2258 int phylink_of_phy_connect(struct phylink *pl, struct device_node *dn, 2259 u32 flags) 2260 { 2261 return phylink_fwnode_phy_connect(pl, of_fwnode_handle(dn), flags); 2262 } 2263 EXPORT_SYMBOL_GPL(phylink_of_phy_connect); 2264 2265 /** 2266 * phylink_fwnode_phy_connect() - connect the PHY specified in the fwnode. 2267 * @pl: a pointer to a &struct phylink returned from phylink_create() 2268 * @fwnode: a pointer to a &struct fwnode_handle. 2269 * @flags: PHY-specific flags to communicate to the PHY device driver 2270 * 2271 * Connect the phy specified @fwnode to the phylink instance specified 2272 * by @pl. 2273 * 2274 * Returns 0 on success or a negative errno. 2275 */ 2276 int phylink_fwnode_phy_connect(struct phylink *pl, 2277 const struct fwnode_handle *fwnode, 2278 u32 flags) 2279 { 2280 struct fwnode_handle *phy_fwnode; 2281 struct phy_device *phy_dev; 2282 int ret; 2283 2284 /* Fixed links and 802.3z are handled without needing a PHY */ 2285 if (pl->cfg_link_an_mode == MLO_AN_FIXED || 2286 (pl->cfg_link_an_mode == MLO_AN_INBAND && 2287 phy_interface_mode_is_8023z(pl->link_interface))) 2288 return 0; 2289 2290 phy_fwnode = fwnode_get_phy_node(fwnode); 2291 if (IS_ERR(phy_fwnode)) { 2292 if (pl->cfg_link_an_mode == MLO_AN_PHY) 2293 return -ENODEV; 2294 return 0; 2295 } 2296 2297 phy_dev = fwnode_phy_find_device(phy_fwnode); 2298 /* We're done with the phy_node handle */ 2299 fwnode_handle_put(phy_fwnode); 2300 if (!phy_dev) 2301 return -ENODEV; 2302 2303 /* Use PHY device/driver interface */ 2304 if (pl->link_interface == PHY_INTERFACE_MODE_NA) { 2305 pl->link_interface = phy_dev->interface; 2306 pl->link_config.interface = pl->link_interface; 2307 } 2308 2309 if (pl->config->mac_requires_rxc) 2310 flags |= PHY_F_RXC_ALWAYS_ON; 2311 2312 ret = phy_attach_direct(pl->netdev, phy_dev, flags, 2313 pl->link_interface); 2314 phy_device_free(phy_dev); 2315 if (ret) 2316 return ret; 2317 2318 ret = phylink_bringup_phy(pl, phy_dev, pl->link_config.interface); 2319 if (ret) 2320 phy_detach(phy_dev); 2321 2322 return ret; 2323 } 2324 EXPORT_SYMBOL_GPL(phylink_fwnode_phy_connect); 2325 2326 /** 2327 * phylink_disconnect_phy() - disconnect any PHY attached to the phylink 2328 * instance. 2329 * @pl: a pointer to a &struct phylink returned from phylink_create() 2330 * 2331 * Disconnect any current PHY from the phylink instance described by @pl. 2332 */ 2333 void phylink_disconnect_phy(struct phylink *pl) 2334 { 2335 struct phy_device *phy; 2336 2337 ASSERT_RTNL(); 2338 2339 mutex_lock(&pl->phydev_mutex); 2340 phy = pl->phydev; 2341 if (phy) { 2342 mutex_lock(&phy->lock); 2343 mutex_lock(&pl->state_mutex); 2344 pl->phydev = NULL; 2345 pl->phy_enable_tx_lpi = false; 2346 pl->mac_tx_clk_stop = false; 2347 mutex_unlock(&pl->state_mutex); 2348 mutex_unlock(&phy->lock); 2349 } 2350 mutex_unlock(&pl->phydev_mutex); 2351 2352 if (phy) { 2353 flush_work(&pl->resolve); 2354 phy_disconnect(phy); 2355 } 2356 } 2357 EXPORT_SYMBOL_GPL(phylink_disconnect_phy); 2358 2359 static void phylink_link_changed(struct phylink *pl, bool up, const char *what) 2360 { 2361 if (!up) 2362 pl->link_failed = true; 2363 phylink_run_resolve(pl); 2364 phylink_dbg(pl, "%s link %s\n", what, up ? "up" : "down"); 2365 } 2366 2367 /** 2368 * phylink_mac_change() - notify phylink of a change in MAC state 2369 * @pl: a pointer to a &struct phylink returned from phylink_create() 2370 * @up: indicates whether the link is currently up. 2371 * 2372 * The MAC driver should call this driver when the state of its link 2373 * changes (eg, link failure, new negotiation results, etc.) 2374 */ 2375 void phylink_mac_change(struct phylink *pl, bool up) 2376 { 2377 phylink_link_changed(pl, up, "mac"); 2378 } 2379 EXPORT_SYMBOL_GPL(phylink_mac_change); 2380 2381 /** 2382 * phylink_pcs_change() - notify phylink of a change to PCS link state 2383 * @pcs: pointer to &struct phylink_pcs 2384 * @up: indicates whether the link is currently up. 2385 * 2386 * The PCS driver should call this when the state of its link changes 2387 * (e.g. link failure, new negotiation results, etc.) Note: it should 2388 * not determine "up" by reading the BMSR. If in doubt about the link 2389 * state at interrupt time, then pass true if pcs_get_state() returns 2390 * the latched link-down state, otherwise pass false. 2391 */ 2392 void phylink_pcs_change(struct phylink_pcs *pcs, bool up) 2393 { 2394 struct phylink *pl = pcs->phylink; 2395 2396 if (pl) 2397 phylink_link_changed(pl, up, "pcs"); 2398 } 2399 EXPORT_SYMBOL_GPL(phylink_pcs_change); 2400 2401 static irqreturn_t phylink_link_handler(int irq, void *data) 2402 { 2403 struct phylink *pl = data; 2404 2405 phylink_run_resolve(pl); 2406 2407 return IRQ_HANDLED; 2408 } 2409 2410 /** 2411 * phylink_start() - start a phylink instance 2412 * @pl: a pointer to a &struct phylink returned from phylink_create() 2413 * 2414 * Start the phylink instance specified by @pl, configuring the MAC for the 2415 * desired link mode(s) and negotiation style. This should be called from the 2416 * network device driver's &struct net_device_ops ndo_open() method. 2417 */ 2418 void phylink_start(struct phylink *pl) 2419 { 2420 bool poll = false; 2421 2422 ASSERT_RTNL(); 2423 2424 phylink_info(pl, "configuring for %s/%s link mode\n", 2425 phylink_an_mode_str(pl->req_link_an_mode), 2426 phy_modes(pl->link_config.interface)); 2427 2428 /* Always set the carrier off */ 2429 if (pl->netdev) 2430 netif_carrier_off(pl->netdev); 2431 2432 pl->pcs_state = PCS_STATE_STARTING; 2433 2434 /* Apply the link configuration to the MAC when starting. This allows 2435 * a fixed-link to start with the correct parameters, and also 2436 * ensures that we set the appropriate advertisement for Serdes links. 2437 * 2438 * Restart autonegotiation if using 802.3z to ensure that the link 2439 * parameters are properly negotiated. This is necessary for DSA 2440 * switches using 802.3z negotiation to ensure they see our modes. 2441 */ 2442 phylink_mac_initial_config(pl, true); 2443 2444 pl->pcs_state = PCS_STATE_STARTED; 2445 2446 phylink_enable_and_run_resolve(pl, PHYLINK_DISABLE_STOPPED); 2447 2448 if (pl->cfg_link_an_mode == MLO_AN_FIXED && pl->link_gpio) { 2449 int irq = gpiod_to_irq(pl->link_gpio); 2450 2451 if (irq > 0) { 2452 if (!request_irq(irq, phylink_link_handler, 2453 IRQF_TRIGGER_RISING | 2454 IRQF_TRIGGER_FALLING, 2455 "netdev link", pl)) 2456 pl->link_irq = irq; 2457 else 2458 irq = 0; 2459 } 2460 if (irq <= 0) 2461 poll = true; 2462 } 2463 2464 if (pl->cfg_link_an_mode == MLO_AN_FIXED) 2465 poll |= pl->config->poll_fixed_state; 2466 2467 if (poll) 2468 mod_timer(&pl->link_poll, jiffies + HZ); 2469 if (pl->phydev) 2470 phy_start(pl->phydev); 2471 if (pl->sfp_bus) 2472 sfp_upstream_start(pl->sfp_bus); 2473 } 2474 EXPORT_SYMBOL_GPL(phylink_start); 2475 2476 /** 2477 * phylink_stop() - stop a phylink instance 2478 * @pl: a pointer to a &struct phylink returned from phylink_create() 2479 * 2480 * Stop the phylink instance specified by @pl. This should be called from the 2481 * network device driver's &struct net_device_ops ndo_stop() method. The 2482 * network device's carrier state should not be changed prior to calling this 2483 * function. 2484 * 2485 * This will synchronously bring down the link if the link is not already 2486 * down (in other words, it will trigger a mac_link_down() method call.) 2487 */ 2488 void phylink_stop(struct phylink *pl) 2489 { 2490 ASSERT_RTNL(); 2491 2492 if (pl->sfp_bus) 2493 sfp_upstream_stop(pl->sfp_bus); 2494 if (pl->phydev) 2495 phy_stop(pl->phydev); 2496 timer_delete_sync(&pl->link_poll); 2497 if (pl->link_irq) { 2498 free_irq(pl->link_irq, pl); 2499 pl->link_irq = 0; 2500 } 2501 2502 phylink_run_resolve_and_disable(pl, PHYLINK_DISABLE_STOPPED); 2503 2504 pl->pcs_state = PCS_STATE_DOWN; 2505 2506 phylink_pcs_disable(pl->pcs); 2507 } 2508 EXPORT_SYMBOL_GPL(phylink_stop); 2509 2510 /** 2511 * phylink_rx_clk_stop_block() - block PHY ability to stop receive clock in LPI 2512 * @pl: a pointer to a &struct phylink returned from phylink_create() 2513 * 2514 * Disable the PHY's ability to stop the receive clock while the receive path 2515 * is in EEE LPI state, until the number of calls to phylink_rx_clk_stop_block() 2516 * are balanced by calls to phylink_rx_clk_stop_unblock(). 2517 */ 2518 void phylink_rx_clk_stop_block(struct phylink *pl) 2519 { 2520 ASSERT_RTNL(); 2521 2522 if (pl->mac_rx_clk_stop_blocked == U8_MAX) { 2523 phylink_warn(pl, "%s called too many times - ignoring\n", 2524 __func__); 2525 dump_stack(); 2526 return; 2527 } 2528 2529 /* Disable PHY receive clock stop if this is the first time this 2530 * function has been called and clock-stop was previously enabled. 2531 */ 2532 if (pl->mac_rx_clk_stop_blocked++ == 0 && 2533 pl->mac_supports_eee_ops && pl->phydev && 2534 pl->config->eee_rx_clk_stop_enable) 2535 phy_eee_rx_clock_stop(pl->phydev, false); 2536 } 2537 EXPORT_SYMBOL_GPL(phylink_rx_clk_stop_block); 2538 2539 /** 2540 * phylink_rx_clk_stop_unblock() - unblock PHY ability to stop receive clock 2541 * @pl: a pointer to a &struct phylink returned from phylink_create() 2542 * 2543 * All calls to phylink_rx_clk_stop_block() must be balanced with a 2544 * corresponding call to phylink_rx_clk_stop_unblock() to restore the PHYs 2545 * ability to stop the receive clock when the receive path is in EEE LPI mode. 2546 */ 2547 void phylink_rx_clk_stop_unblock(struct phylink *pl) 2548 { 2549 ASSERT_RTNL(); 2550 2551 if (pl->mac_rx_clk_stop_blocked == 0) { 2552 phylink_warn(pl, "%s called too many times - ignoring\n", 2553 __func__); 2554 dump_stack(); 2555 return; 2556 } 2557 2558 /* Re-enable PHY receive clock stop if the number of unblocks matches 2559 * the number of calls to the block function above. 2560 */ 2561 if (--pl->mac_rx_clk_stop_blocked == 0 && 2562 pl->mac_supports_eee_ops && pl->phydev && 2563 pl->config->eee_rx_clk_stop_enable) 2564 phy_eee_rx_clock_stop(pl->phydev, true); 2565 } 2566 EXPORT_SYMBOL_GPL(phylink_rx_clk_stop_unblock); 2567 2568 static bool phylink_mac_supports_wol(struct phylink *pl) 2569 { 2570 return !!pl->mac_ops->mac_wol_set; 2571 } 2572 2573 static bool phylink_phy_supports_wol(struct phylink *pl, 2574 struct phy_device *phydev) 2575 { 2576 return phydev && (pl->config->wol_phy_legacy || phy_can_wakeup(phydev)); 2577 } 2578 2579 static bool phylink_phy_pm_speed_ctrl(struct phylink *pl) 2580 { 2581 return pl->config->wol_phy_speed_ctrl && !pl->wolopts_mac && 2582 pl->phydev && phy_may_wakeup(pl->phydev); 2583 } 2584 2585 /** 2586 * phylink_suspend() - handle a network device suspend event 2587 * @pl: a pointer to a &struct phylink returned from phylink_create() 2588 * @mac_wol: true if the MAC needs to receive packets for Wake-on-Lan 2589 * 2590 * Handle a network device suspend event. There are several cases: 2591 * 2592 * - If Wake-on-Lan is not active, we can bring down the link between 2593 * the MAC and PHY by calling phylink_stop(). 2594 * - If Wake-on-Lan is active, and being handled only by the PHY, we 2595 * can also bring down the link between the MAC and PHY. 2596 * - If Wake-on-Lan is active, but being handled by the MAC, the MAC 2597 * still needs to receive packets, so we can not bring the link down. 2598 * 2599 * Note: when phylink managed Wake-on-Lan is in use, @mac_wol is ignored. 2600 * (struct phylink_mac_ops.mac_set_wol populated.) 2601 */ 2602 void phylink_suspend(struct phylink *pl, bool mac_wol) 2603 { 2604 ASSERT_RTNL(); 2605 2606 if (phylink_mac_supports_wol(pl)) 2607 mac_wol = !!pl->wolopts_mac; 2608 2609 if (mac_wol && (!pl->netdev || pl->netdev->ethtool->wol_enabled)) { 2610 /* Wake-on-Lan enabled, MAC handling */ 2611 mutex_lock(&pl->state_mutex); 2612 2613 /* Stop the resolver bringing the link up */ 2614 __set_bit(PHYLINK_DISABLE_MAC_WOL, &pl->phylink_disable_state); 2615 2616 pl->suspend_link_up = phylink_link_is_up(pl); 2617 if (pl->suspend_link_up) { 2618 /* Disable the carrier, to prevent transmit timeouts, 2619 * but one would hope all packets have been sent. This 2620 * also means phylink_resolve() will do nothing. 2621 */ 2622 if (pl->netdev) 2623 netif_carrier_off(pl->netdev); 2624 pl->old_link_state = false; 2625 } 2626 2627 /* We do not call mac_link_down() here as we want the 2628 * link to remain up to receive the WoL packets. 2629 */ 2630 mutex_unlock(&pl->state_mutex); 2631 } else { 2632 phylink_stop(pl); 2633 } 2634 2635 if (phylink_phy_pm_speed_ctrl(pl)) 2636 phylink_speed_down(pl, false); 2637 } 2638 EXPORT_SYMBOL_GPL(phylink_suspend); 2639 2640 /** 2641 * phylink_prepare_resume() - prepare to resume a network device 2642 * @pl: a pointer to a &struct phylink returned from phylink_create() 2643 * 2644 * Optional, but if called must be called prior to phylink_resume(). 2645 * 2646 * Prepare to resume a network device, preparing the PHY as necessary. 2647 */ 2648 void phylink_prepare_resume(struct phylink *pl) 2649 { 2650 struct phy_device *phydev = pl->phydev; 2651 2652 ASSERT_RTNL(); 2653 2654 /* IEEE 802.3 22.2.4.1.5 allows PHYs to stop their receive clock 2655 * when PDOWN is set. However, some MACs require RXC to be running 2656 * in order to resume. If the MAC requires RXC, and we have a PHY, 2657 * then resume the PHY. Note that 802.3 allows PHYs 500ms before 2658 * the clock meets requirements. We do not implement this delay. 2659 */ 2660 if (pl->config->mac_requires_rxc && phydev && phydev->suspended) 2661 phy_resume(phydev); 2662 } 2663 EXPORT_SYMBOL_GPL(phylink_prepare_resume); 2664 2665 /** 2666 * phylink_resume() - handle a network device resume event 2667 * @pl: a pointer to a &struct phylink returned from phylink_create() 2668 * 2669 * Undo the effects of phylink_suspend(), returning the link to an 2670 * operational state. 2671 */ 2672 void phylink_resume(struct phylink *pl) 2673 { 2674 ASSERT_RTNL(); 2675 2676 if (phylink_phy_pm_speed_ctrl(pl)) 2677 phylink_speed_up(pl); 2678 2679 if (test_bit(PHYLINK_DISABLE_MAC_WOL, &pl->phylink_disable_state)) { 2680 /* Wake-on-Lan enabled, MAC handling */ 2681 2682 if (pl->suspend_link_up) { 2683 /* Call mac_link_down() so we keep the overall state 2684 * balanced. Do this under the state_mutex lock for 2685 * consistency. This will cause a "Link Down" message 2686 * to be printed during resume, which is harmless - 2687 * the true link state will be printed when we run a 2688 * resolve. 2689 */ 2690 mutex_lock(&pl->state_mutex); 2691 phylink_link_down(pl); 2692 mutex_unlock(&pl->state_mutex); 2693 } 2694 2695 /* Re-apply the link parameters so that all the settings get 2696 * restored to the MAC. 2697 */ 2698 phylink_mac_initial_config(pl, true); 2699 2700 /* Re-enable and re-resolve the link parameters */ 2701 phylink_enable_and_run_resolve(pl, PHYLINK_DISABLE_MAC_WOL); 2702 } else { 2703 phylink_start(pl); 2704 } 2705 } 2706 EXPORT_SYMBOL_GPL(phylink_resume); 2707 2708 /** 2709 * phylink_ethtool_get_wol() - get the wake on lan parameters for the PHY 2710 * @pl: a pointer to a &struct phylink returned from phylink_create() 2711 * @wol: a pointer to &struct ethtool_wolinfo to hold the read parameters 2712 * 2713 * Read the wake on lan parameters from the PHY attached to the phylink 2714 * instance specified by @pl. If no PHY is currently attached, report no 2715 * support for wake on lan. 2716 */ 2717 void phylink_ethtool_get_wol(struct phylink *pl, struct ethtool_wolinfo *wol) 2718 { 2719 ASSERT_RTNL(); 2720 2721 wol->supported = 0; 2722 wol->wolopts = 0; 2723 2724 if (phylink_mac_supports_wol(pl)) { 2725 if (phylink_phy_supports_wol(pl, pl->phydev)) 2726 phy_ethtool_get_wol(pl->phydev, wol); 2727 2728 /* Where the MAC augments the WoL support, merge its support and 2729 * current configuration. 2730 */ 2731 if (~wol->wolopts & pl->wolopts_mac & WAKE_MAGICSECURE) 2732 memcpy(wol->sopass, pl->wol_sopass, 2733 sizeof(wol->sopass)); 2734 2735 wol->supported |= pl->config->wol_mac_support; 2736 wol->wolopts |= pl->wolopts_mac; 2737 } else { 2738 /* Legacy */ 2739 if (pl->phydev) 2740 phy_ethtool_get_wol(pl->phydev, wol); 2741 } 2742 } 2743 EXPORT_SYMBOL_GPL(phylink_ethtool_get_wol); 2744 2745 /** 2746 * phylink_ethtool_set_wol() - set wake on lan parameters 2747 * @pl: a pointer to a &struct phylink returned from phylink_create() 2748 * @wol: a pointer to &struct ethtool_wolinfo for the desired parameters 2749 * 2750 * Set the wake on lan parameters for the PHY attached to the phylink 2751 * instance specified by @pl. If no PHY is attached, returns %EOPNOTSUPP 2752 * error. 2753 * 2754 * Returns zero on success or negative errno code. 2755 */ 2756 int phylink_ethtool_set_wol(struct phylink *pl, struct ethtool_wolinfo *wol) 2757 { 2758 struct ethtool_wolinfo w = { .cmd = ETHTOOL_GWOL }; 2759 int ret = -EOPNOTSUPP; 2760 bool changed; 2761 u32 wolopts; 2762 2763 ASSERT_RTNL(); 2764 2765 if (phylink_mac_supports_wol(pl)) { 2766 wolopts = wol->wolopts; 2767 2768 if (phylink_phy_supports_wol(pl, pl->phydev)) { 2769 ret = phy_ethtool_set_wol(pl->phydev, wol); 2770 if (ret != 0 && ret != -EOPNOTSUPP) 2771 return ret; 2772 2773 phy_ethtool_get_wol(pl->phydev, &w); 2774 2775 /* Any Wake-on-Lan modes which the PHY is handling 2776 * should not be passed on to the MAC. 2777 */ 2778 wolopts &= ~w.wolopts; 2779 } 2780 2781 wolopts &= pl->config->wol_mac_support; 2782 changed = pl->wolopts_mac != wolopts; 2783 if (wolopts & WAKE_MAGICSECURE) 2784 changed |= !!memcmp(wol->sopass, pl->wol_sopass, 2785 sizeof(wol->sopass)); 2786 memcpy(pl->wol_sopass, wol->sopass, sizeof(pl->wol_sopass)); 2787 2788 if (changed) { 2789 ret = pl->mac_ops->mac_wol_set(pl->config, wolopts, 2790 wol->sopass); 2791 if (!ret) 2792 pl->wolopts_mac = wolopts; 2793 } else { 2794 ret = 0; 2795 } 2796 } else { 2797 if (pl->phydev) 2798 ret = phy_ethtool_set_wol(pl->phydev, wol); 2799 } 2800 2801 return ret; 2802 } 2803 EXPORT_SYMBOL_GPL(phylink_ethtool_set_wol); 2804 2805 static phy_interface_t phylink_sfp_select_interface(struct phylink *pl, 2806 const unsigned long *link_modes) 2807 { 2808 phy_interface_t interface; 2809 2810 interface = sfp_select_interface(pl->sfp_bus, link_modes); 2811 if (interface == PHY_INTERFACE_MODE_NA) { 2812 phylink_err(pl, 2813 "selection of interface failed, advertisement %*pb\n", 2814 __ETHTOOL_LINK_MODE_MASK_NBITS, 2815 link_modes); 2816 return interface; 2817 } 2818 2819 if (!test_bit(interface, pl->config->supported_interfaces)) { 2820 phylink_err(pl, 2821 "selection of interface failed, SFP selected %s (%u) but MAC supports %*pbl\n", 2822 phy_modes(interface), interface, 2823 (int)PHY_INTERFACE_MODE_MAX, 2824 pl->config->supported_interfaces); 2825 return PHY_INTERFACE_MODE_NA; 2826 } 2827 2828 return interface; 2829 } 2830 2831 static phy_interface_t phylink_sfp_select_interface_speed(struct phylink *pl, 2832 u32 speed) 2833 { 2834 phy_interface_t best_interface = PHY_INTERFACE_MODE_NA; 2835 phy_interface_t interface; 2836 u32 max_speed; 2837 int i; 2838 2839 for (i = 0; i < ARRAY_SIZE(phylink_sfp_interface_preference); i++) { 2840 interface = phylink_sfp_interface_preference[i]; 2841 if (!test_bit(interface, pl->sfp_interfaces)) 2842 continue; 2843 2844 max_speed = phylink_interface_max_speed(interface); 2845 2846 /* The logic here is: if speed == max_speed, then we've found 2847 * the best interface. Otherwise we find the interface that 2848 * can just support the requested speed. 2849 */ 2850 if (max_speed >= speed) 2851 best_interface = interface; 2852 2853 if (max_speed <= speed) 2854 break; 2855 } 2856 2857 if (best_interface == PHY_INTERFACE_MODE_NA) 2858 phylink_err(pl, "selection of interface failed, speed %u\n", 2859 speed); 2860 2861 return best_interface; 2862 } 2863 2864 static void phylink_merge_link_mode(unsigned long *dst, const unsigned long *b) 2865 { 2866 __ETHTOOL_DECLARE_LINK_MODE_MASK(mask); 2867 2868 linkmode_zero(mask); 2869 phylink_set_port_modes(mask); 2870 2871 linkmode_and(dst, dst, mask); 2872 linkmode_or(dst, dst, b); 2873 } 2874 2875 static void phylink_get_ksettings(const struct phylink_link_state *state, 2876 struct ethtool_link_ksettings *kset) 2877 { 2878 phylink_merge_link_mode(kset->link_modes.advertising, state->advertising); 2879 linkmode_copy(kset->link_modes.lp_advertising, state->lp_advertising); 2880 if (kset->base.rate_matching == RATE_MATCH_NONE) { 2881 kset->base.speed = state->speed; 2882 kset->base.duplex = state->duplex; 2883 } 2884 kset->base.autoneg = linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, 2885 state->advertising) ? 2886 AUTONEG_ENABLE : AUTONEG_DISABLE; 2887 } 2888 2889 /** 2890 * phylink_ethtool_ksettings_get() - get the current link settings 2891 * @pl: a pointer to a &struct phylink returned from phylink_create() 2892 * @kset: a pointer to a &struct ethtool_link_ksettings to hold link settings 2893 * 2894 * Read the current link settings for the phylink instance specified by @pl. 2895 * This will be the link settings read from the MAC, PHY or fixed link 2896 * settings depending on the current negotiation mode. 2897 */ 2898 int phylink_ethtool_ksettings_get(struct phylink *pl, 2899 struct ethtool_link_ksettings *kset) 2900 { 2901 struct phylink_link_state link_state; 2902 2903 ASSERT_RTNL(); 2904 2905 if (pl->phydev) 2906 phy_ethtool_ksettings_get(pl->phydev, kset); 2907 else 2908 kset->base.port = pl->link_port; 2909 2910 linkmode_copy(kset->link_modes.supported, pl->supported); 2911 2912 switch (pl->act_link_an_mode) { 2913 case MLO_AN_FIXED: 2914 /* We are using fixed settings. Report these as the 2915 * current link settings - and note that these also 2916 * represent the supported speeds/duplex/pause modes. 2917 */ 2918 phylink_get_fixed_state(pl, &link_state); 2919 phylink_get_ksettings(&link_state, kset); 2920 break; 2921 2922 case MLO_AN_INBAND: 2923 /* If there is a phy attached, then use the reported 2924 * settings from the phy with no modification. 2925 */ 2926 if (pl->phydev) 2927 break; 2928 2929 phylink_mac_pcs_get_state(pl, &link_state); 2930 2931 /* The MAC is reporting the link results from its own PCS 2932 * layer via in-band status. Report these as the current 2933 * link settings. 2934 */ 2935 phylink_get_ksettings(&link_state, kset); 2936 break; 2937 } 2938 2939 return 0; 2940 } 2941 EXPORT_SYMBOL_GPL(phylink_ethtool_ksettings_get); 2942 2943 static bool phylink_validate_pcs_inband_autoneg(struct phylink *pl, 2944 phy_interface_t interface, 2945 unsigned long *adv) 2946 { 2947 unsigned int inband = phylink_inband_caps(pl, interface); 2948 unsigned int mask; 2949 2950 /* If the PCS doesn't implement inband support, be permissive. */ 2951 if (!inband) 2952 return true; 2953 2954 if (linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, adv)) 2955 mask = LINK_INBAND_ENABLE; 2956 else 2957 mask = LINK_INBAND_DISABLE; 2958 2959 /* Check whether the PCS implements the required mode */ 2960 return !!(inband & mask); 2961 } 2962 2963 /** 2964 * phylink_ethtool_ksettings_set() - set the link settings 2965 * @pl: a pointer to a &struct phylink returned from phylink_create() 2966 * @kset: a pointer to a &struct ethtool_link_ksettings for the desired modes 2967 */ 2968 int phylink_ethtool_ksettings_set(struct phylink *pl, 2969 const struct ethtool_link_ksettings *kset) 2970 { 2971 __ETHTOOL_DECLARE_LINK_MODE_MASK(support); 2972 const struct link_capabilities *c; 2973 struct phylink_link_state config; 2974 2975 ASSERT_RTNL(); 2976 2977 if (pl->phydev) { 2978 struct ethtool_link_ksettings phy_kset = *kset; 2979 2980 linkmode_and(phy_kset.link_modes.advertising, 2981 phy_kset.link_modes.advertising, 2982 pl->supported); 2983 2984 /* We can rely on phylib for this update; we also do not need 2985 * to update the pl->link_config settings: 2986 * - the configuration returned via ksettings_get() will come 2987 * from phylib whenever a PHY is present. 2988 * - link_config.interface will be updated by the PHY calling 2989 * back via phylink_phy_change() and a subsequent resolve. 2990 * - initial link configuration for PHY mode comes from the 2991 * last phy state updated via phylink_phy_change(). 2992 * - other configuration changes (e.g. pause modes) are 2993 * performed directly via phylib. 2994 * - if in in-band mode with a PHY, the link configuration 2995 * is passed on the link from the PHY, and all of 2996 * link_config.{speed,duplex,an_enabled,pause} are not used. 2997 * - the only possible use would be link_config.advertising 2998 * pause modes when in 1000base-X mode with a PHY, but in 2999 * the presence of a PHY, this should not be changed as that 3000 * should be determined from the media side advertisement. 3001 */ 3002 return phy_ethtool_ksettings_set(pl->phydev, &phy_kset); 3003 } 3004 3005 config = pl->link_config; 3006 /* Mask out unsupported advertisements */ 3007 linkmode_and(config.advertising, kset->link_modes.advertising, 3008 pl->supported); 3009 3010 /* FIXME: should we reject autoneg if phy/mac does not support it? */ 3011 switch (kset->base.autoneg) { 3012 case AUTONEG_DISABLE: 3013 /* Autonegotiation disabled, select a suitable speed and 3014 * duplex. 3015 */ 3016 c = phy_caps_lookup(kset->base.speed, kset->base.duplex, 3017 pl->supported, false); 3018 if (!c) 3019 return -EINVAL; 3020 3021 /* If we have a fixed link, refuse to change link parameters. 3022 * If the link parameters match, accept them but do nothing. 3023 */ 3024 if (pl->req_link_an_mode == MLO_AN_FIXED) { 3025 if (c->speed != pl->link_config.speed || 3026 c->duplex != pl->link_config.duplex) 3027 return -EINVAL; 3028 return 0; 3029 } 3030 3031 config.speed = c->speed; 3032 config.duplex = c->duplex; 3033 break; 3034 3035 case AUTONEG_ENABLE: 3036 /* If we have a fixed link, allow autonegotiation (since that 3037 * is our default case) but do not allow the advertisement to 3038 * be changed. If the advertisement matches, simply return. 3039 */ 3040 if (pl->req_link_an_mode == MLO_AN_FIXED) { 3041 if (!linkmode_equal(config.advertising, 3042 pl->link_config.advertising)) 3043 return -EINVAL; 3044 return 0; 3045 } 3046 3047 config.speed = SPEED_UNKNOWN; 3048 config.duplex = DUPLEX_UNKNOWN; 3049 break; 3050 3051 default: 3052 return -EINVAL; 3053 } 3054 3055 /* We have ruled out the case with a PHY attached, and the 3056 * fixed-link cases. All that is left are in-band links. 3057 */ 3058 linkmode_mod_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, config.advertising, 3059 kset->base.autoneg == AUTONEG_ENABLE); 3060 3061 /* If this link is with an SFP, ensure that changes to advertised modes 3062 * also cause the associated interface to be selected such that the 3063 * link can be configured correctly. 3064 */ 3065 if (pl->sfp_bus) { 3066 if (kset->base.autoneg == AUTONEG_ENABLE) 3067 config.interface = 3068 phylink_sfp_select_interface(pl, 3069 config.advertising); 3070 else 3071 config.interface = 3072 phylink_sfp_select_interface_speed(pl, 3073 config.speed); 3074 if (config.interface == PHY_INTERFACE_MODE_NA) 3075 return -EINVAL; 3076 3077 /* Revalidate with the selected interface */ 3078 linkmode_copy(support, pl->supported); 3079 if (phylink_validate(pl, support, &config)) { 3080 phylink_err(pl, "validation of %s/%s with support %*pb failed\n", 3081 phylink_an_mode_str(pl->req_link_an_mode), 3082 phy_modes(config.interface), 3083 __ETHTOOL_LINK_MODE_MASK_NBITS, support); 3084 return -EINVAL; 3085 } 3086 } else { 3087 /* Validate without changing the current supported mask. */ 3088 linkmode_copy(support, pl->supported); 3089 if (phylink_validate(pl, support, &config)) 3090 return -EINVAL; 3091 } 3092 3093 /* If autonegotiation is enabled, we must have an advertisement */ 3094 if (linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, 3095 config.advertising) && 3096 phylink_is_empty_linkmode(config.advertising)) 3097 return -EINVAL; 3098 3099 /* Validate the autonegotiation state. We don't have a PHY in this 3100 * situation, so the PCS is the media-facing entity. 3101 */ 3102 if (!phylink_validate_pcs_inband_autoneg(pl, config.interface, 3103 config.advertising)) 3104 return -EINVAL; 3105 3106 mutex_lock(&pl->state_mutex); 3107 pl->link_config.speed = config.speed; 3108 pl->link_config.duplex = config.duplex; 3109 3110 if (pl->link_config.interface != config.interface) { 3111 /* The interface changed, e.g. 1000base-X <-> 2500base-X */ 3112 /* We need to force the link down, then change the interface */ 3113 if (pl->old_link_state) { 3114 phylink_link_down(pl); 3115 pl->old_link_state = false; 3116 } 3117 if (!test_bit(PHYLINK_DISABLE_STOPPED, 3118 &pl->phylink_disable_state)) 3119 phylink_major_config(pl, false, &config); 3120 pl->link_config.interface = config.interface; 3121 linkmode_copy(pl->link_config.advertising, config.advertising); 3122 } else if (!linkmode_equal(pl->link_config.advertising, 3123 config.advertising)) { 3124 linkmode_copy(pl->link_config.advertising, config.advertising); 3125 phylink_change_inband_advert(pl); 3126 } 3127 mutex_unlock(&pl->state_mutex); 3128 3129 return 0; 3130 } 3131 EXPORT_SYMBOL_GPL(phylink_ethtool_ksettings_set); 3132 3133 /** 3134 * phylink_ethtool_nway_reset() - restart negotiation 3135 * @pl: a pointer to a &struct phylink returned from phylink_create() 3136 * 3137 * Restart negotiation for the phylink instance specified by @pl. This will 3138 * cause any attached phy to restart negotiation with the link partner, and 3139 * if the MAC is in a BaseX mode, the MAC will also be requested to restart 3140 * negotiation. 3141 * 3142 * Returns zero on success, or negative error code. 3143 */ 3144 int phylink_ethtool_nway_reset(struct phylink *pl) 3145 { 3146 int ret = 0; 3147 3148 ASSERT_RTNL(); 3149 3150 if (pl->phydev) 3151 ret = phy_restart_aneg(pl->phydev); 3152 phylink_pcs_an_restart(pl); 3153 3154 return ret; 3155 } 3156 EXPORT_SYMBOL_GPL(phylink_ethtool_nway_reset); 3157 3158 /** 3159 * phylink_ethtool_get_pauseparam() - get the current pause parameters 3160 * @pl: a pointer to a &struct phylink returned from phylink_create() 3161 * @pause: a pointer to a &struct ethtool_pauseparam 3162 */ 3163 void phylink_ethtool_get_pauseparam(struct phylink *pl, 3164 struct ethtool_pauseparam *pause) 3165 { 3166 ASSERT_RTNL(); 3167 3168 pause->autoneg = !!(pl->link_config.pause & MLO_PAUSE_AN); 3169 pause->rx_pause = !!(pl->link_config.pause & MLO_PAUSE_RX); 3170 pause->tx_pause = !!(pl->link_config.pause & MLO_PAUSE_TX); 3171 } 3172 EXPORT_SYMBOL_GPL(phylink_ethtool_get_pauseparam); 3173 3174 /** 3175 * phylink_ethtool_set_pauseparam() - set the current pause parameters 3176 * @pl: a pointer to a &struct phylink returned from phylink_create() 3177 * @pause: a pointer to a &struct ethtool_pauseparam 3178 */ 3179 int phylink_ethtool_set_pauseparam(struct phylink *pl, 3180 struct ethtool_pauseparam *pause) 3181 { 3182 struct phylink_link_state *config = &pl->link_config; 3183 bool manual_changed; 3184 int pause_state; 3185 3186 ASSERT_RTNL(); 3187 3188 if (pl->req_link_an_mode == MLO_AN_FIXED) 3189 return -EOPNOTSUPP; 3190 3191 if (!phylink_test(pl->supported, Pause) && 3192 !phylink_test(pl->supported, Asym_Pause)) 3193 return -EOPNOTSUPP; 3194 3195 if (!phylink_test(pl->supported, Asym_Pause) && 3196 pause->rx_pause != pause->tx_pause) 3197 return -EINVAL; 3198 3199 pause_state = 0; 3200 if (pause->autoneg) 3201 pause_state |= MLO_PAUSE_AN; 3202 if (pause->rx_pause) 3203 pause_state |= MLO_PAUSE_RX; 3204 if (pause->tx_pause) 3205 pause_state |= MLO_PAUSE_TX; 3206 3207 mutex_lock(&pl->state_mutex); 3208 /* 3209 * See the comments for linkmode_set_pause(), wrt the deficiencies 3210 * with the current implementation. A solution to this issue would 3211 * be: 3212 * ethtool Local device 3213 * rx tx Pause AsymDir 3214 * 0 0 0 0 3215 * 1 0 1 1 3216 * 0 1 0 1 3217 * 1 1 1 1 3218 * and then use the ethtool rx/tx enablement status to mask the 3219 * rx/tx pause resolution. 3220 */ 3221 linkmode_set_pause(config->advertising, pause->tx_pause, 3222 pause->rx_pause); 3223 3224 manual_changed = (config->pause ^ pause_state) & MLO_PAUSE_AN || 3225 (!(pause_state & MLO_PAUSE_AN) && 3226 (config->pause ^ pause_state) & MLO_PAUSE_TXRX_MASK); 3227 3228 config->pause = pause_state; 3229 3230 /* Update our in-band advertisement, triggering a renegotiation if 3231 * the advertisement changed. 3232 */ 3233 if (!pl->phydev) 3234 phylink_change_inband_advert(pl); 3235 3236 mutex_unlock(&pl->state_mutex); 3237 3238 /* If we have a PHY, a change of the pause frame advertisement will 3239 * cause phylib to renegotiate (if AN is enabled) which will in turn 3240 * call our phylink_phy_change() and trigger a resolve. Note that 3241 * we can't hold our state mutex while calling phy_set_asym_pause(). 3242 */ 3243 if (pl->phydev) 3244 phy_set_asym_pause(pl->phydev, pause->rx_pause, 3245 pause->tx_pause); 3246 3247 /* If the manual pause settings changed, make sure we trigger a 3248 * resolve to update their state; we can not guarantee that the 3249 * link will cycle. 3250 */ 3251 if (manual_changed) { 3252 pl->link_failed = true; 3253 phylink_run_resolve(pl); 3254 } 3255 3256 return 0; 3257 } 3258 EXPORT_SYMBOL_GPL(phylink_ethtool_set_pauseparam); 3259 3260 /** 3261 * phylink_get_eee_err() - read the energy efficient ethernet error 3262 * counter 3263 * @pl: a pointer to a &struct phylink returned from phylink_create(). 3264 * 3265 * Read the Energy Efficient Ethernet error counter from the PHY associated 3266 * with the phylink instance specified by @pl. 3267 * 3268 * Returns positive error counter value, or negative error code. 3269 */ 3270 int phylink_get_eee_err(struct phylink *pl) 3271 { 3272 int ret = 0; 3273 3274 ASSERT_RTNL(); 3275 3276 if (pl->phydev) 3277 ret = phy_get_eee_err(pl->phydev); 3278 3279 return ret; 3280 } 3281 EXPORT_SYMBOL_GPL(phylink_get_eee_err); 3282 3283 /** 3284 * phylink_ethtool_get_eee() - read the energy efficient ethernet parameters 3285 * @pl: a pointer to a &struct phylink returned from phylink_create() 3286 * @eee: a pointer to a &struct ethtool_keee for the read parameters 3287 */ 3288 int phylink_ethtool_get_eee(struct phylink *pl, struct ethtool_keee *eee) 3289 { 3290 int ret = -EOPNOTSUPP; 3291 3292 ASSERT_RTNL(); 3293 3294 if (pl->mac_supports_eee_ops && !pl->mac_supports_eee) 3295 return ret; 3296 3297 if (pl->phydev) { 3298 ret = phy_ethtool_get_eee(pl->phydev, eee); 3299 /* Restrict supported linkmode mask */ 3300 if (ret == 0 && pl->mac_supports_eee_ops) 3301 linkmode_and(eee->supported, eee->supported, 3302 pl->supported_lpi); 3303 } 3304 3305 return ret; 3306 } 3307 EXPORT_SYMBOL_GPL(phylink_ethtool_get_eee); 3308 3309 /** 3310 * phylink_ethtool_set_eee() - set the energy efficient ethernet parameters 3311 * @pl: a pointer to a &struct phylink returned from phylink_create() 3312 * @eee: a pointer to a &struct ethtool_keee for the desired parameters 3313 */ 3314 int phylink_ethtool_set_eee(struct phylink *pl, struct ethtool_keee *eee) 3315 { 3316 bool mac_eee = pl->mac_supports_eee; 3317 int ret = -EOPNOTSUPP; 3318 3319 ASSERT_RTNL(); 3320 3321 phylink_dbg(pl, "mac %s phylink EEE%s, adv %*pbl, LPI%s timer %uus\n", 3322 mac_eee ? "supports" : "does not support", 3323 eee->eee_enabled ? ", enabled" : "", 3324 __ETHTOOL_LINK_MODE_MASK_NBITS, eee->advertised, 3325 eee->tx_lpi_enabled ? " enabled" : "", eee->tx_lpi_timer); 3326 3327 if (pl->mac_supports_eee_ops && !mac_eee) 3328 return ret; 3329 3330 if (pl->phydev) { 3331 /* Restrict advertisement mask */ 3332 if (pl->mac_supports_eee_ops) 3333 linkmode_and(eee->advertised, eee->advertised, 3334 pl->supported_lpi); 3335 ret = phy_ethtool_set_eee(pl->phydev, eee); 3336 if (ret == 0) 3337 eee_to_eeecfg(&pl->eee_cfg, eee); 3338 } 3339 3340 return ret; 3341 } 3342 EXPORT_SYMBOL_GPL(phylink_ethtool_set_eee); 3343 3344 /* This emulates MII registers for a fixed-mode phy operating as per the 3345 * passed in state. "aneg" defines if we report negotiation is possible. 3346 * 3347 * FIXME: should deal with negotiation state too. 3348 */ 3349 static int phylink_mii_emul_read(unsigned int reg, 3350 struct phylink_link_state *state) 3351 { 3352 struct fixed_phy_status fs; 3353 unsigned long *lpa = state->lp_advertising; 3354 int val; 3355 3356 fs.link = state->link; 3357 fs.speed = state->speed; 3358 fs.duplex = state->duplex; 3359 fs.pause = test_bit(ETHTOOL_LINK_MODE_Pause_BIT, lpa); 3360 fs.asym_pause = test_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, lpa); 3361 3362 val = swphy_read_reg(reg, &fs); 3363 if (reg == MII_BMSR) { 3364 if (!state->an_complete) 3365 val &= ~BMSR_ANEGCOMPLETE; 3366 } 3367 return val; 3368 } 3369 3370 static int phylink_phy_read(struct phylink *pl, unsigned int phy_id, 3371 unsigned int reg) 3372 { 3373 struct phy_device *phydev = pl->phydev; 3374 int prtad, devad; 3375 3376 if (mdio_phy_id_is_c45(phy_id)) { 3377 prtad = mdio_phy_id_prtad(phy_id); 3378 devad = mdio_phy_id_devad(phy_id); 3379 return mdiobus_c45_read(pl->phydev->mdio.bus, prtad, devad, 3380 reg); 3381 } 3382 3383 if (phydev->is_c45) { 3384 switch (reg) { 3385 case MII_BMCR: 3386 case MII_BMSR: 3387 case MII_PHYSID1: 3388 case MII_PHYSID2: 3389 devad = __ffs(phydev->c45_ids.mmds_present); 3390 break; 3391 case MII_ADVERTISE: 3392 case MII_LPA: 3393 if (!(phydev->c45_ids.mmds_present & MDIO_DEVS_AN)) 3394 return -EINVAL; 3395 devad = MDIO_MMD_AN; 3396 if (reg == MII_ADVERTISE) 3397 reg = MDIO_AN_ADVERTISE; 3398 else 3399 reg = MDIO_AN_LPA; 3400 break; 3401 default: 3402 return -EINVAL; 3403 } 3404 prtad = phy_id; 3405 return mdiobus_c45_read(pl->phydev->mdio.bus, prtad, devad, 3406 reg); 3407 } 3408 3409 return mdiobus_read(pl->phydev->mdio.bus, phy_id, reg); 3410 } 3411 3412 static int phylink_phy_write(struct phylink *pl, unsigned int phy_id, 3413 unsigned int reg, unsigned int val) 3414 { 3415 struct phy_device *phydev = pl->phydev; 3416 int prtad, devad; 3417 3418 if (mdio_phy_id_is_c45(phy_id)) { 3419 prtad = mdio_phy_id_prtad(phy_id); 3420 devad = mdio_phy_id_devad(phy_id); 3421 return mdiobus_c45_write(pl->phydev->mdio.bus, prtad, devad, 3422 reg, val); 3423 } 3424 3425 if (phydev->is_c45) { 3426 switch (reg) { 3427 case MII_BMCR: 3428 case MII_BMSR: 3429 case MII_PHYSID1: 3430 case MII_PHYSID2: 3431 devad = __ffs(phydev->c45_ids.mmds_present); 3432 break; 3433 case MII_ADVERTISE: 3434 case MII_LPA: 3435 if (!(phydev->c45_ids.mmds_present & MDIO_DEVS_AN)) 3436 return -EINVAL; 3437 devad = MDIO_MMD_AN; 3438 if (reg == MII_ADVERTISE) 3439 reg = MDIO_AN_ADVERTISE; 3440 else 3441 reg = MDIO_AN_LPA; 3442 break; 3443 default: 3444 return -EINVAL; 3445 } 3446 return mdiobus_c45_write(pl->phydev->mdio.bus, phy_id, devad, 3447 reg, val); 3448 } 3449 3450 return mdiobus_write(phydev->mdio.bus, phy_id, reg, val); 3451 } 3452 3453 static int phylink_mii_read(struct phylink *pl, unsigned int phy_id, 3454 unsigned int reg) 3455 { 3456 struct phylink_link_state state; 3457 int val = 0xffff; 3458 3459 switch (pl->act_link_an_mode) { 3460 case MLO_AN_FIXED: 3461 if (phy_id == 0) { 3462 phylink_get_fixed_state(pl, &state); 3463 val = phylink_mii_emul_read(reg, &state); 3464 } 3465 break; 3466 3467 case MLO_AN_PHY: 3468 return -EOPNOTSUPP; 3469 3470 case MLO_AN_INBAND: 3471 if (phy_id == 0) { 3472 phylink_mac_pcs_get_state(pl, &state); 3473 val = phylink_mii_emul_read(reg, &state); 3474 } 3475 break; 3476 } 3477 3478 return val & 0xffff; 3479 } 3480 3481 static int phylink_mii_write(struct phylink *pl, unsigned int phy_id, 3482 unsigned int reg, unsigned int val) 3483 { 3484 switch (pl->act_link_an_mode) { 3485 case MLO_AN_FIXED: 3486 break; 3487 3488 case MLO_AN_PHY: 3489 return -EOPNOTSUPP; 3490 3491 case MLO_AN_INBAND: 3492 break; 3493 } 3494 3495 return 0; 3496 } 3497 3498 /** 3499 * phylink_mii_ioctl() - generic mii ioctl interface 3500 * @pl: a pointer to a &struct phylink returned from phylink_create() 3501 * @ifr: a pointer to a &struct ifreq for socket ioctls 3502 * @cmd: ioctl cmd to execute 3503 * 3504 * Perform the specified MII ioctl on the PHY attached to the phylink instance 3505 * specified by @pl. If no PHY is attached, emulate the presence of the PHY. 3506 * 3507 * Returns: zero on success or negative error code. 3508 * 3509 * %SIOCGMIIPHY: 3510 * read register from the current PHY. 3511 * %SIOCGMIIREG: 3512 * read register from the specified PHY. 3513 * %SIOCSMIIREG: 3514 * set a register on the specified PHY. 3515 */ 3516 int phylink_mii_ioctl(struct phylink *pl, struct ifreq *ifr, int cmd) 3517 { 3518 struct mii_ioctl_data *mii = if_mii(ifr); 3519 int ret; 3520 3521 ASSERT_RTNL(); 3522 3523 if (pl->phydev) { 3524 /* PHYs only exist for MLO_AN_PHY and SGMII */ 3525 switch (cmd) { 3526 case SIOCGMIIPHY: 3527 mii->phy_id = pl->phydev->mdio.addr; 3528 fallthrough; 3529 3530 case SIOCGMIIREG: 3531 ret = phylink_phy_read(pl, mii->phy_id, mii->reg_num); 3532 if (ret >= 0) { 3533 mii->val_out = ret; 3534 ret = 0; 3535 } 3536 break; 3537 3538 case SIOCSMIIREG: 3539 ret = phylink_phy_write(pl, mii->phy_id, mii->reg_num, 3540 mii->val_in); 3541 break; 3542 3543 default: 3544 ret = phy_mii_ioctl(pl->phydev, ifr, cmd); 3545 break; 3546 } 3547 } else { 3548 switch (cmd) { 3549 case SIOCGMIIPHY: 3550 mii->phy_id = 0; 3551 fallthrough; 3552 3553 case SIOCGMIIREG: 3554 ret = phylink_mii_read(pl, mii->phy_id, mii->reg_num); 3555 if (ret >= 0) { 3556 mii->val_out = ret; 3557 ret = 0; 3558 } 3559 break; 3560 3561 case SIOCSMIIREG: 3562 ret = phylink_mii_write(pl, mii->phy_id, mii->reg_num, 3563 mii->val_in); 3564 break; 3565 3566 default: 3567 ret = -EOPNOTSUPP; 3568 break; 3569 } 3570 } 3571 3572 return ret; 3573 } 3574 EXPORT_SYMBOL_GPL(phylink_mii_ioctl); 3575 3576 /** 3577 * phylink_speed_down() - set the non-SFP PHY to lowest speed supported by both 3578 * link partners 3579 * @pl: a pointer to a &struct phylink returned from phylink_create() 3580 * @sync: perform action synchronously 3581 * 3582 * If we have a PHY that is not part of a SFP module, then set the speed 3583 * as described in the phy_speed_down() function. Please see this function 3584 * for a description of the @sync parameter. 3585 * 3586 * Returns zero if there is no PHY, otherwise as per phy_speed_down(). 3587 */ 3588 int phylink_speed_down(struct phylink *pl, bool sync) 3589 { 3590 int ret = 0; 3591 3592 ASSERT_RTNL(); 3593 3594 if (!pl->sfp_bus && pl->phydev) 3595 ret = phy_speed_down(pl->phydev, sync); 3596 3597 return ret; 3598 } 3599 EXPORT_SYMBOL_GPL(phylink_speed_down); 3600 3601 /** 3602 * phylink_speed_up() - restore the advertised speeds prior to the call to 3603 * phylink_speed_down() 3604 * @pl: a pointer to a &struct phylink returned from phylink_create() 3605 * 3606 * If we have a PHY that is not part of a SFP module, then restore the 3607 * PHY speeds as per phy_speed_up(). 3608 * 3609 * Returns zero if there is no PHY, otherwise as per phy_speed_up(). 3610 */ 3611 int phylink_speed_up(struct phylink *pl) 3612 { 3613 int ret = 0; 3614 3615 ASSERT_RTNL(); 3616 3617 if (!pl->sfp_bus && pl->phydev) 3618 ret = phy_speed_up(pl->phydev); 3619 3620 return ret; 3621 } 3622 EXPORT_SYMBOL_GPL(phylink_speed_up); 3623 3624 static void phylink_sfp_attach(void *upstream, struct sfp_bus *bus) 3625 { 3626 struct phylink *pl = upstream; 3627 3628 pl->netdev->sfp_bus = bus; 3629 } 3630 3631 static void phylink_sfp_detach(void *upstream, struct sfp_bus *bus) 3632 { 3633 struct phylink *pl = upstream; 3634 3635 pl->netdev->sfp_bus = NULL; 3636 } 3637 3638 static phy_interface_t phylink_choose_sfp_interface(struct phylink *pl, 3639 const unsigned long *intf) 3640 { 3641 phy_interface_t interface; 3642 size_t i; 3643 3644 interface = PHY_INTERFACE_MODE_NA; 3645 for (i = 0; i < ARRAY_SIZE(phylink_sfp_interface_preference); i++) 3646 if (test_bit(phylink_sfp_interface_preference[i], intf)) { 3647 interface = phylink_sfp_interface_preference[i]; 3648 break; 3649 } 3650 3651 return interface; 3652 } 3653 3654 static void phylink_sfp_set_config(struct phylink *pl, unsigned long *supported, 3655 struct phylink_link_state *state, 3656 bool changed) 3657 { 3658 u8 mode = MLO_AN_INBAND; 3659 3660 phylink_dbg(pl, "requesting link mode %s/%s with support %*pb\n", 3661 phylink_an_mode_str(mode), phy_modes(state->interface), 3662 __ETHTOOL_LINK_MODE_MASK_NBITS, supported); 3663 3664 if (!linkmode_equal(pl->supported, supported)) { 3665 linkmode_copy(pl->supported, supported); 3666 changed = true; 3667 } 3668 3669 if (!linkmode_equal(pl->link_config.advertising, state->advertising)) { 3670 linkmode_copy(pl->link_config.advertising, state->advertising); 3671 changed = true; 3672 } 3673 3674 if (pl->req_link_an_mode != mode || 3675 pl->link_config.interface != state->interface) { 3676 pl->req_link_an_mode = mode; 3677 pl->link_config.interface = state->interface; 3678 3679 changed = true; 3680 3681 phylink_info(pl, "switched to %s/%s link mode\n", 3682 phylink_an_mode_str(mode), 3683 phy_modes(state->interface)); 3684 } 3685 3686 if (changed && !test_bit(PHYLINK_DISABLE_STOPPED, 3687 &pl->phylink_disable_state)) 3688 phylink_mac_initial_config(pl, false); 3689 } 3690 3691 static int phylink_sfp_config_phy(struct phylink *pl, struct phy_device *phy) 3692 { 3693 __ETHTOOL_DECLARE_LINK_MODE_MASK(support); 3694 struct phylink_link_state config; 3695 int ret; 3696 3697 /* We're not using pl->sfp_interfaces, so clear it. */ 3698 phy_interface_zero(pl->sfp_interfaces); 3699 linkmode_copy(support, phy->supported); 3700 3701 memset(&config, 0, sizeof(config)); 3702 linkmode_copy(config.advertising, phy->advertising); 3703 config.interface = PHY_INTERFACE_MODE_NA; 3704 config.speed = SPEED_UNKNOWN; 3705 config.duplex = DUPLEX_UNKNOWN; 3706 config.pause = MLO_PAUSE_AN; 3707 3708 /* Ignore errors if we're expecting a PHY to attach later */ 3709 ret = phylink_validate(pl, support, &config); 3710 if (ret) { 3711 phylink_err(pl, "validation with support %*pb failed: %pe\n", 3712 __ETHTOOL_LINK_MODE_MASK_NBITS, support, 3713 ERR_PTR(ret)); 3714 return ret; 3715 } 3716 3717 config.interface = phylink_sfp_select_interface(pl, config.advertising); 3718 if (config.interface == PHY_INTERFACE_MODE_NA) 3719 return -EINVAL; 3720 3721 /* Attach the PHY so that the PHY is present when we do the major 3722 * configuration step. 3723 */ 3724 ret = phylink_attach_phy(pl, phy, config.interface); 3725 if (ret < 0) 3726 return ret; 3727 3728 /* This will validate the configuration for us. */ 3729 ret = phylink_bringup_phy(pl, phy, config.interface); 3730 if (ret < 0) { 3731 phy_detach(phy); 3732 return ret; 3733 } 3734 3735 pl->link_port = pl->sfp_port; 3736 3737 phylink_sfp_set_config(pl, support, &config, true); 3738 3739 return 0; 3740 } 3741 3742 static int phylink_sfp_config_optical(struct phylink *pl) 3743 { 3744 __ETHTOOL_DECLARE_LINK_MODE_MASK(support); 3745 struct phylink_link_state config; 3746 enum inband_type inband_type; 3747 phy_interface_t interface; 3748 int ret; 3749 3750 phylink_dbg(pl, "optical SFP: interfaces=[mac=%*pbl, sfp=%*pbl]\n", 3751 (int)PHY_INTERFACE_MODE_MAX, 3752 pl->config->supported_interfaces, 3753 (int)PHY_INTERFACE_MODE_MAX, 3754 pl->sfp_interfaces); 3755 3756 /* Find the union of the supported interfaces by the PCS/MAC and 3757 * the SFP module. 3758 */ 3759 phy_interface_and(pl->sfp_interfaces, pl->config->supported_interfaces, 3760 pl->sfp_interfaces); 3761 if (phy_interface_empty(pl->sfp_interfaces)) { 3762 phylink_err(pl, "unsupported SFP module: no common interface modes\n"); 3763 return -EINVAL; 3764 } 3765 3766 memset(&config, 0, sizeof(config)); 3767 linkmode_copy(support, pl->sfp_support); 3768 linkmode_copy(config.advertising, pl->sfp_support); 3769 config.speed = SPEED_UNKNOWN; 3770 config.duplex = DUPLEX_UNKNOWN; 3771 config.pause = MLO_PAUSE_AN; 3772 3773 /* For all the interfaces that are supported, reduce the sfp_support 3774 * mask to only those link modes that can be supported. 3775 */ 3776 ret = phylink_validate_mask(pl, NULL, pl->sfp_support, &config, 3777 pl->sfp_interfaces); 3778 if (ret) { 3779 phylink_err(pl, "unsupported SFP module: validation with support %*pb failed\n", 3780 __ETHTOOL_LINK_MODE_MASK_NBITS, support); 3781 return ret; 3782 } 3783 3784 interface = phylink_choose_sfp_interface(pl, pl->sfp_interfaces); 3785 if (interface == PHY_INTERFACE_MODE_NA) { 3786 phylink_err(pl, "failed to select SFP interface\n"); 3787 return -EINVAL; 3788 } 3789 3790 phylink_dbg(pl, "optical SFP: chosen %s interface\n", 3791 phy_modes(interface)); 3792 3793 inband_type = phylink_get_inband_type(interface); 3794 if (inband_type == INBAND_NONE) { 3795 /* If this is the sole interface, and there is no inband 3796 * support, clear the advertising mask and Autoneg bit in 3797 * the support mask. Otherwise, just clear the Autoneg bit 3798 * in the advertising mask. 3799 */ 3800 if (phy_interface_weight(pl->sfp_interfaces) == 1) { 3801 linkmode_clear_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, 3802 pl->sfp_support); 3803 linkmode_zero(config.advertising); 3804 } else { 3805 linkmode_clear_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, 3806 config.advertising); 3807 } 3808 } 3809 3810 if (!phylink_validate_pcs_inband_autoneg(pl, interface, 3811 config.advertising)) { 3812 phylink_err(pl, "autoneg setting not compatible with PCS"); 3813 return -EINVAL; 3814 } 3815 3816 config.interface = interface; 3817 3818 /* Ignore errors if we're expecting a PHY to attach later */ 3819 ret = phylink_validate(pl, support, &config); 3820 if (ret) { 3821 phylink_err(pl, "validation with support %*pb failed: %pe\n", 3822 __ETHTOOL_LINK_MODE_MASK_NBITS, support, 3823 ERR_PTR(ret)); 3824 return ret; 3825 } 3826 3827 pl->link_port = pl->sfp_port; 3828 3829 phylink_sfp_set_config(pl, pl->sfp_support, &config, false); 3830 3831 return 0; 3832 } 3833 3834 static int phylink_sfp_module_insert(void *upstream, 3835 const struct sfp_eeprom_id *id) 3836 { 3837 const struct sfp_module_caps *caps; 3838 struct phylink *pl = upstream; 3839 3840 ASSERT_RTNL(); 3841 3842 caps = sfp_get_module_caps(pl->sfp_bus); 3843 phy_interface_copy(pl->sfp_interfaces, caps->interfaces); 3844 linkmode_copy(pl->sfp_support, caps->link_modes); 3845 pl->sfp_may_have_phy = caps->may_have_phy; 3846 pl->sfp_port = caps->port; 3847 3848 /* If this module may have a PHY connecting later, defer until later */ 3849 if (pl->sfp_may_have_phy) 3850 return 0; 3851 3852 return phylink_sfp_config_optical(pl); 3853 } 3854 3855 static void phylink_sfp_module_remove(void *upstream) 3856 { 3857 struct phylink *pl = upstream; 3858 3859 phy_interface_zero(pl->sfp_interfaces); 3860 } 3861 3862 static int phylink_sfp_module_start(void *upstream) 3863 { 3864 struct phylink *pl = upstream; 3865 3866 /* If this SFP module has a PHY, start the PHY now. */ 3867 if (pl->phydev) { 3868 phy_start(pl->phydev); 3869 return 0; 3870 } 3871 3872 /* If the module may have a PHY but we didn't detect one we 3873 * need to configure the MAC here. 3874 */ 3875 if (!pl->sfp_may_have_phy) 3876 return 0; 3877 3878 return phylink_sfp_config_optical(pl); 3879 } 3880 3881 static void phylink_sfp_module_stop(void *upstream) 3882 { 3883 struct phylink *pl = upstream; 3884 3885 /* If this SFP module has a PHY, stop it. */ 3886 if (pl->phydev) 3887 phy_stop(pl->phydev); 3888 } 3889 3890 static void phylink_sfp_link_down(void *upstream) 3891 { 3892 struct phylink *pl = upstream; 3893 3894 ASSERT_RTNL(); 3895 3896 phylink_run_resolve_and_disable(pl, PHYLINK_DISABLE_LINK); 3897 } 3898 3899 static void phylink_sfp_link_up(void *upstream) 3900 { 3901 struct phylink *pl = upstream; 3902 3903 ASSERT_RTNL(); 3904 3905 phylink_enable_and_run_resolve(pl, PHYLINK_DISABLE_LINK); 3906 } 3907 3908 static int phylink_sfp_connect_phy(void *upstream, struct phy_device *phy) 3909 { 3910 struct phylink *pl = upstream; 3911 3912 if (!phy->drv) { 3913 phylink_err(pl, "PHY %s (id 0x%.8lx) has no driver loaded\n", 3914 phydev_name(phy), (unsigned long)phy->phy_id); 3915 phylink_err(pl, "Drivers which handle known common cases: CONFIG_BCM84881_PHY, CONFIG_MARVELL_PHY\n"); 3916 return -EINVAL; 3917 } 3918 3919 /* 3920 * This is the new way of dealing with flow control for PHYs, 3921 * as described by Timur Tabi in commit 529ed1275263 ("net: phy: 3922 * phy drivers should not set SUPPORTED_[Asym_]Pause") except 3923 * using our validate call to the MAC, we rely upon the MAC 3924 * clearing the bits from both supported and advertising fields. 3925 */ 3926 phy_support_asym_pause(phy); 3927 3928 /* Set the PHY's host supported interfaces */ 3929 phy_interface_and(phy->host_interfaces, phylink_sfp_interfaces, 3930 pl->config->supported_interfaces); 3931 3932 /* Do the initial configuration */ 3933 return phylink_sfp_config_phy(pl, phy); 3934 } 3935 3936 static void phylink_sfp_disconnect_phy(void *upstream, 3937 struct phy_device *phydev) 3938 { 3939 phylink_disconnect_phy(upstream); 3940 } 3941 3942 static const struct sfp_upstream_ops sfp_phylink_ops = { 3943 .attach = phylink_sfp_attach, 3944 .detach = phylink_sfp_detach, 3945 .module_insert = phylink_sfp_module_insert, 3946 .module_remove = phylink_sfp_module_remove, 3947 .module_start = phylink_sfp_module_start, 3948 .module_stop = phylink_sfp_module_stop, 3949 .link_up = phylink_sfp_link_up, 3950 .link_down = phylink_sfp_link_down, 3951 .connect_phy = phylink_sfp_connect_phy, 3952 .disconnect_phy = phylink_sfp_disconnect_phy, 3953 }; 3954 3955 /* Helpers for MAC drivers */ 3956 3957 static struct { 3958 int bit; 3959 int speed; 3960 } phylink_c73_priority_resolution[] = { 3961 { ETHTOOL_LINK_MODE_100000baseCR4_Full_BIT, SPEED_100000 }, 3962 { ETHTOOL_LINK_MODE_100000baseKR4_Full_BIT, SPEED_100000 }, 3963 /* 100GBASE-KP4 and 100GBASE-CR10 not supported */ 3964 { ETHTOOL_LINK_MODE_40000baseCR4_Full_BIT, SPEED_40000 }, 3965 { ETHTOOL_LINK_MODE_40000baseKR4_Full_BIT, SPEED_40000 }, 3966 { ETHTOOL_LINK_MODE_10000baseKR_Full_BIT, SPEED_10000 }, 3967 { ETHTOOL_LINK_MODE_10000baseKX4_Full_BIT, SPEED_10000 }, 3968 /* 5GBASE-KR not supported */ 3969 { ETHTOOL_LINK_MODE_2500baseX_Full_BIT, SPEED_2500 }, 3970 { ETHTOOL_LINK_MODE_1000baseKX_Full_BIT, SPEED_1000 }, 3971 }; 3972 3973 void phylink_resolve_c73(struct phylink_link_state *state) 3974 { 3975 int i; 3976 3977 for (i = 0; i < ARRAY_SIZE(phylink_c73_priority_resolution); i++) { 3978 int bit = phylink_c73_priority_resolution[i].bit; 3979 if (linkmode_test_bit(bit, state->advertising) && 3980 linkmode_test_bit(bit, state->lp_advertising)) 3981 break; 3982 } 3983 3984 if (i < ARRAY_SIZE(phylink_c73_priority_resolution)) { 3985 state->speed = phylink_c73_priority_resolution[i].speed; 3986 state->duplex = DUPLEX_FULL; 3987 } else { 3988 /* negotiation failure */ 3989 state->link = false; 3990 } 3991 3992 phylink_resolve_an_pause(state); 3993 } 3994 EXPORT_SYMBOL_GPL(phylink_resolve_c73); 3995 3996 static void phylink_decode_c37_word(struct phylink_link_state *state, 3997 uint16_t config_reg, int speed) 3998 { 3999 int fd_bit; 4000 4001 if (speed == SPEED_2500) 4002 fd_bit = ETHTOOL_LINK_MODE_2500baseX_Full_BIT; 4003 else 4004 fd_bit = ETHTOOL_LINK_MODE_1000baseX_Full_BIT; 4005 4006 mii_lpa_mod_linkmode_x(state->lp_advertising, config_reg, fd_bit); 4007 4008 if (linkmode_test_bit(fd_bit, state->advertising) && 4009 linkmode_test_bit(fd_bit, state->lp_advertising)) { 4010 state->speed = speed; 4011 state->duplex = DUPLEX_FULL; 4012 } else { 4013 /* negotiation failure */ 4014 state->link = false; 4015 } 4016 4017 phylink_resolve_an_pause(state); 4018 } 4019 4020 static void phylink_decode_sgmii_word(struct phylink_link_state *state, 4021 uint16_t config_reg) 4022 { 4023 if (!(config_reg & LPA_SGMII_LINK)) { 4024 state->link = false; 4025 return; 4026 } 4027 4028 switch (config_reg & LPA_SGMII_SPD_MASK) { 4029 case LPA_SGMII_10: 4030 state->speed = SPEED_10; 4031 break; 4032 case LPA_SGMII_100: 4033 state->speed = SPEED_100; 4034 break; 4035 case LPA_SGMII_1000: 4036 state->speed = SPEED_1000; 4037 break; 4038 default: 4039 state->link = false; 4040 return; 4041 } 4042 if (config_reg & LPA_SGMII_FULL_DUPLEX) 4043 state->duplex = DUPLEX_FULL; 4044 else 4045 state->duplex = DUPLEX_HALF; 4046 } 4047 4048 /** 4049 * phylink_decode_usxgmii_word() - decode the USXGMII word from a MAC PCS 4050 * @state: a pointer to a struct phylink_link_state. 4051 * @lpa: a 16 bit value which stores the USXGMII auto-negotiation word 4052 * 4053 * Helper for MAC PCS supporting the USXGMII protocol and the auto-negotiation 4054 * code word. Decode the USXGMII code word and populate the corresponding fields 4055 * (speed, duplex) into the phylink_link_state structure. 4056 */ 4057 void phylink_decode_usxgmii_word(struct phylink_link_state *state, 4058 uint16_t lpa) 4059 { 4060 switch (lpa & MDIO_USXGMII_SPD_MASK) { 4061 case MDIO_USXGMII_10: 4062 state->speed = SPEED_10; 4063 break; 4064 case MDIO_USXGMII_100: 4065 state->speed = SPEED_100; 4066 break; 4067 case MDIO_USXGMII_1000: 4068 state->speed = SPEED_1000; 4069 break; 4070 case MDIO_USXGMII_2500: 4071 state->speed = SPEED_2500; 4072 break; 4073 case MDIO_USXGMII_5000: 4074 state->speed = SPEED_5000; 4075 break; 4076 case MDIO_USXGMII_10G: 4077 state->speed = SPEED_10000; 4078 break; 4079 default: 4080 state->link = false; 4081 return; 4082 } 4083 4084 if (lpa & MDIO_USXGMII_FULL_DUPLEX) 4085 state->duplex = DUPLEX_FULL; 4086 else 4087 state->duplex = DUPLEX_HALF; 4088 } 4089 EXPORT_SYMBOL_GPL(phylink_decode_usxgmii_word); 4090 4091 /** 4092 * phylink_decode_usgmii_word() - decode the USGMII word from a MAC PCS 4093 * @state: a pointer to a struct phylink_link_state. 4094 * @lpa: a 16 bit value which stores the USGMII auto-negotiation word 4095 * 4096 * Helper for MAC PCS supporting the USGMII protocol and the auto-negotiation 4097 * code word. Decode the USGMII code word and populate the corresponding fields 4098 * (speed, duplex) into the phylink_link_state structure. The structure for this 4099 * word is the same as the USXGMII word, except it only supports speeds up to 4100 * 1Gbps. 4101 */ 4102 static void phylink_decode_usgmii_word(struct phylink_link_state *state, 4103 uint16_t lpa) 4104 { 4105 switch (lpa & MDIO_USXGMII_SPD_MASK) { 4106 case MDIO_USXGMII_10: 4107 state->speed = SPEED_10; 4108 break; 4109 case MDIO_USXGMII_100: 4110 state->speed = SPEED_100; 4111 break; 4112 case MDIO_USXGMII_1000: 4113 state->speed = SPEED_1000; 4114 break; 4115 default: 4116 state->link = false; 4117 return; 4118 } 4119 4120 if (lpa & MDIO_USXGMII_FULL_DUPLEX) 4121 state->duplex = DUPLEX_FULL; 4122 else 4123 state->duplex = DUPLEX_HALF; 4124 } 4125 4126 /** 4127 * phylink_mii_c22_pcs_decode_state() - Decode MAC PCS state from MII registers 4128 * @state: a pointer to a &struct phylink_link_state. 4129 * @neg_mode: link negotiation mode (PHYLINK_PCS_NEG_xxx) 4130 * @bmsr: The value of the %MII_BMSR register 4131 * @lpa: The value of the %MII_LPA register 4132 * 4133 * Helper for MAC PCS supporting the 802.3 clause 22 register set for 4134 * clause 37 negotiation and/or SGMII control. 4135 * 4136 * Parse the Clause 37 or Cisco SGMII link partner negotiation word into 4137 * the phylink @state structure. This is suitable to be used for implementing 4138 * the pcs_get_state() member of the struct phylink_pcs_ops structure if 4139 * accessing @bmsr and @lpa cannot be done with MDIO directly. 4140 */ 4141 void phylink_mii_c22_pcs_decode_state(struct phylink_link_state *state, 4142 unsigned int neg_mode, u16 bmsr, u16 lpa) 4143 { 4144 state->link = !!(bmsr & BMSR_LSTATUS); 4145 state->an_complete = !!(bmsr & BMSR_ANEGCOMPLETE); 4146 4147 /* If the link is down, the advertisement data is undefined. */ 4148 if (!state->link) 4149 return; 4150 4151 switch (state->interface) { 4152 case PHY_INTERFACE_MODE_1000BASEX: 4153 if (neg_mode == PHYLINK_PCS_NEG_INBAND_ENABLED) { 4154 phylink_decode_c37_word(state, lpa, SPEED_1000); 4155 } else { 4156 state->speed = SPEED_1000; 4157 state->duplex = DUPLEX_FULL; 4158 state->pause |= MLO_PAUSE_TX | MLO_PAUSE_RX; 4159 } 4160 break; 4161 4162 case PHY_INTERFACE_MODE_2500BASEX: 4163 if (neg_mode == PHYLINK_PCS_NEG_INBAND_ENABLED) { 4164 phylink_decode_c37_word(state, lpa, SPEED_2500); 4165 } else { 4166 state->speed = SPEED_2500; 4167 state->duplex = DUPLEX_FULL; 4168 state->pause |= MLO_PAUSE_TX | MLO_PAUSE_RX; 4169 } 4170 break; 4171 4172 case PHY_INTERFACE_MODE_SGMII: 4173 case PHY_INTERFACE_MODE_QSGMII: 4174 if (neg_mode == PHYLINK_PCS_NEG_INBAND_ENABLED) 4175 phylink_decode_sgmii_word(state, lpa); 4176 break; 4177 4178 case PHY_INTERFACE_MODE_QUSGMII: 4179 if (neg_mode == PHYLINK_PCS_NEG_INBAND_ENABLED) 4180 phylink_decode_usgmii_word(state, lpa); 4181 break; 4182 4183 default: 4184 state->link = false; 4185 break; 4186 } 4187 } 4188 EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_decode_state); 4189 4190 /** 4191 * phylink_mii_c22_pcs_get_state() - read the MAC PCS state 4192 * @pcs: a pointer to a &struct mdio_device. 4193 * @neg_mode: link negotiation mode (PHYLINK_PCS_NEG_xxx) 4194 * @state: a pointer to a &struct phylink_link_state. 4195 * 4196 * Helper for MAC PCS supporting the 802.3 clause 22 register set for 4197 * clause 37 negotiation and/or SGMII control. 4198 * 4199 * Read the MAC PCS state from the MII device configured in @config and 4200 * parse the Clause 37 or Cisco SGMII link partner negotiation word into 4201 * the phylink @state structure. This is suitable to be directly plugged 4202 * into the pcs_get_state() member of the struct phylink_pcs_ops 4203 * structure. 4204 */ 4205 void phylink_mii_c22_pcs_get_state(struct mdio_device *pcs, 4206 unsigned int neg_mode, 4207 struct phylink_link_state *state) 4208 { 4209 int bmsr, lpa; 4210 4211 bmsr = mdiodev_read(pcs, MII_BMSR); 4212 lpa = mdiodev_read(pcs, MII_LPA); 4213 if (bmsr < 0 || lpa < 0) { 4214 state->link = false; 4215 return; 4216 } 4217 4218 phylink_mii_c22_pcs_decode_state(state, neg_mode, bmsr, lpa); 4219 } 4220 EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_get_state); 4221 4222 /** 4223 * phylink_mii_c22_pcs_encode_advertisement() - configure the clause 37 PCS 4224 * advertisement 4225 * @interface: the PHY interface mode being configured 4226 * @advertising: the ethtool advertisement mask 4227 * 4228 * Helper for MAC PCS supporting the 802.3 clause 22 register set for 4229 * clause 37 negotiation and/or SGMII control. 4230 * 4231 * Encode the clause 37 PCS advertisement as specified by @interface and 4232 * @advertising. 4233 * 4234 * Return: The new value for @adv, or ``-EINVAL`` if it should not be changed. 4235 */ 4236 int phylink_mii_c22_pcs_encode_advertisement(phy_interface_t interface, 4237 const unsigned long *advertising) 4238 { 4239 u16 adv; 4240 4241 switch (interface) { 4242 case PHY_INTERFACE_MODE_1000BASEX: 4243 case PHY_INTERFACE_MODE_2500BASEX: 4244 adv = ADVERTISE_1000XFULL; 4245 if (linkmode_test_bit(ETHTOOL_LINK_MODE_Pause_BIT, 4246 advertising)) 4247 adv |= ADVERTISE_1000XPAUSE; 4248 if (linkmode_test_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, 4249 advertising)) 4250 adv |= ADVERTISE_1000XPSE_ASYM; 4251 return adv; 4252 case PHY_INTERFACE_MODE_SGMII: 4253 case PHY_INTERFACE_MODE_QSGMII: 4254 return 0x0001; 4255 default: 4256 /* Nothing to do for other modes */ 4257 return -EINVAL; 4258 } 4259 } 4260 EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_encode_advertisement); 4261 4262 /** 4263 * phylink_mii_c22_pcs_config() - configure clause 22 PCS 4264 * @pcs: a pointer to a &struct mdio_device. 4265 * @interface: the PHY interface mode being configured 4266 * @advertising: the ethtool advertisement mask 4267 * @neg_mode: PCS negotiation mode 4268 * 4269 * Configure a Clause 22 PCS PHY with the appropriate negotiation 4270 * parameters for the @mode, @interface and @advertising parameters. 4271 * Returns negative error number on failure, zero if the advertisement 4272 * has not changed, or positive if there is a change. 4273 */ 4274 int phylink_mii_c22_pcs_config(struct mdio_device *pcs, 4275 phy_interface_t interface, 4276 const unsigned long *advertising, 4277 unsigned int neg_mode) 4278 { 4279 bool changed = 0; 4280 u16 bmcr; 4281 int ret, adv; 4282 4283 adv = phylink_mii_c22_pcs_encode_advertisement(interface, advertising); 4284 if (adv >= 0) { 4285 ret = mdiobus_modify_changed(pcs->bus, pcs->addr, 4286 MII_ADVERTISE, 0xffff, adv); 4287 if (ret < 0) 4288 return ret; 4289 changed = ret; 4290 } 4291 4292 if (neg_mode == PHYLINK_PCS_NEG_INBAND_ENABLED) 4293 bmcr = BMCR_ANENABLE; 4294 else 4295 bmcr = 0; 4296 4297 /* Configure the inband state. Ensure ISOLATE bit is disabled */ 4298 ret = mdiodev_modify(pcs, MII_BMCR, BMCR_ANENABLE | BMCR_ISOLATE, bmcr); 4299 if (ret < 0) 4300 return ret; 4301 4302 return changed; 4303 } 4304 EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_config); 4305 4306 /** 4307 * phylink_mii_c22_pcs_an_restart() - restart 802.3z autonegotiation 4308 * @pcs: a pointer to a &struct mdio_device. 4309 * 4310 * Helper for MAC PCS supporting the 802.3 clause 22 register set for 4311 * clause 37 negotiation. 4312 * 4313 * Restart the clause 37 negotiation with the link partner. This is 4314 * suitable to be directly plugged into the pcs_get_state() member 4315 * of the struct phylink_pcs_ops structure. 4316 */ 4317 void phylink_mii_c22_pcs_an_restart(struct mdio_device *pcs) 4318 { 4319 int val = mdiodev_read(pcs, MII_BMCR); 4320 4321 if (val >= 0) { 4322 val |= BMCR_ANRESTART; 4323 4324 mdiodev_write(pcs, MII_BMCR, val); 4325 } 4326 } 4327 EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_an_restart); 4328 4329 void phylink_mii_c45_pcs_get_state(struct mdio_device *pcs, 4330 struct phylink_link_state *state) 4331 { 4332 struct mii_bus *bus = pcs->bus; 4333 int addr = pcs->addr; 4334 int stat; 4335 4336 stat = mdiobus_c45_read(bus, addr, MDIO_MMD_PCS, MDIO_STAT1); 4337 if (stat < 0) { 4338 state->link = false; 4339 return; 4340 } 4341 4342 state->link = !!(stat & MDIO_STAT1_LSTATUS); 4343 if (!state->link) 4344 return; 4345 4346 switch (state->interface) { 4347 case PHY_INTERFACE_MODE_10GBASER: 4348 state->speed = SPEED_10000; 4349 state->duplex = DUPLEX_FULL; 4350 break; 4351 4352 default: 4353 break; 4354 } 4355 } 4356 EXPORT_SYMBOL_GPL(phylink_mii_c45_pcs_get_state); 4357 4358 static int __init phylink_init(void) 4359 { 4360 for (int i = 0; i < ARRAY_SIZE(phylink_sfp_interface_preference); ++i) 4361 __set_bit(phylink_sfp_interface_preference[i], 4362 phylink_sfp_interfaces); 4363 4364 return 0; 4365 } 4366 4367 module_init(phylink_init); 4368 4369 MODULE_LICENSE("GPL v2"); 4370 MODULE_DESCRIPTION("phylink models the MAC to optional PHY connection"); 4371