1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * phylink models the MAC to optional PHY connection, supporting 4 * technologies such as SFP cages where the PHY is hot-pluggable. 5 * 6 * Copyright (C) 2015 Russell King 7 */ 8 #include <linux/acpi.h> 9 #include <linux/ethtool.h> 10 #include <linux/export.h> 11 #include <linux/gpio/consumer.h> 12 #include <linux/netdevice.h> 13 #include <linux/of.h> 14 #include <linux/of_mdio.h> 15 #include <linux/phy.h> 16 #include <linux/phy_fixed.h> 17 #include <linux/phylink.h> 18 #include <linux/rtnetlink.h> 19 #include <linux/spinlock.h> 20 #include <linux/timer.h> 21 #include <linux/workqueue.h> 22 23 #include "phy-caps.h" 24 #include "sfp.h" 25 #include "swphy.h" 26 27 enum { 28 PHYLINK_DISABLE_STOPPED, 29 PHYLINK_DISABLE_LINK, 30 PHYLINK_DISABLE_MAC_WOL, 31 32 PCS_STATE_DOWN = 0, 33 PCS_STATE_STARTING, 34 PCS_STATE_STARTED, 35 }; 36 37 /** 38 * struct phylink - internal data type for phylink 39 */ 40 struct phylink { 41 /* private: */ 42 struct net_device *netdev; 43 const struct phylink_mac_ops *mac_ops; 44 struct phylink_config *config; 45 struct phylink_pcs *pcs; 46 struct device *dev; 47 unsigned int old_link_state:1; 48 49 unsigned long phylink_disable_state; /* bitmask of disables */ 50 struct phy_device *phydev; 51 phy_interface_t link_interface; /* PHY_INTERFACE_xxx */ 52 u8 cfg_link_an_mode; /* MLO_AN_xxx */ 53 u8 req_link_an_mode; /* Requested MLO_AN_xxx mode */ 54 u8 act_link_an_mode; /* Active MLO_AN_xxx mode */ 55 u8 link_port; /* The current non-phy ethtool port */ 56 __ETHTOOL_DECLARE_LINK_MODE_MASK(supported); 57 __ETHTOOL_DECLARE_LINK_MODE_MASK(supported_lpi); 58 59 /* The link configuration settings */ 60 struct phylink_link_state link_config; 61 62 /* The current settings */ 63 phy_interface_t cur_interface; 64 65 struct gpio_desc *link_gpio; 66 unsigned int link_irq; 67 struct timer_list link_poll; 68 69 struct mutex state_mutex; 70 /* Serialize updates to pl->phydev with phylink_resolve() */ 71 struct mutex phydev_mutex; 72 struct phylink_link_state phy_state; 73 unsigned int phy_ib_mode; 74 struct work_struct resolve; 75 unsigned int pcs_neg_mode; 76 unsigned int pcs_state; 77 78 bool link_failed; 79 bool suspend_link_up; 80 bool major_config_failed; 81 bool mac_supports_eee_ops; 82 bool mac_supports_eee; 83 bool phy_enable_tx_lpi; 84 bool mac_enable_tx_lpi; 85 bool mac_tx_clk_stop; 86 u32 mac_tx_lpi_timer; 87 u8 mac_rx_clk_stop_blocked; 88 89 struct sfp_bus *sfp_bus; 90 bool sfp_may_have_phy; 91 DECLARE_PHY_INTERFACE_MASK(sfp_interfaces); 92 __ETHTOOL_DECLARE_LINK_MODE_MASK(sfp_support); 93 u8 sfp_port; 94 95 struct eee_config eee_cfg; 96 }; 97 98 #define phylink_printk(level, pl, fmt, ...) \ 99 do { \ 100 if ((pl)->config->type == PHYLINK_NETDEV) \ 101 netdev_printk(level, (pl)->netdev, fmt, ##__VA_ARGS__); \ 102 else if ((pl)->config->type == PHYLINK_DEV) \ 103 dev_printk(level, (pl)->dev, fmt, ##__VA_ARGS__); \ 104 } while (0) 105 106 #define phylink_err(pl, fmt, ...) \ 107 phylink_printk(KERN_ERR, pl, fmt, ##__VA_ARGS__) 108 #define phylink_warn(pl, fmt, ...) \ 109 phylink_printk(KERN_WARNING, pl, fmt, ##__VA_ARGS__) 110 #define phylink_info(pl, fmt, ...) \ 111 phylink_printk(KERN_INFO, pl, fmt, ##__VA_ARGS__) 112 #if defined(CONFIG_DYNAMIC_DEBUG) 113 #define phylink_dbg(pl, fmt, ...) \ 114 do { \ 115 if ((pl)->config->type == PHYLINK_NETDEV) \ 116 netdev_dbg((pl)->netdev, fmt, ##__VA_ARGS__); \ 117 else if ((pl)->config->type == PHYLINK_DEV) \ 118 dev_dbg((pl)->dev, fmt, ##__VA_ARGS__); \ 119 } while (0) 120 #elif defined(DEBUG) 121 #define phylink_dbg(pl, fmt, ...) \ 122 phylink_printk(KERN_DEBUG, pl, fmt, ##__VA_ARGS__) 123 #else 124 #define phylink_dbg(pl, fmt, ...) \ 125 ({ \ 126 if (0) \ 127 phylink_printk(KERN_DEBUG, pl, fmt, ##__VA_ARGS__); \ 128 }) 129 #endif 130 131 static const phy_interface_t phylink_sfp_interface_preference[] = { 132 PHY_INTERFACE_MODE_100GBASEP, 133 PHY_INTERFACE_MODE_50GBASER, 134 PHY_INTERFACE_MODE_LAUI, 135 PHY_INTERFACE_MODE_25GBASER, 136 PHY_INTERFACE_MODE_USXGMII, 137 PHY_INTERFACE_MODE_10GBASER, 138 PHY_INTERFACE_MODE_5GBASER, 139 PHY_INTERFACE_MODE_2500BASEX, 140 PHY_INTERFACE_MODE_SGMII, 141 PHY_INTERFACE_MODE_1000BASEX, 142 PHY_INTERFACE_MODE_100BASEX, 143 }; 144 145 static DECLARE_PHY_INTERFACE_MASK(phylink_sfp_interfaces); 146 147 /** 148 * phylink_set_port_modes() - set the port type modes in the ethtool mask 149 * @mask: ethtool link mode mask 150 * 151 * Sets all the port type modes in the ethtool mask. MAC drivers should 152 * use this in their 'validate' callback. 153 */ 154 void phylink_set_port_modes(unsigned long *mask) 155 { 156 phylink_set(mask, TP); 157 phylink_set(mask, AUI); 158 phylink_set(mask, MII); 159 phylink_set(mask, FIBRE); 160 phylink_set(mask, BNC); 161 phylink_set(mask, Backplane); 162 } 163 EXPORT_SYMBOL_GPL(phylink_set_port_modes); 164 165 static int phylink_is_empty_linkmode(const unsigned long *linkmode) 166 { 167 __ETHTOOL_DECLARE_LINK_MODE_MASK(tmp) = { 0, }; 168 169 phylink_set_port_modes(tmp); 170 phylink_set(tmp, Autoneg); 171 phylink_set(tmp, Pause); 172 phylink_set(tmp, Asym_Pause); 173 174 return linkmode_subset(linkmode, tmp); 175 } 176 177 static const char *phylink_an_mode_str(unsigned int mode) 178 { 179 static const char *modestr[] = { 180 [MLO_AN_PHY] = "phy", 181 [MLO_AN_FIXED] = "fixed", 182 [MLO_AN_INBAND] = "inband", 183 }; 184 185 return mode < ARRAY_SIZE(modestr) ? modestr[mode] : "unknown"; 186 } 187 188 static const char *phylink_pcs_mode_str(unsigned int mode) 189 { 190 if (!mode) 191 return "none"; 192 193 if (mode & PHYLINK_PCS_NEG_OUTBAND) 194 return "outband"; 195 196 if (mode & PHYLINK_PCS_NEG_INBAND) { 197 if (mode & PHYLINK_PCS_NEG_ENABLED) 198 return "inband,an-enabled"; 199 else 200 return "inband,an-disabled"; 201 } 202 203 return "unknown"; 204 } 205 206 static unsigned int phylink_interface_signal_rate(phy_interface_t interface) 207 { 208 switch (interface) { 209 case PHY_INTERFACE_MODE_SGMII: 210 case PHY_INTERFACE_MODE_1000BASEX: /* 1.25Mbd */ 211 return 1250; 212 case PHY_INTERFACE_MODE_2500BASEX: /* 3.125Mbd */ 213 return 3125; 214 case PHY_INTERFACE_MODE_5GBASER: /* 5.15625Mbd */ 215 return 5156; 216 case PHY_INTERFACE_MODE_10GBASER: /* 10.3125Mbd */ 217 return 10313; 218 default: 219 return 0; 220 } 221 } 222 223 /** 224 * phylink_interface_max_speed() - get the maximum speed of a phy interface 225 * @interface: phy interface mode defined by &typedef phy_interface_t 226 * 227 * Determine the maximum speed of a phy interface. This is intended to help 228 * determine the correct speed to pass to the MAC when the phy is performing 229 * rate matching. 230 * 231 * Return: The maximum speed of @interface 232 */ 233 static int phylink_interface_max_speed(phy_interface_t interface) 234 { 235 switch (interface) { 236 case PHY_INTERFACE_MODE_100BASEX: 237 case PHY_INTERFACE_MODE_REVRMII: 238 case PHY_INTERFACE_MODE_RMII: 239 case PHY_INTERFACE_MODE_SMII: 240 case PHY_INTERFACE_MODE_REVMII: 241 case PHY_INTERFACE_MODE_MII: 242 case PHY_INTERFACE_MODE_MIILITE: 243 return SPEED_100; 244 245 case PHY_INTERFACE_MODE_TBI: 246 case PHY_INTERFACE_MODE_MOCA: 247 case PHY_INTERFACE_MODE_RTBI: 248 case PHY_INTERFACE_MODE_1000BASEX: 249 case PHY_INTERFACE_MODE_1000BASEKX: 250 case PHY_INTERFACE_MODE_TRGMII: 251 case PHY_INTERFACE_MODE_RGMII_TXID: 252 case PHY_INTERFACE_MODE_RGMII_RXID: 253 case PHY_INTERFACE_MODE_RGMII_ID: 254 case PHY_INTERFACE_MODE_RGMII: 255 case PHY_INTERFACE_MODE_PSGMII: 256 case PHY_INTERFACE_MODE_QSGMII: 257 case PHY_INTERFACE_MODE_QUSGMII: 258 case PHY_INTERFACE_MODE_SGMII: 259 case PHY_INTERFACE_MODE_GMII: 260 return SPEED_1000; 261 262 case PHY_INTERFACE_MODE_2500BASEX: 263 case PHY_INTERFACE_MODE_10G_QXGMII: 264 return SPEED_2500; 265 266 case PHY_INTERFACE_MODE_5GBASER: 267 return SPEED_5000; 268 269 case PHY_INTERFACE_MODE_XGMII: 270 case PHY_INTERFACE_MODE_RXAUI: 271 case PHY_INTERFACE_MODE_XAUI: 272 case PHY_INTERFACE_MODE_10GBASER: 273 case PHY_INTERFACE_MODE_10GKR: 274 case PHY_INTERFACE_MODE_USXGMII: 275 return SPEED_10000; 276 277 case PHY_INTERFACE_MODE_25GBASER: 278 return SPEED_25000; 279 280 case PHY_INTERFACE_MODE_XLGMII: 281 return SPEED_40000; 282 283 case PHY_INTERFACE_MODE_50GBASER: 284 case PHY_INTERFACE_MODE_LAUI: 285 return SPEED_50000; 286 287 case PHY_INTERFACE_MODE_100GBASEP: 288 return SPEED_100000; 289 290 case PHY_INTERFACE_MODE_INTERNAL: 291 case PHY_INTERFACE_MODE_NA: 292 case PHY_INTERFACE_MODE_MAX: 293 /* No idea! Garbage in, unknown out */ 294 return SPEED_UNKNOWN; 295 } 296 297 /* If we get here, someone forgot to add an interface mode above */ 298 WARN_ON_ONCE(1); 299 return SPEED_UNKNOWN; 300 } 301 302 static struct { 303 unsigned long mask; 304 int speed; 305 unsigned int duplex; 306 unsigned int caps_bit; 307 } phylink_caps_params[] = { 308 { MAC_400000FD, SPEED_400000, DUPLEX_FULL, BIT(LINK_CAPA_400000FD) }, 309 { MAC_200000FD, SPEED_200000, DUPLEX_FULL, BIT(LINK_CAPA_200000FD) }, 310 { MAC_100000FD, SPEED_100000, DUPLEX_FULL, BIT(LINK_CAPA_100000FD) }, 311 { MAC_56000FD, SPEED_56000, DUPLEX_FULL, BIT(LINK_CAPA_56000FD) }, 312 { MAC_50000FD, SPEED_50000, DUPLEX_FULL, BIT(LINK_CAPA_50000FD) }, 313 { MAC_40000FD, SPEED_40000, DUPLEX_FULL, BIT(LINK_CAPA_40000FD) }, 314 { MAC_25000FD, SPEED_25000, DUPLEX_FULL, BIT(LINK_CAPA_25000FD) }, 315 { MAC_20000FD, SPEED_20000, DUPLEX_FULL, BIT(LINK_CAPA_20000FD) }, 316 { MAC_10000FD, SPEED_10000, DUPLEX_FULL, BIT(LINK_CAPA_10000FD) }, 317 { MAC_5000FD, SPEED_5000, DUPLEX_FULL, BIT(LINK_CAPA_5000FD) }, 318 { MAC_2500FD, SPEED_2500, DUPLEX_FULL, BIT(LINK_CAPA_2500FD) }, 319 { MAC_1000FD, SPEED_1000, DUPLEX_FULL, BIT(LINK_CAPA_1000FD) }, 320 { MAC_1000HD, SPEED_1000, DUPLEX_HALF, BIT(LINK_CAPA_1000HD) }, 321 { MAC_100FD, SPEED_100, DUPLEX_FULL, BIT(LINK_CAPA_100FD) }, 322 { MAC_100HD, SPEED_100, DUPLEX_HALF, BIT(LINK_CAPA_100HD) }, 323 { MAC_10FD, SPEED_10, DUPLEX_FULL, BIT(LINK_CAPA_10FD) }, 324 { MAC_10HD, SPEED_10, DUPLEX_HALF, BIT(LINK_CAPA_10HD) }, 325 }; 326 327 /** 328 * phylink_caps_to_link_caps() - Convert a set of MAC capabilities LINK caps 329 * @caps: A set of MAC capabilities 330 * 331 * Returns: The corresponding set of LINK_CAPA as defined in phy-caps.h 332 */ 333 static unsigned long phylink_caps_to_link_caps(unsigned long caps) 334 { 335 unsigned long link_caps = 0; 336 int i; 337 338 for (i = 0; i < ARRAY_SIZE(phylink_caps_params); i++) 339 if (caps & phylink_caps_params[i].mask) 340 link_caps |= phylink_caps_params[i].caps_bit; 341 342 return link_caps; 343 } 344 345 static unsigned long phylink_link_caps_to_mac_caps(unsigned long link_caps) 346 { 347 unsigned long caps = 0; 348 int i; 349 350 for (i = 0; i < ARRAY_SIZE(phylink_caps_params); i++) 351 if (link_caps & phylink_caps_params[i].caps_bit) 352 caps |= phylink_caps_params[i].mask; 353 354 return caps; 355 } 356 357 /** 358 * phylink_caps_to_linkmodes() - Convert capabilities to ethtool link modes 359 * @linkmodes: ethtool linkmode mask (must be already initialised) 360 * @caps: bitmask of MAC capabilities 361 * 362 * Set all possible pause, speed and duplex linkmodes in @linkmodes that are 363 * supported by the @caps. @linkmodes must have been initialised previously. 364 */ 365 static void phylink_caps_to_linkmodes(unsigned long *linkmodes, 366 unsigned long caps) 367 { 368 unsigned long link_caps = phylink_caps_to_link_caps(caps); 369 370 if (caps & MAC_SYM_PAUSE) 371 __set_bit(ETHTOOL_LINK_MODE_Pause_BIT, linkmodes); 372 373 if (caps & MAC_ASYM_PAUSE) 374 __set_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, linkmodes); 375 376 phy_caps_linkmodes(link_caps, linkmodes); 377 } 378 379 /** 380 * phylink_limit_mac_speed - limit the phylink_config to a maximum speed 381 * @config: pointer to a &struct phylink_config 382 * @max_speed: maximum speed 383 * 384 * Mask off MAC capabilities for speeds higher than the @max_speed parameter. 385 * Any further motifications of config.mac_capabilities will override this. 386 */ 387 void phylink_limit_mac_speed(struct phylink_config *config, u32 max_speed) 388 { 389 int i; 390 391 for (i = 0; i < ARRAY_SIZE(phylink_caps_params) && 392 phylink_caps_params[i].speed > max_speed; i++) 393 config->mac_capabilities &= ~phylink_caps_params[i].mask; 394 } 395 EXPORT_SYMBOL_GPL(phylink_limit_mac_speed); 396 397 /** 398 * phylink_cap_from_speed_duplex - Get mac capability from speed/duplex 399 * @speed: the speed to search for 400 * @duplex: the duplex to search for 401 * 402 * Find the mac capability for a given speed and duplex. 403 * 404 * Return: A mask with the mac capability patching @speed and @duplex, or 0 if 405 * there were no matches. 406 */ 407 static unsigned long phylink_cap_from_speed_duplex(int speed, 408 unsigned int duplex) 409 { 410 int i; 411 412 for (i = 0; i < ARRAY_SIZE(phylink_caps_params); i++) { 413 if (speed == phylink_caps_params[i].speed && 414 duplex == phylink_caps_params[i].duplex) 415 return phylink_caps_params[i].mask; 416 } 417 418 return 0; 419 } 420 421 /** 422 * phylink_get_capabilities() - get capabilities for a given MAC 423 * @interface: phy interface mode defined by &typedef phy_interface_t 424 * @mac_capabilities: bitmask of MAC capabilities 425 * @rate_matching: type of rate matching being performed 426 * 427 * Get the MAC capabilities that are supported by the @interface mode and 428 * @mac_capabilities. 429 */ 430 static unsigned long phylink_get_capabilities(phy_interface_t interface, 431 unsigned long mac_capabilities, 432 int rate_matching) 433 { 434 unsigned long link_caps = phy_caps_from_interface(interface); 435 int max_speed = phylink_interface_max_speed(interface); 436 unsigned long caps = MAC_SYM_PAUSE | MAC_ASYM_PAUSE; 437 unsigned long matched_caps = 0; 438 439 caps |= phylink_link_caps_to_mac_caps(link_caps); 440 441 switch (rate_matching) { 442 case RATE_MATCH_OPEN_LOOP: 443 /* TODO */ 444 fallthrough; 445 case RATE_MATCH_NONE: 446 matched_caps = 0; 447 break; 448 case RATE_MATCH_PAUSE: { 449 /* The MAC must support asymmetric pause towards the local 450 * device for this. We could allow just symmetric pause, but 451 * then we might have to renegotiate if the link partner 452 * doesn't support pause. This is because there's no way to 453 * accept pause frames without transmitting them if we only 454 * support symmetric pause. 455 */ 456 if (!(mac_capabilities & MAC_SYM_PAUSE) || 457 !(mac_capabilities & MAC_ASYM_PAUSE)) 458 break; 459 460 /* We can't adapt if the MAC doesn't support the interface's 461 * max speed at full duplex. 462 */ 463 if (mac_capabilities & 464 phylink_cap_from_speed_duplex(max_speed, DUPLEX_FULL)) 465 matched_caps = GENMASK(__fls(caps), __fls(MAC_10HD)); 466 break; 467 } 468 case RATE_MATCH_CRS: 469 /* The MAC must support half duplex at the interface's max 470 * speed. 471 */ 472 if (mac_capabilities & 473 phylink_cap_from_speed_duplex(max_speed, DUPLEX_HALF)) { 474 matched_caps = GENMASK(__fls(caps), __fls(MAC_10HD)); 475 matched_caps &= mac_capabilities; 476 } 477 break; 478 } 479 480 return (caps & mac_capabilities) | matched_caps; 481 } 482 483 /** 484 * phylink_validate_mask_caps() - Restrict link modes based on caps 485 * @supported: ethtool bitmask for supported link modes. 486 * @state: pointer to a &struct phylink_link_state. 487 * @mac_capabilities: bitmask of MAC capabilities 488 * 489 * Calculate the supported link modes based on @mac_capabilities, and restrict 490 * @supported and @state based on that. Use this function if your capabiliies 491 * aren't constant, such as if they vary depending on the interface. 492 */ 493 static void phylink_validate_mask_caps(unsigned long *supported, 494 struct phylink_link_state *state, 495 unsigned long mac_capabilities) 496 { 497 __ETHTOOL_DECLARE_LINK_MODE_MASK(mask) = { 0, }; 498 unsigned long caps; 499 500 phylink_set_port_modes(mask); 501 phylink_set(mask, Autoneg); 502 caps = phylink_get_capabilities(state->interface, mac_capabilities, 503 state->rate_matching); 504 phylink_caps_to_linkmodes(mask, caps); 505 506 linkmode_and(supported, supported, mask); 507 linkmode_and(state->advertising, state->advertising, mask); 508 } 509 510 static int phylink_validate_mac_and_pcs(struct phylink *pl, 511 unsigned long *supported, 512 struct phylink_link_state *state) 513 { 514 struct phylink_pcs *pcs = NULL; 515 unsigned long capabilities; 516 int ret; 517 518 /* Get the PCS for this interface mode */ 519 if (pl->mac_ops->mac_select_pcs) { 520 pcs = pl->mac_ops->mac_select_pcs(pl->config, state->interface); 521 if (IS_ERR(pcs)) 522 return PTR_ERR(pcs); 523 } 524 525 if (pcs) { 526 /* The PCS, if present, must be setup before phylink_create() 527 * has been called. If the ops is not initialised, print an 528 * error and backtrace rather than oopsing the kernel. 529 */ 530 if (!pcs->ops) { 531 phylink_err(pl, "interface %s: uninitialised PCS\n", 532 phy_modes(state->interface)); 533 dump_stack(); 534 return -EINVAL; 535 } 536 537 /* Ensure that this PCS supports the interface which the MAC 538 * returned it for. It is an error for the MAC to return a PCS 539 * that does not support the interface mode. 540 */ 541 if (!phy_interface_empty(pcs->supported_interfaces) && 542 !test_bit(state->interface, pcs->supported_interfaces)) { 543 phylink_err(pl, "MAC returned PCS which does not support %s\n", 544 phy_modes(state->interface)); 545 return -EINVAL; 546 } 547 548 /* Validate the link parameters with the PCS */ 549 if (pcs->ops->pcs_validate) { 550 ret = pcs->ops->pcs_validate(pcs, supported, state); 551 if (ret < 0 || phylink_is_empty_linkmode(supported)) 552 return -EINVAL; 553 554 /* Ensure the advertising mask is a subset of the 555 * supported mask. 556 */ 557 linkmode_and(state->advertising, state->advertising, 558 supported); 559 } 560 } 561 562 /* Then validate the link parameters with the MAC */ 563 if (pl->mac_ops->mac_get_caps) 564 capabilities = pl->mac_ops->mac_get_caps(pl->config, 565 state->interface); 566 else 567 capabilities = pl->config->mac_capabilities; 568 569 phylink_validate_mask_caps(supported, state, capabilities); 570 571 return phylink_is_empty_linkmode(supported) ? -EINVAL : 0; 572 } 573 574 static void phylink_validate_one(struct phylink *pl, struct phy_device *phy, 575 const unsigned long *supported, 576 const struct phylink_link_state *state, 577 phy_interface_t interface, 578 unsigned long *accum_supported, 579 unsigned long *accum_advertising) 580 { 581 __ETHTOOL_DECLARE_LINK_MODE_MASK(tmp_supported); 582 struct phylink_link_state tmp_state; 583 584 linkmode_copy(tmp_supported, supported); 585 586 tmp_state = *state; 587 tmp_state.interface = interface; 588 589 if (phy) 590 tmp_state.rate_matching = phy_get_rate_matching(phy, interface); 591 592 if (!phylink_validate_mac_and_pcs(pl, tmp_supported, &tmp_state)) { 593 phylink_dbg(pl, " interface %u (%s) rate match %s supports %*pbl\n", 594 interface, phy_modes(interface), 595 phy_rate_matching_to_str(tmp_state.rate_matching), 596 __ETHTOOL_LINK_MODE_MASK_NBITS, tmp_supported); 597 598 linkmode_or(accum_supported, accum_supported, tmp_supported); 599 linkmode_or(accum_advertising, accum_advertising, 600 tmp_state.advertising); 601 } 602 } 603 604 static int phylink_validate_mask(struct phylink *pl, struct phy_device *phy, 605 unsigned long *supported, 606 struct phylink_link_state *state, 607 const unsigned long *interfaces) 608 { 609 __ETHTOOL_DECLARE_LINK_MODE_MASK(all_adv) = { 0, }; 610 __ETHTOOL_DECLARE_LINK_MODE_MASK(all_s) = { 0, }; 611 int interface; 612 613 for_each_set_bit(interface, interfaces, PHY_INTERFACE_MODE_MAX) 614 phylink_validate_one(pl, phy, supported, state, interface, 615 all_s, all_adv); 616 617 linkmode_copy(supported, all_s); 618 linkmode_copy(state->advertising, all_adv); 619 620 return phylink_is_empty_linkmode(supported) ? -EINVAL : 0; 621 } 622 623 static int phylink_validate(struct phylink *pl, unsigned long *supported, 624 struct phylink_link_state *state) 625 { 626 const unsigned long *interfaces = pl->config->supported_interfaces; 627 628 if (state->interface == PHY_INTERFACE_MODE_NA) 629 return phylink_validate_mask(pl, NULL, supported, state, 630 interfaces); 631 632 if (!test_bit(state->interface, interfaces)) 633 return -EINVAL; 634 635 return phylink_validate_mac_and_pcs(pl, supported, state); 636 } 637 638 static void phylink_fill_fixedlink_supported(unsigned long *supported) 639 { 640 linkmode_set_bit(ETHTOOL_LINK_MODE_10baseT_Half_BIT, supported); 641 linkmode_set_bit(ETHTOOL_LINK_MODE_10baseT_Full_BIT, supported); 642 linkmode_set_bit(ETHTOOL_LINK_MODE_100baseT_Half_BIT, supported); 643 linkmode_set_bit(ETHTOOL_LINK_MODE_100baseT_Full_BIT, supported); 644 linkmode_set_bit(ETHTOOL_LINK_MODE_1000baseT_Half_BIT, supported); 645 linkmode_set_bit(ETHTOOL_LINK_MODE_1000baseT_Full_BIT, supported); 646 linkmode_set_bit(ETHTOOL_LINK_MODE_2500baseT_Full_BIT, supported); 647 linkmode_set_bit(ETHTOOL_LINK_MODE_5000baseT_Full_BIT, supported); 648 linkmode_set_bit(ETHTOOL_LINK_MODE_10000baseT_Full_BIT, supported); 649 } 650 651 static int phylink_parse_fixedlink(struct phylink *pl, 652 const struct fwnode_handle *fwnode) 653 { 654 __ETHTOOL_DECLARE_LINK_MODE_MASK(match) = { 0, }; 655 __ETHTOOL_DECLARE_LINK_MODE_MASK(mask) = { 0, }; 656 const struct link_capabilities *c; 657 struct fwnode_handle *fixed_node; 658 struct gpio_desc *desc; 659 u32 speed; 660 int ret; 661 662 fixed_node = fwnode_get_named_child_node(fwnode, "fixed-link"); 663 if (fixed_node) { 664 ret = fwnode_property_read_u32(fixed_node, "speed", &speed); 665 666 pl->link_config.speed = speed; 667 pl->link_config.duplex = DUPLEX_HALF; 668 669 if (fwnode_property_read_bool(fixed_node, "full-duplex")) 670 pl->link_config.duplex = DUPLEX_FULL; 671 672 /* We treat the "pause" and "asym-pause" terminology as 673 * defining the link partner's ability. 674 */ 675 if (fwnode_property_read_bool(fixed_node, "pause")) 676 __set_bit(ETHTOOL_LINK_MODE_Pause_BIT, 677 pl->link_config.lp_advertising); 678 if (fwnode_property_read_bool(fixed_node, "asym-pause")) 679 __set_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, 680 pl->link_config.lp_advertising); 681 682 if (ret == 0) { 683 desc = fwnode_gpiod_get_index(fixed_node, "link", 0, 684 GPIOD_IN, "?"); 685 686 if (!IS_ERR(desc)) 687 pl->link_gpio = desc; 688 else if (desc == ERR_PTR(-EPROBE_DEFER)) 689 ret = -EPROBE_DEFER; 690 } 691 fwnode_handle_put(fixed_node); 692 693 if (ret) 694 return ret; 695 } else { 696 u32 prop[5]; 697 698 ret = fwnode_property_read_u32_array(fwnode, "fixed-link", 699 NULL, 0); 700 if (ret != ARRAY_SIZE(prop)) { 701 phylink_err(pl, "broken fixed-link?\n"); 702 return -EINVAL; 703 } 704 705 phylink_warn(pl, "%pfw uses deprecated array-style fixed-link binding!\n", 706 fwnode); 707 708 ret = fwnode_property_read_u32_array(fwnode, "fixed-link", 709 prop, ARRAY_SIZE(prop)); 710 if (!ret) { 711 pl->link_config.duplex = prop[1] ? 712 DUPLEX_FULL : DUPLEX_HALF; 713 pl->link_config.speed = prop[2]; 714 if (prop[3]) 715 __set_bit(ETHTOOL_LINK_MODE_Pause_BIT, 716 pl->link_config.lp_advertising); 717 if (prop[4]) 718 __set_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, 719 pl->link_config.lp_advertising); 720 } 721 } 722 723 if (pl->link_config.speed > SPEED_1000 && 724 pl->link_config.duplex != DUPLEX_FULL) 725 phylink_warn(pl, "fixed link specifies half duplex for %dMbps link?\n", 726 pl->link_config.speed); 727 728 linkmode_zero(pl->supported); 729 phylink_fill_fixedlink_supported(pl->supported); 730 731 linkmode_copy(pl->link_config.advertising, pl->supported); 732 phylink_validate(pl, pl->supported, &pl->link_config); 733 734 c = phy_caps_lookup(pl->link_config.speed, pl->link_config.duplex, 735 pl->supported, true); 736 if (c) 737 linkmode_and(match, pl->supported, c->linkmodes); 738 739 linkmode_set_bit(ETHTOOL_LINK_MODE_Pause_BIT, mask); 740 linkmode_set_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, mask); 741 linkmode_set_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, mask); 742 linkmode_and(pl->supported, pl->supported, mask); 743 744 phylink_set(pl->supported, MII); 745 746 if (c) { 747 linkmode_or(pl->supported, pl->supported, match); 748 linkmode_or(pl->link_config.lp_advertising, 749 pl->link_config.lp_advertising, match); 750 } else { 751 phylink_warn(pl, "fixed link %s duplex %dMbps not recognised\n", 752 pl->link_config.duplex == DUPLEX_FULL ? "full" : "half", 753 pl->link_config.speed); 754 } 755 756 linkmode_and(pl->link_config.advertising, pl->link_config.advertising, 757 pl->supported); 758 759 pl->link_config.link = 1; 760 pl->link_config.an_complete = 1; 761 762 return 0; 763 } 764 765 static int phylink_parse_mode(struct phylink *pl, 766 const struct fwnode_handle *fwnode) 767 { 768 struct fwnode_handle *dn; 769 const char *managed; 770 unsigned long caps; 771 772 if (pl->config->default_an_inband) 773 pl->cfg_link_an_mode = MLO_AN_INBAND; 774 775 dn = fwnode_get_named_child_node(fwnode, "fixed-link"); 776 if (dn || fwnode_property_present(fwnode, "fixed-link")) 777 pl->cfg_link_an_mode = MLO_AN_FIXED; 778 fwnode_handle_put(dn); 779 780 if ((fwnode_property_read_string(fwnode, "managed", &managed) == 0 && 781 strcmp(managed, "in-band-status") == 0)) { 782 if (pl->cfg_link_an_mode == MLO_AN_FIXED) { 783 phylink_err(pl, 784 "can't use both fixed-link and in-band-status\n"); 785 return -EINVAL; 786 } 787 788 pl->cfg_link_an_mode = MLO_AN_INBAND; 789 } 790 791 if (pl->cfg_link_an_mode == MLO_AN_INBAND) { 792 linkmode_zero(pl->supported); 793 phylink_set(pl->supported, MII); 794 phylink_set(pl->supported, Autoneg); 795 phylink_set(pl->supported, Asym_Pause); 796 phylink_set(pl->supported, Pause); 797 798 switch (pl->link_config.interface) { 799 case PHY_INTERFACE_MODE_SGMII: 800 case PHY_INTERFACE_MODE_PSGMII: 801 case PHY_INTERFACE_MODE_QSGMII: 802 case PHY_INTERFACE_MODE_QUSGMII: 803 case PHY_INTERFACE_MODE_RGMII: 804 case PHY_INTERFACE_MODE_RGMII_ID: 805 case PHY_INTERFACE_MODE_RGMII_RXID: 806 case PHY_INTERFACE_MODE_RGMII_TXID: 807 case PHY_INTERFACE_MODE_RTBI: 808 case PHY_INTERFACE_MODE_1000BASEX: 809 case PHY_INTERFACE_MODE_2500BASEX: 810 case PHY_INTERFACE_MODE_5GBASER: 811 case PHY_INTERFACE_MODE_25GBASER: 812 case PHY_INTERFACE_MODE_USXGMII: 813 case PHY_INTERFACE_MODE_10G_QXGMII: 814 case PHY_INTERFACE_MODE_10GKR: 815 case PHY_INTERFACE_MODE_10GBASER: 816 case PHY_INTERFACE_MODE_XLGMII: 817 case PHY_INTERFACE_MODE_50GBASER: 818 case PHY_INTERFACE_MODE_LAUI: 819 case PHY_INTERFACE_MODE_100GBASEP: 820 caps = ~(MAC_SYM_PAUSE | MAC_ASYM_PAUSE); 821 caps = phylink_get_capabilities(pl->link_config.interface, caps, 822 RATE_MATCH_NONE); 823 phylink_caps_to_linkmodes(pl->supported, caps); 824 break; 825 826 default: 827 phylink_err(pl, 828 "incorrect link mode %s for in-band status\n", 829 phy_modes(pl->link_config.interface)); 830 return -EINVAL; 831 } 832 833 linkmode_copy(pl->link_config.advertising, pl->supported); 834 835 if (phylink_validate(pl, pl->supported, &pl->link_config)) { 836 phylink_err(pl, 837 "failed to validate link configuration for in-band status\n"); 838 return -EINVAL; 839 } 840 } 841 842 return 0; 843 } 844 845 static void phylink_apply_manual_flow(struct phylink *pl, 846 struct phylink_link_state *state) 847 { 848 /* If autoneg is disabled, pause AN is also disabled */ 849 if (!linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, 850 state->advertising)) 851 state->pause &= ~MLO_PAUSE_AN; 852 853 /* Manual configuration of pause modes */ 854 if (!(pl->link_config.pause & MLO_PAUSE_AN)) 855 state->pause = pl->link_config.pause; 856 } 857 858 static void phylink_resolve_an_pause(struct phylink_link_state *state) 859 { 860 bool tx_pause, rx_pause; 861 862 if (state->duplex == DUPLEX_FULL) { 863 linkmode_resolve_pause(state->advertising, 864 state->lp_advertising, 865 &tx_pause, &rx_pause); 866 if (tx_pause) 867 state->pause |= MLO_PAUSE_TX; 868 if (rx_pause) 869 state->pause |= MLO_PAUSE_RX; 870 } 871 } 872 873 static unsigned int phylink_pcs_inband_caps(struct phylink_pcs *pcs, 874 phy_interface_t interface) 875 { 876 if (pcs && pcs->ops->pcs_inband_caps) 877 return pcs->ops->pcs_inband_caps(pcs, interface); 878 879 return 0; 880 } 881 882 static void phylink_pcs_pre_config(struct phylink_pcs *pcs, 883 phy_interface_t interface) 884 { 885 if (pcs && pcs->ops->pcs_pre_config) 886 pcs->ops->pcs_pre_config(pcs, interface); 887 } 888 889 static int phylink_pcs_post_config(struct phylink_pcs *pcs, 890 phy_interface_t interface) 891 { 892 int err = 0; 893 894 if (pcs && pcs->ops->pcs_post_config) 895 err = pcs->ops->pcs_post_config(pcs, interface); 896 897 return err; 898 } 899 900 static void phylink_pcs_disable(struct phylink_pcs *pcs) 901 { 902 if (pcs && pcs->ops->pcs_disable) 903 pcs->ops->pcs_disable(pcs); 904 } 905 906 static int phylink_pcs_enable(struct phylink_pcs *pcs) 907 { 908 int err = 0; 909 910 if (pcs && pcs->ops->pcs_enable) 911 err = pcs->ops->pcs_enable(pcs); 912 913 return err; 914 } 915 916 static int phylink_pcs_config(struct phylink_pcs *pcs, unsigned int neg_mode, 917 const struct phylink_link_state *state, 918 bool permit_pause_to_mac) 919 { 920 if (!pcs) 921 return 0; 922 923 return pcs->ops->pcs_config(pcs, neg_mode, state->interface, 924 state->advertising, permit_pause_to_mac); 925 } 926 927 static void phylink_pcs_link_up(struct phylink_pcs *pcs, unsigned int neg_mode, 928 phy_interface_t interface, int speed, 929 int duplex) 930 { 931 if (pcs && pcs->ops->pcs_link_up) 932 pcs->ops->pcs_link_up(pcs, neg_mode, interface, speed, duplex); 933 } 934 935 static void phylink_pcs_disable_eee(struct phylink_pcs *pcs) 936 { 937 if (pcs && pcs->ops->pcs_disable_eee) 938 pcs->ops->pcs_disable_eee(pcs); 939 } 940 941 static void phylink_pcs_enable_eee(struct phylink_pcs *pcs) 942 { 943 if (pcs && pcs->ops->pcs_enable_eee) 944 pcs->ops->pcs_enable_eee(pcs); 945 } 946 947 /* Query inband for a specific interface mode, asking the MAC for the 948 * PCS which will be used to handle the interface mode. 949 */ 950 static unsigned int phylink_inband_caps(struct phylink *pl, 951 phy_interface_t interface) 952 { 953 struct phylink_pcs *pcs; 954 955 if (!pl->mac_ops->mac_select_pcs) 956 return 0; 957 958 pcs = pl->mac_ops->mac_select_pcs(pl->config, interface); 959 if (!pcs) 960 return 0; 961 962 return phylink_pcs_inband_caps(pcs, interface); 963 } 964 965 static void phylink_pcs_poll_stop(struct phylink *pl) 966 { 967 if (pl->cfg_link_an_mode == MLO_AN_INBAND) 968 timer_delete(&pl->link_poll); 969 } 970 971 static void phylink_pcs_poll_start(struct phylink *pl) 972 { 973 if (pl->pcs && pl->pcs->poll && pl->cfg_link_an_mode == MLO_AN_INBAND) 974 mod_timer(&pl->link_poll, jiffies + HZ); 975 } 976 977 int phylink_pcs_pre_init(struct phylink *pl, struct phylink_pcs *pcs) 978 { 979 int ret = 0; 980 981 /* Signal to PCS driver that MAC requires RX clock for init */ 982 if (pl->config->mac_requires_rxc) 983 pcs->rxc_always_on = true; 984 985 if (pcs->ops->pcs_pre_init) 986 ret = pcs->ops->pcs_pre_init(pcs); 987 988 return ret; 989 } 990 EXPORT_SYMBOL_GPL(phylink_pcs_pre_init); 991 992 static void phylink_mac_config(struct phylink *pl, 993 const struct phylink_link_state *state) 994 { 995 struct phylink_link_state st = *state; 996 997 /* Stop drivers incorrectly using these */ 998 linkmode_zero(st.lp_advertising); 999 st.speed = SPEED_UNKNOWN; 1000 st.duplex = DUPLEX_UNKNOWN; 1001 st.an_complete = false; 1002 st.link = false; 1003 1004 phylink_dbg(pl, 1005 "%s: mode=%s/%s/%s adv=%*pb pause=%02x\n", 1006 __func__, phylink_an_mode_str(pl->act_link_an_mode), 1007 phy_modes(st.interface), 1008 phy_rate_matching_to_str(st.rate_matching), 1009 __ETHTOOL_LINK_MODE_MASK_NBITS, st.advertising, 1010 st.pause); 1011 1012 pl->mac_ops->mac_config(pl->config, pl->act_link_an_mode, &st); 1013 } 1014 1015 static void phylink_pcs_an_restart(struct phylink *pl) 1016 { 1017 if (pl->pcs && linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, 1018 pl->link_config.advertising) && 1019 phy_interface_mode_is_8023z(pl->link_config.interface) && 1020 phylink_autoneg_inband(pl->act_link_an_mode)) 1021 pl->pcs->ops->pcs_an_restart(pl->pcs); 1022 } 1023 1024 enum inband_type { 1025 INBAND_NONE, 1026 INBAND_CISCO_SGMII, 1027 INBAND_BASEX, 1028 }; 1029 1030 static enum inband_type phylink_get_inband_type(phy_interface_t interface) 1031 { 1032 switch (interface) { 1033 case PHY_INTERFACE_MODE_SGMII: 1034 case PHY_INTERFACE_MODE_QSGMII: 1035 case PHY_INTERFACE_MODE_QUSGMII: 1036 case PHY_INTERFACE_MODE_USXGMII: 1037 case PHY_INTERFACE_MODE_10G_QXGMII: 1038 /* These protocols are designed for use with a PHY which 1039 * communicates its negotiation result back to the MAC via 1040 * inband communication. Note: there exist PHYs that run 1041 * with SGMII but do not send the inband data. 1042 */ 1043 return INBAND_CISCO_SGMII; 1044 1045 case PHY_INTERFACE_MODE_1000BASEX: 1046 case PHY_INTERFACE_MODE_2500BASEX: 1047 /* 1000base-X is designed for use media-side for Fibre 1048 * connections, and thus the Autoneg bit needs to be 1049 * taken into account. We also do this for 2500base-X 1050 * as well, but drivers may not support this, so may 1051 * need to override this. 1052 */ 1053 return INBAND_BASEX; 1054 1055 default: 1056 return INBAND_NONE; 1057 } 1058 } 1059 1060 /** 1061 * phylink_pcs_neg_mode() - helper to determine PCS inband mode 1062 * @pl: a pointer to a &struct phylink returned from phylink_create() 1063 * @pcs: a pointer to &struct phylink_pcs 1064 * @interface: interface mode to be used 1065 * @advertising: adertisement ethtool link mode mask 1066 * 1067 * Determines the negotiation mode to be used by the PCS, and returns 1068 * one of: 1069 * 1070 * - %PHYLINK_PCS_NEG_NONE: interface mode does not support inband 1071 * - %PHYLINK_PCS_NEG_OUTBAND: an out of band mode (e.g. reading the PHY) 1072 * will be used. 1073 * - %PHYLINK_PCS_NEG_INBAND_DISABLED: inband mode selected but autoneg 1074 * disabled 1075 * - %PHYLINK_PCS_NEG_INBAND_ENABLED: inband mode selected and autoneg enabled 1076 * 1077 * Note: this is for cases where the PCS itself is involved in negotiation 1078 * (e.g. Clause 37, SGMII and similar) not Clause 73. 1079 */ 1080 static void phylink_pcs_neg_mode(struct phylink *pl, struct phylink_pcs *pcs, 1081 phy_interface_t interface, 1082 const unsigned long *advertising) 1083 { 1084 unsigned int pcs_ib_caps = 0; 1085 unsigned int phy_ib_caps = 0; 1086 unsigned int neg_mode, mode; 1087 enum inband_type type; 1088 1089 type = phylink_get_inband_type(interface); 1090 if (type == INBAND_NONE) { 1091 pl->pcs_neg_mode = PHYLINK_PCS_NEG_NONE; 1092 pl->act_link_an_mode = pl->req_link_an_mode; 1093 return; 1094 } 1095 1096 mode = pl->req_link_an_mode; 1097 1098 pl->phy_ib_mode = 0; 1099 1100 if (pcs) 1101 pcs_ib_caps = phylink_pcs_inband_caps(pcs, interface); 1102 1103 if (pl->phydev) 1104 phy_ib_caps = phy_inband_caps(pl->phydev, interface); 1105 1106 phylink_dbg(pl, "interface %s inband modes: pcs=%02x phy=%02x\n", 1107 phy_modes(interface), pcs_ib_caps, phy_ib_caps); 1108 1109 if (!phylink_autoneg_inband(mode)) { 1110 bool pcs_ib_only = false; 1111 bool phy_ib_only = false; 1112 1113 if (pcs_ib_caps && pcs_ib_caps != LINK_INBAND_DISABLE) { 1114 /* PCS supports reporting in-band capabilities, and 1115 * supports more than disable mode. 1116 */ 1117 if (pcs_ib_caps & LINK_INBAND_DISABLE) 1118 neg_mode = PHYLINK_PCS_NEG_OUTBAND; 1119 else if (pcs_ib_caps & LINK_INBAND_ENABLE) 1120 pcs_ib_only = true; 1121 } 1122 1123 if (phy_ib_caps && phy_ib_caps != LINK_INBAND_DISABLE) { 1124 /* PHY supports in-band capabilities, and supports 1125 * more than disable mode. 1126 */ 1127 if (phy_ib_caps & LINK_INBAND_DISABLE) 1128 pl->phy_ib_mode = LINK_INBAND_DISABLE; 1129 else if (phy_ib_caps & LINK_INBAND_BYPASS) 1130 pl->phy_ib_mode = LINK_INBAND_BYPASS; 1131 else if (phy_ib_caps & LINK_INBAND_ENABLE) 1132 phy_ib_only = true; 1133 } 1134 1135 /* If either the PCS or PHY requires inband to be enabled, 1136 * this is an invalid configuration. Provide a diagnostic 1137 * message for this case, but don't try to force the issue. 1138 */ 1139 if (pcs_ib_only || phy_ib_only) 1140 phylink_warn(pl, 1141 "firmware wants %s mode, but %s%s%s requires inband\n", 1142 phylink_an_mode_str(mode), 1143 pcs_ib_only ? "PCS" : "", 1144 pcs_ib_only && phy_ib_only ? " and " : "", 1145 phy_ib_only ? "PHY" : ""); 1146 1147 neg_mode = PHYLINK_PCS_NEG_OUTBAND; 1148 } else if (type == INBAND_CISCO_SGMII || pl->phydev) { 1149 /* For SGMII modes which are designed to be used with PHYs, or 1150 * Base-X with a PHY, we try to use in-band mode where-ever 1151 * possible. However, there are some PHYs e.g. BCM84881 which 1152 * do not support in-band. 1153 */ 1154 const unsigned int inband_ok = LINK_INBAND_ENABLE | 1155 LINK_INBAND_BYPASS; 1156 const unsigned int outband_ok = LINK_INBAND_DISABLE | 1157 LINK_INBAND_BYPASS; 1158 /* PCS PHY 1159 * D E D E 1160 * 0 0 0 0 no information inband enabled 1161 * 1 0 0 0 pcs doesn't support outband 1162 * 0 1 0 0 pcs required inband enabled 1163 * 1 1 0 0 pcs optional inband enabled 1164 * 0 0 1 0 phy doesn't support outband 1165 * 1 0 1 0 pcs+phy doesn't support outband 1166 * 0 1 1 0 pcs required, phy doesn't support, invalid 1167 * 1 1 1 0 pcs optional, phy doesn't support, outband 1168 * 0 0 0 1 phy required inband enabled 1169 * 1 0 0 1 pcs doesn't support, phy required, invalid 1170 * 0 1 0 1 pcs+phy required inband enabled 1171 * 1 1 0 1 pcs optional, phy required inband enabled 1172 * 0 0 1 1 phy optional inband enabled 1173 * 1 0 1 1 pcs doesn't support, phy optional, outband 1174 * 0 1 1 1 pcs required, phy optional inband enabled 1175 * 1 1 1 1 pcs+phy optional inband enabled 1176 */ 1177 if ((!pcs_ib_caps || pcs_ib_caps & inband_ok) && 1178 (!phy_ib_caps || phy_ib_caps & inband_ok)) { 1179 /* In-band supported or unknown at both ends. Enable 1180 * in-band mode with or without bypass at the PHY. 1181 */ 1182 if (phy_ib_caps & LINK_INBAND_ENABLE) 1183 pl->phy_ib_mode = LINK_INBAND_ENABLE; 1184 else if (phy_ib_caps & LINK_INBAND_BYPASS) 1185 pl->phy_ib_mode = LINK_INBAND_BYPASS; 1186 1187 neg_mode = PHYLINK_PCS_NEG_INBAND_ENABLED; 1188 } else if ((!pcs_ib_caps || pcs_ib_caps & outband_ok) && 1189 (!phy_ib_caps || phy_ib_caps & outband_ok)) { 1190 /* Either in-band not supported at at least one end. 1191 * In-band bypass at the other end is possible. 1192 */ 1193 if (phy_ib_caps & LINK_INBAND_DISABLE) 1194 pl->phy_ib_mode = LINK_INBAND_DISABLE; 1195 else if (phy_ib_caps & LINK_INBAND_BYPASS) 1196 pl->phy_ib_mode = LINK_INBAND_BYPASS; 1197 1198 neg_mode = PHYLINK_PCS_NEG_OUTBAND; 1199 if (pl->phydev) 1200 mode = MLO_AN_PHY; 1201 } else { 1202 /* invalid */ 1203 phylink_warn(pl, "%s: incompatible in-band capabilities, trying in-band", 1204 phy_modes(interface)); 1205 neg_mode = PHYLINK_PCS_NEG_INBAND_ENABLED; 1206 } 1207 } else { 1208 /* For Base-X without a PHY */ 1209 if (pcs_ib_caps == LINK_INBAND_DISABLE) 1210 /* If the PCS doesn't support inband, then inband must 1211 * be disabled. 1212 */ 1213 neg_mode = PHYLINK_PCS_NEG_INBAND_DISABLED; 1214 else if (pcs_ib_caps == LINK_INBAND_ENABLE) 1215 /* If the PCS requires inband, then inband must always 1216 * be enabled. 1217 */ 1218 neg_mode = PHYLINK_PCS_NEG_INBAND_ENABLED; 1219 else if (linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, 1220 advertising)) 1221 neg_mode = PHYLINK_PCS_NEG_INBAND_ENABLED; 1222 else 1223 neg_mode = PHYLINK_PCS_NEG_INBAND_DISABLED; 1224 } 1225 1226 pl->pcs_neg_mode = neg_mode; 1227 pl->act_link_an_mode = mode; 1228 } 1229 1230 static void phylink_major_config(struct phylink *pl, bool restart, 1231 const struct phylink_link_state *state) 1232 { 1233 struct phylink_pcs *pcs = NULL; 1234 bool pcs_changed = false; 1235 unsigned int rate_kbd; 1236 int err; 1237 1238 phylink_dbg(pl, "major config, requested %s/%s\n", 1239 phylink_an_mode_str(pl->req_link_an_mode), 1240 phy_modes(state->interface)); 1241 1242 pl->major_config_failed = false; 1243 1244 if (pl->mac_ops->mac_select_pcs) { 1245 pcs = pl->mac_ops->mac_select_pcs(pl->config, state->interface); 1246 if (IS_ERR(pcs)) { 1247 phylink_err(pl, 1248 "mac_select_pcs unexpectedly failed: %pe\n", 1249 pcs); 1250 1251 pl->major_config_failed = true; 1252 return; 1253 } 1254 1255 pcs_changed = pl->pcs != pcs; 1256 } 1257 1258 phylink_pcs_neg_mode(pl, pcs, state->interface, state->advertising); 1259 1260 phylink_dbg(pl, "major config, active %s/%s/%s\n", 1261 phylink_an_mode_str(pl->act_link_an_mode), 1262 phylink_pcs_mode_str(pl->pcs_neg_mode), 1263 phy_modes(state->interface)); 1264 1265 phylink_pcs_poll_stop(pl); 1266 1267 if (pl->mac_ops->mac_prepare) { 1268 err = pl->mac_ops->mac_prepare(pl->config, pl->act_link_an_mode, 1269 state->interface); 1270 if (err < 0) { 1271 phylink_err(pl, "mac_prepare failed: %pe\n", 1272 ERR_PTR(err)); 1273 pl->major_config_failed = true; 1274 return; 1275 } 1276 } 1277 1278 /* If we have a new PCS, switch to the new PCS after preparing the MAC 1279 * for the change. 1280 */ 1281 if (pcs_changed) { 1282 phylink_pcs_disable(pl->pcs); 1283 1284 if (pl->pcs) 1285 pl->pcs->phylink = NULL; 1286 1287 pcs->phylink = pl; 1288 1289 pl->pcs = pcs; 1290 } 1291 1292 if (pl->pcs) 1293 phylink_pcs_pre_config(pl->pcs, state->interface); 1294 1295 phylink_mac_config(pl, state); 1296 1297 if (pl->pcs) { 1298 err = phylink_pcs_post_config(pl->pcs, state->interface); 1299 if (err < 0) { 1300 phylink_err(pl, "pcs_post_config failed: %pe\n", 1301 ERR_PTR(err)); 1302 1303 pl->major_config_failed = true; 1304 } 1305 } 1306 1307 if (pl->pcs_state == PCS_STATE_STARTING || pcs_changed) 1308 phylink_pcs_enable(pl->pcs); 1309 1310 err = phylink_pcs_config(pl->pcs, pl->pcs_neg_mode, state, 1311 !!(pl->link_config.pause & MLO_PAUSE_AN)); 1312 if (err < 0) { 1313 phylink_err(pl, "pcs_config failed: %pe\n", ERR_PTR(err)); 1314 pl->major_config_failed = true; 1315 } else if (err > 0) { 1316 restart = true; 1317 } 1318 1319 if (restart) 1320 phylink_pcs_an_restart(pl); 1321 1322 if (pl->mac_ops->mac_finish) { 1323 err = pl->mac_ops->mac_finish(pl->config, pl->act_link_an_mode, 1324 state->interface); 1325 if (err < 0) { 1326 phylink_err(pl, "mac_finish failed: %pe\n", 1327 ERR_PTR(err)); 1328 1329 pl->major_config_failed = true; 1330 } 1331 } 1332 1333 if (pl->phydev && pl->phy_ib_mode) { 1334 err = phy_config_inband(pl->phydev, pl->phy_ib_mode); 1335 if (err < 0) { 1336 phylink_err(pl, "phy_config_inband: %pe\n", 1337 ERR_PTR(err)); 1338 1339 pl->major_config_failed = true; 1340 } 1341 } 1342 1343 if (pl->sfp_bus) { 1344 rate_kbd = phylink_interface_signal_rate(state->interface); 1345 if (rate_kbd) 1346 sfp_upstream_set_signal_rate(pl->sfp_bus, rate_kbd); 1347 } 1348 1349 phylink_pcs_poll_start(pl); 1350 } 1351 1352 /* 1353 * Reconfigure for a change of inband advertisement. 1354 * If we have a separate PCS, we only need to call its pcs_config() method, 1355 * and then restart AN if it indicates something changed. Otherwise, we do 1356 * the full MAC reconfiguration. 1357 */ 1358 static int phylink_change_inband_advert(struct phylink *pl) 1359 { 1360 int ret; 1361 1362 if (test_bit(PHYLINK_DISABLE_STOPPED, &pl->phylink_disable_state)) 1363 return 0; 1364 1365 phylink_dbg(pl, "%s: mode=%s/%s adv=%*pb pause=%02x\n", __func__, 1366 phylink_an_mode_str(pl->req_link_an_mode), 1367 phy_modes(pl->link_config.interface), 1368 __ETHTOOL_LINK_MODE_MASK_NBITS, pl->link_config.advertising, 1369 pl->link_config.pause); 1370 1371 /* Recompute the PCS neg mode */ 1372 phylink_pcs_neg_mode(pl, pl->pcs, pl->link_config.interface, 1373 pl->link_config.advertising); 1374 1375 /* Modern PCS-based method; update the advert at the PCS, and 1376 * restart negotiation if the pcs_config() helper indicates that 1377 * the programmed advertisement has changed. 1378 */ 1379 ret = phylink_pcs_config(pl->pcs, pl->pcs_neg_mode, &pl->link_config, 1380 !!(pl->link_config.pause & MLO_PAUSE_AN)); 1381 if (ret < 0) 1382 return ret; 1383 1384 if (ret > 0) 1385 phylink_pcs_an_restart(pl); 1386 1387 return 0; 1388 } 1389 1390 static void phylink_mac_pcs_get_state(struct phylink *pl, 1391 struct phylink_link_state *state) 1392 { 1393 struct phylink_pcs *pcs; 1394 bool autoneg; 1395 1396 linkmode_copy(state->advertising, pl->link_config.advertising); 1397 linkmode_zero(state->lp_advertising); 1398 state->interface = pl->link_config.interface; 1399 state->rate_matching = pl->link_config.rate_matching; 1400 state->an_complete = 0; 1401 state->link = 1; 1402 1403 autoneg = pl->pcs_neg_mode == PHYLINK_PCS_NEG_INBAND_ENABLED; 1404 if (autoneg) { 1405 state->speed = SPEED_UNKNOWN; 1406 state->duplex = DUPLEX_UNKNOWN; 1407 state->pause = MLO_PAUSE_NONE; 1408 } else { 1409 state->speed = pl->link_config.speed; 1410 state->duplex = pl->link_config.duplex; 1411 state->pause = pl->link_config.pause; 1412 } 1413 1414 pcs = pl->pcs; 1415 if (pcs) 1416 pcs->ops->pcs_get_state(pcs, pl->pcs_neg_mode, state); 1417 else 1418 state->link = 0; 1419 } 1420 1421 /* The fixed state is... fixed except for the link state, 1422 * which may be determined by a GPIO or a callback. 1423 */ 1424 static void phylink_get_fixed_state(struct phylink *pl, 1425 struct phylink_link_state *state) 1426 { 1427 *state = pl->link_config; 1428 if (pl->config->get_fixed_state) 1429 pl->config->get_fixed_state(pl->config, state); 1430 else if (pl->link_gpio) 1431 state->link = !!gpiod_get_value_cansleep(pl->link_gpio); 1432 1433 state->pause = MLO_PAUSE_NONE; 1434 phylink_resolve_an_pause(state); 1435 } 1436 1437 static void phylink_mac_initial_config(struct phylink *pl, bool force_restart) 1438 { 1439 struct phylink_link_state link_state; 1440 struct phy_device *phy = pl->phydev; 1441 1442 switch (pl->req_link_an_mode) { 1443 case MLO_AN_PHY: 1444 link_state = pl->phy_state; 1445 break; 1446 1447 case MLO_AN_FIXED: 1448 phylink_get_fixed_state(pl, &link_state); 1449 break; 1450 1451 case MLO_AN_INBAND: 1452 link_state = pl->link_config; 1453 if (link_state.interface == PHY_INTERFACE_MODE_SGMII) 1454 link_state.pause = MLO_PAUSE_NONE; 1455 break; 1456 1457 default: /* can't happen */ 1458 return; 1459 } 1460 1461 link_state.link = false; 1462 1463 phylink_apply_manual_flow(pl, &link_state); 1464 if (phy) 1465 mutex_lock(&phy->lock); 1466 phylink_major_config(pl, force_restart, &link_state); 1467 if (phy) 1468 mutex_unlock(&phy->lock); 1469 } 1470 1471 static const char *phylink_pause_to_str(int pause) 1472 { 1473 switch (pause & MLO_PAUSE_TXRX_MASK) { 1474 case MLO_PAUSE_TX | MLO_PAUSE_RX: 1475 return "rx/tx"; 1476 case MLO_PAUSE_TX: 1477 return "tx"; 1478 case MLO_PAUSE_RX: 1479 return "rx"; 1480 default: 1481 return "off"; 1482 } 1483 } 1484 1485 static void phylink_deactivate_lpi(struct phylink *pl) 1486 { 1487 if (pl->mac_enable_tx_lpi) { 1488 pl->mac_enable_tx_lpi = false; 1489 1490 phylink_dbg(pl, "disabling LPI\n"); 1491 1492 pl->mac_ops->mac_disable_tx_lpi(pl->config); 1493 1494 phylink_pcs_disable_eee(pl->pcs); 1495 } 1496 } 1497 1498 static void phylink_activate_lpi(struct phylink *pl) 1499 { 1500 int err; 1501 1502 if (!test_bit(pl->cur_interface, pl->config->lpi_interfaces)) { 1503 phylink_dbg(pl, "MAC does not support LPI with %s\n", 1504 phy_modes(pl->cur_interface)); 1505 return; 1506 } 1507 1508 phylink_dbg(pl, "LPI timer %uus, tx clock stop %u\n", 1509 pl->mac_tx_lpi_timer, pl->mac_tx_clk_stop); 1510 1511 phylink_pcs_enable_eee(pl->pcs); 1512 1513 err = pl->mac_ops->mac_enable_tx_lpi(pl->config, pl->mac_tx_lpi_timer, 1514 pl->mac_tx_clk_stop); 1515 if (err) { 1516 phylink_pcs_disable_eee(pl->pcs); 1517 phylink_err(pl, "%ps() failed: %pe\n", 1518 pl->mac_ops->mac_enable_tx_lpi, ERR_PTR(err)); 1519 return; 1520 } 1521 1522 pl->mac_enable_tx_lpi = true; 1523 } 1524 1525 static void phylink_link_up(struct phylink *pl, 1526 struct phylink_link_state link_state) 1527 { 1528 struct net_device *ndev = pl->netdev; 1529 int speed, duplex; 1530 bool rx_pause; 1531 1532 speed = link_state.speed; 1533 duplex = link_state.duplex; 1534 rx_pause = !!(link_state.pause & MLO_PAUSE_RX); 1535 1536 switch (link_state.rate_matching) { 1537 case RATE_MATCH_PAUSE: 1538 /* The PHY is doing rate matchion from the media rate (in 1539 * the link_state) to the interface speed, and will send 1540 * pause frames to the MAC to limit its transmission speed. 1541 */ 1542 speed = phylink_interface_max_speed(link_state.interface); 1543 duplex = DUPLEX_FULL; 1544 rx_pause = true; 1545 break; 1546 1547 case RATE_MATCH_CRS: 1548 /* The PHY is doing rate matchion from the media rate (in 1549 * the link_state) to the interface speed, and will cause 1550 * collisions to the MAC to limit its transmission speed. 1551 */ 1552 speed = phylink_interface_max_speed(link_state.interface); 1553 duplex = DUPLEX_HALF; 1554 break; 1555 } 1556 1557 pl->cur_interface = link_state.interface; 1558 1559 phylink_pcs_link_up(pl->pcs, pl->pcs_neg_mode, pl->cur_interface, speed, 1560 duplex); 1561 1562 pl->mac_ops->mac_link_up(pl->config, pl->phydev, pl->act_link_an_mode, 1563 pl->cur_interface, speed, duplex, 1564 !!(link_state.pause & MLO_PAUSE_TX), rx_pause); 1565 1566 if (pl->mac_supports_eee && pl->phy_enable_tx_lpi) 1567 phylink_activate_lpi(pl); 1568 1569 if (ndev) 1570 netif_carrier_on(ndev); 1571 1572 phylink_info(pl, 1573 "Link is Up - %s/%s - flow control %s\n", 1574 phy_speed_to_str(link_state.speed), 1575 phy_duplex_to_str(link_state.duplex), 1576 phylink_pause_to_str(link_state.pause)); 1577 } 1578 1579 static void phylink_link_down(struct phylink *pl) 1580 { 1581 struct net_device *ndev = pl->netdev; 1582 1583 if (ndev) 1584 netif_carrier_off(ndev); 1585 1586 phylink_deactivate_lpi(pl); 1587 1588 pl->mac_ops->mac_link_down(pl->config, pl->act_link_an_mode, 1589 pl->cur_interface); 1590 phylink_info(pl, "Link is Down\n"); 1591 } 1592 1593 static bool phylink_link_is_up(struct phylink *pl) 1594 { 1595 return pl->netdev ? netif_carrier_ok(pl->netdev) : pl->old_link_state; 1596 } 1597 1598 static void phylink_resolve(struct work_struct *w) 1599 { 1600 struct phylink *pl = container_of(w, struct phylink, resolve); 1601 struct phylink_link_state link_state; 1602 bool mac_config = false; 1603 bool retrigger = false; 1604 struct phy_device *phy; 1605 bool cur_link_state; 1606 1607 mutex_lock(&pl->phydev_mutex); 1608 phy = pl->phydev; 1609 if (phy) 1610 mutex_lock(&phy->lock); 1611 mutex_lock(&pl->state_mutex); 1612 cur_link_state = phylink_link_is_up(pl); 1613 1614 if (pl->phylink_disable_state) { 1615 pl->link_failed = false; 1616 link_state.link = false; 1617 } else if (pl->link_failed) { 1618 link_state.link = false; 1619 retrigger = true; 1620 } else if (pl->act_link_an_mode == MLO_AN_FIXED) { 1621 phylink_get_fixed_state(pl, &link_state); 1622 mac_config = link_state.link; 1623 } else if (pl->act_link_an_mode == MLO_AN_PHY) { 1624 link_state = pl->phy_state; 1625 mac_config = link_state.link; 1626 } else { 1627 phylink_mac_pcs_get_state(pl, &link_state); 1628 1629 /* The PCS may have a latching link-fail indicator. If the link 1630 * was up, bring the link down and re-trigger the resolve. 1631 * Otherwise, re-read the PCS state to get the current status 1632 * of the link. 1633 */ 1634 if (!link_state.link) { 1635 if (cur_link_state) 1636 retrigger = true; 1637 else 1638 phylink_mac_pcs_get_state(pl, &link_state); 1639 } 1640 1641 /* If we have a phy, the "up" state is the union of both the 1642 * PHY and the MAC 1643 */ 1644 if (phy) 1645 link_state.link &= pl->phy_state.link; 1646 1647 /* Only update if the PHY link is up */ 1648 if (phy && pl->phy_state.link) { 1649 /* If the interface has changed, force a link down 1650 * event if the link isn't already down, and re-resolve. 1651 */ 1652 if (link_state.interface != pl->phy_state.interface) { 1653 retrigger = true; 1654 link_state.link = false; 1655 } 1656 1657 link_state.interface = pl->phy_state.interface; 1658 1659 /* If we are doing rate matching, then the link 1660 * speed/duplex comes from the PHY 1661 */ 1662 if (pl->phy_state.rate_matching) { 1663 link_state.rate_matching = 1664 pl->phy_state.rate_matching; 1665 link_state.speed = pl->phy_state.speed; 1666 link_state.duplex = pl->phy_state.duplex; 1667 } 1668 1669 /* If we have a PHY, we need to update with the PHY 1670 * flow control bits. 1671 */ 1672 link_state.pause = pl->phy_state.pause; 1673 mac_config = true; 1674 } 1675 } 1676 1677 if (pl->act_link_an_mode != MLO_AN_FIXED) 1678 phylink_apply_manual_flow(pl, &link_state); 1679 1680 if (mac_config) { 1681 if (link_state.interface != pl->link_config.interface) { 1682 /* The interface has changed, force the link down and 1683 * then reconfigure. 1684 */ 1685 if (cur_link_state) { 1686 phylink_link_down(pl); 1687 cur_link_state = false; 1688 } 1689 phylink_major_config(pl, false, &link_state); 1690 pl->link_config.interface = link_state.interface; 1691 } 1692 } 1693 1694 /* If configuration of the interface failed, force the link down 1695 * until we get a successful configuration. 1696 */ 1697 if (pl->major_config_failed) 1698 link_state.link = false; 1699 1700 if (link_state.link != cur_link_state) { 1701 pl->old_link_state = link_state.link; 1702 if (!link_state.link) 1703 phylink_link_down(pl); 1704 else 1705 phylink_link_up(pl, link_state); 1706 } 1707 if (!link_state.link && retrigger) { 1708 pl->link_failed = false; 1709 queue_work(system_power_efficient_wq, &pl->resolve); 1710 } 1711 mutex_unlock(&pl->state_mutex); 1712 if (phy) 1713 mutex_unlock(&phy->lock); 1714 mutex_unlock(&pl->phydev_mutex); 1715 } 1716 1717 static void phylink_run_resolve(struct phylink *pl) 1718 { 1719 if (!pl->phylink_disable_state) 1720 queue_work(system_power_efficient_wq, &pl->resolve); 1721 } 1722 1723 static void phylink_run_resolve_and_disable(struct phylink *pl, int bit) 1724 { 1725 unsigned long state = pl->phylink_disable_state; 1726 1727 set_bit(bit, &pl->phylink_disable_state); 1728 if (state == 0) { 1729 queue_work(system_power_efficient_wq, &pl->resolve); 1730 flush_work(&pl->resolve); 1731 } 1732 } 1733 1734 static void phylink_enable_and_run_resolve(struct phylink *pl, int bit) 1735 { 1736 clear_bit(bit, &pl->phylink_disable_state); 1737 phylink_run_resolve(pl); 1738 } 1739 1740 static void phylink_fixed_poll(struct timer_list *t) 1741 { 1742 struct phylink *pl = container_of(t, struct phylink, link_poll); 1743 1744 mod_timer(t, jiffies + HZ); 1745 1746 phylink_run_resolve(pl); 1747 } 1748 1749 static const struct sfp_upstream_ops sfp_phylink_ops; 1750 1751 static int phylink_register_sfp(struct phylink *pl, 1752 const struct fwnode_handle *fwnode) 1753 { 1754 struct sfp_bus *bus; 1755 int ret; 1756 1757 if (!fwnode) 1758 return 0; 1759 1760 bus = sfp_bus_find_fwnode(fwnode); 1761 if (IS_ERR(bus)) { 1762 phylink_err(pl, "unable to attach SFP bus: %pe\n", bus); 1763 return PTR_ERR(bus); 1764 } 1765 1766 pl->sfp_bus = bus; 1767 1768 ret = sfp_bus_add_upstream(bus, pl, &sfp_phylink_ops); 1769 sfp_bus_put(bus); 1770 1771 return ret; 1772 } 1773 1774 /** 1775 * phylink_set_fixed_link() - set the fixed link 1776 * @pl: a pointer to a &struct phylink returned from phylink_create() 1777 * @state: a pointer to a struct phylink_link_state. 1778 * 1779 * This function is used when the link parameters are known and do not change, 1780 * making it suitable for certain types of network connections. 1781 * 1782 * Returns: zero on success or negative error code. 1783 */ 1784 int phylink_set_fixed_link(struct phylink *pl, 1785 const struct phylink_link_state *state) 1786 { 1787 const struct link_capabilities *c; 1788 unsigned long *adv; 1789 1790 if (pl->cfg_link_an_mode != MLO_AN_PHY || !state || 1791 !test_bit(PHYLINK_DISABLE_STOPPED, &pl->phylink_disable_state)) 1792 return -EINVAL; 1793 1794 c = phy_caps_lookup(state->speed, state->duplex, 1795 pl->supported, true); 1796 if (!c) 1797 return -EINVAL; 1798 1799 adv = pl->link_config.advertising; 1800 linkmode_and(adv, pl->supported, c->linkmodes); 1801 linkmode_set_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, adv); 1802 1803 pl->link_config.speed = state->speed; 1804 pl->link_config.duplex = state->duplex; 1805 pl->link_config.link = 1; 1806 pl->link_config.an_complete = 1; 1807 1808 pl->cfg_link_an_mode = MLO_AN_FIXED; 1809 pl->req_link_an_mode = pl->cfg_link_an_mode; 1810 1811 return 0; 1812 } 1813 EXPORT_SYMBOL_GPL(phylink_set_fixed_link); 1814 1815 /** 1816 * phylink_create() - create a phylink instance 1817 * @config: a pointer to the target &struct phylink_config 1818 * @fwnode: a pointer to a &struct fwnode_handle describing the network 1819 * interface 1820 * @iface: the desired link mode defined by &typedef phy_interface_t 1821 * @mac_ops: a pointer to a &struct phylink_mac_ops for the MAC. 1822 * 1823 * Create a new phylink instance, and parse the link parameters found in @np. 1824 * This will parse in-band modes, fixed-link or SFP configuration. 1825 * 1826 * Note: the rtnl lock must not be held when calling this function. 1827 * 1828 * Returns a pointer to a &struct phylink, or an error-pointer value. Users 1829 * must use IS_ERR() to check for errors from this function. 1830 */ 1831 struct phylink *phylink_create(struct phylink_config *config, 1832 const struct fwnode_handle *fwnode, 1833 phy_interface_t iface, 1834 const struct phylink_mac_ops *mac_ops) 1835 { 1836 struct phylink *pl; 1837 int ret; 1838 1839 /* Validate the supplied configuration */ 1840 if (phy_interface_empty(config->supported_interfaces)) { 1841 dev_err(config->dev, 1842 "phylink: error: empty supported_interfaces\n"); 1843 return ERR_PTR(-EINVAL); 1844 } 1845 1846 pl = kzalloc(sizeof(*pl), GFP_KERNEL); 1847 if (!pl) 1848 return ERR_PTR(-ENOMEM); 1849 1850 mutex_init(&pl->phydev_mutex); 1851 mutex_init(&pl->state_mutex); 1852 INIT_WORK(&pl->resolve, phylink_resolve); 1853 1854 pl->config = config; 1855 if (config->type == PHYLINK_NETDEV) { 1856 pl->netdev = to_net_dev(config->dev); 1857 netif_carrier_off(pl->netdev); 1858 } else if (config->type == PHYLINK_DEV) { 1859 pl->dev = config->dev; 1860 } else { 1861 kfree(pl); 1862 return ERR_PTR(-EINVAL); 1863 } 1864 1865 pl->mac_supports_eee_ops = phylink_mac_implements_lpi(mac_ops); 1866 pl->mac_supports_eee = pl->mac_supports_eee_ops && 1867 pl->config->lpi_capabilities && 1868 !phy_interface_empty(pl->config->lpi_interfaces); 1869 1870 /* Set the default EEE configuration */ 1871 pl->eee_cfg.eee_enabled = pl->config->eee_enabled_default; 1872 pl->eee_cfg.tx_lpi_enabled = pl->eee_cfg.eee_enabled; 1873 pl->eee_cfg.tx_lpi_timer = pl->config->lpi_timer_default; 1874 1875 pl->phy_state.interface = iface; 1876 pl->link_interface = iface; 1877 if (iface == PHY_INTERFACE_MODE_MOCA) 1878 pl->link_port = PORT_BNC; 1879 else 1880 pl->link_port = PORT_MII; 1881 pl->link_config.interface = iface; 1882 pl->link_config.pause = MLO_PAUSE_AN; 1883 pl->link_config.speed = SPEED_UNKNOWN; 1884 pl->link_config.duplex = DUPLEX_UNKNOWN; 1885 pl->pcs_state = PCS_STATE_DOWN; 1886 pl->mac_ops = mac_ops; 1887 __set_bit(PHYLINK_DISABLE_STOPPED, &pl->phylink_disable_state); 1888 timer_setup(&pl->link_poll, phylink_fixed_poll, 0); 1889 1890 linkmode_fill(pl->supported); 1891 linkmode_copy(pl->link_config.advertising, pl->supported); 1892 phylink_validate(pl, pl->supported, &pl->link_config); 1893 1894 ret = phylink_parse_mode(pl, fwnode); 1895 if (ret < 0) { 1896 kfree(pl); 1897 return ERR_PTR(ret); 1898 } 1899 1900 if (pl->cfg_link_an_mode == MLO_AN_FIXED) { 1901 ret = phylink_parse_fixedlink(pl, fwnode); 1902 if (ret < 0) { 1903 kfree(pl); 1904 return ERR_PTR(ret); 1905 } 1906 } 1907 1908 pl->req_link_an_mode = pl->cfg_link_an_mode; 1909 1910 ret = phylink_register_sfp(pl, fwnode); 1911 if (ret < 0) { 1912 kfree(pl); 1913 return ERR_PTR(ret); 1914 } 1915 1916 return pl; 1917 } 1918 EXPORT_SYMBOL_GPL(phylink_create); 1919 1920 /** 1921 * phylink_destroy() - cleanup and destroy the phylink instance 1922 * @pl: a pointer to a &struct phylink returned from phylink_create() 1923 * 1924 * Destroy a phylink instance. Any PHY that has been attached must have been 1925 * cleaned up via phylink_disconnect_phy() prior to calling this function. 1926 * 1927 * Note: the rtnl lock must not be held when calling this function. 1928 */ 1929 void phylink_destroy(struct phylink *pl) 1930 { 1931 sfp_bus_del_upstream(pl->sfp_bus); 1932 if (pl->link_gpio) 1933 gpiod_put(pl->link_gpio); 1934 1935 cancel_work_sync(&pl->resolve); 1936 kfree(pl); 1937 } 1938 EXPORT_SYMBOL_GPL(phylink_destroy); 1939 1940 /** 1941 * phylink_expects_phy() - Determine if phylink expects a phy to be attached 1942 * @pl: a pointer to a &struct phylink returned from phylink_create() 1943 * 1944 * When using fixed-link mode, or in-band mode with 1000base-X or 2500base-X, 1945 * no PHY is needed. 1946 * 1947 * Returns true if phylink will be expecting a PHY. 1948 */ 1949 bool phylink_expects_phy(struct phylink *pl) 1950 { 1951 if (pl->cfg_link_an_mode == MLO_AN_FIXED || 1952 (pl->cfg_link_an_mode == MLO_AN_INBAND && 1953 phy_interface_mode_is_8023z(pl->link_interface))) 1954 return false; 1955 return true; 1956 } 1957 EXPORT_SYMBOL_GPL(phylink_expects_phy); 1958 1959 static void phylink_phy_change(struct phy_device *phydev, bool up) 1960 { 1961 struct phylink *pl = phydev->phylink; 1962 bool tx_pause, rx_pause; 1963 1964 phy_get_pause(phydev, &tx_pause, &rx_pause); 1965 1966 mutex_lock(&pl->state_mutex); 1967 pl->phy_state.speed = phydev->speed; 1968 pl->phy_state.duplex = phydev->duplex; 1969 pl->phy_state.rate_matching = phydev->rate_matching; 1970 pl->phy_state.pause = MLO_PAUSE_NONE; 1971 if (tx_pause) 1972 pl->phy_state.pause |= MLO_PAUSE_TX; 1973 if (rx_pause) 1974 pl->phy_state.pause |= MLO_PAUSE_RX; 1975 pl->phy_state.interface = phydev->interface; 1976 pl->phy_state.link = up; 1977 if (!up) 1978 pl->link_failed = true; 1979 1980 /* Get the LPI state from phylib */ 1981 pl->phy_enable_tx_lpi = phydev->enable_tx_lpi; 1982 pl->mac_tx_lpi_timer = phydev->eee_cfg.tx_lpi_timer; 1983 mutex_unlock(&pl->state_mutex); 1984 1985 phylink_run_resolve(pl); 1986 1987 phylink_dbg(pl, "phy link %s %s/%s/%s/%s/%s/%slpi\n", 1988 up ? "up" : "down", 1989 phy_modes(phydev->interface), 1990 phy_speed_to_str(phydev->speed), 1991 phy_duplex_to_str(phydev->duplex), 1992 phy_rate_matching_to_str(phydev->rate_matching), 1993 phylink_pause_to_str(pl->phy_state.pause), 1994 phydev->enable_tx_lpi ? "" : "no"); 1995 } 1996 1997 static int phylink_validate_phy(struct phylink *pl, struct phy_device *phy, 1998 unsigned long *supported, 1999 struct phylink_link_state *state) 2000 { 2001 DECLARE_PHY_INTERFACE_MASK(interfaces); 2002 2003 /* If the PHY provides a bitmap of the interfaces it will be using 2004 * depending on the negotiated media speeds, use this to validate 2005 * which ethtool link modes can be used. 2006 */ 2007 if (!phy_interface_empty(phy->possible_interfaces)) { 2008 /* We only care about the union of the PHY's interfaces and 2009 * those which the host supports. 2010 */ 2011 phy_interface_and(interfaces, phy->possible_interfaces, 2012 pl->config->supported_interfaces); 2013 2014 if (phy_interface_empty(interfaces)) { 2015 phylink_err(pl, "PHY has no common interfaces\n"); 2016 return -EINVAL; 2017 } 2018 2019 if (phy_on_sfp(phy)) { 2020 /* If the PHY is on a SFP, limit the interfaces to 2021 * those that can be used with a SFP module. 2022 */ 2023 phy_interface_and(interfaces, interfaces, 2024 phylink_sfp_interfaces); 2025 2026 if (phy_interface_empty(interfaces)) { 2027 phylink_err(pl, "SFP PHY's possible interfaces becomes empty\n"); 2028 return -EINVAL; 2029 } 2030 } 2031 2032 phylink_dbg(pl, "PHY %s uses interfaces %*pbl, validating %*pbl\n", 2033 phydev_name(phy), 2034 (int)PHY_INTERFACE_MODE_MAX, 2035 phy->possible_interfaces, 2036 (int)PHY_INTERFACE_MODE_MAX, interfaces); 2037 2038 return phylink_validate_mask(pl, phy, supported, state, 2039 interfaces); 2040 } 2041 2042 phylink_dbg(pl, "PHY %s doesn't supply possible interfaces\n", 2043 phydev_name(phy)); 2044 2045 /* Check whether we would use rate matching for the proposed interface 2046 * mode. 2047 */ 2048 state->rate_matching = phy_get_rate_matching(phy, state->interface); 2049 2050 /* Clause 45 PHYs may switch their Serdes lane between, e.g. 10GBASE-R, 2051 * 5GBASE-R, 2500BASE-X and SGMII if they are not using rate matching. 2052 * For some interface modes (e.g. RXAUI, XAUI and USXGMII) switching 2053 * their Serdes is either unnecessary or not reasonable. 2054 * 2055 * For these which switch interface modes, we really need to know which 2056 * interface modes the PHY supports to properly work out which ethtool 2057 * linkmodes can be supported. For now, as a work-around, we validate 2058 * against all interface modes, which may lead to more ethtool link 2059 * modes being advertised than are actually supported. 2060 */ 2061 if (phy->is_c45 && state->rate_matching == RATE_MATCH_NONE && 2062 state->interface != PHY_INTERFACE_MODE_RXAUI && 2063 state->interface != PHY_INTERFACE_MODE_XAUI && 2064 state->interface != PHY_INTERFACE_MODE_USXGMII) 2065 state->interface = PHY_INTERFACE_MODE_NA; 2066 2067 return phylink_validate(pl, supported, state); 2068 } 2069 2070 static int phylink_bringup_phy(struct phylink *pl, struct phy_device *phy, 2071 phy_interface_t interface) 2072 { 2073 struct phylink_link_state config; 2074 __ETHTOOL_DECLARE_LINK_MODE_MASK(supported); 2075 char *irq_str; 2076 int ret; 2077 2078 /* 2079 * This is the new way of dealing with flow control for PHYs, 2080 * as described by Timur Tabi in commit 529ed1275263 ("net: phy: 2081 * phy drivers should not set SUPPORTED_[Asym_]Pause") except 2082 * using our validate call to the MAC, we rely upon the MAC 2083 * clearing the bits from both supported and advertising fields. 2084 */ 2085 phy_support_asym_pause(phy); 2086 2087 memset(&config, 0, sizeof(config)); 2088 linkmode_copy(supported, phy->supported); 2089 linkmode_copy(config.advertising, phy->advertising); 2090 config.interface = interface; 2091 2092 ret = phylink_validate_phy(pl, phy, supported, &config); 2093 if (ret) { 2094 phylink_warn(pl, "validation of %s with support %*pb and advertisement %*pb failed: %pe\n", 2095 phy_modes(config.interface), 2096 __ETHTOOL_LINK_MODE_MASK_NBITS, phy->supported, 2097 __ETHTOOL_LINK_MODE_MASK_NBITS, config.advertising, 2098 ERR_PTR(ret)); 2099 return ret; 2100 } 2101 2102 phy->phylink = pl; 2103 phy->phy_link_change = phylink_phy_change; 2104 2105 irq_str = phy_attached_info_irq(phy); 2106 phylink_info(pl, 2107 "PHY [%s] driver [%s] (irq=%s)\n", 2108 dev_name(&phy->mdio.dev), phy->drv->name, irq_str); 2109 kfree(irq_str); 2110 2111 mutex_lock(&pl->phydev_mutex); 2112 mutex_lock(&phy->lock); 2113 mutex_lock(&pl->state_mutex); 2114 pl->phydev = phy; 2115 pl->phy_state.interface = interface; 2116 pl->phy_state.pause = MLO_PAUSE_NONE; 2117 pl->phy_state.speed = SPEED_UNKNOWN; 2118 pl->phy_state.duplex = DUPLEX_UNKNOWN; 2119 pl->phy_state.rate_matching = RATE_MATCH_NONE; 2120 linkmode_copy(pl->supported, supported); 2121 linkmode_copy(pl->link_config.advertising, config.advertising); 2122 2123 /* Restrict the phy advertisement according to the MAC support. */ 2124 linkmode_copy(phy->advertising, config.advertising); 2125 2126 /* If the MAC supports phylink managed EEE, restrict the EEE 2127 * advertisement according to the MAC's LPI capabilities. 2128 */ 2129 if (pl->mac_supports_eee) { 2130 /* If EEE is enabled, then we need to call phy_support_eee() 2131 * to ensure that the advertising mask is appropriately set. 2132 * This also enables EEE at the PHY. 2133 */ 2134 if (pl->eee_cfg.eee_enabled) 2135 phy_support_eee(phy); 2136 2137 phy->eee_cfg.tx_lpi_enabled = pl->eee_cfg.tx_lpi_enabled; 2138 phy->eee_cfg.tx_lpi_timer = pl->eee_cfg.tx_lpi_timer; 2139 2140 /* Convert the MAC's LPI capabilities to linkmodes */ 2141 linkmode_zero(pl->supported_lpi); 2142 phylink_caps_to_linkmodes(pl->supported_lpi, 2143 pl->config->lpi_capabilities); 2144 2145 /* Restrict the PHYs EEE support/advertisement to the modes 2146 * that the MAC supports. 2147 */ 2148 linkmode_and(phy->advertising_eee, phy->advertising_eee, 2149 pl->supported_lpi); 2150 } else if (pl->mac_supports_eee_ops) { 2151 /* MAC supports phylink EEE, but wants EEE always disabled. */ 2152 phy_disable_eee(phy); 2153 } 2154 2155 mutex_unlock(&pl->state_mutex); 2156 mutex_unlock(&phy->lock); 2157 mutex_unlock(&pl->phydev_mutex); 2158 2159 phylink_dbg(pl, 2160 "phy: %s setting supported %*pb advertising %*pb\n", 2161 phy_modes(interface), 2162 __ETHTOOL_LINK_MODE_MASK_NBITS, pl->supported, 2163 __ETHTOOL_LINK_MODE_MASK_NBITS, phy->advertising); 2164 2165 if (pl->config->mac_managed_pm) 2166 phy->mac_managed_pm = true; 2167 2168 /* Allow the MAC to stop its clock if the PHY has the capability */ 2169 pl->mac_tx_clk_stop = phy_eee_tx_clock_stop_capable(phy) > 0; 2170 2171 if (pl->mac_supports_eee_ops) { 2172 /* Explicitly configure whether the PHY is allowed to stop it's 2173 * receive clock. 2174 */ 2175 ret = phy_eee_rx_clock_stop(phy, 2176 pl->config->eee_rx_clk_stop_enable); 2177 if (ret == -EOPNOTSUPP) 2178 ret = 0; 2179 } 2180 2181 if (ret == 0 && phy_interrupt_is_valid(phy)) 2182 phy_request_interrupt(phy); 2183 2184 return ret; 2185 } 2186 2187 static int phylink_attach_phy(struct phylink *pl, struct phy_device *phy, 2188 phy_interface_t interface) 2189 { 2190 u32 flags = 0; 2191 2192 if (WARN_ON(pl->cfg_link_an_mode == MLO_AN_FIXED || 2193 (pl->cfg_link_an_mode == MLO_AN_INBAND && 2194 phy_interface_mode_is_8023z(interface) && !pl->sfp_bus))) 2195 return -EINVAL; 2196 2197 if (pl->phydev) 2198 return -EBUSY; 2199 2200 if (pl->config->mac_requires_rxc) 2201 flags |= PHY_F_RXC_ALWAYS_ON; 2202 2203 return phy_attach_direct(pl->netdev, phy, flags, interface); 2204 } 2205 2206 /** 2207 * phylink_connect_phy() - connect a PHY to the phylink instance 2208 * @pl: a pointer to a &struct phylink returned from phylink_create() 2209 * @phy: a pointer to a &struct phy_device. 2210 * 2211 * Connect @phy to the phylink instance specified by @pl by calling 2212 * phy_attach_direct(). Configure the @phy according to the MAC driver's 2213 * capabilities, start the PHYLIB state machine and enable any interrupts 2214 * that the PHY supports. 2215 * 2216 * This updates the phylink's ethtool supported and advertising link mode 2217 * masks. 2218 * 2219 * Returns 0 on success or a negative errno. 2220 */ 2221 int phylink_connect_phy(struct phylink *pl, struct phy_device *phy) 2222 { 2223 int ret; 2224 2225 /* Use PHY device/driver interface */ 2226 if (pl->link_interface == PHY_INTERFACE_MODE_NA) { 2227 pl->link_interface = phy->interface; 2228 pl->link_config.interface = pl->link_interface; 2229 } 2230 2231 ret = phylink_attach_phy(pl, phy, pl->link_interface); 2232 if (ret < 0) 2233 return ret; 2234 2235 ret = phylink_bringup_phy(pl, phy, pl->link_config.interface); 2236 if (ret) 2237 phy_detach(phy); 2238 2239 return ret; 2240 } 2241 EXPORT_SYMBOL_GPL(phylink_connect_phy); 2242 2243 /** 2244 * phylink_of_phy_connect() - connect the PHY specified in the DT mode. 2245 * @pl: a pointer to a &struct phylink returned from phylink_create() 2246 * @dn: a pointer to a &struct device_node. 2247 * @flags: PHY-specific flags to communicate to the PHY device driver 2248 * 2249 * Connect the phy specified in the device node @dn to the phylink instance 2250 * specified by @pl. Actions specified in phylink_connect_phy() will be 2251 * performed. 2252 * 2253 * Returns 0 on success or a negative errno. 2254 */ 2255 int phylink_of_phy_connect(struct phylink *pl, struct device_node *dn, 2256 u32 flags) 2257 { 2258 return phylink_fwnode_phy_connect(pl, of_fwnode_handle(dn), flags); 2259 } 2260 EXPORT_SYMBOL_GPL(phylink_of_phy_connect); 2261 2262 /** 2263 * phylink_fwnode_phy_connect() - connect the PHY specified in the fwnode. 2264 * @pl: a pointer to a &struct phylink returned from phylink_create() 2265 * @fwnode: a pointer to a &struct fwnode_handle. 2266 * @flags: PHY-specific flags to communicate to the PHY device driver 2267 * 2268 * Connect the phy specified @fwnode to the phylink instance specified 2269 * by @pl. 2270 * 2271 * Returns 0 on success or a negative errno. 2272 */ 2273 int phylink_fwnode_phy_connect(struct phylink *pl, 2274 const struct fwnode_handle *fwnode, 2275 u32 flags) 2276 { 2277 struct fwnode_handle *phy_fwnode; 2278 struct phy_device *phy_dev; 2279 int ret; 2280 2281 /* Fixed links and 802.3z are handled without needing a PHY */ 2282 if (pl->cfg_link_an_mode == MLO_AN_FIXED || 2283 (pl->cfg_link_an_mode == MLO_AN_INBAND && 2284 phy_interface_mode_is_8023z(pl->link_interface))) 2285 return 0; 2286 2287 phy_fwnode = fwnode_get_phy_node(fwnode); 2288 if (IS_ERR(phy_fwnode)) { 2289 if (pl->cfg_link_an_mode == MLO_AN_PHY) 2290 return -ENODEV; 2291 return 0; 2292 } 2293 2294 phy_dev = fwnode_phy_find_device(phy_fwnode); 2295 /* We're done with the phy_node handle */ 2296 fwnode_handle_put(phy_fwnode); 2297 if (!phy_dev) 2298 return -ENODEV; 2299 2300 /* Use PHY device/driver interface */ 2301 if (pl->link_interface == PHY_INTERFACE_MODE_NA) { 2302 pl->link_interface = phy_dev->interface; 2303 pl->link_config.interface = pl->link_interface; 2304 } 2305 2306 if (pl->config->mac_requires_rxc) 2307 flags |= PHY_F_RXC_ALWAYS_ON; 2308 2309 ret = phy_attach_direct(pl->netdev, phy_dev, flags, 2310 pl->link_interface); 2311 phy_device_free(phy_dev); 2312 if (ret) 2313 return ret; 2314 2315 ret = phylink_bringup_phy(pl, phy_dev, pl->link_config.interface); 2316 if (ret) 2317 phy_detach(phy_dev); 2318 2319 return ret; 2320 } 2321 EXPORT_SYMBOL_GPL(phylink_fwnode_phy_connect); 2322 2323 /** 2324 * phylink_disconnect_phy() - disconnect any PHY attached to the phylink 2325 * instance. 2326 * @pl: a pointer to a &struct phylink returned from phylink_create() 2327 * 2328 * Disconnect any current PHY from the phylink instance described by @pl. 2329 */ 2330 void phylink_disconnect_phy(struct phylink *pl) 2331 { 2332 struct phy_device *phy; 2333 2334 ASSERT_RTNL(); 2335 2336 mutex_lock(&pl->phydev_mutex); 2337 phy = pl->phydev; 2338 if (phy) { 2339 mutex_lock(&phy->lock); 2340 mutex_lock(&pl->state_mutex); 2341 pl->phydev = NULL; 2342 pl->phy_enable_tx_lpi = false; 2343 pl->mac_tx_clk_stop = false; 2344 mutex_unlock(&pl->state_mutex); 2345 mutex_unlock(&phy->lock); 2346 } 2347 mutex_unlock(&pl->phydev_mutex); 2348 2349 if (phy) { 2350 flush_work(&pl->resolve); 2351 phy_disconnect(phy); 2352 } 2353 } 2354 EXPORT_SYMBOL_GPL(phylink_disconnect_phy); 2355 2356 static void phylink_link_changed(struct phylink *pl, bool up, const char *what) 2357 { 2358 if (!up) 2359 pl->link_failed = true; 2360 phylink_run_resolve(pl); 2361 phylink_dbg(pl, "%s link %s\n", what, up ? "up" : "down"); 2362 } 2363 2364 /** 2365 * phylink_mac_change() - notify phylink of a change in MAC state 2366 * @pl: a pointer to a &struct phylink returned from phylink_create() 2367 * @up: indicates whether the link is currently up. 2368 * 2369 * The MAC driver should call this driver when the state of its link 2370 * changes (eg, link failure, new negotiation results, etc.) 2371 */ 2372 void phylink_mac_change(struct phylink *pl, bool up) 2373 { 2374 phylink_link_changed(pl, up, "mac"); 2375 } 2376 EXPORT_SYMBOL_GPL(phylink_mac_change); 2377 2378 /** 2379 * phylink_pcs_change() - notify phylink of a change to PCS link state 2380 * @pcs: pointer to &struct phylink_pcs 2381 * @up: indicates whether the link is currently up. 2382 * 2383 * The PCS driver should call this when the state of its link changes 2384 * (e.g. link failure, new negotiation results, etc.) Note: it should 2385 * not determine "up" by reading the BMSR. If in doubt about the link 2386 * state at interrupt time, then pass true if pcs_get_state() returns 2387 * the latched link-down state, otherwise pass false. 2388 */ 2389 void phylink_pcs_change(struct phylink_pcs *pcs, bool up) 2390 { 2391 struct phylink *pl = pcs->phylink; 2392 2393 if (pl) 2394 phylink_link_changed(pl, up, "pcs"); 2395 } 2396 EXPORT_SYMBOL_GPL(phylink_pcs_change); 2397 2398 static irqreturn_t phylink_link_handler(int irq, void *data) 2399 { 2400 struct phylink *pl = data; 2401 2402 phylink_run_resolve(pl); 2403 2404 return IRQ_HANDLED; 2405 } 2406 2407 /** 2408 * phylink_start() - start a phylink instance 2409 * @pl: a pointer to a &struct phylink returned from phylink_create() 2410 * 2411 * Start the phylink instance specified by @pl, configuring the MAC for the 2412 * desired link mode(s) and negotiation style. This should be called from the 2413 * network device driver's &struct net_device_ops ndo_open() method. 2414 */ 2415 void phylink_start(struct phylink *pl) 2416 { 2417 bool poll = false; 2418 2419 ASSERT_RTNL(); 2420 2421 phylink_info(pl, "configuring for %s/%s link mode\n", 2422 phylink_an_mode_str(pl->req_link_an_mode), 2423 phy_modes(pl->link_config.interface)); 2424 2425 /* Always set the carrier off */ 2426 if (pl->netdev) 2427 netif_carrier_off(pl->netdev); 2428 2429 pl->pcs_state = PCS_STATE_STARTING; 2430 2431 /* Apply the link configuration to the MAC when starting. This allows 2432 * a fixed-link to start with the correct parameters, and also 2433 * ensures that we set the appropriate advertisement for Serdes links. 2434 * 2435 * Restart autonegotiation if using 802.3z to ensure that the link 2436 * parameters are properly negotiated. This is necessary for DSA 2437 * switches using 802.3z negotiation to ensure they see our modes. 2438 */ 2439 phylink_mac_initial_config(pl, true); 2440 2441 pl->pcs_state = PCS_STATE_STARTED; 2442 2443 phylink_enable_and_run_resolve(pl, PHYLINK_DISABLE_STOPPED); 2444 2445 if (pl->cfg_link_an_mode == MLO_AN_FIXED && pl->link_gpio) { 2446 int irq = gpiod_to_irq(pl->link_gpio); 2447 2448 if (irq > 0) { 2449 if (!request_irq(irq, phylink_link_handler, 2450 IRQF_TRIGGER_RISING | 2451 IRQF_TRIGGER_FALLING, 2452 "netdev link", pl)) 2453 pl->link_irq = irq; 2454 else 2455 irq = 0; 2456 } 2457 if (irq <= 0) 2458 poll = true; 2459 } 2460 2461 if (pl->cfg_link_an_mode == MLO_AN_FIXED) 2462 poll |= pl->config->poll_fixed_state; 2463 2464 if (poll) 2465 mod_timer(&pl->link_poll, jiffies + HZ); 2466 if (pl->phydev) 2467 phy_start(pl->phydev); 2468 if (pl->sfp_bus) 2469 sfp_upstream_start(pl->sfp_bus); 2470 } 2471 EXPORT_SYMBOL_GPL(phylink_start); 2472 2473 /** 2474 * phylink_stop() - stop a phylink instance 2475 * @pl: a pointer to a &struct phylink returned from phylink_create() 2476 * 2477 * Stop the phylink instance specified by @pl. This should be called from the 2478 * network device driver's &struct net_device_ops ndo_stop() method. The 2479 * network device's carrier state should not be changed prior to calling this 2480 * function. 2481 * 2482 * This will synchronously bring down the link if the link is not already 2483 * down (in other words, it will trigger a mac_link_down() method call.) 2484 */ 2485 void phylink_stop(struct phylink *pl) 2486 { 2487 ASSERT_RTNL(); 2488 2489 if (pl->sfp_bus) 2490 sfp_upstream_stop(pl->sfp_bus); 2491 if (pl->phydev) 2492 phy_stop(pl->phydev); 2493 timer_delete_sync(&pl->link_poll); 2494 if (pl->link_irq) { 2495 free_irq(pl->link_irq, pl); 2496 pl->link_irq = 0; 2497 } 2498 2499 phylink_run_resolve_and_disable(pl, PHYLINK_DISABLE_STOPPED); 2500 2501 pl->pcs_state = PCS_STATE_DOWN; 2502 2503 phylink_pcs_disable(pl->pcs); 2504 } 2505 EXPORT_SYMBOL_GPL(phylink_stop); 2506 2507 /** 2508 * phylink_rx_clk_stop_block() - block PHY ability to stop receive clock in LPI 2509 * @pl: a pointer to a &struct phylink returned from phylink_create() 2510 * 2511 * Disable the PHY's ability to stop the receive clock while the receive path 2512 * is in EEE LPI state, until the number of calls to phylink_rx_clk_stop_block() 2513 * are balanced by calls to phylink_rx_clk_stop_unblock(). 2514 */ 2515 void phylink_rx_clk_stop_block(struct phylink *pl) 2516 { 2517 ASSERT_RTNL(); 2518 2519 if (pl->mac_rx_clk_stop_blocked == U8_MAX) { 2520 phylink_warn(pl, "%s called too many times - ignoring\n", 2521 __func__); 2522 dump_stack(); 2523 return; 2524 } 2525 2526 /* Disable PHY receive clock stop if this is the first time this 2527 * function has been called and clock-stop was previously enabled. 2528 */ 2529 if (pl->mac_rx_clk_stop_blocked++ == 0 && 2530 pl->mac_supports_eee_ops && pl->phydev && 2531 pl->config->eee_rx_clk_stop_enable) 2532 phy_eee_rx_clock_stop(pl->phydev, false); 2533 } 2534 EXPORT_SYMBOL_GPL(phylink_rx_clk_stop_block); 2535 2536 /** 2537 * phylink_rx_clk_stop_unblock() - unblock PHY ability to stop receive clock 2538 * @pl: a pointer to a &struct phylink returned from phylink_create() 2539 * 2540 * All calls to phylink_rx_clk_stop_block() must be balanced with a 2541 * corresponding call to phylink_rx_clk_stop_unblock() to restore the PHYs 2542 * ability to stop the receive clock when the receive path is in EEE LPI mode. 2543 */ 2544 void phylink_rx_clk_stop_unblock(struct phylink *pl) 2545 { 2546 ASSERT_RTNL(); 2547 2548 if (pl->mac_rx_clk_stop_blocked == 0) { 2549 phylink_warn(pl, "%s called too many times - ignoring\n", 2550 __func__); 2551 dump_stack(); 2552 return; 2553 } 2554 2555 /* Re-enable PHY receive clock stop if the number of unblocks matches 2556 * the number of calls to the block function above. 2557 */ 2558 if (--pl->mac_rx_clk_stop_blocked == 0 && 2559 pl->mac_supports_eee_ops && pl->phydev && 2560 pl->config->eee_rx_clk_stop_enable) 2561 phy_eee_rx_clock_stop(pl->phydev, true); 2562 } 2563 EXPORT_SYMBOL_GPL(phylink_rx_clk_stop_unblock); 2564 2565 /** 2566 * phylink_suspend() - handle a network device suspend event 2567 * @pl: a pointer to a &struct phylink returned from phylink_create() 2568 * @mac_wol: true if the MAC needs to receive packets for Wake-on-Lan 2569 * 2570 * Handle a network device suspend event. There are several cases: 2571 * 2572 * - If Wake-on-Lan is not active, we can bring down the link between 2573 * the MAC and PHY by calling phylink_stop(). 2574 * - If Wake-on-Lan is active, and being handled only by the PHY, we 2575 * can also bring down the link between the MAC and PHY. 2576 * - If Wake-on-Lan is active, but being handled by the MAC, the MAC 2577 * still needs to receive packets, so we can not bring the link down. 2578 */ 2579 void phylink_suspend(struct phylink *pl, bool mac_wol) 2580 { 2581 ASSERT_RTNL(); 2582 2583 if (mac_wol && (!pl->netdev || pl->netdev->ethtool->wol_enabled)) { 2584 /* Wake-on-Lan enabled, MAC handling */ 2585 mutex_lock(&pl->state_mutex); 2586 2587 /* Stop the resolver bringing the link up */ 2588 __set_bit(PHYLINK_DISABLE_MAC_WOL, &pl->phylink_disable_state); 2589 2590 pl->suspend_link_up = phylink_link_is_up(pl); 2591 if (pl->suspend_link_up) { 2592 /* Disable the carrier, to prevent transmit timeouts, 2593 * but one would hope all packets have been sent. This 2594 * also means phylink_resolve() will do nothing. 2595 */ 2596 if (pl->netdev) 2597 netif_carrier_off(pl->netdev); 2598 pl->old_link_state = false; 2599 } 2600 2601 /* We do not call mac_link_down() here as we want the 2602 * link to remain up to receive the WoL packets. 2603 */ 2604 mutex_unlock(&pl->state_mutex); 2605 } else { 2606 phylink_stop(pl); 2607 } 2608 } 2609 EXPORT_SYMBOL_GPL(phylink_suspend); 2610 2611 /** 2612 * phylink_prepare_resume() - prepare to resume a network device 2613 * @pl: a pointer to a &struct phylink returned from phylink_create() 2614 * 2615 * Optional, but if called must be called prior to phylink_resume(). 2616 * 2617 * Prepare to resume a network device, preparing the PHY as necessary. 2618 */ 2619 void phylink_prepare_resume(struct phylink *pl) 2620 { 2621 struct phy_device *phydev = pl->phydev; 2622 2623 ASSERT_RTNL(); 2624 2625 /* IEEE 802.3 22.2.4.1.5 allows PHYs to stop their receive clock 2626 * when PDOWN is set. However, some MACs require RXC to be running 2627 * in order to resume. If the MAC requires RXC, and we have a PHY, 2628 * then resume the PHY. Note that 802.3 allows PHYs 500ms before 2629 * the clock meets requirements. We do not implement this delay. 2630 */ 2631 if (pl->config->mac_requires_rxc && phydev && phydev->suspended) 2632 phy_resume(phydev); 2633 } 2634 EXPORT_SYMBOL_GPL(phylink_prepare_resume); 2635 2636 /** 2637 * phylink_resume() - handle a network device resume event 2638 * @pl: a pointer to a &struct phylink returned from phylink_create() 2639 * 2640 * Undo the effects of phylink_suspend(), returning the link to an 2641 * operational state. 2642 */ 2643 void phylink_resume(struct phylink *pl) 2644 { 2645 ASSERT_RTNL(); 2646 2647 if (test_bit(PHYLINK_DISABLE_MAC_WOL, &pl->phylink_disable_state)) { 2648 /* Wake-on-Lan enabled, MAC handling */ 2649 2650 if (pl->suspend_link_up) { 2651 /* Call mac_link_down() so we keep the overall state 2652 * balanced. Do this under the state_mutex lock for 2653 * consistency. This will cause a "Link Down" message 2654 * to be printed during resume, which is harmless - 2655 * the true link state will be printed when we run a 2656 * resolve. 2657 */ 2658 mutex_lock(&pl->state_mutex); 2659 phylink_link_down(pl); 2660 mutex_unlock(&pl->state_mutex); 2661 } 2662 2663 /* Re-apply the link parameters so that all the settings get 2664 * restored to the MAC. 2665 */ 2666 phylink_mac_initial_config(pl, true); 2667 2668 /* Re-enable and re-resolve the link parameters */ 2669 phylink_enable_and_run_resolve(pl, PHYLINK_DISABLE_MAC_WOL); 2670 } else { 2671 phylink_start(pl); 2672 } 2673 } 2674 EXPORT_SYMBOL_GPL(phylink_resume); 2675 2676 /** 2677 * phylink_ethtool_get_wol() - get the wake on lan parameters for the PHY 2678 * @pl: a pointer to a &struct phylink returned from phylink_create() 2679 * @wol: a pointer to &struct ethtool_wolinfo to hold the read parameters 2680 * 2681 * Read the wake on lan parameters from the PHY attached to the phylink 2682 * instance specified by @pl. If no PHY is currently attached, report no 2683 * support for wake on lan. 2684 */ 2685 void phylink_ethtool_get_wol(struct phylink *pl, struct ethtool_wolinfo *wol) 2686 { 2687 ASSERT_RTNL(); 2688 2689 wol->supported = 0; 2690 wol->wolopts = 0; 2691 2692 if (pl->phydev) 2693 phy_ethtool_get_wol(pl->phydev, wol); 2694 } 2695 EXPORT_SYMBOL_GPL(phylink_ethtool_get_wol); 2696 2697 /** 2698 * phylink_ethtool_set_wol() - set wake on lan parameters 2699 * @pl: a pointer to a &struct phylink returned from phylink_create() 2700 * @wol: a pointer to &struct ethtool_wolinfo for the desired parameters 2701 * 2702 * Set the wake on lan parameters for the PHY attached to the phylink 2703 * instance specified by @pl. If no PHY is attached, returns %EOPNOTSUPP 2704 * error. 2705 * 2706 * Returns zero on success or negative errno code. 2707 */ 2708 int phylink_ethtool_set_wol(struct phylink *pl, struct ethtool_wolinfo *wol) 2709 { 2710 int ret = -EOPNOTSUPP; 2711 2712 ASSERT_RTNL(); 2713 2714 if (pl->phydev) 2715 ret = phy_ethtool_set_wol(pl->phydev, wol); 2716 2717 return ret; 2718 } 2719 EXPORT_SYMBOL_GPL(phylink_ethtool_set_wol); 2720 2721 static phy_interface_t phylink_sfp_select_interface(struct phylink *pl, 2722 const unsigned long *link_modes) 2723 { 2724 phy_interface_t interface; 2725 2726 interface = sfp_select_interface(pl->sfp_bus, link_modes); 2727 if (interface == PHY_INTERFACE_MODE_NA) { 2728 phylink_err(pl, 2729 "selection of interface failed, advertisement %*pb\n", 2730 __ETHTOOL_LINK_MODE_MASK_NBITS, 2731 link_modes); 2732 return interface; 2733 } 2734 2735 if (!test_bit(interface, pl->config->supported_interfaces)) { 2736 phylink_err(pl, 2737 "selection of interface failed, SFP selected %s (%u) but MAC supports %*pbl\n", 2738 phy_modes(interface), interface, 2739 (int)PHY_INTERFACE_MODE_MAX, 2740 pl->config->supported_interfaces); 2741 return PHY_INTERFACE_MODE_NA; 2742 } 2743 2744 return interface; 2745 } 2746 2747 static phy_interface_t phylink_sfp_select_interface_speed(struct phylink *pl, 2748 u32 speed) 2749 { 2750 phy_interface_t best_interface = PHY_INTERFACE_MODE_NA; 2751 phy_interface_t interface; 2752 u32 max_speed; 2753 int i; 2754 2755 for (i = 0; i < ARRAY_SIZE(phylink_sfp_interface_preference); i++) { 2756 interface = phylink_sfp_interface_preference[i]; 2757 if (!test_bit(interface, pl->sfp_interfaces)) 2758 continue; 2759 2760 max_speed = phylink_interface_max_speed(interface); 2761 2762 /* The logic here is: if speed == max_speed, then we've found 2763 * the best interface. Otherwise we find the interface that 2764 * can just support the requested speed. 2765 */ 2766 if (max_speed >= speed) 2767 best_interface = interface; 2768 2769 if (max_speed <= speed) 2770 break; 2771 } 2772 2773 if (best_interface == PHY_INTERFACE_MODE_NA) 2774 phylink_err(pl, "selection of interface failed, speed %u\n", 2775 speed); 2776 2777 return best_interface; 2778 } 2779 2780 static void phylink_merge_link_mode(unsigned long *dst, const unsigned long *b) 2781 { 2782 __ETHTOOL_DECLARE_LINK_MODE_MASK(mask); 2783 2784 linkmode_zero(mask); 2785 phylink_set_port_modes(mask); 2786 2787 linkmode_and(dst, dst, mask); 2788 linkmode_or(dst, dst, b); 2789 } 2790 2791 static void phylink_get_ksettings(const struct phylink_link_state *state, 2792 struct ethtool_link_ksettings *kset) 2793 { 2794 phylink_merge_link_mode(kset->link_modes.advertising, state->advertising); 2795 linkmode_copy(kset->link_modes.lp_advertising, state->lp_advertising); 2796 if (kset->base.rate_matching == RATE_MATCH_NONE) { 2797 kset->base.speed = state->speed; 2798 kset->base.duplex = state->duplex; 2799 } 2800 kset->base.autoneg = linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, 2801 state->advertising) ? 2802 AUTONEG_ENABLE : AUTONEG_DISABLE; 2803 } 2804 2805 /** 2806 * phylink_ethtool_ksettings_get() - get the current link settings 2807 * @pl: a pointer to a &struct phylink returned from phylink_create() 2808 * @kset: a pointer to a &struct ethtool_link_ksettings to hold link settings 2809 * 2810 * Read the current link settings for the phylink instance specified by @pl. 2811 * This will be the link settings read from the MAC, PHY or fixed link 2812 * settings depending on the current negotiation mode. 2813 */ 2814 int phylink_ethtool_ksettings_get(struct phylink *pl, 2815 struct ethtool_link_ksettings *kset) 2816 { 2817 struct phylink_link_state link_state; 2818 2819 ASSERT_RTNL(); 2820 2821 if (pl->phydev) 2822 phy_ethtool_ksettings_get(pl->phydev, kset); 2823 else 2824 kset->base.port = pl->link_port; 2825 2826 linkmode_copy(kset->link_modes.supported, pl->supported); 2827 2828 switch (pl->act_link_an_mode) { 2829 case MLO_AN_FIXED: 2830 /* We are using fixed settings. Report these as the 2831 * current link settings - and note that these also 2832 * represent the supported speeds/duplex/pause modes. 2833 */ 2834 phylink_get_fixed_state(pl, &link_state); 2835 phylink_get_ksettings(&link_state, kset); 2836 break; 2837 2838 case MLO_AN_INBAND: 2839 /* If there is a phy attached, then use the reported 2840 * settings from the phy with no modification. 2841 */ 2842 if (pl->phydev) 2843 break; 2844 2845 phylink_mac_pcs_get_state(pl, &link_state); 2846 2847 /* The MAC is reporting the link results from its own PCS 2848 * layer via in-band status. Report these as the current 2849 * link settings. 2850 */ 2851 phylink_get_ksettings(&link_state, kset); 2852 break; 2853 } 2854 2855 return 0; 2856 } 2857 EXPORT_SYMBOL_GPL(phylink_ethtool_ksettings_get); 2858 2859 static bool phylink_validate_pcs_inband_autoneg(struct phylink *pl, 2860 phy_interface_t interface, 2861 unsigned long *adv) 2862 { 2863 unsigned int inband = phylink_inband_caps(pl, interface); 2864 unsigned int mask; 2865 2866 /* If the PCS doesn't implement inband support, be permissive. */ 2867 if (!inband) 2868 return true; 2869 2870 if (linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, adv)) 2871 mask = LINK_INBAND_ENABLE; 2872 else 2873 mask = LINK_INBAND_DISABLE; 2874 2875 /* Check whether the PCS implements the required mode */ 2876 return !!(inband & mask); 2877 } 2878 2879 /** 2880 * phylink_ethtool_ksettings_set() - set the link settings 2881 * @pl: a pointer to a &struct phylink returned from phylink_create() 2882 * @kset: a pointer to a &struct ethtool_link_ksettings for the desired modes 2883 */ 2884 int phylink_ethtool_ksettings_set(struct phylink *pl, 2885 const struct ethtool_link_ksettings *kset) 2886 { 2887 __ETHTOOL_DECLARE_LINK_MODE_MASK(support); 2888 const struct link_capabilities *c; 2889 struct phylink_link_state config; 2890 2891 ASSERT_RTNL(); 2892 2893 if (pl->phydev) { 2894 struct ethtool_link_ksettings phy_kset = *kset; 2895 2896 linkmode_and(phy_kset.link_modes.advertising, 2897 phy_kset.link_modes.advertising, 2898 pl->supported); 2899 2900 /* We can rely on phylib for this update; we also do not need 2901 * to update the pl->link_config settings: 2902 * - the configuration returned via ksettings_get() will come 2903 * from phylib whenever a PHY is present. 2904 * - link_config.interface will be updated by the PHY calling 2905 * back via phylink_phy_change() and a subsequent resolve. 2906 * - initial link configuration for PHY mode comes from the 2907 * last phy state updated via phylink_phy_change(). 2908 * - other configuration changes (e.g. pause modes) are 2909 * performed directly via phylib. 2910 * - if in in-band mode with a PHY, the link configuration 2911 * is passed on the link from the PHY, and all of 2912 * link_config.{speed,duplex,an_enabled,pause} are not used. 2913 * - the only possible use would be link_config.advertising 2914 * pause modes when in 1000base-X mode with a PHY, but in 2915 * the presence of a PHY, this should not be changed as that 2916 * should be determined from the media side advertisement. 2917 */ 2918 return phy_ethtool_ksettings_set(pl->phydev, &phy_kset); 2919 } 2920 2921 config = pl->link_config; 2922 /* Mask out unsupported advertisements */ 2923 linkmode_and(config.advertising, kset->link_modes.advertising, 2924 pl->supported); 2925 2926 /* FIXME: should we reject autoneg if phy/mac does not support it? */ 2927 switch (kset->base.autoneg) { 2928 case AUTONEG_DISABLE: 2929 /* Autonegotiation disabled, select a suitable speed and 2930 * duplex. 2931 */ 2932 c = phy_caps_lookup(kset->base.speed, kset->base.duplex, 2933 pl->supported, false); 2934 if (!c) 2935 return -EINVAL; 2936 2937 /* If we have a fixed link, refuse to change link parameters. 2938 * If the link parameters match, accept them but do nothing. 2939 */ 2940 if (pl->req_link_an_mode == MLO_AN_FIXED) { 2941 if (c->speed != pl->link_config.speed || 2942 c->duplex != pl->link_config.duplex) 2943 return -EINVAL; 2944 return 0; 2945 } 2946 2947 config.speed = c->speed; 2948 config.duplex = c->duplex; 2949 break; 2950 2951 case AUTONEG_ENABLE: 2952 /* If we have a fixed link, allow autonegotiation (since that 2953 * is our default case) but do not allow the advertisement to 2954 * be changed. If the advertisement matches, simply return. 2955 */ 2956 if (pl->req_link_an_mode == MLO_AN_FIXED) { 2957 if (!linkmode_equal(config.advertising, 2958 pl->link_config.advertising)) 2959 return -EINVAL; 2960 return 0; 2961 } 2962 2963 config.speed = SPEED_UNKNOWN; 2964 config.duplex = DUPLEX_UNKNOWN; 2965 break; 2966 2967 default: 2968 return -EINVAL; 2969 } 2970 2971 /* We have ruled out the case with a PHY attached, and the 2972 * fixed-link cases. All that is left are in-band links. 2973 */ 2974 linkmode_mod_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, config.advertising, 2975 kset->base.autoneg == AUTONEG_ENABLE); 2976 2977 /* If this link is with an SFP, ensure that changes to advertised modes 2978 * also cause the associated interface to be selected such that the 2979 * link can be configured correctly. 2980 */ 2981 if (pl->sfp_bus) { 2982 if (kset->base.autoneg == AUTONEG_ENABLE) 2983 config.interface = 2984 phylink_sfp_select_interface(pl, 2985 config.advertising); 2986 else 2987 config.interface = 2988 phylink_sfp_select_interface_speed(pl, 2989 config.speed); 2990 if (config.interface == PHY_INTERFACE_MODE_NA) 2991 return -EINVAL; 2992 2993 /* Revalidate with the selected interface */ 2994 linkmode_copy(support, pl->supported); 2995 if (phylink_validate(pl, support, &config)) { 2996 phylink_err(pl, "validation of %s/%s with support %*pb failed\n", 2997 phylink_an_mode_str(pl->req_link_an_mode), 2998 phy_modes(config.interface), 2999 __ETHTOOL_LINK_MODE_MASK_NBITS, support); 3000 return -EINVAL; 3001 } 3002 } else { 3003 /* Validate without changing the current supported mask. */ 3004 linkmode_copy(support, pl->supported); 3005 if (phylink_validate(pl, support, &config)) 3006 return -EINVAL; 3007 } 3008 3009 /* If autonegotiation is enabled, we must have an advertisement */ 3010 if (linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, 3011 config.advertising) && 3012 phylink_is_empty_linkmode(config.advertising)) 3013 return -EINVAL; 3014 3015 /* Validate the autonegotiation state. We don't have a PHY in this 3016 * situation, so the PCS is the media-facing entity. 3017 */ 3018 if (!phylink_validate_pcs_inband_autoneg(pl, config.interface, 3019 config.advertising)) 3020 return -EINVAL; 3021 3022 mutex_lock(&pl->state_mutex); 3023 pl->link_config.speed = config.speed; 3024 pl->link_config.duplex = config.duplex; 3025 3026 if (pl->link_config.interface != config.interface) { 3027 /* The interface changed, e.g. 1000base-X <-> 2500base-X */ 3028 /* We need to force the link down, then change the interface */ 3029 if (pl->old_link_state) { 3030 phylink_link_down(pl); 3031 pl->old_link_state = false; 3032 } 3033 if (!test_bit(PHYLINK_DISABLE_STOPPED, 3034 &pl->phylink_disable_state)) 3035 phylink_major_config(pl, false, &config); 3036 pl->link_config.interface = config.interface; 3037 linkmode_copy(pl->link_config.advertising, config.advertising); 3038 } else if (!linkmode_equal(pl->link_config.advertising, 3039 config.advertising)) { 3040 linkmode_copy(pl->link_config.advertising, config.advertising); 3041 phylink_change_inband_advert(pl); 3042 } 3043 mutex_unlock(&pl->state_mutex); 3044 3045 return 0; 3046 } 3047 EXPORT_SYMBOL_GPL(phylink_ethtool_ksettings_set); 3048 3049 /** 3050 * phylink_ethtool_nway_reset() - restart negotiation 3051 * @pl: a pointer to a &struct phylink returned from phylink_create() 3052 * 3053 * Restart negotiation for the phylink instance specified by @pl. This will 3054 * cause any attached phy to restart negotiation with the link partner, and 3055 * if the MAC is in a BaseX mode, the MAC will also be requested to restart 3056 * negotiation. 3057 * 3058 * Returns zero on success, or negative error code. 3059 */ 3060 int phylink_ethtool_nway_reset(struct phylink *pl) 3061 { 3062 int ret = 0; 3063 3064 ASSERT_RTNL(); 3065 3066 if (pl->phydev) 3067 ret = phy_restart_aneg(pl->phydev); 3068 phylink_pcs_an_restart(pl); 3069 3070 return ret; 3071 } 3072 EXPORT_SYMBOL_GPL(phylink_ethtool_nway_reset); 3073 3074 /** 3075 * phylink_ethtool_get_pauseparam() - get the current pause parameters 3076 * @pl: a pointer to a &struct phylink returned from phylink_create() 3077 * @pause: a pointer to a &struct ethtool_pauseparam 3078 */ 3079 void phylink_ethtool_get_pauseparam(struct phylink *pl, 3080 struct ethtool_pauseparam *pause) 3081 { 3082 ASSERT_RTNL(); 3083 3084 pause->autoneg = !!(pl->link_config.pause & MLO_PAUSE_AN); 3085 pause->rx_pause = !!(pl->link_config.pause & MLO_PAUSE_RX); 3086 pause->tx_pause = !!(pl->link_config.pause & MLO_PAUSE_TX); 3087 } 3088 EXPORT_SYMBOL_GPL(phylink_ethtool_get_pauseparam); 3089 3090 /** 3091 * phylink_ethtool_set_pauseparam() - set the current pause parameters 3092 * @pl: a pointer to a &struct phylink returned from phylink_create() 3093 * @pause: a pointer to a &struct ethtool_pauseparam 3094 */ 3095 int phylink_ethtool_set_pauseparam(struct phylink *pl, 3096 struct ethtool_pauseparam *pause) 3097 { 3098 struct phylink_link_state *config = &pl->link_config; 3099 bool manual_changed; 3100 int pause_state; 3101 3102 ASSERT_RTNL(); 3103 3104 if (pl->req_link_an_mode == MLO_AN_FIXED) 3105 return -EOPNOTSUPP; 3106 3107 if (!phylink_test(pl->supported, Pause) && 3108 !phylink_test(pl->supported, Asym_Pause)) 3109 return -EOPNOTSUPP; 3110 3111 if (!phylink_test(pl->supported, Asym_Pause) && 3112 pause->rx_pause != pause->tx_pause) 3113 return -EINVAL; 3114 3115 pause_state = 0; 3116 if (pause->autoneg) 3117 pause_state |= MLO_PAUSE_AN; 3118 if (pause->rx_pause) 3119 pause_state |= MLO_PAUSE_RX; 3120 if (pause->tx_pause) 3121 pause_state |= MLO_PAUSE_TX; 3122 3123 mutex_lock(&pl->state_mutex); 3124 /* 3125 * See the comments for linkmode_set_pause(), wrt the deficiencies 3126 * with the current implementation. A solution to this issue would 3127 * be: 3128 * ethtool Local device 3129 * rx tx Pause AsymDir 3130 * 0 0 0 0 3131 * 1 0 1 1 3132 * 0 1 0 1 3133 * 1 1 1 1 3134 * and then use the ethtool rx/tx enablement status to mask the 3135 * rx/tx pause resolution. 3136 */ 3137 linkmode_set_pause(config->advertising, pause->tx_pause, 3138 pause->rx_pause); 3139 3140 manual_changed = (config->pause ^ pause_state) & MLO_PAUSE_AN || 3141 (!(pause_state & MLO_PAUSE_AN) && 3142 (config->pause ^ pause_state) & MLO_PAUSE_TXRX_MASK); 3143 3144 config->pause = pause_state; 3145 3146 /* Update our in-band advertisement, triggering a renegotiation if 3147 * the advertisement changed. 3148 */ 3149 if (!pl->phydev) 3150 phylink_change_inband_advert(pl); 3151 3152 mutex_unlock(&pl->state_mutex); 3153 3154 /* If we have a PHY, a change of the pause frame advertisement will 3155 * cause phylib to renegotiate (if AN is enabled) which will in turn 3156 * call our phylink_phy_change() and trigger a resolve. Note that 3157 * we can't hold our state mutex while calling phy_set_asym_pause(). 3158 */ 3159 if (pl->phydev) 3160 phy_set_asym_pause(pl->phydev, pause->rx_pause, 3161 pause->tx_pause); 3162 3163 /* If the manual pause settings changed, make sure we trigger a 3164 * resolve to update their state; we can not guarantee that the 3165 * link will cycle. 3166 */ 3167 if (manual_changed) { 3168 pl->link_failed = true; 3169 phylink_run_resolve(pl); 3170 } 3171 3172 return 0; 3173 } 3174 EXPORT_SYMBOL_GPL(phylink_ethtool_set_pauseparam); 3175 3176 /** 3177 * phylink_get_eee_err() - read the energy efficient ethernet error 3178 * counter 3179 * @pl: a pointer to a &struct phylink returned from phylink_create(). 3180 * 3181 * Read the Energy Efficient Ethernet error counter from the PHY associated 3182 * with the phylink instance specified by @pl. 3183 * 3184 * Returns positive error counter value, or negative error code. 3185 */ 3186 int phylink_get_eee_err(struct phylink *pl) 3187 { 3188 int ret = 0; 3189 3190 ASSERT_RTNL(); 3191 3192 if (pl->phydev) 3193 ret = phy_get_eee_err(pl->phydev); 3194 3195 return ret; 3196 } 3197 EXPORT_SYMBOL_GPL(phylink_get_eee_err); 3198 3199 /** 3200 * phylink_ethtool_get_eee() - read the energy efficient ethernet parameters 3201 * @pl: a pointer to a &struct phylink returned from phylink_create() 3202 * @eee: a pointer to a &struct ethtool_keee for the read parameters 3203 */ 3204 int phylink_ethtool_get_eee(struct phylink *pl, struct ethtool_keee *eee) 3205 { 3206 int ret = -EOPNOTSUPP; 3207 3208 ASSERT_RTNL(); 3209 3210 if (pl->mac_supports_eee_ops && !pl->mac_supports_eee) 3211 return ret; 3212 3213 if (pl->phydev) { 3214 ret = phy_ethtool_get_eee(pl->phydev, eee); 3215 /* Restrict supported linkmode mask */ 3216 if (ret == 0 && pl->mac_supports_eee_ops) 3217 linkmode_and(eee->supported, eee->supported, 3218 pl->supported_lpi); 3219 } 3220 3221 return ret; 3222 } 3223 EXPORT_SYMBOL_GPL(phylink_ethtool_get_eee); 3224 3225 /** 3226 * phylink_ethtool_set_eee() - set the energy efficient ethernet parameters 3227 * @pl: a pointer to a &struct phylink returned from phylink_create() 3228 * @eee: a pointer to a &struct ethtool_keee for the desired parameters 3229 */ 3230 int phylink_ethtool_set_eee(struct phylink *pl, struct ethtool_keee *eee) 3231 { 3232 bool mac_eee = pl->mac_supports_eee; 3233 int ret = -EOPNOTSUPP; 3234 3235 ASSERT_RTNL(); 3236 3237 phylink_dbg(pl, "mac %s phylink EEE%s, adv %*pbl, LPI%s timer %uus\n", 3238 mac_eee ? "supports" : "does not support", 3239 eee->eee_enabled ? ", enabled" : "", 3240 __ETHTOOL_LINK_MODE_MASK_NBITS, eee->advertised, 3241 eee->tx_lpi_enabled ? " enabled" : "", eee->tx_lpi_timer); 3242 3243 if (pl->mac_supports_eee_ops && !mac_eee) 3244 return ret; 3245 3246 if (pl->phydev) { 3247 /* Restrict advertisement mask */ 3248 if (pl->mac_supports_eee_ops) 3249 linkmode_and(eee->advertised, eee->advertised, 3250 pl->supported_lpi); 3251 ret = phy_ethtool_set_eee(pl->phydev, eee); 3252 if (ret == 0) 3253 eee_to_eeecfg(&pl->eee_cfg, eee); 3254 } 3255 3256 return ret; 3257 } 3258 EXPORT_SYMBOL_GPL(phylink_ethtool_set_eee); 3259 3260 /* This emulates MII registers for a fixed-mode phy operating as per the 3261 * passed in state. "aneg" defines if we report negotiation is possible. 3262 * 3263 * FIXME: should deal with negotiation state too. 3264 */ 3265 static int phylink_mii_emul_read(unsigned int reg, 3266 struct phylink_link_state *state) 3267 { 3268 struct fixed_phy_status fs; 3269 unsigned long *lpa = state->lp_advertising; 3270 int val; 3271 3272 fs.link = state->link; 3273 fs.speed = state->speed; 3274 fs.duplex = state->duplex; 3275 fs.pause = test_bit(ETHTOOL_LINK_MODE_Pause_BIT, lpa); 3276 fs.asym_pause = test_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, lpa); 3277 3278 val = swphy_read_reg(reg, &fs); 3279 if (reg == MII_BMSR) { 3280 if (!state->an_complete) 3281 val &= ~BMSR_ANEGCOMPLETE; 3282 } 3283 return val; 3284 } 3285 3286 static int phylink_phy_read(struct phylink *pl, unsigned int phy_id, 3287 unsigned int reg) 3288 { 3289 struct phy_device *phydev = pl->phydev; 3290 int prtad, devad; 3291 3292 if (mdio_phy_id_is_c45(phy_id)) { 3293 prtad = mdio_phy_id_prtad(phy_id); 3294 devad = mdio_phy_id_devad(phy_id); 3295 return mdiobus_c45_read(pl->phydev->mdio.bus, prtad, devad, 3296 reg); 3297 } 3298 3299 if (phydev->is_c45) { 3300 switch (reg) { 3301 case MII_BMCR: 3302 case MII_BMSR: 3303 case MII_PHYSID1: 3304 case MII_PHYSID2: 3305 devad = __ffs(phydev->c45_ids.mmds_present); 3306 break; 3307 case MII_ADVERTISE: 3308 case MII_LPA: 3309 if (!(phydev->c45_ids.mmds_present & MDIO_DEVS_AN)) 3310 return -EINVAL; 3311 devad = MDIO_MMD_AN; 3312 if (reg == MII_ADVERTISE) 3313 reg = MDIO_AN_ADVERTISE; 3314 else 3315 reg = MDIO_AN_LPA; 3316 break; 3317 default: 3318 return -EINVAL; 3319 } 3320 prtad = phy_id; 3321 return mdiobus_c45_read(pl->phydev->mdio.bus, prtad, devad, 3322 reg); 3323 } 3324 3325 return mdiobus_read(pl->phydev->mdio.bus, phy_id, reg); 3326 } 3327 3328 static int phylink_phy_write(struct phylink *pl, unsigned int phy_id, 3329 unsigned int reg, unsigned int val) 3330 { 3331 struct phy_device *phydev = pl->phydev; 3332 int prtad, devad; 3333 3334 if (mdio_phy_id_is_c45(phy_id)) { 3335 prtad = mdio_phy_id_prtad(phy_id); 3336 devad = mdio_phy_id_devad(phy_id); 3337 return mdiobus_c45_write(pl->phydev->mdio.bus, prtad, devad, 3338 reg, val); 3339 } 3340 3341 if (phydev->is_c45) { 3342 switch (reg) { 3343 case MII_BMCR: 3344 case MII_BMSR: 3345 case MII_PHYSID1: 3346 case MII_PHYSID2: 3347 devad = __ffs(phydev->c45_ids.mmds_present); 3348 break; 3349 case MII_ADVERTISE: 3350 case MII_LPA: 3351 if (!(phydev->c45_ids.mmds_present & MDIO_DEVS_AN)) 3352 return -EINVAL; 3353 devad = MDIO_MMD_AN; 3354 if (reg == MII_ADVERTISE) 3355 reg = MDIO_AN_ADVERTISE; 3356 else 3357 reg = MDIO_AN_LPA; 3358 break; 3359 default: 3360 return -EINVAL; 3361 } 3362 return mdiobus_c45_write(pl->phydev->mdio.bus, phy_id, devad, 3363 reg, val); 3364 } 3365 3366 return mdiobus_write(phydev->mdio.bus, phy_id, reg, val); 3367 } 3368 3369 static int phylink_mii_read(struct phylink *pl, unsigned int phy_id, 3370 unsigned int reg) 3371 { 3372 struct phylink_link_state state; 3373 int val = 0xffff; 3374 3375 switch (pl->act_link_an_mode) { 3376 case MLO_AN_FIXED: 3377 if (phy_id == 0) { 3378 phylink_get_fixed_state(pl, &state); 3379 val = phylink_mii_emul_read(reg, &state); 3380 } 3381 break; 3382 3383 case MLO_AN_PHY: 3384 return -EOPNOTSUPP; 3385 3386 case MLO_AN_INBAND: 3387 if (phy_id == 0) { 3388 phylink_mac_pcs_get_state(pl, &state); 3389 val = phylink_mii_emul_read(reg, &state); 3390 } 3391 break; 3392 } 3393 3394 return val & 0xffff; 3395 } 3396 3397 static int phylink_mii_write(struct phylink *pl, unsigned int phy_id, 3398 unsigned int reg, unsigned int val) 3399 { 3400 switch (pl->act_link_an_mode) { 3401 case MLO_AN_FIXED: 3402 break; 3403 3404 case MLO_AN_PHY: 3405 return -EOPNOTSUPP; 3406 3407 case MLO_AN_INBAND: 3408 break; 3409 } 3410 3411 return 0; 3412 } 3413 3414 /** 3415 * phylink_mii_ioctl() - generic mii ioctl interface 3416 * @pl: a pointer to a &struct phylink returned from phylink_create() 3417 * @ifr: a pointer to a &struct ifreq for socket ioctls 3418 * @cmd: ioctl cmd to execute 3419 * 3420 * Perform the specified MII ioctl on the PHY attached to the phylink instance 3421 * specified by @pl. If no PHY is attached, emulate the presence of the PHY. 3422 * 3423 * Returns: zero on success or negative error code. 3424 * 3425 * %SIOCGMIIPHY: 3426 * read register from the current PHY. 3427 * %SIOCGMIIREG: 3428 * read register from the specified PHY. 3429 * %SIOCSMIIREG: 3430 * set a register on the specified PHY. 3431 */ 3432 int phylink_mii_ioctl(struct phylink *pl, struct ifreq *ifr, int cmd) 3433 { 3434 struct mii_ioctl_data *mii = if_mii(ifr); 3435 int ret; 3436 3437 ASSERT_RTNL(); 3438 3439 if (pl->phydev) { 3440 /* PHYs only exist for MLO_AN_PHY and SGMII */ 3441 switch (cmd) { 3442 case SIOCGMIIPHY: 3443 mii->phy_id = pl->phydev->mdio.addr; 3444 fallthrough; 3445 3446 case SIOCGMIIREG: 3447 ret = phylink_phy_read(pl, mii->phy_id, mii->reg_num); 3448 if (ret >= 0) { 3449 mii->val_out = ret; 3450 ret = 0; 3451 } 3452 break; 3453 3454 case SIOCSMIIREG: 3455 ret = phylink_phy_write(pl, mii->phy_id, mii->reg_num, 3456 mii->val_in); 3457 break; 3458 3459 default: 3460 ret = phy_mii_ioctl(pl->phydev, ifr, cmd); 3461 break; 3462 } 3463 } else { 3464 switch (cmd) { 3465 case SIOCGMIIPHY: 3466 mii->phy_id = 0; 3467 fallthrough; 3468 3469 case SIOCGMIIREG: 3470 ret = phylink_mii_read(pl, mii->phy_id, mii->reg_num); 3471 if (ret >= 0) { 3472 mii->val_out = ret; 3473 ret = 0; 3474 } 3475 break; 3476 3477 case SIOCSMIIREG: 3478 ret = phylink_mii_write(pl, mii->phy_id, mii->reg_num, 3479 mii->val_in); 3480 break; 3481 3482 default: 3483 ret = -EOPNOTSUPP; 3484 break; 3485 } 3486 } 3487 3488 return ret; 3489 } 3490 EXPORT_SYMBOL_GPL(phylink_mii_ioctl); 3491 3492 /** 3493 * phylink_speed_down() - set the non-SFP PHY to lowest speed supported by both 3494 * link partners 3495 * @pl: a pointer to a &struct phylink returned from phylink_create() 3496 * @sync: perform action synchronously 3497 * 3498 * If we have a PHY that is not part of a SFP module, then set the speed 3499 * as described in the phy_speed_down() function. Please see this function 3500 * for a description of the @sync parameter. 3501 * 3502 * Returns zero if there is no PHY, otherwise as per phy_speed_down(). 3503 */ 3504 int phylink_speed_down(struct phylink *pl, bool sync) 3505 { 3506 int ret = 0; 3507 3508 ASSERT_RTNL(); 3509 3510 if (!pl->sfp_bus && pl->phydev) 3511 ret = phy_speed_down(pl->phydev, sync); 3512 3513 return ret; 3514 } 3515 EXPORT_SYMBOL_GPL(phylink_speed_down); 3516 3517 /** 3518 * phylink_speed_up() - restore the advertised speeds prior to the call to 3519 * phylink_speed_down() 3520 * @pl: a pointer to a &struct phylink returned from phylink_create() 3521 * 3522 * If we have a PHY that is not part of a SFP module, then restore the 3523 * PHY speeds as per phy_speed_up(). 3524 * 3525 * Returns zero if there is no PHY, otherwise as per phy_speed_up(). 3526 */ 3527 int phylink_speed_up(struct phylink *pl) 3528 { 3529 int ret = 0; 3530 3531 ASSERT_RTNL(); 3532 3533 if (!pl->sfp_bus && pl->phydev) 3534 ret = phy_speed_up(pl->phydev); 3535 3536 return ret; 3537 } 3538 EXPORT_SYMBOL_GPL(phylink_speed_up); 3539 3540 static void phylink_sfp_attach(void *upstream, struct sfp_bus *bus) 3541 { 3542 struct phylink *pl = upstream; 3543 3544 pl->netdev->sfp_bus = bus; 3545 } 3546 3547 static void phylink_sfp_detach(void *upstream, struct sfp_bus *bus) 3548 { 3549 struct phylink *pl = upstream; 3550 3551 pl->netdev->sfp_bus = NULL; 3552 } 3553 3554 static phy_interface_t phylink_choose_sfp_interface(struct phylink *pl, 3555 const unsigned long *intf) 3556 { 3557 phy_interface_t interface; 3558 size_t i; 3559 3560 interface = PHY_INTERFACE_MODE_NA; 3561 for (i = 0; i < ARRAY_SIZE(phylink_sfp_interface_preference); i++) 3562 if (test_bit(phylink_sfp_interface_preference[i], intf)) { 3563 interface = phylink_sfp_interface_preference[i]; 3564 break; 3565 } 3566 3567 return interface; 3568 } 3569 3570 static void phylink_sfp_set_config(struct phylink *pl, unsigned long *supported, 3571 struct phylink_link_state *state, 3572 bool changed) 3573 { 3574 u8 mode = MLO_AN_INBAND; 3575 3576 phylink_dbg(pl, "requesting link mode %s/%s with support %*pb\n", 3577 phylink_an_mode_str(mode), phy_modes(state->interface), 3578 __ETHTOOL_LINK_MODE_MASK_NBITS, supported); 3579 3580 if (!linkmode_equal(pl->supported, supported)) { 3581 linkmode_copy(pl->supported, supported); 3582 changed = true; 3583 } 3584 3585 if (!linkmode_equal(pl->link_config.advertising, state->advertising)) { 3586 linkmode_copy(pl->link_config.advertising, state->advertising); 3587 changed = true; 3588 } 3589 3590 if (pl->req_link_an_mode != mode || 3591 pl->link_config.interface != state->interface) { 3592 pl->req_link_an_mode = mode; 3593 pl->link_config.interface = state->interface; 3594 3595 changed = true; 3596 3597 phylink_info(pl, "switched to %s/%s link mode\n", 3598 phylink_an_mode_str(mode), 3599 phy_modes(state->interface)); 3600 } 3601 3602 if (changed && !test_bit(PHYLINK_DISABLE_STOPPED, 3603 &pl->phylink_disable_state)) 3604 phylink_mac_initial_config(pl, false); 3605 } 3606 3607 static int phylink_sfp_config_phy(struct phylink *pl, struct phy_device *phy) 3608 { 3609 __ETHTOOL_DECLARE_LINK_MODE_MASK(support); 3610 struct phylink_link_state config; 3611 int ret; 3612 3613 /* We're not using pl->sfp_interfaces, so clear it. */ 3614 phy_interface_zero(pl->sfp_interfaces); 3615 linkmode_copy(support, phy->supported); 3616 3617 memset(&config, 0, sizeof(config)); 3618 linkmode_copy(config.advertising, phy->advertising); 3619 config.interface = PHY_INTERFACE_MODE_NA; 3620 config.speed = SPEED_UNKNOWN; 3621 config.duplex = DUPLEX_UNKNOWN; 3622 config.pause = MLO_PAUSE_AN; 3623 3624 /* Ignore errors if we're expecting a PHY to attach later */ 3625 ret = phylink_validate(pl, support, &config); 3626 if (ret) { 3627 phylink_err(pl, "validation with support %*pb failed: %pe\n", 3628 __ETHTOOL_LINK_MODE_MASK_NBITS, support, 3629 ERR_PTR(ret)); 3630 return ret; 3631 } 3632 3633 config.interface = phylink_sfp_select_interface(pl, config.advertising); 3634 if (config.interface == PHY_INTERFACE_MODE_NA) 3635 return -EINVAL; 3636 3637 /* Attach the PHY so that the PHY is present when we do the major 3638 * configuration step. 3639 */ 3640 ret = phylink_attach_phy(pl, phy, config.interface); 3641 if (ret < 0) 3642 return ret; 3643 3644 /* This will validate the configuration for us. */ 3645 ret = phylink_bringup_phy(pl, phy, config.interface); 3646 if (ret < 0) { 3647 phy_detach(phy); 3648 return ret; 3649 } 3650 3651 pl->link_port = pl->sfp_port; 3652 3653 phylink_sfp_set_config(pl, support, &config, true); 3654 3655 return 0; 3656 } 3657 3658 static int phylink_sfp_config_optical(struct phylink *pl) 3659 { 3660 __ETHTOOL_DECLARE_LINK_MODE_MASK(support); 3661 struct phylink_link_state config; 3662 enum inband_type inband_type; 3663 phy_interface_t interface; 3664 int ret; 3665 3666 phylink_dbg(pl, "optical SFP: interfaces=[mac=%*pbl, sfp=%*pbl]\n", 3667 (int)PHY_INTERFACE_MODE_MAX, 3668 pl->config->supported_interfaces, 3669 (int)PHY_INTERFACE_MODE_MAX, 3670 pl->sfp_interfaces); 3671 3672 /* Find the union of the supported interfaces by the PCS/MAC and 3673 * the SFP module. 3674 */ 3675 phy_interface_and(pl->sfp_interfaces, pl->config->supported_interfaces, 3676 pl->sfp_interfaces); 3677 if (phy_interface_empty(pl->sfp_interfaces)) { 3678 phylink_err(pl, "unsupported SFP module: no common interface modes\n"); 3679 return -EINVAL; 3680 } 3681 3682 memset(&config, 0, sizeof(config)); 3683 linkmode_copy(support, pl->sfp_support); 3684 linkmode_copy(config.advertising, pl->sfp_support); 3685 config.speed = SPEED_UNKNOWN; 3686 config.duplex = DUPLEX_UNKNOWN; 3687 config.pause = MLO_PAUSE_AN; 3688 3689 /* For all the interfaces that are supported, reduce the sfp_support 3690 * mask to only those link modes that can be supported. 3691 */ 3692 ret = phylink_validate_mask(pl, NULL, pl->sfp_support, &config, 3693 pl->sfp_interfaces); 3694 if (ret) { 3695 phylink_err(pl, "unsupported SFP module: validation with support %*pb failed\n", 3696 __ETHTOOL_LINK_MODE_MASK_NBITS, support); 3697 return ret; 3698 } 3699 3700 interface = phylink_choose_sfp_interface(pl, pl->sfp_interfaces); 3701 if (interface == PHY_INTERFACE_MODE_NA) { 3702 phylink_err(pl, "failed to select SFP interface\n"); 3703 return -EINVAL; 3704 } 3705 3706 phylink_dbg(pl, "optical SFP: chosen %s interface\n", 3707 phy_modes(interface)); 3708 3709 inband_type = phylink_get_inband_type(interface); 3710 if (inband_type == INBAND_NONE) { 3711 /* If this is the sole interface, and there is no inband 3712 * support, clear the advertising mask and Autoneg bit in 3713 * the support mask. Otherwise, just clear the Autoneg bit 3714 * in the advertising mask. 3715 */ 3716 if (phy_interface_weight(pl->sfp_interfaces) == 1) { 3717 linkmode_clear_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, 3718 pl->sfp_support); 3719 linkmode_zero(config.advertising); 3720 } else { 3721 linkmode_clear_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, 3722 config.advertising); 3723 } 3724 } 3725 3726 if (!phylink_validate_pcs_inband_autoneg(pl, interface, 3727 config.advertising)) { 3728 phylink_err(pl, "autoneg setting not compatible with PCS"); 3729 return -EINVAL; 3730 } 3731 3732 config.interface = interface; 3733 3734 /* Ignore errors if we're expecting a PHY to attach later */ 3735 ret = phylink_validate(pl, support, &config); 3736 if (ret) { 3737 phylink_err(pl, "validation with support %*pb failed: %pe\n", 3738 __ETHTOOL_LINK_MODE_MASK_NBITS, support, 3739 ERR_PTR(ret)); 3740 return ret; 3741 } 3742 3743 pl->link_port = pl->sfp_port; 3744 3745 phylink_sfp_set_config(pl, pl->sfp_support, &config, false); 3746 3747 return 0; 3748 } 3749 3750 static int phylink_sfp_module_insert(void *upstream, 3751 const struct sfp_eeprom_id *id) 3752 { 3753 const struct sfp_module_caps *caps; 3754 struct phylink *pl = upstream; 3755 3756 ASSERT_RTNL(); 3757 3758 caps = sfp_get_module_caps(pl->sfp_bus); 3759 phy_interface_copy(pl->sfp_interfaces, caps->interfaces); 3760 linkmode_copy(pl->sfp_support, caps->link_modes); 3761 pl->sfp_may_have_phy = caps->may_have_phy; 3762 pl->sfp_port = caps->port; 3763 3764 /* If this module may have a PHY connecting later, defer until later */ 3765 if (pl->sfp_may_have_phy) 3766 return 0; 3767 3768 return phylink_sfp_config_optical(pl); 3769 } 3770 3771 static void phylink_sfp_module_remove(void *upstream) 3772 { 3773 struct phylink *pl = upstream; 3774 3775 phy_interface_zero(pl->sfp_interfaces); 3776 } 3777 3778 static int phylink_sfp_module_start(void *upstream) 3779 { 3780 struct phylink *pl = upstream; 3781 3782 /* If this SFP module has a PHY, start the PHY now. */ 3783 if (pl->phydev) { 3784 phy_start(pl->phydev); 3785 return 0; 3786 } 3787 3788 /* If the module may have a PHY but we didn't detect one we 3789 * need to configure the MAC here. 3790 */ 3791 if (!pl->sfp_may_have_phy) 3792 return 0; 3793 3794 return phylink_sfp_config_optical(pl); 3795 } 3796 3797 static void phylink_sfp_module_stop(void *upstream) 3798 { 3799 struct phylink *pl = upstream; 3800 3801 /* If this SFP module has a PHY, stop it. */ 3802 if (pl->phydev) 3803 phy_stop(pl->phydev); 3804 } 3805 3806 static void phylink_sfp_link_down(void *upstream) 3807 { 3808 struct phylink *pl = upstream; 3809 3810 ASSERT_RTNL(); 3811 3812 phylink_run_resolve_and_disable(pl, PHYLINK_DISABLE_LINK); 3813 } 3814 3815 static void phylink_sfp_link_up(void *upstream) 3816 { 3817 struct phylink *pl = upstream; 3818 3819 ASSERT_RTNL(); 3820 3821 phylink_enable_and_run_resolve(pl, PHYLINK_DISABLE_LINK); 3822 } 3823 3824 static int phylink_sfp_connect_phy(void *upstream, struct phy_device *phy) 3825 { 3826 struct phylink *pl = upstream; 3827 3828 if (!phy->drv) { 3829 phylink_err(pl, "PHY %s (id 0x%.8lx) has no driver loaded\n", 3830 phydev_name(phy), (unsigned long)phy->phy_id); 3831 phylink_err(pl, "Drivers which handle known common cases: CONFIG_BCM84881_PHY, CONFIG_MARVELL_PHY\n"); 3832 return -EINVAL; 3833 } 3834 3835 /* 3836 * This is the new way of dealing with flow control for PHYs, 3837 * as described by Timur Tabi in commit 529ed1275263 ("net: phy: 3838 * phy drivers should not set SUPPORTED_[Asym_]Pause") except 3839 * using our validate call to the MAC, we rely upon the MAC 3840 * clearing the bits from both supported and advertising fields. 3841 */ 3842 phy_support_asym_pause(phy); 3843 3844 /* Set the PHY's host supported interfaces */ 3845 phy_interface_and(phy->host_interfaces, phylink_sfp_interfaces, 3846 pl->config->supported_interfaces); 3847 3848 /* Do the initial configuration */ 3849 return phylink_sfp_config_phy(pl, phy); 3850 } 3851 3852 static void phylink_sfp_disconnect_phy(void *upstream, 3853 struct phy_device *phydev) 3854 { 3855 phylink_disconnect_phy(upstream); 3856 } 3857 3858 static const struct sfp_upstream_ops sfp_phylink_ops = { 3859 .attach = phylink_sfp_attach, 3860 .detach = phylink_sfp_detach, 3861 .module_insert = phylink_sfp_module_insert, 3862 .module_remove = phylink_sfp_module_remove, 3863 .module_start = phylink_sfp_module_start, 3864 .module_stop = phylink_sfp_module_stop, 3865 .link_up = phylink_sfp_link_up, 3866 .link_down = phylink_sfp_link_down, 3867 .connect_phy = phylink_sfp_connect_phy, 3868 .disconnect_phy = phylink_sfp_disconnect_phy, 3869 }; 3870 3871 /* Helpers for MAC drivers */ 3872 3873 static struct { 3874 int bit; 3875 int speed; 3876 } phylink_c73_priority_resolution[] = { 3877 { ETHTOOL_LINK_MODE_100000baseCR4_Full_BIT, SPEED_100000 }, 3878 { ETHTOOL_LINK_MODE_100000baseKR4_Full_BIT, SPEED_100000 }, 3879 /* 100GBASE-KP4 and 100GBASE-CR10 not supported */ 3880 { ETHTOOL_LINK_MODE_40000baseCR4_Full_BIT, SPEED_40000 }, 3881 { ETHTOOL_LINK_MODE_40000baseKR4_Full_BIT, SPEED_40000 }, 3882 { ETHTOOL_LINK_MODE_10000baseKR_Full_BIT, SPEED_10000 }, 3883 { ETHTOOL_LINK_MODE_10000baseKX4_Full_BIT, SPEED_10000 }, 3884 /* 5GBASE-KR not supported */ 3885 { ETHTOOL_LINK_MODE_2500baseX_Full_BIT, SPEED_2500 }, 3886 { ETHTOOL_LINK_MODE_1000baseKX_Full_BIT, SPEED_1000 }, 3887 }; 3888 3889 void phylink_resolve_c73(struct phylink_link_state *state) 3890 { 3891 int i; 3892 3893 for (i = 0; i < ARRAY_SIZE(phylink_c73_priority_resolution); i++) { 3894 int bit = phylink_c73_priority_resolution[i].bit; 3895 if (linkmode_test_bit(bit, state->advertising) && 3896 linkmode_test_bit(bit, state->lp_advertising)) 3897 break; 3898 } 3899 3900 if (i < ARRAY_SIZE(phylink_c73_priority_resolution)) { 3901 state->speed = phylink_c73_priority_resolution[i].speed; 3902 state->duplex = DUPLEX_FULL; 3903 } else { 3904 /* negotiation failure */ 3905 state->link = false; 3906 } 3907 3908 phylink_resolve_an_pause(state); 3909 } 3910 EXPORT_SYMBOL_GPL(phylink_resolve_c73); 3911 3912 static void phylink_decode_c37_word(struct phylink_link_state *state, 3913 uint16_t config_reg, int speed) 3914 { 3915 int fd_bit; 3916 3917 if (speed == SPEED_2500) 3918 fd_bit = ETHTOOL_LINK_MODE_2500baseX_Full_BIT; 3919 else 3920 fd_bit = ETHTOOL_LINK_MODE_1000baseX_Full_BIT; 3921 3922 mii_lpa_mod_linkmode_x(state->lp_advertising, config_reg, fd_bit); 3923 3924 if (linkmode_test_bit(fd_bit, state->advertising) && 3925 linkmode_test_bit(fd_bit, state->lp_advertising)) { 3926 state->speed = speed; 3927 state->duplex = DUPLEX_FULL; 3928 } else { 3929 /* negotiation failure */ 3930 state->link = false; 3931 } 3932 3933 phylink_resolve_an_pause(state); 3934 } 3935 3936 static void phylink_decode_sgmii_word(struct phylink_link_state *state, 3937 uint16_t config_reg) 3938 { 3939 if (!(config_reg & LPA_SGMII_LINK)) { 3940 state->link = false; 3941 return; 3942 } 3943 3944 switch (config_reg & LPA_SGMII_SPD_MASK) { 3945 case LPA_SGMII_10: 3946 state->speed = SPEED_10; 3947 break; 3948 case LPA_SGMII_100: 3949 state->speed = SPEED_100; 3950 break; 3951 case LPA_SGMII_1000: 3952 state->speed = SPEED_1000; 3953 break; 3954 default: 3955 state->link = false; 3956 return; 3957 } 3958 if (config_reg & LPA_SGMII_FULL_DUPLEX) 3959 state->duplex = DUPLEX_FULL; 3960 else 3961 state->duplex = DUPLEX_HALF; 3962 } 3963 3964 /** 3965 * phylink_decode_usxgmii_word() - decode the USXGMII word from a MAC PCS 3966 * @state: a pointer to a struct phylink_link_state. 3967 * @lpa: a 16 bit value which stores the USXGMII auto-negotiation word 3968 * 3969 * Helper for MAC PCS supporting the USXGMII protocol and the auto-negotiation 3970 * code word. Decode the USXGMII code word and populate the corresponding fields 3971 * (speed, duplex) into the phylink_link_state structure. 3972 */ 3973 void phylink_decode_usxgmii_word(struct phylink_link_state *state, 3974 uint16_t lpa) 3975 { 3976 switch (lpa & MDIO_USXGMII_SPD_MASK) { 3977 case MDIO_USXGMII_10: 3978 state->speed = SPEED_10; 3979 break; 3980 case MDIO_USXGMII_100: 3981 state->speed = SPEED_100; 3982 break; 3983 case MDIO_USXGMII_1000: 3984 state->speed = SPEED_1000; 3985 break; 3986 case MDIO_USXGMII_2500: 3987 state->speed = SPEED_2500; 3988 break; 3989 case MDIO_USXGMII_5000: 3990 state->speed = SPEED_5000; 3991 break; 3992 case MDIO_USXGMII_10G: 3993 state->speed = SPEED_10000; 3994 break; 3995 default: 3996 state->link = false; 3997 return; 3998 } 3999 4000 if (lpa & MDIO_USXGMII_FULL_DUPLEX) 4001 state->duplex = DUPLEX_FULL; 4002 else 4003 state->duplex = DUPLEX_HALF; 4004 } 4005 EXPORT_SYMBOL_GPL(phylink_decode_usxgmii_word); 4006 4007 /** 4008 * phylink_decode_usgmii_word() - decode the USGMII word from a MAC PCS 4009 * @state: a pointer to a struct phylink_link_state. 4010 * @lpa: a 16 bit value which stores the USGMII auto-negotiation word 4011 * 4012 * Helper for MAC PCS supporting the USGMII protocol and the auto-negotiation 4013 * code word. Decode the USGMII code word and populate the corresponding fields 4014 * (speed, duplex) into the phylink_link_state structure. The structure for this 4015 * word is the same as the USXGMII word, except it only supports speeds up to 4016 * 1Gbps. 4017 */ 4018 static void phylink_decode_usgmii_word(struct phylink_link_state *state, 4019 uint16_t lpa) 4020 { 4021 switch (lpa & MDIO_USXGMII_SPD_MASK) { 4022 case MDIO_USXGMII_10: 4023 state->speed = SPEED_10; 4024 break; 4025 case MDIO_USXGMII_100: 4026 state->speed = SPEED_100; 4027 break; 4028 case MDIO_USXGMII_1000: 4029 state->speed = SPEED_1000; 4030 break; 4031 default: 4032 state->link = false; 4033 return; 4034 } 4035 4036 if (lpa & MDIO_USXGMII_FULL_DUPLEX) 4037 state->duplex = DUPLEX_FULL; 4038 else 4039 state->duplex = DUPLEX_HALF; 4040 } 4041 4042 /** 4043 * phylink_mii_c22_pcs_decode_state() - Decode MAC PCS state from MII registers 4044 * @state: a pointer to a &struct phylink_link_state. 4045 * @neg_mode: link negotiation mode (PHYLINK_PCS_NEG_xxx) 4046 * @bmsr: The value of the %MII_BMSR register 4047 * @lpa: The value of the %MII_LPA register 4048 * 4049 * Helper for MAC PCS supporting the 802.3 clause 22 register set for 4050 * clause 37 negotiation and/or SGMII control. 4051 * 4052 * Parse the Clause 37 or Cisco SGMII link partner negotiation word into 4053 * the phylink @state structure. This is suitable to be used for implementing 4054 * the pcs_get_state() member of the struct phylink_pcs_ops structure if 4055 * accessing @bmsr and @lpa cannot be done with MDIO directly. 4056 */ 4057 void phylink_mii_c22_pcs_decode_state(struct phylink_link_state *state, 4058 unsigned int neg_mode, u16 bmsr, u16 lpa) 4059 { 4060 state->link = !!(bmsr & BMSR_LSTATUS); 4061 state->an_complete = !!(bmsr & BMSR_ANEGCOMPLETE); 4062 4063 /* If the link is down, the advertisement data is undefined. */ 4064 if (!state->link) 4065 return; 4066 4067 switch (state->interface) { 4068 case PHY_INTERFACE_MODE_1000BASEX: 4069 if (neg_mode == PHYLINK_PCS_NEG_INBAND_ENABLED) { 4070 phylink_decode_c37_word(state, lpa, SPEED_1000); 4071 } else { 4072 state->speed = SPEED_1000; 4073 state->duplex = DUPLEX_FULL; 4074 state->pause |= MLO_PAUSE_TX | MLO_PAUSE_RX; 4075 } 4076 break; 4077 4078 case PHY_INTERFACE_MODE_2500BASEX: 4079 if (neg_mode == PHYLINK_PCS_NEG_INBAND_ENABLED) { 4080 phylink_decode_c37_word(state, lpa, SPEED_2500); 4081 } else { 4082 state->speed = SPEED_2500; 4083 state->duplex = DUPLEX_FULL; 4084 state->pause |= MLO_PAUSE_TX | MLO_PAUSE_RX; 4085 } 4086 break; 4087 4088 case PHY_INTERFACE_MODE_SGMII: 4089 case PHY_INTERFACE_MODE_QSGMII: 4090 if (neg_mode == PHYLINK_PCS_NEG_INBAND_ENABLED) 4091 phylink_decode_sgmii_word(state, lpa); 4092 break; 4093 4094 case PHY_INTERFACE_MODE_QUSGMII: 4095 if (neg_mode == PHYLINK_PCS_NEG_INBAND_ENABLED) 4096 phylink_decode_usgmii_word(state, lpa); 4097 break; 4098 4099 default: 4100 state->link = false; 4101 break; 4102 } 4103 } 4104 EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_decode_state); 4105 4106 /** 4107 * phylink_mii_c22_pcs_get_state() - read the MAC PCS state 4108 * @pcs: a pointer to a &struct mdio_device. 4109 * @neg_mode: link negotiation mode (PHYLINK_PCS_NEG_xxx) 4110 * @state: a pointer to a &struct phylink_link_state. 4111 * 4112 * Helper for MAC PCS supporting the 802.3 clause 22 register set for 4113 * clause 37 negotiation and/or SGMII control. 4114 * 4115 * Read the MAC PCS state from the MII device configured in @config and 4116 * parse the Clause 37 or Cisco SGMII link partner negotiation word into 4117 * the phylink @state structure. This is suitable to be directly plugged 4118 * into the pcs_get_state() member of the struct phylink_pcs_ops 4119 * structure. 4120 */ 4121 void phylink_mii_c22_pcs_get_state(struct mdio_device *pcs, 4122 unsigned int neg_mode, 4123 struct phylink_link_state *state) 4124 { 4125 int bmsr, lpa; 4126 4127 bmsr = mdiodev_read(pcs, MII_BMSR); 4128 lpa = mdiodev_read(pcs, MII_LPA); 4129 if (bmsr < 0 || lpa < 0) { 4130 state->link = false; 4131 return; 4132 } 4133 4134 phylink_mii_c22_pcs_decode_state(state, neg_mode, bmsr, lpa); 4135 } 4136 EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_get_state); 4137 4138 /** 4139 * phylink_mii_c22_pcs_encode_advertisement() - configure the clause 37 PCS 4140 * advertisement 4141 * @interface: the PHY interface mode being configured 4142 * @advertising: the ethtool advertisement mask 4143 * 4144 * Helper for MAC PCS supporting the 802.3 clause 22 register set for 4145 * clause 37 negotiation and/or SGMII control. 4146 * 4147 * Encode the clause 37 PCS advertisement as specified by @interface and 4148 * @advertising. 4149 * 4150 * Return: The new value for @adv, or ``-EINVAL`` if it should not be changed. 4151 */ 4152 int phylink_mii_c22_pcs_encode_advertisement(phy_interface_t interface, 4153 const unsigned long *advertising) 4154 { 4155 u16 adv; 4156 4157 switch (interface) { 4158 case PHY_INTERFACE_MODE_1000BASEX: 4159 case PHY_INTERFACE_MODE_2500BASEX: 4160 adv = ADVERTISE_1000XFULL; 4161 if (linkmode_test_bit(ETHTOOL_LINK_MODE_Pause_BIT, 4162 advertising)) 4163 adv |= ADVERTISE_1000XPAUSE; 4164 if (linkmode_test_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, 4165 advertising)) 4166 adv |= ADVERTISE_1000XPSE_ASYM; 4167 return adv; 4168 case PHY_INTERFACE_MODE_SGMII: 4169 case PHY_INTERFACE_MODE_QSGMII: 4170 return 0x0001; 4171 default: 4172 /* Nothing to do for other modes */ 4173 return -EINVAL; 4174 } 4175 } 4176 EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_encode_advertisement); 4177 4178 /** 4179 * phylink_mii_c22_pcs_config() - configure clause 22 PCS 4180 * @pcs: a pointer to a &struct mdio_device. 4181 * @interface: the PHY interface mode being configured 4182 * @advertising: the ethtool advertisement mask 4183 * @neg_mode: PCS negotiation mode 4184 * 4185 * Configure a Clause 22 PCS PHY with the appropriate negotiation 4186 * parameters for the @mode, @interface and @advertising parameters. 4187 * Returns negative error number on failure, zero if the advertisement 4188 * has not changed, or positive if there is a change. 4189 */ 4190 int phylink_mii_c22_pcs_config(struct mdio_device *pcs, 4191 phy_interface_t interface, 4192 const unsigned long *advertising, 4193 unsigned int neg_mode) 4194 { 4195 bool changed = 0; 4196 u16 bmcr; 4197 int ret, adv; 4198 4199 adv = phylink_mii_c22_pcs_encode_advertisement(interface, advertising); 4200 if (adv >= 0) { 4201 ret = mdiobus_modify_changed(pcs->bus, pcs->addr, 4202 MII_ADVERTISE, 0xffff, adv); 4203 if (ret < 0) 4204 return ret; 4205 changed = ret; 4206 } 4207 4208 if (neg_mode == PHYLINK_PCS_NEG_INBAND_ENABLED) 4209 bmcr = BMCR_ANENABLE; 4210 else 4211 bmcr = 0; 4212 4213 /* Configure the inband state. Ensure ISOLATE bit is disabled */ 4214 ret = mdiodev_modify(pcs, MII_BMCR, BMCR_ANENABLE | BMCR_ISOLATE, bmcr); 4215 if (ret < 0) 4216 return ret; 4217 4218 return changed; 4219 } 4220 EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_config); 4221 4222 /** 4223 * phylink_mii_c22_pcs_an_restart() - restart 802.3z autonegotiation 4224 * @pcs: a pointer to a &struct mdio_device. 4225 * 4226 * Helper for MAC PCS supporting the 802.3 clause 22 register set for 4227 * clause 37 negotiation. 4228 * 4229 * Restart the clause 37 negotiation with the link partner. This is 4230 * suitable to be directly plugged into the pcs_get_state() member 4231 * of the struct phylink_pcs_ops structure. 4232 */ 4233 void phylink_mii_c22_pcs_an_restart(struct mdio_device *pcs) 4234 { 4235 int val = mdiodev_read(pcs, MII_BMCR); 4236 4237 if (val >= 0) { 4238 val |= BMCR_ANRESTART; 4239 4240 mdiodev_write(pcs, MII_BMCR, val); 4241 } 4242 } 4243 EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_an_restart); 4244 4245 void phylink_mii_c45_pcs_get_state(struct mdio_device *pcs, 4246 struct phylink_link_state *state) 4247 { 4248 struct mii_bus *bus = pcs->bus; 4249 int addr = pcs->addr; 4250 int stat; 4251 4252 stat = mdiobus_c45_read(bus, addr, MDIO_MMD_PCS, MDIO_STAT1); 4253 if (stat < 0) { 4254 state->link = false; 4255 return; 4256 } 4257 4258 state->link = !!(stat & MDIO_STAT1_LSTATUS); 4259 if (!state->link) 4260 return; 4261 4262 switch (state->interface) { 4263 case PHY_INTERFACE_MODE_10GBASER: 4264 state->speed = SPEED_10000; 4265 state->duplex = DUPLEX_FULL; 4266 break; 4267 4268 default: 4269 break; 4270 } 4271 } 4272 EXPORT_SYMBOL_GPL(phylink_mii_c45_pcs_get_state); 4273 4274 static int __init phylink_init(void) 4275 { 4276 for (int i = 0; i < ARRAY_SIZE(phylink_sfp_interface_preference); ++i) 4277 __set_bit(phylink_sfp_interface_preference[i], 4278 phylink_sfp_interfaces); 4279 4280 return 0; 4281 } 4282 4283 module_init(phylink_init); 4284 4285 MODULE_LICENSE("GPL v2"); 4286 MODULE_DESCRIPTION("phylink models the MAC to optional PHY connection"); 4287