1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * phylink models the MAC to optional PHY connection, supporting 4 * technologies such as SFP cages where the PHY is hot-pluggable. 5 * 6 * Copyright (C) 2015 Russell King 7 */ 8 #include <linux/acpi.h> 9 #include <linux/ethtool.h> 10 #include <linux/export.h> 11 #include <linux/gpio/consumer.h> 12 #include <linux/netdevice.h> 13 #include <linux/of.h> 14 #include <linux/of_mdio.h> 15 #include <linux/phy.h> 16 #include <linux/phy_fixed.h> 17 #include <linux/phylink.h> 18 #include <linux/rtnetlink.h> 19 #include <linux/spinlock.h> 20 #include <linux/timer.h> 21 #include <linux/workqueue.h> 22 23 #include "phy-caps.h" 24 #include "sfp.h" 25 #include "swphy.h" 26 27 #define SUPPORTED_INTERFACES \ 28 (SUPPORTED_TP | SUPPORTED_MII | SUPPORTED_FIBRE | \ 29 SUPPORTED_BNC | SUPPORTED_AUI | SUPPORTED_Backplane) 30 #define ADVERTISED_INTERFACES \ 31 (ADVERTISED_TP | ADVERTISED_MII | ADVERTISED_FIBRE | \ 32 ADVERTISED_BNC | ADVERTISED_AUI | ADVERTISED_Backplane) 33 34 enum { 35 PHYLINK_DISABLE_STOPPED, 36 PHYLINK_DISABLE_LINK, 37 PHYLINK_DISABLE_MAC_WOL, 38 39 PCS_STATE_DOWN = 0, 40 PCS_STATE_STARTING, 41 PCS_STATE_STARTED, 42 }; 43 44 /** 45 * struct phylink - internal data type for phylink 46 */ 47 struct phylink { 48 /* private: */ 49 struct net_device *netdev; 50 const struct phylink_mac_ops *mac_ops; 51 struct phylink_config *config; 52 struct phylink_pcs *pcs; 53 struct device *dev; 54 unsigned int old_link_state:1; 55 56 unsigned long phylink_disable_state; /* bitmask of disables */ 57 struct phy_device *phydev; 58 phy_interface_t link_interface; /* PHY_INTERFACE_xxx */ 59 u8 cfg_link_an_mode; /* MLO_AN_xxx */ 60 u8 req_link_an_mode; /* Requested MLO_AN_xxx mode */ 61 u8 act_link_an_mode; /* Active MLO_AN_xxx mode */ 62 u8 link_port; /* The current non-phy ethtool port */ 63 __ETHTOOL_DECLARE_LINK_MODE_MASK(supported); 64 __ETHTOOL_DECLARE_LINK_MODE_MASK(supported_lpi); 65 66 /* The link configuration settings */ 67 struct phylink_link_state link_config; 68 69 /* The current settings */ 70 phy_interface_t cur_interface; 71 72 struct gpio_desc *link_gpio; 73 unsigned int link_irq; 74 struct timer_list link_poll; 75 76 struct mutex state_mutex; 77 struct phylink_link_state phy_state; 78 unsigned int phy_ib_mode; 79 struct work_struct resolve; 80 unsigned int pcs_neg_mode; 81 unsigned int pcs_state; 82 83 bool link_failed; 84 bool major_config_failed; 85 bool mac_supports_eee_ops; 86 bool mac_supports_eee; 87 bool phy_enable_tx_lpi; 88 bool mac_enable_tx_lpi; 89 bool mac_tx_clk_stop; 90 u32 mac_tx_lpi_timer; 91 u8 mac_rx_clk_stop_blocked; 92 93 struct sfp_bus *sfp_bus; 94 bool sfp_may_have_phy; 95 DECLARE_PHY_INTERFACE_MASK(sfp_interfaces); 96 __ETHTOOL_DECLARE_LINK_MODE_MASK(sfp_support); 97 u8 sfp_port; 98 99 struct eee_config eee_cfg; 100 }; 101 102 #define phylink_printk(level, pl, fmt, ...) \ 103 do { \ 104 if ((pl)->config->type == PHYLINK_NETDEV) \ 105 netdev_printk(level, (pl)->netdev, fmt, ##__VA_ARGS__); \ 106 else if ((pl)->config->type == PHYLINK_DEV) \ 107 dev_printk(level, (pl)->dev, fmt, ##__VA_ARGS__); \ 108 } while (0) 109 110 #define phylink_err(pl, fmt, ...) \ 111 phylink_printk(KERN_ERR, pl, fmt, ##__VA_ARGS__) 112 #define phylink_warn(pl, fmt, ...) \ 113 phylink_printk(KERN_WARNING, pl, fmt, ##__VA_ARGS__) 114 #define phylink_info(pl, fmt, ...) \ 115 phylink_printk(KERN_INFO, pl, fmt, ##__VA_ARGS__) 116 #if defined(CONFIG_DYNAMIC_DEBUG) 117 #define phylink_dbg(pl, fmt, ...) \ 118 do { \ 119 if ((pl)->config->type == PHYLINK_NETDEV) \ 120 netdev_dbg((pl)->netdev, fmt, ##__VA_ARGS__); \ 121 else if ((pl)->config->type == PHYLINK_DEV) \ 122 dev_dbg((pl)->dev, fmt, ##__VA_ARGS__); \ 123 } while (0) 124 #elif defined(DEBUG) 125 #define phylink_dbg(pl, fmt, ...) \ 126 phylink_printk(KERN_DEBUG, pl, fmt, ##__VA_ARGS__) 127 #else 128 #define phylink_dbg(pl, fmt, ...) \ 129 ({ \ 130 if (0) \ 131 phylink_printk(KERN_DEBUG, pl, fmt, ##__VA_ARGS__); \ 132 }) 133 #endif 134 135 static const phy_interface_t phylink_sfp_interface_preference[] = { 136 PHY_INTERFACE_MODE_25GBASER, 137 PHY_INTERFACE_MODE_USXGMII, 138 PHY_INTERFACE_MODE_10GBASER, 139 PHY_INTERFACE_MODE_5GBASER, 140 PHY_INTERFACE_MODE_2500BASEX, 141 PHY_INTERFACE_MODE_SGMII, 142 PHY_INTERFACE_MODE_1000BASEX, 143 PHY_INTERFACE_MODE_100BASEX, 144 }; 145 146 static DECLARE_PHY_INTERFACE_MASK(phylink_sfp_interfaces); 147 148 /** 149 * phylink_set_port_modes() - set the port type modes in the ethtool mask 150 * @mask: ethtool link mode mask 151 * 152 * Sets all the port type modes in the ethtool mask. MAC drivers should 153 * use this in their 'validate' callback. 154 */ 155 void phylink_set_port_modes(unsigned long *mask) 156 { 157 phylink_set(mask, TP); 158 phylink_set(mask, AUI); 159 phylink_set(mask, MII); 160 phylink_set(mask, FIBRE); 161 phylink_set(mask, BNC); 162 phylink_set(mask, Backplane); 163 } 164 EXPORT_SYMBOL_GPL(phylink_set_port_modes); 165 166 static int phylink_is_empty_linkmode(const unsigned long *linkmode) 167 { 168 __ETHTOOL_DECLARE_LINK_MODE_MASK(tmp) = { 0, }; 169 170 phylink_set_port_modes(tmp); 171 phylink_set(tmp, Autoneg); 172 phylink_set(tmp, Pause); 173 phylink_set(tmp, Asym_Pause); 174 175 return linkmode_subset(linkmode, tmp); 176 } 177 178 static const char *phylink_an_mode_str(unsigned int mode) 179 { 180 static const char *modestr[] = { 181 [MLO_AN_PHY] = "phy", 182 [MLO_AN_FIXED] = "fixed", 183 [MLO_AN_INBAND] = "inband", 184 }; 185 186 return mode < ARRAY_SIZE(modestr) ? modestr[mode] : "unknown"; 187 } 188 189 static const char *phylink_pcs_mode_str(unsigned int mode) 190 { 191 if (!mode) 192 return "none"; 193 194 if (mode & PHYLINK_PCS_NEG_OUTBAND) 195 return "outband"; 196 197 if (mode & PHYLINK_PCS_NEG_INBAND) { 198 if (mode & PHYLINK_PCS_NEG_ENABLED) 199 return "inband,an-enabled"; 200 else 201 return "inband,an-disabled"; 202 } 203 204 return "unknown"; 205 } 206 207 static unsigned int phylink_interface_signal_rate(phy_interface_t interface) 208 { 209 switch (interface) { 210 case PHY_INTERFACE_MODE_SGMII: 211 case PHY_INTERFACE_MODE_1000BASEX: /* 1.25Mbd */ 212 return 1250; 213 case PHY_INTERFACE_MODE_2500BASEX: /* 3.125Mbd */ 214 return 3125; 215 case PHY_INTERFACE_MODE_5GBASER: /* 5.15625Mbd */ 216 return 5156; 217 case PHY_INTERFACE_MODE_10GBASER: /* 10.3125Mbd */ 218 return 10313; 219 default: 220 return 0; 221 } 222 } 223 224 /** 225 * phylink_interface_max_speed() - get the maximum speed of a phy interface 226 * @interface: phy interface mode defined by &typedef phy_interface_t 227 * 228 * Determine the maximum speed of a phy interface. This is intended to help 229 * determine the correct speed to pass to the MAC when the phy is performing 230 * rate matching. 231 * 232 * Return: The maximum speed of @interface 233 */ 234 static int phylink_interface_max_speed(phy_interface_t interface) 235 { 236 switch (interface) { 237 case PHY_INTERFACE_MODE_100BASEX: 238 case PHY_INTERFACE_MODE_REVRMII: 239 case PHY_INTERFACE_MODE_RMII: 240 case PHY_INTERFACE_MODE_SMII: 241 case PHY_INTERFACE_MODE_REVMII: 242 case PHY_INTERFACE_MODE_MII: 243 return SPEED_100; 244 245 case PHY_INTERFACE_MODE_TBI: 246 case PHY_INTERFACE_MODE_MOCA: 247 case PHY_INTERFACE_MODE_RTBI: 248 case PHY_INTERFACE_MODE_1000BASEX: 249 case PHY_INTERFACE_MODE_1000BASEKX: 250 case PHY_INTERFACE_MODE_TRGMII: 251 case PHY_INTERFACE_MODE_RGMII_TXID: 252 case PHY_INTERFACE_MODE_RGMII_RXID: 253 case PHY_INTERFACE_MODE_RGMII_ID: 254 case PHY_INTERFACE_MODE_RGMII: 255 case PHY_INTERFACE_MODE_PSGMII: 256 case PHY_INTERFACE_MODE_QSGMII: 257 case PHY_INTERFACE_MODE_QUSGMII: 258 case PHY_INTERFACE_MODE_SGMII: 259 case PHY_INTERFACE_MODE_GMII: 260 return SPEED_1000; 261 262 case PHY_INTERFACE_MODE_2500BASEX: 263 case PHY_INTERFACE_MODE_10G_QXGMII: 264 return SPEED_2500; 265 266 case PHY_INTERFACE_MODE_5GBASER: 267 return SPEED_5000; 268 269 case PHY_INTERFACE_MODE_XGMII: 270 case PHY_INTERFACE_MODE_RXAUI: 271 case PHY_INTERFACE_MODE_XAUI: 272 case PHY_INTERFACE_MODE_10GBASER: 273 case PHY_INTERFACE_MODE_10GKR: 274 case PHY_INTERFACE_MODE_USXGMII: 275 return SPEED_10000; 276 277 case PHY_INTERFACE_MODE_25GBASER: 278 return SPEED_25000; 279 280 case PHY_INTERFACE_MODE_XLGMII: 281 return SPEED_40000; 282 283 case PHY_INTERFACE_MODE_INTERNAL: 284 case PHY_INTERFACE_MODE_NA: 285 case PHY_INTERFACE_MODE_MAX: 286 /* No idea! Garbage in, unknown out */ 287 return SPEED_UNKNOWN; 288 } 289 290 /* If we get here, someone forgot to add an interface mode above */ 291 WARN_ON_ONCE(1); 292 return SPEED_UNKNOWN; 293 } 294 295 static struct { 296 unsigned long mask; 297 int speed; 298 unsigned int duplex; 299 unsigned int caps_bit; 300 } phylink_caps_params[] = { 301 { MAC_400000FD, SPEED_400000, DUPLEX_FULL, BIT(LINK_CAPA_400000FD) }, 302 { MAC_200000FD, SPEED_200000, DUPLEX_FULL, BIT(LINK_CAPA_200000FD) }, 303 { MAC_100000FD, SPEED_100000, DUPLEX_FULL, BIT(LINK_CAPA_100000FD) }, 304 { MAC_56000FD, SPEED_56000, DUPLEX_FULL, BIT(LINK_CAPA_56000FD) }, 305 { MAC_50000FD, SPEED_50000, DUPLEX_FULL, BIT(LINK_CAPA_50000FD) }, 306 { MAC_40000FD, SPEED_40000, DUPLEX_FULL, BIT(LINK_CAPA_40000FD) }, 307 { MAC_25000FD, SPEED_25000, DUPLEX_FULL, BIT(LINK_CAPA_25000FD) }, 308 { MAC_20000FD, SPEED_20000, DUPLEX_FULL, BIT(LINK_CAPA_20000FD) }, 309 { MAC_10000FD, SPEED_10000, DUPLEX_FULL, BIT(LINK_CAPA_10000FD) }, 310 { MAC_5000FD, SPEED_5000, DUPLEX_FULL, BIT(LINK_CAPA_5000FD) }, 311 { MAC_2500FD, SPEED_2500, DUPLEX_FULL, BIT(LINK_CAPA_2500FD) }, 312 { MAC_1000FD, SPEED_1000, DUPLEX_FULL, BIT(LINK_CAPA_1000FD) }, 313 { MAC_1000HD, SPEED_1000, DUPLEX_HALF, BIT(LINK_CAPA_1000HD) }, 314 { MAC_100FD, SPEED_100, DUPLEX_FULL, BIT(LINK_CAPA_100FD) }, 315 { MAC_100HD, SPEED_100, DUPLEX_HALF, BIT(LINK_CAPA_100HD) }, 316 { MAC_10FD, SPEED_10, DUPLEX_FULL, BIT(LINK_CAPA_10FD) }, 317 { MAC_10HD, SPEED_10, DUPLEX_HALF, BIT(LINK_CAPA_10HD) }, 318 }; 319 320 /** 321 * phylink_caps_to_link_caps() - Convert a set of MAC capabilities LINK caps 322 * @caps: A set of MAC capabilities 323 * 324 * Returns: The corresponding set of LINK_CAPA as defined in phy-caps.h 325 */ 326 static unsigned long phylink_caps_to_link_caps(unsigned long caps) 327 { 328 unsigned long link_caps = 0; 329 int i; 330 331 for (i = 0; i < ARRAY_SIZE(phylink_caps_params); i++) 332 if (caps & phylink_caps_params[i].mask) 333 link_caps |= phylink_caps_params[i].caps_bit; 334 335 return link_caps; 336 } 337 338 static unsigned long phylink_link_caps_to_mac_caps(unsigned long link_caps) 339 { 340 unsigned long caps = 0; 341 int i; 342 343 for (i = 0; i < ARRAY_SIZE(phylink_caps_params); i++) 344 if (link_caps & phylink_caps_params[i].caps_bit) 345 caps |= phylink_caps_params[i].mask; 346 347 return caps; 348 } 349 350 /** 351 * phylink_caps_to_linkmodes() - Convert capabilities to ethtool link modes 352 * @linkmodes: ethtool linkmode mask (must be already initialised) 353 * @caps: bitmask of MAC capabilities 354 * 355 * Set all possible pause, speed and duplex linkmodes in @linkmodes that are 356 * supported by the @caps. @linkmodes must have been initialised previously. 357 */ 358 static void phylink_caps_to_linkmodes(unsigned long *linkmodes, 359 unsigned long caps) 360 { 361 unsigned long link_caps = phylink_caps_to_link_caps(caps); 362 363 if (caps & MAC_SYM_PAUSE) 364 __set_bit(ETHTOOL_LINK_MODE_Pause_BIT, linkmodes); 365 366 if (caps & MAC_ASYM_PAUSE) 367 __set_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, linkmodes); 368 369 phy_caps_linkmodes(link_caps, linkmodes); 370 } 371 372 /** 373 * phylink_limit_mac_speed - limit the phylink_config to a maximum speed 374 * @config: pointer to a &struct phylink_config 375 * @max_speed: maximum speed 376 * 377 * Mask off MAC capabilities for speeds higher than the @max_speed parameter. 378 * Any further motifications of config.mac_capabilities will override this. 379 */ 380 void phylink_limit_mac_speed(struct phylink_config *config, u32 max_speed) 381 { 382 int i; 383 384 for (i = 0; i < ARRAY_SIZE(phylink_caps_params) && 385 phylink_caps_params[i].speed > max_speed; i++) 386 config->mac_capabilities &= ~phylink_caps_params[i].mask; 387 } 388 EXPORT_SYMBOL_GPL(phylink_limit_mac_speed); 389 390 /** 391 * phylink_cap_from_speed_duplex - Get mac capability from speed/duplex 392 * @speed: the speed to search for 393 * @duplex: the duplex to search for 394 * 395 * Find the mac capability for a given speed and duplex. 396 * 397 * Return: A mask with the mac capability patching @speed and @duplex, or 0 if 398 * there were no matches. 399 */ 400 static unsigned long phylink_cap_from_speed_duplex(int speed, 401 unsigned int duplex) 402 { 403 int i; 404 405 for (i = 0; i < ARRAY_SIZE(phylink_caps_params); i++) { 406 if (speed == phylink_caps_params[i].speed && 407 duplex == phylink_caps_params[i].duplex) 408 return phylink_caps_params[i].mask; 409 } 410 411 return 0; 412 } 413 414 /** 415 * phylink_get_capabilities() - get capabilities for a given MAC 416 * @interface: phy interface mode defined by &typedef phy_interface_t 417 * @mac_capabilities: bitmask of MAC capabilities 418 * @rate_matching: type of rate matching being performed 419 * 420 * Get the MAC capabilities that are supported by the @interface mode and 421 * @mac_capabilities. 422 */ 423 static unsigned long phylink_get_capabilities(phy_interface_t interface, 424 unsigned long mac_capabilities, 425 int rate_matching) 426 { 427 unsigned long link_caps = phy_caps_from_interface(interface); 428 int max_speed = phylink_interface_max_speed(interface); 429 unsigned long caps = MAC_SYM_PAUSE | MAC_ASYM_PAUSE; 430 unsigned long matched_caps = 0; 431 432 caps |= phylink_link_caps_to_mac_caps(link_caps); 433 434 switch (rate_matching) { 435 case RATE_MATCH_OPEN_LOOP: 436 /* TODO */ 437 fallthrough; 438 case RATE_MATCH_NONE: 439 matched_caps = 0; 440 break; 441 case RATE_MATCH_PAUSE: { 442 /* The MAC must support asymmetric pause towards the local 443 * device for this. We could allow just symmetric pause, but 444 * then we might have to renegotiate if the link partner 445 * doesn't support pause. This is because there's no way to 446 * accept pause frames without transmitting them if we only 447 * support symmetric pause. 448 */ 449 if (!(mac_capabilities & MAC_SYM_PAUSE) || 450 !(mac_capabilities & MAC_ASYM_PAUSE)) 451 break; 452 453 /* We can't adapt if the MAC doesn't support the interface's 454 * max speed at full duplex. 455 */ 456 if (mac_capabilities & 457 phylink_cap_from_speed_duplex(max_speed, DUPLEX_FULL)) 458 matched_caps = GENMASK(__fls(caps), __fls(MAC_10HD)); 459 break; 460 } 461 case RATE_MATCH_CRS: 462 /* The MAC must support half duplex at the interface's max 463 * speed. 464 */ 465 if (mac_capabilities & 466 phylink_cap_from_speed_duplex(max_speed, DUPLEX_HALF)) { 467 matched_caps = GENMASK(__fls(caps), __fls(MAC_10HD)); 468 matched_caps &= mac_capabilities; 469 } 470 break; 471 } 472 473 return (caps & mac_capabilities) | matched_caps; 474 } 475 476 /** 477 * phylink_validate_mask_caps() - Restrict link modes based on caps 478 * @supported: ethtool bitmask for supported link modes. 479 * @state: pointer to a &struct phylink_link_state. 480 * @mac_capabilities: bitmask of MAC capabilities 481 * 482 * Calculate the supported link modes based on @mac_capabilities, and restrict 483 * @supported and @state based on that. Use this function if your capabiliies 484 * aren't constant, such as if they vary depending on the interface. 485 */ 486 static void phylink_validate_mask_caps(unsigned long *supported, 487 struct phylink_link_state *state, 488 unsigned long mac_capabilities) 489 { 490 __ETHTOOL_DECLARE_LINK_MODE_MASK(mask) = { 0, }; 491 unsigned long caps; 492 493 phylink_set_port_modes(mask); 494 phylink_set(mask, Autoneg); 495 caps = phylink_get_capabilities(state->interface, mac_capabilities, 496 state->rate_matching); 497 phylink_caps_to_linkmodes(mask, caps); 498 499 linkmode_and(supported, supported, mask); 500 linkmode_and(state->advertising, state->advertising, mask); 501 } 502 503 static int phylink_validate_mac_and_pcs(struct phylink *pl, 504 unsigned long *supported, 505 struct phylink_link_state *state) 506 { 507 struct phylink_pcs *pcs = NULL; 508 unsigned long capabilities; 509 int ret; 510 511 /* Get the PCS for this interface mode */ 512 if (pl->mac_ops->mac_select_pcs) { 513 pcs = pl->mac_ops->mac_select_pcs(pl->config, state->interface); 514 if (IS_ERR(pcs)) 515 return PTR_ERR(pcs); 516 } 517 518 if (pcs) { 519 /* The PCS, if present, must be setup before phylink_create() 520 * has been called. If the ops is not initialised, print an 521 * error and backtrace rather than oopsing the kernel. 522 */ 523 if (!pcs->ops) { 524 phylink_err(pl, "interface %s: uninitialised PCS\n", 525 phy_modes(state->interface)); 526 dump_stack(); 527 return -EINVAL; 528 } 529 530 /* Ensure that this PCS supports the interface which the MAC 531 * returned it for. It is an error for the MAC to return a PCS 532 * that does not support the interface mode. 533 */ 534 if (!phy_interface_empty(pcs->supported_interfaces) && 535 !test_bit(state->interface, pcs->supported_interfaces)) { 536 phylink_err(pl, "MAC returned PCS which does not support %s\n", 537 phy_modes(state->interface)); 538 return -EINVAL; 539 } 540 541 /* Validate the link parameters with the PCS */ 542 if (pcs->ops->pcs_validate) { 543 ret = pcs->ops->pcs_validate(pcs, supported, state); 544 if (ret < 0 || phylink_is_empty_linkmode(supported)) 545 return -EINVAL; 546 547 /* Ensure the advertising mask is a subset of the 548 * supported mask. 549 */ 550 linkmode_and(state->advertising, state->advertising, 551 supported); 552 } 553 } 554 555 /* Then validate the link parameters with the MAC */ 556 if (pl->mac_ops->mac_get_caps) 557 capabilities = pl->mac_ops->mac_get_caps(pl->config, 558 state->interface); 559 else 560 capabilities = pl->config->mac_capabilities; 561 562 phylink_validate_mask_caps(supported, state, capabilities); 563 564 return phylink_is_empty_linkmode(supported) ? -EINVAL : 0; 565 } 566 567 static void phylink_validate_one(struct phylink *pl, struct phy_device *phy, 568 const unsigned long *supported, 569 const struct phylink_link_state *state, 570 phy_interface_t interface, 571 unsigned long *accum_supported, 572 unsigned long *accum_advertising) 573 { 574 __ETHTOOL_DECLARE_LINK_MODE_MASK(tmp_supported); 575 struct phylink_link_state tmp_state; 576 577 linkmode_copy(tmp_supported, supported); 578 579 tmp_state = *state; 580 tmp_state.interface = interface; 581 582 if (phy) 583 tmp_state.rate_matching = phy_get_rate_matching(phy, interface); 584 585 if (!phylink_validate_mac_and_pcs(pl, tmp_supported, &tmp_state)) { 586 phylink_dbg(pl, " interface %u (%s) rate match %s supports %*pbl\n", 587 interface, phy_modes(interface), 588 phy_rate_matching_to_str(tmp_state.rate_matching), 589 __ETHTOOL_LINK_MODE_MASK_NBITS, tmp_supported); 590 591 linkmode_or(accum_supported, accum_supported, tmp_supported); 592 linkmode_or(accum_advertising, accum_advertising, 593 tmp_state.advertising); 594 } 595 } 596 597 static int phylink_validate_mask(struct phylink *pl, struct phy_device *phy, 598 unsigned long *supported, 599 struct phylink_link_state *state, 600 const unsigned long *interfaces) 601 { 602 __ETHTOOL_DECLARE_LINK_MODE_MASK(all_adv) = { 0, }; 603 __ETHTOOL_DECLARE_LINK_MODE_MASK(all_s) = { 0, }; 604 int interface; 605 606 for_each_set_bit(interface, interfaces, PHY_INTERFACE_MODE_MAX) 607 phylink_validate_one(pl, phy, supported, state, interface, 608 all_s, all_adv); 609 610 linkmode_copy(supported, all_s); 611 linkmode_copy(state->advertising, all_adv); 612 613 return phylink_is_empty_linkmode(supported) ? -EINVAL : 0; 614 } 615 616 static int phylink_validate(struct phylink *pl, unsigned long *supported, 617 struct phylink_link_state *state) 618 { 619 const unsigned long *interfaces = pl->config->supported_interfaces; 620 621 if (state->interface == PHY_INTERFACE_MODE_NA) 622 return phylink_validate_mask(pl, NULL, supported, state, 623 interfaces); 624 625 if (!test_bit(state->interface, interfaces)) 626 return -EINVAL; 627 628 return phylink_validate_mac_and_pcs(pl, supported, state); 629 } 630 631 static void phylink_fill_fixedlink_supported(unsigned long *supported) 632 { 633 linkmode_set_bit(ETHTOOL_LINK_MODE_10baseT_Half_BIT, supported); 634 linkmode_set_bit(ETHTOOL_LINK_MODE_10baseT_Full_BIT, supported); 635 linkmode_set_bit(ETHTOOL_LINK_MODE_100baseT_Half_BIT, supported); 636 linkmode_set_bit(ETHTOOL_LINK_MODE_100baseT_Full_BIT, supported); 637 linkmode_set_bit(ETHTOOL_LINK_MODE_1000baseT_Half_BIT, supported); 638 linkmode_set_bit(ETHTOOL_LINK_MODE_1000baseT_Full_BIT, supported); 639 linkmode_set_bit(ETHTOOL_LINK_MODE_2500baseT_Full_BIT, supported); 640 linkmode_set_bit(ETHTOOL_LINK_MODE_5000baseT_Full_BIT, supported); 641 linkmode_set_bit(ETHTOOL_LINK_MODE_10000baseT_Full_BIT, supported); 642 } 643 644 static int phylink_parse_fixedlink(struct phylink *pl, 645 const struct fwnode_handle *fwnode) 646 { 647 __ETHTOOL_DECLARE_LINK_MODE_MASK(match) = { 0, }; 648 __ETHTOOL_DECLARE_LINK_MODE_MASK(mask) = { 0, }; 649 const struct link_capabilities *c; 650 struct fwnode_handle *fixed_node; 651 struct gpio_desc *desc; 652 u32 speed; 653 int ret; 654 655 fixed_node = fwnode_get_named_child_node(fwnode, "fixed-link"); 656 if (fixed_node) { 657 ret = fwnode_property_read_u32(fixed_node, "speed", &speed); 658 659 pl->link_config.speed = speed; 660 pl->link_config.duplex = DUPLEX_HALF; 661 662 if (fwnode_property_read_bool(fixed_node, "full-duplex")) 663 pl->link_config.duplex = DUPLEX_FULL; 664 665 /* We treat the "pause" and "asym-pause" terminology as 666 * defining the link partner's ability. 667 */ 668 if (fwnode_property_read_bool(fixed_node, "pause")) 669 __set_bit(ETHTOOL_LINK_MODE_Pause_BIT, 670 pl->link_config.lp_advertising); 671 if (fwnode_property_read_bool(fixed_node, "asym-pause")) 672 __set_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, 673 pl->link_config.lp_advertising); 674 675 if (ret == 0) { 676 desc = fwnode_gpiod_get_index(fixed_node, "link", 0, 677 GPIOD_IN, "?"); 678 679 if (!IS_ERR(desc)) 680 pl->link_gpio = desc; 681 else if (desc == ERR_PTR(-EPROBE_DEFER)) 682 ret = -EPROBE_DEFER; 683 } 684 fwnode_handle_put(fixed_node); 685 686 if (ret) 687 return ret; 688 } else { 689 u32 prop[5]; 690 691 ret = fwnode_property_read_u32_array(fwnode, "fixed-link", 692 NULL, 0); 693 if (ret != ARRAY_SIZE(prop)) { 694 phylink_err(pl, "broken fixed-link?\n"); 695 return -EINVAL; 696 } 697 698 ret = fwnode_property_read_u32_array(fwnode, "fixed-link", 699 prop, ARRAY_SIZE(prop)); 700 if (!ret) { 701 pl->link_config.duplex = prop[1] ? 702 DUPLEX_FULL : DUPLEX_HALF; 703 pl->link_config.speed = prop[2]; 704 if (prop[3]) 705 __set_bit(ETHTOOL_LINK_MODE_Pause_BIT, 706 pl->link_config.lp_advertising); 707 if (prop[4]) 708 __set_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, 709 pl->link_config.lp_advertising); 710 } 711 } 712 713 if (pl->link_config.speed > SPEED_1000 && 714 pl->link_config.duplex != DUPLEX_FULL) 715 phylink_warn(pl, "fixed link specifies half duplex for %dMbps link?\n", 716 pl->link_config.speed); 717 718 linkmode_zero(pl->supported); 719 phylink_fill_fixedlink_supported(pl->supported); 720 721 linkmode_copy(pl->link_config.advertising, pl->supported); 722 phylink_validate(pl, pl->supported, &pl->link_config); 723 724 c = phy_caps_lookup(pl->link_config.speed, pl->link_config.duplex, 725 pl->supported, true); 726 if (c) 727 linkmode_and(match, pl->supported, c->linkmodes); 728 729 linkmode_set_bit(ETHTOOL_LINK_MODE_Pause_BIT, mask); 730 linkmode_set_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, mask); 731 linkmode_set_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, mask); 732 linkmode_and(pl->supported, pl->supported, mask); 733 734 phylink_set(pl->supported, MII); 735 736 if (c) { 737 linkmode_or(pl->supported, pl->supported, match); 738 linkmode_or(pl->link_config.lp_advertising, 739 pl->link_config.lp_advertising, match); 740 } else { 741 phylink_warn(pl, "fixed link %s duplex %dMbps not recognised\n", 742 pl->link_config.duplex == DUPLEX_FULL ? "full" : "half", 743 pl->link_config.speed); 744 } 745 746 linkmode_and(pl->link_config.advertising, pl->link_config.advertising, 747 pl->supported); 748 749 pl->link_config.link = 1; 750 pl->link_config.an_complete = 1; 751 752 return 0; 753 } 754 755 static int phylink_parse_mode(struct phylink *pl, 756 const struct fwnode_handle *fwnode) 757 { 758 struct fwnode_handle *dn; 759 const char *managed; 760 unsigned long caps; 761 762 if (pl->config->default_an_inband) 763 pl->cfg_link_an_mode = MLO_AN_INBAND; 764 765 dn = fwnode_get_named_child_node(fwnode, "fixed-link"); 766 if (dn || fwnode_property_present(fwnode, "fixed-link")) 767 pl->cfg_link_an_mode = MLO_AN_FIXED; 768 fwnode_handle_put(dn); 769 770 if ((fwnode_property_read_string(fwnode, "managed", &managed) == 0 && 771 strcmp(managed, "in-band-status") == 0)) { 772 if (pl->cfg_link_an_mode == MLO_AN_FIXED) { 773 phylink_err(pl, 774 "can't use both fixed-link and in-band-status\n"); 775 return -EINVAL; 776 } 777 778 pl->cfg_link_an_mode = MLO_AN_INBAND; 779 } 780 781 if (pl->cfg_link_an_mode == MLO_AN_INBAND) { 782 linkmode_zero(pl->supported); 783 phylink_set(pl->supported, MII); 784 phylink_set(pl->supported, Autoneg); 785 phylink_set(pl->supported, Asym_Pause); 786 phylink_set(pl->supported, Pause); 787 788 switch (pl->link_config.interface) { 789 case PHY_INTERFACE_MODE_SGMII: 790 case PHY_INTERFACE_MODE_PSGMII: 791 case PHY_INTERFACE_MODE_QSGMII: 792 case PHY_INTERFACE_MODE_QUSGMII: 793 case PHY_INTERFACE_MODE_RGMII: 794 case PHY_INTERFACE_MODE_RGMII_ID: 795 case PHY_INTERFACE_MODE_RGMII_RXID: 796 case PHY_INTERFACE_MODE_RGMII_TXID: 797 case PHY_INTERFACE_MODE_RTBI: 798 case PHY_INTERFACE_MODE_1000BASEX: 799 case PHY_INTERFACE_MODE_2500BASEX: 800 case PHY_INTERFACE_MODE_5GBASER: 801 case PHY_INTERFACE_MODE_25GBASER: 802 case PHY_INTERFACE_MODE_USXGMII: 803 case PHY_INTERFACE_MODE_10G_QXGMII: 804 case PHY_INTERFACE_MODE_10GKR: 805 case PHY_INTERFACE_MODE_10GBASER: 806 case PHY_INTERFACE_MODE_XLGMII: 807 caps = ~(MAC_SYM_PAUSE | MAC_ASYM_PAUSE); 808 caps = phylink_get_capabilities(pl->link_config.interface, caps, 809 RATE_MATCH_NONE); 810 phylink_caps_to_linkmodes(pl->supported, caps); 811 break; 812 813 default: 814 phylink_err(pl, 815 "incorrect link mode %s for in-band status\n", 816 phy_modes(pl->link_config.interface)); 817 return -EINVAL; 818 } 819 820 linkmode_copy(pl->link_config.advertising, pl->supported); 821 822 if (phylink_validate(pl, pl->supported, &pl->link_config)) { 823 phylink_err(pl, 824 "failed to validate link configuration for in-band status\n"); 825 return -EINVAL; 826 } 827 } 828 829 return 0; 830 } 831 832 static void phylink_apply_manual_flow(struct phylink *pl, 833 struct phylink_link_state *state) 834 { 835 /* If autoneg is disabled, pause AN is also disabled */ 836 if (!linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, 837 state->advertising)) 838 state->pause &= ~MLO_PAUSE_AN; 839 840 /* Manual configuration of pause modes */ 841 if (!(pl->link_config.pause & MLO_PAUSE_AN)) 842 state->pause = pl->link_config.pause; 843 } 844 845 static void phylink_resolve_an_pause(struct phylink_link_state *state) 846 { 847 bool tx_pause, rx_pause; 848 849 if (state->duplex == DUPLEX_FULL) { 850 linkmode_resolve_pause(state->advertising, 851 state->lp_advertising, 852 &tx_pause, &rx_pause); 853 if (tx_pause) 854 state->pause |= MLO_PAUSE_TX; 855 if (rx_pause) 856 state->pause |= MLO_PAUSE_RX; 857 } 858 } 859 860 static unsigned int phylink_pcs_inband_caps(struct phylink_pcs *pcs, 861 phy_interface_t interface) 862 { 863 if (pcs && pcs->ops->pcs_inband_caps) 864 return pcs->ops->pcs_inband_caps(pcs, interface); 865 866 return 0; 867 } 868 869 static void phylink_pcs_pre_config(struct phylink_pcs *pcs, 870 phy_interface_t interface) 871 { 872 if (pcs && pcs->ops->pcs_pre_config) 873 pcs->ops->pcs_pre_config(pcs, interface); 874 } 875 876 static int phylink_pcs_post_config(struct phylink_pcs *pcs, 877 phy_interface_t interface) 878 { 879 int err = 0; 880 881 if (pcs && pcs->ops->pcs_post_config) 882 err = pcs->ops->pcs_post_config(pcs, interface); 883 884 return err; 885 } 886 887 static void phylink_pcs_disable(struct phylink_pcs *pcs) 888 { 889 if (pcs && pcs->ops->pcs_disable) 890 pcs->ops->pcs_disable(pcs); 891 } 892 893 static int phylink_pcs_enable(struct phylink_pcs *pcs) 894 { 895 int err = 0; 896 897 if (pcs && pcs->ops->pcs_enable) 898 err = pcs->ops->pcs_enable(pcs); 899 900 return err; 901 } 902 903 static int phylink_pcs_config(struct phylink_pcs *pcs, unsigned int neg_mode, 904 const struct phylink_link_state *state, 905 bool permit_pause_to_mac) 906 { 907 if (!pcs) 908 return 0; 909 910 return pcs->ops->pcs_config(pcs, neg_mode, state->interface, 911 state->advertising, permit_pause_to_mac); 912 } 913 914 static void phylink_pcs_link_up(struct phylink_pcs *pcs, unsigned int neg_mode, 915 phy_interface_t interface, int speed, 916 int duplex) 917 { 918 if (pcs && pcs->ops->pcs_link_up) 919 pcs->ops->pcs_link_up(pcs, neg_mode, interface, speed, duplex); 920 } 921 922 static void phylink_pcs_disable_eee(struct phylink_pcs *pcs) 923 { 924 if (pcs && pcs->ops->pcs_disable_eee) 925 pcs->ops->pcs_disable_eee(pcs); 926 } 927 928 static void phylink_pcs_enable_eee(struct phylink_pcs *pcs) 929 { 930 if (pcs && pcs->ops->pcs_enable_eee) 931 pcs->ops->pcs_enable_eee(pcs); 932 } 933 934 /* Query inband for a specific interface mode, asking the MAC for the 935 * PCS which will be used to handle the interface mode. 936 */ 937 static unsigned int phylink_inband_caps(struct phylink *pl, 938 phy_interface_t interface) 939 { 940 struct phylink_pcs *pcs; 941 942 if (!pl->mac_ops->mac_select_pcs) 943 return 0; 944 945 pcs = pl->mac_ops->mac_select_pcs(pl->config, interface); 946 if (!pcs) 947 return 0; 948 949 return phylink_pcs_inband_caps(pcs, interface); 950 } 951 952 static void phylink_pcs_poll_stop(struct phylink *pl) 953 { 954 if (pl->cfg_link_an_mode == MLO_AN_INBAND) 955 del_timer(&pl->link_poll); 956 } 957 958 static void phylink_pcs_poll_start(struct phylink *pl) 959 { 960 if (pl->pcs && pl->pcs->poll && pl->cfg_link_an_mode == MLO_AN_INBAND) 961 mod_timer(&pl->link_poll, jiffies + HZ); 962 } 963 964 int phylink_pcs_pre_init(struct phylink *pl, struct phylink_pcs *pcs) 965 { 966 int ret = 0; 967 968 /* Signal to PCS driver that MAC requires RX clock for init */ 969 if (pl->config->mac_requires_rxc) 970 pcs->rxc_always_on = true; 971 972 if (pcs->ops->pcs_pre_init) 973 ret = pcs->ops->pcs_pre_init(pcs); 974 975 return ret; 976 } 977 EXPORT_SYMBOL_GPL(phylink_pcs_pre_init); 978 979 static void phylink_mac_config(struct phylink *pl, 980 const struct phylink_link_state *state) 981 { 982 struct phylink_link_state st = *state; 983 984 /* Stop drivers incorrectly using these */ 985 linkmode_zero(st.lp_advertising); 986 st.speed = SPEED_UNKNOWN; 987 st.duplex = DUPLEX_UNKNOWN; 988 st.an_complete = false; 989 st.link = false; 990 991 phylink_dbg(pl, 992 "%s: mode=%s/%s/%s adv=%*pb pause=%02x\n", 993 __func__, phylink_an_mode_str(pl->act_link_an_mode), 994 phy_modes(st.interface), 995 phy_rate_matching_to_str(st.rate_matching), 996 __ETHTOOL_LINK_MODE_MASK_NBITS, st.advertising, 997 st.pause); 998 999 pl->mac_ops->mac_config(pl->config, pl->act_link_an_mode, &st); 1000 } 1001 1002 static void phylink_pcs_an_restart(struct phylink *pl) 1003 { 1004 if (pl->pcs && linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, 1005 pl->link_config.advertising) && 1006 phy_interface_mode_is_8023z(pl->link_config.interface) && 1007 phylink_autoneg_inband(pl->act_link_an_mode)) 1008 pl->pcs->ops->pcs_an_restart(pl->pcs); 1009 } 1010 1011 /** 1012 * phylink_pcs_neg_mode() - helper to determine PCS inband mode 1013 * @pl: a pointer to a &struct phylink returned from phylink_create() 1014 * @pcs: a pointer to &struct phylink_pcs 1015 * @interface: interface mode to be used 1016 * @advertising: adertisement ethtool link mode mask 1017 * 1018 * Determines the negotiation mode to be used by the PCS, and returns 1019 * one of: 1020 * 1021 * - %PHYLINK_PCS_NEG_NONE: interface mode does not support inband 1022 * - %PHYLINK_PCS_NEG_OUTBAND: an out of band mode (e.g. reading the PHY) 1023 * will be used. 1024 * - %PHYLINK_PCS_NEG_INBAND_DISABLED: inband mode selected but autoneg 1025 * disabled 1026 * - %PHYLINK_PCS_NEG_INBAND_ENABLED: inband mode selected and autoneg enabled 1027 * 1028 * Note: this is for cases where the PCS itself is involved in negotiation 1029 * (e.g. Clause 37, SGMII and similar) not Clause 73. 1030 */ 1031 static void phylink_pcs_neg_mode(struct phylink *pl, struct phylink_pcs *pcs, 1032 phy_interface_t interface, 1033 const unsigned long *advertising) 1034 { 1035 unsigned int pcs_ib_caps = 0; 1036 unsigned int phy_ib_caps = 0; 1037 unsigned int neg_mode, mode; 1038 enum { 1039 INBAND_CISCO_SGMII, 1040 INBAND_BASEX, 1041 } type; 1042 1043 mode = pl->req_link_an_mode; 1044 1045 pl->phy_ib_mode = 0; 1046 1047 switch (interface) { 1048 case PHY_INTERFACE_MODE_SGMII: 1049 case PHY_INTERFACE_MODE_QSGMII: 1050 case PHY_INTERFACE_MODE_QUSGMII: 1051 case PHY_INTERFACE_MODE_USXGMII: 1052 case PHY_INTERFACE_MODE_10G_QXGMII: 1053 /* These protocols are designed for use with a PHY which 1054 * communicates its negotiation result back to the MAC via 1055 * inband communication. Note: there exist PHYs that run 1056 * with SGMII but do not send the inband data. 1057 */ 1058 type = INBAND_CISCO_SGMII; 1059 break; 1060 1061 case PHY_INTERFACE_MODE_1000BASEX: 1062 case PHY_INTERFACE_MODE_2500BASEX: 1063 /* 1000base-X is designed for use media-side for Fibre 1064 * connections, and thus the Autoneg bit needs to be 1065 * taken into account. We also do this for 2500base-X 1066 * as well, but drivers may not support this, so may 1067 * need to override this. 1068 */ 1069 type = INBAND_BASEX; 1070 break; 1071 1072 default: 1073 pl->pcs_neg_mode = PHYLINK_PCS_NEG_NONE; 1074 pl->act_link_an_mode = mode; 1075 return; 1076 } 1077 1078 if (pcs) 1079 pcs_ib_caps = phylink_pcs_inband_caps(pcs, interface); 1080 1081 if (pl->phydev) 1082 phy_ib_caps = phy_inband_caps(pl->phydev, interface); 1083 1084 phylink_dbg(pl, "interface %s inband modes: pcs=%02x phy=%02x\n", 1085 phy_modes(interface), pcs_ib_caps, phy_ib_caps); 1086 1087 if (!phylink_autoneg_inband(mode)) { 1088 bool pcs_ib_only = false; 1089 bool phy_ib_only = false; 1090 1091 if (pcs_ib_caps && pcs_ib_caps != LINK_INBAND_DISABLE) { 1092 /* PCS supports reporting in-band capabilities, and 1093 * supports more than disable mode. 1094 */ 1095 if (pcs_ib_caps & LINK_INBAND_DISABLE) 1096 neg_mode = PHYLINK_PCS_NEG_OUTBAND; 1097 else if (pcs_ib_caps & LINK_INBAND_ENABLE) 1098 pcs_ib_only = true; 1099 } 1100 1101 if (phy_ib_caps && phy_ib_caps != LINK_INBAND_DISABLE) { 1102 /* PHY supports in-band capabilities, and supports 1103 * more than disable mode. 1104 */ 1105 if (phy_ib_caps & LINK_INBAND_DISABLE) 1106 pl->phy_ib_mode = LINK_INBAND_DISABLE; 1107 else if (phy_ib_caps & LINK_INBAND_BYPASS) 1108 pl->phy_ib_mode = LINK_INBAND_BYPASS; 1109 else if (phy_ib_caps & LINK_INBAND_ENABLE) 1110 phy_ib_only = true; 1111 } 1112 1113 /* If either the PCS or PHY requires inband to be enabled, 1114 * this is an invalid configuration. Provide a diagnostic 1115 * message for this case, but don't try to force the issue. 1116 */ 1117 if (pcs_ib_only || phy_ib_only) 1118 phylink_warn(pl, 1119 "firmware wants %s mode, but %s%s%s requires inband\n", 1120 phylink_an_mode_str(mode), 1121 pcs_ib_only ? "PCS" : "", 1122 pcs_ib_only && phy_ib_only ? " and " : "", 1123 phy_ib_only ? "PHY" : ""); 1124 1125 neg_mode = PHYLINK_PCS_NEG_OUTBAND; 1126 } else if (type == INBAND_CISCO_SGMII || pl->phydev) { 1127 /* For SGMII modes which are designed to be used with PHYs, or 1128 * Base-X with a PHY, we try to use in-band mode where-ever 1129 * possible. However, there are some PHYs e.g. BCM84881 which 1130 * do not support in-band. 1131 */ 1132 const unsigned int inband_ok = LINK_INBAND_ENABLE | 1133 LINK_INBAND_BYPASS; 1134 const unsigned int outband_ok = LINK_INBAND_DISABLE | 1135 LINK_INBAND_BYPASS; 1136 /* PCS PHY 1137 * D E D E 1138 * 0 0 0 0 no information inband enabled 1139 * 1 0 0 0 pcs doesn't support outband 1140 * 0 1 0 0 pcs required inband enabled 1141 * 1 1 0 0 pcs optional inband enabled 1142 * 0 0 1 0 phy doesn't support outband 1143 * 1 0 1 0 pcs+phy doesn't support outband 1144 * 0 1 1 0 pcs required, phy doesn't support, invalid 1145 * 1 1 1 0 pcs optional, phy doesn't support, outband 1146 * 0 0 0 1 phy required inband enabled 1147 * 1 0 0 1 pcs doesn't support, phy required, invalid 1148 * 0 1 0 1 pcs+phy required inband enabled 1149 * 1 1 0 1 pcs optional, phy required inband enabled 1150 * 0 0 1 1 phy optional inband enabled 1151 * 1 0 1 1 pcs doesn't support, phy optional, outband 1152 * 0 1 1 1 pcs required, phy optional inband enabled 1153 * 1 1 1 1 pcs+phy optional inband enabled 1154 */ 1155 if ((!pcs_ib_caps || pcs_ib_caps & inband_ok) && 1156 (!phy_ib_caps || phy_ib_caps & inband_ok)) { 1157 /* In-band supported or unknown at both ends. Enable 1158 * in-band mode with or without bypass at the PHY. 1159 */ 1160 if (phy_ib_caps & LINK_INBAND_ENABLE) 1161 pl->phy_ib_mode = LINK_INBAND_ENABLE; 1162 else if (phy_ib_caps & LINK_INBAND_BYPASS) 1163 pl->phy_ib_mode = LINK_INBAND_BYPASS; 1164 1165 neg_mode = PHYLINK_PCS_NEG_INBAND_ENABLED; 1166 } else if ((!pcs_ib_caps || pcs_ib_caps & outband_ok) && 1167 (!phy_ib_caps || phy_ib_caps & outband_ok)) { 1168 /* Either in-band not supported at at least one end. 1169 * In-band bypass at the other end is possible. 1170 */ 1171 if (phy_ib_caps & LINK_INBAND_DISABLE) 1172 pl->phy_ib_mode = LINK_INBAND_DISABLE; 1173 else if (phy_ib_caps & LINK_INBAND_BYPASS) 1174 pl->phy_ib_mode = LINK_INBAND_BYPASS; 1175 1176 neg_mode = PHYLINK_PCS_NEG_OUTBAND; 1177 if (pl->phydev) 1178 mode = MLO_AN_PHY; 1179 } else { 1180 /* invalid */ 1181 phylink_warn(pl, "%s: incompatible in-band capabilities, trying in-band", 1182 phy_modes(interface)); 1183 neg_mode = PHYLINK_PCS_NEG_INBAND_ENABLED; 1184 } 1185 } else { 1186 /* For Base-X without a PHY */ 1187 if (pcs_ib_caps == LINK_INBAND_DISABLE) 1188 /* If the PCS doesn't support inband, then inband must 1189 * be disabled. 1190 */ 1191 neg_mode = PHYLINK_PCS_NEG_INBAND_DISABLED; 1192 else if (pcs_ib_caps == LINK_INBAND_ENABLE) 1193 /* If the PCS requires inband, then inband must always 1194 * be enabled. 1195 */ 1196 neg_mode = PHYLINK_PCS_NEG_INBAND_ENABLED; 1197 else if (linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, 1198 advertising)) 1199 neg_mode = PHYLINK_PCS_NEG_INBAND_ENABLED; 1200 else 1201 neg_mode = PHYLINK_PCS_NEG_INBAND_DISABLED; 1202 } 1203 1204 pl->pcs_neg_mode = neg_mode; 1205 pl->act_link_an_mode = mode; 1206 } 1207 1208 static void phylink_major_config(struct phylink *pl, bool restart, 1209 const struct phylink_link_state *state) 1210 { 1211 struct phylink_pcs *pcs = NULL; 1212 bool pcs_changed = false; 1213 unsigned int rate_kbd; 1214 int err; 1215 1216 phylink_dbg(pl, "major config, requested %s/%s\n", 1217 phylink_an_mode_str(pl->req_link_an_mode), 1218 phy_modes(state->interface)); 1219 1220 pl->major_config_failed = false; 1221 1222 if (pl->mac_ops->mac_select_pcs) { 1223 pcs = pl->mac_ops->mac_select_pcs(pl->config, state->interface); 1224 if (IS_ERR(pcs)) { 1225 phylink_err(pl, 1226 "mac_select_pcs unexpectedly failed: %pe\n", 1227 pcs); 1228 1229 pl->major_config_failed = true; 1230 return; 1231 } 1232 1233 pcs_changed = pl->pcs != pcs; 1234 } 1235 1236 phylink_pcs_neg_mode(pl, pcs, state->interface, state->advertising); 1237 1238 phylink_dbg(pl, "major config, active %s/%s/%s\n", 1239 phylink_an_mode_str(pl->act_link_an_mode), 1240 phylink_pcs_mode_str(pl->pcs_neg_mode), 1241 phy_modes(state->interface)); 1242 1243 phylink_pcs_poll_stop(pl); 1244 1245 if (pl->mac_ops->mac_prepare) { 1246 err = pl->mac_ops->mac_prepare(pl->config, pl->act_link_an_mode, 1247 state->interface); 1248 if (err < 0) { 1249 phylink_err(pl, "mac_prepare failed: %pe\n", 1250 ERR_PTR(err)); 1251 pl->major_config_failed = true; 1252 return; 1253 } 1254 } 1255 1256 /* If we have a new PCS, switch to the new PCS after preparing the MAC 1257 * for the change. 1258 */ 1259 if (pcs_changed) { 1260 phylink_pcs_disable(pl->pcs); 1261 1262 if (pl->pcs) 1263 pl->pcs->phylink = NULL; 1264 1265 pcs->phylink = pl; 1266 1267 pl->pcs = pcs; 1268 } 1269 1270 if (pl->pcs) 1271 phylink_pcs_pre_config(pl->pcs, state->interface); 1272 1273 phylink_mac_config(pl, state); 1274 1275 if (pl->pcs) { 1276 err = phylink_pcs_post_config(pl->pcs, state->interface); 1277 if (err < 0) { 1278 phylink_err(pl, "pcs_post_config failed: %pe\n", 1279 ERR_PTR(err)); 1280 1281 pl->major_config_failed = true; 1282 } 1283 } 1284 1285 if (pl->pcs_state == PCS_STATE_STARTING || pcs_changed) 1286 phylink_pcs_enable(pl->pcs); 1287 1288 err = phylink_pcs_config(pl->pcs, pl->pcs_neg_mode, state, 1289 !!(pl->link_config.pause & MLO_PAUSE_AN)); 1290 if (err < 0) { 1291 phylink_err(pl, "pcs_config failed: %pe\n", ERR_PTR(err)); 1292 pl->major_config_failed = true; 1293 } else if (err > 0) { 1294 restart = true; 1295 } 1296 1297 if (restart) 1298 phylink_pcs_an_restart(pl); 1299 1300 if (pl->mac_ops->mac_finish) { 1301 err = pl->mac_ops->mac_finish(pl->config, pl->act_link_an_mode, 1302 state->interface); 1303 if (err < 0) { 1304 phylink_err(pl, "mac_finish failed: %pe\n", 1305 ERR_PTR(err)); 1306 1307 pl->major_config_failed = true; 1308 } 1309 } 1310 1311 if (pl->phydev && pl->phy_ib_mode) { 1312 err = phy_config_inband(pl->phydev, pl->phy_ib_mode); 1313 if (err < 0) { 1314 phylink_err(pl, "phy_config_inband: %pe\n", 1315 ERR_PTR(err)); 1316 1317 pl->major_config_failed = true; 1318 } 1319 } 1320 1321 if (pl->sfp_bus) { 1322 rate_kbd = phylink_interface_signal_rate(state->interface); 1323 if (rate_kbd) 1324 sfp_upstream_set_signal_rate(pl->sfp_bus, rate_kbd); 1325 } 1326 1327 phylink_pcs_poll_start(pl); 1328 } 1329 1330 /* 1331 * Reconfigure for a change of inband advertisement. 1332 * If we have a separate PCS, we only need to call its pcs_config() method, 1333 * and then restart AN if it indicates something changed. Otherwise, we do 1334 * the full MAC reconfiguration. 1335 */ 1336 static int phylink_change_inband_advert(struct phylink *pl) 1337 { 1338 int ret; 1339 1340 if (test_bit(PHYLINK_DISABLE_STOPPED, &pl->phylink_disable_state)) 1341 return 0; 1342 1343 phylink_dbg(pl, "%s: mode=%s/%s adv=%*pb pause=%02x\n", __func__, 1344 phylink_an_mode_str(pl->req_link_an_mode), 1345 phy_modes(pl->link_config.interface), 1346 __ETHTOOL_LINK_MODE_MASK_NBITS, pl->link_config.advertising, 1347 pl->link_config.pause); 1348 1349 /* Recompute the PCS neg mode */ 1350 phylink_pcs_neg_mode(pl, pl->pcs, pl->link_config.interface, 1351 pl->link_config.advertising); 1352 1353 /* Modern PCS-based method; update the advert at the PCS, and 1354 * restart negotiation if the pcs_config() helper indicates that 1355 * the programmed advertisement has changed. 1356 */ 1357 ret = phylink_pcs_config(pl->pcs, pl->pcs_neg_mode, &pl->link_config, 1358 !!(pl->link_config.pause & MLO_PAUSE_AN)); 1359 if (ret < 0) 1360 return ret; 1361 1362 if (ret > 0) 1363 phylink_pcs_an_restart(pl); 1364 1365 return 0; 1366 } 1367 1368 static void phylink_mac_pcs_get_state(struct phylink *pl, 1369 struct phylink_link_state *state) 1370 { 1371 struct phylink_pcs *pcs; 1372 bool autoneg; 1373 1374 linkmode_copy(state->advertising, pl->link_config.advertising); 1375 linkmode_zero(state->lp_advertising); 1376 state->interface = pl->link_config.interface; 1377 state->rate_matching = pl->link_config.rate_matching; 1378 state->an_complete = 0; 1379 state->link = 1; 1380 1381 autoneg = pl->pcs_neg_mode == PHYLINK_PCS_NEG_INBAND_ENABLED; 1382 if (autoneg) { 1383 state->speed = SPEED_UNKNOWN; 1384 state->duplex = DUPLEX_UNKNOWN; 1385 state->pause = MLO_PAUSE_NONE; 1386 } else { 1387 state->speed = pl->link_config.speed; 1388 state->duplex = pl->link_config.duplex; 1389 state->pause = pl->link_config.pause; 1390 } 1391 1392 pcs = pl->pcs; 1393 if (pcs) 1394 pcs->ops->pcs_get_state(pcs, pl->pcs_neg_mode, state); 1395 else 1396 state->link = 0; 1397 } 1398 1399 /* The fixed state is... fixed except for the link state, 1400 * which may be determined by a GPIO or a callback. 1401 */ 1402 static void phylink_get_fixed_state(struct phylink *pl, 1403 struct phylink_link_state *state) 1404 { 1405 *state = pl->link_config; 1406 if (pl->config->get_fixed_state) 1407 pl->config->get_fixed_state(pl->config, state); 1408 else if (pl->link_gpio) 1409 state->link = !!gpiod_get_value_cansleep(pl->link_gpio); 1410 1411 state->pause = MLO_PAUSE_NONE; 1412 phylink_resolve_an_pause(state); 1413 } 1414 1415 static void phylink_mac_initial_config(struct phylink *pl, bool force_restart) 1416 { 1417 struct phylink_link_state link_state; 1418 1419 switch (pl->req_link_an_mode) { 1420 case MLO_AN_PHY: 1421 link_state = pl->phy_state; 1422 break; 1423 1424 case MLO_AN_FIXED: 1425 phylink_get_fixed_state(pl, &link_state); 1426 break; 1427 1428 case MLO_AN_INBAND: 1429 link_state = pl->link_config; 1430 if (link_state.interface == PHY_INTERFACE_MODE_SGMII) 1431 link_state.pause = MLO_PAUSE_NONE; 1432 break; 1433 1434 default: /* can't happen */ 1435 return; 1436 } 1437 1438 link_state.link = false; 1439 1440 phylink_apply_manual_flow(pl, &link_state); 1441 phylink_major_config(pl, force_restart, &link_state); 1442 } 1443 1444 static const char *phylink_pause_to_str(int pause) 1445 { 1446 switch (pause & MLO_PAUSE_TXRX_MASK) { 1447 case MLO_PAUSE_TX | MLO_PAUSE_RX: 1448 return "rx/tx"; 1449 case MLO_PAUSE_TX: 1450 return "tx"; 1451 case MLO_PAUSE_RX: 1452 return "rx"; 1453 default: 1454 return "off"; 1455 } 1456 } 1457 1458 static void phylink_deactivate_lpi(struct phylink *pl) 1459 { 1460 if (pl->mac_enable_tx_lpi) { 1461 pl->mac_enable_tx_lpi = false; 1462 1463 phylink_dbg(pl, "disabling LPI\n"); 1464 1465 pl->mac_ops->mac_disable_tx_lpi(pl->config); 1466 1467 phylink_pcs_disable_eee(pl->pcs); 1468 } 1469 } 1470 1471 static void phylink_activate_lpi(struct phylink *pl) 1472 { 1473 int err; 1474 1475 if (!test_bit(pl->cur_interface, pl->config->lpi_interfaces)) { 1476 phylink_dbg(pl, "MAC does not support LPI with %s\n", 1477 phy_modes(pl->cur_interface)); 1478 return; 1479 } 1480 1481 phylink_dbg(pl, "LPI timer %uus, tx clock stop %u\n", 1482 pl->mac_tx_lpi_timer, pl->mac_tx_clk_stop); 1483 1484 phylink_pcs_enable_eee(pl->pcs); 1485 1486 err = pl->mac_ops->mac_enable_tx_lpi(pl->config, pl->mac_tx_lpi_timer, 1487 pl->mac_tx_clk_stop); 1488 if (err) { 1489 phylink_pcs_disable_eee(pl->pcs); 1490 phylink_err(pl, "%ps() failed: %pe\n", 1491 pl->mac_ops->mac_enable_tx_lpi, ERR_PTR(err)); 1492 return; 1493 } 1494 1495 pl->mac_enable_tx_lpi = true; 1496 } 1497 1498 static void phylink_link_up(struct phylink *pl, 1499 struct phylink_link_state link_state) 1500 { 1501 struct net_device *ndev = pl->netdev; 1502 int speed, duplex; 1503 bool rx_pause; 1504 1505 speed = link_state.speed; 1506 duplex = link_state.duplex; 1507 rx_pause = !!(link_state.pause & MLO_PAUSE_RX); 1508 1509 switch (link_state.rate_matching) { 1510 case RATE_MATCH_PAUSE: 1511 /* The PHY is doing rate matchion from the media rate (in 1512 * the link_state) to the interface speed, and will send 1513 * pause frames to the MAC to limit its transmission speed. 1514 */ 1515 speed = phylink_interface_max_speed(link_state.interface); 1516 duplex = DUPLEX_FULL; 1517 rx_pause = true; 1518 break; 1519 1520 case RATE_MATCH_CRS: 1521 /* The PHY is doing rate matchion from the media rate (in 1522 * the link_state) to the interface speed, and will cause 1523 * collisions to the MAC to limit its transmission speed. 1524 */ 1525 speed = phylink_interface_max_speed(link_state.interface); 1526 duplex = DUPLEX_HALF; 1527 break; 1528 } 1529 1530 pl->cur_interface = link_state.interface; 1531 1532 phylink_pcs_link_up(pl->pcs, pl->pcs_neg_mode, pl->cur_interface, speed, 1533 duplex); 1534 1535 pl->mac_ops->mac_link_up(pl->config, pl->phydev, pl->act_link_an_mode, 1536 pl->cur_interface, speed, duplex, 1537 !!(link_state.pause & MLO_PAUSE_TX), rx_pause); 1538 1539 if (pl->mac_supports_eee && pl->phy_enable_tx_lpi) 1540 phylink_activate_lpi(pl); 1541 1542 if (ndev) 1543 netif_carrier_on(ndev); 1544 1545 phylink_info(pl, 1546 "Link is Up - %s/%s - flow control %s\n", 1547 phy_speed_to_str(link_state.speed), 1548 phy_duplex_to_str(link_state.duplex), 1549 phylink_pause_to_str(link_state.pause)); 1550 } 1551 1552 static void phylink_link_down(struct phylink *pl) 1553 { 1554 struct net_device *ndev = pl->netdev; 1555 1556 if (ndev) 1557 netif_carrier_off(ndev); 1558 1559 phylink_deactivate_lpi(pl); 1560 1561 pl->mac_ops->mac_link_down(pl->config, pl->act_link_an_mode, 1562 pl->cur_interface); 1563 phylink_info(pl, "Link is Down\n"); 1564 } 1565 1566 static bool phylink_link_is_up(struct phylink *pl) 1567 { 1568 return pl->netdev ? netif_carrier_ok(pl->netdev) : pl->old_link_state; 1569 } 1570 1571 static void phylink_resolve(struct work_struct *w) 1572 { 1573 struct phylink *pl = container_of(w, struct phylink, resolve); 1574 struct phylink_link_state link_state; 1575 bool mac_config = false; 1576 bool retrigger = false; 1577 bool cur_link_state; 1578 1579 mutex_lock(&pl->state_mutex); 1580 cur_link_state = phylink_link_is_up(pl); 1581 1582 if (pl->phylink_disable_state) { 1583 pl->link_failed = false; 1584 link_state.link = false; 1585 } else if (pl->link_failed) { 1586 link_state.link = false; 1587 retrigger = true; 1588 } else if (pl->act_link_an_mode == MLO_AN_FIXED) { 1589 phylink_get_fixed_state(pl, &link_state); 1590 mac_config = link_state.link; 1591 } else if (pl->act_link_an_mode == MLO_AN_PHY) { 1592 link_state = pl->phy_state; 1593 mac_config = link_state.link; 1594 } else { 1595 phylink_mac_pcs_get_state(pl, &link_state); 1596 1597 /* The PCS may have a latching link-fail indicator. If the link 1598 * was up, bring the link down and re-trigger the resolve. 1599 * Otherwise, re-read the PCS state to get the current status 1600 * of the link. 1601 */ 1602 if (!link_state.link) { 1603 if (cur_link_state) 1604 retrigger = true; 1605 else 1606 phylink_mac_pcs_get_state(pl, &link_state); 1607 } 1608 1609 /* If we have a phy, the "up" state is the union of both the 1610 * PHY and the MAC 1611 */ 1612 if (pl->phydev) 1613 link_state.link &= pl->phy_state.link; 1614 1615 /* Only update if the PHY link is up */ 1616 if (pl->phydev && pl->phy_state.link) { 1617 /* If the interface has changed, force a link down 1618 * event if the link isn't already down, and re-resolve. 1619 */ 1620 if (link_state.interface != pl->phy_state.interface) { 1621 retrigger = true; 1622 link_state.link = false; 1623 } 1624 1625 link_state.interface = pl->phy_state.interface; 1626 1627 /* If we are doing rate matching, then the link 1628 * speed/duplex comes from the PHY 1629 */ 1630 if (pl->phy_state.rate_matching) { 1631 link_state.rate_matching = 1632 pl->phy_state.rate_matching; 1633 link_state.speed = pl->phy_state.speed; 1634 link_state.duplex = pl->phy_state.duplex; 1635 } 1636 1637 /* If we have a PHY, we need to update with the PHY 1638 * flow control bits. 1639 */ 1640 link_state.pause = pl->phy_state.pause; 1641 mac_config = true; 1642 } 1643 } 1644 1645 if (pl->act_link_an_mode != MLO_AN_FIXED) 1646 phylink_apply_manual_flow(pl, &link_state); 1647 1648 if (mac_config) { 1649 if (link_state.interface != pl->link_config.interface) { 1650 /* The interface has changed, force the link down and 1651 * then reconfigure. 1652 */ 1653 if (cur_link_state) { 1654 phylink_link_down(pl); 1655 cur_link_state = false; 1656 } 1657 phylink_major_config(pl, false, &link_state); 1658 pl->link_config.interface = link_state.interface; 1659 } 1660 } 1661 1662 /* If configuration of the interface failed, force the link down 1663 * until we get a successful configuration. 1664 */ 1665 if (pl->major_config_failed) 1666 link_state.link = false; 1667 1668 if (link_state.link != cur_link_state) { 1669 pl->old_link_state = link_state.link; 1670 if (!link_state.link) 1671 phylink_link_down(pl); 1672 else 1673 phylink_link_up(pl, link_state); 1674 } 1675 if (!link_state.link && retrigger) { 1676 pl->link_failed = false; 1677 queue_work(system_power_efficient_wq, &pl->resolve); 1678 } 1679 mutex_unlock(&pl->state_mutex); 1680 } 1681 1682 static void phylink_run_resolve(struct phylink *pl) 1683 { 1684 if (!pl->phylink_disable_state) 1685 queue_work(system_power_efficient_wq, &pl->resolve); 1686 } 1687 1688 static void phylink_run_resolve_and_disable(struct phylink *pl, int bit) 1689 { 1690 unsigned long state = pl->phylink_disable_state; 1691 1692 set_bit(bit, &pl->phylink_disable_state); 1693 if (state == 0) { 1694 queue_work(system_power_efficient_wq, &pl->resolve); 1695 flush_work(&pl->resolve); 1696 } 1697 } 1698 1699 static void phylink_enable_and_run_resolve(struct phylink *pl, int bit) 1700 { 1701 clear_bit(bit, &pl->phylink_disable_state); 1702 phylink_run_resolve(pl); 1703 } 1704 1705 static void phylink_fixed_poll(struct timer_list *t) 1706 { 1707 struct phylink *pl = container_of(t, struct phylink, link_poll); 1708 1709 mod_timer(t, jiffies + HZ); 1710 1711 phylink_run_resolve(pl); 1712 } 1713 1714 static const struct sfp_upstream_ops sfp_phylink_ops; 1715 1716 static int phylink_register_sfp(struct phylink *pl, 1717 const struct fwnode_handle *fwnode) 1718 { 1719 struct sfp_bus *bus; 1720 int ret; 1721 1722 if (!fwnode) 1723 return 0; 1724 1725 bus = sfp_bus_find_fwnode(fwnode); 1726 if (IS_ERR(bus)) { 1727 phylink_err(pl, "unable to attach SFP bus: %pe\n", bus); 1728 return PTR_ERR(bus); 1729 } 1730 1731 pl->sfp_bus = bus; 1732 1733 ret = sfp_bus_add_upstream(bus, pl, &sfp_phylink_ops); 1734 sfp_bus_put(bus); 1735 1736 return ret; 1737 } 1738 1739 /** 1740 * phylink_set_fixed_link() - set the fixed link 1741 * @pl: a pointer to a &struct phylink returned from phylink_create() 1742 * @state: a pointer to a struct phylink_link_state. 1743 * 1744 * This function is used when the link parameters are known and do not change, 1745 * making it suitable for certain types of network connections. 1746 * 1747 * Returns: zero on success or negative error code. 1748 */ 1749 int phylink_set_fixed_link(struct phylink *pl, 1750 const struct phylink_link_state *state) 1751 { 1752 const struct link_capabilities *c; 1753 unsigned long *adv; 1754 1755 if (pl->cfg_link_an_mode != MLO_AN_PHY || !state || 1756 !test_bit(PHYLINK_DISABLE_STOPPED, &pl->phylink_disable_state)) 1757 return -EINVAL; 1758 1759 c = phy_caps_lookup(state->speed, state->duplex, 1760 pl->supported, true); 1761 if (!c) 1762 return -EINVAL; 1763 1764 adv = pl->link_config.advertising; 1765 linkmode_and(adv, pl->supported, c->linkmodes); 1766 linkmode_set_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, adv); 1767 1768 pl->link_config.speed = state->speed; 1769 pl->link_config.duplex = state->duplex; 1770 pl->link_config.link = 1; 1771 pl->link_config.an_complete = 1; 1772 1773 pl->cfg_link_an_mode = MLO_AN_FIXED; 1774 pl->req_link_an_mode = pl->cfg_link_an_mode; 1775 1776 return 0; 1777 } 1778 EXPORT_SYMBOL_GPL(phylink_set_fixed_link); 1779 1780 /** 1781 * phylink_create() - create a phylink instance 1782 * @config: a pointer to the target &struct phylink_config 1783 * @fwnode: a pointer to a &struct fwnode_handle describing the network 1784 * interface 1785 * @iface: the desired link mode defined by &typedef phy_interface_t 1786 * @mac_ops: a pointer to a &struct phylink_mac_ops for the MAC. 1787 * 1788 * Create a new phylink instance, and parse the link parameters found in @np. 1789 * This will parse in-band modes, fixed-link or SFP configuration. 1790 * 1791 * Note: the rtnl lock must not be held when calling this function. 1792 * 1793 * Returns a pointer to a &struct phylink, or an error-pointer value. Users 1794 * must use IS_ERR() to check for errors from this function. 1795 */ 1796 struct phylink *phylink_create(struct phylink_config *config, 1797 const struct fwnode_handle *fwnode, 1798 phy_interface_t iface, 1799 const struct phylink_mac_ops *mac_ops) 1800 { 1801 struct phylink *pl; 1802 int ret; 1803 1804 /* Validate the supplied configuration */ 1805 if (phy_interface_empty(config->supported_interfaces)) { 1806 dev_err(config->dev, 1807 "phylink: error: empty supported_interfaces\n"); 1808 return ERR_PTR(-EINVAL); 1809 } 1810 1811 pl = kzalloc(sizeof(*pl), GFP_KERNEL); 1812 if (!pl) 1813 return ERR_PTR(-ENOMEM); 1814 1815 mutex_init(&pl->state_mutex); 1816 INIT_WORK(&pl->resolve, phylink_resolve); 1817 1818 pl->config = config; 1819 if (config->type == PHYLINK_NETDEV) { 1820 pl->netdev = to_net_dev(config->dev); 1821 netif_carrier_off(pl->netdev); 1822 } else if (config->type == PHYLINK_DEV) { 1823 pl->dev = config->dev; 1824 } else { 1825 kfree(pl); 1826 return ERR_PTR(-EINVAL); 1827 } 1828 1829 pl->mac_supports_eee_ops = phylink_mac_implements_lpi(mac_ops); 1830 pl->mac_supports_eee = pl->mac_supports_eee_ops && 1831 pl->config->lpi_capabilities && 1832 !phy_interface_empty(pl->config->lpi_interfaces); 1833 1834 /* Set the default EEE configuration */ 1835 pl->eee_cfg.eee_enabled = pl->config->eee_enabled_default; 1836 pl->eee_cfg.tx_lpi_enabled = pl->eee_cfg.eee_enabled; 1837 pl->eee_cfg.tx_lpi_timer = pl->config->lpi_timer_default; 1838 1839 pl->phy_state.interface = iface; 1840 pl->link_interface = iface; 1841 if (iface == PHY_INTERFACE_MODE_MOCA) 1842 pl->link_port = PORT_BNC; 1843 else 1844 pl->link_port = PORT_MII; 1845 pl->link_config.interface = iface; 1846 pl->link_config.pause = MLO_PAUSE_AN; 1847 pl->link_config.speed = SPEED_UNKNOWN; 1848 pl->link_config.duplex = DUPLEX_UNKNOWN; 1849 pl->pcs_state = PCS_STATE_DOWN; 1850 pl->mac_ops = mac_ops; 1851 __set_bit(PHYLINK_DISABLE_STOPPED, &pl->phylink_disable_state); 1852 timer_setup(&pl->link_poll, phylink_fixed_poll, 0); 1853 1854 linkmode_fill(pl->supported); 1855 linkmode_copy(pl->link_config.advertising, pl->supported); 1856 phylink_validate(pl, pl->supported, &pl->link_config); 1857 1858 ret = phylink_parse_mode(pl, fwnode); 1859 if (ret < 0) { 1860 kfree(pl); 1861 return ERR_PTR(ret); 1862 } 1863 1864 if (pl->cfg_link_an_mode == MLO_AN_FIXED) { 1865 ret = phylink_parse_fixedlink(pl, fwnode); 1866 if (ret < 0) { 1867 kfree(pl); 1868 return ERR_PTR(ret); 1869 } 1870 } 1871 1872 pl->req_link_an_mode = pl->cfg_link_an_mode; 1873 1874 ret = phylink_register_sfp(pl, fwnode); 1875 if (ret < 0) { 1876 kfree(pl); 1877 return ERR_PTR(ret); 1878 } 1879 1880 return pl; 1881 } 1882 EXPORT_SYMBOL_GPL(phylink_create); 1883 1884 /** 1885 * phylink_destroy() - cleanup and destroy the phylink instance 1886 * @pl: a pointer to a &struct phylink returned from phylink_create() 1887 * 1888 * Destroy a phylink instance. Any PHY that has been attached must have been 1889 * cleaned up via phylink_disconnect_phy() prior to calling this function. 1890 * 1891 * Note: the rtnl lock must not be held when calling this function. 1892 */ 1893 void phylink_destroy(struct phylink *pl) 1894 { 1895 sfp_bus_del_upstream(pl->sfp_bus); 1896 if (pl->link_gpio) 1897 gpiod_put(pl->link_gpio); 1898 1899 cancel_work_sync(&pl->resolve); 1900 kfree(pl); 1901 } 1902 EXPORT_SYMBOL_GPL(phylink_destroy); 1903 1904 /** 1905 * phylink_expects_phy() - Determine if phylink expects a phy to be attached 1906 * @pl: a pointer to a &struct phylink returned from phylink_create() 1907 * 1908 * When using fixed-link mode, or in-band mode with 1000base-X or 2500base-X, 1909 * no PHY is needed. 1910 * 1911 * Returns true if phylink will be expecting a PHY. 1912 */ 1913 bool phylink_expects_phy(struct phylink *pl) 1914 { 1915 if (pl->cfg_link_an_mode == MLO_AN_FIXED || 1916 (pl->cfg_link_an_mode == MLO_AN_INBAND && 1917 phy_interface_mode_is_8023z(pl->link_interface))) 1918 return false; 1919 return true; 1920 } 1921 EXPORT_SYMBOL_GPL(phylink_expects_phy); 1922 1923 static void phylink_phy_change(struct phy_device *phydev, bool up) 1924 { 1925 struct phylink *pl = phydev->phylink; 1926 bool tx_pause, rx_pause; 1927 1928 phy_get_pause(phydev, &tx_pause, &rx_pause); 1929 1930 mutex_lock(&pl->state_mutex); 1931 pl->phy_state.speed = phydev->speed; 1932 pl->phy_state.duplex = phydev->duplex; 1933 pl->phy_state.rate_matching = phydev->rate_matching; 1934 pl->phy_state.pause = MLO_PAUSE_NONE; 1935 if (tx_pause) 1936 pl->phy_state.pause |= MLO_PAUSE_TX; 1937 if (rx_pause) 1938 pl->phy_state.pause |= MLO_PAUSE_RX; 1939 pl->phy_state.interface = phydev->interface; 1940 pl->phy_state.link = up; 1941 if (!up) 1942 pl->link_failed = true; 1943 1944 /* Get the LPI state from phylib */ 1945 pl->phy_enable_tx_lpi = phydev->enable_tx_lpi; 1946 pl->mac_tx_lpi_timer = phydev->eee_cfg.tx_lpi_timer; 1947 mutex_unlock(&pl->state_mutex); 1948 1949 phylink_run_resolve(pl); 1950 1951 phylink_dbg(pl, "phy link %s %s/%s/%s/%s/%s/%slpi\n", 1952 up ? "up" : "down", 1953 phy_modes(phydev->interface), 1954 phy_speed_to_str(phydev->speed), 1955 phy_duplex_to_str(phydev->duplex), 1956 phy_rate_matching_to_str(phydev->rate_matching), 1957 phylink_pause_to_str(pl->phy_state.pause), 1958 phydev->enable_tx_lpi ? "" : "no"); 1959 } 1960 1961 static int phylink_validate_phy(struct phylink *pl, struct phy_device *phy, 1962 unsigned long *supported, 1963 struct phylink_link_state *state) 1964 { 1965 DECLARE_PHY_INTERFACE_MASK(interfaces); 1966 1967 /* If the PHY provides a bitmap of the interfaces it will be using 1968 * depending on the negotiated media speeds, use this to validate 1969 * which ethtool link modes can be used. 1970 */ 1971 if (!phy_interface_empty(phy->possible_interfaces)) { 1972 /* We only care about the union of the PHY's interfaces and 1973 * those which the host supports. 1974 */ 1975 phy_interface_and(interfaces, phy->possible_interfaces, 1976 pl->config->supported_interfaces); 1977 1978 if (phy_interface_empty(interfaces)) { 1979 phylink_err(pl, "PHY has no common interfaces\n"); 1980 return -EINVAL; 1981 } 1982 1983 if (phy_on_sfp(phy)) { 1984 /* If the PHY is on a SFP, limit the interfaces to 1985 * those that can be used with a SFP module. 1986 */ 1987 phy_interface_and(interfaces, interfaces, 1988 phylink_sfp_interfaces); 1989 1990 if (phy_interface_empty(interfaces)) { 1991 phylink_err(pl, "SFP PHY's possible interfaces becomes empty\n"); 1992 return -EINVAL; 1993 } 1994 } 1995 1996 phylink_dbg(pl, "PHY %s uses interfaces %*pbl, validating %*pbl\n", 1997 phydev_name(phy), 1998 (int)PHY_INTERFACE_MODE_MAX, 1999 phy->possible_interfaces, 2000 (int)PHY_INTERFACE_MODE_MAX, interfaces); 2001 2002 return phylink_validate_mask(pl, phy, supported, state, 2003 interfaces); 2004 } 2005 2006 phylink_dbg(pl, "PHY %s doesn't supply possible interfaces\n", 2007 phydev_name(phy)); 2008 2009 /* Check whether we would use rate matching for the proposed interface 2010 * mode. 2011 */ 2012 state->rate_matching = phy_get_rate_matching(phy, state->interface); 2013 2014 /* Clause 45 PHYs may switch their Serdes lane between, e.g. 10GBASE-R, 2015 * 5GBASE-R, 2500BASE-X and SGMII if they are not using rate matching. 2016 * For some interface modes (e.g. RXAUI, XAUI and USXGMII) switching 2017 * their Serdes is either unnecessary or not reasonable. 2018 * 2019 * For these which switch interface modes, we really need to know which 2020 * interface modes the PHY supports to properly work out which ethtool 2021 * linkmodes can be supported. For now, as a work-around, we validate 2022 * against all interface modes, which may lead to more ethtool link 2023 * modes being advertised than are actually supported. 2024 */ 2025 if (phy->is_c45 && state->rate_matching == RATE_MATCH_NONE && 2026 state->interface != PHY_INTERFACE_MODE_RXAUI && 2027 state->interface != PHY_INTERFACE_MODE_XAUI && 2028 state->interface != PHY_INTERFACE_MODE_USXGMII) 2029 state->interface = PHY_INTERFACE_MODE_NA; 2030 2031 return phylink_validate(pl, supported, state); 2032 } 2033 2034 static int phylink_bringup_phy(struct phylink *pl, struct phy_device *phy, 2035 phy_interface_t interface) 2036 { 2037 struct phylink_link_state config; 2038 __ETHTOOL_DECLARE_LINK_MODE_MASK(supported); 2039 char *irq_str; 2040 int ret; 2041 2042 /* 2043 * This is the new way of dealing with flow control for PHYs, 2044 * as described by Timur Tabi in commit 529ed1275263 ("net: phy: 2045 * phy drivers should not set SUPPORTED_[Asym_]Pause") except 2046 * using our validate call to the MAC, we rely upon the MAC 2047 * clearing the bits from both supported and advertising fields. 2048 */ 2049 phy_support_asym_pause(phy); 2050 2051 memset(&config, 0, sizeof(config)); 2052 linkmode_copy(supported, phy->supported); 2053 linkmode_copy(config.advertising, phy->advertising); 2054 config.interface = interface; 2055 2056 ret = phylink_validate_phy(pl, phy, supported, &config); 2057 if (ret) { 2058 phylink_warn(pl, "validation of %s with support %*pb and advertisement %*pb failed: %pe\n", 2059 phy_modes(config.interface), 2060 __ETHTOOL_LINK_MODE_MASK_NBITS, phy->supported, 2061 __ETHTOOL_LINK_MODE_MASK_NBITS, config.advertising, 2062 ERR_PTR(ret)); 2063 return ret; 2064 } 2065 2066 phy->phylink = pl; 2067 phy->phy_link_change = phylink_phy_change; 2068 2069 irq_str = phy_attached_info_irq(phy); 2070 phylink_info(pl, 2071 "PHY [%s] driver [%s] (irq=%s)\n", 2072 dev_name(&phy->mdio.dev), phy->drv->name, irq_str); 2073 kfree(irq_str); 2074 2075 mutex_lock(&phy->lock); 2076 mutex_lock(&pl->state_mutex); 2077 pl->phydev = phy; 2078 pl->phy_state.interface = interface; 2079 pl->phy_state.pause = MLO_PAUSE_NONE; 2080 pl->phy_state.speed = SPEED_UNKNOWN; 2081 pl->phy_state.duplex = DUPLEX_UNKNOWN; 2082 pl->phy_state.rate_matching = RATE_MATCH_NONE; 2083 linkmode_copy(pl->supported, supported); 2084 linkmode_copy(pl->link_config.advertising, config.advertising); 2085 2086 /* Restrict the phy advertisement according to the MAC support. */ 2087 linkmode_copy(phy->advertising, config.advertising); 2088 2089 /* If the MAC supports phylink managed EEE, restrict the EEE 2090 * advertisement according to the MAC's LPI capabilities. 2091 */ 2092 if (pl->mac_supports_eee) { 2093 /* If EEE is enabled, then we need to call phy_support_eee() 2094 * to ensure that the advertising mask is appropriately set. 2095 * This also enables EEE at the PHY. 2096 */ 2097 if (pl->eee_cfg.eee_enabled) 2098 phy_support_eee(phy); 2099 2100 phy->eee_cfg.tx_lpi_enabled = pl->eee_cfg.tx_lpi_enabled; 2101 phy->eee_cfg.tx_lpi_timer = pl->eee_cfg.tx_lpi_timer; 2102 2103 /* Convert the MAC's LPI capabilities to linkmodes */ 2104 linkmode_zero(pl->supported_lpi); 2105 phylink_caps_to_linkmodes(pl->supported_lpi, 2106 pl->config->lpi_capabilities); 2107 2108 /* Restrict the PHYs EEE support/advertisement to the modes 2109 * that the MAC supports. 2110 */ 2111 linkmode_and(phy->advertising_eee, phy->advertising_eee, 2112 pl->supported_lpi); 2113 } else if (pl->mac_supports_eee_ops) { 2114 /* MAC supports phylink EEE, but wants EEE always disabled. */ 2115 phy_disable_eee(phy); 2116 } 2117 2118 mutex_unlock(&pl->state_mutex); 2119 mutex_unlock(&phy->lock); 2120 2121 phylink_dbg(pl, 2122 "phy: %s setting supported %*pb advertising %*pb\n", 2123 phy_modes(interface), 2124 __ETHTOOL_LINK_MODE_MASK_NBITS, pl->supported, 2125 __ETHTOOL_LINK_MODE_MASK_NBITS, phy->advertising); 2126 2127 if (phy_interrupt_is_valid(phy)) 2128 phy_request_interrupt(phy); 2129 2130 if (pl->config->mac_managed_pm) 2131 phy->mac_managed_pm = true; 2132 2133 /* Allow the MAC to stop its clock if the PHY has the capability */ 2134 pl->mac_tx_clk_stop = phy_eee_tx_clock_stop_capable(phy) > 0; 2135 2136 if (pl->mac_supports_eee_ops) { 2137 /* Explicitly configure whether the PHY is allowed to stop it's 2138 * receive clock. 2139 */ 2140 ret = phy_eee_rx_clock_stop(phy, 2141 pl->config->eee_rx_clk_stop_enable); 2142 if (ret == -EOPNOTSUPP) 2143 ret = 0; 2144 } 2145 2146 return ret; 2147 } 2148 2149 static int phylink_attach_phy(struct phylink *pl, struct phy_device *phy, 2150 phy_interface_t interface) 2151 { 2152 u32 flags = 0; 2153 2154 if (WARN_ON(pl->cfg_link_an_mode == MLO_AN_FIXED || 2155 (pl->cfg_link_an_mode == MLO_AN_INBAND && 2156 phy_interface_mode_is_8023z(interface) && !pl->sfp_bus))) 2157 return -EINVAL; 2158 2159 if (pl->phydev) 2160 return -EBUSY; 2161 2162 if (pl->config->mac_requires_rxc) 2163 flags |= PHY_F_RXC_ALWAYS_ON; 2164 2165 return phy_attach_direct(pl->netdev, phy, flags, interface); 2166 } 2167 2168 /** 2169 * phylink_connect_phy() - connect a PHY to the phylink instance 2170 * @pl: a pointer to a &struct phylink returned from phylink_create() 2171 * @phy: a pointer to a &struct phy_device. 2172 * 2173 * Connect @phy to the phylink instance specified by @pl by calling 2174 * phy_attach_direct(). Configure the @phy according to the MAC driver's 2175 * capabilities, start the PHYLIB state machine and enable any interrupts 2176 * that the PHY supports. 2177 * 2178 * This updates the phylink's ethtool supported and advertising link mode 2179 * masks. 2180 * 2181 * Returns 0 on success or a negative errno. 2182 */ 2183 int phylink_connect_phy(struct phylink *pl, struct phy_device *phy) 2184 { 2185 int ret; 2186 2187 /* Use PHY device/driver interface */ 2188 if (pl->link_interface == PHY_INTERFACE_MODE_NA) { 2189 pl->link_interface = phy->interface; 2190 pl->link_config.interface = pl->link_interface; 2191 } 2192 2193 ret = phylink_attach_phy(pl, phy, pl->link_interface); 2194 if (ret < 0) 2195 return ret; 2196 2197 ret = phylink_bringup_phy(pl, phy, pl->link_config.interface); 2198 if (ret) 2199 phy_detach(phy); 2200 2201 return ret; 2202 } 2203 EXPORT_SYMBOL_GPL(phylink_connect_phy); 2204 2205 /** 2206 * phylink_of_phy_connect() - connect the PHY specified in the DT mode. 2207 * @pl: a pointer to a &struct phylink returned from phylink_create() 2208 * @dn: a pointer to a &struct device_node. 2209 * @flags: PHY-specific flags to communicate to the PHY device driver 2210 * 2211 * Connect the phy specified in the device node @dn to the phylink instance 2212 * specified by @pl. Actions specified in phylink_connect_phy() will be 2213 * performed. 2214 * 2215 * Returns 0 on success or a negative errno. 2216 */ 2217 int phylink_of_phy_connect(struct phylink *pl, struct device_node *dn, 2218 u32 flags) 2219 { 2220 return phylink_fwnode_phy_connect(pl, of_fwnode_handle(dn), flags); 2221 } 2222 EXPORT_SYMBOL_GPL(phylink_of_phy_connect); 2223 2224 /** 2225 * phylink_fwnode_phy_connect() - connect the PHY specified in the fwnode. 2226 * @pl: a pointer to a &struct phylink returned from phylink_create() 2227 * @fwnode: a pointer to a &struct fwnode_handle. 2228 * @flags: PHY-specific flags to communicate to the PHY device driver 2229 * 2230 * Connect the phy specified @fwnode to the phylink instance specified 2231 * by @pl. 2232 * 2233 * Returns 0 on success or a negative errno. 2234 */ 2235 int phylink_fwnode_phy_connect(struct phylink *pl, 2236 const struct fwnode_handle *fwnode, 2237 u32 flags) 2238 { 2239 struct fwnode_handle *phy_fwnode; 2240 struct phy_device *phy_dev; 2241 int ret; 2242 2243 /* Fixed links and 802.3z are handled without needing a PHY */ 2244 if (pl->cfg_link_an_mode == MLO_AN_FIXED || 2245 (pl->cfg_link_an_mode == MLO_AN_INBAND && 2246 phy_interface_mode_is_8023z(pl->link_interface))) 2247 return 0; 2248 2249 phy_fwnode = fwnode_get_phy_node(fwnode); 2250 if (IS_ERR(phy_fwnode)) { 2251 if (pl->cfg_link_an_mode == MLO_AN_PHY) 2252 return -ENODEV; 2253 return 0; 2254 } 2255 2256 phy_dev = fwnode_phy_find_device(phy_fwnode); 2257 /* We're done with the phy_node handle */ 2258 fwnode_handle_put(phy_fwnode); 2259 if (!phy_dev) 2260 return -ENODEV; 2261 2262 /* Use PHY device/driver interface */ 2263 if (pl->link_interface == PHY_INTERFACE_MODE_NA) { 2264 pl->link_interface = phy_dev->interface; 2265 pl->link_config.interface = pl->link_interface; 2266 } 2267 2268 if (pl->config->mac_requires_rxc) 2269 flags |= PHY_F_RXC_ALWAYS_ON; 2270 2271 ret = phy_attach_direct(pl->netdev, phy_dev, flags, 2272 pl->link_interface); 2273 phy_device_free(phy_dev); 2274 if (ret) 2275 return ret; 2276 2277 ret = phylink_bringup_phy(pl, phy_dev, pl->link_config.interface); 2278 if (ret) 2279 phy_detach(phy_dev); 2280 2281 return ret; 2282 } 2283 EXPORT_SYMBOL_GPL(phylink_fwnode_phy_connect); 2284 2285 /** 2286 * phylink_disconnect_phy() - disconnect any PHY attached to the phylink 2287 * instance. 2288 * @pl: a pointer to a &struct phylink returned from phylink_create() 2289 * 2290 * Disconnect any current PHY from the phylink instance described by @pl. 2291 */ 2292 void phylink_disconnect_phy(struct phylink *pl) 2293 { 2294 struct phy_device *phy; 2295 2296 ASSERT_RTNL(); 2297 2298 phy = pl->phydev; 2299 if (phy) { 2300 mutex_lock(&phy->lock); 2301 mutex_lock(&pl->state_mutex); 2302 pl->phydev = NULL; 2303 pl->phy_enable_tx_lpi = false; 2304 pl->mac_tx_clk_stop = false; 2305 mutex_unlock(&pl->state_mutex); 2306 mutex_unlock(&phy->lock); 2307 flush_work(&pl->resolve); 2308 2309 phy_disconnect(phy); 2310 } 2311 } 2312 EXPORT_SYMBOL_GPL(phylink_disconnect_phy); 2313 2314 static void phylink_link_changed(struct phylink *pl, bool up, const char *what) 2315 { 2316 if (!up) 2317 pl->link_failed = true; 2318 phylink_run_resolve(pl); 2319 phylink_dbg(pl, "%s link %s\n", what, up ? "up" : "down"); 2320 } 2321 2322 /** 2323 * phylink_mac_change() - notify phylink of a change in MAC state 2324 * @pl: a pointer to a &struct phylink returned from phylink_create() 2325 * @up: indicates whether the link is currently up. 2326 * 2327 * The MAC driver should call this driver when the state of its link 2328 * changes (eg, link failure, new negotiation results, etc.) 2329 */ 2330 void phylink_mac_change(struct phylink *pl, bool up) 2331 { 2332 phylink_link_changed(pl, up, "mac"); 2333 } 2334 EXPORT_SYMBOL_GPL(phylink_mac_change); 2335 2336 /** 2337 * phylink_pcs_change() - notify phylink of a change to PCS link state 2338 * @pcs: pointer to &struct phylink_pcs 2339 * @up: indicates whether the link is currently up. 2340 * 2341 * The PCS driver should call this when the state of its link changes 2342 * (e.g. link failure, new negotiation results, etc.) Note: it should 2343 * not determine "up" by reading the BMSR. If in doubt about the link 2344 * state at interrupt time, then pass true if pcs_get_state() returns 2345 * the latched link-down state, otherwise pass false. 2346 */ 2347 void phylink_pcs_change(struct phylink_pcs *pcs, bool up) 2348 { 2349 struct phylink *pl = pcs->phylink; 2350 2351 if (pl) 2352 phylink_link_changed(pl, up, "pcs"); 2353 } 2354 EXPORT_SYMBOL_GPL(phylink_pcs_change); 2355 2356 static irqreturn_t phylink_link_handler(int irq, void *data) 2357 { 2358 struct phylink *pl = data; 2359 2360 phylink_run_resolve(pl); 2361 2362 return IRQ_HANDLED; 2363 } 2364 2365 /** 2366 * phylink_start() - start a phylink instance 2367 * @pl: a pointer to a &struct phylink returned from phylink_create() 2368 * 2369 * Start the phylink instance specified by @pl, configuring the MAC for the 2370 * desired link mode(s) and negotiation style. This should be called from the 2371 * network device driver's &struct net_device_ops ndo_open() method. 2372 */ 2373 void phylink_start(struct phylink *pl) 2374 { 2375 bool poll = false; 2376 2377 ASSERT_RTNL(); 2378 2379 phylink_info(pl, "configuring for %s/%s link mode\n", 2380 phylink_an_mode_str(pl->req_link_an_mode), 2381 phy_modes(pl->link_config.interface)); 2382 2383 /* Always set the carrier off */ 2384 if (pl->netdev) 2385 netif_carrier_off(pl->netdev); 2386 2387 pl->pcs_state = PCS_STATE_STARTING; 2388 2389 /* Apply the link configuration to the MAC when starting. This allows 2390 * a fixed-link to start with the correct parameters, and also 2391 * ensures that we set the appropriate advertisement for Serdes links. 2392 * 2393 * Restart autonegotiation if using 802.3z to ensure that the link 2394 * parameters are properly negotiated. This is necessary for DSA 2395 * switches using 802.3z negotiation to ensure they see our modes. 2396 */ 2397 phylink_mac_initial_config(pl, true); 2398 2399 pl->pcs_state = PCS_STATE_STARTED; 2400 2401 phylink_enable_and_run_resolve(pl, PHYLINK_DISABLE_STOPPED); 2402 2403 if (pl->cfg_link_an_mode == MLO_AN_FIXED && pl->link_gpio) { 2404 int irq = gpiod_to_irq(pl->link_gpio); 2405 2406 if (irq > 0) { 2407 if (!request_irq(irq, phylink_link_handler, 2408 IRQF_TRIGGER_RISING | 2409 IRQF_TRIGGER_FALLING, 2410 "netdev link", pl)) 2411 pl->link_irq = irq; 2412 else 2413 irq = 0; 2414 } 2415 if (irq <= 0) 2416 poll = true; 2417 } 2418 2419 if (pl->cfg_link_an_mode == MLO_AN_FIXED) 2420 poll |= pl->config->poll_fixed_state; 2421 2422 if (poll) 2423 mod_timer(&pl->link_poll, jiffies + HZ); 2424 if (pl->phydev) 2425 phy_start(pl->phydev); 2426 if (pl->sfp_bus) 2427 sfp_upstream_start(pl->sfp_bus); 2428 } 2429 EXPORT_SYMBOL_GPL(phylink_start); 2430 2431 /** 2432 * phylink_stop() - stop a phylink instance 2433 * @pl: a pointer to a &struct phylink returned from phylink_create() 2434 * 2435 * Stop the phylink instance specified by @pl. This should be called from the 2436 * network device driver's &struct net_device_ops ndo_stop() method. The 2437 * network device's carrier state should not be changed prior to calling this 2438 * function. 2439 * 2440 * This will synchronously bring down the link if the link is not already 2441 * down (in other words, it will trigger a mac_link_down() method call.) 2442 */ 2443 void phylink_stop(struct phylink *pl) 2444 { 2445 ASSERT_RTNL(); 2446 2447 if (pl->sfp_bus) 2448 sfp_upstream_stop(pl->sfp_bus); 2449 if (pl->phydev) 2450 phy_stop(pl->phydev); 2451 del_timer_sync(&pl->link_poll); 2452 if (pl->link_irq) { 2453 free_irq(pl->link_irq, pl); 2454 pl->link_irq = 0; 2455 } 2456 2457 phylink_run_resolve_and_disable(pl, PHYLINK_DISABLE_STOPPED); 2458 2459 pl->pcs_state = PCS_STATE_DOWN; 2460 2461 phylink_pcs_disable(pl->pcs); 2462 } 2463 EXPORT_SYMBOL_GPL(phylink_stop); 2464 2465 /** 2466 * phylink_rx_clk_stop_block() - block PHY ability to stop receive clock in LPI 2467 * @pl: a pointer to a &struct phylink returned from phylink_create() 2468 * 2469 * Disable the PHY's ability to stop the receive clock while the receive path 2470 * is in EEE LPI state, until the number of calls to phylink_rx_clk_stop_block() 2471 * are balanced by calls to phylink_rx_clk_stop_unblock(). 2472 */ 2473 void phylink_rx_clk_stop_block(struct phylink *pl) 2474 { 2475 ASSERT_RTNL(); 2476 2477 if (pl->mac_rx_clk_stop_blocked == U8_MAX) { 2478 phylink_warn(pl, "%s called too many times - ignoring\n", 2479 __func__); 2480 dump_stack(); 2481 return; 2482 } 2483 2484 /* Disable PHY receive clock stop if this is the first time this 2485 * function has been called and clock-stop was previously enabled. 2486 */ 2487 if (pl->mac_rx_clk_stop_blocked++ == 0 && 2488 pl->mac_supports_eee_ops && pl->phydev && 2489 pl->config->eee_rx_clk_stop_enable) 2490 phy_eee_rx_clock_stop(pl->phydev, false); 2491 } 2492 EXPORT_SYMBOL_GPL(phylink_rx_clk_stop_block); 2493 2494 /** 2495 * phylink_rx_clk_stop_unblock() - unblock PHY ability to stop receive clock 2496 * @pl: a pointer to a &struct phylink returned from phylink_create() 2497 * 2498 * All calls to phylink_rx_clk_stop_block() must be balanced with a 2499 * corresponding call to phylink_rx_clk_stop_unblock() to restore the PHYs 2500 * ability to stop the receive clock when the receive path is in EEE LPI mode. 2501 */ 2502 void phylink_rx_clk_stop_unblock(struct phylink *pl) 2503 { 2504 ASSERT_RTNL(); 2505 2506 if (pl->mac_rx_clk_stop_blocked == 0) { 2507 phylink_warn(pl, "%s called too many times - ignoring\n", 2508 __func__); 2509 dump_stack(); 2510 return; 2511 } 2512 2513 /* Re-enable PHY receive clock stop if the number of unblocks matches 2514 * the number of calls to the block function above. 2515 */ 2516 if (--pl->mac_rx_clk_stop_blocked == 0 && 2517 pl->mac_supports_eee_ops && pl->phydev && 2518 pl->config->eee_rx_clk_stop_enable) 2519 phy_eee_rx_clock_stop(pl->phydev, true); 2520 } 2521 EXPORT_SYMBOL_GPL(phylink_rx_clk_stop_unblock); 2522 2523 /** 2524 * phylink_suspend() - handle a network device suspend event 2525 * @pl: a pointer to a &struct phylink returned from phylink_create() 2526 * @mac_wol: true if the MAC needs to receive packets for Wake-on-Lan 2527 * 2528 * Handle a network device suspend event. There are several cases: 2529 * 2530 * - If Wake-on-Lan is not active, we can bring down the link between 2531 * the MAC and PHY by calling phylink_stop(). 2532 * - If Wake-on-Lan is active, and being handled only by the PHY, we 2533 * can also bring down the link between the MAC and PHY. 2534 * - If Wake-on-Lan is active, but being handled by the MAC, the MAC 2535 * still needs to receive packets, so we can not bring the link down. 2536 */ 2537 void phylink_suspend(struct phylink *pl, bool mac_wol) 2538 { 2539 ASSERT_RTNL(); 2540 2541 if (mac_wol && (!pl->netdev || pl->netdev->ethtool->wol_enabled)) { 2542 /* Wake-on-Lan enabled, MAC handling */ 2543 mutex_lock(&pl->state_mutex); 2544 2545 /* Stop the resolver bringing the link up */ 2546 __set_bit(PHYLINK_DISABLE_MAC_WOL, &pl->phylink_disable_state); 2547 2548 /* Disable the carrier, to prevent transmit timeouts, 2549 * but one would hope all packets have been sent. This 2550 * also means phylink_resolve() will do nothing. 2551 */ 2552 if (pl->netdev) 2553 netif_carrier_off(pl->netdev); 2554 else 2555 pl->old_link_state = false; 2556 2557 /* We do not call mac_link_down() here as we want the 2558 * link to remain up to receive the WoL packets. 2559 */ 2560 mutex_unlock(&pl->state_mutex); 2561 } else { 2562 phylink_stop(pl); 2563 } 2564 } 2565 EXPORT_SYMBOL_GPL(phylink_suspend); 2566 2567 /** 2568 * phylink_prepare_resume() - prepare to resume a network device 2569 * @pl: a pointer to a &struct phylink returned from phylink_create() 2570 * 2571 * Optional, but if called must be called prior to phylink_resume(). 2572 * 2573 * Prepare to resume a network device, preparing the PHY as necessary. 2574 */ 2575 void phylink_prepare_resume(struct phylink *pl) 2576 { 2577 struct phy_device *phydev = pl->phydev; 2578 2579 ASSERT_RTNL(); 2580 2581 /* IEEE 802.3 22.2.4.1.5 allows PHYs to stop their receive clock 2582 * when PDOWN is set. However, some MACs require RXC to be running 2583 * in order to resume. If the MAC requires RXC, and we have a PHY, 2584 * then resume the PHY. Note that 802.3 allows PHYs 500ms before 2585 * the clock meets requirements. We do not implement this delay. 2586 */ 2587 if (pl->config->mac_requires_rxc && phydev && phydev->suspended) 2588 phy_resume(phydev); 2589 } 2590 EXPORT_SYMBOL_GPL(phylink_prepare_resume); 2591 2592 /** 2593 * phylink_resume() - handle a network device resume event 2594 * @pl: a pointer to a &struct phylink returned from phylink_create() 2595 * 2596 * Undo the effects of phylink_suspend(), returning the link to an 2597 * operational state. 2598 */ 2599 void phylink_resume(struct phylink *pl) 2600 { 2601 ASSERT_RTNL(); 2602 2603 if (test_bit(PHYLINK_DISABLE_MAC_WOL, &pl->phylink_disable_state)) { 2604 /* Wake-on-Lan enabled, MAC handling */ 2605 2606 /* Call mac_link_down() so we keep the overall state balanced. 2607 * Do this under the state_mutex lock for consistency. This 2608 * will cause a "Link Down" message to be printed during 2609 * resume, which is harmless - the true link state will be 2610 * printed when we run a resolve. 2611 */ 2612 mutex_lock(&pl->state_mutex); 2613 phylink_link_down(pl); 2614 mutex_unlock(&pl->state_mutex); 2615 2616 /* Re-apply the link parameters so that all the settings get 2617 * restored to the MAC. 2618 */ 2619 phylink_mac_initial_config(pl, true); 2620 2621 /* Re-enable and re-resolve the link parameters */ 2622 phylink_enable_and_run_resolve(pl, PHYLINK_DISABLE_MAC_WOL); 2623 } else { 2624 phylink_start(pl); 2625 } 2626 } 2627 EXPORT_SYMBOL_GPL(phylink_resume); 2628 2629 /** 2630 * phylink_ethtool_get_wol() - get the wake on lan parameters for the PHY 2631 * @pl: a pointer to a &struct phylink returned from phylink_create() 2632 * @wol: a pointer to &struct ethtool_wolinfo to hold the read parameters 2633 * 2634 * Read the wake on lan parameters from the PHY attached to the phylink 2635 * instance specified by @pl. If no PHY is currently attached, report no 2636 * support for wake on lan. 2637 */ 2638 void phylink_ethtool_get_wol(struct phylink *pl, struct ethtool_wolinfo *wol) 2639 { 2640 ASSERT_RTNL(); 2641 2642 wol->supported = 0; 2643 wol->wolopts = 0; 2644 2645 if (pl->phydev) 2646 phy_ethtool_get_wol(pl->phydev, wol); 2647 } 2648 EXPORT_SYMBOL_GPL(phylink_ethtool_get_wol); 2649 2650 /** 2651 * phylink_ethtool_set_wol() - set wake on lan parameters 2652 * @pl: a pointer to a &struct phylink returned from phylink_create() 2653 * @wol: a pointer to &struct ethtool_wolinfo for the desired parameters 2654 * 2655 * Set the wake on lan parameters for the PHY attached to the phylink 2656 * instance specified by @pl. If no PHY is attached, returns %EOPNOTSUPP 2657 * error. 2658 * 2659 * Returns zero on success or negative errno code. 2660 */ 2661 int phylink_ethtool_set_wol(struct phylink *pl, struct ethtool_wolinfo *wol) 2662 { 2663 int ret = -EOPNOTSUPP; 2664 2665 ASSERT_RTNL(); 2666 2667 if (pl->phydev) 2668 ret = phy_ethtool_set_wol(pl->phydev, wol); 2669 2670 return ret; 2671 } 2672 EXPORT_SYMBOL_GPL(phylink_ethtool_set_wol); 2673 2674 static phy_interface_t phylink_sfp_select_interface(struct phylink *pl, 2675 const unsigned long *link_modes) 2676 { 2677 phy_interface_t interface; 2678 2679 interface = sfp_select_interface(pl->sfp_bus, link_modes); 2680 if (interface == PHY_INTERFACE_MODE_NA) { 2681 phylink_err(pl, 2682 "selection of interface failed, advertisement %*pb\n", 2683 __ETHTOOL_LINK_MODE_MASK_NBITS, 2684 link_modes); 2685 return interface; 2686 } 2687 2688 if (!test_bit(interface, pl->config->supported_interfaces)) { 2689 phylink_err(pl, 2690 "selection of interface failed, SFP selected %s (%u) but MAC supports %*pbl\n", 2691 phy_modes(interface), interface, 2692 (int)PHY_INTERFACE_MODE_MAX, 2693 pl->config->supported_interfaces); 2694 return PHY_INTERFACE_MODE_NA; 2695 } 2696 2697 return interface; 2698 } 2699 2700 static void phylink_merge_link_mode(unsigned long *dst, const unsigned long *b) 2701 { 2702 __ETHTOOL_DECLARE_LINK_MODE_MASK(mask); 2703 2704 linkmode_zero(mask); 2705 phylink_set_port_modes(mask); 2706 2707 linkmode_and(dst, dst, mask); 2708 linkmode_or(dst, dst, b); 2709 } 2710 2711 static void phylink_get_ksettings(const struct phylink_link_state *state, 2712 struct ethtool_link_ksettings *kset) 2713 { 2714 phylink_merge_link_mode(kset->link_modes.advertising, state->advertising); 2715 linkmode_copy(kset->link_modes.lp_advertising, state->lp_advertising); 2716 if (kset->base.rate_matching == RATE_MATCH_NONE) { 2717 kset->base.speed = state->speed; 2718 kset->base.duplex = state->duplex; 2719 } 2720 kset->base.autoneg = linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, 2721 state->advertising) ? 2722 AUTONEG_ENABLE : AUTONEG_DISABLE; 2723 } 2724 2725 /** 2726 * phylink_ethtool_ksettings_get() - get the current link settings 2727 * @pl: a pointer to a &struct phylink returned from phylink_create() 2728 * @kset: a pointer to a &struct ethtool_link_ksettings to hold link settings 2729 * 2730 * Read the current link settings for the phylink instance specified by @pl. 2731 * This will be the link settings read from the MAC, PHY or fixed link 2732 * settings depending on the current negotiation mode. 2733 */ 2734 int phylink_ethtool_ksettings_get(struct phylink *pl, 2735 struct ethtool_link_ksettings *kset) 2736 { 2737 struct phylink_link_state link_state; 2738 2739 ASSERT_RTNL(); 2740 2741 if (pl->phydev) 2742 phy_ethtool_ksettings_get(pl->phydev, kset); 2743 else 2744 kset->base.port = pl->link_port; 2745 2746 linkmode_copy(kset->link_modes.supported, pl->supported); 2747 2748 switch (pl->act_link_an_mode) { 2749 case MLO_AN_FIXED: 2750 /* We are using fixed settings. Report these as the 2751 * current link settings - and note that these also 2752 * represent the supported speeds/duplex/pause modes. 2753 */ 2754 phylink_get_fixed_state(pl, &link_state); 2755 phylink_get_ksettings(&link_state, kset); 2756 break; 2757 2758 case MLO_AN_INBAND: 2759 /* If there is a phy attached, then use the reported 2760 * settings from the phy with no modification. 2761 */ 2762 if (pl->phydev) 2763 break; 2764 2765 phylink_mac_pcs_get_state(pl, &link_state); 2766 2767 /* The MAC is reporting the link results from its own PCS 2768 * layer via in-band status. Report these as the current 2769 * link settings. 2770 */ 2771 phylink_get_ksettings(&link_state, kset); 2772 break; 2773 } 2774 2775 return 0; 2776 } 2777 EXPORT_SYMBOL_GPL(phylink_ethtool_ksettings_get); 2778 2779 static bool phylink_validate_pcs_inband_autoneg(struct phylink *pl, 2780 phy_interface_t interface, 2781 unsigned long *adv) 2782 { 2783 unsigned int inband = phylink_inband_caps(pl, interface); 2784 unsigned int mask; 2785 2786 /* If the PCS doesn't implement inband support, be permissive. */ 2787 if (!inband) 2788 return true; 2789 2790 if (linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, adv)) 2791 mask = LINK_INBAND_ENABLE; 2792 else 2793 mask = LINK_INBAND_DISABLE; 2794 2795 /* Check whether the PCS implements the required mode */ 2796 return !!(inband & mask); 2797 } 2798 2799 /** 2800 * phylink_ethtool_ksettings_set() - set the link settings 2801 * @pl: a pointer to a &struct phylink returned from phylink_create() 2802 * @kset: a pointer to a &struct ethtool_link_ksettings for the desired modes 2803 */ 2804 int phylink_ethtool_ksettings_set(struct phylink *pl, 2805 const struct ethtool_link_ksettings *kset) 2806 { 2807 __ETHTOOL_DECLARE_LINK_MODE_MASK(support); 2808 const struct link_capabilities *c; 2809 struct phylink_link_state config; 2810 2811 ASSERT_RTNL(); 2812 2813 if (pl->phydev) { 2814 struct ethtool_link_ksettings phy_kset = *kset; 2815 2816 linkmode_and(phy_kset.link_modes.advertising, 2817 phy_kset.link_modes.advertising, 2818 pl->supported); 2819 2820 /* We can rely on phylib for this update; we also do not need 2821 * to update the pl->link_config settings: 2822 * - the configuration returned via ksettings_get() will come 2823 * from phylib whenever a PHY is present. 2824 * - link_config.interface will be updated by the PHY calling 2825 * back via phylink_phy_change() and a subsequent resolve. 2826 * - initial link configuration for PHY mode comes from the 2827 * last phy state updated via phylink_phy_change(). 2828 * - other configuration changes (e.g. pause modes) are 2829 * performed directly via phylib. 2830 * - if in in-band mode with a PHY, the link configuration 2831 * is passed on the link from the PHY, and all of 2832 * link_config.{speed,duplex,an_enabled,pause} are not used. 2833 * - the only possible use would be link_config.advertising 2834 * pause modes when in 1000base-X mode with a PHY, but in 2835 * the presence of a PHY, this should not be changed as that 2836 * should be determined from the media side advertisement. 2837 */ 2838 return phy_ethtool_ksettings_set(pl->phydev, &phy_kset); 2839 } 2840 2841 config = pl->link_config; 2842 /* Mask out unsupported advertisements */ 2843 linkmode_and(config.advertising, kset->link_modes.advertising, 2844 pl->supported); 2845 2846 /* FIXME: should we reject autoneg if phy/mac does not support it? */ 2847 switch (kset->base.autoneg) { 2848 case AUTONEG_DISABLE: 2849 /* Autonegotiation disabled, select a suitable speed and 2850 * duplex. 2851 */ 2852 c = phy_caps_lookup(kset->base.speed, kset->base.duplex, 2853 pl->supported, false); 2854 if (!c) 2855 return -EINVAL; 2856 2857 /* If we have a fixed link, refuse to change link parameters. 2858 * If the link parameters match, accept them but do nothing. 2859 */ 2860 if (pl->req_link_an_mode == MLO_AN_FIXED) { 2861 if (c->speed != pl->link_config.speed || 2862 c->duplex != pl->link_config.duplex) 2863 return -EINVAL; 2864 return 0; 2865 } 2866 2867 config.speed = c->speed; 2868 config.duplex = c->duplex; 2869 break; 2870 2871 case AUTONEG_ENABLE: 2872 /* If we have a fixed link, allow autonegotiation (since that 2873 * is our default case) but do not allow the advertisement to 2874 * be changed. If the advertisement matches, simply return. 2875 */ 2876 if (pl->req_link_an_mode == MLO_AN_FIXED) { 2877 if (!linkmode_equal(config.advertising, 2878 pl->link_config.advertising)) 2879 return -EINVAL; 2880 return 0; 2881 } 2882 2883 config.speed = SPEED_UNKNOWN; 2884 config.duplex = DUPLEX_UNKNOWN; 2885 break; 2886 2887 default: 2888 return -EINVAL; 2889 } 2890 2891 /* We have ruled out the case with a PHY attached, and the 2892 * fixed-link cases. All that is left are in-band links. 2893 */ 2894 linkmode_mod_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, config.advertising, 2895 kset->base.autoneg == AUTONEG_ENABLE); 2896 2897 /* If this link is with an SFP, ensure that changes to advertised modes 2898 * also cause the associated interface to be selected such that the 2899 * link can be configured correctly. 2900 */ 2901 if (pl->sfp_bus) { 2902 config.interface = phylink_sfp_select_interface(pl, 2903 config.advertising); 2904 if (config.interface == PHY_INTERFACE_MODE_NA) 2905 return -EINVAL; 2906 2907 /* Revalidate with the selected interface */ 2908 linkmode_copy(support, pl->supported); 2909 if (phylink_validate(pl, support, &config)) { 2910 phylink_err(pl, "validation of %s/%s with support %*pb failed\n", 2911 phylink_an_mode_str(pl->req_link_an_mode), 2912 phy_modes(config.interface), 2913 __ETHTOOL_LINK_MODE_MASK_NBITS, support); 2914 return -EINVAL; 2915 } 2916 } else { 2917 /* Validate without changing the current supported mask. */ 2918 linkmode_copy(support, pl->supported); 2919 if (phylink_validate(pl, support, &config)) 2920 return -EINVAL; 2921 } 2922 2923 /* If autonegotiation is enabled, we must have an advertisement */ 2924 if (linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, 2925 config.advertising) && 2926 phylink_is_empty_linkmode(config.advertising)) 2927 return -EINVAL; 2928 2929 /* Validate the autonegotiation state. We don't have a PHY in this 2930 * situation, so the PCS is the media-facing entity. 2931 */ 2932 if (!phylink_validate_pcs_inband_autoneg(pl, config.interface, 2933 config.advertising)) 2934 return -EINVAL; 2935 2936 mutex_lock(&pl->state_mutex); 2937 pl->link_config.speed = config.speed; 2938 pl->link_config.duplex = config.duplex; 2939 2940 if (pl->link_config.interface != config.interface) { 2941 /* The interface changed, e.g. 1000base-X <-> 2500base-X */ 2942 /* We need to force the link down, then change the interface */ 2943 if (pl->old_link_state) { 2944 phylink_link_down(pl); 2945 pl->old_link_state = false; 2946 } 2947 if (!test_bit(PHYLINK_DISABLE_STOPPED, 2948 &pl->phylink_disable_state)) 2949 phylink_major_config(pl, false, &config); 2950 pl->link_config.interface = config.interface; 2951 linkmode_copy(pl->link_config.advertising, config.advertising); 2952 } else if (!linkmode_equal(pl->link_config.advertising, 2953 config.advertising)) { 2954 linkmode_copy(pl->link_config.advertising, config.advertising); 2955 phylink_change_inband_advert(pl); 2956 } 2957 mutex_unlock(&pl->state_mutex); 2958 2959 return 0; 2960 } 2961 EXPORT_SYMBOL_GPL(phylink_ethtool_ksettings_set); 2962 2963 /** 2964 * phylink_ethtool_nway_reset() - restart negotiation 2965 * @pl: a pointer to a &struct phylink returned from phylink_create() 2966 * 2967 * Restart negotiation for the phylink instance specified by @pl. This will 2968 * cause any attached phy to restart negotiation with the link partner, and 2969 * if the MAC is in a BaseX mode, the MAC will also be requested to restart 2970 * negotiation. 2971 * 2972 * Returns zero on success, or negative error code. 2973 */ 2974 int phylink_ethtool_nway_reset(struct phylink *pl) 2975 { 2976 int ret = 0; 2977 2978 ASSERT_RTNL(); 2979 2980 if (pl->phydev) 2981 ret = phy_restart_aneg(pl->phydev); 2982 phylink_pcs_an_restart(pl); 2983 2984 return ret; 2985 } 2986 EXPORT_SYMBOL_GPL(phylink_ethtool_nway_reset); 2987 2988 /** 2989 * phylink_ethtool_get_pauseparam() - get the current pause parameters 2990 * @pl: a pointer to a &struct phylink returned from phylink_create() 2991 * @pause: a pointer to a &struct ethtool_pauseparam 2992 */ 2993 void phylink_ethtool_get_pauseparam(struct phylink *pl, 2994 struct ethtool_pauseparam *pause) 2995 { 2996 ASSERT_RTNL(); 2997 2998 pause->autoneg = !!(pl->link_config.pause & MLO_PAUSE_AN); 2999 pause->rx_pause = !!(pl->link_config.pause & MLO_PAUSE_RX); 3000 pause->tx_pause = !!(pl->link_config.pause & MLO_PAUSE_TX); 3001 } 3002 EXPORT_SYMBOL_GPL(phylink_ethtool_get_pauseparam); 3003 3004 /** 3005 * phylink_ethtool_set_pauseparam() - set the current pause parameters 3006 * @pl: a pointer to a &struct phylink returned from phylink_create() 3007 * @pause: a pointer to a &struct ethtool_pauseparam 3008 */ 3009 int phylink_ethtool_set_pauseparam(struct phylink *pl, 3010 struct ethtool_pauseparam *pause) 3011 { 3012 struct phylink_link_state *config = &pl->link_config; 3013 bool manual_changed; 3014 int pause_state; 3015 3016 ASSERT_RTNL(); 3017 3018 if (pl->req_link_an_mode == MLO_AN_FIXED) 3019 return -EOPNOTSUPP; 3020 3021 if (!phylink_test(pl->supported, Pause) && 3022 !phylink_test(pl->supported, Asym_Pause)) 3023 return -EOPNOTSUPP; 3024 3025 if (!phylink_test(pl->supported, Asym_Pause) && 3026 pause->rx_pause != pause->tx_pause) 3027 return -EINVAL; 3028 3029 pause_state = 0; 3030 if (pause->autoneg) 3031 pause_state |= MLO_PAUSE_AN; 3032 if (pause->rx_pause) 3033 pause_state |= MLO_PAUSE_RX; 3034 if (pause->tx_pause) 3035 pause_state |= MLO_PAUSE_TX; 3036 3037 mutex_lock(&pl->state_mutex); 3038 /* 3039 * See the comments for linkmode_set_pause(), wrt the deficiencies 3040 * with the current implementation. A solution to this issue would 3041 * be: 3042 * ethtool Local device 3043 * rx tx Pause AsymDir 3044 * 0 0 0 0 3045 * 1 0 1 1 3046 * 0 1 0 1 3047 * 1 1 1 1 3048 * and then use the ethtool rx/tx enablement status to mask the 3049 * rx/tx pause resolution. 3050 */ 3051 linkmode_set_pause(config->advertising, pause->tx_pause, 3052 pause->rx_pause); 3053 3054 manual_changed = (config->pause ^ pause_state) & MLO_PAUSE_AN || 3055 (!(pause_state & MLO_PAUSE_AN) && 3056 (config->pause ^ pause_state) & MLO_PAUSE_TXRX_MASK); 3057 3058 config->pause = pause_state; 3059 3060 /* Update our in-band advertisement, triggering a renegotiation if 3061 * the advertisement changed. 3062 */ 3063 if (!pl->phydev) 3064 phylink_change_inband_advert(pl); 3065 3066 mutex_unlock(&pl->state_mutex); 3067 3068 /* If we have a PHY, a change of the pause frame advertisement will 3069 * cause phylib to renegotiate (if AN is enabled) which will in turn 3070 * call our phylink_phy_change() and trigger a resolve. Note that 3071 * we can't hold our state mutex while calling phy_set_asym_pause(). 3072 */ 3073 if (pl->phydev) 3074 phy_set_asym_pause(pl->phydev, pause->rx_pause, 3075 pause->tx_pause); 3076 3077 /* If the manual pause settings changed, make sure we trigger a 3078 * resolve to update their state; we can not guarantee that the 3079 * link will cycle. 3080 */ 3081 if (manual_changed) { 3082 pl->link_failed = true; 3083 phylink_run_resolve(pl); 3084 } 3085 3086 return 0; 3087 } 3088 EXPORT_SYMBOL_GPL(phylink_ethtool_set_pauseparam); 3089 3090 /** 3091 * phylink_get_eee_err() - read the energy efficient ethernet error 3092 * counter 3093 * @pl: a pointer to a &struct phylink returned from phylink_create(). 3094 * 3095 * Read the Energy Efficient Ethernet error counter from the PHY associated 3096 * with the phylink instance specified by @pl. 3097 * 3098 * Returns positive error counter value, or negative error code. 3099 */ 3100 int phylink_get_eee_err(struct phylink *pl) 3101 { 3102 int ret = 0; 3103 3104 ASSERT_RTNL(); 3105 3106 if (pl->phydev) 3107 ret = phy_get_eee_err(pl->phydev); 3108 3109 return ret; 3110 } 3111 EXPORT_SYMBOL_GPL(phylink_get_eee_err); 3112 3113 /** 3114 * phylink_ethtool_get_eee() - read the energy efficient ethernet parameters 3115 * @pl: a pointer to a &struct phylink returned from phylink_create() 3116 * @eee: a pointer to a &struct ethtool_keee for the read parameters 3117 */ 3118 int phylink_ethtool_get_eee(struct phylink *pl, struct ethtool_keee *eee) 3119 { 3120 int ret = -EOPNOTSUPP; 3121 3122 ASSERT_RTNL(); 3123 3124 if (pl->mac_supports_eee_ops && !pl->mac_supports_eee) 3125 return ret; 3126 3127 if (pl->phydev) { 3128 ret = phy_ethtool_get_eee(pl->phydev, eee); 3129 /* Restrict supported linkmode mask */ 3130 if (ret == 0 && pl->mac_supports_eee_ops) 3131 linkmode_and(eee->supported, eee->supported, 3132 pl->supported_lpi); 3133 } 3134 3135 return ret; 3136 } 3137 EXPORT_SYMBOL_GPL(phylink_ethtool_get_eee); 3138 3139 /** 3140 * phylink_ethtool_set_eee() - set the energy efficient ethernet parameters 3141 * @pl: a pointer to a &struct phylink returned from phylink_create() 3142 * @eee: a pointer to a &struct ethtool_keee for the desired parameters 3143 */ 3144 int phylink_ethtool_set_eee(struct phylink *pl, struct ethtool_keee *eee) 3145 { 3146 bool mac_eee = pl->mac_supports_eee; 3147 int ret = -EOPNOTSUPP; 3148 3149 ASSERT_RTNL(); 3150 3151 phylink_dbg(pl, "mac %s phylink EEE%s, adv %*pbl, LPI%s timer %uus\n", 3152 mac_eee ? "supports" : "does not support", 3153 eee->eee_enabled ? ", enabled" : "", 3154 __ETHTOOL_LINK_MODE_MASK_NBITS, eee->advertised, 3155 eee->tx_lpi_enabled ? " enabled" : "", eee->tx_lpi_timer); 3156 3157 if (pl->mac_supports_eee_ops && !mac_eee) 3158 return ret; 3159 3160 if (pl->phydev) { 3161 /* Restrict advertisement mask */ 3162 if (pl->mac_supports_eee_ops) 3163 linkmode_and(eee->advertised, eee->advertised, 3164 pl->supported_lpi); 3165 ret = phy_ethtool_set_eee(pl->phydev, eee); 3166 if (ret == 0) 3167 eee_to_eeecfg(&pl->eee_cfg, eee); 3168 } 3169 3170 return ret; 3171 } 3172 EXPORT_SYMBOL_GPL(phylink_ethtool_set_eee); 3173 3174 /* This emulates MII registers for a fixed-mode phy operating as per the 3175 * passed in state. "aneg" defines if we report negotiation is possible. 3176 * 3177 * FIXME: should deal with negotiation state too. 3178 */ 3179 static int phylink_mii_emul_read(unsigned int reg, 3180 struct phylink_link_state *state) 3181 { 3182 struct fixed_phy_status fs; 3183 unsigned long *lpa = state->lp_advertising; 3184 int val; 3185 3186 fs.link = state->link; 3187 fs.speed = state->speed; 3188 fs.duplex = state->duplex; 3189 fs.pause = test_bit(ETHTOOL_LINK_MODE_Pause_BIT, lpa); 3190 fs.asym_pause = test_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, lpa); 3191 3192 val = swphy_read_reg(reg, &fs); 3193 if (reg == MII_BMSR) { 3194 if (!state->an_complete) 3195 val &= ~BMSR_ANEGCOMPLETE; 3196 } 3197 return val; 3198 } 3199 3200 static int phylink_phy_read(struct phylink *pl, unsigned int phy_id, 3201 unsigned int reg) 3202 { 3203 struct phy_device *phydev = pl->phydev; 3204 int prtad, devad; 3205 3206 if (mdio_phy_id_is_c45(phy_id)) { 3207 prtad = mdio_phy_id_prtad(phy_id); 3208 devad = mdio_phy_id_devad(phy_id); 3209 return mdiobus_c45_read(pl->phydev->mdio.bus, prtad, devad, 3210 reg); 3211 } 3212 3213 if (phydev->is_c45) { 3214 switch (reg) { 3215 case MII_BMCR: 3216 case MII_BMSR: 3217 case MII_PHYSID1: 3218 case MII_PHYSID2: 3219 devad = __ffs(phydev->c45_ids.mmds_present); 3220 break; 3221 case MII_ADVERTISE: 3222 case MII_LPA: 3223 if (!(phydev->c45_ids.mmds_present & MDIO_DEVS_AN)) 3224 return -EINVAL; 3225 devad = MDIO_MMD_AN; 3226 if (reg == MII_ADVERTISE) 3227 reg = MDIO_AN_ADVERTISE; 3228 else 3229 reg = MDIO_AN_LPA; 3230 break; 3231 default: 3232 return -EINVAL; 3233 } 3234 prtad = phy_id; 3235 return mdiobus_c45_read(pl->phydev->mdio.bus, prtad, devad, 3236 reg); 3237 } 3238 3239 return mdiobus_read(pl->phydev->mdio.bus, phy_id, reg); 3240 } 3241 3242 static int phylink_phy_write(struct phylink *pl, unsigned int phy_id, 3243 unsigned int reg, unsigned int val) 3244 { 3245 struct phy_device *phydev = pl->phydev; 3246 int prtad, devad; 3247 3248 if (mdio_phy_id_is_c45(phy_id)) { 3249 prtad = mdio_phy_id_prtad(phy_id); 3250 devad = mdio_phy_id_devad(phy_id); 3251 return mdiobus_c45_write(pl->phydev->mdio.bus, prtad, devad, 3252 reg, val); 3253 } 3254 3255 if (phydev->is_c45) { 3256 switch (reg) { 3257 case MII_BMCR: 3258 case MII_BMSR: 3259 case MII_PHYSID1: 3260 case MII_PHYSID2: 3261 devad = __ffs(phydev->c45_ids.mmds_present); 3262 break; 3263 case MII_ADVERTISE: 3264 case MII_LPA: 3265 if (!(phydev->c45_ids.mmds_present & MDIO_DEVS_AN)) 3266 return -EINVAL; 3267 devad = MDIO_MMD_AN; 3268 if (reg == MII_ADVERTISE) 3269 reg = MDIO_AN_ADVERTISE; 3270 else 3271 reg = MDIO_AN_LPA; 3272 break; 3273 default: 3274 return -EINVAL; 3275 } 3276 return mdiobus_c45_write(pl->phydev->mdio.bus, phy_id, devad, 3277 reg, val); 3278 } 3279 3280 return mdiobus_write(phydev->mdio.bus, phy_id, reg, val); 3281 } 3282 3283 static int phylink_mii_read(struct phylink *pl, unsigned int phy_id, 3284 unsigned int reg) 3285 { 3286 struct phylink_link_state state; 3287 int val = 0xffff; 3288 3289 switch (pl->act_link_an_mode) { 3290 case MLO_AN_FIXED: 3291 if (phy_id == 0) { 3292 phylink_get_fixed_state(pl, &state); 3293 val = phylink_mii_emul_read(reg, &state); 3294 } 3295 break; 3296 3297 case MLO_AN_PHY: 3298 return -EOPNOTSUPP; 3299 3300 case MLO_AN_INBAND: 3301 if (phy_id == 0) { 3302 phylink_mac_pcs_get_state(pl, &state); 3303 val = phylink_mii_emul_read(reg, &state); 3304 } 3305 break; 3306 } 3307 3308 return val & 0xffff; 3309 } 3310 3311 static int phylink_mii_write(struct phylink *pl, unsigned int phy_id, 3312 unsigned int reg, unsigned int val) 3313 { 3314 switch (pl->act_link_an_mode) { 3315 case MLO_AN_FIXED: 3316 break; 3317 3318 case MLO_AN_PHY: 3319 return -EOPNOTSUPP; 3320 3321 case MLO_AN_INBAND: 3322 break; 3323 } 3324 3325 return 0; 3326 } 3327 3328 /** 3329 * phylink_mii_ioctl() - generic mii ioctl interface 3330 * @pl: a pointer to a &struct phylink returned from phylink_create() 3331 * @ifr: a pointer to a &struct ifreq for socket ioctls 3332 * @cmd: ioctl cmd to execute 3333 * 3334 * Perform the specified MII ioctl on the PHY attached to the phylink instance 3335 * specified by @pl. If no PHY is attached, emulate the presence of the PHY. 3336 * 3337 * Returns: zero on success or negative error code. 3338 * 3339 * %SIOCGMIIPHY: 3340 * read register from the current PHY. 3341 * %SIOCGMIIREG: 3342 * read register from the specified PHY. 3343 * %SIOCSMIIREG: 3344 * set a register on the specified PHY. 3345 */ 3346 int phylink_mii_ioctl(struct phylink *pl, struct ifreq *ifr, int cmd) 3347 { 3348 struct mii_ioctl_data *mii = if_mii(ifr); 3349 int ret; 3350 3351 ASSERT_RTNL(); 3352 3353 if (pl->phydev) { 3354 /* PHYs only exist for MLO_AN_PHY and SGMII */ 3355 switch (cmd) { 3356 case SIOCGMIIPHY: 3357 mii->phy_id = pl->phydev->mdio.addr; 3358 fallthrough; 3359 3360 case SIOCGMIIREG: 3361 ret = phylink_phy_read(pl, mii->phy_id, mii->reg_num); 3362 if (ret >= 0) { 3363 mii->val_out = ret; 3364 ret = 0; 3365 } 3366 break; 3367 3368 case SIOCSMIIREG: 3369 ret = phylink_phy_write(pl, mii->phy_id, mii->reg_num, 3370 mii->val_in); 3371 break; 3372 3373 default: 3374 ret = phy_mii_ioctl(pl->phydev, ifr, cmd); 3375 break; 3376 } 3377 } else { 3378 switch (cmd) { 3379 case SIOCGMIIPHY: 3380 mii->phy_id = 0; 3381 fallthrough; 3382 3383 case SIOCGMIIREG: 3384 ret = phylink_mii_read(pl, mii->phy_id, mii->reg_num); 3385 if (ret >= 0) { 3386 mii->val_out = ret; 3387 ret = 0; 3388 } 3389 break; 3390 3391 case SIOCSMIIREG: 3392 ret = phylink_mii_write(pl, mii->phy_id, mii->reg_num, 3393 mii->val_in); 3394 break; 3395 3396 default: 3397 ret = -EOPNOTSUPP; 3398 break; 3399 } 3400 } 3401 3402 return ret; 3403 } 3404 EXPORT_SYMBOL_GPL(phylink_mii_ioctl); 3405 3406 /** 3407 * phylink_speed_down() - set the non-SFP PHY to lowest speed supported by both 3408 * link partners 3409 * @pl: a pointer to a &struct phylink returned from phylink_create() 3410 * @sync: perform action synchronously 3411 * 3412 * If we have a PHY that is not part of a SFP module, then set the speed 3413 * as described in the phy_speed_down() function. Please see this function 3414 * for a description of the @sync parameter. 3415 * 3416 * Returns zero if there is no PHY, otherwise as per phy_speed_down(). 3417 */ 3418 int phylink_speed_down(struct phylink *pl, bool sync) 3419 { 3420 int ret = 0; 3421 3422 ASSERT_RTNL(); 3423 3424 if (!pl->sfp_bus && pl->phydev) 3425 ret = phy_speed_down(pl->phydev, sync); 3426 3427 return ret; 3428 } 3429 EXPORT_SYMBOL_GPL(phylink_speed_down); 3430 3431 /** 3432 * phylink_speed_up() - restore the advertised speeds prior to the call to 3433 * phylink_speed_down() 3434 * @pl: a pointer to a &struct phylink returned from phylink_create() 3435 * 3436 * If we have a PHY that is not part of a SFP module, then restore the 3437 * PHY speeds as per phy_speed_up(). 3438 * 3439 * Returns zero if there is no PHY, otherwise as per phy_speed_up(). 3440 */ 3441 int phylink_speed_up(struct phylink *pl) 3442 { 3443 int ret = 0; 3444 3445 ASSERT_RTNL(); 3446 3447 if (!pl->sfp_bus && pl->phydev) 3448 ret = phy_speed_up(pl->phydev); 3449 3450 return ret; 3451 } 3452 EXPORT_SYMBOL_GPL(phylink_speed_up); 3453 3454 static void phylink_sfp_attach(void *upstream, struct sfp_bus *bus) 3455 { 3456 struct phylink *pl = upstream; 3457 3458 pl->netdev->sfp_bus = bus; 3459 } 3460 3461 static void phylink_sfp_detach(void *upstream, struct sfp_bus *bus) 3462 { 3463 struct phylink *pl = upstream; 3464 3465 pl->netdev->sfp_bus = NULL; 3466 } 3467 3468 static phy_interface_t phylink_choose_sfp_interface(struct phylink *pl, 3469 const unsigned long *intf) 3470 { 3471 phy_interface_t interface; 3472 size_t i; 3473 3474 interface = PHY_INTERFACE_MODE_NA; 3475 for (i = 0; i < ARRAY_SIZE(phylink_sfp_interface_preference); i++) 3476 if (test_bit(phylink_sfp_interface_preference[i], intf)) { 3477 interface = phylink_sfp_interface_preference[i]; 3478 break; 3479 } 3480 3481 return interface; 3482 } 3483 3484 static void phylink_sfp_set_config(struct phylink *pl, unsigned long *supported, 3485 struct phylink_link_state *state, 3486 bool changed) 3487 { 3488 u8 mode = MLO_AN_INBAND; 3489 3490 phylink_dbg(pl, "requesting link mode %s/%s with support %*pb\n", 3491 phylink_an_mode_str(mode), phy_modes(state->interface), 3492 __ETHTOOL_LINK_MODE_MASK_NBITS, supported); 3493 3494 if (!linkmode_equal(pl->supported, supported)) { 3495 linkmode_copy(pl->supported, supported); 3496 changed = true; 3497 } 3498 3499 if (!linkmode_equal(pl->link_config.advertising, state->advertising)) { 3500 linkmode_copy(pl->link_config.advertising, state->advertising); 3501 changed = true; 3502 } 3503 3504 if (pl->req_link_an_mode != mode || 3505 pl->link_config.interface != state->interface) { 3506 pl->req_link_an_mode = mode; 3507 pl->link_config.interface = state->interface; 3508 3509 changed = true; 3510 3511 phylink_info(pl, "switched to %s/%s link mode\n", 3512 phylink_an_mode_str(mode), 3513 phy_modes(state->interface)); 3514 } 3515 3516 if (changed && !test_bit(PHYLINK_DISABLE_STOPPED, 3517 &pl->phylink_disable_state)) 3518 phylink_mac_initial_config(pl, false); 3519 } 3520 3521 static int phylink_sfp_config_phy(struct phylink *pl, struct phy_device *phy) 3522 { 3523 __ETHTOOL_DECLARE_LINK_MODE_MASK(support); 3524 struct phylink_link_state config; 3525 int ret; 3526 3527 linkmode_copy(support, phy->supported); 3528 3529 memset(&config, 0, sizeof(config)); 3530 linkmode_copy(config.advertising, phy->advertising); 3531 config.interface = PHY_INTERFACE_MODE_NA; 3532 config.speed = SPEED_UNKNOWN; 3533 config.duplex = DUPLEX_UNKNOWN; 3534 config.pause = MLO_PAUSE_AN; 3535 3536 /* Ignore errors if we're expecting a PHY to attach later */ 3537 ret = phylink_validate(pl, support, &config); 3538 if (ret) { 3539 phylink_err(pl, "validation with support %*pb failed: %pe\n", 3540 __ETHTOOL_LINK_MODE_MASK_NBITS, support, 3541 ERR_PTR(ret)); 3542 return ret; 3543 } 3544 3545 config.interface = phylink_sfp_select_interface(pl, config.advertising); 3546 if (config.interface == PHY_INTERFACE_MODE_NA) 3547 return -EINVAL; 3548 3549 /* Attach the PHY so that the PHY is present when we do the major 3550 * configuration step. 3551 */ 3552 ret = phylink_attach_phy(pl, phy, config.interface); 3553 if (ret < 0) 3554 return ret; 3555 3556 /* This will validate the configuration for us. */ 3557 ret = phylink_bringup_phy(pl, phy, config.interface); 3558 if (ret < 0) { 3559 phy_detach(phy); 3560 return ret; 3561 } 3562 3563 pl->link_port = pl->sfp_port; 3564 3565 phylink_sfp_set_config(pl, support, &config, true); 3566 3567 return 0; 3568 } 3569 3570 static int phylink_sfp_config_optical(struct phylink *pl) 3571 { 3572 __ETHTOOL_DECLARE_LINK_MODE_MASK(support); 3573 DECLARE_PHY_INTERFACE_MASK(interfaces); 3574 struct phylink_link_state config; 3575 phy_interface_t interface; 3576 int ret; 3577 3578 phylink_dbg(pl, "optical SFP: interfaces=[mac=%*pbl, sfp=%*pbl]\n", 3579 (int)PHY_INTERFACE_MODE_MAX, 3580 pl->config->supported_interfaces, 3581 (int)PHY_INTERFACE_MODE_MAX, 3582 pl->sfp_interfaces); 3583 3584 /* Find the union of the supported interfaces by the PCS/MAC and 3585 * the SFP module. 3586 */ 3587 phy_interface_and(interfaces, pl->config->supported_interfaces, 3588 pl->sfp_interfaces); 3589 if (phy_interface_empty(interfaces)) { 3590 phylink_err(pl, "unsupported SFP module: no common interface modes\n"); 3591 return -EINVAL; 3592 } 3593 3594 memset(&config, 0, sizeof(config)); 3595 linkmode_copy(support, pl->sfp_support); 3596 linkmode_copy(config.advertising, pl->sfp_support); 3597 config.speed = SPEED_UNKNOWN; 3598 config.duplex = DUPLEX_UNKNOWN; 3599 config.pause = MLO_PAUSE_AN; 3600 3601 /* For all the interfaces that are supported, reduce the sfp_support 3602 * mask to only those link modes that can be supported. 3603 */ 3604 ret = phylink_validate_mask(pl, NULL, pl->sfp_support, &config, 3605 interfaces); 3606 if (ret) { 3607 phylink_err(pl, "unsupported SFP module: validation with support %*pb failed\n", 3608 __ETHTOOL_LINK_MODE_MASK_NBITS, support); 3609 return ret; 3610 } 3611 3612 interface = phylink_choose_sfp_interface(pl, interfaces); 3613 if (interface == PHY_INTERFACE_MODE_NA) { 3614 phylink_err(pl, "failed to select SFP interface\n"); 3615 return -EINVAL; 3616 } 3617 3618 phylink_dbg(pl, "optical SFP: chosen %s interface\n", 3619 phy_modes(interface)); 3620 3621 if (!phylink_validate_pcs_inband_autoneg(pl, interface, 3622 config.advertising)) { 3623 phylink_err(pl, "autoneg setting not compatible with PCS"); 3624 return -EINVAL; 3625 } 3626 3627 config.interface = interface; 3628 3629 /* Ignore errors if we're expecting a PHY to attach later */ 3630 ret = phylink_validate(pl, support, &config); 3631 if (ret) { 3632 phylink_err(pl, "validation with support %*pb failed: %pe\n", 3633 __ETHTOOL_LINK_MODE_MASK_NBITS, support, 3634 ERR_PTR(ret)); 3635 return ret; 3636 } 3637 3638 pl->link_port = pl->sfp_port; 3639 3640 phylink_sfp_set_config(pl, pl->sfp_support, &config, false); 3641 3642 return 0; 3643 } 3644 3645 static int phylink_sfp_module_insert(void *upstream, 3646 const struct sfp_eeprom_id *id) 3647 { 3648 struct phylink *pl = upstream; 3649 3650 ASSERT_RTNL(); 3651 3652 linkmode_zero(pl->sfp_support); 3653 phy_interface_zero(pl->sfp_interfaces); 3654 sfp_parse_support(pl->sfp_bus, id, pl->sfp_support, pl->sfp_interfaces); 3655 pl->sfp_port = sfp_parse_port(pl->sfp_bus, id, pl->sfp_support); 3656 3657 /* If this module may have a PHY connecting later, defer until later */ 3658 pl->sfp_may_have_phy = sfp_may_have_phy(pl->sfp_bus, id); 3659 if (pl->sfp_may_have_phy) 3660 return 0; 3661 3662 return phylink_sfp_config_optical(pl); 3663 } 3664 3665 static int phylink_sfp_module_start(void *upstream) 3666 { 3667 struct phylink *pl = upstream; 3668 3669 /* If this SFP module has a PHY, start the PHY now. */ 3670 if (pl->phydev) { 3671 phy_start(pl->phydev); 3672 return 0; 3673 } 3674 3675 /* If the module may have a PHY but we didn't detect one we 3676 * need to configure the MAC here. 3677 */ 3678 if (!pl->sfp_may_have_phy) 3679 return 0; 3680 3681 return phylink_sfp_config_optical(pl); 3682 } 3683 3684 static void phylink_sfp_module_stop(void *upstream) 3685 { 3686 struct phylink *pl = upstream; 3687 3688 /* If this SFP module has a PHY, stop it. */ 3689 if (pl->phydev) 3690 phy_stop(pl->phydev); 3691 } 3692 3693 static void phylink_sfp_link_down(void *upstream) 3694 { 3695 struct phylink *pl = upstream; 3696 3697 ASSERT_RTNL(); 3698 3699 phylink_run_resolve_and_disable(pl, PHYLINK_DISABLE_LINK); 3700 } 3701 3702 static void phylink_sfp_link_up(void *upstream) 3703 { 3704 struct phylink *pl = upstream; 3705 3706 ASSERT_RTNL(); 3707 3708 phylink_enable_and_run_resolve(pl, PHYLINK_DISABLE_LINK); 3709 } 3710 3711 static int phylink_sfp_connect_phy(void *upstream, struct phy_device *phy) 3712 { 3713 struct phylink *pl = upstream; 3714 3715 if (!phy->drv) { 3716 phylink_err(pl, "PHY %s (id 0x%.8lx) has no driver loaded\n", 3717 phydev_name(phy), (unsigned long)phy->phy_id); 3718 phylink_err(pl, "Drivers which handle known common cases: CONFIG_BCM84881_PHY, CONFIG_MARVELL_PHY\n"); 3719 return -EINVAL; 3720 } 3721 3722 /* 3723 * This is the new way of dealing with flow control for PHYs, 3724 * as described by Timur Tabi in commit 529ed1275263 ("net: phy: 3725 * phy drivers should not set SUPPORTED_[Asym_]Pause") except 3726 * using our validate call to the MAC, we rely upon the MAC 3727 * clearing the bits from both supported and advertising fields. 3728 */ 3729 phy_support_asym_pause(phy); 3730 3731 /* Set the PHY's host supported interfaces */ 3732 phy_interface_and(phy->host_interfaces, phylink_sfp_interfaces, 3733 pl->config->supported_interfaces); 3734 3735 /* Do the initial configuration */ 3736 return phylink_sfp_config_phy(pl, phy); 3737 } 3738 3739 static void phylink_sfp_disconnect_phy(void *upstream, 3740 struct phy_device *phydev) 3741 { 3742 phylink_disconnect_phy(upstream); 3743 } 3744 3745 static const struct sfp_upstream_ops sfp_phylink_ops = { 3746 .attach = phylink_sfp_attach, 3747 .detach = phylink_sfp_detach, 3748 .module_insert = phylink_sfp_module_insert, 3749 .module_start = phylink_sfp_module_start, 3750 .module_stop = phylink_sfp_module_stop, 3751 .link_up = phylink_sfp_link_up, 3752 .link_down = phylink_sfp_link_down, 3753 .connect_phy = phylink_sfp_connect_phy, 3754 .disconnect_phy = phylink_sfp_disconnect_phy, 3755 }; 3756 3757 /* Helpers for MAC drivers */ 3758 3759 static struct { 3760 int bit; 3761 int speed; 3762 } phylink_c73_priority_resolution[] = { 3763 { ETHTOOL_LINK_MODE_100000baseCR4_Full_BIT, SPEED_100000 }, 3764 { ETHTOOL_LINK_MODE_100000baseKR4_Full_BIT, SPEED_100000 }, 3765 /* 100GBASE-KP4 and 100GBASE-CR10 not supported */ 3766 { ETHTOOL_LINK_MODE_40000baseCR4_Full_BIT, SPEED_40000 }, 3767 { ETHTOOL_LINK_MODE_40000baseKR4_Full_BIT, SPEED_40000 }, 3768 { ETHTOOL_LINK_MODE_10000baseKR_Full_BIT, SPEED_10000 }, 3769 { ETHTOOL_LINK_MODE_10000baseKX4_Full_BIT, SPEED_10000 }, 3770 /* 5GBASE-KR not supported */ 3771 { ETHTOOL_LINK_MODE_2500baseX_Full_BIT, SPEED_2500 }, 3772 { ETHTOOL_LINK_MODE_1000baseKX_Full_BIT, SPEED_1000 }, 3773 }; 3774 3775 void phylink_resolve_c73(struct phylink_link_state *state) 3776 { 3777 int i; 3778 3779 for (i = 0; i < ARRAY_SIZE(phylink_c73_priority_resolution); i++) { 3780 int bit = phylink_c73_priority_resolution[i].bit; 3781 if (linkmode_test_bit(bit, state->advertising) && 3782 linkmode_test_bit(bit, state->lp_advertising)) 3783 break; 3784 } 3785 3786 if (i < ARRAY_SIZE(phylink_c73_priority_resolution)) { 3787 state->speed = phylink_c73_priority_resolution[i].speed; 3788 state->duplex = DUPLEX_FULL; 3789 } else { 3790 /* negotiation failure */ 3791 state->link = false; 3792 } 3793 3794 phylink_resolve_an_pause(state); 3795 } 3796 EXPORT_SYMBOL_GPL(phylink_resolve_c73); 3797 3798 static void phylink_decode_c37_word(struct phylink_link_state *state, 3799 uint16_t config_reg, int speed) 3800 { 3801 int fd_bit; 3802 3803 if (speed == SPEED_2500) 3804 fd_bit = ETHTOOL_LINK_MODE_2500baseX_Full_BIT; 3805 else 3806 fd_bit = ETHTOOL_LINK_MODE_1000baseX_Full_BIT; 3807 3808 mii_lpa_mod_linkmode_x(state->lp_advertising, config_reg, fd_bit); 3809 3810 if (linkmode_test_bit(fd_bit, state->advertising) && 3811 linkmode_test_bit(fd_bit, state->lp_advertising)) { 3812 state->speed = speed; 3813 state->duplex = DUPLEX_FULL; 3814 } else { 3815 /* negotiation failure */ 3816 state->link = false; 3817 } 3818 3819 phylink_resolve_an_pause(state); 3820 } 3821 3822 static void phylink_decode_sgmii_word(struct phylink_link_state *state, 3823 uint16_t config_reg) 3824 { 3825 if (!(config_reg & LPA_SGMII_LINK)) { 3826 state->link = false; 3827 return; 3828 } 3829 3830 switch (config_reg & LPA_SGMII_SPD_MASK) { 3831 case LPA_SGMII_10: 3832 state->speed = SPEED_10; 3833 break; 3834 case LPA_SGMII_100: 3835 state->speed = SPEED_100; 3836 break; 3837 case LPA_SGMII_1000: 3838 state->speed = SPEED_1000; 3839 break; 3840 default: 3841 state->link = false; 3842 return; 3843 } 3844 if (config_reg & LPA_SGMII_FULL_DUPLEX) 3845 state->duplex = DUPLEX_FULL; 3846 else 3847 state->duplex = DUPLEX_HALF; 3848 } 3849 3850 /** 3851 * phylink_decode_usxgmii_word() - decode the USXGMII word from a MAC PCS 3852 * @state: a pointer to a struct phylink_link_state. 3853 * @lpa: a 16 bit value which stores the USXGMII auto-negotiation word 3854 * 3855 * Helper for MAC PCS supporting the USXGMII protocol and the auto-negotiation 3856 * code word. Decode the USXGMII code word and populate the corresponding fields 3857 * (speed, duplex) into the phylink_link_state structure. 3858 */ 3859 void phylink_decode_usxgmii_word(struct phylink_link_state *state, 3860 uint16_t lpa) 3861 { 3862 switch (lpa & MDIO_USXGMII_SPD_MASK) { 3863 case MDIO_USXGMII_10: 3864 state->speed = SPEED_10; 3865 break; 3866 case MDIO_USXGMII_100: 3867 state->speed = SPEED_100; 3868 break; 3869 case MDIO_USXGMII_1000: 3870 state->speed = SPEED_1000; 3871 break; 3872 case MDIO_USXGMII_2500: 3873 state->speed = SPEED_2500; 3874 break; 3875 case MDIO_USXGMII_5000: 3876 state->speed = SPEED_5000; 3877 break; 3878 case MDIO_USXGMII_10G: 3879 state->speed = SPEED_10000; 3880 break; 3881 default: 3882 state->link = false; 3883 return; 3884 } 3885 3886 if (lpa & MDIO_USXGMII_FULL_DUPLEX) 3887 state->duplex = DUPLEX_FULL; 3888 else 3889 state->duplex = DUPLEX_HALF; 3890 } 3891 EXPORT_SYMBOL_GPL(phylink_decode_usxgmii_word); 3892 3893 /** 3894 * phylink_decode_usgmii_word() - decode the USGMII word from a MAC PCS 3895 * @state: a pointer to a struct phylink_link_state. 3896 * @lpa: a 16 bit value which stores the USGMII auto-negotiation word 3897 * 3898 * Helper for MAC PCS supporting the USGMII protocol and the auto-negotiation 3899 * code word. Decode the USGMII code word and populate the corresponding fields 3900 * (speed, duplex) into the phylink_link_state structure. The structure for this 3901 * word is the same as the USXGMII word, except it only supports speeds up to 3902 * 1Gbps. 3903 */ 3904 static void phylink_decode_usgmii_word(struct phylink_link_state *state, 3905 uint16_t lpa) 3906 { 3907 switch (lpa & MDIO_USXGMII_SPD_MASK) { 3908 case MDIO_USXGMII_10: 3909 state->speed = SPEED_10; 3910 break; 3911 case MDIO_USXGMII_100: 3912 state->speed = SPEED_100; 3913 break; 3914 case MDIO_USXGMII_1000: 3915 state->speed = SPEED_1000; 3916 break; 3917 default: 3918 state->link = false; 3919 return; 3920 } 3921 3922 if (lpa & MDIO_USXGMII_FULL_DUPLEX) 3923 state->duplex = DUPLEX_FULL; 3924 else 3925 state->duplex = DUPLEX_HALF; 3926 } 3927 3928 /** 3929 * phylink_mii_c22_pcs_decode_state() - Decode MAC PCS state from MII registers 3930 * @state: a pointer to a &struct phylink_link_state. 3931 * @neg_mode: link negotiation mode (PHYLINK_PCS_NEG_xxx) 3932 * @bmsr: The value of the %MII_BMSR register 3933 * @lpa: The value of the %MII_LPA register 3934 * 3935 * Helper for MAC PCS supporting the 802.3 clause 22 register set for 3936 * clause 37 negotiation and/or SGMII control. 3937 * 3938 * Parse the Clause 37 or Cisco SGMII link partner negotiation word into 3939 * the phylink @state structure. This is suitable to be used for implementing 3940 * the pcs_get_state() member of the struct phylink_pcs_ops structure if 3941 * accessing @bmsr and @lpa cannot be done with MDIO directly. 3942 */ 3943 void phylink_mii_c22_pcs_decode_state(struct phylink_link_state *state, 3944 unsigned int neg_mode, u16 bmsr, u16 lpa) 3945 { 3946 state->link = !!(bmsr & BMSR_LSTATUS); 3947 state->an_complete = !!(bmsr & BMSR_ANEGCOMPLETE); 3948 3949 /* If the link is down, the advertisement data is undefined. */ 3950 if (!state->link) 3951 return; 3952 3953 switch (state->interface) { 3954 case PHY_INTERFACE_MODE_1000BASEX: 3955 if (neg_mode == PHYLINK_PCS_NEG_INBAND_ENABLED) { 3956 phylink_decode_c37_word(state, lpa, SPEED_1000); 3957 } else { 3958 state->speed = SPEED_1000; 3959 state->duplex = DUPLEX_FULL; 3960 state->pause |= MLO_PAUSE_TX | MLO_PAUSE_RX; 3961 } 3962 break; 3963 3964 case PHY_INTERFACE_MODE_2500BASEX: 3965 if (neg_mode == PHYLINK_PCS_NEG_INBAND_ENABLED) { 3966 phylink_decode_c37_word(state, lpa, SPEED_2500); 3967 } else { 3968 state->speed = SPEED_2500; 3969 state->duplex = DUPLEX_FULL; 3970 state->pause |= MLO_PAUSE_TX | MLO_PAUSE_RX; 3971 } 3972 break; 3973 3974 case PHY_INTERFACE_MODE_SGMII: 3975 case PHY_INTERFACE_MODE_QSGMII: 3976 if (neg_mode == PHYLINK_PCS_NEG_INBAND_ENABLED) 3977 phylink_decode_sgmii_word(state, lpa); 3978 break; 3979 3980 case PHY_INTERFACE_MODE_QUSGMII: 3981 if (neg_mode == PHYLINK_PCS_NEG_INBAND_ENABLED) 3982 phylink_decode_usgmii_word(state, lpa); 3983 break; 3984 3985 default: 3986 state->link = false; 3987 break; 3988 } 3989 } 3990 EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_decode_state); 3991 3992 /** 3993 * phylink_mii_c22_pcs_get_state() - read the MAC PCS state 3994 * @pcs: a pointer to a &struct mdio_device. 3995 * @neg_mode: link negotiation mode (PHYLINK_PCS_NEG_xxx) 3996 * @state: a pointer to a &struct phylink_link_state. 3997 * 3998 * Helper for MAC PCS supporting the 802.3 clause 22 register set for 3999 * clause 37 negotiation and/or SGMII control. 4000 * 4001 * Read the MAC PCS state from the MII device configured in @config and 4002 * parse the Clause 37 or Cisco SGMII link partner negotiation word into 4003 * the phylink @state structure. This is suitable to be directly plugged 4004 * into the pcs_get_state() member of the struct phylink_pcs_ops 4005 * structure. 4006 */ 4007 void phylink_mii_c22_pcs_get_state(struct mdio_device *pcs, 4008 unsigned int neg_mode, 4009 struct phylink_link_state *state) 4010 { 4011 int bmsr, lpa; 4012 4013 bmsr = mdiodev_read(pcs, MII_BMSR); 4014 lpa = mdiodev_read(pcs, MII_LPA); 4015 if (bmsr < 0 || lpa < 0) { 4016 state->link = false; 4017 return; 4018 } 4019 4020 phylink_mii_c22_pcs_decode_state(state, neg_mode, bmsr, lpa); 4021 } 4022 EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_get_state); 4023 4024 /** 4025 * phylink_mii_c22_pcs_encode_advertisement() - configure the clause 37 PCS 4026 * advertisement 4027 * @interface: the PHY interface mode being configured 4028 * @advertising: the ethtool advertisement mask 4029 * 4030 * Helper for MAC PCS supporting the 802.3 clause 22 register set for 4031 * clause 37 negotiation and/or SGMII control. 4032 * 4033 * Encode the clause 37 PCS advertisement as specified by @interface and 4034 * @advertising. 4035 * 4036 * Return: The new value for @adv, or ``-EINVAL`` if it should not be changed. 4037 */ 4038 int phylink_mii_c22_pcs_encode_advertisement(phy_interface_t interface, 4039 const unsigned long *advertising) 4040 { 4041 u16 adv; 4042 4043 switch (interface) { 4044 case PHY_INTERFACE_MODE_1000BASEX: 4045 case PHY_INTERFACE_MODE_2500BASEX: 4046 adv = ADVERTISE_1000XFULL; 4047 if (linkmode_test_bit(ETHTOOL_LINK_MODE_Pause_BIT, 4048 advertising)) 4049 adv |= ADVERTISE_1000XPAUSE; 4050 if (linkmode_test_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, 4051 advertising)) 4052 adv |= ADVERTISE_1000XPSE_ASYM; 4053 return adv; 4054 case PHY_INTERFACE_MODE_SGMII: 4055 case PHY_INTERFACE_MODE_QSGMII: 4056 return 0x0001; 4057 default: 4058 /* Nothing to do for other modes */ 4059 return -EINVAL; 4060 } 4061 } 4062 EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_encode_advertisement); 4063 4064 /** 4065 * phylink_mii_c22_pcs_config() - configure clause 22 PCS 4066 * @pcs: a pointer to a &struct mdio_device. 4067 * @interface: the PHY interface mode being configured 4068 * @advertising: the ethtool advertisement mask 4069 * @neg_mode: PCS negotiation mode 4070 * 4071 * Configure a Clause 22 PCS PHY with the appropriate negotiation 4072 * parameters for the @mode, @interface and @advertising parameters. 4073 * Returns negative error number on failure, zero if the advertisement 4074 * has not changed, or positive if there is a change. 4075 */ 4076 int phylink_mii_c22_pcs_config(struct mdio_device *pcs, 4077 phy_interface_t interface, 4078 const unsigned long *advertising, 4079 unsigned int neg_mode) 4080 { 4081 bool changed = 0; 4082 u16 bmcr; 4083 int ret, adv; 4084 4085 adv = phylink_mii_c22_pcs_encode_advertisement(interface, advertising); 4086 if (adv >= 0) { 4087 ret = mdiobus_modify_changed(pcs->bus, pcs->addr, 4088 MII_ADVERTISE, 0xffff, adv); 4089 if (ret < 0) 4090 return ret; 4091 changed = ret; 4092 } 4093 4094 if (neg_mode == PHYLINK_PCS_NEG_INBAND_ENABLED) 4095 bmcr = BMCR_ANENABLE; 4096 else 4097 bmcr = 0; 4098 4099 /* Configure the inband state. Ensure ISOLATE bit is disabled */ 4100 ret = mdiodev_modify(pcs, MII_BMCR, BMCR_ANENABLE | BMCR_ISOLATE, bmcr); 4101 if (ret < 0) 4102 return ret; 4103 4104 return changed; 4105 } 4106 EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_config); 4107 4108 /** 4109 * phylink_mii_c22_pcs_an_restart() - restart 802.3z autonegotiation 4110 * @pcs: a pointer to a &struct mdio_device. 4111 * 4112 * Helper for MAC PCS supporting the 802.3 clause 22 register set for 4113 * clause 37 negotiation. 4114 * 4115 * Restart the clause 37 negotiation with the link partner. This is 4116 * suitable to be directly plugged into the pcs_get_state() member 4117 * of the struct phylink_pcs_ops structure. 4118 */ 4119 void phylink_mii_c22_pcs_an_restart(struct mdio_device *pcs) 4120 { 4121 int val = mdiodev_read(pcs, MII_BMCR); 4122 4123 if (val >= 0) { 4124 val |= BMCR_ANRESTART; 4125 4126 mdiodev_write(pcs, MII_BMCR, val); 4127 } 4128 } 4129 EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_an_restart); 4130 4131 void phylink_mii_c45_pcs_get_state(struct mdio_device *pcs, 4132 struct phylink_link_state *state) 4133 { 4134 struct mii_bus *bus = pcs->bus; 4135 int addr = pcs->addr; 4136 int stat; 4137 4138 stat = mdiobus_c45_read(bus, addr, MDIO_MMD_PCS, MDIO_STAT1); 4139 if (stat < 0) { 4140 state->link = false; 4141 return; 4142 } 4143 4144 state->link = !!(stat & MDIO_STAT1_LSTATUS); 4145 if (!state->link) 4146 return; 4147 4148 switch (state->interface) { 4149 case PHY_INTERFACE_MODE_10GBASER: 4150 state->speed = SPEED_10000; 4151 state->duplex = DUPLEX_FULL; 4152 break; 4153 4154 default: 4155 break; 4156 } 4157 } 4158 EXPORT_SYMBOL_GPL(phylink_mii_c45_pcs_get_state); 4159 4160 static int __init phylink_init(void) 4161 { 4162 for (int i = 0; i < ARRAY_SIZE(phylink_sfp_interface_preference); ++i) 4163 __set_bit(phylink_sfp_interface_preference[i], 4164 phylink_sfp_interfaces); 4165 4166 return 0; 4167 } 4168 4169 module_init(phylink_init); 4170 4171 MODULE_LICENSE("GPL v2"); 4172 MODULE_DESCRIPTION("phylink models the MAC to optional PHY connection"); 4173