1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * phylink models the MAC to optional PHY connection, supporting 4 * technologies such as SFP cages where the PHY is hot-pluggable. 5 * 6 * Copyright (C) 2015 Russell King 7 */ 8 #include <linux/acpi.h> 9 #include <linux/ethtool.h> 10 #include <linux/export.h> 11 #include <linux/gpio/consumer.h> 12 #include <linux/netdevice.h> 13 #include <linux/of.h> 14 #include <linux/of_mdio.h> 15 #include <linux/phy.h> 16 #include <linux/phy_fixed.h> 17 #include <linux/phylink.h> 18 #include <linux/rtnetlink.h> 19 #include <linux/spinlock.h> 20 #include <linux/timer.h> 21 #include <linux/workqueue.h> 22 23 #include "phy-caps.h" 24 #include "sfp.h" 25 #include "swphy.h" 26 27 enum { 28 PHYLINK_DISABLE_STOPPED, 29 PHYLINK_DISABLE_LINK, 30 PHYLINK_DISABLE_MAC_WOL, 31 32 PCS_STATE_DOWN = 0, 33 PCS_STATE_STARTING, 34 PCS_STATE_STARTED, 35 }; 36 37 /** 38 * struct phylink - internal data type for phylink 39 */ 40 struct phylink { 41 /* private: */ 42 struct net_device *netdev; 43 const struct phylink_mac_ops *mac_ops; 44 struct phylink_config *config; 45 struct phylink_pcs *pcs; 46 struct device *dev; 47 unsigned int old_link_state:1; 48 49 unsigned long phylink_disable_state; /* bitmask of disables */ 50 struct phy_device *phydev; 51 phy_interface_t link_interface; /* PHY_INTERFACE_xxx */ 52 u8 cfg_link_an_mode; /* MLO_AN_xxx */ 53 u8 req_link_an_mode; /* Requested MLO_AN_xxx mode */ 54 u8 act_link_an_mode; /* Active MLO_AN_xxx mode */ 55 u8 link_port; /* The current non-phy ethtool port */ 56 __ETHTOOL_DECLARE_LINK_MODE_MASK(supported); 57 __ETHTOOL_DECLARE_LINK_MODE_MASK(supported_lpi); 58 59 /* The link configuration settings */ 60 struct phylink_link_state link_config; 61 62 /* The current settings */ 63 phy_interface_t cur_interface; 64 65 struct gpio_desc *link_gpio; 66 unsigned int link_irq; 67 struct timer_list link_poll; 68 69 struct mutex state_mutex; 70 struct phylink_link_state phy_state; 71 unsigned int phy_ib_mode; 72 struct work_struct resolve; 73 unsigned int pcs_neg_mode; 74 unsigned int pcs_state; 75 76 bool link_failed; 77 bool suspend_link_up; 78 bool major_config_failed; 79 bool mac_supports_eee_ops; 80 bool mac_supports_eee; 81 bool phy_enable_tx_lpi; 82 bool mac_enable_tx_lpi; 83 bool mac_tx_clk_stop; 84 u32 mac_tx_lpi_timer; 85 u8 mac_rx_clk_stop_blocked; 86 87 struct sfp_bus *sfp_bus; 88 bool sfp_may_have_phy; 89 DECLARE_PHY_INTERFACE_MASK(sfp_interfaces); 90 __ETHTOOL_DECLARE_LINK_MODE_MASK(sfp_support); 91 u8 sfp_port; 92 93 struct eee_config eee_cfg; 94 }; 95 96 #define phylink_printk(level, pl, fmt, ...) \ 97 do { \ 98 if ((pl)->config->type == PHYLINK_NETDEV) \ 99 netdev_printk(level, (pl)->netdev, fmt, ##__VA_ARGS__); \ 100 else if ((pl)->config->type == PHYLINK_DEV) \ 101 dev_printk(level, (pl)->dev, fmt, ##__VA_ARGS__); \ 102 } while (0) 103 104 #define phylink_err(pl, fmt, ...) \ 105 phylink_printk(KERN_ERR, pl, fmt, ##__VA_ARGS__) 106 #define phylink_warn(pl, fmt, ...) \ 107 phylink_printk(KERN_WARNING, pl, fmt, ##__VA_ARGS__) 108 #define phylink_info(pl, fmt, ...) \ 109 phylink_printk(KERN_INFO, pl, fmt, ##__VA_ARGS__) 110 #if defined(CONFIG_DYNAMIC_DEBUG) 111 #define phylink_dbg(pl, fmt, ...) \ 112 do { \ 113 if ((pl)->config->type == PHYLINK_NETDEV) \ 114 netdev_dbg((pl)->netdev, fmt, ##__VA_ARGS__); \ 115 else if ((pl)->config->type == PHYLINK_DEV) \ 116 dev_dbg((pl)->dev, fmt, ##__VA_ARGS__); \ 117 } while (0) 118 #elif defined(DEBUG) 119 #define phylink_dbg(pl, fmt, ...) \ 120 phylink_printk(KERN_DEBUG, pl, fmt, ##__VA_ARGS__) 121 #else 122 #define phylink_dbg(pl, fmt, ...) \ 123 ({ \ 124 if (0) \ 125 phylink_printk(KERN_DEBUG, pl, fmt, ##__VA_ARGS__); \ 126 }) 127 #endif 128 129 static const phy_interface_t phylink_sfp_interface_preference[] = { 130 PHY_INTERFACE_MODE_100GBASEP, 131 PHY_INTERFACE_MODE_50GBASER, 132 PHY_INTERFACE_MODE_LAUI, 133 PHY_INTERFACE_MODE_25GBASER, 134 PHY_INTERFACE_MODE_USXGMII, 135 PHY_INTERFACE_MODE_10GBASER, 136 PHY_INTERFACE_MODE_5GBASER, 137 PHY_INTERFACE_MODE_2500BASEX, 138 PHY_INTERFACE_MODE_SGMII, 139 PHY_INTERFACE_MODE_1000BASEX, 140 PHY_INTERFACE_MODE_100BASEX, 141 }; 142 143 static DECLARE_PHY_INTERFACE_MASK(phylink_sfp_interfaces); 144 145 /** 146 * phylink_set_port_modes() - set the port type modes in the ethtool mask 147 * @mask: ethtool link mode mask 148 * 149 * Sets all the port type modes in the ethtool mask. MAC drivers should 150 * use this in their 'validate' callback. 151 */ 152 void phylink_set_port_modes(unsigned long *mask) 153 { 154 phylink_set(mask, TP); 155 phylink_set(mask, AUI); 156 phylink_set(mask, MII); 157 phylink_set(mask, FIBRE); 158 phylink_set(mask, BNC); 159 phylink_set(mask, Backplane); 160 } 161 EXPORT_SYMBOL_GPL(phylink_set_port_modes); 162 163 static int phylink_is_empty_linkmode(const unsigned long *linkmode) 164 { 165 __ETHTOOL_DECLARE_LINK_MODE_MASK(tmp) = { 0, }; 166 167 phylink_set_port_modes(tmp); 168 phylink_set(tmp, Autoneg); 169 phylink_set(tmp, Pause); 170 phylink_set(tmp, Asym_Pause); 171 172 return linkmode_subset(linkmode, tmp); 173 } 174 175 static const char *phylink_an_mode_str(unsigned int mode) 176 { 177 static const char *modestr[] = { 178 [MLO_AN_PHY] = "phy", 179 [MLO_AN_FIXED] = "fixed", 180 [MLO_AN_INBAND] = "inband", 181 }; 182 183 return mode < ARRAY_SIZE(modestr) ? modestr[mode] : "unknown"; 184 } 185 186 static const char *phylink_pcs_mode_str(unsigned int mode) 187 { 188 if (!mode) 189 return "none"; 190 191 if (mode & PHYLINK_PCS_NEG_OUTBAND) 192 return "outband"; 193 194 if (mode & PHYLINK_PCS_NEG_INBAND) { 195 if (mode & PHYLINK_PCS_NEG_ENABLED) 196 return "inband,an-enabled"; 197 else 198 return "inband,an-disabled"; 199 } 200 201 return "unknown"; 202 } 203 204 static unsigned int phylink_interface_signal_rate(phy_interface_t interface) 205 { 206 switch (interface) { 207 case PHY_INTERFACE_MODE_SGMII: 208 case PHY_INTERFACE_MODE_1000BASEX: /* 1.25Mbd */ 209 return 1250; 210 case PHY_INTERFACE_MODE_2500BASEX: /* 3.125Mbd */ 211 return 3125; 212 case PHY_INTERFACE_MODE_5GBASER: /* 5.15625Mbd */ 213 return 5156; 214 case PHY_INTERFACE_MODE_10GBASER: /* 10.3125Mbd */ 215 return 10313; 216 default: 217 return 0; 218 } 219 } 220 221 /** 222 * phylink_interface_max_speed() - get the maximum speed of a phy interface 223 * @interface: phy interface mode defined by &typedef phy_interface_t 224 * 225 * Determine the maximum speed of a phy interface. This is intended to help 226 * determine the correct speed to pass to the MAC when the phy is performing 227 * rate matching. 228 * 229 * Return: The maximum speed of @interface 230 */ 231 static int phylink_interface_max_speed(phy_interface_t interface) 232 { 233 switch (interface) { 234 case PHY_INTERFACE_MODE_100BASEX: 235 case PHY_INTERFACE_MODE_REVRMII: 236 case PHY_INTERFACE_MODE_RMII: 237 case PHY_INTERFACE_MODE_SMII: 238 case PHY_INTERFACE_MODE_REVMII: 239 case PHY_INTERFACE_MODE_MII: 240 case PHY_INTERFACE_MODE_MIILITE: 241 return SPEED_100; 242 243 case PHY_INTERFACE_MODE_TBI: 244 case PHY_INTERFACE_MODE_MOCA: 245 case PHY_INTERFACE_MODE_RTBI: 246 case PHY_INTERFACE_MODE_1000BASEX: 247 case PHY_INTERFACE_MODE_1000BASEKX: 248 case PHY_INTERFACE_MODE_TRGMII: 249 case PHY_INTERFACE_MODE_RGMII_TXID: 250 case PHY_INTERFACE_MODE_RGMII_RXID: 251 case PHY_INTERFACE_MODE_RGMII_ID: 252 case PHY_INTERFACE_MODE_RGMII: 253 case PHY_INTERFACE_MODE_PSGMII: 254 case PHY_INTERFACE_MODE_QSGMII: 255 case PHY_INTERFACE_MODE_QUSGMII: 256 case PHY_INTERFACE_MODE_SGMII: 257 case PHY_INTERFACE_MODE_GMII: 258 return SPEED_1000; 259 260 case PHY_INTERFACE_MODE_2500BASEX: 261 case PHY_INTERFACE_MODE_10G_QXGMII: 262 return SPEED_2500; 263 264 case PHY_INTERFACE_MODE_5GBASER: 265 return SPEED_5000; 266 267 case PHY_INTERFACE_MODE_XGMII: 268 case PHY_INTERFACE_MODE_RXAUI: 269 case PHY_INTERFACE_MODE_XAUI: 270 case PHY_INTERFACE_MODE_10GBASER: 271 case PHY_INTERFACE_MODE_10GKR: 272 case PHY_INTERFACE_MODE_USXGMII: 273 return SPEED_10000; 274 275 case PHY_INTERFACE_MODE_25GBASER: 276 return SPEED_25000; 277 278 case PHY_INTERFACE_MODE_XLGMII: 279 return SPEED_40000; 280 281 case PHY_INTERFACE_MODE_50GBASER: 282 case PHY_INTERFACE_MODE_LAUI: 283 return SPEED_50000; 284 285 case PHY_INTERFACE_MODE_100GBASEP: 286 return SPEED_100000; 287 288 case PHY_INTERFACE_MODE_INTERNAL: 289 case PHY_INTERFACE_MODE_NA: 290 case PHY_INTERFACE_MODE_MAX: 291 /* No idea! Garbage in, unknown out */ 292 return SPEED_UNKNOWN; 293 } 294 295 /* If we get here, someone forgot to add an interface mode above */ 296 WARN_ON_ONCE(1); 297 return SPEED_UNKNOWN; 298 } 299 300 static struct { 301 unsigned long mask; 302 int speed; 303 unsigned int duplex; 304 unsigned int caps_bit; 305 } phylink_caps_params[] = { 306 { MAC_400000FD, SPEED_400000, DUPLEX_FULL, BIT(LINK_CAPA_400000FD) }, 307 { MAC_200000FD, SPEED_200000, DUPLEX_FULL, BIT(LINK_CAPA_200000FD) }, 308 { MAC_100000FD, SPEED_100000, DUPLEX_FULL, BIT(LINK_CAPA_100000FD) }, 309 { MAC_56000FD, SPEED_56000, DUPLEX_FULL, BIT(LINK_CAPA_56000FD) }, 310 { MAC_50000FD, SPEED_50000, DUPLEX_FULL, BIT(LINK_CAPA_50000FD) }, 311 { MAC_40000FD, SPEED_40000, DUPLEX_FULL, BIT(LINK_CAPA_40000FD) }, 312 { MAC_25000FD, SPEED_25000, DUPLEX_FULL, BIT(LINK_CAPA_25000FD) }, 313 { MAC_20000FD, SPEED_20000, DUPLEX_FULL, BIT(LINK_CAPA_20000FD) }, 314 { MAC_10000FD, SPEED_10000, DUPLEX_FULL, BIT(LINK_CAPA_10000FD) }, 315 { MAC_5000FD, SPEED_5000, DUPLEX_FULL, BIT(LINK_CAPA_5000FD) }, 316 { MAC_2500FD, SPEED_2500, DUPLEX_FULL, BIT(LINK_CAPA_2500FD) }, 317 { MAC_1000FD, SPEED_1000, DUPLEX_FULL, BIT(LINK_CAPA_1000FD) }, 318 { MAC_1000HD, SPEED_1000, DUPLEX_HALF, BIT(LINK_CAPA_1000HD) }, 319 { MAC_100FD, SPEED_100, DUPLEX_FULL, BIT(LINK_CAPA_100FD) }, 320 { MAC_100HD, SPEED_100, DUPLEX_HALF, BIT(LINK_CAPA_100HD) }, 321 { MAC_10FD, SPEED_10, DUPLEX_FULL, BIT(LINK_CAPA_10FD) }, 322 { MAC_10HD, SPEED_10, DUPLEX_HALF, BIT(LINK_CAPA_10HD) }, 323 }; 324 325 /** 326 * phylink_caps_to_link_caps() - Convert a set of MAC capabilities LINK caps 327 * @caps: A set of MAC capabilities 328 * 329 * Returns: The corresponding set of LINK_CAPA as defined in phy-caps.h 330 */ 331 static unsigned long phylink_caps_to_link_caps(unsigned long caps) 332 { 333 unsigned long link_caps = 0; 334 int i; 335 336 for (i = 0; i < ARRAY_SIZE(phylink_caps_params); i++) 337 if (caps & phylink_caps_params[i].mask) 338 link_caps |= phylink_caps_params[i].caps_bit; 339 340 return link_caps; 341 } 342 343 static unsigned long phylink_link_caps_to_mac_caps(unsigned long link_caps) 344 { 345 unsigned long caps = 0; 346 int i; 347 348 for (i = 0; i < ARRAY_SIZE(phylink_caps_params); i++) 349 if (link_caps & phylink_caps_params[i].caps_bit) 350 caps |= phylink_caps_params[i].mask; 351 352 return caps; 353 } 354 355 /** 356 * phylink_caps_to_linkmodes() - Convert capabilities to ethtool link modes 357 * @linkmodes: ethtool linkmode mask (must be already initialised) 358 * @caps: bitmask of MAC capabilities 359 * 360 * Set all possible pause, speed and duplex linkmodes in @linkmodes that are 361 * supported by the @caps. @linkmodes must have been initialised previously. 362 */ 363 static void phylink_caps_to_linkmodes(unsigned long *linkmodes, 364 unsigned long caps) 365 { 366 unsigned long link_caps = phylink_caps_to_link_caps(caps); 367 368 if (caps & MAC_SYM_PAUSE) 369 __set_bit(ETHTOOL_LINK_MODE_Pause_BIT, linkmodes); 370 371 if (caps & MAC_ASYM_PAUSE) 372 __set_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, linkmodes); 373 374 phy_caps_linkmodes(link_caps, linkmodes); 375 } 376 377 /** 378 * phylink_limit_mac_speed - limit the phylink_config to a maximum speed 379 * @config: pointer to a &struct phylink_config 380 * @max_speed: maximum speed 381 * 382 * Mask off MAC capabilities for speeds higher than the @max_speed parameter. 383 * Any further motifications of config.mac_capabilities will override this. 384 */ 385 void phylink_limit_mac_speed(struct phylink_config *config, u32 max_speed) 386 { 387 int i; 388 389 for (i = 0; i < ARRAY_SIZE(phylink_caps_params) && 390 phylink_caps_params[i].speed > max_speed; i++) 391 config->mac_capabilities &= ~phylink_caps_params[i].mask; 392 } 393 EXPORT_SYMBOL_GPL(phylink_limit_mac_speed); 394 395 /** 396 * phylink_cap_from_speed_duplex - Get mac capability from speed/duplex 397 * @speed: the speed to search for 398 * @duplex: the duplex to search for 399 * 400 * Find the mac capability for a given speed and duplex. 401 * 402 * Return: A mask with the mac capability patching @speed and @duplex, or 0 if 403 * there were no matches. 404 */ 405 static unsigned long phylink_cap_from_speed_duplex(int speed, 406 unsigned int duplex) 407 { 408 int i; 409 410 for (i = 0; i < ARRAY_SIZE(phylink_caps_params); i++) { 411 if (speed == phylink_caps_params[i].speed && 412 duplex == phylink_caps_params[i].duplex) 413 return phylink_caps_params[i].mask; 414 } 415 416 return 0; 417 } 418 419 /** 420 * phylink_get_capabilities() - get capabilities for a given MAC 421 * @interface: phy interface mode defined by &typedef phy_interface_t 422 * @mac_capabilities: bitmask of MAC capabilities 423 * @rate_matching: type of rate matching being performed 424 * 425 * Get the MAC capabilities that are supported by the @interface mode and 426 * @mac_capabilities. 427 */ 428 static unsigned long phylink_get_capabilities(phy_interface_t interface, 429 unsigned long mac_capabilities, 430 int rate_matching) 431 { 432 unsigned long link_caps = phy_caps_from_interface(interface); 433 int max_speed = phylink_interface_max_speed(interface); 434 unsigned long caps = MAC_SYM_PAUSE | MAC_ASYM_PAUSE; 435 unsigned long matched_caps = 0; 436 437 caps |= phylink_link_caps_to_mac_caps(link_caps); 438 439 switch (rate_matching) { 440 case RATE_MATCH_OPEN_LOOP: 441 /* TODO */ 442 fallthrough; 443 case RATE_MATCH_NONE: 444 matched_caps = 0; 445 break; 446 case RATE_MATCH_PAUSE: { 447 /* The MAC must support asymmetric pause towards the local 448 * device for this. We could allow just symmetric pause, but 449 * then we might have to renegotiate if the link partner 450 * doesn't support pause. This is because there's no way to 451 * accept pause frames without transmitting them if we only 452 * support symmetric pause. 453 */ 454 if (!(mac_capabilities & MAC_SYM_PAUSE) || 455 !(mac_capabilities & MAC_ASYM_PAUSE)) 456 break; 457 458 /* We can't adapt if the MAC doesn't support the interface's 459 * max speed at full duplex. 460 */ 461 if (mac_capabilities & 462 phylink_cap_from_speed_duplex(max_speed, DUPLEX_FULL)) 463 matched_caps = GENMASK(__fls(caps), __fls(MAC_10HD)); 464 break; 465 } 466 case RATE_MATCH_CRS: 467 /* The MAC must support half duplex at the interface's max 468 * speed. 469 */ 470 if (mac_capabilities & 471 phylink_cap_from_speed_duplex(max_speed, DUPLEX_HALF)) { 472 matched_caps = GENMASK(__fls(caps), __fls(MAC_10HD)); 473 matched_caps &= mac_capabilities; 474 } 475 break; 476 } 477 478 return (caps & mac_capabilities) | matched_caps; 479 } 480 481 /** 482 * phylink_validate_mask_caps() - Restrict link modes based on caps 483 * @supported: ethtool bitmask for supported link modes. 484 * @state: pointer to a &struct phylink_link_state. 485 * @mac_capabilities: bitmask of MAC capabilities 486 * 487 * Calculate the supported link modes based on @mac_capabilities, and restrict 488 * @supported and @state based on that. Use this function if your capabiliies 489 * aren't constant, such as if they vary depending on the interface. 490 */ 491 static void phylink_validate_mask_caps(unsigned long *supported, 492 struct phylink_link_state *state, 493 unsigned long mac_capabilities) 494 { 495 __ETHTOOL_DECLARE_LINK_MODE_MASK(mask) = { 0, }; 496 unsigned long caps; 497 498 phylink_set_port_modes(mask); 499 phylink_set(mask, Autoneg); 500 caps = phylink_get_capabilities(state->interface, mac_capabilities, 501 state->rate_matching); 502 phylink_caps_to_linkmodes(mask, caps); 503 504 linkmode_and(supported, supported, mask); 505 linkmode_and(state->advertising, state->advertising, mask); 506 } 507 508 static int phylink_validate_mac_and_pcs(struct phylink *pl, 509 unsigned long *supported, 510 struct phylink_link_state *state) 511 { 512 struct phylink_pcs *pcs = NULL; 513 unsigned long capabilities; 514 int ret; 515 516 /* Get the PCS for this interface mode */ 517 if (pl->mac_ops->mac_select_pcs) { 518 pcs = pl->mac_ops->mac_select_pcs(pl->config, state->interface); 519 if (IS_ERR(pcs)) 520 return PTR_ERR(pcs); 521 } 522 523 if (pcs) { 524 /* The PCS, if present, must be setup before phylink_create() 525 * has been called. If the ops is not initialised, print an 526 * error and backtrace rather than oopsing the kernel. 527 */ 528 if (!pcs->ops) { 529 phylink_err(pl, "interface %s: uninitialised PCS\n", 530 phy_modes(state->interface)); 531 dump_stack(); 532 return -EINVAL; 533 } 534 535 /* Ensure that this PCS supports the interface which the MAC 536 * returned it for. It is an error for the MAC to return a PCS 537 * that does not support the interface mode. 538 */ 539 if (!phy_interface_empty(pcs->supported_interfaces) && 540 !test_bit(state->interface, pcs->supported_interfaces)) { 541 phylink_err(pl, "MAC returned PCS which does not support %s\n", 542 phy_modes(state->interface)); 543 return -EINVAL; 544 } 545 546 /* Validate the link parameters with the PCS */ 547 if (pcs->ops->pcs_validate) { 548 ret = pcs->ops->pcs_validate(pcs, supported, state); 549 if (ret < 0 || phylink_is_empty_linkmode(supported)) 550 return -EINVAL; 551 552 /* Ensure the advertising mask is a subset of the 553 * supported mask. 554 */ 555 linkmode_and(state->advertising, state->advertising, 556 supported); 557 } 558 } 559 560 /* Then validate the link parameters with the MAC */ 561 if (pl->mac_ops->mac_get_caps) 562 capabilities = pl->mac_ops->mac_get_caps(pl->config, 563 state->interface); 564 else 565 capabilities = pl->config->mac_capabilities; 566 567 phylink_validate_mask_caps(supported, state, capabilities); 568 569 return phylink_is_empty_linkmode(supported) ? -EINVAL : 0; 570 } 571 572 static void phylink_validate_one(struct phylink *pl, struct phy_device *phy, 573 const unsigned long *supported, 574 const struct phylink_link_state *state, 575 phy_interface_t interface, 576 unsigned long *accum_supported, 577 unsigned long *accum_advertising) 578 { 579 __ETHTOOL_DECLARE_LINK_MODE_MASK(tmp_supported); 580 struct phylink_link_state tmp_state; 581 582 linkmode_copy(tmp_supported, supported); 583 584 tmp_state = *state; 585 tmp_state.interface = interface; 586 587 if (phy) 588 tmp_state.rate_matching = phy_get_rate_matching(phy, interface); 589 590 if (!phylink_validate_mac_and_pcs(pl, tmp_supported, &tmp_state)) { 591 phylink_dbg(pl, " interface %u (%s) rate match %s supports %*pbl\n", 592 interface, phy_modes(interface), 593 phy_rate_matching_to_str(tmp_state.rate_matching), 594 __ETHTOOL_LINK_MODE_MASK_NBITS, tmp_supported); 595 596 linkmode_or(accum_supported, accum_supported, tmp_supported); 597 linkmode_or(accum_advertising, accum_advertising, 598 tmp_state.advertising); 599 } 600 } 601 602 static int phylink_validate_mask(struct phylink *pl, struct phy_device *phy, 603 unsigned long *supported, 604 struct phylink_link_state *state, 605 const unsigned long *interfaces) 606 { 607 __ETHTOOL_DECLARE_LINK_MODE_MASK(all_adv) = { 0, }; 608 __ETHTOOL_DECLARE_LINK_MODE_MASK(all_s) = { 0, }; 609 int interface; 610 611 for_each_set_bit(interface, interfaces, PHY_INTERFACE_MODE_MAX) 612 phylink_validate_one(pl, phy, supported, state, interface, 613 all_s, all_adv); 614 615 linkmode_copy(supported, all_s); 616 linkmode_copy(state->advertising, all_adv); 617 618 return phylink_is_empty_linkmode(supported) ? -EINVAL : 0; 619 } 620 621 static int phylink_validate(struct phylink *pl, unsigned long *supported, 622 struct phylink_link_state *state) 623 { 624 const unsigned long *interfaces = pl->config->supported_interfaces; 625 626 if (state->interface == PHY_INTERFACE_MODE_NA) 627 return phylink_validate_mask(pl, NULL, supported, state, 628 interfaces); 629 630 if (!test_bit(state->interface, interfaces)) 631 return -EINVAL; 632 633 return phylink_validate_mac_and_pcs(pl, supported, state); 634 } 635 636 static void phylink_fill_fixedlink_supported(unsigned long *supported) 637 { 638 linkmode_set_bit(ETHTOOL_LINK_MODE_10baseT_Half_BIT, supported); 639 linkmode_set_bit(ETHTOOL_LINK_MODE_10baseT_Full_BIT, supported); 640 linkmode_set_bit(ETHTOOL_LINK_MODE_100baseT_Half_BIT, supported); 641 linkmode_set_bit(ETHTOOL_LINK_MODE_100baseT_Full_BIT, supported); 642 linkmode_set_bit(ETHTOOL_LINK_MODE_1000baseT_Half_BIT, supported); 643 linkmode_set_bit(ETHTOOL_LINK_MODE_1000baseT_Full_BIT, supported); 644 linkmode_set_bit(ETHTOOL_LINK_MODE_2500baseT_Full_BIT, supported); 645 linkmode_set_bit(ETHTOOL_LINK_MODE_5000baseT_Full_BIT, supported); 646 linkmode_set_bit(ETHTOOL_LINK_MODE_10000baseT_Full_BIT, supported); 647 } 648 649 static int phylink_parse_fixedlink(struct phylink *pl, 650 const struct fwnode_handle *fwnode) 651 { 652 __ETHTOOL_DECLARE_LINK_MODE_MASK(match) = { 0, }; 653 __ETHTOOL_DECLARE_LINK_MODE_MASK(mask) = { 0, }; 654 const struct link_capabilities *c; 655 struct fwnode_handle *fixed_node; 656 struct gpio_desc *desc; 657 u32 speed; 658 int ret; 659 660 fixed_node = fwnode_get_named_child_node(fwnode, "fixed-link"); 661 if (fixed_node) { 662 ret = fwnode_property_read_u32(fixed_node, "speed", &speed); 663 664 pl->link_config.speed = speed; 665 pl->link_config.duplex = DUPLEX_HALF; 666 667 if (fwnode_property_read_bool(fixed_node, "full-duplex")) 668 pl->link_config.duplex = DUPLEX_FULL; 669 670 /* We treat the "pause" and "asym-pause" terminology as 671 * defining the link partner's ability. 672 */ 673 if (fwnode_property_read_bool(fixed_node, "pause")) 674 __set_bit(ETHTOOL_LINK_MODE_Pause_BIT, 675 pl->link_config.lp_advertising); 676 if (fwnode_property_read_bool(fixed_node, "asym-pause")) 677 __set_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, 678 pl->link_config.lp_advertising); 679 680 if (ret == 0) { 681 desc = fwnode_gpiod_get_index(fixed_node, "link", 0, 682 GPIOD_IN, "?"); 683 684 if (!IS_ERR(desc)) 685 pl->link_gpio = desc; 686 else if (desc == ERR_PTR(-EPROBE_DEFER)) 687 ret = -EPROBE_DEFER; 688 } 689 fwnode_handle_put(fixed_node); 690 691 if (ret) 692 return ret; 693 } else { 694 u32 prop[5]; 695 696 ret = fwnode_property_read_u32_array(fwnode, "fixed-link", 697 NULL, 0); 698 if (ret != ARRAY_SIZE(prop)) { 699 phylink_err(pl, "broken fixed-link?\n"); 700 return -EINVAL; 701 } 702 703 ret = fwnode_property_read_u32_array(fwnode, "fixed-link", 704 prop, ARRAY_SIZE(prop)); 705 if (!ret) { 706 pl->link_config.duplex = prop[1] ? 707 DUPLEX_FULL : DUPLEX_HALF; 708 pl->link_config.speed = prop[2]; 709 if (prop[3]) 710 __set_bit(ETHTOOL_LINK_MODE_Pause_BIT, 711 pl->link_config.lp_advertising); 712 if (prop[4]) 713 __set_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, 714 pl->link_config.lp_advertising); 715 } 716 } 717 718 if (pl->link_config.speed > SPEED_1000 && 719 pl->link_config.duplex != DUPLEX_FULL) 720 phylink_warn(pl, "fixed link specifies half duplex for %dMbps link?\n", 721 pl->link_config.speed); 722 723 linkmode_zero(pl->supported); 724 phylink_fill_fixedlink_supported(pl->supported); 725 726 linkmode_copy(pl->link_config.advertising, pl->supported); 727 phylink_validate(pl, pl->supported, &pl->link_config); 728 729 c = phy_caps_lookup(pl->link_config.speed, pl->link_config.duplex, 730 pl->supported, true); 731 if (c) 732 linkmode_and(match, pl->supported, c->linkmodes); 733 734 linkmode_set_bit(ETHTOOL_LINK_MODE_Pause_BIT, mask); 735 linkmode_set_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, mask); 736 linkmode_set_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, mask); 737 linkmode_and(pl->supported, pl->supported, mask); 738 739 phylink_set(pl->supported, MII); 740 741 if (c) { 742 linkmode_or(pl->supported, pl->supported, match); 743 linkmode_or(pl->link_config.lp_advertising, 744 pl->link_config.lp_advertising, match); 745 } else { 746 phylink_warn(pl, "fixed link %s duplex %dMbps not recognised\n", 747 pl->link_config.duplex == DUPLEX_FULL ? "full" : "half", 748 pl->link_config.speed); 749 } 750 751 linkmode_and(pl->link_config.advertising, pl->link_config.advertising, 752 pl->supported); 753 754 pl->link_config.link = 1; 755 pl->link_config.an_complete = 1; 756 757 return 0; 758 } 759 760 static int phylink_parse_mode(struct phylink *pl, 761 const struct fwnode_handle *fwnode) 762 { 763 struct fwnode_handle *dn; 764 const char *managed; 765 unsigned long caps; 766 767 if (pl->config->default_an_inband) 768 pl->cfg_link_an_mode = MLO_AN_INBAND; 769 770 dn = fwnode_get_named_child_node(fwnode, "fixed-link"); 771 if (dn || fwnode_property_present(fwnode, "fixed-link")) 772 pl->cfg_link_an_mode = MLO_AN_FIXED; 773 fwnode_handle_put(dn); 774 775 if ((fwnode_property_read_string(fwnode, "managed", &managed) == 0 && 776 strcmp(managed, "in-band-status") == 0)) { 777 if (pl->cfg_link_an_mode == MLO_AN_FIXED) { 778 phylink_err(pl, 779 "can't use both fixed-link and in-band-status\n"); 780 return -EINVAL; 781 } 782 783 pl->cfg_link_an_mode = MLO_AN_INBAND; 784 } 785 786 if (pl->cfg_link_an_mode == MLO_AN_INBAND) { 787 linkmode_zero(pl->supported); 788 phylink_set(pl->supported, MII); 789 phylink_set(pl->supported, Autoneg); 790 phylink_set(pl->supported, Asym_Pause); 791 phylink_set(pl->supported, Pause); 792 793 switch (pl->link_config.interface) { 794 case PHY_INTERFACE_MODE_SGMII: 795 case PHY_INTERFACE_MODE_PSGMII: 796 case PHY_INTERFACE_MODE_QSGMII: 797 case PHY_INTERFACE_MODE_QUSGMII: 798 case PHY_INTERFACE_MODE_RGMII: 799 case PHY_INTERFACE_MODE_RGMII_ID: 800 case PHY_INTERFACE_MODE_RGMII_RXID: 801 case PHY_INTERFACE_MODE_RGMII_TXID: 802 case PHY_INTERFACE_MODE_RTBI: 803 case PHY_INTERFACE_MODE_1000BASEX: 804 case PHY_INTERFACE_MODE_2500BASEX: 805 case PHY_INTERFACE_MODE_5GBASER: 806 case PHY_INTERFACE_MODE_25GBASER: 807 case PHY_INTERFACE_MODE_USXGMII: 808 case PHY_INTERFACE_MODE_10G_QXGMII: 809 case PHY_INTERFACE_MODE_10GKR: 810 case PHY_INTERFACE_MODE_10GBASER: 811 case PHY_INTERFACE_MODE_XLGMII: 812 case PHY_INTERFACE_MODE_50GBASER: 813 case PHY_INTERFACE_MODE_LAUI: 814 case PHY_INTERFACE_MODE_100GBASEP: 815 caps = ~(MAC_SYM_PAUSE | MAC_ASYM_PAUSE); 816 caps = phylink_get_capabilities(pl->link_config.interface, caps, 817 RATE_MATCH_NONE); 818 phylink_caps_to_linkmodes(pl->supported, caps); 819 break; 820 821 default: 822 phylink_err(pl, 823 "incorrect link mode %s for in-band status\n", 824 phy_modes(pl->link_config.interface)); 825 return -EINVAL; 826 } 827 828 linkmode_copy(pl->link_config.advertising, pl->supported); 829 830 if (phylink_validate(pl, pl->supported, &pl->link_config)) { 831 phylink_err(pl, 832 "failed to validate link configuration for in-band status\n"); 833 return -EINVAL; 834 } 835 } 836 837 return 0; 838 } 839 840 static void phylink_apply_manual_flow(struct phylink *pl, 841 struct phylink_link_state *state) 842 { 843 /* If autoneg is disabled, pause AN is also disabled */ 844 if (!linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, 845 state->advertising)) 846 state->pause &= ~MLO_PAUSE_AN; 847 848 /* Manual configuration of pause modes */ 849 if (!(pl->link_config.pause & MLO_PAUSE_AN)) 850 state->pause = pl->link_config.pause; 851 } 852 853 static void phylink_resolve_an_pause(struct phylink_link_state *state) 854 { 855 bool tx_pause, rx_pause; 856 857 if (state->duplex == DUPLEX_FULL) { 858 linkmode_resolve_pause(state->advertising, 859 state->lp_advertising, 860 &tx_pause, &rx_pause); 861 if (tx_pause) 862 state->pause |= MLO_PAUSE_TX; 863 if (rx_pause) 864 state->pause |= MLO_PAUSE_RX; 865 } 866 } 867 868 static unsigned int phylink_pcs_inband_caps(struct phylink_pcs *pcs, 869 phy_interface_t interface) 870 { 871 if (pcs && pcs->ops->pcs_inband_caps) 872 return pcs->ops->pcs_inband_caps(pcs, interface); 873 874 return 0; 875 } 876 877 static void phylink_pcs_pre_config(struct phylink_pcs *pcs, 878 phy_interface_t interface) 879 { 880 if (pcs && pcs->ops->pcs_pre_config) 881 pcs->ops->pcs_pre_config(pcs, interface); 882 } 883 884 static int phylink_pcs_post_config(struct phylink_pcs *pcs, 885 phy_interface_t interface) 886 { 887 int err = 0; 888 889 if (pcs && pcs->ops->pcs_post_config) 890 err = pcs->ops->pcs_post_config(pcs, interface); 891 892 return err; 893 } 894 895 static void phylink_pcs_disable(struct phylink_pcs *pcs) 896 { 897 if (pcs && pcs->ops->pcs_disable) 898 pcs->ops->pcs_disable(pcs); 899 } 900 901 static int phylink_pcs_enable(struct phylink_pcs *pcs) 902 { 903 int err = 0; 904 905 if (pcs && pcs->ops->pcs_enable) 906 err = pcs->ops->pcs_enable(pcs); 907 908 return err; 909 } 910 911 static int phylink_pcs_config(struct phylink_pcs *pcs, unsigned int neg_mode, 912 const struct phylink_link_state *state, 913 bool permit_pause_to_mac) 914 { 915 if (!pcs) 916 return 0; 917 918 return pcs->ops->pcs_config(pcs, neg_mode, state->interface, 919 state->advertising, permit_pause_to_mac); 920 } 921 922 static void phylink_pcs_link_up(struct phylink_pcs *pcs, unsigned int neg_mode, 923 phy_interface_t interface, int speed, 924 int duplex) 925 { 926 if (pcs && pcs->ops->pcs_link_up) 927 pcs->ops->pcs_link_up(pcs, neg_mode, interface, speed, duplex); 928 } 929 930 static void phylink_pcs_disable_eee(struct phylink_pcs *pcs) 931 { 932 if (pcs && pcs->ops->pcs_disable_eee) 933 pcs->ops->pcs_disable_eee(pcs); 934 } 935 936 static void phylink_pcs_enable_eee(struct phylink_pcs *pcs) 937 { 938 if (pcs && pcs->ops->pcs_enable_eee) 939 pcs->ops->pcs_enable_eee(pcs); 940 } 941 942 /* Query inband for a specific interface mode, asking the MAC for the 943 * PCS which will be used to handle the interface mode. 944 */ 945 static unsigned int phylink_inband_caps(struct phylink *pl, 946 phy_interface_t interface) 947 { 948 struct phylink_pcs *pcs; 949 950 if (!pl->mac_ops->mac_select_pcs) 951 return 0; 952 953 pcs = pl->mac_ops->mac_select_pcs(pl->config, interface); 954 if (!pcs) 955 return 0; 956 957 return phylink_pcs_inband_caps(pcs, interface); 958 } 959 960 static void phylink_pcs_poll_stop(struct phylink *pl) 961 { 962 if (pl->cfg_link_an_mode == MLO_AN_INBAND) 963 timer_delete(&pl->link_poll); 964 } 965 966 static void phylink_pcs_poll_start(struct phylink *pl) 967 { 968 if (pl->pcs && pl->pcs->poll && pl->cfg_link_an_mode == MLO_AN_INBAND) 969 mod_timer(&pl->link_poll, jiffies + HZ); 970 } 971 972 int phylink_pcs_pre_init(struct phylink *pl, struct phylink_pcs *pcs) 973 { 974 int ret = 0; 975 976 /* Signal to PCS driver that MAC requires RX clock for init */ 977 if (pl->config->mac_requires_rxc) 978 pcs->rxc_always_on = true; 979 980 if (pcs->ops->pcs_pre_init) 981 ret = pcs->ops->pcs_pre_init(pcs); 982 983 return ret; 984 } 985 EXPORT_SYMBOL_GPL(phylink_pcs_pre_init); 986 987 static void phylink_mac_config(struct phylink *pl, 988 const struct phylink_link_state *state) 989 { 990 struct phylink_link_state st = *state; 991 992 /* Stop drivers incorrectly using these */ 993 linkmode_zero(st.lp_advertising); 994 st.speed = SPEED_UNKNOWN; 995 st.duplex = DUPLEX_UNKNOWN; 996 st.an_complete = false; 997 st.link = false; 998 999 phylink_dbg(pl, 1000 "%s: mode=%s/%s/%s adv=%*pb pause=%02x\n", 1001 __func__, phylink_an_mode_str(pl->act_link_an_mode), 1002 phy_modes(st.interface), 1003 phy_rate_matching_to_str(st.rate_matching), 1004 __ETHTOOL_LINK_MODE_MASK_NBITS, st.advertising, 1005 st.pause); 1006 1007 pl->mac_ops->mac_config(pl->config, pl->act_link_an_mode, &st); 1008 } 1009 1010 static void phylink_pcs_an_restart(struct phylink *pl) 1011 { 1012 if (pl->pcs && linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, 1013 pl->link_config.advertising) && 1014 phy_interface_mode_is_8023z(pl->link_config.interface) && 1015 phylink_autoneg_inband(pl->act_link_an_mode)) 1016 pl->pcs->ops->pcs_an_restart(pl->pcs); 1017 } 1018 1019 enum inband_type { 1020 INBAND_NONE, 1021 INBAND_CISCO_SGMII, 1022 INBAND_BASEX, 1023 }; 1024 1025 static enum inband_type phylink_get_inband_type(phy_interface_t interface) 1026 { 1027 switch (interface) { 1028 case PHY_INTERFACE_MODE_SGMII: 1029 case PHY_INTERFACE_MODE_QSGMII: 1030 case PHY_INTERFACE_MODE_QUSGMII: 1031 case PHY_INTERFACE_MODE_USXGMII: 1032 case PHY_INTERFACE_MODE_10G_QXGMII: 1033 /* These protocols are designed for use with a PHY which 1034 * communicates its negotiation result back to the MAC via 1035 * inband communication. Note: there exist PHYs that run 1036 * with SGMII but do not send the inband data. 1037 */ 1038 return INBAND_CISCO_SGMII; 1039 1040 case PHY_INTERFACE_MODE_1000BASEX: 1041 case PHY_INTERFACE_MODE_2500BASEX: 1042 /* 1000base-X is designed for use media-side for Fibre 1043 * connections, and thus the Autoneg bit needs to be 1044 * taken into account. We also do this for 2500base-X 1045 * as well, but drivers may not support this, so may 1046 * need to override this. 1047 */ 1048 return INBAND_BASEX; 1049 1050 default: 1051 return INBAND_NONE; 1052 } 1053 } 1054 1055 /** 1056 * phylink_pcs_neg_mode() - helper to determine PCS inband mode 1057 * @pl: a pointer to a &struct phylink returned from phylink_create() 1058 * @pcs: a pointer to &struct phylink_pcs 1059 * @interface: interface mode to be used 1060 * @advertising: adertisement ethtool link mode mask 1061 * 1062 * Determines the negotiation mode to be used by the PCS, and returns 1063 * one of: 1064 * 1065 * - %PHYLINK_PCS_NEG_NONE: interface mode does not support inband 1066 * - %PHYLINK_PCS_NEG_OUTBAND: an out of band mode (e.g. reading the PHY) 1067 * will be used. 1068 * - %PHYLINK_PCS_NEG_INBAND_DISABLED: inband mode selected but autoneg 1069 * disabled 1070 * - %PHYLINK_PCS_NEG_INBAND_ENABLED: inband mode selected and autoneg enabled 1071 * 1072 * Note: this is for cases where the PCS itself is involved in negotiation 1073 * (e.g. Clause 37, SGMII and similar) not Clause 73. 1074 */ 1075 static void phylink_pcs_neg_mode(struct phylink *pl, struct phylink_pcs *pcs, 1076 phy_interface_t interface, 1077 const unsigned long *advertising) 1078 { 1079 unsigned int pcs_ib_caps = 0; 1080 unsigned int phy_ib_caps = 0; 1081 unsigned int neg_mode, mode; 1082 enum inband_type type; 1083 1084 type = phylink_get_inband_type(interface); 1085 if (type == INBAND_NONE) { 1086 pl->pcs_neg_mode = PHYLINK_PCS_NEG_NONE; 1087 pl->act_link_an_mode = pl->req_link_an_mode; 1088 return; 1089 } 1090 1091 mode = pl->req_link_an_mode; 1092 1093 pl->phy_ib_mode = 0; 1094 1095 if (pcs) 1096 pcs_ib_caps = phylink_pcs_inband_caps(pcs, interface); 1097 1098 if (pl->phydev) 1099 phy_ib_caps = phy_inband_caps(pl->phydev, interface); 1100 1101 phylink_dbg(pl, "interface %s inband modes: pcs=%02x phy=%02x\n", 1102 phy_modes(interface), pcs_ib_caps, phy_ib_caps); 1103 1104 if (!phylink_autoneg_inband(mode)) { 1105 bool pcs_ib_only = false; 1106 bool phy_ib_only = false; 1107 1108 if (pcs_ib_caps && pcs_ib_caps != LINK_INBAND_DISABLE) { 1109 /* PCS supports reporting in-band capabilities, and 1110 * supports more than disable mode. 1111 */ 1112 if (pcs_ib_caps & LINK_INBAND_DISABLE) 1113 neg_mode = PHYLINK_PCS_NEG_OUTBAND; 1114 else if (pcs_ib_caps & LINK_INBAND_ENABLE) 1115 pcs_ib_only = true; 1116 } 1117 1118 if (phy_ib_caps && phy_ib_caps != LINK_INBAND_DISABLE) { 1119 /* PHY supports in-band capabilities, and supports 1120 * more than disable mode. 1121 */ 1122 if (phy_ib_caps & LINK_INBAND_DISABLE) 1123 pl->phy_ib_mode = LINK_INBAND_DISABLE; 1124 else if (phy_ib_caps & LINK_INBAND_BYPASS) 1125 pl->phy_ib_mode = LINK_INBAND_BYPASS; 1126 else if (phy_ib_caps & LINK_INBAND_ENABLE) 1127 phy_ib_only = true; 1128 } 1129 1130 /* If either the PCS or PHY requires inband to be enabled, 1131 * this is an invalid configuration. Provide a diagnostic 1132 * message for this case, but don't try to force the issue. 1133 */ 1134 if (pcs_ib_only || phy_ib_only) 1135 phylink_warn(pl, 1136 "firmware wants %s mode, but %s%s%s requires inband\n", 1137 phylink_an_mode_str(mode), 1138 pcs_ib_only ? "PCS" : "", 1139 pcs_ib_only && phy_ib_only ? " and " : "", 1140 phy_ib_only ? "PHY" : ""); 1141 1142 neg_mode = PHYLINK_PCS_NEG_OUTBAND; 1143 } else if (type == INBAND_CISCO_SGMII || pl->phydev) { 1144 /* For SGMII modes which are designed to be used with PHYs, or 1145 * Base-X with a PHY, we try to use in-band mode where-ever 1146 * possible. However, there are some PHYs e.g. BCM84881 which 1147 * do not support in-band. 1148 */ 1149 const unsigned int inband_ok = LINK_INBAND_ENABLE | 1150 LINK_INBAND_BYPASS; 1151 const unsigned int outband_ok = LINK_INBAND_DISABLE | 1152 LINK_INBAND_BYPASS; 1153 /* PCS PHY 1154 * D E D E 1155 * 0 0 0 0 no information inband enabled 1156 * 1 0 0 0 pcs doesn't support outband 1157 * 0 1 0 0 pcs required inband enabled 1158 * 1 1 0 0 pcs optional inband enabled 1159 * 0 0 1 0 phy doesn't support outband 1160 * 1 0 1 0 pcs+phy doesn't support outband 1161 * 0 1 1 0 pcs required, phy doesn't support, invalid 1162 * 1 1 1 0 pcs optional, phy doesn't support, outband 1163 * 0 0 0 1 phy required inband enabled 1164 * 1 0 0 1 pcs doesn't support, phy required, invalid 1165 * 0 1 0 1 pcs+phy required inband enabled 1166 * 1 1 0 1 pcs optional, phy required inband enabled 1167 * 0 0 1 1 phy optional inband enabled 1168 * 1 0 1 1 pcs doesn't support, phy optional, outband 1169 * 0 1 1 1 pcs required, phy optional inband enabled 1170 * 1 1 1 1 pcs+phy optional inband enabled 1171 */ 1172 if ((!pcs_ib_caps || pcs_ib_caps & inband_ok) && 1173 (!phy_ib_caps || phy_ib_caps & inband_ok)) { 1174 /* In-band supported or unknown at both ends. Enable 1175 * in-band mode with or without bypass at the PHY. 1176 */ 1177 if (phy_ib_caps & LINK_INBAND_ENABLE) 1178 pl->phy_ib_mode = LINK_INBAND_ENABLE; 1179 else if (phy_ib_caps & LINK_INBAND_BYPASS) 1180 pl->phy_ib_mode = LINK_INBAND_BYPASS; 1181 1182 neg_mode = PHYLINK_PCS_NEG_INBAND_ENABLED; 1183 } else if ((!pcs_ib_caps || pcs_ib_caps & outband_ok) && 1184 (!phy_ib_caps || phy_ib_caps & outband_ok)) { 1185 /* Either in-band not supported at at least one end. 1186 * In-band bypass at the other end is possible. 1187 */ 1188 if (phy_ib_caps & LINK_INBAND_DISABLE) 1189 pl->phy_ib_mode = LINK_INBAND_DISABLE; 1190 else if (phy_ib_caps & LINK_INBAND_BYPASS) 1191 pl->phy_ib_mode = LINK_INBAND_BYPASS; 1192 1193 neg_mode = PHYLINK_PCS_NEG_OUTBAND; 1194 if (pl->phydev) 1195 mode = MLO_AN_PHY; 1196 } else { 1197 /* invalid */ 1198 phylink_warn(pl, "%s: incompatible in-band capabilities, trying in-band", 1199 phy_modes(interface)); 1200 neg_mode = PHYLINK_PCS_NEG_INBAND_ENABLED; 1201 } 1202 } else { 1203 /* For Base-X without a PHY */ 1204 if (pcs_ib_caps == LINK_INBAND_DISABLE) 1205 /* If the PCS doesn't support inband, then inband must 1206 * be disabled. 1207 */ 1208 neg_mode = PHYLINK_PCS_NEG_INBAND_DISABLED; 1209 else if (pcs_ib_caps == LINK_INBAND_ENABLE) 1210 /* If the PCS requires inband, then inband must always 1211 * be enabled. 1212 */ 1213 neg_mode = PHYLINK_PCS_NEG_INBAND_ENABLED; 1214 else if (linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, 1215 advertising)) 1216 neg_mode = PHYLINK_PCS_NEG_INBAND_ENABLED; 1217 else 1218 neg_mode = PHYLINK_PCS_NEG_INBAND_DISABLED; 1219 } 1220 1221 pl->pcs_neg_mode = neg_mode; 1222 pl->act_link_an_mode = mode; 1223 } 1224 1225 static void phylink_major_config(struct phylink *pl, bool restart, 1226 const struct phylink_link_state *state) 1227 { 1228 struct phylink_pcs *pcs = NULL; 1229 bool pcs_changed = false; 1230 unsigned int rate_kbd; 1231 int err; 1232 1233 phylink_dbg(pl, "major config, requested %s/%s\n", 1234 phylink_an_mode_str(pl->req_link_an_mode), 1235 phy_modes(state->interface)); 1236 1237 pl->major_config_failed = false; 1238 1239 if (pl->mac_ops->mac_select_pcs) { 1240 pcs = pl->mac_ops->mac_select_pcs(pl->config, state->interface); 1241 if (IS_ERR(pcs)) { 1242 phylink_err(pl, 1243 "mac_select_pcs unexpectedly failed: %pe\n", 1244 pcs); 1245 1246 pl->major_config_failed = true; 1247 return; 1248 } 1249 1250 pcs_changed = pl->pcs != pcs; 1251 } 1252 1253 phylink_pcs_neg_mode(pl, pcs, state->interface, state->advertising); 1254 1255 phylink_dbg(pl, "major config, active %s/%s/%s\n", 1256 phylink_an_mode_str(pl->act_link_an_mode), 1257 phylink_pcs_mode_str(pl->pcs_neg_mode), 1258 phy_modes(state->interface)); 1259 1260 phylink_pcs_poll_stop(pl); 1261 1262 if (pl->mac_ops->mac_prepare) { 1263 err = pl->mac_ops->mac_prepare(pl->config, pl->act_link_an_mode, 1264 state->interface); 1265 if (err < 0) { 1266 phylink_err(pl, "mac_prepare failed: %pe\n", 1267 ERR_PTR(err)); 1268 pl->major_config_failed = true; 1269 return; 1270 } 1271 } 1272 1273 /* If we have a new PCS, switch to the new PCS after preparing the MAC 1274 * for the change. 1275 */ 1276 if (pcs_changed) { 1277 phylink_pcs_disable(pl->pcs); 1278 1279 if (pl->pcs) 1280 pl->pcs->phylink = NULL; 1281 1282 pcs->phylink = pl; 1283 1284 pl->pcs = pcs; 1285 } 1286 1287 if (pl->pcs) 1288 phylink_pcs_pre_config(pl->pcs, state->interface); 1289 1290 phylink_mac_config(pl, state); 1291 1292 if (pl->pcs) { 1293 err = phylink_pcs_post_config(pl->pcs, state->interface); 1294 if (err < 0) { 1295 phylink_err(pl, "pcs_post_config failed: %pe\n", 1296 ERR_PTR(err)); 1297 1298 pl->major_config_failed = true; 1299 } 1300 } 1301 1302 if (pl->pcs_state == PCS_STATE_STARTING || pcs_changed) 1303 phylink_pcs_enable(pl->pcs); 1304 1305 err = phylink_pcs_config(pl->pcs, pl->pcs_neg_mode, state, 1306 !!(pl->link_config.pause & MLO_PAUSE_AN)); 1307 if (err < 0) { 1308 phylink_err(pl, "pcs_config failed: %pe\n", ERR_PTR(err)); 1309 pl->major_config_failed = true; 1310 } else if (err > 0) { 1311 restart = true; 1312 } 1313 1314 if (restart) 1315 phylink_pcs_an_restart(pl); 1316 1317 if (pl->mac_ops->mac_finish) { 1318 err = pl->mac_ops->mac_finish(pl->config, pl->act_link_an_mode, 1319 state->interface); 1320 if (err < 0) { 1321 phylink_err(pl, "mac_finish failed: %pe\n", 1322 ERR_PTR(err)); 1323 1324 pl->major_config_failed = true; 1325 } 1326 } 1327 1328 if (pl->phydev && pl->phy_ib_mode) { 1329 err = phy_config_inband(pl->phydev, pl->phy_ib_mode); 1330 if (err < 0) { 1331 phylink_err(pl, "phy_config_inband: %pe\n", 1332 ERR_PTR(err)); 1333 1334 pl->major_config_failed = true; 1335 } 1336 } 1337 1338 if (pl->sfp_bus) { 1339 rate_kbd = phylink_interface_signal_rate(state->interface); 1340 if (rate_kbd) 1341 sfp_upstream_set_signal_rate(pl->sfp_bus, rate_kbd); 1342 } 1343 1344 phylink_pcs_poll_start(pl); 1345 } 1346 1347 /* 1348 * Reconfigure for a change of inband advertisement. 1349 * If we have a separate PCS, we only need to call its pcs_config() method, 1350 * and then restart AN if it indicates something changed. Otherwise, we do 1351 * the full MAC reconfiguration. 1352 */ 1353 static int phylink_change_inband_advert(struct phylink *pl) 1354 { 1355 int ret; 1356 1357 if (test_bit(PHYLINK_DISABLE_STOPPED, &pl->phylink_disable_state)) 1358 return 0; 1359 1360 phylink_dbg(pl, "%s: mode=%s/%s adv=%*pb pause=%02x\n", __func__, 1361 phylink_an_mode_str(pl->req_link_an_mode), 1362 phy_modes(pl->link_config.interface), 1363 __ETHTOOL_LINK_MODE_MASK_NBITS, pl->link_config.advertising, 1364 pl->link_config.pause); 1365 1366 /* Recompute the PCS neg mode */ 1367 phylink_pcs_neg_mode(pl, pl->pcs, pl->link_config.interface, 1368 pl->link_config.advertising); 1369 1370 /* Modern PCS-based method; update the advert at the PCS, and 1371 * restart negotiation if the pcs_config() helper indicates that 1372 * the programmed advertisement has changed. 1373 */ 1374 ret = phylink_pcs_config(pl->pcs, pl->pcs_neg_mode, &pl->link_config, 1375 !!(pl->link_config.pause & MLO_PAUSE_AN)); 1376 if (ret < 0) 1377 return ret; 1378 1379 if (ret > 0) 1380 phylink_pcs_an_restart(pl); 1381 1382 return 0; 1383 } 1384 1385 static void phylink_mac_pcs_get_state(struct phylink *pl, 1386 struct phylink_link_state *state) 1387 { 1388 struct phylink_pcs *pcs; 1389 bool autoneg; 1390 1391 linkmode_copy(state->advertising, pl->link_config.advertising); 1392 linkmode_zero(state->lp_advertising); 1393 state->interface = pl->link_config.interface; 1394 state->rate_matching = pl->link_config.rate_matching; 1395 state->an_complete = 0; 1396 state->link = 1; 1397 1398 autoneg = pl->pcs_neg_mode == PHYLINK_PCS_NEG_INBAND_ENABLED; 1399 if (autoneg) { 1400 state->speed = SPEED_UNKNOWN; 1401 state->duplex = DUPLEX_UNKNOWN; 1402 state->pause = MLO_PAUSE_NONE; 1403 } else { 1404 state->speed = pl->link_config.speed; 1405 state->duplex = pl->link_config.duplex; 1406 state->pause = pl->link_config.pause; 1407 } 1408 1409 pcs = pl->pcs; 1410 if (pcs) 1411 pcs->ops->pcs_get_state(pcs, pl->pcs_neg_mode, state); 1412 else 1413 state->link = 0; 1414 } 1415 1416 /* The fixed state is... fixed except for the link state, 1417 * which may be determined by a GPIO or a callback. 1418 */ 1419 static void phylink_get_fixed_state(struct phylink *pl, 1420 struct phylink_link_state *state) 1421 { 1422 *state = pl->link_config; 1423 if (pl->config->get_fixed_state) 1424 pl->config->get_fixed_state(pl->config, state); 1425 else if (pl->link_gpio) 1426 state->link = !!gpiod_get_value_cansleep(pl->link_gpio); 1427 1428 state->pause = MLO_PAUSE_NONE; 1429 phylink_resolve_an_pause(state); 1430 } 1431 1432 static void phylink_mac_initial_config(struct phylink *pl, bool force_restart) 1433 { 1434 struct phylink_link_state link_state; 1435 1436 switch (pl->req_link_an_mode) { 1437 case MLO_AN_PHY: 1438 link_state = pl->phy_state; 1439 break; 1440 1441 case MLO_AN_FIXED: 1442 phylink_get_fixed_state(pl, &link_state); 1443 break; 1444 1445 case MLO_AN_INBAND: 1446 link_state = pl->link_config; 1447 if (link_state.interface == PHY_INTERFACE_MODE_SGMII) 1448 link_state.pause = MLO_PAUSE_NONE; 1449 break; 1450 1451 default: /* can't happen */ 1452 return; 1453 } 1454 1455 link_state.link = false; 1456 1457 phylink_apply_manual_flow(pl, &link_state); 1458 phylink_major_config(pl, force_restart, &link_state); 1459 } 1460 1461 static const char *phylink_pause_to_str(int pause) 1462 { 1463 switch (pause & MLO_PAUSE_TXRX_MASK) { 1464 case MLO_PAUSE_TX | MLO_PAUSE_RX: 1465 return "rx/tx"; 1466 case MLO_PAUSE_TX: 1467 return "tx"; 1468 case MLO_PAUSE_RX: 1469 return "rx"; 1470 default: 1471 return "off"; 1472 } 1473 } 1474 1475 static void phylink_deactivate_lpi(struct phylink *pl) 1476 { 1477 if (pl->mac_enable_tx_lpi) { 1478 pl->mac_enable_tx_lpi = false; 1479 1480 phylink_dbg(pl, "disabling LPI\n"); 1481 1482 pl->mac_ops->mac_disable_tx_lpi(pl->config); 1483 1484 phylink_pcs_disable_eee(pl->pcs); 1485 } 1486 } 1487 1488 static void phylink_activate_lpi(struct phylink *pl) 1489 { 1490 int err; 1491 1492 if (!test_bit(pl->cur_interface, pl->config->lpi_interfaces)) { 1493 phylink_dbg(pl, "MAC does not support LPI with %s\n", 1494 phy_modes(pl->cur_interface)); 1495 return; 1496 } 1497 1498 phylink_dbg(pl, "LPI timer %uus, tx clock stop %u\n", 1499 pl->mac_tx_lpi_timer, pl->mac_tx_clk_stop); 1500 1501 phylink_pcs_enable_eee(pl->pcs); 1502 1503 err = pl->mac_ops->mac_enable_tx_lpi(pl->config, pl->mac_tx_lpi_timer, 1504 pl->mac_tx_clk_stop); 1505 if (err) { 1506 phylink_pcs_disable_eee(pl->pcs); 1507 phylink_err(pl, "%ps() failed: %pe\n", 1508 pl->mac_ops->mac_enable_tx_lpi, ERR_PTR(err)); 1509 return; 1510 } 1511 1512 pl->mac_enable_tx_lpi = true; 1513 } 1514 1515 static void phylink_link_up(struct phylink *pl, 1516 struct phylink_link_state link_state) 1517 { 1518 struct net_device *ndev = pl->netdev; 1519 int speed, duplex; 1520 bool rx_pause; 1521 1522 speed = link_state.speed; 1523 duplex = link_state.duplex; 1524 rx_pause = !!(link_state.pause & MLO_PAUSE_RX); 1525 1526 switch (link_state.rate_matching) { 1527 case RATE_MATCH_PAUSE: 1528 /* The PHY is doing rate matchion from the media rate (in 1529 * the link_state) to the interface speed, and will send 1530 * pause frames to the MAC to limit its transmission speed. 1531 */ 1532 speed = phylink_interface_max_speed(link_state.interface); 1533 duplex = DUPLEX_FULL; 1534 rx_pause = true; 1535 break; 1536 1537 case RATE_MATCH_CRS: 1538 /* The PHY is doing rate matchion from the media rate (in 1539 * the link_state) to the interface speed, and will cause 1540 * collisions to the MAC to limit its transmission speed. 1541 */ 1542 speed = phylink_interface_max_speed(link_state.interface); 1543 duplex = DUPLEX_HALF; 1544 break; 1545 } 1546 1547 pl->cur_interface = link_state.interface; 1548 1549 phylink_pcs_link_up(pl->pcs, pl->pcs_neg_mode, pl->cur_interface, speed, 1550 duplex); 1551 1552 pl->mac_ops->mac_link_up(pl->config, pl->phydev, pl->act_link_an_mode, 1553 pl->cur_interface, speed, duplex, 1554 !!(link_state.pause & MLO_PAUSE_TX), rx_pause); 1555 1556 if (pl->mac_supports_eee && pl->phy_enable_tx_lpi) 1557 phylink_activate_lpi(pl); 1558 1559 if (ndev) 1560 netif_carrier_on(ndev); 1561 1562 phylink_info(pl, 1563 "Link is Up - %s/%s - flow control %s\n", 1564 phy_speed_to_str(link_state.speed), 1565 phy_duplex_to_str(link_state.duplex), 1566 phylink_pause_to_str(link_state.pause)); 1567 } 1568 1569 static void phylink_link_down(struct phylink *pl) 1570 { 1571 struct net_device *ndev = pl->netdev; 1572 1573 if (ndev) 1574 netif_carrier_off(ndev); 1575 1576 phylink_deactivate_lpi(pl); 1577 1578 pl->mac_ops->mac_link_down(pl->config, pl->act_link_an_mode, 1579 pl->cur_interface); 1580 phylink_info(pl, "Link is Down\n"); 1581 } 1582 1583 static bool phylink_link_is_up(struct phylink *pl) 1584 { 1585 return pl->netdev ? netif_carrier_ok(pl->netdev) : pl->old_link_state; 1586 } 1587 1588 static void phylink_resolve(struct work_struct *w) 1589 { 1590 struct phylink *pl = container_of(w, struct phylink, resolve); 1591 struct phylink_link_state link_state; 1592 bool mac_config = false; 1593 bool retrigger = false; 1594 bool cur_link_state; 1595 1596 mutex_lock(&pl->state_mutex); 1597 cur_link_state = phylink_link_is_up(pl); 1598 1599 if (pl->phylink_disable_state) { 1600 pl->link_failed = false; 1601 link_state.link = false; 1602 } else if (pl->link_failed) { 1603 link_state.link = false; 1604 retrigger = true; 1605 } else if (pl->act_link_an_mode == MLO_AN_FIXED) { 1606 phylink_get_fixed_state(pl, &link_state); 1607 mac_config = link_state.link; 1608 } else if (pl->act_link_an_mode == MLO_AN_PHY) { 1609 link_state = pl->phy_state; 1610 mac_config = link_state.link; 1611 } else { 1612 phylink_mac_pcs_get_state(pl, &link_state); 1613 1614 /* The PCS may have a latching link-fail indicator. If the link 1615 * was up, bring the link down and re-trigger the resolve. 1616 * Otherwise, re-read the PCS state to get the current status 1617 * of the link. 1618 */ 1619 if (!link_state.link) { 1620 if (cur_link_state) 1621 retrigger = true; 1622 else 1623 phylink_mac_pcs_get_state(pl, &link_state); 1624 } 1625 1626 /* If we have a phy, the "up" state is the union of both the 1627 * PHY and the MAC 1628 */ 1629 if (pl->phydev) 1630 link_state.link &= pl->phy_state.link; 1631 1632 /* Only update if the PHY link is up */ 1633 if (pl->phydev && pl->phy_state.link) { 1634 /* If the interface has changed, force a link down 1635 * event if the link isn't already down, and re-resolve. 1636 */ 1637 if (link_state.interface != pl->phy_state.interface) { 1638 retrigger = true; 1639 link_state.link = false; 1640 } 1641 1642 link_state.interface = pl->phy_state.interface; 1643 1644 /* If we are doing rate matching, then the link 1645 * speed/duplex comes from the PHY 1646 */ 1647 if (pl->phy_state.rate_matching) { 1648 link_state.rate_matching = 1649 pl->phy_state.rate_matching; 1650 link_state.speed = pl->phy_state.speed; 1651 link_state.duplex = pl->phy_state.duplex; 1652 } 1653 1654 /* If we have a PHY, we need to update with the PHY 1655 * flow control bits. 1656 */ 1657 link_state.pause = pl->phy_state.pause; 1658 mac_config = true; 1659 } 1660 } 1661 1662 if (pl->act_link_an_mode != MLO_AN_FIXED) 1663 phylink_apply_manual_flow(pl, &link_state); 1664 1665 if (mac_config) { 1666 if (link_state.interface != pl->link_config.interface) { 1667 /* The interface has changed, force the link down and 1668 * then reconfigure. 1669 */ 1670 if (cur_link_state) { 1671 phylink_link_down(pl); 1672 cur_link_state = false; 1673 } 1674 phylink_major_config(pl, false, &link_state); 1675 pl->link_config.interface = link_state.interface; 1676 } 1677 } 1678 1679 /* If configuration of the interface failed, force the link down 1680 * until we get a successful configuration. 1681 */ 1682 if (pl->major_config_failed) 1683 link_state.link = false; 1684 1685 if (link_state.link != cur_link_state) { 1686 pl->old_link_state = link_state.link; 1687 if (!link_state.link) 1688 phylink_link_down(pl); 1689 else 1690 phylink_link_up(pl, link_state); 1691 } 1692 if (!link_state.link && retrigger) { 1693 pl->link_failed = false; 1694 queue_work(system_power_efficient_wq, &pl->resolve); 1695 } 1696 mutex_unlock(&pl->state_mutex); 1697 } 1698 1699 static void phylink_run_resolve(struct phylink *pl) 1700 { 1701 if (!pl->phylink_disable_state) 1702 queue_work(system_power_efficient_wq, &pl->resolve); 1703 } 1704 1705 static void phylink_run_resolve_and_disable(struct phylink *pl, int bit) 1706 { 1707 unsigned long state = pl->phylink_disable_state; 1708 1709 set_bit(bit, &pl->phylink_disable_state); 1710 if (state == 0) { 1711 queue_work(system_power_efficient_wq, &pl->resolve); 1712 flush_work(&pl->resolve); 1713 } 1714 } 1715 1716 static void phylink_enable_and_run_resolve(struct phylink *pl, int bit) 1717 { 1718 clear_bit(bit, &pl->phylink_disable_state); 1719 phylink_run_resolve(pl); 1720 } 1721 1722 static void phylink_fixed_poll(struct timer_list *t) 1723 { 1724 struct phylink *pl = container_of(t, struct phylink, link_poll); 1725 1726 mod_timer(t, jiffies + HZ); 1727 1728 phylink_run_resolve(pl); 1729 } 1730 1731 static const struct sfp_upstream_ops sfp_phylink_ops; 1732 1733 static int phylink_register_sfp(struct phylink *pl, 1734 const struct fwnode_handle *fwnode) 1735 { 1736 struct sfp_bus *bus; 1737 int ret; 1738 1739 if (!fwnode) 1740 return 0; 1741 1742 bus = sfp_bus_find_fwnode(fwnode); 1743 if (IS_ERR(bus)) { 1744 phylink_err(pl, "unable to attach SFP bus: %pe\n", bus); 1745 return PTR_ERR(bus); 1746 } 1747 1748 pl->sfp_bus = bus; 1749 1750 ret = sfp_bus_add_upstream(bus, pl, &sfp_phylink_ops); 1751 sfp_bus_put(bus); 1752 1753 return ret; 1754 } 1755 1756 /** 1757 * phylink_set_fixed_link() - set the fixed link 1758 * @pl: a pointer to a &struct phylink returned from phylink_create() 1759 * @state: a pointer to a struct phylink_link_state. 1760 * 1761 * This function is used when the link parameters are known and do not change, 1762 * making it suitable for certain types of network connections. 1763 * 1764 * Returns: zero on success or negative error code. 1765 */ 1766 int phylink_set_fixed_link(struct phylink *pl, 1767 const struct phylink_link_state *state) 1768 { 1769 const struct link_capabilities *c; 1770 unsigned long *adv; 1771 1772 if (pl->cfg_link_an_mode != MLO_AN_PHY || !state || 1773 !test_bit(PHYLINK_DISABLE_STOPPED, &pl->phylink_disable_state)) 1774 return -EINVAL; 1775 1776 c = phy_caps_lookup(state->speed, state->duplex, 1777 pl->supported, true); 1778 if (!c) 1779 return -EINVAL; 1780 1781 adv = pl->link_config.advertising; 1782 linkmode_and(adv, pl->supported, c->linkmodes); 1783 linkmode_set_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, adv); 1784 1785 pl->link_config.speed = state->speed; 1786 pl->link_config.duplex = state->duplex; 1787 pl->link_config.link = 1; 1788 pl->link_config.an_complete = 1; 1789 1790 pl->cfg_link_an_mode = MLO_AN_FIXED; 1791 pl->req_link_an_mode = pl->cfg_link_an_mode; 1792 1793 return 0; 1794 } 1795 EXPORT_SYMBOL_GPL(phylink_set_fixed_link); 1796 1797 /** 1798 * phylink_create() - create a phylink instance 1799 * @config: a pointer to the target &struct phylink_config 1800 * @fwnode: a pointer to a &struct fwnode_handle describing the network 1801 * interface 1802 * @iface: the desired link mode defined by &typedef phy_interface_t 1803 * @mac_ops: a pointer to a &struct phylink_mac_ops for the MAC. 1804 * 1805 * Create a new phylink instance, and parse the link parameters found in @np. 1806 * This will parse in-band modes, fixed-link or SFP configuration. 1807 * 1808 * Note: the rtnl lock must not be held when calling this function. 1809 * 1810 * Returns a pointer to a &struct phylink, or an error-pointer value. Users 1811 * must use IS_ERR() to check for errors from this function. 1812 */ 1813 struct phylink *phylink_create(struct phylink_config *config, 1814 const struct fwnode_handle *fwnode, 1815 phy_interface_t iface, 1816 const struct phylink_mac_ops *mac_ops) 1817 { 1818 struct phylink *pl; 1819 int ret; 1820 1821 /* Validate the supplied configuration */ 1822 if (phy_interface_empty(config->supported_interfaces)) { 1823 dev_err(config->dev, 1824 "phylink: error: empty supported_interfaces\n"); 1825 return ERR_PTR(-EINVAL); 1826 } 1827 1828 pl = kzalloc(sizeof(*pl), GFP_KERNEL); 1829 if (!pl) 1830 return ERR_PTR(-ENOMEM); 1831 1832 mutex_init(&pl->state_mutex); 1833 INIT_WORK(&pl->resolve, phylink_resolve); 1834 1835 pl->config = config; 1836 if (config->type == PHYLINK_NETDEV) { 1837 pl->netdev = to_net_dev(config->dev); 1838 netif_carrier_off(pl->netdev); 1839 } else if (config->type == PHYLINK_DEV) { 1840 pl->dev = config->dev; 1841 } else { 1842 kfree(pl); 1843 return ERR_PTR(-EINVAL); 1844 } 1845 1846 pl->mac_supports_eee_ops = phylink_mac_implements_lpi(mac_ops); 1847 pl->mac_supports_eee = pl->mac_supports_eee_ops && 1848 pl->config->lpi_capabilities && 1849 !phy_interface_empty(pl->config->lpi_interfaces); 1850 1851 /* Set the default EEE configuration */ 1852 pl->eee_cfg.eee_enabled = pl->config->eee_enabled_default; 1853 pl->eee_cfg.tx_lpi_enabled = pl->eee_cfg.eee_enabled; 1854 pl->eee_cfg.tx_lpi_timer = pl->config->lpi_timer_default; 1855 1856 pl->phy_state.interface = iface; 1857 pl->link_interface = iface; 1858 if (iface == PHY_INTERFACE_MODE_MOCA) 1859 pl->link_port = PORT_BNC; 1860 else 1861 pl->link_port = PORT_MII; 1862 pl->link_config.interface = iface; 1863 pl->link_config.pause = MLO_PAUSE_AN; 1864 pl->link_config.speed = SPEED_UNKNOWN; 1865 pl->link_config.duplex = DUPLEX_UNKNOWN; 1866 pl->pcs_state = PCS_STATE_DOWN; 1867 pl->mac_ops = mac_ops; 1868 __set_bit(PHYLINK_DISABLE_STOPPED, &pl->phylink_disable_state); 1869 timer_setup(&pl->link_poll, phylink_fixed_poll, 0); 1870 1871 linkmode_fill(pl->supported); 1872 linkmode_copy(pl->link_config.advertising, pl->supported); 1873 phylink_validate(pl, pl->supported, &pl->link_config); 1874 1875 ret = phylink_parse_mode(pl, fwnode); 1876 if (ret < 0) { 1877 kfree(pl); 1878 return ERR_PTR(ret); 1879 } 1880 1881 if (pl->cfg_link_an_mode == MLO_AN_FIXED) { 1882 ret = phylink_parse_fixedlink(pl, fwnode); 1883 if (ret < 0) { 1884 kfree(pl); 1885 return ERR_PTR(ret); 1886 } 1887 } 1888 1889 pl->req_link_an_mode = pl->cfg_link_an_mode; 1890 1891 ret = phylink_register_sfp(pl, fwnode); 1892 if (ret < 0) { 1893 kfree(pl); 1894 return ERR_PTR(ret); 1895 } 1896 1897 return pl; 1898 } 1899 EXPORT_SYMBOL_GPL(phylink_create); 1900 1901 /** 1902 * phylink_destroy() - cleanup and destroy the phylink instance 1903 * @pl: a pointer to a &struct phylink returned from phylink_create() 1904 * 1905 * Destroy a phylink instance. Any PHY that has been attached must have been 1906 * cleaned up via phylink_disconnect_phy() prior to calling this function. 1907 * 1908 * Note: the rtnl lock must not be held when calling this function. 1909 */ 1910 void phylink_destroy(struct phylink *pl) 1911 { 1912 sfp_bus_del_upstream(pl->sfp_bus); 1913 if (pl->link_gpio) 1914 gpiod_put(pl->link_gpio); 1915 1916 cancel_work_sync(&pl->resolve); 1917 kfree(pl); 1918 } 1919 EXPORT_SYMBOL_GPL(phylink_destroy); 1920 1921 /** 1922 * phylink_expects_phy() - Determine if phylink expects a phy to be attached 1923 * @pl: a pointer to a &struct phylink returned from phylink_create() 1924 * 1925 * When using fixed-link mode, or in-band mode with 1000base-X or 2500base-X, 1926 * no PHY is needed. 1927 * 1928 * Returns true if phylink will be expecting a PHY. 1929 */ 1930 bool phylink_expects_phy(struct phylink *pl) 1931 { 1932 if (pl->cfg_link_an_mode == MLO_AN_FIXED || 1933 (pl->cfg_link_an_mode == MLO_AN_INBAND && 1934 phy_interface_mode_is_8023z(pl->link_interface))) 1935 return false; 1936 return true; 1937 } 1938 EXPORT_SYMBOL_GPL(phylink_expects_phy); 1939 1940 static void phylink_phy_change(struct phy_device *phydev, bool up) 1941 { 1942 struct phylink *pl = phydev->phylink; 1943 bool tx_pause, rx_pause; 1944 1945 phy_get_pause(phydev, &tx_pause, &rx_pause); 1946 1947 mutex_lock(&pl->state_mutex); 1948 pl->phy_state.speed = phydev->speed; 1949 pl->phy_state.duplex = phydev->duplex; 1950 pl->phy_state.rate_matching = phydev->rate_matching; 1951 pl->phy_state.pause = MLO_PAUSE_NONE; 1952 if (tx_pause) 1953 pl->phy_state.pause |= MLO_PAUSE_TX; 1954 if (rx_pause) 1955 pl->phy_state.pause |= MLO_PAUSE_RX; 1956 pl->phy_state.interface = phydev->interface; 1957 pl->phy_state.link = up; 1958 if (!up) 1959 pl->link_failed = true; 1960 1961 /* Get the LPI state from phylib */ 1962 pl->phy_enable_tx_lpi = phydev->enable_tx_lpi; 1963 pl->mac_tx_lpi_timer = phydev->eee_cfg.tx_lpi_timer; 1964 mutex_unlock(&pl->state_mutex); 1965 1966 phylink_run_resolve(pl); 1967 1968 phylink_dbg(pl, "phy link %s %s/%s/%s/%s/%s/%slpi\n", 1969 up ? "up" : "down", 1970 phy_modes(phydev->interface), 1971 phy_speed_to_str(phydev->speed), 1972 phy_duplex_to_str(phydev->duplex), 1973 phy_rate_matching_to_str(phydev->rate_matching), 1974 phylink_pause_to_str(pl->phy_state.pause), 1975 phydev->enable_tx_lpi ? "" : "no"); 1976 } 1977 1978 static int phylink_validate_phy(struct phylink *pl, struct phy_device *phy, 1979 unsigned long *supported, 1980 struct phylink_link_state *state) 1981 { 1982 DECLARE_PHY_INTERFACE_MASK(interfaces); 1983 1984 /* If the PHY provides a bitmap of the interfaces it will be using 1985 * depending on the negotiated media speeds, use this to validate 1986 * which ethtool link modes can be used. 1987 */ 1988 if (!phy_interface_empty(phy->possible_interfaces)) { 1989 /* We only care about the union of the PHY's interfaces and 1990 * those which the host supports. 1991 */ 1992 phy_interface_and(interfaces, phy->possible_interfaces, 1993 pl->config->supported_interfaces); 1994 1995 if (phy_interface_empty(interfaces)) { 1996 phylink_err(pl, "PHY has no common interfaces\n"); 1997 return -EINVAL; 1998 } 1999 2000 if (phy_on_sfp(phy)) { 2001 /* If the PHY is on a SFP, limit the interfaces to 2002 * those that can be used with a SFP module. 2003 */ 2004 phy_interface_and(interfaces, interfaces, 2005 phylink_sfp_interfaces); 2006 2007 if (phy_interface_empty(interfaces)) { 2008 phylink_err(pl, "SFP PHY's possible interfaces becomes empty\n"); 2009 return -EINVAL; 2010 } 2011 } 2012 2013 phylink_dbg(pl, "PHY %s uses interfaces %*pbl, validating %*pbl\n", 2014 phydev_name(phy), 2015 (int)PHY_INTERFACE_MODE_MAX, 2016 phy->possible_interfaces, 2017 (int)PHY_INTERFACE_MODE_MAX, interfaces); 2018 2019 return phylink_validate_mask(pl, phy, supported, state, 2020 interfaces); 2021 } 2022 2023 phylink_dbg(pl, "PHY %s doesn't supply possible interfaces\n", 2024 phydev_name(phy)); 2025 2026 /* Check whether we would use rate matching for the proposed interface 2027 * mode. 2028 */ 2029 state->rate_matching = phy_get_rate_matching(phy, state->interface); 2030 2031 /* Clause 45 PHYs may switch their Serdes lane between, e.g. 10GBASE-R, 2032 * 5GBASE-R, 2500BASE-X and SGMII if they are not using rate matching. 2033 * For some interface modes (e.g. RXAUI, XAUI and USXGMII) switching 2034 * their Serdes is either unnecessary or not reasonable. 2035 * 2036 * For these which switch interface modes, we really need to know which 2037 * interface modes the PHY supports to properly work out which ethtool 2038 * linkmodes can be supported. For now, as a work-around, we validate 2039 * against all interface modes, which may lead to more ethtool link 2040 * modes being advertised than are actually supported. 2041 */ 2042 if (phy->is_c45 && state->rate_matching == RATE_MATCH_NONE && 2043 state->interface != PHY_INTERFACE_MODE_RXAUI && 2044 state->interface != PHY_INTERFACE_MODE_XAUI && 2045 state->interface != PHY_INTERFACE_MODE_USXGMII) 2046 state->interface = PHY_INTERFACE_MODE_NA; 2047 2048 return phylink_validate(pl, supported, state); 2049 } 2050 2051 static int phylink_bringup_phy(struct phylink *pl, struct phy_device *phy, 2052 phy_interface_t interface) 2053 { 2054 struct phylink_link_state config; 2055 __ETHTOOL_DECLARE_LINK_MODE_MASK(supported); 2056 char *irq_str; 2057 int ret; 2058 2059 /* 2060 * This is the new way of dealing with flow control for PHYs, 2061 * as described by Timur Tabi in commit 529ed1275263 ("net: phy: 2062 * phy drivers should not set SUPPORTED_[Asym_]Pause") except 2063 * using our validate call to the MAC, we rely upon the MAC 2064 * clearing the bits from both supported and advertising fields. 2065 */ 2066 phy_support_asym_pause(phy); 2067 2068 memset(&config, 0, sizeof(config)); 2069 linkmode_copy(supported, phy->supported); 2070 linkmode_copy(config.advertising, phy->advertising); 2071 config.interface = interface; 2072 2073 ret = phylink_validate_phy(pl, phy, supported, &config); 2074 if (ret) { 2075 phylink_warn(pl, "validation of %s with support %*pb and advertisement %*pb failed: %pe\n", 2076 phy_modes(config.interface), 2077 __ETHTOOL_LINK_MODE_MASK_NBITS, phy->supported, 2078 __ETHTOOL_LINK_MODE_MASK_NBITS, config.advertising, 2079 ERR_PTR(ret)); 2080 return ret; 2081 } 2082 2083 phy->phylink = pl; 2084 phy->phy_link_change = phylink_phy_change; 2085 2086 irq_str = phy_attached_info_irq(phy); 2087 phylink_info(pl, 2088 "PHY [%s] driver [%s] (irq=%s)\n", 2089 dev_name(&phy->mdio.dev), phy->drv->name, irq_str); 2090 kfree(irq_str); 2091 2092 mutex_lock(&phy->lock); 2093 mutex_lock(&pl->state_mutex); 2094 pl->phydev = phy; 2095 pl->phy_state.interface = interface; 2096 pl->phy_state.pause = MLO_PAUSE_NONE; 2097 pl->phy_state.speed = SPEED_UNKNOWN; 2098 pl->phy_state.duplex = DUPLEX_UNKNOWN; 2099 pl->phy_state.rate_matching = RATE_MATCH_NONE; 2100 linkmode_copy(pl->supported, supported); 2101 linkmode_copy(pl->link_config.advertising, config.advertising); 2102 2103 /* Restrict the phy advertisement according to the MAC support. */ 2104 linkmode_copy(phy->advertising, config.advertising); 2105 2106 /* If the MAC supports phylink managed EEE, restrict the EEE 2107 * advertisement according to the MAC's LPI capabilities. 2108 */ 2109 if (pl->mac_supports_eee) { 2110 /* If EEE is enabled, then we need to call phy_support_eee() 2111 * to ensure that the advertising mask is appropriately set. 2112 * This also enables EEE at the PHY. 2113 */ 2114 if (pl->eee_cfg.eee_enabled) 2115 phy_support_eee(phy); 2116 2117 phy->eee_cfg.tx_lpi_enabled = pl->eee_cfg.tx_lpi_enabled; 2118 phy->eee_cfg.tx_lpi_timer = pl->eee_cfg.tx_lpi_timer; 2119 2120 /* Convert the MAC's LPI capabilities to linkmodes */ 2121 linkmode_zero(pl->supported_lpi); 2122 phylink_caps_to_linkmodes(pl->supported_lpi, 2123 pl->config->lpi_capabilities); 2124 2125 /* Restrict the PHYs EEE support/advertisement to the modes 2126 * that the MAC supports. 2127 */ 2128 linkmode_and(phy->advertising_eee, phy->advertising_eee, 2129 pl->supported_lpi); 2130 } else if (pl->mac_supports_eee_ops) { 2131 /* MAC supports phylink EEE, but wants EEE always disabled. */ 2132 phy_disable_eee(phy); 2133 } 2134 2135 mutex_unlock(&pl->state_mutex); 2136 mutex_unlock(&phy->lock); 2137 2138 phylink_dbg(pl, 2139 "phy: %s setting supported %*pb advertising %*pb\n", 2140 phy_modes(interface), 2141 __ETHTOOL_LINK_MODE_MASK_NBITS, pl->supported, 2142 __ETHTOOL_LINK_MODE_MASK_NBITS, phy->advertising); 2143 2144 if (pl->config->mac_managed_pm) 2145 phy->mac_managed_pm = true; 2146 2147 /* Allow the MAC to stop its clock if the PHY has the capability */ 2148 pl->mac_tx_clk_stop = phy_eee_tx_clock_stop_capable(phy) > 0; 2149 2150 if (pl->mac_supports_eee_ops) { 2151 /* Explicitly configure whether the PHY is allowed to stop it's 2152 * receive clock. 2153 */ 2154 ret = phy_eee_rx_clock_stop(phy, 2155 pl->config->eee_rx_clk_stop_enable); 2156 if (ret == -EOPNOTSUPP) 2157 ret = 0; 2158 } 2159 2160 if (ret == 0 && phy_interrupt_is_valid(phy)) 2161 phy_request_interrupt(phy); 2162 2163 return ret; 2164 } 2165 2166 static int phylink_attach_phy(struct phylink *pl, struct phy_device *phy, 2167 phy_interface_t interface) 2168 { 2169 u32 flags = 0; 2170 2171 if (WARN_ON(pl->cfg_link_an_mode == MLO_AN_FIXED || 2172 (pl->cfg_link_an_mode == MLO_AN_INBAND && 2173 phy_interface_mode_is_8023z(interface) && !pl->sfp_bus))) 2174 return -EINVAL; 2175 2176 if (pl->phydev) 2177 return -EBUSY; 2178 2179 if (pl->config->mac_requires_rxc) 2180 flags |= PHY_F_RXC_ALWAYS_ON; 2181 2182 return phy_attach_direct(pl->netdev, phy, flags, interface); 2183 } 2184 2185 /** 2186 * phylink_connect_phy() - connect a PHY to the phylink instance 2187 * @pl: a pointer to a &struct phylink returned from phylink_create() 2188 * @phy: a pointer to a &struct phy_device. 2189 * 2190 * Connect @phy to the phylink instance specified by @pl by calling 2191 * phy_attach_direct(). Configure the @phy according to the MAC driver's 2192 * capabilities, start the PHYLIB state machine and enable any interrupts 2193 * that the PHY supports. 2194 * 2195 * This updates the phylink's ethtool supported and advertising link mode 2196 * masks. 2197 * 2198 * Returns 0 on success or a negative errno. 2199 */ 2200 int phylink_connect_phy(struct phylink *pl, struct phy_device *phy) 2201 { 2202 int ret; 2203 2204 /* Use PHY device/driver interface */ 2205 if (pl->link_interface == PHY_INTERFACE_MODE_NA) { 2206 pl->link_interface = phy->interface; 2207 pl->link_config.interface = pl->link_interface; 2208 } 2209 2210 ret = phylink_attach_phy(pl, phy, pl->link_interface); 2211 if (ret < 0) 2212 return ret; 2213 2214 ret = phylink_bringup_phy(pl, phy, pl->link_config.interface); 2215 if (ret) 2216 phy_detach(phy); 2217 2218 return ret; 2219 } 2220 EXPORT_SYMBOL_GPL(phylink_connect_phy); 2221 2222 /** 2223 * phylink_of_phy_connect() - connect the PHY specified in the DT mode. 2224 * @pl: a pointer to a &struct phylink returned from phylink_create() 2225 * @dn: a pointer to a &struct device_node. 2226 * @flags: PHY-specific flags to communicate to the PHY device driver 2227 * 2228 * Connect the phy specified in the device node @dn to the phylink instance 2229 * specified by @pl. Actions specified in phylink_connect_phy() will be 2230 * performed. 2231 * 2232 * Returns 0 on success or a negative errno. 2233 */ 2234 int phylink_of_phy_connect(struct phylink *pl, struct device_node *dn, 2235 u32 flags) 2236 { 2237 return phylink_fwnode_phy_connect(pl, of_fwnode_handle(dn), flags); 2238 } 2239 EXPORT_SYMBOL_GPL(phylink_of_phy_connect); 2240 2241 /** 2242 * phylink_fwnode_phy_connect() - connect the PHY specified in the fwnode. 2243 * @pl: a pointer to a &struct phylink returned from phylink_create() 2244 * @fwnode: a pointer to a &struct fwnode_handle. 2245 * @flags: PHY-specific flags to communicate to the PHY device driver 2246 * 2247 * Connect the phy specified @fwnode to the phylink instance specified 2248 * by @pl. 2249 * 2250 * Returns 0 on success or a negative errno. 2251 */ 2252 int phylink_fwnode_phy_connect(struct phylink *pl, 2253 const struct fwnode_handle *fwnode, 2254 u32 flags) 2255 { 2256 struct fwnode_handle *phy_fwnode; 2257 struct phy_device *phy_dev; 2258 int ret; 2259 2260 /* Fixed links and 802.3z are handled without needing a PHY */ 2261 if (pl->cfg_link_an_mode == MLO_AN_FIXED || 2262 (pl->cfg_link_an_mode == MLO_AN_INBAND && 2263 phy_interface_mode_is_8023z(pl->link_interface))) 2264 return 0; 2265 2266 phy_fwnode = fwnode_get_phy_node(fwnode); 2267 if (IS_ERR(phy_fwnode)) { 2268 if (pl->cfg_link_an_mode == MLO_AN_PHY) 2269 return -ENODEV; 2270 return 0; 2271 } 2272 2273 phy_dev = fwnode_phy_find_device(phy_fwnode); 2274 /* We're done with the phy_node handle */ 2275 fwnode_handle_put(phy_fwnode); 2276 if (!phy_dev) 2277 return -ENODEV; 2278 2279 /* Use PHY device/driver interface */ 2280 if (pl->link_interface == PHY_INTERFACE_MODE_NA) { 2281 pl->link_interface = phy_dev->interface; 2282 pl->link_config.interface = pl->link_interface; 2283 } 2284 2285 if (pl->config->mac_requires_rxc) 2286 flags |= PHY_F_RXC_ALWAYS_ON; 2287 2288 ret = phy_attach_direct(pl->netdev, phy_dev, flags, 2289 pl->link_interface); 2290 phy_device_free(phy_dev); 2291 if (ret) 2292 return ret; 2293 2294 ret = phylink_bringup_phy(pl, phy_dev, pl->link_config.interface); 2295 if (ret) 2296 phy_detach(phy_dev); 2297 2298 return ret; 2299 } 2300 EXPORT_SYMBOL_GPL(phylink_fwnode_phy_connect); 2301 2302 /** 2303 * phylink_disconnect_phy() - disconnect any PHY attached to the phylink 2304 * instance. 2305 * @pl: a pointer to a &struct phylink returned from phylink_create() 2306 * 2307 * Disconnect any current PHY from the phylink instance described by @pl. 2308 */ 2309 void phylink_disconnect_phy(struct phylink *pl) 2310 { 2311 struct phy_device *phy; 2312 2313 ASSERT_RTNL(); 2314 2315 phy = pl->phydev; 2316 if (phy) { 2317 mutex_lock(&phy->lock); 2318 mutex_lock(&pl->state_mutex); 2319 pl->phydev = NULL; 2320 pl->phy_enable_tx_lpi = false; 2321 pl->mac_tx_clk_stop = false; 2322 mutex_unlock(&pl->state_mutex); 2323 mutex_unlock(&phy->lock); 2324 flush_work(&pl->resolve); 2325 2326 phy_disconnect(phy); 2327 } 2328 } 2329 EXPORT_SYMBOL_GPL(phylink_disconnect_phy); 2330 2331 static void phylink_link_changed(struct phylink *pl, bool up, const char *what) 2332 { 2333 if (!up) 2334 pl->link_failed = true; 2335 phylink_run_resolve(pl); 2336 phylink_dbg(pl, "%s link %s\n", what, up ? "up" : "down"); 2337 } 2338 2339 /** 2340 * phylink_mac_change() - notify phylink of a change in MAC state 2341 * @pl: a pointer to a &struct phylink returned from phylink_create() 2342 * @up: indicates whether the link is currently up. 2343 * 2344 * The MAC driver should call this driver when the state of its link 2345 * changes (eg, link failure, new negotiation results, etc.) 2346 */ 2347 void phylink_mac_change(struct phylink *pl, bool up) 2348 { 2349 phylink_link_changed(pl, up, "mac"); 2350 } 2351 EXPORT_SYMBOL_GPL(phylink_mac_change); 2352 2353 /** 2354 * phylink_pcs_change() - notify phylink of a change to PCS link state 2355 * @pcs: pointer to &struct phylink_pcs 2356 * @up: indicates whether the link is currently up. 2357 * 2358 * The PCS driver should call this when the state of its link changes 2359 * (e.g. link failure, new negotiation results, etc.) Note: it should 2360 * not determine "up" by reading the BMSR. If in doubt about the link 2361 * state at interrupt time, then pass true if pcs_get_state() returns 2362 * the latched link-down state, otherwise pass false. 2363 */ 2364 void phylink_pcs_change(struct phylink_pcs *pcs, bool up) 2365 { 2366 struct phylink *pl = pcs->phylink; 2367 2368 if (pl) 2369 phylink_link_changed(pl, up, "pcs"); 2370 } 2371 EXPORT_SYMBOL_GPL(phylink_pcs_change); 2372 2373 static irqreturn_t phylink_link_handler(int irq, void *data) 2374 { 2375 struct phylink *pl = data; 2376 2377 phylink_run_resolve(pl); 2378 2379 return IRQ_HANDLED; 2380 } 2381 2382 /** 2383 * phylink_start() - start a phylink instance 2384 * @pl: a pointer to a &struct phylink returned from phylink_create() 2385 * 2386 * Start the phylink instance specified by @pl, configuring the MAC for the 2387 * desired link mode(s) and negotiation style. This should be called from the 2388 * network device driver's &struct net_device_ops ndo_open() method. 2389 */ 2390 void phylink_start(struct phylink *pl) 2391 { 2392 bool poll = false; 2393 2394 ASSERT_RTNL(); 2395 2396 phylink_info(pl, "configuring for %s/%s link mode\n", 2397 phylink_an_mode_str(pl->req_link_an_mode), 2398 phy_modes(pl->link_config.interface)); 2399 2400 /* Always set the carrier off */ 2401 if (pl->netdev) 2402 netif_carrier_off(pl->netdev); 2403 2404 pl->pcs_state = PCS_STATE_STARTING; 2405 2406 /* Apply the link configuration to the MAC when starting. This allows 2407 * a fixed-link to start with the correct parameters, and also 2408 * ensures that we set the appropriate advertisement for Serdes links. 2409 * 2410 * Restart autonegotiation if using 802.3z to ensure that the link 2411 * parameters are properly negotiated. This is necessary for DSA 2412 * switches using 802.3z negotiation to ensure they see our modes. 2413 */ 2414 phylink_mac_initial_config(pl, true); 2415 2416 pl->pcs_state = PCS_STATE_STARTED; 2417 2418 phylink_enable_and_run_resolve(pl, PHYLINK_DISABLE_STOPPED); 2419 2420 if (pl->cfg_link_an_mode == MLO_AN_FIXED && pl->link_gpio) { 2421 int irq = gpiod_to_irq(pl->link_gpio); 2422 2423 if (irq > 0) { 2424 if (!request_irq(irq, phylink_link_handler, 2425 IRQF_TRIGGER_RISING | 2426 IRQF_TRIGGER_FALLING, 2427 "netdev link", pl)) 2428 pl->link_irq = irq; 2429 else 2430 irq = 0; 2431 } 2432 if (irq <= 0) 2433 poll = true; 2434 } 2435 2436 if (pl->cfg_link_an_mode == MLO_AN_FIXED) 2437 poll |= pl->config->poll_fixed_state; 2438 2439 if (poll) 2440 mod_timer(&pl->link_poll, jiffies + HZ); 2441 if (pl->phydev) 2442 phy_start(pl->phydev); 2443 if (pl->sfp_bus) 2444 sfp_upstream_start(pl->sfp_bus); 2445 } 2446 EXPORT_SYMBOL_GPL(phylink_start); 2447 2448 /** 2449 * phylink_stop() - stop a phylink instance 2450 * @pl: a pointer to a &struct phylink returned from phylink_create() 2451 * 2452 * Stop the phylink instance specified by @pl. This should be called from the 2453 * network device driver's &struct net_device_ops ndo_stop() method. The 2454 * network device's carrier state should not be changed prior to calling this 2455 * function. 2456 * 2457 * This will synchronously bring down the link if the link is not already 2458 * down (in other words, it will trigger a mac_link_down() method call.) 2459 */ 2460 void phylink_stop(struct phylink *pl) 2461 { 2462 ASSERT_RTNL(); 2463 2464 if (pl->sfp_bus) 2465 sfp_upstream_stop(pl->sfp_bus); 2466 if (pl->phydev) 2467 phy_stop(pl->phydev); 2468 timer_delete_sync(&pl->link_poll); 2469 if (pl->link_irq) { 2470 free_irq(pl->link_irq, pl); 2471 pl->link_irq = 0; 2472 } 2473 2474 phylink_run_resolve_and_disable(pl, PHYLINK_DISABLE_STOPPED); 2475 2476 pl->pcs_state = PCS_STATE_DOWN; 2477 2478 phylink_pcs_disable(pl->pcs); 2479 } 2480 EXPORT_SYMBOL_GPL(phylink_stop); 2481 2482 /** 2483 * phylink_rx_clk_stop_block() - block PHY ability to stop receive clock in LPI 2484 * @pl: a pointer to a &struct phylink returned from phylink_create() 2485 * 2486 * Disable the PHY's ability to stop the receive clock while the receive path 2487 * is in EEE LPI state, until the number of calls to phylink_rx_clk_stop_block() 2488 * are balanced by calls to phylink_rx_clk_stop_unblock(). 2489 */ 2490 void phylink_rx_clk_stop_block(struct phylink *pl) 2491 { 2492 ASSERT_RTNL(); 2493 2494 if (pl->mac_rx_clk_stop_blocked == U8_MAX) { 2495 phylink_warn(pl, "%s called too many times - ignoring\n", 2496 __func__); 2497 dump_stack(); 2498 return; 2499 } 2500 2501 /* Disable PHY receive clock stop if this is the first time this 2502 * function has been called and clock-stop was previously enabled. 2503 */ 2504 if (pl->mac_rx_clk_stop_blocked++ == 0 && 2505 pl->mac_supports_eee_ops && pl->phydev && 2506 pl->config->eee_rx_clk_stop_enable) 2507 phy_eee_rx_clock_stop(pl->phydev, false); 2508 } 2509 EXPORT_SYMBOL_GPL(phylink_rx_clk_stop_block); 2510 2511 /** 2512 * phylink_rx_clk_stop_unblock() - unblock PHY ability to stop receive clock 2513 * @pl: a pointer to a &struct phylink returned from phylink_create() 2514 * 2515 * All calls to phylink_rx_clk_stop_block() must be balanced with a 2516 * corresponding call to phylink_rx_clk_stop_unblock() to restore the PHYs 2517 * ability to stop the receive clock when the receive path is in EEE LPI mode. 2518 */ 2519 void phylink_rx_clk_stop_unblock(struct phylink *pl) 2520 { 2521 ASSERT_RTNL(); 2522 2523 if (pl->mac_rx_clk_stop_blocked == 0) { 2524 phylink_warn(pl, "%s called too many times - ignoring\n", 2525 __func__); 2526 dump_stack(); 2527 return; 2528 } 2529 2530 /* Re-enable PHY receive clock stop if the number of unblocks matches 2531 * the number of calls to the block function above. 2532 */ 2533 if (--pl->mac_rx_clk_stop_blocked == 0 && 2534 pl->mac_supports_eee_ops && pl->phydev && 2535 pl->config->eee_rx_clk_stop_enable) 2536 phy_eee_rx_clock_stop(pl->phydev, true); 2537 } 2538 EXPORT_SYMBOL_GPL(phylink_rx_clk_stop_unblock); 2539 2540 /** 2541 * phylink_suspend() - handle a network device suspend event 2542 * @pl: a pointer to a &struct phylink returned from phylink_create() 2543 * @mac_wol: true if the MAC needs to receive packets for Wake-on-Lan 2544 * 2545 * Handle a network device suspend event. There are several cases: 2546 * 2547 * - If Wake-on-Lan is not active, we can bring down the link between 2548 * the MAC and PHY by calling phylink_stop(). 2549 * - If Wake-on-Lan is active, and being handled only by the PHY, we 2550 * can also bring down the link between the MAC and PHY. 2551 * - If Wake-on-Lan is active, but being handled by the MAC, the MAC 2552 * still needs to receive packets, so we can not bring the link down. 2553 */ 2554 void phylink_suspend(struct phylink *pl, bool mac_wol) 2555 { 2556 ASSERT_RTNL(); 2557 2558 if (mac_wol && (!pl->netdev || pl->netdev->ethtool->wol_enabled)) { 2559 /* Wake-on-Lan enabled, MAC handling */ 2560 mutex_lock(&pl->state_mutex); 2561 2562 /* Stop the resolver bringing the link up */ 2563 __set_bit(PHYLINK_DISABLE_MAC_WOL, &pl->phylink_disable_state); 2564 2565 pl->suspend_link_up = phylink_link_is_up(pl); 2566 if (pl->suspend_link_up) { 2567 /* Disable the carrier, to prevent transmit timeouts, 2568 * but one would hope all packets have been sent. This 2569 * also means phylink_resolve() will do nothing. 2570 */ 2571 if (pl->netdev) 2572 netif_carrier_off(pl->netdev); 2573 pl->old_link_state = false; 2574 } 2575 2576 /* We do not call mac_link_down() here as we want the 2577 * link to remain up to receive the WoL packets. 2578 */ 2579 mutex_unlock(&pl->state_mutex); 2580 } else { 2581 phylink_stop(pl); 2582 } 2583 } 2584 EXPORT_SYMBOL_GPL(phylink_suspend); 2585 2586 /** 2587 * phylink_prepare_resume() - prepare to resume a network device 2588 * @pl: a pointer to a &struct phylink returned from phylink_create() 2589 * 2590 * Optional, but if called must be called prior to phylink_resume(). 2591 * 2592 * Prepare to resume a network device, preparing the PHY as necessary. 2593 */ 2594 void phylink_prepare_resume(struct phylink *pl) 2595 { 2596 struct phy_device *phydev = pl->phydev; 2597 2598 ASSERT_RTNL(); 2599 2600 /* IEEE 802.3 22.2.4.1.5 allows PHYs to stop their receive clock 2601 * when PDOWN is set. However, some MACs require RXC to be running 2602 * in order to resume. If the MAC requires RXC, and we have a PHY, 2603 * then resume the PHY. Note that 802.3 allows PHYs 500ms before 2604 * the clock meets requirements. We do not implement this delay. 2605 */ 2606 if (pl->config->mac_requires_rxc && phydev && phydev->suspended) 2607 phy_resume(phydev); 2608 } 2609 EXPORT_SYMBOL_GPL(phylink_prepare_resume); 2610 2611 /** 2612 * phylink_resume() - handle a network device resume event 2613 * @pl: a pointer to a &struct phylink returned from phylink_create() 2614 * 2615 * Undo the effects of phylink_suspend(), returning the link to an 2616 * operational state. 2617 */ 2618 void phylink_resume(struct phylink *pl) 2619 { 2620 ASSERT_RTNL(); 2621 2622 if (test_bit(PHYLINK_DISABLE_MAC_WOL, &pl->phylink_disable_state)) { 2623 /* Wake-on-Lan enabled, MAC handling */ 2624 2625 if (pl->suspend_link_up) { 2626 /* Call mac_link_down() so we keep the overall state 2627 * balanced. Do this under the state_mutex lock for 2628 * consistency. This will cause a "Link Down" message 2629 * to be printed during resume, which is harmless - 2630 * the true link state will be printed when we run a 2631 * resolve. 2632 */ 2633 mutex_lock(&pl->state_mutex); 2634 phylink_link_down(pl); 2635 mutex_unlock(&pl->state_mutex); 2636 } 2637 2638 /* Re-apply the link parameters so that all the settings get 2639 * restored to the MAC. 2640 */ 2641 phylink_mac_initial_config(pl, true); 2642 2643 /* Re-enable and re-resolve the link parameters */ 2644 phylink_enable_and_run_resolve(pl, PHYLINK_DISABLE_MAC_WOL); 2645 } else { 2646 phylink_start(pl); 2647 } 2648 } 2649 EXPORT_SYMBOL_GPL(phylink_resume); 2650 2651 /** 2652 * phylink_ethtool_get_wol() - get the wake on lan parameters for the PHY 2653 * @pl: a pointer to a &struct phylink returned from phylink_create() 2654 * @wol: a pointer to &struct ethtool_wolinfo to hold the read parameters 2655 * 2656 * Read the wake on lan parameters from the PHY attached to the phylink 2657 * instance specified by @pl. If no PHY is currently attached, report no 2658 * support for wake on lan. 2659 */ 2660 void phylink_ethtool_get_wol(struct phylink *pl, struct ethtool_wolinfo *wol) 2661 { 2662 ASSERT_RTNL(); 2663 2664 wol->supported = 0; 2665 wol->wolopts = 0; 2666 2667 if (pl->phydev) 2668 phy_ethtool_get_wol(pl->phydev, wol); 2669 } 2670 EXPORT_SYMBOL_GPL(phylink_ethtool_get_wol); 2671 2672 /** 2673 * phylink_ethtool_set_wol() - set wake on lan parameters 2674 * @pl: a pointer to a &struct phylink returned from phylink_create() 2675 * @wol: a pointer to &struct ethtool_wolinfo for the desired parameters 2676 * 2677 * Set the wake on lan parameters for the PHY attached to the phylink 2678 * instance specified by @pl. If no PHY is attached, returns %EOPNOTSUPP 2679 * error. 2680 * 2681 * Returns zero on success or negative errno code. 2682 */ 2683 int phylink_ethtool_set_wol(struct phylink *pl, struct ethtool_wolinfo *wol) 2684 { 2685 int ret = -EOPNOTSUPP; 2686 2687 ASSERT_RTNL(); 2688 2689 if (pl->phydev) 2690 ret = phy_ethtool_set_wol(pl->phydev, wol); 2691 2692 return ret; 2693 } 2694 EXPORT_SYMBOL_GPL(phylink_ethtool_set_wol); 2695 2696 static phy_interface_t phylink_sfp_select_interface(struct phylink *pl, 2697 const unsigned long *link_modes) 2698 { 2699 phy_interface_t interface; 2700 2701 interface = sfp_select_interface(pl->sfp_bus, link_modes); 2702 if (interface == PHY_INTERFACE_MODE_NA) { 2703 phylink_err(pl, 2704 "selection of interface failed, advertisement %*pb\n", 2705 __ETHTOOL_LINK_MODE_MASK_NBITS, 2706 link_modes); 2707 return interface; 2708 } 2709 2710 if (!test_bit(interface, pl->config->supported_interfaces)) { 2711 phylink_err(pl, 2712 "selection of interface failed, SFP selected %s (%u) but MAC supports %*pbl\n", 2713 phy_modes(interface), interface, 2714 (int)PHY_INTERFACE_MODE_MAX, 2715 pl->config->supported_interfaces); 2716 return PHY_INTERFACE_MODE_NA; 2717 } 2718 2719 return interface; 2720 } 2721 2722 static phy_interface_t phylink_sfp_select_interface_speed(struct phylink *pl, 2723 u32 speed) 2724 { 2725 phy_interface_t best_interface = PHY_INTERFACE_MODE_NA; 2726 phy_interface_t interface; 2727 u32 max_speed; 2728 int i; 2729 2730 for (i = 0; i < ARRAY_SIZE(phylink_sfp_interface_preference); i++) { 2731 interface = phylink_sfp_interface_preference[i]; 2732 if (!test_bit(interface, pl->sfp_interfaces)) 2733 continue; 2734 2735 max_speed = phylink_interface_max_speed(interface); 2736 2737 /* The logic here is: if speed == max_speed, then we've found 2738 * the best interface. Otherwise we find the interface that 2739 * can just support the requested speed. 2740 */ 2741 if (max_speed >= speed) 2742 best_interface = interface; 2743 2744 if (max_speed <= speed) 2745 break; 2746 } 2747 2748 if (best_interface == PHY_INTERFACE_MODE_NA) 2749 phylink_err(pl, "selection of interface failed, speed %u\n", 2750 speed); 2751 2752 return best_interface; 2753 } 2754 2755 static void phylink_merge_link_mode(unsigned long *dst, const unsigned long *b) 2756 { 2757 __ETHTOOL_DECLARE_LINK_MODE_MASK(mask); 2758 2759 linkmode_zero(mask); 2760 phylink_set_port_modes(mask); 2761 2762 linkmode_and(dst, dst, mask); 2763 linkmode_or(dst, dst, b); 2764 } 2765 2766 static void phylink_get_ksettings(const struct phylink_link_state *state, 2767 struct ethtool_link_ksettings *kset) 2768 { 2769 phylink_merge_link_mode(kset->link_modes.advertising, state->advertising); 2770 linkmode_copy(kset->link_modes.lp_advertising, state->lp_advertising); 2771 if (kset->base.rate_matching == RATE_MATCH_NONE) { 2772 kset->base.speed = state->speed; 2773 kset->base.duplex = state->duplex; 2774 } 2775 kset->base.autoneg = linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, 2776 state->advertising) ? 2777 AUTONEG_ENABLE : AUTONEG_DISABLE; 2778 } 2779 2780 /** 2781 * phylink_ethtool_ksettings_get() - get the current link settings 2782 * @pl: a pointer to a &struct phylink returned from phylink_create() 2783 * @kset: a pointer to a &struct ethtool_link_ksettings to hold link settings 2784 * 2785 * Read the current link settings for the phylink instance specified by @pl. 2786 * This will be the link settings read from the MAC, PHY or fixed link 2787 * settings depending on the current negotiation mode. 2788 */ 2789 int phylink_ethtool_ksettings_get(struct phylink *pl, 2790 struct ethtool_link_ksettings *kset) 2791 { 2792 struct phylink_link_state link_state; 2793 2794 ASSERT_RTNL(); 2795 2796 if (pl->phydev) 2797 phy_ethtool_ksettings_get(pl->phydev, kset); 2798 else 2799 kset->base.port = pl->link_port; 2800 2801 linkmode_copy(kset->link_modes.supported, pl->supported); 2802 2803 switch (pl->act_link_an_mode) { 2804 case MLO_AN_FIXED: 2805 /* We are using fixed settings. Report these as the 2806 * current link settings - and note that these also 2807 * represent the supported speeds/duplex/pause modes. 2808 */ 2809 phylink_get_fixed_state(pl, &link_state); 2810 phylink_get_ksettings(&link_state, kset); 2811 break; 2812 2813 case MLO_AN_INBAND: 2814 /* If there is a phy attached, then use the reported 2815 * settings from the phy with no modification. 2816 */ 2817 if (pl->phydev) 2818 break; 2819 2820 phylink_mac_pcs_get_state(pl, &link_state); 2821 2822 /* The MAC is reporting the link results from its own PCS 2823 * layer via in-band status. Report these as the current 2824 * link settings. 2825 */ 2826 phylink_get_ksettings(&link_state, kset); 2827 break; 2828 } 2829 2830 return 0; 2831 } 2832 EXPORT_SYMBOL_GPL(phylink_ethtool_ksettings_get); 2833 2834 static bool phylink_validate_pcs_inband_autoneg(struct phylink *pl, 2835 phy_interface_t interface, 2836 unsigned long *adv) 2837 { 2838 unsigned int inband = phylink_inband_caps(pl, interface); 2839 unsigned int mask; 2840 2841 /* If the PCS doesn't implement inband support, be permissive. */ 2842 if (!inband) 2843 return true; 2844 2845 if (linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, adv)) 2846 mask = LINK_INBAND_ENABLE; 2847 else 2848 mask = LINK_INBAND_DISABLE; 2849 2850 /* Check whether the PCS implements the required mode */ 2851 return !!(inband & mask); 2852 } 2853 2854 /** 2855 * phylink_ethtool_ksettings_set() - set the link settings 2856 * @pl: a pointer to a &struct phylink returned from phylink_create() 2857 * @kset: a pointer to a &struct ethtool_link_ksettings for the desired modes 2858 */ 2859 int phylink_ethtool_ksettings_set(struct phylink *pl, 2860 const struct ethtool_link_ksettings *kset) 2861 { 2862 __ETHTOOL_DECLARE_LINK_MODE_MASK(support); 2863 const struct link_capabilities *c; 2864 struct phylink_link_state config; 2865 2866 ASSERT_RTNL(); 2867 2868 if (pl->phydev) { 2869 struct ethtool_link_ksettings phy_kset = *kset; 2870 2871 linkmode_and(phy_kset.link_modes.advertising, 2872 phy_kset.link_modes.advertising, 2873 pl->supported); 2874 2875 /* We can rely on phylib for this update; we also do not need 2876 * to update the pl->link_config settings: 2877 * - the configuration returned via ksettings_get() will come 2878 * from phylib whenever a PHY is present. 2879 * - link_config.interface will be updated by the PHY calling 2880 * back via phylink_phy_change() and a subsequent resolve. 2881 * - initial link configuration for PHY mode comes from the 2882 * last phy state updated via phylink_phy_change(). 2883 * - other configuration changes (e.g. pause modes) are 2884 * performed directly via phylib. 2885 * - if in in-band mode with a PHY, the link configuration 2886 * is passed on the link from the PHY, and all of 2887 * link_config.{speed,duplex,an_enabled,pause} are not used. 2888 * - the only possible use would be link_config.advertising 2889 * pause modes when in 1000base-X mode with a PHY, but in 2890 * the presence of a PHY, this should not be changed as that 2891 * should be determined from the media side advertisement. 2892 */ 2893 return phy_ethtool_ksettings_set(pl->phydev, &phy_kset); 2894 } 2895 2896 config = pl->link_config; 2897 /* Mask out unsupported advertisements */ 2898 linkmode_and(config.advertising, kset->link_modes.advertising, 2899 pl->supported); 2900 2901 /* FIXME: should we reject autoneg if phy/mac does not support it? */ 2902 switch (kset->base.autoneg) { 2903 case AUTONEG_DISABLE: 2904 /* Autonegotiation disabled, select a suitable speed and 2905 * duplex. 2906 */ 2907 c = phy_caps_lookup(kset->base.speed, kset->base.duplex, 2908 pl->supported, false); 2909 if (!c) 2910 return -EINVAL; 2911 2912 /* If we have a fixed link, refuse to change link parameters. 2913 * If the link parameters match, accept them but do nothing. 2914 */ 2915 if (pl->req_link_an_mode == MLO_AN_FIXED) { 2916 if (c->speed != pl->link_config.speed || 2917 c->duplex != pl->link_config.duplex) 2918 return -EINVAL; 2919 return 0; 2920 } 2921 2922 config.speed = c->speed; 2923 config.duplex = c->duplex; 2924 break; 2925 2926 case AUTONEG_ENABLE: 2927 /* If we have a fixed link, allow autonegotiation (since that 2928 * is our default case) but do not allow the advertisement to 2929 * be changed. If the advertisement matches, simply return. 2930 */ 2931 if (pl->req_link_an_mode == MLO_AN_FIXED) { 2932 if (!linkmode_equal(config.advertising, 2933 pl->link_config.advertising)) 2934 return -EINVAL; 2935 return 0; 2936 } 2937 2938 config.speed = SPEED_UNKNOWN; 2939 config.duplex = DUPLEX_UNKNOWN; 2940 break; 2941 2942 default: 2943 return -EINVAL; 2944 } 2945 2946 /* We have ruled out the case with a PHY attached, and the 2947 * fixed-link cases. All that is left are in-band links. 2948 */ 2949 linkmode_mod_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, config.advertising, 2950 kset->base.autoneg == AUTONEG_ENABLE); 2951 2952 /* If this link is with an SFP, ensure that changes to advertised modes 2953 * also cause the associated interface to be selected such that the 2954 * link can be configured correctly. 2955 */ 2956 if (pl->sfp_bus) { 2957 if (kset->base.autoneg == AUTONEG_ENABLE) 2958 config.interface = 2959 phylink_sfp_select_interface(pl, 2960 config.advertising); 2961 else 2962 config.interface = 2963 phylink_sfp_select_interface_speed(pl, 2964 config.speed); 2965 if (config.interface == PHY_INTERFACE_MODE_NA) 2966 return -EINVAL; 2967 2968 /* Revalidate with the selected interface */ 2969 linkmode_copy(support, pl->supported); 2970 if (phylink_validate(pl, support, &config)) { 2971 phylink_err(pl, "validation of %s/%s with support %*pb failed\n", 2972 phylink_an_mode_str(pl->req_link_an_mode), 2973 phy_modes(config.interface), 2974 __ETHTOOL_LINK_MODE_MASK_NBITS, support); 2975 return -EINVAL; 2976 } 2977 } else { 2978 /* Validate without changing the current supported mask. */ 2979 linkmode_copy(support, pl->supported); 2980 if (phylink_validate(pl, support, &config)) 2981 return -EINVAL; 2982 } 2983 2984 /* If autonegotiation is enabled, we must have an advertisement */ 2985 if (linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, 2986 config.advertising) && 2987 phylink_is_empty_linkmode(config.advertising)) 2988 return -EINVAL; 2989 2990 /* Validate the autonegotiation state. We don't have a PHY in this 2991 * situation, so the PCS is the media-facing entity. 2992 */ 2993 if (!phylink_validate_pcs_inband_autoneg(pl, config.interface, 2994 config.advertising)) 2995 return -EINVAL; 2996 2997 mutex_lock(&pl->state_mutex); 2998 pl->link_config.speed = config.speed; 2999 pl->link_config.duplex = config.duplex; 3000 3001 if (pl->link_config.interface != config.interface) { 3002 /* The interface changed, e.g. 1000base-X <-> 2500base-X */ 3003 /* We need to force the link down, then change the interface */ 3004 if (pl->old_link_state) { 3005 phylink_link_down(pl); 3006 pl->old_link_state = false; 3007 } 3008 if (!test_bit(PHYLINK_DISABLE_STOPPED, 3009 &pl->phylink_disable_state)) 3010 phylink_major_config(pl, false, &config); 3011 pl->link_config.interface = config.interface; 3012 linkmode_copy(pl->link_config.advertising, config.advertising); 3013 } else if (!linkmode_equal(pl->link_config.advertising, 3014 config.advertising)) { 3015 linkmode_copy(pl->link_config.advertising, config.advertising); 3016 phylink_change_inband_advert(pl); 3017 } 3018 mutex_unlock(&pl->state_mutex); 3019 3020 return 0; 3021 } 3022 EXPORT_SYMBOL_GPL(phylink_ethtool_ksettings_set); 3023 3024 /** 3025 * phylink_ethtool_nway_reset() - restart negotiation 3026 * @pl: a pointer to a &struct phylink returned from phylink_create() 3027 * 3028 * Restart negotiation for the phylink instance specified by @pl. This will 3029 * cause any attached phy to restart negotiation with the link partner, and 3030 * if the MAC is in a BaseX mode, the MAC will also be requested to restart 3031 * negotiation. 3032 * 3033 * Returns zero on success, or negative error code. 3034 */ 3035 int phylink_ethtool_nway_reset(struct phylink *pl) 3036 { 3037 int ret = 0; 3038 3039 ASSERT_RTNL(); 3040 3041 if (pl->phydev) 3042 ret = phy_restart_aneg(pl->phydev); 3043 phylink_pcs_an_restart(pl); 3044 3045 return ret; 3046 } 3047 EXPORT_SYMBOL_GPL(phylink_ethtool_nway_reset); 3048 3049 /** 3050 * phylink_ethtool_get_pauseparam() - get the current pause parameters 3051 * @pl: a pointer to a &struct phylink returned from phylink_create() 3052 * @pause: a pointer to a &struct ethtool_pauseparam 3053 */ 3054 void phylink_ethtool_get_pauseparam(struct phylink *pl, 3055 struct ethtool_pauseparam *pause) 3056 { 3057 ASSERT_RTNL(); 3058 3059 pause->autoneg = !!(pl->link_config.pause & MLO_PAUSE_AN); 3060 pause->rx_pause = !!(pl->link_config.pause & MLO_PAUSE_RX); 3061 pause->tx_pause = !!(pl->link_config.pause & MLO_PAUSE_TX); 3062 } 3063 EXPORT_SYMBOL_GPL(phylink_ethtool_get_pauseparam); 3064 3065 /** 3066 * phylink_ethtool_set_pauseparam() - set the current pause parameters 3067 * @pl: a pointer to a &struct phylink returned from phylink_create() 3068 * @pause: a pointer to a &struct ethtool_pauseparam 3069 */ 3070 int phylink_ethtool_set_pauseparam(struct phylink *pl, 3071 struct ethtool_pauseparam *pause) 3072 { 3073 struct phylink_link_state *config = &pl->link_config; 3074 bool manual_changed; 3075 int pause_state; 3076 3077 ASSERT_RTNL(); 3078 3079 if (pl->req_link_an_mode == MLO_AN_FIXED) 3080 return -EOPNOTSUPP; 3081 3082 if (!phylink_test(pl->supported, Pause) && 3083 !phylink_test(pl->supported, Asym_Pause)) 3084 return -EOPNOTSUPP; 3085 3086 if (!phylink_test(pl->supported, Asym_Pause) && 3087 pause->rx_pause != pause->tx_pause) 3088 return -EINVAL; 3089 3090 pause_state = 0; 3091 if (pause->autoneg) 3092 pause_state |= MLO_PAUSE_AN; 3093 if (pause->rx_pause) 3094 pause_state |= MLO_PAUSE_RX; 3095 if (pause->tx_pause) 3096 pause_state |= MLO_PAUSE_TX; 3097 3098 mutex_lock(&pl->state_mutex); 3099 /* 3100 * See the comments for linkmode_set_pause(), wrt the deficiencies 3101 * with the current implementation. A solution to this issue would 3102 * be: 3103 * ethtool Local device 3104 * rx tx Pause AsymDir 3105 * 0 0 0 0 3106 * 1 0 1 1 3107 * 0 1 0 1 3108 * 1 1 1 1 3109 * and then use the ethtool rx/tx enablement status to mask the 3110 * rx/tx pause resolution. 3111 */ 3112 linkmode_set_pause(config->advertising, pause->tx_pause, 3113 pause->rx_pause); 3114 3115 manual_changed = (config->pause ^ pause_state) & MLO_PAUSE_AN || 3116 (!(pause_state & MLO_PAUSE_AN) && 3117 (config->pause ^ pause_state) & MLO_PAUSE_TXRX_MASK); 3118 3119 config->pause = pause_state; 3120 3121 /* Update our in-band advertisement, triggering a renegotiation if 3122 * the advertisement changed. 3123 */ 3124 if (!pl->phydev) 3125 phylink_change_inband_advert(pl); 3126 3127 mutex_unlock(&pl->state_mutex); 3128 3129 /* If we have a PHY, a change of the pause frame advertisement will 3130 * cause phylib to renegotiate (if AN is enabled) which will in turn 3131 * call our phylink_phy_change() and trigger a resolve. Note that 3132 * we can't hold our state mutex while calling phy_set_asym_pause(). 3133 */ 3134 if (pl->phydev) 3135 phy_set_asym_pause(pl->phydev, pause->rx_pause, 3136 pause->tx_pause); 3137 3138 /* If the manual pause settings changed, make sure we trigger a 3139 * resolve to update their state; we can not guarantee that the 3140 * link will cycle. 3141 */ 3142 if (manual_changed) { 3143 pl->link_failed = true; 3144 phylink_run_resolve(pl); 3145 } 3146 3147 return 0; 3148 } 3149 EXPORT_SYMBOL_GPL(phylink_ethtool_set_pauseparam); 3150 3151 /** 3152 * phylink_get_eee_err() - read the energy efficient ethernet error 3153 * counter 3154 * @pl: a pointer to a &struct phylink returned from phylink_create(). 3155 * 3156 * Read the Energy Efficient Ethernet error counter from the PHY associated 3157 * with the phylink instance specified by @pl. 3158 * 3159 * Returns positive error counter value, or negative error code. 3160 */ 3161 int phylink_get_eee_err(struct phylink *pl) 3162 { 3163 int ret = 0; 3164 3165 ASSERT_RTNL(); 3166 3167 if (pl->phydev) 3168 ret = phy_get_eee_err(pl->phydev); 3169 3170 return ret; 3171 } 3172 EXPORT_SYMBOL_GPL(phylink_get_eee_err); 3173 3174 /** 3175 * phylink_ethtool_get_eee() - read the energy efficient ethernet parameters 3176 * @pl: a pointer to a &struct phylink returned from phylink_create() 3177 * @eee: a pointer to a &struct ethtool_keee for the read parameters 3178 */ 3179 int phylink_ethtool_get_eee(struct phylink *pl, struct ethtool_keee *eee) 3180 { 3181 int ret = -EOPNOTSUPP; 3182 3183 ASSERT_RTNL(); 3184 3185 if (pl->mac_supports_eee_ops && !pl->mac_supports_eee) 3186 return ret; 3187 3188 if (pl->phydev) { 3189 ret = phy_ethtool_get_eee(pl->phydev, eee); 3190 /* Restrict supported linkmode mask */ 3191 if (ret == 0 && pl->mac_supports_eee_ops) 3192 linkmode_and(eee->supported, eee->supported, 3193 pl->supported_lpi); 3194 } 3195 3196 return ret; 3197 } 3198 EXPORT_SYMBOL_GPL(phylink_ethtool_get_eee); 3199 3200 /** 3201 * phylink_ethtool_set_eee() - set the energy efficient ethernet parameters 3202 * @pl: a pointer to a &struct phylink returned from phylink_create() 3203 * @eee: a pointer to a &struct ethtool_keee for the desired parameters 3204 */ 3205 int phylink_ethtool_set_eee(struct phylink *pl, struct ethtool_keee *eee) 3206 { 3207 bool mac_eee = pl->mac_supports_eee; 3208 int ret = -EOPNOTSUPP; 3209 3210 ASSERT_RTNL(); 3211 3212 phylink_dbg(pl, "mac %s phylink EEE%s, adv %*pbl, LPI%s timer %uus\n", 3213 mac_eee ? "supports" : "does not support", 3214 eee->eee_enabled ? ", enabled" : "", 3215 __ETHTOOL_LINK_MODE_MASK_NBITS, eee->advertised, 3216 eee->tx_lpi_enabled ? " enabled" : "", eee->tx_lpi_timer); 3217 3218 if (pl->mac_supports_eee_ops && !mac_eee) 3219 return ret; 3220 3221 if (pl->phydev) { 3222 /* Restrict advertisement mask */ 3223 if (pl->mac_supports_eee_ops) 3224 linkmode_and(eee->advertised, eee->advertised, 3225 pl->supported_lpi); 3226 ret = phy_ethtool_set_eee(pl->phydev, eee); 3227 if (ret == 0) 3228 eee_to_eeecfg(&pl->eee_cfg, eee); 3229 } 3230 3231 return ret; 3232 } 3233 EXPORT_SYMBOL_GPL(phylink_ethtool_set_eee); 3234 3235 /* This emulates MII registers for a fixed-mode phy operating as per the 3236 * passed in state. "aneg" defines if we report negotiation is possible. 3237 * 3238 * FIXME: should deal with negotiation state too. 3239 */ 3240 static int phylink_mii_emul_read(unsigned int reg, 3241 struct phylink_link_state *state) 3242 { 3243 struct fixed_phy_status fs; 3244 unsigned long *lpa = state->lp_advertising; 3245 int val; 3246 3247 fs.link = state->link; 3248 fs.speed = state->speed; 3249 fs.duplex = state->duplex; 3250 fs.pause = test_bit(ETHTOOL_LINK_MODE_Pause_BIT, lpa); 3251 fs.asym_pause = test_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, lpa); 3252 3253 val = swphy_read_reg(reg, &fs); 3254 if (reg == MII_BMSR) { 3255 if (!state->an_complete) 3256 val &= ~BMSR_ANEGCOMPLETE; 3257 } 3258 return val; 3259 } 3260 3261 static int phylink_phy_read(struct phylink *pl, unsigned int phy_id, 3262 unsigned int reg) 3263 { 3264 struct phy_device *phydev = pl->phydev; 3265 int prtad, devad; 3266 3267 if (mdio_phy_id_is_c45(phy_id)) { 3268 prtad = mdio_phy_id_prtad(phy_id); 3269 devad = mdio_phy_id_devad(phy_id); 3270 return mdiobus_c45_read(pl->phydev->mdio.bus, prtad, devad, 3271 reg); 3272 } 3273 3274 if (phydev->is_c45) { 3275 switch (reg) { 3276 case MII_BMCR: 3277 case MII_BMSR: 3278 case MII_PHYSID1: 3279 case MII_PHYSID2: 3280 devad = __ffs(phydev->c45_ids.mmds_present); 3281 break; 3282 case MII_ADVERTISE: 3283 case MII_LPA: 3284 if (!(phydev->c45_ids.mmds_present & MDIO_DEVS_AN)) 3285 return -EINVAL; 3286 devad = MDIO_MMD_AN; 3287 if (reg == MII_ADVERTISE) 3288 reg = MDIO_AN_ADVERTISE; 3289 else 3290 reg = MDIO_AN_LPA; 3291 break; 3292 default: 3293 return -EINVAL; 3294 } 3295 prtad = phy_id; 3296 return mdiobus_c45_read(pl->phydev->mdio.bus, prtad, devad, 3297 reg); 3298 } 3299 3300 return mdiobus_read(pl->phydev->mdio.bus, phy_id, reg); 3301 } 3302 3303 static int phylink_phy_write(struct phylink *pl, unsigned int phy_id, 3304 unsigned int reg, unsigned int val) 3305 { 3306 struct phy_device *phydev = pl->phydev; 3307 int prtad, devad; 3308 3309 if (mdio_phy_id_is_c45(phy_id)) { 3310 prtad = mdio_phy_id_prtad(phy_id); 3311 devad = mdio_phy_id_devad(phy_id); 3312 return mdiobus_c45_write(pl->phydev->mdio.bus, prtad, devad, 3313 reg, val); 3314 } 3315 3316 if (phydev->is_c45) { 3317 switch (reg) { 3318 case MII_BMCR: 3319 case MII_BMSR: 3320 case MII_PHYSID1: 3321 case MII_PHYSID2: 3322 devad = __ffs(phydev->c45_ids.mmds_present); 3323 break; 3324 case MII_ADVERTISE: 3325 case MII_LPA: 3326 if (!(phydev->c45_ids.mmds_present & MDIO_DEVS_AN)) 3327 return -EINVAL; 3328 devad = MDIO_MMD_AN; 3329 if (reg == MII_ADVERTISE) 3330 reg = MDIO_AN_ADVERTISE; 3331 else 3332 reg = MDIO_AN_LPA; 3333 break; 3334 default: 3335 return -EINVAL; 3336 } 3337 return mdiobus_c45_write(pl->phydev->mdio.bus, phy_id, devad, 3338 reg, val); 3339 } 3340 3341 return mdiobus_write(phydev->mdio.bus, phy_id, reg, val); 3342 } 3343 3344 static int phylink_mii_read(struct phylink *pl, unsigned int phy_id, 3345 unsigned int reg) 3346 { 3347 struct phylink_link_state state; 3348 int val = 0xffff; 3349 3350 switch (pl->act_link_an_mode) { 3351 case MLO_AN_FIXED: 3352 if (phy_id == 0) { 3353 phylink_get_fixed_state(pl, &state); 3354 val = phylink_mii_emul_read(reg, &state); 3355 } 3356 break; 3357 3358 case MLO_AN_PHY: 3359 return -EOPNOTSUPP; 3360 3361 case MLO_AN_INBAND: 3362 if (phy_id == 0) { 3363 phylink_mac_pcs_get_state(pl, &state); 3364 val = phylink_mii_emul_read(reg, &state); 3365 } 3366 break; 3367 } 3368 3369 return val & 0xffff; 3370 } 3371 3372 static int phylink_mii_write(struct phylink *pl, unsigned int phy_id, 3373 unsigned int reg, unsigned int val) 3374 { 3375 switch (pl->act_link_an_mode) { 3376 case MLO_AN_FIXED: 3377 break; 3378 3379 case MLO_AN_PHY: 3380 return -EOPNOTSUPP; 3381 3382 case MLO_AN_INBAND: 3383 break; 3384 } 3385 3386 return 0; 3387 } 3388 3389 /** 3390 * phylink_mii_ioctl() - generic mii ioctl interface 3391 * @pl: a pointer to a &struct phylink returned from phylink_create() 3392 * @ifr: a pointer to a &struct ifreq for socket ioctls 3393 * @cmd: ioctl cmd to execute 3394 * 3395 * Perform the specified MII ioctl on the PHY attached to the phylink instance 3396 * specified by @pl. If no PHY is attached, emulate the presence of the PHY. 3397 * 3398 * Returns: zero on success or negative error code. 3399 * 3400 * %SIOCGMIIPHY: 3401 * read register from the current PHY. 3402 * %SIOCGMIIREG: 3403 * read register from the specified PHY. 3404 * %SIOCSMIIREG: 3405 * set a register on the specified PHY. 3406 */ 3407 int phylink_mii_ioctl(struct phylink *pl, struct ifreq *ifr, int cmd) 3408 { 3409 struct mii_ioctl_data *mii = if_mii(ifr); 3410 int ret; 3411 3412 ASSERT_RTNL(); 3413 3414 if (pl->phydev) { 3415 /* PHYs only exist for MLO_AN_PHY and SGMII */ 3416 switch (cmd) { 3417 case SIOCGMIIPHY: 3418 mii->phy_id = pl->phydev->mdio.addr; 3419 fallthrough; 3420 3421 case SIOCGMIIREG: 3422 ret = phylink_phy_read(pl, mii->phy_id, mii->reg_num); 3423 if (ret >= 0) { 3424 mii->val_out = ret; 3425 ret = 0; 3426 } 3427 break; 3428 3429 case SIOCSMIIREG: 3430 ret = phylink_phy_write(pl, mii->phy_id, mii->reg_num, 3431 mii->val_in); 3432 break; 3433 3434 default: 3435 ret = phy_mii_ioctl(pl->phydev, ifr, cmd); 3436 break; 3437 } 3438 } else { 3439 switch (cmd) { 3440 case SIOCGMIIPHY: 3441 mii->phy_id = 0; 3442 fallthrough; 3443 3444 case SIOCGMIIREG: 3445 ret = phylink_mii_read(pl, mii->phy_id, mii->reg_num); 3446 if (ret >= 0) { 3447 mii->val_out = ret; 3448 ret = 0; 3449 } 3450 break; 3451 3452 case SIOCSMIIREG: 3453 ret = phylink_mii_write(pl, mii->phy_id, mii->reg_num, 3454 mii->val_in); 3455 break; 3456 3457 default: 3458 ret = -EOPNOTSUPP; 3459 break; 3460 } 3461 } 3462 3463 return ret; 3464 } 3465 EXPORT_SYMBOL_GPL(phylink_mii_ioctl); 3466 3467 /** 3468 * phylink_speed_down() - set the non-SFP PHY to lowest speed supported by both 3469 * link partners 3470 * @pl: a pointer to a &struct phylink returned from phylink_create() 3471 * @sync: perform action synchronously 3472 * 3473 * If we have a PHY that is not part of a SFP module, then set the speed 3474 * as described in the phy_speed_down() function. Please see this function 3475 * for a description of the @sync parameter. 3476 * 3477 * Returns zero if there is no PHY, otherwise as per phy_speed_down(). 3478 */ 3479 int phylink_speed_down(struct phylink *pl, bool sync) 3480 { 3481 int ret = 0; 3482 3483 ASSERT_RTNL(); 3484 3485 if (!pl->sfp_bus && pl->phydev) 3486 ret = phy_speed_down(pl->phydev, sync); 3487 3488 return ret; 3489 } 3490 EXPORT_SYMBOL_GPL(phylink_speed_down); 3491 3492 /** 3493 * phylink_speed_up() - restore the advertised speeds prior to the call to 3494 * phylink_speed_down() 3495 * @pl: a pointer to a &struct phylink returned from phylink_create() 3496 * 3497 * If we have a PHY that is not part of a SFP module, then restore the 3498 * PHY speeds as per phy_speed_up(). 3499 * 3500 * Returns zero if there is no PHY, otherwise as per phy_speed_up(). 3501 */ 3502 int phylink_speed_up(struct phylink *pl) 3503 { 3504 int ret = 0; 3505 3506 ASSERT_RTNL(); 3507 3508 if (!pl->sfp_bus && pl->phydev) 3509 ret = phy_speed_up(pl->phydev); 3510 3511 return ret; 3512 } 3513 EXPORT_SYMBOL_GPL(phylink_speed_up); 3514 3515 static void phylink_sfp_attach(void *upstream, struct sfp_bus *bus) 3516 { 3517 struct phylink *pl = upstream; 3518 3519 pl->netdev->sfp_bus = bus; 3520 } 3521 3522 static void phylink_sfp_detach(void *upstream, struct sfp_bus *bus) 3523 { 3524 struct phylink *pl = upstream; 3525 3526 pl->netdev->sfp_bus = NULL; 3527 } 3528 3529 static phy_interface_t phylink_choose_sfp_interface(struct phylink *pl, 3530 const unsigned long *intf) 3531 { 3532 phy_interface_t interface; 3533 size_t i; 3534 3535 interface = PHY_INTERFACE_MODE_NA; 3536 for (i = 0; i < ARRAY_SIZE(phylink_sfp_interface_preference); i++) 3537 if (test_bit(phylink_sfp_interface_preference[i], intf)) { 3538 interface = phylink_sfp_interface_preference[i]; 3539 break; 3540 } 3541 3542 return interface; 3543 } 3544 3545 static void phylink_sfp_set_config(struct phylink *pl, unsigned long *supported, 3546 struct phylink_link_state *state, 3547 bool changed) 3548 { 3549 u8 mode = MLO_AN_INBAND; 3550 3551 phylink_dbg(pl, "requesting link mode %s/%s with support %*pb\n", 3552 phylink_an_mode_str(mode), phy_modes(state->interface), 3553 __ETHTOOL_LINK_MODE_MASK_NBITS, supported); 3554 3555 if (!linkmode_equal(pl->supported, supported)) { 3556 linkmode_copy(pl->supported, supported); 3557 changed = true; 3558 } 3559 3560 if (!linkmode_equal(pl->link_config.advertising, state->advertising)) { 3561 linkmode_copy(pl->link_config.advertising, state->advertising); 3562 changed = true; 3563 } 3564 3565 if (pl->req_link_an_mode != mode || 3566 pl->link_config.interface != state->interface) { 3567 pl->req_link_an_mode = mode; 3568 pl->link_config.interface = state->interface; 3569 3570 changed = true; 3571 3572 phylink_info(pl, "switched to %s/%s link mode\n", 3573 phylink_an_mode_str(mode), 3574 phy_modes(state->interface)); 3575 } 3576 3577 if (changed && !test_bit(PHYLINK_DISABLE_STOPPED, 3578 &pl->phylink_disable_state)) 3579 phylink_mac_initial_config(pl, false); 3580 } 3581 3582 static int phylink_sfp_config_phy(struct phylink *pl, struct phy_device *phy) 3583 { 3584 __ETHTOOL_DECLARE_LINK_MODE_MASK(support); 3585 struct phylink_link_state config; 3586 int ret; 3587 3588 /* We're not using pl->sfp_interfaces, so clear it. */ 3589 phy_interface_zero(pl->sfp_interfaces); 3590 linkmode_copy(support, phy->supported); 3591 3592 memset(&config, 0, sizeof(config)); 3593 linkmode_copy(config.advertising, phy->advertising); 3594 config.interface = PHY_INTERFACE_MODE_NA; 3595 config.speed = SPEED_UNKNOWN; 3596 config.duplex = DUPLEX_UNKNOWN; 3597 config.pause = MLO_PAUSE_AN; 3598 3599 /* Ignore errors if we're expecting a PHY to attach later */ 3600 ret = phylink_validate(pl, support, &config); 3601 if (ret) { 3602 phylink_err(pl, "validation with support %*pb failed: %pe\n", 3603 __ETHTOOL_LINK_MODE_MASK_NBITS, support, 3604 ERR_PTR(ret)); 3605 return ret; 3606 } 3607 3608 config.interface = phylink_sfp_select_interface(pl, config.advertising); 3609 if (config.interface == PHY_INTERFACE_MODE_NA) 3610 return -EINVAL; 3611 3612 /* Attach the PHY so that the PHY is present when we do the major 3613 * configuration step. 3614 */ 3615 ret = phylink_attach_phy(pl, phy, config.interface); 3616 if (ret < 0) 3617 return ret; 3618 3619 /* This will validate the configuration for us. */ 3620 ret = phylink_bringup_phy(pl, phy, config.interface); 3621 if (ret < 0) { 3622 phy_detach(phy); 3623 return ret; 3624 } 3625 3626 pl->link_port = pl->sfp_port; 3627 3628 phylink_sfp_set_config(pl, support, &config, true); 3629 3630 return 0; 3631 } 3632 3633 static int phylink_sfp_config_optical(struct phylink *pl) 3634 { 3635 __ETHTOOL_DECLARE_LINK_MODE_MASK(support); 3636 struct phylink_link_state config; 3637 enum inband_type inband_type; 3638 phy_interface_t interface; 3639 int ret; 3640 3641 phylink_dbg(pl, "optical SFP: interfaces=[mac=%*pbl, sfp=%*pbl]\n", 3642 (int)PHY_INTERFACE_MODE_MAX, 3643 pl->config->supported_interfaces, 3644 (int)PHY_INTERFACE_MODE_MAX, 3645 pl->sfp_interfaces); 3646 3647 /* Find the union of the supported interfaces by the PCS/MAC and 3648 * the SFP module. 3649 */ 3650 phy_interface_and(pl->sfp_interfaces, pl->config->supported_interfaces, 3651 pl->sfp_interfaces); 3652 if (phy_interface_empty(pl->sfp_interfaces)) { 3653 phylink_err(pl, "unsupported SFP module: no common interface modes\n"); 3654 return -EINVAL; 3655 } 3656 3657 memset(&config, 0, sizeof(config)); 3658 linkmode_copy(support, pl->sfp_support); 3659 linkmode_copy(config.advertising, pl->sfp_support); 3660 config.speed = SPEED_UNKNOWN; 3661 config.duplex = DUPLEX_UNKNOWN; 3662 config.pause = MLO_PAUSE_AN; 3663 3664 /* For all the interfaces that are supported, reduce the sfp_support 3665 * mask to only those link modes that can be supported. 3666 */ 3667 ret = phylink_validate_mask(pl, NULL, pl->sfp_support, &config, 3668 pl->sfp_interfaces); 3669 if (ret) { 3670 phylink_err(pl, "unsupported SFP module: validation with support %*pb failed\n", 3671 __ETHTOOL_LINK_MODE_MASK_NBITS, support); 3672 return ret; 3673 } 3674 3675 interface = phylink_choose_sfp_interface(pl, pl->sfp_interfaces); 3676 if (interface == PHY_INTERFACE_MODE_NA) { 3677 phylink_err(pl, "failed to select SFP interface\n"); 3678 return -EINVAL; 3679 } 3680 3681 phylink_dbg(pl, "optical SFP: chosen %s interface\n", 3682 phy_modes(interface)); 3683 3684 inband_type = phylink_get_inband_type(interface); 3685 if (inband_type == INBAND_NONE) { 3686 /* If this is the sole interface, and there is no inband 3687 * support, clear the advertising mask and Autoneg bit in 3688 * the support mask. Otherwise, just clear the Autoneg bit 3689 * in the advertising mask. 3690 */ 3691 if (phy_interface_weight(pl->sfp_interfaces) == 1) { 3692 linkmode_clear_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, 3693 pl->sfp_support); 3694 linkmode_zero(config.advertising); 3695 } else { 3696 linkmode_clear_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, 3697 config.advertising); 3698 } 3699 } 3700 3701 if (!phylink_validate_pcs_inband_autoneg(pl, interface, 3702 config.advertising)) { 3703 phylink_err(pl, "autoneg setting not compatible with PCS"); 3704 return -EINVAL; 3705 } 3706 3707 config.interface = interface; 3708 3709 /* Ignore errors if we're expecting a PHY to attach later */ 3710 ret = phylink_validate(pl, support, &config); 3711 if (ret) { 3712 phylink_err(pl, "validation with support %*pb failed: %pe\n", 3713 __ETHTOOL_LINK_MODE_MASK_NBITS, support, 3714 ERR_PTR(ret)); 3715 return ret; 3716 } 3717 3718 pl->link_port = pl->sfp_port; 3719 3720 phylink_sfp_set_config(pl, pl->sfp_support, &config, false); 3721 3722 return 0; 3723 } 3724 3725 static int phylink_sfp_module_insert(void *upstream, 3726 const struct sfp_eeprom_id *id) 3727 { 3728 struct phylink *pl = upstream; 3729 3730 ASSERT_RTNL(); 3731 3732 linkmode_zero(pl->sfp_support); 3733 phy_interface_zero(pl->sfp_interfaces); 3734 sfp_parse_support(pl->sfp_bus, id, pl->sfp_support, pl->sfp_interfaces); 3735 pl->sfp_port = sfp_parse_port(pl->sfp_bus, id, pl->sfp_support); 3736 3737 /* If this module may have a PHY connecting later, defer until later */ 3738 pl->sfp_may_have_phy = sfp_may_have_phy(pl->sfp_bus, id); 3739 if (pl->sfp_may_have_phy) 3740 return 0; 3741 3742 return phylink_sfp_config_optical(pl); 3743 } 3744 3745 static void phylink_sfp_module_remove(void *upstream) 3746 { 3747 struct phylink *pl = upstream; 3748 3749 phy_interface_zero(pl->sfp_interfaces); 3750 } 3751 3752 static int phylink_sfp_module_start(void *upstream) 3753 { 3754 struct phylink *pl = upstream; 3755 3756 /* If this SFP module has a PHY, start the PHY now. */ 3757 if (pl->phydev) { 3758 phy_start(pl->phydev); 3759 return 0; 3760 } 3761 3762 /* If the module may have a PHY but we didn't detect one we 3763 * need to configure the MAC here. 3764 */ 3765 if (!pl->sfp_may_have_phy) 3766 return 0; 3767 3768 return phylink_sfp_config_optical(pl); 3769 } 3770 3771 static void phylink_sfp_module_stop(void *upstream) 3772 { 3773 struct phylink *pl = upstream; 3774 3775 /* If this SFP module has a PHY, stop it. */ 3776 if (pl->phydev) 3777 phy_stop(pl->phydev); 3778 } 3779 3780 static void phylink_sfp_link_down(void *upstream) 3781 { 3782 struct phylink *pl = upstream; 3783 3784 ASSERT_RTNL(); 3785 3786 phylink_run_resolve_and_disable(pl, PHYLINK_DISABLE_LINK); 3787 } 3788 3789 static void phylink_sfp_link_up(void *upstream) 3790 { 3791 struct phylink *pl = upstream; 3792 3793 ASSERT_RTNL(); 3794 3795 phylink_enable_and_run_resolve(pl, PHYLINK_DISABLE_LINK); 3796 } 3797 3798 static int phylink_sfp_connect_phy(void *upstream, struct phy_device *phy) 3799 { 3800 struct phylink *pl = upstream; 3801 3802 if (!phy->drv) { 3803 phylink_err(pl, "PHY %s (id 0x%.8lx) has no driver loaded\n", 3804 phydev_name(phy), (unsigned long)phy->phy_id); 3805 phylink_err(pl, "Drivers which handle known common cases: CONFIG_BCM84881_PHY, CONFIG_MARVELL_PHY\n"); 3806 return -EINVAL; 3807 } 3808 3809 /* 3810 * This is the new way of dealing with flow control for PHYs, 3811 * as described by Timur Tabi in commit 529ed1275263 ("net: phy: 3812 * phy drivers should not set SUPPORTED_[Asym_]Pause") except 3813 * using our validate call to the MAC, we rely upon the MAC 3814 * clearing the bits from both supported and advertising fields. 3815 */ 3816 phy_support_asym_pause(phy); 3817 3818 /* Set the PHY's host supported interfaces */ 3819 phy_interface_and(phy->host_interfaces, phylink_sfp_interfaces, 3820 pl->config->supported_interfaces); 3821 3822 /* Do the initial configuration */ 3823 return phylink_sfp_config_phy(pl, phy); 3824 } 3825 3826 static void phylink_sfp_disconnect_phy(void *upstream, 3827 struct phy_device *phydev) 3828 { 3829 phylink_disconnect_phy(upstream); 3830 } 3831 3832 static const struct sfp_upstream_ops sfp_phylink_ops = { 3833 .attach = phylink_sfp_attach, 3834 .detach = phylink_sfp_detach, 3835 .module_insert = phylink_sfp_module_insert, 3836 .module_remove = phylink_sfp_module_remove, 3837 .module_start = phylink_sfp_module_start, 3838 .module_stop = phylink_sfp_module_stop, 3839 .link_up = phylink_sfp_link_up, 3840 .link_down = phylink_sfp_link_down, 3841 .connect_phy = phylink_sfp_connect_phy, 3842 .disconnect_phy = phylink_sfp_disconnect_phy, 3843 }; 3844 3845 /* Helpers for MAC drivers */ 3846 3847 static struct { 3848 int bit; 3849 int speed; 3850 } phylink_c73_priority_resolution[] = { 3851 { ETHTOOL_LINK_MODE_100000baseCR4_Full_BIT, SPEED_100000 }, 3852 { ETHTOOL_LINK_MODE_100000baseKR4_Full_BIT, SPEED_100000 }, 3853 /* 100GBASE-KP4 and 100GBASE-CR10 not supported */ 3854 { ETHTOOL_LINK_MODE_40000baseCR4_Full_BIT, SPEED_40000 }, 3855 { ETHTOOL_LINK_MODE_40000baseKR4_Full_BIT, SPEED_40000 }, 3856 { ETHTOOL_LINK_MODE_10000baseKR_Full_BIT, SPEED_10000 }, 3857 { ETHTOOL_LINK_MODE_10000baseKX4_Full_BIT, SPEED_10000 }, 3858 /* 5GBASE-KR not supported */ 3859 { ETHTOOL_LINK_MODE_2500baseX_Full_BIT, SPEED_2500 }, 3860 { ETHTOOL_LINK_MODE_1000baseKX_Full_BIT, SPEED_1000 }, 3861 }; 3862 3863 void phylink_resolve_c73(struct phylink_link_state *state) 3864 { 3865 int i; 3866 3867 for (i = 0; i < ARRAY_SIZE(phylink_c73_priority_resolution); i++) { 3868 int bit = phylink_c73_priority_resolution[i].bit; 3869 if (linkmode_test_bit(bit, state->advertising) && 3870 linkmode_test_bit(bit, state->lp_advertising)) 3871 break; 3872 } 3873 3874 if (i < ARRAY_SIZE(phylink_c73_priority_resolution)) { 3875 state->speed = phylink_c73_priority_resolution[i].speed; 3876 state->duplex = DUPLEX_FULL; 3877 } else { 3878 /* negotiation failure */ 3879 state->link = false; 3880 } 3881 3882 phylink_resolve_an_pause(state); 3883 } 3884 EXPORT_SYMBOL_GPL(phylink_resolve_c73); 3885 3886 static void phylink_decode_c37_word(struct phylink_link_state *state, 3887 uint16_t config_reg, int speed) 3888 { 3889 int fd_bit; 3890 3891 if (speed == SPEED_2500) 3892 fd_bit = ETHTOOL_LINK_MODE_2500baseX_Full_BIT; 3893 else 3894 fd_bit = ETHTOOL_LINK_MODE_1000baseX_Full_BIT; 3895 3896 mii_lpa_mod_linkmode_x(state->lp_advertising, config_reg, fd_bit); 3897 3898 if (linkmode_test_bit(fd_bit, state->advertising) && 3899 linkmode_test_bit(fd_bit, state->lp_advertising)) { 3900 state->speed = speed; 3901 state->duplex = DUPLEX_FULL; 3902 } else { 3903 /* negotiation failure */ 3904 state->link = false; 3905 } 3906 3907 phylink_resolve_an_pause(state); 3908 } 3909 3910 static void phylink_decode_sgmii_word(struct phylink_link_state *state, 3911 uint16_t config_reg) 3912 { 3913 if (!(config_reg & LPA_SGMII_LINK)) { 3914 state->link = false; 3915 return; 3916 } 3917 3918 switch (config_reg & LPA_SGMII_SPD_MASK) { 3919 case LPA_SGMII_10: 3920 state->speed = SPEED_10; 3921 break; 3922 case LPA_SGMII_100: 3923 state->speed = SPEED_100; 3924 break; 3925 case LPA_SGMII_1000: 3926 state->speed = SPEED_1000; 3927 break; 3928 default: 3929 state->link = false; 3930 return; 3931 } 3932 if (config_reg & LPA_SGMII_FULL_DUPLEX) 3933 state->duplex = DUPLEX_FULL; 3934 else 3935 state->duplex = DUPLEX_HALF; 3936 } 3937 3938 /** 3939 * phylink_decode_usxgmii_word() - decode the USXGMII word from a MAC PCS 3940 * @state: a pointer to a struct phylink_link_state. 3941 * @lpa: a 16 bit value which stores the USXGMII auto-negotiation word 3942 * 3943 * Helper for MAC PCS supporting the USXGMII protocol and the auto-negotiation 3944 * code word. Decode the USXGMII code word and populate the corresponding fields 3945 * (speed, duplex) into the phylink_link_state structure. 3946 */ 3947 void phylink_decode_usxgmii_word(struct phylink_link_state *state, 3948 uint16_t lpa) 3949 { 3950 switch (lpa & MDIO_USXGMII_SPD_MASK) { 3951 case MDIO_USXGMII_10: 3952 state->speed = SPEED_10; 3953 break; 3954 case MDIO_USXGMII_100: 3955 state->speed = SPEED_100; 3956 break; 3957 case MDIO_USXGMII_1000: 3958 state->speed = SPEED_1000; 3959 break; 3960 case MDIO_USXGMII_2500: 3961 state->speed = SPEED_2500; 3962 break; 3963 case MDIO_USXGMII_5000: 3964 state->speed = SPEED_5000; 3965 break; 3966 case MDIO_USXGMII_10G: 3967 state->speed = SPEED_10000; 3968 break; 3969 default: 3970 state->link = false; 3971 return; 3972 } 3973 3974 if (lpa & MDIO_USXGMII_FULL_DUPLEX) 3975 state->duplex = DUPLEX_FULL; 3976 else 3977 state->duplex = DUPLEX_HALF; 3978 } 3979 EXPORT_SYMBOL_GPL(phylink_decode_usxgmii_word); 3980 3981 /** 3982 * phylink_decode_usgmii_word() - decode the USGMII word from a MAC PCS 3983 * @state: a pointer to a struct phylink_link_state. 3984 * @lpa: a 16 bit value which stores the USGMII auto-negotiation word 3985 * 3986 * Helper for MAC PCS supporting the USGMII protocol and the auto-negotiation 3987 * code word. Decode the USGMII code word and populate the corresponding fields 3988 * (speed, duplex) into the phylink_link_state structure. The structure for this 3989 * word is the same as the USXGMII word, except it only supports speeds up to 3990 * 1Gbps. 3991 */ 3992 static void phylink_decode_usgmii_word(struct phylink_link_state *state, 3993 uint16_t lpa) 3994 { 3995 switch (lpa & MDIO_USXGMII_SPD_MASK) { 3996 case MDIO_USXGMII_10: 3997 state->speed = SPEED_10; 3998 break; 3999 case MDIO_USXGMII_100: 4000 state->speed = SPEED_100; 4001 break; 4002 case MDIO_USXGMII_1000: 4003 state->speed = SPEED_1000; 4004 break; 4005 default: 4006 state->link = false; 4007 return; 4008 } 4009 4010 if (lpa & MDIO_USXGMII_FULL_DUPLEX) 4011 state->duplex = DUPLEX_FULL; 4012 else 4013 state->duplex = DUPLEX_HALF; 4014 } 4015 4016 /** 4017 * phylink_mii_c22_pcs_decode_state() - Decode MAC PCS state from MII registers 4018 * @state: a pointer to a &struct phylink_link_state. 4019 * @neg_mode: link negotiation mode (PHYLINK_PCS_NEG_xxx) 4020 * @bmsr: The value of the %MII_BMSR register 4021 * @lpa: The value of the %MII_LPA register 4022 * 4023 * Helper for MAC PCS supporting the 802.3 clause 22 register set for 4024 * clause 37 negotiation and/or SGMII control. 4025 * 4026 * Parse the Clause 37 or Cisco SGMII link partner negotiation word into 4027 * the phylink @state structure. This is suitable to be used for implementing 4028 * the pcs_get_state() member of the struct phylink_pcs_ops structure if 4029 * accessing @bmsr and @lpa cannot be done with MDIO directly. 4030 */ 4031 void phylink_mii_c22_pcs_decode_state(struct phylink_link_state *state, 4032 unsigned int neg_mode, u16 bmsr, u16 lpa) 4033 { 4034 state->link = !!(bmsr & BMSR_LSTATUS); 4035 state->an_complete = !!(bmsr & BMSR_ANEGCOMPLETE); 4036 4037 /* If the link is down, the advertisement data is undefined. */ 4038 if (!state->link) 4039 return; 4040 4041 switch (state->interface) { 4042 case PHY_INTERFACE_MODE_1000BASEX: 4043 if (neg_mode == PHYLINK_PCS_NEG_INBAND_ENABLED) { 4044 phylink_decode_c37_word(state, lpa, SPEED_1000); 4045 } else { 4046 state->speed = SPEED_1000; 4047 state->duplex = DUPLEX_FULL; 4048 state->pause |= MLO_PAUSE_TX | MLO_PAUSE_RX; 4049 } 4050 break; 4051 4052 case PHY_INTERFACE_MODE_2500BASEX: 4053 if (neg_mode == PHYLINK_PCS_NEG_INBAND_ENABLED) { 4054 phylink_decode_c37_word(state, lpa, SPEED_2500); 4055 } else { 4056 state->speed = SPEED_2500; 4057 state->duplex = DUPLEX_FULL; 4058 state->pause |= MLO_PAUSE_TX | MLO_PAUSE_RX; 4059 } 4060 break; 4061 4062 case PHY_INTERFACE_MODE_SGMII: 4063 case PHY_INTERFACE_MODE_QSGMII: 4064 if (neg_mode == PHYLINK_PCS_NEG_INBAND_ENABLED) 4065 phylink_decode_sgmii_word(state, lpa); 4066 break; 4067 4068 case PHY_INTERFACE_MODE_QUSGMII: 4069 if (neg_mode == PHYLINK_PCS_NEG_INBAND_ENABLED) 4070 phylink_decode_usgmii_word(state, lpa); 4071 break; 4072 4073 default: 4074 state->link = false; 4075 break; 4076 } 4077 } 4078 EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_decode_state); 4079 4080 /** 4081 * phylink_mii_c22_pcs_get_state() - read the MAC PCS state 4082 * @pcs: a pointer to a &struct mdio_device. 4083 * @neg_mode: link negotiation mode (PHYLINK_PCS_NEG_xxx) 4084 * @state: a pointer to a &struct phylink_link_state. 4085 * 4086 * Helper for MAC PCS supporting the 802.3 clause 22 register set for 4087 * clause 37 negotiation and/or SGMII control. 4088 * 4089 * Read the MAC PCS state from the MII device configured in @config and 4090 * parse the Clause 37 or Cisco SGMII link partner negotiation word into 4091 * the phylink @state structure. This is suitable to be directly plugged 4092 * into the pcs_get_state() member of the struct phylink_pcs_ops 4093 * structure. 4094 */ 4095 void phylink_mii_c22_pcs_get_state(struct mdio_device *pcs, 4096 unsigned int neg_mode, 4097 struct phylink_link_state *state) 4098 { 4099 int bmsr, lpa; 4100 4101 bmsr = mdiodev_read(pcs, MII_BMSR); 4102 lpa = mdiodev_read(pcs, MII_LPA); 4103 if (bmsr < 0 || lpa < 0) { 4104 state->link = false; 4105 return; 4106 } 4107 4108 phylink_mii_c22_pcs_decode_state(state, neg_mode, bmsr, lpa); 4109 } 4110 EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_get_state); 4111 4112 /** 4113 * phylink_mii_c22_pcs_encode_advertisement() - configure the clause 37 PCS 4114 * advertisement 4115 * @interface: the PHY interface mode being configured 4116 * @advertising: the ethtool advertisement mask 4117 * 4118 * Helper for MAC PCS supporting the 802.3 clause 22 register set for 4119 * clause 37 negotiation and/or SGMII control. 4120 * 4121 * Encode the clause 37 PCS advertisement as specified by @interface and 4122 * @advertising. 4123 * 4124 * Return: The new value for @adv, or ``-EINVAL`` if it should not be changed. 4125 */ 4126 int phylink_mii_c22_pcs_encode_advertisement(phy_interface_t interface, 4127 const unsigned long *advertising) 4128 { 4129 u16 adv; 4130 4131 switch (interface) { 4132 case PHY_INTERFACE_MODE_1000BASEX: 4133 case PHY_INTERFACE_MODE_2500BASEX: 4134 adv = ADVERTISE_1000XFULL; 4135 if (linkmode_test_bit(ETHTOOL_LINK_MODE_Pause_BIT, 4136 advertising)) 4137 adv |= ADVERTISE_1000XPAUSE; 4138 if (linkmode_test_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, 4139 advertising)) 4140 adv |= ADVERTISE_1000XPSE_ASYM; 4141 return adv; 4142 case PHY_INTERFACE_MODE_SGMII: 4143 case PHY_INTERFACE_MODE_QSGMII: 4144 return 0x0001; 4145 default: 4146 /* Nothing to do for other modes */ 4147 return -EINVAL; 4148 } 4149 } 4150 EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_encode_advertisement); 4151 4152 /** 4153 * phylink_mii_c22_pcs_config() - configure clause 22 PCS 4154 * @pcs: a pointer to a &struct mdio_device. 4155 * @interface: the PHY interface mode being configured 4156 * @advertising: the ethtool advertisement mask 4157 * @neg_mode: PCS negotiation mode 4158 * 4159 * Configure a Clause 22 PCS PHY with the appropriate negotiation 4160 * parameters for the @mode, @interface and @advertising parameters. 4161 * Returns negative error number on failure, zero if the advertisement 4162 * has not changed, or positive if there is a change. 4163 */ 4164 int phylink_mii_c22_pcs_config(struct mdio_device *pcs, 4165 phy_interface_t interface, 4166 const unsigned long *advertising, 4167 unsigned int neg_mode) 4168 { 4169 bool changed = 0; 4170 u16 bmcr; 4171 int ret, adv; 4172 4173 adv = phylink_mii_c22_pcs_encode_advertisement(interface, advertising); 4174 if (adv >= 0) { 4175 ret = mdiobus_modify_changed(pcs->bus, pcs->addr, 4176 MII_ADVERTISE, 0xffff, adv); 4177 if (ret < 0) 4178 return ret; 4179 changed = ret; 4180 } 4181 4182 if (neg_mode == PHYLINK_PCS_NEG_INBAND_ENABLED) 4183 bmcr = BMCR_ANENABLE; 4184 else 4185 bmcr = 0; 4186 4187 /* Configure the inband state. Ensure ISOLATE bit is disabled */ 4188 ret = mdiodev_modify(pcs, MII_BMCR, BMCR_ANENABLE | BMCR_ISOLATE, bmcr); 4189 if (ret < 0) 4190 return ret; 4191 4192 return changed; 4193 } 4194 EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_config); 4195 4196 /** 4197 * phylink_mii_c22_pcs_an_restart() - restart 802.3z autonegotiation 4198 * @pcs: a pointer to a &struct mdio_device. 4199 * 4200 * Helper for MAC PCS supporting the 802.3 clause 22 register set for 4201 * clause 37 negotiation. 4202 * 4203 * Restart the clause 37 negotiation with the link partner. This is 4204 * suitable to be directly plugged into the pcs_get_state() member 4205 * of the struct phylink_pcs_ops structure. 4206 */ 4207 void phylink_mii_c22_pcs_an_restart(struct mdio_device *pcs) 4208 { 4209 int val = mdiodev_read(pcs, MII_BMCR); 4210 4211 if (val >= 0) { 4212 val |= BMCR_ANRESTART; 4213 4214 mdiodev_write(pcs, MII_BMCR, val); 4215 } 4216 } 4217 EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_an_restart); 4218 4219 void phylink_mii_c45_pcs_get_state(struct mdio_device *pcs, 4220 struct phylink_link_state *state) 4221 { 4222 struct mii_bus *bus = pcs->bus; 4223 int addr = pcs->addr; 4224 int stat; 4225 4226 stat = mdiobus_c45_read(bus, addr, MDIO_MMD_PCS, MDIO_STAT1); 4227 if (stat < 0) { 4228 state->link = false; 4229 return; 4230 } 4231 4232 state->link = !!(stat & MDIO_STAT1_LSTATUS); 4233 if (!state->link) 4234 return; 4235 4236 switch (state->interface) { 4237 case PHY_INTERFACE_MODE_10GBASER: 4238 state->speed = SPEED_10000; 4239 state->duplex = DUPLEX_FULL; 4240 break; 4241 4242 default: 4243 break; 4244 } 4245 } 4246 EXPORT_SYMBOL_GPL(phylink_mii_c45_pcs_get_state); 4247 4248 static int __init phylink_init(void) 4249 { 4250 for (int i = 0; i < ARRAY_SIZE(phylink_sfp_interface_preference); ++i) 4251 __set_bit(phylink_sfp_interface_preference[i], 4252 phylink_sfp_interfaces); 4253 4254 return 0; 4255 } 4256 4257 module_init(phylink_init); 4258 4259 MODULE_LICENSE("GPL v2"); 4260 MODULE_DESCRIPTION("phylink models the MAC to optional PHY connection"); 4261