xref: /linux/drivers/net/phy/phy-core.c (revision 37a93dd5c49b5fda807fd204edf2547c3493319c)
1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3  * Core PHY library, taken from phy.c
4  */
5 #include <linux/export.h>
6 #include <linux/phy.h>
7 #include <linux/phy_port.h>
8 #include <linux/of.h>
9 
10 #include "phylib.h"
11 #include "phylib-internal.h"
12 #include "phy-caps.h"
13 
14 /**
15  * phy_speed_to_str - Return a string representing the PHY link speed
16  *
17  * @speed: Speed of the link
18  */
19 const char *phy_speed_to_str(int speed)
20 {
21 	BUILD_BUG_ON_MSG(__ETHTOOL_LINK_MODE_MASK_NBITS != 125,
22 		"Enum ethtool_link_mode_bit_indices and phylib are out of sync. "
23 		"If a speed or mode has been added please update phy_speed_to_str "
24 		"and the PHY settings array.\n");
25 
26 	switch (speed) {
27 	case SPEED_10:
28 		return "10Mbps";
29 	case SPEED_100:
30 		return "100Mbps";
31 	case SPEED_1000:
32 		return "1Gbps";
33 	case SPEED_2500:
34 		return "2.5Gbps";
35 	case SPEED_5000:
36 		return "5Gbps";
37 	case SPEED_10000:
38 		return "10Gbps";
39 	case SPEED_14000:
40 		return "14Gbps";
41 	case SPEED_20000:
42 		return "20Gbps";
43 	case SPEED_25000:
44 		return "25Gbps";
45 	case SPEED_40000:
46 		return "40Gbps";
47 	case SPEED_50000:
48 		return "50Gbps";
49 	case SPEED_56000:
50 		return "56Gbps";
51 	case SPEED_80000:
52 		return "80Gbps";
53 	case SPEED_100000:
54 		return "100Gbps";
55 	case SPEED_200000:
56 		return "200Gbps";
57 	case SPEED_400000:
58 		return "400Gbps";
59 	case SPEED_800000:
60 		return "800Gbps";
61 	case SPEED_1600000:
62 		return "1600Gbps";
63 	case SPEED_UNKNOWN:
64 		return "Unknown";
65 	default:
66 		return "Unsupported (update phy-core.c)";
67 	}
68 }
69 EXPORT_SYMBOL_GPL(phy_speed_to_str);
70 
71 /**
72  * phy_duplex_to_str - Return string describing the duplex
73  *
74  * @duplex: Duplex setting to describe
75  */
76 const char *phy_duplex_to_str(unsigned int duplex)
77 {
78 	if (duplex == DUPLEX_HALF)
79 		return "Half";
80 	if (duplex == DUPLEX_FULL)
81 		return "Full";
82 	if (duplex == DUPLEX_UNKNOWN)
83 		return "Unknown";
84 	return "Unsupported (update phy-core.c)";
85 }
86 EXPORT_SYMBOL_GPL(phy_duplex_to_str);
87 
88 /**
89  * phy_rate_matching_to_str - Return a string describing the rate matching
90  *
91  * @rate_matching: Type of rate matching to describe
92  */
93 const char *phy_rate_matching_to_str(int rate_matching)
94 {
95 	switch (rate_matching) {
96 	case RATE_MATCH_NONE:
97 		return "none";
98 	case RATE_MATCH_PAUSE:
99 		return "pause";
100 	case RATE_MATCH_CRS:
101 		return "crs";
102 	case RATE_MATCH_OPEN_LOOP:
103 		return "open-loop";
104 	}
105 	return "Unsupported (update phy-core.c)";
106 }
107 EXPORT_SYMBOL_GPL(phy_rate_matching_to_str);
108 
109 /**
110  * phy_fix_phy_mode_for_mac_delays - Convenience function for fixing PHY
111  * mode based on whether mac adds internal delay
112  *
113  * @interface: The current interface mode of the port
114  * @mac_txid: True if the mac adds internal tx delay
115  * @mac_rxid: True if the mac adds internal rx delay
116  *
117  * Return: fixed PHY mode, or PHY_INTERFACE_MODE_NA if the interface can
118  * not apply the internal delay
119  */
120 phy_interface_t phy_fix_phy_mode_for_mac_delays(phy_interface_t interface,
121 						bool mac_txid, bool mac_rxid)
122 {
123 	if (!phy_interface_mode_is_rgmii(interface))
124 		return interface;
125 
126 	if (mac_txid && mac_rxid) {
127 		if (interface == PHY_INTERFACE_MODE_RGMII_ID)
128 			return PHY_INTERFACE_MODE_RGMII;
129 		return PHY_INTERFACE_MODE_NA;
130 	}
131 
132 	if (mac_txid) {
133 		if (interface == PHY_INTERFACE_MODE_RGMII_ID)
134 			return PHY_INTERFACE_MODE_RGMII_RXID;
135 		if (interface == PHY_INTERFACE_MODE_RGMII_TXID)
136 			return PHY_INTERFACE_MODE_RGMII;
137 		return PHY_INTERFACE_MODE_NA;
138 	}
139 
140 	if (mac_rxid) {
141 		if (interface == PHY_INTERFACE_MODE_RGMII_ID)
142 			return PHY_INTERFACE_MODE_RGMII_TXID;
143 		if (interface == PHY_INTERFACE_MODE_RGMII_RXID)
144 			return PHY_INTERFACE_MODE_RGMII;
145 		return PHY_INTERFACE_MODE_NA;
146 	}
147 
148 	return interface;
149 }
150 EXPORT_SYMBOL_GPL(phy_fix_phy_mode_for_mac_delays);
151 
152 /**
153  * phy_interface_num_ports - Return the number of links that can be carried by
154  *			     a given MAC-PHY physical link. Returns 0 if this is
155  *			     unknown, the number of links else.
156  *
157  * @interface: The interface mode we want to get the number of ports
158  */
159 int phy_interface_num_ports(phy_interface_t interface)
160 {
161 	switch (interface) {
162 	case PHY_INTERFACE_MODE_NA:
163 		return 0;
164 	case PHY_INTERFACE_MODE_INTERNAL:
165 	case PHY_INTERFACE_MODE_MII:
166 	case PHY_INTERFACE_MODE_MIILITE:
167 	case PHY_INTERFACE_MODE_GMII:
168 	case PHY_INTERFACE_MODE_TBI:
169 	case PHY_INTERFACE_MODE_REVMII:
170 	case PHY_INTERFACE_MODE_RMII:
171 	case PHY_INTERFACE_MODE_REVRMII:
172 	case PHY_INTERFACE_MODE_RGMII:
173 	case PHY_INTERFACE_MODE_RGMII_ID:
174 	case PHY_INTERFACE_MODE_RGMII_RXID:
175 	case PHY_INTERFACE_MODE_RGMII_TXID:
176 	case PHY_INTERFACE_MODE_RTBI:
177 	case PHY_INTERFACE_MODE_XGMII:
178 	case PHY_INTERFACE_MODE_XLGMII:
179 	case PHY_INTERFACE_MODE_MOCA:
180 	case PHY_INTERFACE_MODE_TRGMII:
181 	case PHY_INTERFACE_MODE_USXGMII:
182 	case PHY_INTERFACE_MODE_SGMII:
183 	case PHY_INTERFACE_MODE_SMII:
184 	case PHY_INTERFACE_MODE_1000BASEX:
185 	case PHY_INTERFACE_MODE_2500BASEX:
186 	case PHY_INTERFACE_MODE_5GBASER:
187 	case PHY_INTERFACE_MODE_10GBASER:
188 	case PHY_INTERFACE_MODE_25GBASER:
189 	case PHY_INTERFACE_MODE_10GKR:
190 	case PHY_INTERFACE_MODE_100BASEX:
191 	case PHY_INTERFACE_MODE_RXAUI:
192 	case PHY_INTERFACE_MODE_XAUI:
193 	case PHY_INTERFACE_MODE_1000BASEKX:
194 	case PHY_INTERFACE_MODE_50GBASER:
195 	case PHY_INTERFACE_MODE_LAUI:
196 	case PHY_INTERFACE_MODE_100GBASEP:
197 		return 1;
198 	case PHY_INTERFACE_MODE_QSGMII:
199 	case PHY_INTERFACE_MODE_QUSGMII:
200 	case PHY_INTERFACE_MODE_10G_QXGMII:
201 		return 4;
202 	case PHY_INTERFACE_MODE_PSGMII:
203 		return 5;
204 	case PHY_INTERFACE_MODE_MAX:
205 		WARN_ONCE(1, "PHY_INTERFACE_MODE_MAX isn't a valid interface mode");
206 		return 0;
207 	}
208 	return 0;
209 }
210 EXPORT_SYMBOL_GPL(phy_interface_num_ports);
211 
212 static void __set_phy_supported(struct phy_device *phydev, u32 max_speed)
213 {
214 	struct phy_port *port;
215 
216 	phy_caps_linkmode_max_speed(max_speed, phydev->supported);
217 
218 	phy_for_each_port(phydev, port)
219 		phy_caps_linkmode_max_speed(max_speed, port->supported);
220 }
221 
222 /**
223  * phy_set_max_speed - Set the maximum speed the PHY should support
224  *
225  * @phydev: The phy_device struct
226  * @max_speed: Maximum speed
227  *
228  * The PHY might be more capable than the MAC. For example a Fast Ethernet
229  * is connected to a 1G PHY. This function allows the MAC to indicate its
230  * maximum speed, and so limit what the PHY will advertise.
231  */
232 void phy_set_max_speed(struct phy_device *phydev, u32 max_speed)
233 {
234 	__set_phy_supported(phydev, max_speed);
235 
236 	phy_advertise_supported(phydev);
237 }
238 EXPORT_SYMBOL(phy_set_max_speed);
239 
240 void of_set_phy_supported(struct phy_device *phydev)
241 {
242 	struct device_node *node = phydev->mdio.dev.of_node;
243 	u32 max_speed;
244 
245 	if (!IS_ENABLED(CONFIG_OF_MDIO))
246 		return;
247 
248 	if (!node)
249 		return;
250 
251 	if (!of_property_read_u32(node, "max-speed", &max_speed))
252 		__set_phy_supported(phydev, max_speed);
253 }
254 
255 void of_set_phy_eee_broken(struct phy_device *phydev)
256 {
257 	struct device_node *node = phydev->mdio.dev.of_node;
258 	unsigned long *modes = phydev->eee_disabled_modes;
259 
260 	if (!IS_ENABLED(CONFIG_OF_MDIO) || !node)
261 		return;
262 
263 	linkmode_zero(modes);
264 
265 	if (of_property_read_bool(node, "eee-broken-100tx"))
266 		linkmode_set_bit(ETHTOOL_LINK_MODE_100baseT_Full_BIT, modes);
267 	if (of_property_read_bool(node, "eee-broken-1000t"))
268 		linkmode_set_bit(ETHTOOL_LINK_MODE_1000baseT_Full_BIT, modes);
269 	if (of_property_read_bool(node, "eee-broken-10gt"))
270 		linkmode_set_bit(ETHTOOL_LINK_MODE_10000baseT_Full_BIT, modes);
271 	if (of_property_read_bool(node, "eee-broken-1000kx"))
272 		linkmode_set_bit(ETHTOOL_LINK_MODE_1000baseKX_Full_BIT, modes);
273 	if (of_property_read_bool(node, "eee-broken-10gkx4"))
274 		linkmode_set_bit(ETHTOOL_LINK_MODE_10000baseKX4_Full_BIT, modes);
275 	if (of_property_read_bool(node, "eee-broken-10gkr"))
276 		linkmode_set_bit(ETHTOOL_LINK_MODE_10000baseKR_Full_BIT, modes);
277 }
278 
279 /**
280  * of_set_phy_timing_role - Set the master/slave mode of the PHY
281  *
282  * @phydev: The phy_device struct
283  *
284  * Set master/slave configuration of the PHY based on the device tree.
285  */
286 void of_set_phy_timing_role(struct phy_device *phydev)
287 {
288 	struct device_node *node = phydev->mdio.dev.of_node;
289 	const char *master;
290 
291 	if (!IS_ENABLED(CONFIG_OF_MDIO))
292 		return;
293 
294 	if (!node)
295 		return;
296 
297 	if (of_property_read_string(node, "timing-role", &master))
298 		return;
299 
300 	if (strcmp(master, "forced-master") == 0)
301 		phydev->master_slave_set = MASTER_SLAVE_CFG_MASTER_FORCE;
302 	else if (strcmp(master, "forced-slave") == 0)
303 		phydev->master_slave_set = MASTER_SLAVE_CFG_SLAVE_FORCE;
304 	else if (strcmp(master, "preferred-master") == 0)
305 		phydev->master_slave_set = MASTER_SLAVE_CFG_MASTER_PREFERRED;
306 	else if (strcmp(master, "preferred-slave") == 0)
307 		phydev->master_slave_set = MASTER_SLAVE_CFG_SLAVE_PREFERRED;
308 	else
309 		phydev_warn(phydev, "Unknown master-slave mode %s\n", master);
310 }
311 
312 /**
313  * phy_resolve_aneg_pause - Determine pause autoneg results
314  *
315  * @phydev: The phy_device struct
316  *
317  * Once autoneg has completed the local pause settings can be
318  * resolved.  Determine if pause and asymmetric pause should be used
319  * by the MAC.
320  */
321 
322 void phy_resolve_aneg_pause(struct phy_device *phydev)
323 {
324 	if (phydev->duplex == DUPLEX_FULL) {
325 		phydev->pause = linkmode_test_bit(ETHTOOL_LINK_MODE_Pause_BIT,
326 						  phydev->lp_advertising);
327 		phydev->asym_pause = linkmode_test_bit(
328 			ETHTOOL_LINK_MODE_Asym_Pause_BIT,
329 			phydev->lp_advertising);
330 	}
331 }
332 EXPORT_SYMBOL_GPL(phy_resolve_aneg_pause);
333 
334 /**
335  * phy_resolve_aneg_linkmode - resolve the advertisements into PHY settings
336  * @phydev: The phy_device struct
337  *
338  * Resolve our and the link partner advertisements into their corresponding
339  * speed and duplex. If full duplex was negotiated, extract the pause mode
340  * from the link partner mask.
341  */
342 void phy_resolve_aneg_linkmode(struct phy_device *phydev)
343 {
344 	__ETHTOOL_DECLARE_LINK_MODE_MASK(common);
345 	const struct link_capabilities *c;
346 
347 	linkmode_and(common, phydev->lp_advertising, phydev->advertising);
348 
349 	c = phy_caps_lookup_by_linkmode(common);
350 	if (c) {
351 		phydev->speed = c->speed;
352 		phydev->duplex = c->duplex;
353 	}
354 
355 	phy_resolve_aneg_pause(phydev);
356 }
357 EXPORT_SYMBOL_GPL(phy_resolve_aneg_linkmode);
358 
359 /**
360  * phy_check_downshift - check whether downshift occurred
361  * @phydev: The phy_device struct
362  *
363  * Check whether a downshift to a lower speed occurred. If this should be the
364  * case warn the user.
365  * Prerequisite for detecting downshift is that PHY driver implements the
366  * read_status callback and sets phydev->speed to the actual link speed.
367  */
368 void phy_check_downshift(struct phy_device *phydev)
369 {
370 	__ETHTOOL_DECLARE_LINK_MODE_MASK(common);
371 	const struct link_capabilities *c;
372 	int speed = SPEED_UNKNOWN;
373 
374 	phydev->downshifted_rate = 0;
375 
376 	if (phydev->autoneg == AUTONEG_DISABLE ||
377 	    phydev->speed == SPEED_UNKNOWN)
378 		return;
379 
380 	linkmode_and(common, phydev->lp_advertising, phydev->advertising);
381 
382 	c = phy_caps_lookup_by_linkmode(common);
383 	if (c)
384 		speed = c->speed;
385 
386 	if (speed == SPEED_UNKNOWN || phydev->speed >= speed)
387 		return;
388 
389 	phydev_warn(phydev, "Downshift occurred from negotiated speed %s to actual speed %s, check cabling!\n",
390 		    phy_speed_to_str(speed), phy_speed_to_str(phydev->speed));
391 
392 	phydev->downshifted_rate = 1;
393 }
394 
395 static int phy_resolve_min_speed(struct phy_device *phydev, bool fdx_only)
396 {
397 	__ETHTOOL_DECLARE_LINK_MODE_MASK(common);
398 	const struct link_capabilities *c;
399 
400 	linkmode_and(common, phydev->lp_advertising, phydev->advertising);
401 
402 	c = phy_caps_lookup_by_linkmode_rev(common, fdx_only);
403 	if (c)
404 		return c->speed;
405 
406 	return SPEED_UNKNOWN;
407 }
408 
409 int phy_speed_down_core(struct phy_device *phydev)
410 {
411 	int min_common_speed = phy_resolve_min_speed(phydev, true);
412 
413 	if (min_common_speed == SPEED_UNKNOWN)
414 		return -EINVAL;
415 
416 	phy_caps_linkmode_max_speed(min_common_speed, phydev->advertising);
417 
418 	return 0;
419 }
420 
421 static void mmd_phy_indirect(struct mii_bus *bus, int phy_addr, int devad,
422 			     u16 regnum)
423 {
424 	/* Write the desired MMD Devad */
425 	__mdiobus_write(bus, phy_addr, MII_MMD_CTRL, devad);
426 
427 	/* Write the desired MMD register address */
428 	__mdiobus_write(bus, phy_addr, MII_MMD_DATA, regnum);
429 
430 	/* Select the Function : DATA with no post increment */
431 	__mdiobus_write(bus, phy_addr, MII_MMD_CTRL,
432 			devad | MII_MMD_CTRL_NOINCR);
433 }
434 
435 int mmd_phy_read(struct mii_bus *bus, int phy_addr, bool is_c45,
436 		 int devad, u32 regnum)
437 {
438 	if (is_c45)
439 		return __mdiobus_c45_read(bus, phy_addr, devad, regnum);
440 
441 	mmd_phy_indirect(bus, phy_addr, devad, regnum);
442 	/* Read the content of the MMD's selected register */
443 	return __mdiobus_read(bus, phy_addr, MII_MMD_DATA);
444 }
445 EXPORT_SYMBOL_GPL(mmd_phy_read);
446 
447 int mmd_phy_write(struct mii_bus *bus, int phy_addr, bool is_c45,
448 		  int devad, u32 regnum, u16 val)
449 {
450 	if (is_c45)
451 		return __mdiobus_c45_write(bus, phy_addr, devad, regnum, val);
452 
453 	mmd_phy_indirect(bus, phy_addr, devad, regnum);
454 	/* Write the data into MMD's selected register */
455 	return __mdiobus_write(bus, phy_addr, MII_MMD_DATA, val);
456 }
457 EXPORT_SYMBOL_GPL(mmd_phy_write);
458 
459 /**
460  * __phy_read_mmd - Convenience function for reading a register
461  * from an MMD on a given PHY.
462  * @phydev: The phy_device struct
463  * @devad: The MMD to read from (0..31)
464  * @regnum: The register on the MMD to read (0..65535)
465  *
466  * Same rules as for __phy_read();
467  */
468 int __phy_read_mmd(struct phy_device *phydev, int devad, u32 regnum)
469 {
470 	if (regnum > (u16)~0 || devad > 32)
471 		return -EINVAL;
472 
473 	if (phydev->drv && phydev->drv->read_mmd)
474 		return phydev->drv->read_mmd(phydev, devad, regnum);
475 
476 	return mmd_phy_read(phydev->mdio.bus, phydev->mdio.addr,
477 			    phydev->is_c45, devad, regnum);
478 }
479 EXPORT_SYMBOL(__phy_read_mmd);
480 
481 /**
482  * phy_read_mmd - Convenience function for reading a register
483  * from an MMD on a given PHY.
484  * @phydev: The phy_device struct
485  * @devad: The MMD to read from
486  * @regnum: The register on the MMD to read
487  *
488  * Same rules as for phy_read();
489  */
490 int phy_read_mmd(struct phy_device *phydev, int devad, u32 regnum)
491 {
492 	int ret;
493 
494 	phy_lock_mdio_bus(phydev);
495 	ret = __phy_read_mmd(phydev, devad, regnum);
496 	phy_unlock_mdio_bus(phydev);
497 
498 	return ret;
499 }
500 EXPORT_SYMBOL(phy_read_mmd);
501 
502 /**
503  * __phy_write_mmd - Convenience function for writing a register
504  * on an MMD on a given PHY.
505  * @phydev: The phy_device struct
506  * @devad: The MMD to read from
507  * @regnum: The register on the MMD to read
508  * @val: value to write to @regnum
509  *
510  * Same rules as for __phy_write();
511  */
512 int __phy_write_mmd(struct phy_device *phydev, int devad, u32 regnum, u16 val)
513 {
514 	if (regnum > (u16)~0 || devad > 32)
515 		return -EINVAL;
516 
517 	if (phydev->drv && phydev->drv->write_mmd)
518 		return phydev->drv->write_mmd(phydev, devad, regnum, val);
519 
520 	return mmd_phy_write(phydev->mdio.bus, phydev->mdio.addr,
521 			     phydev->is_c45, devad, regnum, val);
522 }
523 EXPORT_SYMBOL(__phy_write_mmd);
524 
525 /**
526  * phy_write_mmd - Convenience function for writing a register
527  * on an MMD on a given PHY.
528  * @phydev: The phy_device struct
529  * @devad: The MMD to read from
530  * @regnum: The register on the MMD to read
531  * @val: value to write to @regnum
532  *
533  * Same rules as for phy_write();
534  */
535 int phy_write_mmd(struct phy_device *phydev, int devad, u32 regnum, u16 val)
536 {
537 	int ret;
538 
539 	phy_lock_mdio_bus(phydev);
540 	ret = __phy_write_mmd(phydev, devad, regnum, val);
541 	phy_unlock_mdio_bus(phydev);
542 
543 	return ret;
544 }
545 EXPORT_SYMBOL(phy_write_mmd);
546 
547 /**
548  * phy_modify_changed - Function for modifying a PHY register
549  * @phydev: the phy_device struct
550  * @regnum: register number to modify
551  * @mask: bit mask of bits to clear
552  * @set: new value of bits set in mask to write to @regnum
553  *
554  * NOTE: MUST NOT be called from interrupt context,
555  * because the bus read/write functions may wait for an interrupt
556  * to conclude the operation.
557  *
558  * Returns negative errno, 0 if there was no change, and 1 in case of change
559  */
560 int phy_modify_changed(struct phy_device *phydev, u32 regnum, u16 mask, u16 set)
561 {
562 	int ret;
563 
564 	phy_lock_mdio_bus(phydev);
565 	ret = __phy_modify_changed(phydev, regnum, mask, set);
566 	phy_unlock_mdio_bus(phydev);
567 
568 	return ret;
569 }
570 EXPORT_SYMBOL_GPL(phy_modify_changed);
571 
572 /**
573  * __phy_modify - Convenience function for modifying a PHY register
574  * @phydev: the phy_device struct
575  * @regnum: register number to modify
576  * @mask: bit mask of bits to clear
577  * @set: new value of bits set in mask to write to @regnum
578  *
579  * NOTE: MUST NOT be called from interrupt context,
580  * because the bus read/write functions may wait for an interrupt
581  * to conclude the operation.
582  */
583 int __phy_modify(struct phy_device *phydev, u32 regnum, u16 mask, u16 set)
584 {
585 	int ret;
586 
587 	ret = __phy_modify_changed(phydev, regnum, mask, set);
588 
589 	return ret < 0 ? ret : 0;
590 }
591 EXPORT_SYMBOL_GPL(__phy_modify);
592 
593 /**
594  * phy_modify - Convenience function for modifying a given PHY register
595  * @phydev: the phy_device struct
596  * @regnum: register number to write
597  * @mask: bit mask of bits to clear
598  * @set: new value of bits set in mask to write to @regnum
599  *
600  * NOTE: MUST NOT be called from interrupt context,
601  * because the bus read/write functions may wait for an interrupt
602  * to conclude the operation.
603  */
604 int phy_modify(struct phy_device *phydev, u32 regnum, u16 mask, u16 set)
605 {
606 	int ret;
607 
608 	phy_lock_mdio_bus(phydev);
609 	ret = __phy_modify(phydev, regnum, mask, set);
610 	phy_unlock_mdio_bus(phydev);
611 
612 	return ret;
613 }
614 EXPORT_SYMBOL_GPL(phy_modify);
615 
616 /**
617  * __phy_modify_mmd_changed - Function for modifying a register on MMD
618  * @phydev: the phy_device struct
619  * @devad: the MMD containing register to modify
620  * @regnum: register number to modify
621  * @mask: bit mask of bits to clear
622  * @set: new value of bits set in mask to write to @regnum
623  *
624  * Unlocked helper function which allows a MMD register to be modified as
625  * new register value = (old register value & ~mask) | set
626  *
627  * Returns negative errno, 0 if there was no change, and 1 in case of change
628  */
629 int __phy_modify_mmd_changed(struct phy_device *phydev, int devad, u32 regnum,
630 			     u16 mask, u16 set)
631 {
632 	int new, ret;
633 
634 	ret = __phy_read_mmd(phydev, devad, regnum);
635 	if (ret < 0)
636 		return ret;
637 
638 	new = (ret & ~mask) | set;
639 	if (new == ret)
640 		return 0;
641 
642 	ret = __phy_write_mmd(phydev, devad, regnum, new);
643 
644 	return ret < 0 ? ret : 1;
645 }
646 EXPORT_SYMBOL_GPL(__phy_modify_mmd_changed);
647 
648 /**
649  * phy_modify_mmd_changed - Function for modifying a register on MMD
650  * @phydev: the phy_device struct
651  * @devad: the MMD containing register to modify
652  * @regnum: register number to modify
653  * @mask: bit mask of bits to clear
654  * @set: new value of bits set in mask to write to @regnum
655  *
656  * NOTE: MUST NOT be called from interrupt context,
657  * because the bus read/write functions may wait for an interrupt
658  * to conclude the operation.
659  *
660  * Returns negative errno, 0 if there was no change, and 1 in case of change
661  */
662 int phy_modify_mmd_changed(struct phy_device *phydev, int devad, u32 regnum,
663 			   u16 mask, u16 set)
664 {
665 	int ret;
666 
667 	phy_lock_mdio_bus(phydev);
668 	ret = __phy_modify_mmd_changed(phydev, devad, regnum, mask, set);
669 	phy_unlock_mdio_bus(phydev);
670 
671 	return ret;
672 }
673 EXPORT_SYMBOL_GPL(phy_modify_mmd_changed);
674 
675 /**
676  * __phy_modify_mmd - Convenience function for modifying a register on MMD
677  * @phydev: the phy_device struct
678  * @devad: the MMD containing register to modify
679  * @regnum: register number to modify
680  * @mask: bit mask of bits to clear
681  * @set: new value of bits set in mask to write to @regnum
682  *
683  * NOTE: MUST NOT be called from interrupt context,
684  * because the bus read/write functions may wait for an interrupt
685  * to conclude the operation.
686  */
687 int __phy_modify_mmd(struct phy_device *phydev, int devad, u32 regnum,
688 		     u16 mask, u16 set)
689 {
690 	int ret;
691 
692 	ret = __phy_modify_mmd_changed(phydev, devad, regnum, mask, set);
693 
694 	return ret < 0 ? ret : 0;
695 }
696 EXPORT_SYMBOL_GPL(__phy_modify_mmd);
697 
698 /**
699  * phy_modify_mmd - Convenience function for modifying a register on MMD
700  * @phydev: the phy_device struct
701  * @devad: the MMD containing register to modify
702  * @regnum: register number to modify
703  * @mask: bit mask of bits to clear
704  * @set: new value of bits set in mask to write to @regnum
705  *
706  * NOTE: MUST NOT be called from interrupt context,
707  * because the bus read/write functions may wait for an interrupt
708  * to conclude the operation.
709  */
710 int phy_modify_mmd(struct phy_device *phydev, int devad, u32 regnum,
711 		   u16 mask, u16 set)
712 {
713 	int ret;
714 
715 	phy_lock_mdio_bus(phydev);
716 	ret = __phy_modify_mmd(phydev, devad, regnum, mask, set);
717 	phy_unlock_mdio_bus(phydev);
718 
719 	return ret;
720 }
721 EXPORT_SYMBOL_GPL(phy_modify_mmd);
722 
723 static int __phy_read_page(struct phy_device *phydev)
724 {
725 	if (WARN_ONCE(!phydev->drv->read_page, "read_page callback not available, PHY driver not loaded?\n"))
726 		return -EOPNOTSUPP;
727 
728 	return phydev->drv->read_page(phydev);
729 }
730 
731 static int __phy_write_page(struct phy_device *phydev, int page)
732 {
733 	if (WARN_ONCE(!phydev->drv->write_page, "write_page callback not available, PHY driver not loaded?\n"))
734 		return -EOPNOTSUPP;
735 
736 	return phydev->drv->write_page(phydev, page);
737 }
738 
739 /**
740  * phy_save_page() - take the bus lock and save the current page
741  * @phydev: a pointer to a &struct phy_device
742  *
743  * Take the MDIO bus lock, and return the current page number. On error,
744  * returns a negative errno. phy_restore_page() must always be called
745  * after this, irrespective of success or failure of this call.
746  */
747 int phy_save_page(struct phy_device *phydev)
748 {
749 	phy_lock_mdio_bus(phydev);
750 	return __phy_read_page(phydev);
751 }
752 EXPORT_SYMBOL_GPL(phy_save_page);
753 
754 /**
755  * phy_select_page() - take the bus lock, save the current page, and set a page
756  * @phydev: a pointer to a &struct phy_device
757  * @page: desired page
758  *
759  * Take the MDIO bus lock to protect against concurrent access, save the
760  * current PHY page, and set the current page.  On error, returns a
761  * negative errno, otherwise returns the previous page number.
762  * phy_restore_page() must always be called after this, irrespective
763  * of success or failure of this call.
764  */
765 int phy_select_page(struct phy_device *phydev, int page)
766 {
767 	int ret, oldpage;
768 
769 	oldpage = ret = phy_save_page(phydev);
770 	if (ret < 0)
771 		return ret;
772 
773 	if (oldpage != page) {
774 		ret = __phy_write_page(phydev, page);
775 		if (ret < 0)
776 			return ret;
777 	}
778 
779 	return oldpage;
780 }
781 EXPORT_SYMBOL_GPL(phy_select_page);
782 
783 /**
784  * phy_restore_page() - restore the page register and release the bus lock
785  * @phydev: a pointer to a &struct phy_device
786  * @oldpage: the old page, return value from phy_save_page() or phy_select_page()
787  * @ret: operation's return code
788  *
789  * Release the MDIO bus lock, restoring @oldpage if it is a valid page.
790  * This function propagates the earliest error code from the group of
791  * operations.
792  *
793  * Returns:
794  *   @oldpage if it was a negative value, otherwise
795  *   @ret if it was a negative errno value, otherwise
796  *   phy_write_page()'s negative value if it were in error, otherwise
797  *   @ret.
798  */
799 int phy_restore_page(struct phy_device *phydev, int oldpage, int ret)
800 {
801 	int r;
802 
803 	if (oldpage >= 0) {
804 		r = __phy_write_page(phydev, oldpage);
805 
806 		/* Propagate the operation return code if the page write
807 		 * was successful.
808 		 */
809 		if (ret >= 0 && r < 0)
810 			ret = r;
811 	} else {
812 		/* Propagate the phy page selection error code */
813 		ret = oldpage;
814 	}
815 
816 	phy_unlock_mdio_bus(phydev);
817 
818 	return ret;
819 }
820 EXPORT_SYMBOL_GPL(phy_restore_page);
821 
822 /**
823  * phy_read_paged() - Convenience function for reading a paged register
824  * @phydev: a pointer to a &struct phy_device
825  * @page: the page for the phy
826  * @regnum: register number
827  *
828  * Same rules as for phy_read().
829  */
830 int phy_read_paged(struct phy_device *phydev, int page, u32 regnum)
831 {
832 	int ret = 0, oldpage;
833 
834 	oldpage = phy_select_page(phydev, page);
835 	if (oldpage >= 0)
836 		ret = __phy_read(phydev, regnum);
837 
838 	return phy_restore_page(phydev, oldpage, ret);
839 }
840 EXPORT_SYMBOL(phy_read_paged);
841 
842 /**
843  * phy_write_paged() - Convenience function for writing a paged register
844  * @phydev: a pointer to a &struct phy_device
845  * @page: the page for the phy
846  * @regnum: register number
847  * @val: value to write
848  *
849  * Same rules as for phy_write().
850  */
851 int phy_write_paged(struct phy_device *phydev, int page, u32 regnum, u16 val)
852 {
853 	int ret = 0, oldpage;
854 
855 	oldpage = phy_select_page(phydev, page);
856 	if (oldpage >= 0)
857 		ret = __phy_write(phydev, regnum, val);
858 
859 	return phy_restore_page(phydev, oldpage, ret);
860 }
861 EXPORT_SYMBOL(phy_write_paged);
862 
863 /**
864  * phy_modify_paged_changed() - Function for modifying a paged register
865  * @phydev: a pointer to a &struct phy_device
866  * @page: the page for the phy
867  * @regnum: register number
868  * @mask: bit mask of bits to clear
869  * @set: bit mask of bits to set
870  *
871  * Returns negative errno, 0 if there was no change, and 1 in case of change
872  */
873 int phy_modify_paged_changed(struct phy_device *phydev, int page, u32 regnum,
874 			     u16 mask, u16 set)
875 {
876 	int ret = 0, oldpage;
877 
878 	oldpage = phy_select_page(phydev, page);
879 	if (oldpage >= 0)
880 		ret = __phy_modify_changed(phydev, regnum, mask, set);
881 
882 	return phy_restore_page(phydev, oldpage, ret);
883 }
884 EXPORT_SYMBOL(phy_modify_paged_changed);
885 
886 /**
887  * phy_modify_paged() - Convenience function for modifying a paged register
888  * @phydev: a pointer to a &struct phy_device
889  * @page: the page for the phy
890  * @regnum: register number
891  * @mask: bit mask of bits to clear
892  * @set: bit mask of bits to set
893  *
894  * Same rules as for phy_read() and phy_write().
895  */
896 int phy_modify_paged(struct phy_device *phydev, int page, u32 regnum,
897 		     u16 mask, u16 set)
898 {
899 	int ret = phy_modify_paged_changed(phydev, page, regnum, mask, set);
900 
901 	return ret < 0 ? ret : 0;
902 }
903 EXPORT_SYMBOL(phy_modify_paged);
904