1 // SPDX-License-Identifier: GPL-2.0+ 2 /* 3 * Core PHY library, taken from phy.c 4 */ 5 #include <linux/export.h> 6 #include <linux/phy.h> 7 #include <linux/of.h> 8 9 /** 10 * phy_speed_to_str - Return a string representing the PHY link speed 11 * 12 * @speed: Speed of the link 13 */ 14 const char *phy_speed_to_str(int speed) 15 { 16 BUILD_BUG_ON_MSG(__ETHTOOL_LINK_MODE_MASK_NBITS != 93, 17 "Enum ethtool_link_mode_bit_indices and phylib are out of sync. " 18 "If a speed or mode has been added please update phy_speed_to_str " 19 "and the PHY settings array.\n"); 20 21 switch (speed) { 22 case SPEED_10: 23 return "10Mbps"; 24 case SPEED_100: 25 return "100Mbps"; 26 case SPEED_1000: 27 return "1Gbps"; 28 case SPEED_2500: 29 return "2.5Gbps"; 30 case SPEED_5000: 31 return "5Gbps"; 32 case SPEED_10000: 33 return "10Gbps"; 34 case SPEED_14000: 35 return "14Gbps"; 36 case SPEED_20000: 37 return "20Gbps"; 38 case SPEED_25000: 39 return "25Gbps"; 40 case SPEED_40000: 41 return "40Gbps"; 42 case SPEED_50000: 43 return "50Gbps"; 44 case SPEED_56000: 45 return "56Gbps"; 46 case SPEED_100000: 47 return "100Gbps"; 48 case SPEED_200000: 49 return "200Gbps"; 50 case SPEED_400000: 51 return "400Gbps"; 52 case SPEED_UNKNOWN: 53 return "Unknown"; 54 default: 55 return "Unsupported (update phy-core.c)"; 56 } 57 } 58 EXPORT_SYMBOL_GPL(phy_speed_to_str); 59 60 /** 61 * phy_duplex_to_str - Return string describing the duplex 62 * 63 * @duplex: Duplex setting to describe 64 */ 65 const char *phy_duplex_to_str(unsigned int duplex) 66 { 67 if (duplex == DUPLEX_HALF) 68 return "Half"; 69 if (duplex == DUPLEX_FULL) 70 return "Full"; 71 if (duplex == DUPLEX_UNKNOWN) 72 return "Unknown"; 73 return "Unsupported (update phy-core.c)"; 74 } 75 EXPORT_SYMBOL_GPL(phy_duplex_to_str); 76 77 /** 78 * phy_interface_num_ports - Return the number of links that can be carried by 79 * a given MAC-PHY physical link. Returns 0 if this is 80 * unknown, the number of links else. 81 * 82 * @interface: The interface mode we want to get the number of ports 83 */ 84 int phy_interface_num_ports(phy_interface_t interface) 85 { 86 switch (interface) { 87 case PHY_INTERFACE_MODE_NA: 88 return 0; 89 case PHY_INTERFACE_MODE_INTERNAL: 90 case PHY_INTERFACE_MODE_MII: 91 case PHY_INTERFACE_MODE_GMII: 92 case PHY_INTERFACE_MODE_TBI: 93 case PHY_INTERFACE_MODE_REVMII: 94 case PHY_INTERFACE_MODE_RMII: 95 case PHY_INTERFACE_MODE_REVRMII: 96 case PHY_INTERFACE_MODE_RGMII: 97 case PHY_INTERFACE_MODE_RGMII_ID: 98 case PHY_INTERFACE_MODE_RGMII_RXID: 99 case PHY_INTERFACE_MODE_RGMII_TXID: 100 case PHY_INTERFACE_MODE_RTBI: 101 case PHY_INTERFACE_MODE_XGMII: 102 case PHY_INTERFACE_MODE_XLGMII: 103 case PHY_INTERFACE_MODE_MOCA: 104 case PHY_INTERFACE_MODE_TRGMII: 105 case PHY_INTERFACE_MODE_USXGMII: 106 case PHY_INTERFACE_MODE_SGMII: 107 case PHY_INTERFACE_MODE_SMII: 108 case PHY_INTERFACE_MODE_1000BASEX: 109 case PHY_INTERFACE_MODE_2500BASEX: 110 case PHY_INTERFACE_MODE_5GBASER: 111 case PHY_INTERFACE_MODE_10GBASER: 112 case PHY_INTERFACE_MODE_25GBASER: 113 case PHY_INTERFACE_MODE_10GKR: 114 case PHY_INTERFACE_MODE_100BASEX: 115 case PHY_INTERFACE_MODE_RXAUI: 116 case PHY_INTERFACE_MODE_XAUI: 117 case PHY_INTERFACE_MODE_1000BASEKX: 118 return 1; 119 case PHY_INTERFACE_MODE_QSGMII: 120 case PHY_INTERFACE_MODE_QUSGMII: 121 return 4; 122 case PHY_INTERFACE_MODE_MAX: 123 WARN_ONCE(1, "PHY_INTERFACE_MODE_MAX isn't a valid interface mode"); 124 return 0; 125 } 126 return 0; 127 } 128 EXPORT_SYMBOL_GPL(phy_interface_num_ports); 129 130 /* A mapping of all SUPPORTED settings to speed/duplex. This table 131 * must be grouped by speed and sorted in descending match priority 132 * - iow, descending speed. 133 */ 134 135 #define PHY_SETTING(s, d, b) { .speed = SPEED_ ## s, .duplex = DUPLEX_ ## d, \ 136 .bit = ETHTOOL_LINK_MODE_ ## b ## _BIT} 137 138 static const struct phy_setting settings[] = { 139 /* 400G */ 140 PHY_SETTING( 400000, FULL, 400000baseCR8_Full ), 141 PHY_SETTING( 400000, FULL, 400000baseKR8_Full ), 142 PHY_SETTING( 400000, FULL, 400000baseLR8_ER8_FR8_Full ), 143 PHY_SETTING( 400000, FULL, 400000baseDR8_Full ), 144 PHY_SETTING( 400000, FULL, 400000baseSR8_Full ), 145 PHY_SETTING( 400000, FULL, 400000baseCR4_Full ), 146 PHY_SETTING( 400000, FULL, 400000baseKR4_Full ), 147 PHY_SETTING( 400000, FULL, 400000baseLR4_ER4_FR4_Full ), 148 PHY_SETTING( 400000, FULL, 400000baseDR4_Full ), 149 PHY_SETTING( 400000, FULL, 400000baseSR4_Full ), 150 /* 200G */ 151 PHY_SETTING( 200000, FULL, 200000baseCR4_Full ), 152 PHY_SETTING( 200000, FULL, 200000baseKR4_Full ), 153 PHY_SETTING( 200000, FULL, 200000baseLR4_ER4_FR4_Full ), 154 PHY_SETTING( 200000, FULL, 200000baseDR4_Full ), 155 PHY_SETTING( 200000, FULL, 200000baseSR4_Full ), 156 PHY_SETTING( 200000, FULL, 200000baseCR2_Full ), 157 PHY_SETTING( 200000, FULL, 200000baseKR2_Full ), 158 PHY_SETTING( 200000, FULL, 200000baseLR2_ER2_FR2_Full ), 159 PHY_SETTING( 200000, FULL, 200000baseDR2_Full ), 160 PHY_SETTING( 200000, FULL, 200000baseSR2_Full ), 161 /* 100G */ 162 PHY_SETTING( 100000, FULL, 100000baseCR4_Full ), 163 PHY_SETTING( 100000, FULL, 100000baseKR4_Full ), 164 PHY_SETTING( 100000, FULL, 100000baseLR4_ER4_Full ), 165 PHY_SETTING( 100000, FULL, 100000baseSR4_Full ), 166 PHY_SETTING( 100000, FULL, 100000baseCR2_Full ), 167 PHY_SETTING( 100000, FULL, 100000baseKR2_Full ), 168 PHY_SETTING( 100000, FULL, 100000baseLR2_ER2_FR2_Full ), 169 PHY_SETTING( 100000, FULL, 100000baseDR2_Full ), 170 PHY_SETTING( 100000, FULL, 100000baseSR2_Full ), 171 PHY_SETTING( 100000, FULL, 100000baseCR_Full ), 172 PHY_SETTING( 100000, FULL, 100000baseKR_Full ), 173 PHY_SETTING( 100000, FULL, 100000baseLR_ER_FR_Full ), 174 PHY_SETTING( 100000, FULL, 100000baseDR_Full ), 175 PHY_SETTING( 100000, FULL, 100000baseSR_Full ), 176 /* 56G */ 177 PHY_SETTING( 56000, FULL, 56000baseCR4_Full ), 178 PHY_SETTING( 56000, FULL, 56000baseKR4_Full ), 179 PHY_SETTING( 56000, FULL, 56000baseLR4_Full ), 180 PHY_SETTING( 56000, FULL, 56000baseSR4_Full ), 181 /* 50G */ 182 PHY_SETTING( 50000, FULL, 50000baseCR2_Full ), 183 PHY_SETTING( 50000, FULL, 50000baseKR2_Full ), 184 PHY_SETTING( 50000, FULL, 50000baseSR2_Full ), 185 PHY_SETTING( 50000, FULL, 50000baseCR_Full ), 186 PHY_SETTING( 50000, FULL, 50000baseKR_Full ), 187 PHY_SETTING( 50000, FULL, 50000baseLR_ER_FR_Full ), 188 PHY_SETTING( 50000, FULL, 50000baseDR_Full ), 189 PHY_SETTING( 50000, FULL, 50000baseSR_Full ), 190 /* 40G */ 191 PHY_SETTING( 40000, FULL, 40000baseCR4_Full ), 192 PHY_SETTING( 40000, FULL, 40000baseKR4_Full ), 193 PHY_SETTING( 40000, FULL, 40000baseLR4_Full ), 194 PHY_SETTING( 40000, FULL, 40000baseSR4_Full ), 195 /* 25G */ 196 PHY_SETTING( 25000, FULL, 25000baseCR_Full ), 197 PHY_SETTING( 25000, FULL, 25000baseKR_Full ), 198 PHY_SETTING( 25000, FULL, 25000baseSR_Full ), 199 /* 20G */ 200 PHY_SETTING( 20000, FULL, 20000baseKR2_Full ), 201 PHY_SETTING( 20000, FULL, 20000baseMLD2_Full ), 202 /* 10G */ 203 PHY_SETTING( 10000, FULL, 10000baseCR_Full ), 204 PHY_SETTING( 10000, FULL, 10000baseER_Full ), 205 PHY_SETTING( 10000, FULL, 10000baseKR_Full ), 206 PHY_SETTING( 10000, FULL, 10000baseKX4_Full ), 207 PHY_SETTING( 10000, FULL, 10000baseLR_Full ), 208 PHY_SETTING( 10000, FULL, 10000baseLRM_Full ), 209 PHY_SETTING( 10000, FULL, 10000baseR_FEC ), 210 PHY_SETTING( 10000, FULL, 10000baseSR_Full ), 211 PHY_SETTING( 10000, FULL, 10000baseT_Full ), 212 /* 5G */ 213 PHY_SETTING( 5000, FULL, 5000baseT_Full ), 214 /* 2.5G */ 215 PHY_SETTING( 2500, FULL, 2500baseT_Full ), 216 PHY_SETTING( 2500, FULL, 2500baseX_Full ), 217 /* 1G */ 218 PHY_SETTING( 1000, FULL, 1000baseT_Full ), 219 PHY_SETTING( 1000, HALF, 1000baseT_Half ), 220 PHY_SETTING( 1000, FULL, 1000baseT1_Full ), 221 PHY_SETTING( 1000, FULL, 1000baseX_Full ), 222 PHY_SETTING( 1000, FULL, 1000baseKX_Full ), 223 /* 100M */ 224 PHY_SETTING( 100, FULL, 100baseT_Full ), 225 PHY_SETTING( 100, FULL, 100baseT1_Full ), 226 PHY_SETTING( 100, HALF, 100baseT_Half ), 227 PHY_SETTING( 100, HALF, 100baseFX_Half ), 228 PHY_SETTING( 100, FULL, 100baseFX_Full ), 229 /* 10M */ 230 PHY_SETTING( 10, FULL, 10baseT_Full ), 231 PHY_SETTING( 10, HALF, 10baseT_Half ), 232 PHY_SETTING( 10, FULL, 10baseT1L_Full ), 233 }; 234 #undef PHY_SETTING 235 236 /** 237 * phy_lookup_setting - lookup a PHY setting 238 * @speed: speed to match 239 * @duplex: duplex to match 240 * @mask: allowed link modes 241 * @exact: an exact match is required 242 * 243 * Search the settings array for a setting that matches the speed and 244 * duplex, and which is supported. 245 * 246 * If @exact is unset, either an exact match or %NULL for no match will 247 * be returned. 248 * 249 * If @exact is set, an exact match, the fastest supported setting at 250 * or below the specified speed, the slowest supported setting, or if 251 * they all fail, %NULL will be returned. 252 */ 253 const struct phy_setting * 254 phy_lookup_setting(int speed, int duplex, const unsigned long *mask, bool exact) 255 { 256 const struct phy_setting *p, *match = NULL, *last = NULL; 257 int i; 258 259 for (i = 0, p = settings; i < ARRAY_SIZE(settings); i++, p++) { 260 if (p->bit < __ETHTOOL_LINK_MODE_MASK_NBITS && 261 test_bit(p->bit, mask)) { 262 last = p; 263 if (p->speed == speed && p->duplex == duplex) { 264 /* Exact match for speed and duplex */ 265 match = p; 266 break; 267 } else if (!exact) { 268 if (!match && p->speed <= speed) 269 /* Candidate */ 270 match = p; 271 272 if (p->speed < speed) 273 break; 274 } 275 } 276 } 277 278 if (!match && !exact) 279 match = last; 280 281 return match; 282 } 283 EXPORT_SYMBOL_GPL(phy_lookup_setting); 284 285 size_t phy_speeds(unsigned int *speeds, size_t size, 286 unsigned long *mask) 287 { 288 size_t count; 289 int i; 290 291 for (i = 0, count = 0; i < ARRAY_SIZE(settings) && count < size; i++) 292 if (settings[i].bit < __ETHTOOL_LINK_MODE_MASK_NBITS && 293 test_bit(settings[i].bit, mask) && 294 (count == 0 || speeds[count - 1] != settings[i].speed)) 295 speeds[count++] = settings[i].speed; 296 297 return count; 298 } 299 300 static void __set_linkmode_max_speed(u32 max_speed, unsigned long *addr) 301 { 302 const struct phy_setting *p; 303 int i; 304 305 for (i = 0, p = settings; i < ARRAY_SIZE(settings); i++, p++) { 306 if (p->speed > max_speed) 307 linkmode_clear_bit(p->bit, addr); 308 else 309 break; 310 } 311 } 312 313 static void __set_phy_supported(struct phy_device *phydev, u32 max_speed) 314 { 315 __set_linkmode_max_speed(max_speed, phydev->supported); 316 } 317 318 /** 319 * phy_set_max_speed - Set the maximum speed the PHY should support 320 * 321 * @phydev: The phy_device struct 322 * @max_speed: Maximum speed 323 * 324 * The PHY might be more capable than the MAC. For example a Fast Ethernet 325 * is connected to a 1G PHY. This function allows the MAC to indicate its 326 * maximum speed, and so limit what the PHY will advertise. 327 */ 328 void phy_set_max_speed(struct phy_device *phydev, u32 max_speed) 329 { 330 __set_phy_supported(phydev, max_speed); 331 332 phy_advertise_supported(phydev); 333 } 334 EXPORT_SYMBOL(phy_set_max_speed); 335 336 void of_set_phy_supported(struct phy_device *phydev) 337 { 338 struct device_node *node = phydev->mdio.dev.of_node; 339 u32 max_speed; 340 341 if (!IS_ENABLED(CONFIG_OF_MDIO)) 342 return; 343 344 if (!node) 345 return; 346 347 if (!of_property_read_u32(node, "max-speed", &max_speed)) 348 __set_phy_supported(phydev, max_speed); 349 } 350 351 void of_set_phy_eee_broken(struct phy_device *phydev) 352 { 353 struct device_node *node = phydev->mdio.dev.of_node; 354 u32 broken = 0; 355 356 if (!IS_ENABLED(CONFIG_OF_MDIO)) 357 return; 358 359 if (!node) 360 return; 361 362 if (of_property_read_bool(node, "eee-broken-100tx")) 363 broken |= MDIO_EEE_100TX; 364 if (of_property_read_bool(node, "eee-broken-1000t")) 365 broken |= MDIO_EEE_1000T; 366 if (of_property_read_bool(node, "eee-broken-10gt")) 367 broken |= MDIO_EEE_10GT; 368 if (of_property_read_bool(node, "eee-broken-1000kx")) 369 broken |= MDIO_EEE_1000KX; 370 if (of_property_read_bool(node, "eee-broken-10gkx4")) 371 broken |= MDIO_EEE_10GKX4; 372 if (of_property_read_bool(node, "eee-broken-10gkr")) 373 broken |= MDIO_EEE_10GKR; 374 375 phydev->eee_broken_modes = broken; 376 } 377 378 /** 379 * phy_resolve_aneg_pause - Determine pause autoneg results 380 * 381 * @phydev: The phy_device struct 382 * 383 * Once autoneg has completed the local pause settings can be 384 * resolved. Determine if pause and asymmetric pause should be used 385 * by the MAC. 386 */ 387 388 void phy_resolve_aneg_pause(struct phy_device *phydev) 389 { 390 if (phydev->duplex == DUPLEX_FULL) { 391 phydev->pause = linkmode_test_bit(ETHTOOL_LINK_MODE_Pause_BIT, 392 phydev->lp_advertising); 393 phydev->asym_pause = linkmode_test_bit( 394 ETHTOOL_LINK_MODE_Asym_Pause_BIT, 395 phydev->lp_advertising); 396 } 397 } 398 EXPORT_SYMBOL_GPL(phy_resolve_aneg_pause); 399 400 /** 401 * phy_resolve_aneg_linkmode - resolve the advertisements into PHY settings 402 * @phydev: The phy_device struct 403 * 404 * Resolve our and the link partner advertisements into their corresponding 405 * speed and duplex. If full duplex was negotiated, extract the pause mode 406 * from the link partner mask. 407 */ 408 void phy_resolve_aneg_linkmode(struct phy_device *phydev) 409 { 410 __ETHTOOL_DECLARE_LINK_MODE_MASK(common); 411 int i; 412 413 linkmode_and(common, phydev->lp_advertising, phydev->advertising); 414 415 for (i = 0; i < ARRAY_SIZE(settings); i++) 416 if (test_bit(settings[i].bit, common)) { 417 phydev->speed = settings[i].speed; 418 phydev->duplex = settings[i].duplex; 419 break; 420 } 421 422 phy_resolve_aneg_pause(phydev); 423 } 424 EXPORT_SYMBOL_GPL(phy_resolve_aneg_linkmode); 425 426 /** 427 * phy_check_downshift - check whether downshift occurred 428 * @phydev: The phy_device struct 429 * 430 * Check whether a downshift to a lower speed occurred. If this should be the 431 * case warn the user. 432 * Prerequisite for detecting downshift is that PHY driver implements the 433 * read_status callback and sets phydev->speed to the actual link speed. 434 */ 435 void phy_check_downshift(struct phy_device *phydev) 436 { 437 __ETHTOOL_DECLARE_LINK_MODE_MASK(common); 438 int i, speed = SPEED_UNKNOWN; 439 440 phydev->downshifted_rate = 0; 441 442 if (phydev->autoneg == AUTONEG_DISABLE || 443 phydev->speed == SPEED_UNKNOWN) 444 return; 445 446 linkmode_and(common, phydev->lp_advertising, phydev->advertising); 447 448 for (i = 0; i < ARRAY_SIZE(settings); i++) 449 if (test_bit(settings[i].bit, common)) { 450 speed = settings[i].speed; 451 break; 452 } 453 454 if (speed == SPEED_UNKNOWN || phydev->speed >= speed) 455 return; 456 457 phydev_warn(phydev, "Downshift occurred from negotiated speed %s to actual speed %s, check cabling!\n", 458 phy_speed_to_str(speed), phy_speed_to_str(phydev->speed)); 459 460 phydev->downshifted_rate = 1; 461 } 462 EXPORT_SYMBOL_GPL(phy_check_downshift); 463 464 static int phy_resolve_min_speed(struct phy_device *phydev, bool fdx_only) 465 { 466 __ETHTOOL_DECLARE_LINK_MODE_MASK(common); 467 int i = ARRAY_SIZE(settings); 468 469 linkmode_and(common, phydev->lp_advertising, phydev->advertising); 470 471 while (--i >= 0) { 472 if (test_bit(settings[i].bit, common)) { 473 if (fdx_only && settings[i].duplex != DUPLEX_FULL) 474 continue; 475 return settings[i].speed; 476 } 477 } 478 479 return SPEED_UNKNOWN; 480 } 481 482 int phy_speed_down_core(struct phy_device *phydev) 483 { 484 int min_common_speed = phy_resolve_min_speed(phydev, true); 485 486 if (min_common_speed == SPEED_UNKNOWN) 487 return -EINVAL; 488 489 __set_linkmode_max_speed(min_common_speed, phydev->advertising); 490 491 return 0; 492 } 493 494 static void mmd_phy_indirect(struct mii_bus *bus, int phy_addr, int devad, 495 u16 regnum) 496 { 497 /* Write the desired MMD Devad */ 498 __mdiobus_write(bus, phy_addr, MII_MMD_CTRL, devad); 499 500 /* Write the desired MMD register address */ 501 __mdiobus_write(bus, phy_addr, MII_MMD_DATA, regnum); 502 503 /* Select the Function : DATA with no post increment */ 504 __mdiobus_write(bus, phy_addr, MII_MMD_CTRL, 505 devad | MII_MMD_CTRL_NOINCR); 506 } 507 508 /** 509 * __phy_read_mmd - Convenience function for reading a register 510 * from an MMD on a given PHY. 511 * @phydev: The phy_device struct 512 * @devad: The MMD to read from (0..31) 513 * @regnum: The register on the MMD to read (0..65535) 514 * 515 * Same rules as for __phy_read(); 516 */ 517 int __phy_read_mmd(struct phy_device *phydev, int devad, u32 regnum) 518 { 519 int val; 520 521 if (regnum > (u16)~0 || devad > 32) 522 return -EINVAL; 523 524 if (phydev->drv && phydev->drv->read_mmd) { 525 val = phydev->drv->read_mmd(phydev, devad, regnum); 526 } else if (phydev->is_c45) { 527 val = __mdiobus_c45_read(phydev->mdio.bus, phydev->mdio.addr, 528 devad, regnum); 529 } else { 530 struct mii_bus *bus = phydev->mdio.bus; 531 int phy_addr = phydev->mdio.addr; 532 533 mmd_phy_indirect(bus, phy_addr, devad, regnum); 534 535 /* Read the content of the MMD's selected register */ 536 val = __mdiobus_read(bus, phy_addr, MII_MMD_DATA); 537 } 538 return val; 539 } 540 EXPORT_SYMBOL(__phy_read_mmd); 541 542 /** 543 * phy_read_mmd - Convenience function for reading a register 544 * from an MMD on a given PHY. 545 * @phydev: The phy_device struct 546 * @devad: The MMD to read from 547 * @regnum: The register on the MMD to read 548 * 549 * Same rules as for phy_read(); 550 */ 551 int phy_read_mmd(struct phy_device *phydev, int devad, u32 regnum) 552 { 553 int ret; 554 555 phy_lock_mdio_bus(phydev); 556 ret = __phy_read_mmd(phydev, devad, regnum); 557 phy_unlock_mdio_bus(phydev); 558 559 return ret; 560 } 561 EXPORT_SYMBOL(phy_read_mmd); 562 563 /** 564 * __phy_write_mmd - Convenience function for writing a register 565 * on an MMD on a given PHY. 566 * @phydev: The phy_device struct 567 * @devad: The MMD to read from 568 * @regnum: The register on the MMD to read 569 * @val: value to write to @regnum 570 * 571 * Same rules as for __phy_write(); 572 */ 573 int __phy_write_mmd(struct phy_device *phydev, int devad, u32 regnum, u16 val) 574 { 575 int ret; 576 577 if (regnum > (u16)~0 || devad > 32) 578 return -EINVAL; 579 580 if (phydev->drv && phydev->drv->write_mmd) { 581 ret = phydev->drv->write_mmd(phydev, devad, regnum, val); 582 } else if (phydev->is_c45) { 583 ret = __mdiobus_c45_write(phydev->mdio.bus, phydev->mdio.addr, 584 devad, regnum, val); 585 } else { 586 struct mii_bus *bus = phydev->mdio.bus; 587 int phy_addr = phydev->mdio.addr; 588 589 mmd_phy_indirect(bus, phy_addr, devad, regnum); 590 591 /* Write the data into MMD's selected register */ 592 __mdiobus_write(bus, phy_addr, MII_MMD_DATA, val); 593 594 ret = 0; 595 } 596 return ret; 597 } 598 EXPORT_SYMBOL(__phy_write_mmd); 599 600 /** 601 * phy_write_mmd - Convenience function for writing a register 602 * on an MMD on a given PHY. 603 * @phydev: The phy_device struct 604 * @devad: The MMD to read from 605 * @regnum: The register on the MMD to read 606 * @val: value to write to @regnum 607 * 608 * Same rules as for phy_write(); 609 */ 610 int phy_write_mmd(struct phy_device *phydev, int devad, u32 regnum, u16 val) 611 { 612 int ret; 613 614 phy_lock_mdio_bus(phydev); 615 ret = __phy_write_mmd(phydev, devad, regnum, val); 616 phy_unlock_mdio_bus(phydev); 617 618 return ret; 619 } 620 EXPORT_SYMBOL(phy_write_mmd); 621 622 /** 623 * phy_modify_changed - Function for modifying a PHY register 624 * @phydev: the phy_device struct 625 * @regnum: register number to modify 626 * @mask: bit mask of bits to clear 627 * @set: new value of bits set in mask to write to @regnum 628 * 629 * NOTE: MUST NOT be called from interrupt context, 630 * because the bus read/write functions may wait for an interrupt 631 * to conclude the operation. 632 * 633 * Returns negative errno, 0 if there was no change, and 1 in case of change 634 */ 635 int phy_modify_changed(struct phy_device *phydev, u32 regnum, u16 mask, u16 set) 636 { 637 int ret; 638 639 phy_lock_mdio_bus(phydev); 640 ret = __phy_modify_changed(phydev, regnum, mask, set); 641 phy_unlock_mdio_bus(phydev); 642 643 return ret; 644 } 645 EXPORT_SYMBOL_GPL(phy_modify_changed); 646 647 /** 648 * __phy_modify - Convenience function for modifying a PHY register 649 * @phydev: the phy_device struct 650 * @regnum: register number to modify 651 * @mask: bit mask of bits to clear 652 * @set: new value of bits set in mask to write to @regnum 653 * 654 * NOTE: MUST NOT be called from interrupt context, 655 * because the bus read/write functions may wait for an interrupt 656 * to conclude the operation. 657 */ 658 int __phy_modify(struct phy_device *phydev, u32 regnum, u16 mask, u16 set) 659 { 660 int ret; 661 662 ret = __phy_modify_changed(phydev, regnum, mask, set); 663 664 return ret < 0 ? ret : 0; 665 } 666 EXPORT_SYMBOL_GPL(__phy_modify); 667 668 /** 669 * phy_modify - Convenience function for modifying a given PHY register 670 * @phydev: the phy_device struct 671 * @regnum: register number to write 672 * @mask: bit mask of bits to clear 673 * @set: new value of bits set in mask to write to @regnum 674 * 675 * NOTE: MUST NOT be called from interrupt context, 676 * because the bus read/write functions may wait for an interrupt 677 * to conclude the operation. 678 */ 679 int phy_modify(struct phy_device *phydev, u32 regnum, u16 mask, u16 set) 680 { 681 int ret; 682 683 phy_lock_mdio_bus(phydev); 684 ret = __phy_modify(phydev, regnum, mask, set); 685 phy_unlock_mdio_bus(phydev); 686 687 return ret; 688 } 689 EXPORT_SYMBOL_GPL(phy_modify); 690 691 /** 692 * __phy_modify_mmd_changed - Function for modifying a register on MMD 693 * @phydev: the phy_device struct 694 * @devad: the MMD containing register to modify 695 * @regnum: register number to modify 696 * @mask: bit mask of bits to clear 697 * @set: new value of bits set in mask to write to @regnum 698 * 699 * Unlocked helper function which allows a MMD register to be modified as 700 * new register value = (old register value & ~mask) | set 701 * 702 * Returns negative errno, 0 if there was no change, and 1 in case of change 703 */ 704 int __phy_modify_mmd_changed(struct phy_device *phydev, int devad, u32 regnum, 705 u16 mask, u16 set) 706 { 707 int new, ret; 708 709 ret = __phy_read_mmd(phydev, devad, regnum); 710 if (ret < 0) 711 return ret; 712 713 new = (ret & ~mask) | set; 714 if (new == ret) 715 return 0; 716 717 ret = __phy_write_mmd(phydev, devad, regnum, new); 718 719 return ret < 0 ? ret : 1; 720 } 721 EXPORT_SYMBOL_GPL(__phy_modify_mmd_changed); 722 723 /** 724 * phy_modify_mmd_changed - Function for modifying a register on MMD 725 * @phydev: the phy_device struct 726 * @devad: the MMD containing register to modify 727 * @regnum: register number to modify 728 * @mask: bit mask of bits to clear 729 * @set: new value of bits set in mask to write to @regnum 730 * 731 * NOTE: MUST NOT be called from interrupt context, 732 * because the bus read/write functions may wait for an interrupt 733 * to conclude the operation. 734 * 735 * Returns negative errno, 0 if there was no change, and 1 in case of change 736 */ 737 int phy_modify_mmd_changed(struct phy_device *phydev, int devad, u32 regnum, 738 u16 mask, u16 set) 739 { 740 int ret; 741 742 phy_lock_mdio_bus(phydev); 743 ret = __phy_modify_mmd_changed(phydev, devad, regnum, mask, set); 744 phy_unlock_mdio_bus(phydev); 745 746 return ret; 747 } 748 EXPORT_SYMBOL_GPL(phy_modify_mmd_changed); 749 750 /** 751 * __phy_modify_mmd - Convenience function for modifying a register on MMD 752 * @phydev: the phy_device struct 753 * @devad: the MMD containing register to modify 754 * @regnum: register number to modify 755 * @mask: bit mask of bits to clear 756 * @set: new value of bits set in mask to write to @regnum 757 * 758 * NOTE: MUST NOT be called from interrupt context, 759 * because the bus read/write functions may wait for an interrupt 760 * to conclude the operation. 761 */ 762 int __phy_modify_mmd(struct phy_device *phydev, int devad, u32 regnum, 763 u16 mask, u16 set) 764 { 765 int ret; 766 767 ret = __phy_modify_mmd_changed(phydev, devad, regnum, mask, set); 768 769 return ret < 0 ? ret : 0; 770 } 771 EXPORT_SYMBOL_GPL(__phy_modify_mmd); 772 773 /** 774 * phy_modify_mmd - Convenience function for modifying a register on MMD 775 * @phydev: the phy_device struct 776 * @devad: the MMD containing register to modify 777 * @regnum: register number to modify 778 * @mask: bit mask of bits to clear 779 * @set: new value of bits set in mask to write to @regnum 780 * 781 * NOTE: MUST NOT be called from interrupt context, 782 * because the bus read/write functions may wait for an interrupt 783 * to conclude the operation. 784 */ 785 int phy_modify_mmd(struct phy_device *phydev, int devad, u32 regnum, 786 u16 mask, u16 set) 787 { 788 int ret; 789 790 phy_lock_mdio_bus(phydev); 791 ret = __phy_modify_mmd(phydev, devad, regnum, mask, set); 792 phy_unlock_mdio_bus(phydev); 793 794 return ret; 795 } 796 EXPORT_SYMBOL_GPL(phy_modify_mmd); 797 798 static int __phy_read_page(struct phy_device *phydev) 799 { 800 if (WARN_ONCE(!phydev->drv->read_page, "read_page callback not available, PHY driver not loaded?\n")) 801 return -EOPNOTSUPP; 802 803 return phydev->drv->read_page(phydev); 804 } 805 806 static int __phy_write_page(struct phy_device *phydev, int page) 807 { 808 if (WARN_ONCE(!phydev->drv->write_page, "write_page callback not available, PHY driver not loaded?\n")) 809 return -EOPNOTSUPP; 810 811 return phydev->drv->write_page(phydev, page); 812 } 813 814 /** 815 * phy_save_page() - take the bus lock and save the current page 816 * @phydev: a pointer to a &struct phy_device 817 * 818 * Take the MDIO bus lock, and return the current page number. On error, 819 * returns a negative errno. phy_restore_page() must always be called 820 * after this, irrespective of success or failure of this call. 821 */ 822 int phy_save_page(struct phy_device *phydev) 823 { 824 phy_lock_mdio_bus(phydev); 825 return __phy_read_page(phydev); 826 } 827 EXPORT_SYMBOL_GPL(phy_save_page); 828 829 /** 830 * phy_select_page() - take the bus lock, save the current page, and set a page 831 * @phydev: a pointer to a &struct phy_device 832 * @page: desired page 833 * 834 * Take the MDIO bus lock to protect against concurrent access, save the 835 * current PHY page, and set the current page. On error, returns a 836 * negative errno, otherwise returns the previous page number. 837 * phy_restore_page() must always be called after this, irrespective 838 * of success or failure of this call. 839 */ 840 int phy_select_page(struct phy_device *phydev, int page) 841 { 842 int ret, oldpage; 843 844 oldpage = ret = phy_save_page(phydev); 845 if (ret < 0) 846 return ret; 847 848 if (oldpage != page) { 849 ret = __phy_write_page(phydev, page); 850 if (ret < 0) 851 return ret; 852 } 853 854 return oldpage; 855 } 856 EXPORT_SYMBOL_GPL(phy_select_page); 857 858 /** 859 * phy_restore_page() - restore the page register and release the bus lock 860 * @phydev: a pointer to a &struct phy_device 861 * @oldpage: the old page, return value from phy_save_page() or phy_select_page() 862 * @ret: operation's return code 863 * 864 * Release the MDIO bus lock, restoring @oldpage if it is a valid page. 865 * This function propagates the earliest error code from the group of 866 * operations. 867 * 868 * Returns: 869 * @oldpage if it was a negative value, otherwise 870 * @ret if it was a negative errno value, otherwise 871 * phy_write_page()'s negative value if it were in error, otherwise 872 * @ret. 873 */ 874 int phy_restore_page(struct phy_device *phydev, int oldpage, int ret) 875 { 876 int r; 877 878 if (oldpage >= 0) { 879 r = __phy_write_page(phydev, oldpage); 880 881 /* Propagate the operation return code if the page write 882 * was successful. 883 */ 884 if (ret >= 0 && r < 0) 885 ret = r; 886 } else { 887 /* Propagate the phy page selection error code */ 888 ret = oldpage; 889 } 890 891 phy_unlock_mdio_bus(phydev); 892 893 return ret; 894 } 895 EXPORT_SYMBOL_GPL(phy_restore_page); 896 897 /** 898 * phy_read_paged() - Convenience function for reading a paged register 899 * @phydev: a pointer to a &struct phy_device 900 * @page: the page for the phy 901 * @regnum: register number 902 * 903 * Same rules as for phy_read(). 904 */ 905 int phy_read_paged(struct phy_device *phydev, int page, u32 regnum) 906 { 907 int ret = 0, oldpage; 908 909 oldpage = phy_select_page(phydev, page); 910 if (oldpage >= 0) 911 ret = __phy_read(phydev, regnum); 912 913 return phy_restore_page(phydev, oldpage, ret); 914 } 915 EXPORT_SYMBOL(phy_read_paged); 916 917 /** 918 * phy_write_paged() - Convenience function for writing a paged register 919 * @phydev: a pointer to a &struct phy_device 920 * @page: the page for the phy 921 * @regnum: register number 922 * @val: value to write 923 * 924 * Same rules as for phy_write(). 925 */ 926 int phy_write_paged(struct phy_device *phydev, int page, u32 regnum, u16 val) 927 { 928 int ret = 0, oldpage; 929 930 oldpage = phy_select_page(phydev, page); 931 if (oldpage >= 0) 932 ret = __phy_write(phydev, regnum, val); 933 934 return phy_restore_page(phydev, oldpage, ret); 935 } 936 EXPORT_SYMBOL(phy_write_paged); 937 938 /** 939 * phy_modify_paged_changed() - Function for modifying a paged register 940 * @phydev: a pointer to a &struct phy_device 941 * @page: the page for the phy 942 * @regnum: register number 943 * @mask: bit mask of bits to clear 944 * @set: bit mask of bits to set 945 * 946 * Returns negative errno, 0 if there was no change, and 1 in case of change 947 */ 948 int phy_modify_paged_changed(struct phy_device *phydev, int page, u32 regnum, 949 u16 mask, u16 set) 950 { 951 int ret = 0, oldpage; 952 953 oldpage = phy_select_page(phydev, page); 954 if (oldpage >= 0) 955 ret = __phy_modify_changed(phydev, regnum, mask, set); 956 957 return phy_restore_page(phydev, oldpage, ret); 958 } 959 EXPORT_SYMBOL(phy_modify_paged_changed); 960 961 /** 962 * phy_modify_paged() - Convenience function for modifying a paged register 963 * @phydev: a pointer to a &struct phy_device 964 * @page: the page for the phy 965 * @regnum: register number 966 * @mask: bit mask of bits to clear 967 * @set: bit mask of bits to set 968 * 969 * Same rules as for phy_read() and phy_write(). 970 */ 971 int phy_modify_paged(struct phy_device *phydev, int page, u32 regnum, 972 u16 mask, u16 set) 973 { 974 int ret = phy_modify_paged_changed(phydev, page, regnum, mask, set); 975 976 return ret < 0 ? ret : 0; 977 } 978 EXPORT_SYMBOL(phy_modify_paged); 979