1 // SPDX-License-Identifier: GPL-2.0+ 2 #include <linux/bitfield.h> 3 #include <linux/module.h> 4 #include <linux/phy.h> 5 6 #include "mtk.h" 7 8 #define MTK_EXT_PAGE_ACCESS 0x1f 9 #define MTK_PHY_PAGE_STANDARD 0x0000 10 #define MTK_PHY_PAGE_EXTENDED 0x0001 11 #define MTK_PHY_PAGE_EXTENDED_2 0x0002 12 #define MTK_PHY_PAGE_EXTENDED_3 0x0003 13 #define MTK_PHY_PAGE_EXTENDED_2A30 0x2a30 14 #define MTK_PHY_PAGE_EXTENDED_52B5 0x52b5 15 16 static void mtk_gephy_config_init(struct phy_device *phydev) 17 { 18 /* Enable HW auto downshift */ 19 phy_modify_paged(phydev, MTK_PHY_PAGE_EXTENDED, 0x14, 0, BIT(4)); 20 21 /* Increase SlvDPSready time */ 22 phy_select_page(phydev, MTK_PHY_PAGE_EXTENDED_52B5); 23 __phy_write(phydev, 0x10, 0xafae); 24 __phy_write(phydev, 0x12, 0x2f); 25 __phy_write(phydev, 0x10, 0x8fae); 26 phy_restore_page(phydev, MTK_PHY_PAGE_STANDARD, 0); 27 28 /* Adjust 100_mse_threshold */ 29 phy_write_mmd(phydev, MDIO_MMD_VEND1, 0x123, 0xffff); 30 31 /* Disable mcc */ 32 phy_write_mmd(phydev, MDIO_MMD_VEND1, 0xa6, 0x300); 33 } 34 35 static int mt7530_phy_config_init(struct phy_device *phydev) 36 { 37 mtk_gephy_config_init(phydev); 38 39 /* Increase post_update_timer */ 40 phy_write_paged(phydev, MTK_PHY_PAGE_EXTENDED_3, 0x11, 0x4b); 41 42 return 0; 43 } 44 45 static int mt7531_phy_config_init(struct phy_device *phydev) 46 { 47 mtk_gephy_config_init(phydev); 48 49 /* PHY link down power saving enable */ 50 phy_set_bits(phydev, 0x17, BIT(4)); 51 phy_clear_bits_mmd(phydev, MDIO_MMD_VEND1, 0xc6, 0x300); 52 53 /* Set TX Pair delay selection */ 54 phy_write_mmd(phydev, MDIO_MMD_VEND1, 0x13, 0x404); 55 phy_write_mmd(phydev, MDIO_MMD_VEND1, 0x14, 0x404); 56 57 return 0; 58 } 59 60 static struct phy_driver mtk_gephy_driver[] = { 61 { 62 PHY_ID_MATCH_EXACT(0x03a29412), 63 .name = "MediaTek MT7530 PHY", 64 .config_init = mt7530_phy_config_init, 65 /* Interrupts are handled by the switch, not the PHY 66 * itself. 67 */ 68 .config_intr = genphy_no_config_intr, 69 .handle_interrupt = genphy_handle_interrupt_no_ack, 70 .suspend = genphy_suspend, 71 .resume = genphy_resume, 72 .read_page = mtk_phy_read_page, 73 .write_page = mtk_phy_write_page, 74 }, 75 { 76 PHY_ID_MATCH_EXACT(0x03a29441), 77 .name = "MediaTek MT7531 PHY", 78 .config_init = mt7531_phy_config_init, 79 /* Interrupts are handled by the switch, not the PHY 80 * itself. 81 */ 82 .config_intr = genphy_no_config_intr, 83 .handle_interrupt = genphy_handle_interrupt_no_ack, 84 .suspend = genphy_suspend, 85 .resume = genphy_resume, 86 .read_page = mtk_phy_read_page, 87 .write_page = mtk_phy_write_page, 88 }, 89 }; 90 91 module_phy_driver(mtk_gephy_driver); 92 93 static struct mdio_device_id __maybe_unused mtk_gephy_tbl[] = { 94 { PHY_ID_MATCH_EXACT(0x03a29441) }, 95 { PHY_ID_MATCH_EXACT(0x03a29412) }, 96 { } 97 }; 98 99 MODULE_DESCRIPTION("MediaTek Gigabit Ethernet PHY driver"); 100 MODULE_AUTHOR("DENG, Qingfang <dqfext@gmail.com>"); 101 MODULE_LICENSE("GPL"); 102 103 MODULE_DEVICE_TABLE(mdio, mtk_gephy_tbl); 104