xref: /linux/drivers/net/phy/mediatek/mtk-fe-soc.c (revision 91ec2035134982b98fab0609a9fd8480e8217dc1)
1*c9c23577SJoris Vaisvila // SPDX-License-Identifier: GPL-2.0-only
2*c9c23577SJoris Vaisvila /*
3*c9c23577SJoris Vaisvila  * Driver for MT7628 Embedded Switch internal Fast Ethernet PHYs
4*c9c23577SJoris Vaisvila  */
5*c9c23577SJoris Vaisvila #include <linux/module.h>
6*c9c23577SJoris Vaisvila #include <linux/phy.h>
7*c9c23577SJoris Vaisvila 
8*c9c23577SJoris Vaisvila #define MTK_FPHY_ID_MT7628	0x03a29410
9*c9c23577SJoris Vaisvila #define MTK_EXT_PAGE_ACCESS	0x1f
10*c9c23577SJoris Vaisvila 
mt7628_phy_read_page(struct phy_device * phydev)11*c9c23577SJoris Vaisvila static int mt7628_phy_read_page(struct phy_device *phydev)
12*c9c23577SJoris Vaisvila {
13*c9c23577SJoris Vaisvila 	return __phy_read(phydev, MTK_EXT_PAGE_ACCESS);
14*c9c23577SJoris Vaisvila }
15*c9c23577SJoris Vaisvila 
mt7628_phy_write_page(struct phy_device * phydev,int page)16*c9c23577SJoris Vaisvila static int mt7628_phy_write_page(struct phy_device *phydev, int page)
17*c9c23577SJoris Vaisvila {
18*c9c23577SJoris Vaisvila 	return __phy_write(phydev, MTK_EXT_PAGE_ACCESS, page);
19*c9c23577SJoris Vaisvila }
20*c9c23577SJoris Vaisvila 
mt7628_phy_config_init(struct phy_device * phydev)21*c9c23577SJoris Vaisvila static int mt7628_phy_config_init(struct phy_device *phydev)
22*c9c23577SJoris Vaisvila {
23*c9c23577SJoris Vaisvila 	/*
24*c9c23577SJoris Vaisvila 	 * This undocumented bit is required for the PHYs to be able to
25*c9c23577SJoris Vaisvila 	 * establish 100mbps links.
26*c9c23577SJoris Vaisvila 	 */
27*c9c23577SJoris Vaisvila 	return phy_modify_paged(phydev, 0x8000, 30, BIT(13), BIT(13));
28*c9c23577SJoris Vaisvila }
29*c9c23577SJoris Vaisvila 
30*c9c23577SJoris Vaisvila static struct phy_driver mtk_soc_fe_phy_driver[] = {
31*c9c23577SJoris Vaisvila 	{
32*c9c23577SJoris Vaisvila 		PHY_ID_MATCH_EXACT(MTK_FPHY_ID_MT7628),
33*c9c23577SJoris Vaisvila 		.name		= "MediaTek MT7628 PHY",
34*c9c23577SJoris Vaisvila 		.config_init	= mt7628_phy_config_init,
35*c9c23577SJoris Vaisvila 		.read_page	= mt7628_phy_read_page,
36*c9c23577SJoris Vaisvila 		.write_page	= mt7628_phy_write_page,
37*c9c23577SJoris Vaisvila 		.suspend	= genphy_suspend,
38*c9c23577SJoris Vaisvila 		.resume		= genphy_resume,
39*c9c23577SJoris Vaisvila 	},
40*c9c23577SJoris Vaisvila };
41*c9c23577SJoris Vaisvila 
42*c9c23577SJoris Vaisvila module_phy_driver(mtk_soc_fe_phy_driver);
43*c9c23577SJoris Vaisvila static const struct mdio_device_id __maybe_unused mtk_soc_fe_phy_tbl[] = {
44*c9c23577SJoris Vaisvila 	{ PHY_ID_MATCH_EXACT(MTK_FPHY_ID_MT7628) },
45*c9c23577SJoris Vaisvila 	{ }
46*c9c23577SJoris Vaisvila };
47*c9c23577SJoris Vaisvila 
48*c9c23577SJoris Vaisvila MODULE_DESCRIPTION("MediaTek SoC Fast Ethernet PHY driver");
49*c9c23577SJoris Vaisvila MODULE_AUTHOR("Joris Vaisvila <joey@tinyisr.com>");
50*c9c23577SJoris Vaisvila MODULE_LICENSE("GPL");
51*c9c23577SJoris Vaisvila 
52*c9c23577SJoris Vaisvila MODULE_DEVICE_TABLE(mdio, mtk_soc_fe_phy_tbl);
53