1 // SPDX-License-Identifier: GPL-2.0+ 2 /* 3 * drivers/net/phy/marvell.c 4 * 5 * Driver for Marvell PHYs 6 * 7 * Author: Andy Fleming 8 * 9 * Copyright (c) 2004 Freescale Semiconductor, Inc. 10 * 11 * Copyright (c) 2013 Michael Stapelberg <michael@stapelberg.de> 12 */ 13 #include <linux/kernel.h> 14 #include <linux/string.h> 15 #include <linux/ctype.h> 16 #include <linux/errno.h> 17 #include <linux/unistd.h> 18 #include <linux/hwmon.h> 19 #include <linux/interrupt.h> 20 #include <linux/init.h> 21 #include <linux/delay.h> 22 #include <linux/netdevice.h> 23 #include <linux/etherdevice.h> 24 #include <linux/skbuff.h> 25 #include <linux/spinlock.h> 26 #include <linux/mm.h> 27 #include <linux/module.h> 28 #include <linux/mii.h> 29 #include <linux/ethtool.h> 30 #include <linux/ethtool_netlink.h> 31 #include <linux/phy.h> 32 #include <linux/marvell_phy.h> 33 #include <linux/bitfield.h> 34 #include <linux/of.h> 35 36 #include <linux/io.h> 37 #include <asm/irq.h> 38 #include <linux/uaccess.h> 39 40 #define MII_MARVELL_PHY_PAGE 22 41 #define MII_MARVELL_COPPER_PAGE 0x00 42 #define MII_MARVELL_FIBER_PAGE 0x01 43 #define MII_MARVELL_MSCR_PAGE 0x02 44 #define MII_MARVELL_LED_PAGE 0x03 45 #define MII_MARVELL_VCT5_PAGE 0x05 46 #define MII_MARVELL_MISC_TEST_PAGE 0x06 47 #define MII_MARVELL_VCT7_PAGE 0x07 48 #define MII_MARVELL_WOL_PAGE 0x11 49 50 #define MII_M1011_IEVENT 0x13 51 #define MII_M1011_IEVENT_CLEAR 0x0000 52 53 #define MII_M1011_IMASK 0x12 54 #define MII_M1011_IMASK_INIT 0x6400 55 #define MII_M1011_IMASK_CLEAR 0x0000 56 57 #define MII_M1011_PHY_SCR 0x10 58 #define MII_M1011_PHY_SCR_DOWNSHIFT_EN BIT(11) 59 #define MII_M1011_PHY_SCR_DOWNSHIFT_MASK GENMASK(14, 12) 60 #define MII_M1011_PHY_SCR_DOWNSHIFT_MAX 8 61 #define MII_M1011_PHY_SCR_MDI (0x0 << 5) 62 #define MII_M1011_PHY_SCR_MDI_X (0x1 << 5) 63 #define MII_M1011_PHY_SCR_AUTO_CROSS (0x3 << 5) 64 65 #define MII_M1011_PHY_SSR 0x11 66 #define MII_M1011_PHY_SSR_DOWNSHIFT BIT(5) 67 68 #define MII_M1111_PHY_LED_CONTROL 0x18 69 #define MII_M1111_PHY_LED_DIRECT 0x4100 70 #define MII_M1111_PHY_LED_COMBINE 0x411c 71 #define MII_M1111_PHY_EXT_CR 0x14 72 #define MII_M1111_PHY_EXT_CR_DOWNSHIFT_MASK GENMASK(11, 9) 73 #define MII_M1111_PHY_EXT_CR_DOWNSHIFT_MAX 8 74 #define MII_M1111_PHY_EXT_CR_DOWNSHIFT_EN BIT(8) 75 #define MII_M1111_RGMII_RX_DELAY BIT(7) 76 #define MII_M1111_RGMII_TX_DELAY BIT(1) 77 #define MII_M1111_PHY_EXT_SR 0x1b 78 79 #define MII_M1111_HWCFG_MODE_MASK 0xf 80 #define MII_M1111_HWCFG_MODE_FIBER_RGMII 0x3 81 #define MII_M1111_HWCFG_MODE_SGMII_NO_CLK 0x4 82 #define MII_M1111_HWCFG_MODE_RTBI 0x7 83 #define MII_M1111_HWCFG_MODE_COPPER_1000X_AN 0x8 84 #define MII_M1111_HWCFG_MODE_COPPER_RTBI 0x9 85 #define MII_M1111_HWCFG_MODE_COPPER_RGMII 0xb 86 #define MII_M1111_HWCFG_MODE_COPPER_1000X_NOAN 0xc 87 #define MII_M1111_HWCFG_SERIAL_AN_BYPASS BIT(12) 88 #define MII_M1111_HWCFG_FIBER_COPPER_RES BIT(13) 89 #define MII_M1111_HWCFG_FIBER_COPPER_AUTO BIT(15) 90 91 #define MII_88E1121_PHY_MSCR_REG 21 92 #define MII_88E1121_PHY_MSCR_RX_DELAY BIT(5) 93 #define MII_88E1121_PHY_MSCR_TX_DELAY BIT(4) 94 #define MII_88E1121_PHY_MSCR_DELAY_MASK (BIT(5) | BIT(4)) 95 96 #define MII_88E1121_MISC_TEST 0x1a 97 #define MII_88E1510_MISC_TEST_TEMP_THRESHOLD_MASK 0x1f00 98 #define MII_88E1510_MISC_TEST_TEMP_THRESHOLD_SHIFT 8 99 #define MII_88E1510_MISC_TEST_TEMP_IRQ_EN BIT(7) 100 #define MII_88E1510_MISC_TEST_TEMP_IRQ BIT(6) 101 #define MII_88E1121_MISC_TEST_TEMP_SENSOR_EN BIT(5) 102 #define MII_88E1121_MISC_TEST_TEMP_MASK 0x1f 103 104 #define MII_88E1510_TEMP_SENSOR 0x1b 105 #define MII_88E1510_TEMP_SENSOR_MASK 0xff 106 107 #define MII_88E1540_COPPER_CTRL3 0x1a 108 #define MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_MASK GENMASK(11, 10) 109 #define MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_00MS 0 110 #define MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_10MS 1 111 #define MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_20MS 2 112 #define MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_40MS 3 113 #define MII_88E1540_COPPER_CTRL3_FAST_LINK_DOWN BIT(9) 114 115 #define MII_88E6390_MISC_TEST 0x1b 116 #define MII_88E6390_MISC_TEST_SAMPLE_1S 0 117 #define MII_88E6390_MISC_TEST_SAMPLE_10MS BIT(14) 118 #define MII_88E6390_MISC_TEST_SAMPLE_DISABLE BIT(15) 119 #define MII_88E6390_MISC_TEST_SAMPLE_ENABLE 0 120 #define MII_88E6390_MISC_TEST_SAMPLE_MASK (0x3 << 14) 121 122 #define MII_88E6390_TEMP_SENSOR 0x1c 123 #define MII_88E6390_TEMP_SENSOR_MASK 0xff 124 #define MII_88E6390_TEMP_SENSOR_SAMPLES 10 125 126 #define MII_88E1318S_PHY_MSCR1_REG 16 127 #define MII_88E1318S_PHY_MSCR1_PAD_ODD BIT(6) 128 129 /* Copper Specific Interrupt Enable Register */ 130 #define MII_88E1318S_PHY_CSIER 0x12 131 /* WOL Event Interrupt Enable */ 132 #define MII_88E1318S_PHY_CSIER_WOL_EIE BIT(7) 133 134 /* LED Timer Control Register */ 135 #define MII_88E1318S_PHY_LED_TCR 0x12 136 #define MII_88E1318S_PHY_LED_TCR_FORCE_INT BIT(15) 137 #define MII_88E1318S_PHY_LED_TCR_INTn_ENABLE BIT(7) 138 #define MII_88E1318S_PHY_LED_TCR_INT_ACTIVE_LOW BIT(11) 139 140 /* Magic Packet MAC address registers */ 141 #define MII_88E1318S_PHY_MAGIC_PACKET_WORD2 0x17 142 #define MII_88E1318S_PHY_MAGIC_PACKET_WORD1 0x18 143 #define MII_88E1318S_PHY_MAGIC_PACKET_WORD0 0x19 144 145 #define MII_88E1318S_PHY_WOL_CTRL 0x10 146 #define MII_88E1318S_PHY_WOL_CTRL_CLEAR_WOL_STATUS BIT(12) 147 #define MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE BIT(14) 148 149 #define MII_PHY_LED_CTRL 16 150 #define MII_88E1121_PHY_LED_DEF 0x0030 151 #define MII_88E1510_PHY_LED_DEF 0x1177 152 #define MII_88E1510_PHY_LED0_LINK_LED1_ACTIVE 0x1040 153 154 #define MII_M1011_PHY_STATUS 0x11 155 #define MII_M1011_PHY_STATUS_1000 0x8000 156 #define MII_M1011_PHY_STATUS_100 0x4000 157 #define MII_M1011_PHY_STATUS_SPD_MASK 0xc000 158 #define MII_M1011_PHY_STATUS_FULLDUPLEX 0x2000 159 #define MII_M1011_PHY_STATUS_RESOLVED 0x0800 160 #define MII_M1011_PHY_STATUS_LINK 0x0400 161 162 #define MII_88E3016_PHY_SPEC_CTRL 0x10 163 #define MII_88E3016_DISABLE_SCRAMBLER 0x0200 164 #define MII_88E3016_AUTO_MDIX_CROSSOVER 0x0030 165 166 #define MII_88E1510_GEN_CTRL_REG_1 0x14 167 #define MII_88E1510_GEN_CTRL_REG_1_MODE_MASK 0x7 168 #define MII_88E1510_GEN_CTRL_REG_1_MODE_SGMII 0x1 /* SGMII to copper */ 169 #define MII_88E1510_GEN_CTRL_REG_1_RESET 0x8000 /* Soft reset */ 170 171 #define MII_VCT5_TX_RX_MDI0_COUPLING 0x10 172 #define MII_VCT5_TX_RX_MDI1_COUPLING 0x11 173 #define MII_VCT5_TX_RX_MDI2_COUPLING 0x12 174 #define MII_VCT5_TX_RX_MDI3_COUPLING 0x13 175 #define MII_VCT5_TX_RX_AMPLITUDE_MASK 0x7f00 176 #define MII_VCT5_TX_RX_AMPLITUDE_SHIFT 8 177 #define MII_VCT5_TX_RX_COUPLING_POSITIVE_REFLECTION BIT(15) 178 179 #define MII_VCT5_CTRL 0x17 180 #define MII_VCT5_CTRL_ENABLE BIT(15) 181 #define MII_VCT5_CTRL_COMPLETE BIT(14) 182 #define MII_VCT5_CTRL_TX_SAME_CHANNEL (0x0 << 11) 183 #define MII_VCT5_CTRL_TX0_CHANNEL (0x4 << 11) 184 #define MII_VCT5_CTRL_TX1_CHANNEL (0x5 << 11) 185 #define MII_VCT5_CTRL_TX2_CHANNEL (0x6 << 11) 186 #define MII_VCT5_CTRL_TX3_CHANNEL (0x7 << 11) 187 #define MII_VCT5_CTRL_SAMPLES_2 (0x0 << 8) 188 #define MII_VCT5_CTRL_SAMPLES_4 (0x1 << 8) 189 #define MII_VCT5_CTRL_SAMPLES_8 (0x2 << 8) 190 #define MII_VCT5_CTRL_SAMPLES_16 (0x3 << 8) 191 #define MII_VCT5_CTRL_SAMPLES_32 (0x4 << 8) 192 #define MII_VCT5_CTRL_SAMPLES_64 (0x5 << 8) 193 #define MII_VCT5_CTRL_SAMPLES_128 (0x6 << 8) 194 #define MII_VCT5_CTRL_SAMPLES_DEFAULT (0x6 << 8) 195 #define MII_VCT5_CTRL_SAMPLES_256 (0x7 << 8) 196 #define MII_VCT5_CTRL_SAMPLES_SHIFT 8 197 #define MII_VCT5_CTRL_MODE_MAXIMUM_PEEK (0x0 << 6) 198 #define MII_VCT5_CTRL_MODE_FIRST_LAST_PEEK (0x1 << 6) 199 #define MII_VCT5_CTRL_MODE_OFFSET (0x2 << 6) 200 #define MII_VCT5_CTRL_SAMPLE_POINT (0x3 << 6) 201 #define MII_VCT5_CTRL_PEEK_HYST_DEFAULT 3 202 203 #define MII_VCT5_SAMPLE_POINT_DISTANCE 0x18 204 #define MII_VCT5_SAMPLE_POINT_DISTANCE_MAX 511 205 #define MII_VCT5_TX_PULSE_CTRL 0x1c 206 #define MII_VCT5_TX_PULSE_CTRL_DONT_WAIT_LINK_DOWN BIT(12) 207 #define MII_VCT5_TX_PULSE_CTRL_PULSE_WIDTH_128nS (0x0 << 10) 208 #define MII_VCT5_TX_PULSE_CTRL_PULSE_WIDTH_96nS (0x1 << 10) 209 #define MII_VCT5_TX_PULSE_CTRL_PULSE_WIDTH_64nS (0x2 << 10) 210 #define MII_VCT5_TX_PULSE_CTRL_PULSE_WIDTH_32nS (0x3 << 10) 211 #define MII_VCT5_TX_PULSE_CTRL_PULSE_WIDTH_SHIFT 10 212 #define MII_VCT5_TX_PULSE_CTRL_PULSE_AMPLITUDE_1000mV (0x0 << 8) 213 #define MII_VCT5_TX_PULSE_CTRL_PULSE_AMPLITUDE_750mV (0x1 << 8) 214 #define MII_VCT5_TX_PULSE_CTRL_PULSE_AMPLITUDE_500mV (0x2 << 8) 215 #define MII_VCT5_TX_PULSE_CTRL_PULSE_AMPLITUDE_250mV (0x3 << 8) 216 #define MII_VCT5_TX_PULSE_CTRL_PULSE_AMPLITUDE_SHIFT 8 217 #define MII_VCT5_TX_PULSE_CTRL_MAX_AMP BIT(7) 218 #define MII_VCT5_TX_PULSE_CTRL_GT_140m_46_86mV (0x6 << 0) 219 220 /* For TDR measurements less than 11 meters, a short pulse should be 221 * used. 222 */ 223 #define TDR_SHORT_CABLE_LENGTH 11 224 225 #define MII_VCT7_PAIR_0_DISTANCE 0x10 226 #define MII_VCT7_PAIR_1_DISTANCE 0x11 227 #define MII_VCT7_PAIR_2_DISTANCE 0x12 228 #define MII_VCT7_PAIR_3_DISTANCE 0x13 229 230 #define MII_VCT7_RESULTS 0x14 231 #define MII_VCT7_RESULTS_PAIR3_MASK 0xf000 232 #define MII_VCT7_RESULTS_PAIR2_MASK 0x0f00 233 #define MII_VCT7_RESULTS_PAIR1_MASK 0x00f0 234 #define MII_VCT7_RESULTS_PAIR0_MASK 0x000f 235 #define MII_VCT7_RESULTS_PAIR3_SHIFT 12 236 #define MII_VCT7_RESULTS_PAIR2_SHIFT 8 237 #define MII_VCT7_RESULTS_PAIR1_SHIFT 4 238 #define MII_VCT7_RESULTS_PAIR0_SHIFT 0 239 #define MII_VCT7_RESULTS_INVALID 0 240 #define MII_VCT7_RESULTS_OK 1 241 #define MII_VCT7_RESULTS_OPEN 2 242 #define MII_VCT7_RESULTS_SAME_SHORT 3 243 #define MII_VCT7_RESULTS_CROSS_SHORT 4 244 #define MII_VCT7_RESULTS_BUSY 9 245 246 #define MII_VCT7_CTRL 0x15 247 #define MII_VCT7_CTRL_RUN_NOW BIT(15) 248 #define MII_VCT7_CTRL_RUN_ANEG BIT(14) 249 #define MII_VCT7_CTRL_DISABLE_CROSS BIT(13) 250 #define MII_VCT7_CTRL_RUN_AFTER_BREAK_LINK BIT(12) 251 #define MII_VCT7_CTRL_IN_PROGRESS BIT(11) 252 #define MII_VCT7_CTRL_METERS BIT(10) 253 #define MII_VCT7_CTRL_CENTIMETERS 0 254 255 #define LPA_PAUSE_FIBER 0x180 256 #define LPA_PAUSE_ASYM_FIBER 0x100 257 258 #define NB_FIBER_STATS 1 259 260 MODULE_DESCRIPTION("Marvell PHY driver"); 261 MODULE_AUTHOR("Andy Fleming"); 262 MODULE_LICENSE("GPL"); 263 264 struct marvell_hw_stat { 265 const char *string; 266 u8 page; 267 u8 reg; 268 u8 bits; 269 }; 270 271 static struct marvell_hw_stat marvell_hw_stats[] = { 272 { "phy_receive_errors_copper", 0, 21, 16}, 273 { "phy_idle_errors", 0, 10, 8 }, 274 { "phy_receive_errors_fiber", 1, 21, 16}, 275 }; 276 277 struct marvell_priv { 278 u64 stats[ARRAY_SIZE(marvell_hw_stats)]; 279 char *hwmon_name; 280 struct device *hwmon_dev; 281 bool cable_test_tdr; 282 u32 first; 283 u32 last; 284 u32 step; 285 s8 pair; 286 }; 287 288 static int marvell_read_page(struct phy_device *phydev) 289 { 290 return __phy_read(phydev, MII_MARVELL_PHY_PAGE); 291 } 292 293 static int marvell_write_page(struct phy_device *phydev, int page) 294 { 295 return __phy_write(phydev, MII_MARVELL_PHY_PAGE, page); 296 } 297 298 static int marvell_set_page(struct phy_device *phydev, int page) 299 { 300 return phy_write(phydev, MII_MARVELL_PHY_PAGE, page); 301 } 302 303 static int marvell_ack_interrupt(struct phy_device *phydev) 304 { 305 int err; 306 307 /* Clear the interrupts by reading the reg */ 308 err = phy_read(phydev, MII_M1011_IEVENT); 309 310 if (err < 0) 311 return err; 312 313 return 0; 314 } 315 316 static int marvell_config_intr(struct phy_device *phydev) 317 { 318 int err; 319 320 if (phydev->interrupts == PHY_INTERRUPT_ENABLED) 321 err = phy_write(phydev, MII_M1011_IMASK, 322 MII_M1011_IMASK_INIT); 323 else 324 err = phy_write(phydev, MII_M1011_IMASK, 325 MII_M1011_IMASK_CLEAR); 326 327 return err; 328 } 329 330 static int marvell_set_polarity(struct phy_device *phydev, int polarity) 331 { 332 int reg; 333 int err; 334 int val; 335 336 /* get the current settings */ 337 reg = phy_read(phydev, MII_M1011_PHY_SCR); 338 if (reg < 0) 339 return reg; 340 341 val = reg; 342 val &= ~MII_M1011_PHY_SCR_AUTO_CROSS; 343 switch (polarity) { 344 case ETH_TP_MDI: 345 val |= MII_M1011_PHY_SCR_MDI; 346 break; 347 case ETH_TP_MDI_X: 348 val |= MII_M1011_PHY_SCR_MDI_X; 349 break; 350 case ETH_TP_MDI_AUTO: 351 case ETH_TP_MDI_INVALID: 352 default: 353 val |= MII_M1011_PHY_SCR_AUTO_CROSS; 354 break; 355 } 356 357 if (val != reg) { 358 /* Set the new polarity value in the register */ 359 err = phy_write(phydev, MII_M1011_PHY_SCR, val); 360 if (err) 361 return err; 362 } 363 364 return val != reg; 365 } 366 367 static int marvell_config_aneg(struct phy_device *phydev) 368 { 369 int changed = 0; 370 int err; 371 372 err = marvell_set_polarity(phydev, phydev->mdix_ctrl); 373 if (err < 0) 374 return err; 375 376 changed = err; 377 378 err = phy_write(phydev, MII_M1111_PHY_LED_CONTROL, 379 MII_M1111_PHY_LED_DIRECT); 380 if (err < 0) 381 return err; 382 383 err = genphy_config_aneg(phydev); 384 if (err < 0) 385 return err; 386 387 if (phydev->autoneg != AUTONEG_ENABLE || changed) { 388 /* A write to speed/duplex bits (that is performed by 389 * genphy_config_aneg() call above) must be followed by 390 * a software reset. Otherwise, the write has no effect. 391 */ 392 err = genphy_soft_reset(phydev); 393 if (err < 0) 394 return err; 395 } 396 397 return 0; 398 } 399 400 static int m88e1101_config_aneg(struct phy_device *phydev) 401 { 402 int err; 403 404 /* This Marvell PHY has an errata which requires 405 * that certain registers get written in order 406 * to restart autonegotiation 407 */ 408 err = genphy_soft_reset(phydev); 409 if (err < 0) 410 return err; 411 412 err = phy_write(phydev, 0x1d, 0x1f); 413 if (err < 0) 414 return err; 415 416 err = phy_write(phydev, 0x1e, 0x200c); 417 if (err < 0) 418 return err; 419 420 err = phy_write(phydev, 0x1d, 0x5); 421 if (err < 0) 422 return err; 423 424 err = phy_write(phydev, 0x1e, 0); 425 if (err < 0) 426 return err; 427 428 err = phy_write(phydev, 0x1e, 0x100); 429 if (err < 0) 430 return err; 431 432 return marvell_config_aneg(phydev); 433 } 434 435 #if IS_ENABLED(CONFIG_OF_MDIO) 436 /* Set and/or override some configuration registers based on the 437 * marvell,reg-init property stored in the of_node for the phydev. 438 * 439 * marvell,reg-init = <reg-page reg mask value>,...; 440 * 441 * There may be one or more sets of <reg-page reg mask value>: 442 * 443 * reg-page: which register bank to use. 444 * reg: the register. 445 * mask: if non-zero, ANDed with existing register value. 446 * value: ORed with the masked value and written to the regiser. 447 * 448 */ 449 static int marvell_of_reg_init(struct phy_device *phydev) 450 { 451 const __be32 *paddr; 452 int len, i, saved_page, current_page, ret = 0; 453 454 if (!phydev->mdio.dev.of_node) 455 return 0; 456 457 paddr = of_get_property(phydev->mdio.dev.of_node, 458 "marvell,reg-init", &len); 459 if (!paddr || len < (4 * sizeof(*paddr))) 460 return 0; 461 462 saved_page = phy_save_page(phydev); 463 if (saved_page < 0) 464 goto err; 465 current_page = saved_page; 466 467 len /= sizeof(*paddr); 468 for (i = 0; i < len - 3; i += 4) { 469 u16 page = be32_to_cpup(paddr + i); 470 u16 reg = be32_to_cpup(paddr + i + 1); 471 u16 mask = be32_to_cpup(paddr + i + 2); 472 u16 val_bits = be32_to_cpup(paddr + i + 3); 473 int val; 474 475 if (page != current_page) { 476 current_page = page; 477 ret = marvell_write_page(phydev, page); 478 if (ret < 0) 479 goto err; 480 } 481 482 val = 0; 483 if (mask) { 484 val = __phy_read(phydev, reg); 485 if (val < 0) { 486 ret = val; 487 goto err; 488 } 489 val &= mask; 490 } 491 val |= val_bits; 492 493 ret = __phy_write(phydev, reg, val); 494 if (ret < 0) 495 goto err; 496 } 497 err: 498 return phy_restore_page(phydev, saved_page, ret); 499 } 500 #else 501 static int marvell_of_reg_init(struct phy_device *phydev) 502 { 503 return 0; 504 } 505 #endif /* CONFIG_OF_MDIO */ 506 507 static int m88e1121_config_aneg_rgmii_delays(struct phy_device *phydev) 508 { 509 int mscr; 510 511 if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID) 512 mscr = MII_88E1121_PHY_MSCR_RX_DELAY | 513 MII_88E1121_PHY_MSCR_TX_DELAY; 514 else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_RXID) 515 mscr = MII_88E1121_PHY_MSCR_RX_DELAY; 516 else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_TXID) 517 mscr = MII_88E1121_PHY_MSCR_TX_DELAY; 518 else 519 mscr = 0; 520 521 return phy_modify_paged(phydev, MII_MARVELL_MSCR_PAGE, 522 MII_88E1121_PHY_MSCR_REG, 523 MII_88E1121_PHY_MSCR_DELAY_MASK, mscr); 524 } 525 526 static int m88e1121_config_aneg(struct phy_device *phydev) 527 { 528 int changed = 0; 529 int err = 0; 530 531 if (phy_interface_is_rgmii(phydev)) { 532 err = m88e1121_config_aneg_rgmii_delays(phydev); 533 if (err < 0) 534 return err; 535 } 536 537 err = marvell_set_polarity(phydev, phydev->mdix_ctrl); 538 if (err < 0) 539 return err; 540 541 changed = err; 542 543 err = genphy_config_aneg(phydev); 544 if (err < 0) 545 return err; 546 547 if (phydev->autoneg != AUTONEG_ENABLE || changed) { 548 /* A software reset is used to ensure a "commit" of the 549 * changes is done. 550 */ 551 err = genphy_soft_reset(phydev); 552 if (err < 0) 553 return err; 554 } 555 556 return 0; 557 } 558 559 static int m88e1318_config_aneg(struct phy_device *phydev) 560 { 561 int err; 562 563 err = phy_modify_paged(phydev, MII_MARVELL_MSCR_PAGE, 564 MII_88E1318S_PHY_MSCR1_REG, 565 0, MII_88E1318S_PHY_MSCR1_PAD_ODD); 566 if (err < 0) 567 return err; 568 569 return m88e1121_config_aneg(phydev); 570 } 571 572 /** 573 * linkmode_adv_to_fiber_adv_t 574 * @advertise: the linkmode advertisement settings 575 * 576 * A small helper function that translates linkmode advertisement 577 * settings to phy autonegotiation advertisements for the MII_ADV 578 * register for fiber link. 579 */ 580 static inline u32 linkmode_adv_to_fiber_adv_t(unsigned long *advertise) 581 { 582 u32 result = 0; 583 584 if (linkmode_test_bit(ETHTOOL_LINK_MODE_1000baseT_Half_BIT, advertise)) 585 result |= ADVERTISE_1000XHALF; 586 if (linkmode_test_bit(ETHTOOL_LINK_MODE_1000baseT_Full_BIT, advertise)) 587 result |= ADVERTISE_1000XFULL; 588 589 if (linkmode_test_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, advertise) && 590 linkmode_test_bit(ETHTOOL_LINK_MODE_Pause_BIT, advertise)) 591 result |= ADVERTISE_1000XPSE_ASYM; 592 else if (linkmode_test_bit(ETHTOOL_LINK_MODE_Pause_BIT, advertise)) 593 result |= ADVERTISE_1000XPAUSE; 594 595 return result; 596 } 597 598 /** 599 * marvell_config_aneg_fiber - restart auto-negotiation or write BMCR 600 * @phydev: target phy_device struct 601 * 602 * Description: If auto-negotiation is enabled, we configure the 603 * advertising, and then restart auto-negotiation. If it is not 604 * enabled, then we write the BMCR. Adapted for fiber link in 605 * some Marvell's devices. 606 */ 607 static int marvell_config_aneg_fiber(struct phy_device *phydev) 608 { 609 int changed = 0; 610 int err; 611 u16 adv; 612 613 if (phydev->autoneg != AUTONEG_ENABLE) 614 return genphy_setup_forced(phydev); 615 616 /* Only allow advertising what this PHY supports */ 617 linkmode_and(phydev->advertising, phydev->advertising, 618 phydev->supported); 619 620 adv = linkmode_adv_to_fiber_adv_t(phydev->advertising); 621 622 /* Setup fiber advertisement */ 623 err = phy_modify_changed(phydev, MII_ADVERTISE, 624 ADVERTISE_1000XHALF | ADVERTISE_1000XFULL | 625 ADVERTISE_1000XPAUSE | ADVERTISE_1000XPSE_ASYM, 626 adv); 627 if (err < 0) 628 return err; 629 if (err > 0) 630 changed = 1; 631 632 return genphy_check_and_restart_aneg(phydev, changed); 633 } 634 635 static int m88e1111_config_aneg(struct phy_device *phydev) 636 { 637 int extsr = phy_read(phydev, MII_M1111_PHY_EXT_SR); 638 int err; 639 640 if (extsr < 0) 641 return extsr; 642 643 /* If not using SGMII or copper 1000BaseX modes, use normal process. 644 * Steps below are only required for these modes. 645 */ 646 if (phydev->interface != PHY_INTERFACE_MODE_SGMII && 647 (extsr & MII_M1111_HWCFG_MODE_MASK) != 648 MII_M1111_HWCFG_MODE_COPPER_1000X_AN) 649 return marvell_config_aneg(phydev); 650 651 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); 652 if (err < 0) 653 goto error; 654 655 /* Configure the copper link first */ 656 err = marvell_config_aneg(phydev); 657 if (err < 0) 658 goto error; 659 660 /* Do not touch the fiber page if we're in copper->sgmii mode */ 661 if (phydev->interface == PHY_INTERFACE_MODE_SGMII) 662 return 0; 663 664 /* Then the fiber link */ 665 err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE); 666 if (err < 0) 667 goto error; 668 669 err = marvell_config_aneg_fiber(phydev); 670 if (err < 0) 671 goto error; 672 673 return marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); 674 675 error: 676 marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); 677 return err; 678 } 679 680 static int m88e1510_config_aneg(struct phy_device *phydev) 681 { 682 int err; 683 684 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); 685 if (err < 0) 686 goto error; 687 688 /* Configure the copper link first */ 689 err = m88e1318_config_aneg(phydev); 690 if (err < 0) 691 goto error; 692 693 /* Do not touch the fiber page if we're in copper->sgmii mode */ 694 if (phydev->interface == PHY_INTERFACE_MODE_SGMII) 695 return 0; 696 697 /* Then the fiber link */ 698 err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE); 699 if (err < 0) 700 goto error; 701 702 err = marvell_config_aneg_fiber(phydev); 703 if (err < 0) 704 goto error; 705 706 return marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); 707 708 error: 709 marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); 710 return err; 711 } 712 713 static void marvell_config_led(struct phy_device *phydev) 714 { 715 u16 def_config; 716 int err; 717 718 switch (MARVELL_PHY_FAMILY_ID(phydev->phy_id)) { 719 /* Default PHY LED config: LED[0] .. Link, LED[1] .. Activity */ 720 case MARVELL_PHY_FAMILY_ID(MARVELL_PHY_ID_88E1121R): 721 case MARVELL_PHY_FAMILY_ID(MARVELL_PHY_ID_88E1318S): 722 def_config = MII_88E1121_PHY_LED_DEF; 723 break; 724 /* Default PHY LED config: 725 * LED[0] .. 1000Mbps Link 726 * LED[1] .. 100Mbps Link 727 * LED[2] .. Blink, Activity 728 */ 729 case MARVELL_PHY_FAMILY_ID(MARVELL_PHY_ID_88E1510): 730 if (phydev->dev_flags & MARVELL_PHY_LED0_LINK_LED1_ACTIVE) 731 def_config = MII_88E1510_PHY_LED0_LINK_LED1_ACTIVE; 732 else 733 def_config = MII_88E1510_PHY_LED_DEF; 734 break; 735 default: 736 return; 737 } 738 739 err = phy_write_paged(phydev, MII_MARVELL_LED_PAGE, MII_PHY_LED_CTRL, 740 def_config); 741 if (err < 0) 742 phydev_warn(phydev, "Fail to config marvell phy LED.\n"); 743 } 744 745 static int marvell_config_init(struct phy_device *phydev) 746 { 747 /* Set default LED */ 748 marvell_config_led(phydev); 749 750 /* Set registers from marvell,reg-init DT property */ 751 return marvell_of_reg_init(phydev); 752 } 753 754 static int m88e3016_config_init(struct phy_device *phydev) 755 { 756 int ret; 757 758 /* Enable Scrambler and Auto-Crossover */ 759 ret = phy_modify(phydev, MII_88E3016_PHY_SPEC_CTRL, 760 MII_88E3016_DISABLE_SCRAMBLER, 761 MII_88E3016_AUTO_MDIX_CROSSOVER); 762 if (ret < 0) 763 return ret; 764 765 return marvell_config_init(phydev); 766 } 767 768 static int m88e1111_config_init_hwcfg_mode(struct phy_device *phydev, 769 u16 mode, 770 int fibre_copper_auto) 771 { 772 if (fibre_copper_auto) 773 mode |= MII_M1111_HWCFG_FIBER_COPPER_AUTO; 774 775 return phy_modify(phydev, MII_M1111_PHY_EXT_SR, 776 MII_M1111_HWCFG_MODE_MASK | 777 MII_M1111_HWCFG_FIBER_COPPER_AUTO | 778 MII_M1111_HWCFG_FIBER_COPPER_RES, 779 mode); 780 } 781 782 static int m88e1111_config_init_rgmii_delays(struct phy_device *phydev) 783 { 784 int delay; 785 786 if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID) { 787 delay = MII_M1111_RGMII_RX_DELAY | MII_M1111_RGMII_TX_DELAY; 788 } else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_RXID) { 789 delay = MII_M1111_RGMII_RX_DELAY; 790 } else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_TXID) { 791 delay = MII_M1111_RGMII_TX_DELAY; 792 } else { 793 delay = 0; 794 } 795 796 return phy_modify(phydev, MII_M1111_PHY_EXT_CR, 797 MII_M1111_RGMII_RX_DELAY | MII_M1111_RGMII_TX_DELAY, 798 delay); 799 } 800 801 static int m88e1111_config_init_rgmii(struct phy_device *phydev) 802 { 803 int temp; 804 int err; 805 806 err = m88e1111_config_init_rgmii_delays(phydev); 807 if (err < 0) 808 return err; 809 810 temp = phy_read(phydev, MII_M1111_PHY_EXT_SR); 811 if (temp < 0) 812 return temp; 813 814 temp &= ~(MII_M1111_HWCFG_MODE_MASK); 815 816 if (temp & MII_M1111_HWCFG_FIBER_COPPER_RES) 817 temp |= MII_M1111_HWCFG_MODE_FIBER_RGMII; 818 else 819 temp |= MII_M1111_HWCFG_MODE_COPPER_RGMII; 820 821 return phy_write(phydev, MII_M1111_PHY_EXT_SR, temp); 822 } 823 824 static int m88e1111_config_init_sgmii(struct phy_device *phydev) 825 { 826 int err; 827 828 err = m88e1111_config_init_hwcfg_mode( 829 phydev, 830 MII_M1111_HWCFG_MODE_SGMII_NO_CLK, 831 MII_M1111_HWCFG_FIBER_COPPER_AUTO); 832 if (err < 0) 833 return err; 834 835 /* make sure copper is selected */ 836 return marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); 837 } 838 839 static int m88e1111_config_init_rtbi(struct phy_device *phydev) 840 { 841 int err; 842 843 err = m88e1111_config_init_rgmii_delays(phydev); 844 if (err < 0) 845 return err; 846 847 err = m88e1111_config_init_hwcfg_mode( 848 phydev, 849 MII_M1111_HWCFG_MODE_RTBI, 850 MII_M1111_HWCFG_FIBER_COPPER_AUTO); 851 if (err < 0) 852 return err; 853 854 /* soft reset */ 855 err = genphy_soft_reset(phydev); 856 if (err < 0) 857 return err; 858 859 return m88e1111_config_init_hwcfg_mode( 860 phydev, 861 MII_M1111_HWCFG_MODE_RTBI, 862 MII_M1111_HWCFG_FIBER_COPPER_AUTO); 863 } 864 865 static int m88e1111_config_init_1000basex(struct phy_device *phydev) 866 { 867 int extsr = phy_read(phydev, MII_M1111_PHY_EXT_SR); 868 int err, mode; 869 870 if (extsr < 0) 871 return extsr; 872 873 /* If using copper mode, ensure 1000BaseX auto-negotiation is enabled */ 874 mode = extsr & MII_M1111_HWCFG_MODE_MASK; 875 if (mode == MII_M1111_HWCFG_MODE_COPPER_1000X_NOAN) { 876 err = phy_modify(phydev, MII_M1111_PHY_EXT_SR, 877 MII_M1111_HWCFG_MODE_MASK | 878 MII_M1111_HWCFG_SERIAL_AN_BYPASS, 879 MII_M1111_HWCFG_MODE_COPPER_1000X_AN | 880 MII_M1111_HWCFG_SERIAL_AN_BYPASS); 881 if (err < 0) 882 return err; 883 } 884 return 0; 885 } 886 887 static int m88e1111_config_init(struct phy_device *phydev) 888 { 889 int err; 890 891 if (phy_interface_is_rgmii(phydev)) { 892 err = m88e1111_config_init_rgmii(phydev); 893 if (err < 0) 894 return err; 895 } 896 897 if (phydev->interface == PHY_INTERFACE_MODE_SGMII) { 898 err = m88e1111_config_init_sgmii(phydev); 899 if (err < 0) 900 return err; 901 } 902 903 if (phydev->interface == PHY_INTERFACE_MODE_RTBI) { 904 err = m88e1111_config_init_rtbi(phydev); 905 if (err < 0) 906 return err; 907 } 908 909 if (phydev->interface == PHY_INTERFACE_MODE_1000BASEX) { 910 err = m88e1111_config_init_1000basex(phydev); 911 if (err < 0) 912 return err; 913 } 914 915 err = marvell_of_reg_init(phydev); 916 if (err < 0) 917 return err; 918 919 return genphy_soft_reset(phydev); 920 } 921 922 static int m88e1111_get_downshift(struct phy_device *phydev, u8 *data) 923 { 924 int val, cnt, enable; 925 926 val = phy_read(phydev, MII_M1111_PHY_EXT_CR); 927 if (val < 0) 928 return val; 929 930 enable = FIELD_GET(MII_M1111_PHY_EXT_CR_DOWNSHIFT_EN, val); 931 cnt = FIELD_GET(MII_M1111_PHY_EXT_CR_DOWNSHIFT_MASK, val) + 1; 932 933 *data = enable ? cnt : DOWNSHIFT_DEV_DISABLE; 934 935 return 0; 936 } 937 938 static int m88e1111_set_downshift(struct phy_device *phydev, u8 cnt) 939 { 940 int val; 941 942 if (cnt > MII_M1111_PHY_EXT_CR_DOWNSHIFT_MAX) 943 return -E2BIG; 944 945 if (!cnt) 946 return phy_clear_bits(phydev, MII_M1111_PHY_EXT_CR, 947 MII_M1111_PHY_EXT_CR_DOWNSHIFT_EN); 948 949 val = MII_M1111_PHY_EXT_CR_DOWNSHIFT_EN; 950 val |= FIELD_PREP(MII_M1111_PHY_EXT_CR_DOWNSHIFT_MASK, cnt - 1); 951 952 return phy_modify(phydev, MII_M1111_PHY_EXT_CR, 953 MII_M1111_PHY_EXT_CR_DOWNSHIFT_EN | 954 MII_M1111_PHY_EXT_CR_DOWNSHIFT_MASK, 955 val); 956 } 957 958 static int m88e1111_get_tunable(struct phy_device *phydev, 959 struct ethtool_tunable *tuna, void *data) 960 { 961 switch (tuna->id) { 962 case ETHTOOL_PHY_DOWNSHIFT: 963 return m88e1111_get_downshift(phydev, data); 964 default: 965 return -EOPNOTSUPP; 966 } 967 } 968 969 static int m88e1111_set_tunable(struct phy_device *phydev, 970 struct ethtool_tunable *tuna, const void *data) 971 { 972 switch (tuna->id) { 973 case ETHTOOL_PHY_DOWNSHIFT: 974 return m88e1111_set_downshift(phydev, *(const u8 *)data); 975 default: 976 return -EOPNOTSUPP; 977 } 978 } 979 980 static int m88e1011_get_downshift(struct phy_device *phydev, u8 *data) 981 { 982 int val, cnt, enable; 983 984 val = phy_read(phydev, MII_M1011_PHY_SCR); 985 if (val < 0) 986 return val; 987 988 enable = FIELD_GET(MII_M1011_PHY_SCR_DOWNSHIFT_EN, val); 989 cnt = FIELD_GET(MII_M1011_PHY_SCR_DOWNSHIFT_MASK, val) + 1; 990 991 *data = enable ? cnt : DOWNSHIFT_DEV_DISABLE; 992 993 return 0; 994 } 995 996 static int m88e1011_set_downshift(struct phy_device *phydev, u8 cnt) 997 { 998 int val; 999 1000 if (cnt > MII_M1011_PHY_SCR_DOWNSHIFT_MAX) 1001 return -E2BIG; 1002 1003 if (!cnt) 1004 return phy_clear_bits(phydev, MII_M1011_PHY_SCR, 1005 MII_M1011_PHY_SCR_DOWNSHIFT_EN); 1006 1007 val = MII_M1011_PHY_SCR_DOWNSHIFT_EN; 1008 val |= FIELD_PREP(MII_M1011_PHY_SCR_DOWNSHIFT_MASK, cnt - 1); 1009 1010 return phy_modify(phydev, MII_M1011_PHY_SCR, 1011 MII_M1011_PHY_SCR_DOWNSHIFT_EN | 1012 MII_M1011_PHY_SCR_DOWNSHIFT_MASK, 1013 val); 1014 } 1015 1016 static int m88e1011_get_tunable(struct phy_device *phydev, 1017 struct ethtool_tunable *tuna, void *data) 1018 { 1019 switch (tuna->id) { 1020 case ETHTOOL_PHY_DOWNSHIFT: 1021 return m88e1011_get_downshift(phydev, data); 1022 default: 1023 return -EOPNOTSUPP; 1024 } 1025 } 1026 1027 static int m88e1011_set_tunable(struct phy_device *phydev, 1028 struct ethtool_tunable *tuna, const void *data) 1029 { 1030 switch (tuna->id) { 1031 case ETHTOOL_PHY_DOWNSHIFT: 1032 return m88e1011_set_downshift(phydev, *(const u8 *)data); 1033 default: 1034 return -EOPNOTSUPP; 1035 } 1036 } 1037 1038 static int m88e1116r_config_init(struct phy_device *phydev) 1039 { 1040 int err; 1041 1042 err = genphy_soft_reset(phydev); 1043 if (err < 0) 1044 return err; 1045 1046 msleep(500); 1047 1048 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); 1049 if (err < 0) 1050 return err; 1051 1052 err = marvell_set_polarity(phydev, phydev->mdix_ctrl); 1053 if (err < 0) 1054 return err; 1055 1056 err = m88e1011_set_downshift(phydev, 8); 1057 if (err < 0) 1058 return err; 1059 1060 if (phy_interface_is_rgmii(phydev)) { 1061 err = m88e1121_config_aneg_rgmii_delays(phydev); 1062 if (err < 0) 1063 return err; 1064 } 1065 1066 err = genphy_soft_reset(phydev); 1067 if (err < 0) 1068 return err; 1069 1070 return marvell_config_init(phydev); 1071 } 1072 1073 static int m88e1318_config_init(struct phy_device *phydev) 1074 { 1075 if (phy_interrupt_is_valid(phydev)) { 1076 int err = phy_modify_paged( 1077 phydev, MII_MARVELL_LED_PAGE, 1078 MII_88E1318S_PHY_LED_TCR, 1079 MII_88E1318S_PHY_LED_TCR_FORCE_INT, 1080 MII_88E1318S_PHY_LED_TCR_INTn_ENABLE | 1081 MII_88E1318S_PHY_LED_TCR_INT_ACTIVE_LOW); 1082 if (err < 0) 1083 return err; 1084 } 1085 1086 return marvell_config_init(phydev); 1087 } 1088 1089 static int m88e1510_config_init(struct phy_device *phydev) 1090 { 1091 int err; 1092 1093 /* SGMII-to-Copper mode initialization */ 1094 if (phydev->interface == PHY_INTERFACE_MODE_SGMII) { 1095 /* Select page 18 */ 1096 err = marvell_set_page(phydev, 18); 1097 if (err < 0) 1098 return err; 1099 1100 /* In reg 20, write MODE[2:0] = 0x1 (SGMII to Copper) */ 1101 err = phy_modify(phydev, MII_88E1510_GEN_CTRL_REG_1, 1102 MII_88E1510_GEN_CTRL_REG_1_MODE_MASK, 1103 MII_88E1510_GEN_CTRL_REG_1_MODE_SGMII); 1104 if (err < 0) 1105 return err; 1106 1107 /* PHY reset is necessary after changing MODE[2:0] */ 1108 err = phy_modify(phydev, MII_88E1510_GEN_CTRL_REG_1, 0, 1109 MII_88E1510_GEN_CTRL_REG_1_RESET); 1110 if (err < 0) 1111 return err; 1112 1113 /* Reset page selection */ 1114 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); 1115 if (err < 0) 1116 return err; 1117 } 1118 1119 return m88e1318_config_init(phydev); 1120 } 1121 1122 static int m88e1118_config_aneg(struct phy_device *phydev) 1123 { 1124 int err; 1125 1126 err = genphy_soft_reset(phydev); 1127 if (err < 0) 1128 return err; 1129 1130 err = marvell_set_polarity(phydev, phydev->mdix_ctrl); 1131 if (err < 0) 1132 return err; 1133 1134 err = genphy_config_aneg(phydev); 1135 return 0; 1136 } 1137 1138 static int m88e1118_config_init(struct phy_device *phydev) 1139 { 1140 int err; 1141 1142 /* Change address */ 1143 err = marvell_set_page(phydev, MII_MARVELL_MSCR_PAGE); 1144 if (err < 0) 1145 return err; 1146 1147 /* Enable 1000 Mbit */ 1148 err = phy_write(phydev, 0x15, 0x1070); 1149 if (err < 0) 1150 return err; 1151 1152 /* Change address */ 1153 err = marvell_set_page(phydev, MII_MARVELL_LED_PAGE); 1154 if (err < 0) 1155 return err; 1156 1157 /* Adjust LED Control */ 1158 if (phydev->dev_flags & MARVELL_PHY_M1118_DNS323_LEDS) 1159 err = phy_write(phydev, 0x10, 0x1100); 1160 else 1161 err = phy_write(phydev, 0x10, 0x021e); 1162 if (err < 0) 1163 return err; 1164 1165 err = marvell_of_reg_init(phydev); 1166 if (err < 0) 1167 return err; 1168 1169 /* Reset address */ 1170 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); 1171 if (err < 0) 1172 return err; 1173 1174 return genphy_soft_reset(phydev); 1175 } 1176 1177 static int m88e1149_config_init(struct phy_device *phydev) 1178 { 1179 int err; 1180 1181 /* Change address */ 1182 err = marvell_set_page(phydev, MII_MARVELL_MSCR_PAGE); 1183 if (err < 0) 1184 return err; 1185 1186 /* Enable 1000 Mbit */ 1187 err = phy_write(phydev, 0x15, 0x1048); 1188 if (err < 0) 1189 return err; 1190 1191 err = marvell_of_reg_init(phydev); 1192 if (err < 0) 1193 return err; 1194 1195 /* Reset address */ 1196 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); 1197 if (err < 0) 1198 return err; 1199 1200 return genphy_soft_reset(phydev); 1201 } 1202 1203 static int m88e1145_config_init_rgmii(struct phy_device *phydev) 1204 { 1205 int err; 1206 1207 err = m88e1111_config_init_rgmii_delays(phydev); 1208 if (err < 0) 1209 return err; 1210 1211 if (phydev->dev_flags & MARVELL_PHY_M1145_FLAGS_RESISTANCE) { 1212 err = phy_write(phydev, 0x1d, 0x0012); 1213 if (err < 0) 1214 return err; 1215 1216 err = phy_modify(phydev, 0x1e, 0x0fc0, 1217 2 << 9 | /* 36 ohm */ 1218 2 << 6); /* 39 ohm */ 1219 if (err < 0) 1220 return err; 1221 1222 err = phy_write(phydev, 0x1d, 0x3); 1223 if (err < 0) 1224 return err; 1225 1226 err = phy_write(phydev, 0x1e, 0x8000); 1227 } 1228 return err; 1229 } 1230 1231 static int m88e1145_config_init_sgmii(struct phy_device *phydev) 1232 { 1233 return m88e1111_config_init_hwcfg_mode( 1234 phydev, MII_M1111_HWCFG_MODE_SGMII_NO_CLK, 1235 MII_M1111_HWCFG_FIBER_COPPER_AUTO); 1236 } 1237 1238 static int m88e1145_config_init(struct phy_device *phydev) 1239 { 1240 int err; 1241 1242 /* Take care of errata E0 & E1 */ 1243 err = phy_write(phydev, 0x1d, 0x001b); 1244 if (err < 0) 1245 return err; 1246 1247 err = phy_write(phydev, 0x1e, 0x418f); 1248 if (err < 0) 1249 return err; 1250 1251 err = phy_write(phydev, 0x1d, 0x0016); 1252 if (err < 0) 1253 return err; 1254 1255 err = phy_write(phydev, 0x1e, 0xa2da); 1256 if (err < 0) 1257 return err; 1258 1259 if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID) { 1260 err = m88e1145_config_init_rgmii(phydev); 1261 if (err < 0) 1262 return err; 1263 } 1264 1265 if (phydev->interface == PHY_INTERFACE_MODE_SGMII) { 1266 err = m88e1145_config_init_sgmii(phydev); 1267 if (err < 0) 1268 return err; 1269 } 1270 1271 err = marvell_of_reg_init(phydev); 1272 if (err < 0) 1273 return err; 1274 1275 return 0; 1276 } 1277 1278 static int m88e1540_get_fld(struct phy_device *phydev, u8 *msecs) 1279 { 1280 int val; 1281 1282 val = phy_read(phydev, MII_88E1540_COPPER_CTRL3); 1283 if (val < 0) 1284 return val; 1285 1286 if (!(val & MII_88E1540_COPPER_CTRL3_FAST_LINK_DOWN)) { 1287 *msecs = ETHTOOL_PHY_FAST_LINK_DOWN_OFF; 1288 return 0; 1289 } 1290 1291 val = FIELD_GET(MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_MASK, val); 1292 1293 switch (val) { 1294 case MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_00MS: 1295 *msecs = 0; 1296 break; 1297 case MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_10MS: 1298 *msecs = 10; 1299 break; 1300 case MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_20MS: 1301 *msecs = 20; 1302 break; 1303 case MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_40MS: 1304 *msecs = 40; 1305 break; 1306 default: 1307 return -EINVAL; 1308 } 1309 1310 return 0; 1311 } 1312 1313 static int m88e1540_set_fld(struct phy_device *phydev, const u8 *msecs) 1314 { 1315 struct ethtool_eee eee; 1316 int val, ret; 1317 1318 if (*msecs == ETHTOOL_PHY_FAST_LINK_DOWN_OFF) 1319 return phy_clear_bits(phydev, MII_88E1540_COPPER_CTRL3, 1320 MII_88E1540_COPPER_CTRL3_FAST_LINK_DOWN); 1321 1322 /* According to the Marvell data sheet EEE must be disabled for 1323 * Fast Link Down detection to work properly 1324 */ 1325 ret = phy_ethtool_get_eee(phydev, &eee); 1326 if (!ret && eee.eee_enabled) { 1327 phydev_warn(phydev, "Fast Link Down detection requires EEE to be disabled!\n"); 1328 return -EBUSY; 1329 } 1330 1331 if (*msecs <= 5) 1332 val = MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_00MS; 1333 else if (*msecs <= 15) 1334 val = MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_10MS; 1335 else if (*msecs <= 30) 1336 val = MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_20MS; 1337 else 1338 val = MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_40MS; 1339 1340 val = FIELD_PREP(MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_MASK, val); 1341 1342 ret = phy_modify(phydev, MII_88E1540_COPPER_CTRL3, 1343 MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_MASK, val); 1344 if (ret) 1345 return ret; 1346 1347 return phy_set_bits(phydev, MII_88E1540_COPPER_CTRL3, 1348 MII_88E1540_COPPER_CTRL3_FAST_LINK_DOWN); 1349 } 1350 1351 static int m88e1540_get_tunable(struct phy_device *phydev, 1352 struct ethtool_tunable *tuna, void *data) 1353 { 1354 switch (tuna->id) { 1355 case ETHTOOL_PHY_FAST_LINK_DOWN: 1356 return m88e1540_get_fld(phydev, data); 1357 case ETHTOOL_PHY_DOWNSHIFT: 1358 return m88e1011_get_downshift(phydev, data); 1359 default: 1360 return -EOPNOTSUPP; 1361 } 1362 } 1363 1364 static int m88e1540_set_tunable(struct phy_device *phydev, 1365 struct ethtool_tunable *tuna, const void *data) 1366 { 1367 switch (tuna->id) { 1368 case ETHTOOL_PHY_FAST_LINK_DOWN: 1369 return m88e1540_set_fld(phydev, data); 1370 case ETHTOOL_PHY_DOWNSHIFT: 1371 return m88e1011_set_downshift(phydev, *(const u8 *)data); 1372 default: 1373 return -EOPNOTSUPP; 1374 } 1375 } 1376 1377 /* The VOD can be out of specification on link up. Poke an 1378 * undocumented register, in an undocumented page, with a magic value 1379 * to fix this. 1380 */ 1381 static int m88e6390_errata(struct phy_device *phydev) 1382 { 1383 int err; 1384 1385 err = phy_write(phydev, MII_BMCR, 1386 BMCR_ANENABLE | BMCR_SPEED1000 | BMCR_FULLDPLX); 1387 if (err) 1388 return err; 1389 1390 usleep_range(300, 400); 1391 1392 err = phy_write_paged(phydev, 0xf8, 0x08, 0x36); 1393 if (err) 1394 return err; 1395 1396 return genphy_soft_reset(phydev); 1397 } 1398 1399 static int m88e6390_config_aneg(struct phy_device *phydev) 1400 { 1401 int err; 1402 1403 err = m88e6390_errata(phydev); 1404 if (err) 1405 return err; 1406 1407 return m88e1510_config_aneg(phydev); 1408 } 1409 1410 /** 1411 * fiber_lpa_mod_linkmode_lpa_t 1412 * @advertising: the linkmode advertisement settings 1413 * @lpa: value of the MII_LPA register for fiber link 1414 * 1415 * A small helper function that translates MII_LPA bits to linkmode LP 1416 * advertisement settings. Other bits in advertising are left 1417 * unchanged. 1418 */ 1419 static void fiber_lpa_mod_linkmode_lpa_t(unsigned long *advertising, u32 lpa) 1420 { 1421 linkmode_mod_bit(ETHTOOL_LINK_MODE_1000baseT_Half_BIT, 1422 advertising, lpa & LPA_1000XHALF); 1423 1424 linkmode_mod_bit(ETHTOOL_LINK_MODE_1000baseT_Full_BIT, 1425 advertising, lpa & LPA_1000XFULL); 1426 } 1427 1428 static int marvell_read_status_page_an(struct phy_device *phydev, 1429 int fiber, int status) 1430 { 1431 int lpa; 1432 int err; 1433 1434 if (!(status & MII_M1011_PHY_STATUS_RESOLVED)) { 1435 phydev->link = 0; 1436 return 0; 1437 } 1438 1439 if (status & MII_M1011_PHY_STATUS_FULLDUPLEX) 1440 phydev->duplex = DUPLEX_FULL; 1441 else 1442 phydev->duplex = DUPLEX_HALF; 1443 1444 switch (status & MII_M1011_PHY_STATUS_SPD_MASK) { 1445 case MII_M1011_PHY_STATUS_1000: 1446 phydev->speed = SPEED_1000; 1447 break; 1448 1449 case MII_M1011_PHY_STATUS_100: 1450 phydev->speed = SPEED_100; 1451 break; 1452 1453 default: 1454 phydev->speed = SPEED_10; 1455 break; 1456 } 1457 1458 if (!fiber) { 1459 err = genphy_read_lpa(phydev); 1460 if (err < 0) 1461 return err; 1462 1463 phy_resolve_aneg_pause(phydev); 1464 } else { 1465 lpa = phy_read(phydev, MII_LPA); 1466 if (lpa < 0) 1467 return lpa; 1468 1469 /* The fiber link is only 1000M capable */ 1470 fiber_lpa_mod_linkmode_lpa_t(phydev->lp_advertising, lpa); 1471 1472 if (phydev->duplex == DUPLEX_FULL) { 1473 if (!(lpa & LPA_PAUSE_FIBER)) { 1474 phydev->pause = 0; 1475 phydev->asym_pause = 0; 1476 } else if ((lpa & LPA_PAUSE_ASYM_FIBER)) { 1477 phydev->pause = 1; 1478 phydev->asym_pause = 1; 1479 } else { 1480 phydev->pause = 1; 1481 phydev->asym_pause = 0; 1482 } 1483 } 1484 } 1485 1486 return 0; 1487 } 1488 1489 /* marvell_read_status_page 1490 * 1491 * Description: 1492 * Check the link, then figure out the current state 1493 * by comparing what we advertise with what the link partner 1494 * advertises. Start by checking the gigabit possibilities, 1495 * then move on to 10/100. 1496 */ 1497 static int marvell_read_status_page(struct phy_device *phydev, int page) 1498 { 1499 int status; 1500 int fiber; 1501 int err; 1502 1503 status = phy_read(phydev, MII_M1011_PHY_STATUS); 1504 if (status < 0) 1505 return status; 1506 1507 /* Use the generic register for copper link status, 1508 * and the PHY status register for fiber link status. 1509 */ 1510 if (page == MII_MARVELL_FIBER_PAGE) { 1511 phydev->link = !!(status & MII_M1011_PHY_STATUS_LINK); 1512 } else { 1513 err = genphy_update_link(phydev); 1514 if (err) 1515 return err; 1516 } 1517 1518 if (page == MII_MARVELL_FIBER_PAGE) 1519 fiber = 1; 1520 else 1521 fiber = 0; 1522 1523 linkmode_zero(phydev->lp_advertising); 1524 phydev->pause = 0; 1525 phydev->asym_pause = 0; 1526 phydev->speed = SPEED_UNKNOWN; 1527 phydev->duplex = DUPLEX_UNKNOWN; 1528 1529 if (phydev->autoneg == AUTONEG_ENABLE) 1530 err = marvell_read_status_page_an(phydev, fiber, status); 1531 else 1532 err = genphy_read_status_fixed(phydev); 1533 1534 return err; 1535 } 1536 1537 /* marvell_read_status 1538 * 1539 * Some Marvell's phys have two modes: fiber and copper. 1540 * Both need status checked. 1541 * Description: 1542 * First, check the fiber link and status. 1543 * If the fiber link is down, check the copper link and status which 1544 * will be the default value if both link are down. 1545 */ 1546 static int marvell_read_status(struct phy_device *phydev) 1547 { 1548 int err; 1549 1550 /* Check the fiber mode first */ 1551 if (linkmode_test_bit(ETHTOOL_LINK_MODE_FIBRE_BIT, 1552 phydev->supported) && 1553 phydev->interface != PHY_INTERFACE_MODE_SGMII) { 1554 err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE); 1555 if (err < 0) 1556 goto error; 1557 1558 err = marvell_read_status_page(phydev, MII_MARVELL_FIBER_PAGE); 1559 if (err < 0) 1560 goto error; 1561 1562 /* If the fiber link is up, it is the selected and 1563 * used link. In this case, we need to stay in the 1564 * fiber page. Please to be careful about that, avoid 1565 * to restore Copper page in other functions which 1566 * could break the behaviour for some fiber phy like 1567 * 88E1512. 1568 */ 1569 if (phydev->link) 1570 return 0; 1571 1572 /* If fiber link is down, check and save copper mode state */ 1573 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); 1574 if (err < 0) 1575 goto error; 1576 } 1577 1578 return marvell_read_status_page(phydev, MII_MARVELL_COPPER_PAGE); 1579 1580 error: 1581 marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); 1582 return err; 1583 } 1584 1585 /* marvell_suspend 1586 * 1587 * Some Marvell's phys have two modes: fiber and copper. 1588 * Both need to be suspended 1589 */ 1590 static int marvell_suspend(struct phy_device *phydev) 1591 { 1592 int err; 1593 1594 /* Suspend the fiber mode first */ 1595 if (!linkmode_test_bit(ETHTOOL_LINK_MODE_FIBRE_BIT, 1596 phydev->supported)) { 1597 err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE); 1598 if (err < 0) 1599 goto error; 1600 1601 /* With the page set, use the generic suspend */ 1602 err = genphy_suspend(phydev); 1603 if (err < 0) 1604 goto error; 1605 1606 /* Then, the copper link */ 1607 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); 1608 if (err < 0) 1609 goto error; 1610 } 1611 1612 /* With the page set, use the generic suspend */ 1613 return genphy_suspend(phydev); 1614 1615 error: 1616 marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); 1617 return err; 1618 } 1619 1620 /* marvell_resume 1621 * 1622 * Some Marvell's phys have two modes: fiber and copper. 1623 * Both need to be resumed 1624 */ 1625 static int marvell_resume(struct phy_device *phydev) 1626 { 1627 int err; 1628 1629 /* Resume the fiber mode first */ 1630 if (!linkmode_test_bit(ETHTOOL_LINK_MODE_FIBRE_BIT, 1631 phydev->supported)) { 1632 err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE); 1633 if (err < 0) 1634 goto error; 1635 1636 /* With the page set, use the generic resume */ 1637 err = genphy_resume(phydev); 1638 if (err < 0) 1639 goto error; 1640 1641 /* Then, the copper link */ 1642 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); 1643 if (err < 0) 1644 goto error; 1645 } 1646 1647 /* With the page set, use the generic resume */ 1648 return genphy_resume(phydev); 1649 1650 error: 1651 marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); 1652 return err; 1653 } 1654 1655 static int marvell_aneg_done(struct phy_device *phydev) 1656 { 1657 int retval = phy_read(phydev, MII_M1011_PHY_STATUS); 1658 1659 return (retval < 0) ? retval : (retval & MII_M1011_PHY_STATUS_RESOLVED); 1660 } 1661 1662 static int m88e1121_did_interrupt(struct phy_device *phydev) 1663 { 1664 int imask; 1665 1666 imask = phy_read(phydev, MII_M1011_IEVENT); 1667 1668 if (imask & MII_M1011_IMASK_INIT) 1669 return 1; 1670 1671 return 0; 1672 } 1673 1674 static void m88e1318_get_wol(struct phy_device *phydev, 1675 struct ethtool_wolinfo *wol) 1676 { 1677 int ret; 1678 1679 wol->supported = WAKE_MAGIC; 1680 wol->wolopts = 0; 1681 1682 ret = phy_read_paged(phydev, MII_MARVELL_WOL_PAGE, 1683 MII_88E1318S_PHY_WOL_CTRL); 1684 if (ret >= 0 && ret & MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE) 1685 wol->wolopts |= WAKE_MAGIC; 1686 } 1687 1688 static int m88e1318_set_wol(struct phy_device *phydev, 1689 struct ethtool_wolinfo *wol) 1690 { 1691 int err = 0, oldpage; 1692 1693 oldpage = phy_save_page(phydev); 1694 if (oldpage < 0) 1695 goto error; 1696 1697 if (wol->wolopts & WAKE_MAGIC) { 1698 /* Explicitly switch to page 0x00, just to be sure */ 1699 err = marvell_write_page(phydev, MII_MARVELL_COPPER_PAGE); 1700 if (err < 0) 1701 goto error; 1702 1703 /* If WOL event happened once, the LED[2] interrupt pin 1704 * will not be cleared unless we reading the interrupt status 1705 * register. If interrupts are in use, the normal interrupt 1706 * handling will clear the WOL event. Clear the WOL event 1707 * before enabling it if !phy_interrupt_is_valid() 1708 */ 1709 if (!phy_interrupt_is_valid(phydev)) 1710 __phy_read(phydev, MII_M1011_IEVENT); 1711 1712 /* Enable the WOL interrupt */ 1713 err = __phy_modify(phydev, MII_88E1318S_PHY_CSIER, 0, 1714 MII_88E1318S_PHY_CSIER_WOL_EIE); 1715 if (err < 0) 1716 goto error; 1717 1718 err = marvell_write_page(phydev, MII_MARVELL_LED_PAGE); 1719 if (err < 0) 1720 goto error; 1721 1722 /* Setup LED[2] as interrupt pin (active low) */ 1723 err = __phy_modify(phydev, MII_88E1318S_PHY_LED_TCR, 1724 MII_88E1318S_PHY_LED_TCR_FORCE_INT, 1725 MII_88E1318S_PHY_LED_TCR_INTn_ENABLE | 1726 MII_88E1318S_PHY_LED_TCR_INT_ACTIVE_LOW); 1727 if (err < 0) 1728 goto error; 1729 1730 err = marvell_write_page(phydev, MII_MARVELL_WOL_PAGE); 1731 if (err < 0) 1732 goto error; 1733 1734 /* Store the device address for the magic packet */ 1735 err = __phy_write(phydev, MII_88E1318S_PHY_MAGIC_PACKET_WORD2, 1736 ((phydev->attached_dev->dev_addr[5] << 8) | 1737 phydev->attached_dev->dev_addr[4])); 1738 if (err < 0) 1739 goto error; 1740 err = __phy_write(phydev, MII_88E1318S_PHY_MAGIC_PACKET_WORD1, 1741 ((phydev->attached_dev->dev_addr[3] << 8) | 1742 phydev->attached_dev->dev_addr[2])); 1743 if (err < 0) 1744 goto error; 1745 err = __phy_write(phydev, MII_88E1318S_PHY_MAGIC_PACKET_WORD0, 1746 ((phydev->attached_dev->dev_addr[1] << 8) | 1747 phydev->attached_dev->dev_addr[0])); 1748 if (err < 0) 1749 goto error; 1750 1751 /* Clear WOL status and enable magic packet matching */ 1752 err = __phy_modify(phydev, MII_88E1318S_PHY_WOL_CTRL, 0, 1753 MII_88E1318S_PHY_WOL_CTRL_CLEAR_WOL_STATUS | 1754 MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE); 1755 if (err < 0) 1756 goto error; 1757 } else { 1758 err = marvell_write_page(phydev, MII_MARVELL_WOL_PAGE); 1759 if (err < 0) 1760 goto error; 1761 1762 /* Clear WOL status and disable magic packet matching */ 1763 err = __phy_modify(phydev, MII_88E1318S_PHY_WOL_CTRL, 1764 MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE, 1765 MII_88E1318S_PHY_WOL_CTRL_CLEAR_WOL_STATUS); 1766 if (err < 0) 1767 goto error; 1768 } 1769 1770 error: 1771 return phy_restore_page(phydev, oldpage, err); 1772 } 1773 1774 static int marvell_get_sset_count(struct phy_device *phydev) 1775 { 1776 if (linkmode_test_bit(ETHTOOL_LINK_MODE_FIBRE_BIT, 1777 phydev->supported)) 1778 return ARRAY_SIZE(marvell_hw_stats); 1779 else 1780 return ARRAY_SIZE(marvell_hw_stats) - NB_FIBER_STATS; 1781 } 1782 1783 static void marvell_get_strings(struct phy_device *phydev, u8 *data) 1784 { 1785 int count = marvell_get_sset_count(phydev); 1786 int i; 1787 1788 for (i = 0; i < count; i++) { 1789 strlcpy(data + i * ETH_GSTRING_LEN, 1790 marvell_hw_stats[i].string, ETH_GSTRING_LEN); 1791 } 1792 } 1793 1794 static u64 marvell_get_stat(struct phy_device *phydev, int i) 1795 { 1796 struct marvell_hw_stat stat = marvell_hw_stats[i]; 1797 struct marvell_priv *priv = phydev->priv; 1798 int val; 1799 u64 ret; 1800 1801 val = phy_read_paged(phydev, stat.page, stat.reg); 1802 if (val < 0) { 1803 ret = U64_MAX; 1804 } else { 1805 val = val & ((1 << stat.bits) - 1); 1806 priv->stats[i] += val; 1807 ret = priv->stats[i]; 1808 } 1809 1810 return ret; 1811 } 1812 1813 static void marvell_get_stats(struct phy_device *phydev, 1814 struct ethtool_stats *stats, u64 *data) 1815 { 1816 int count = marvell_get_sset_count(phydev); 1817 int i; 1818 1819 for (i = 0; i < count; i++) 1820 data[i] = marvell_get_stat(phydev, i); 1821 } 1822 1823 static int marvell_vct5_wait_complete(struct phy_device *phydev) 1824 { 1825 int i; 1826 int val; 1827 1828 for (i = 0; i < 32; i++) { 1829 val = __phy_read(phydev, MII_VCT5_CTRL); 1830 if (val < 0) 1831 return val; 1832 1833 if (val & MII_VCT5_CTRL_COMPLETE) 1834 return 0; 1835 } 1836 1837 phydev_err(phydev, "Timeout while waiting for cable test to finish\n"); 1838 return -ETIMEDOUT; 1839 } 1840 1841 static int marvell_vct5_amplitude(struct phy_device *phydev, int pair) 1842 { 1843 int amplitude; 1844 int val; 1845 int reg; 1846 1847 reg = MII_VCT5_TX_RX_MDI0_COUPLING + pair; 1848 val = __phy_read(phydev, reg); 1849 1850 if (val < 0) 1851 return 0; 1852 1853 amplitude = (val & MII_VCT5_TX_RX_AMPLITUDE_MASK) >> 1854 MII_VCT5_TX_RX_AMPLITUDE_SHIFT; 1855 1856 if (!(val & MII_VCT5_TX_RX_COUPLING_POSITIVE_REFLECTION)) 1857 amplitude = -amplitude; 1858 1859 return 1000 * amplitude / 128; 1860 } 1861 1862 static u32 marvell_vct5_distance2cm(int distance) 1863 { 1864 return distance * 805 / 10; 1865 } 1866 1867 static u32 marvell_vct5_cm2distance(int cm) 1868 { 1869 return cm * 10 / 805; 1870 } 1871 1872 static int marvell_vct5_amplitude_distance(struct phy_device *phydev, 1873 int distance, int pair) 1874 { 1875 u16 reg; 1876 int err; 1877 int mV; 1878 int i; 1879 1880 err = __phy_write(phydev, MII_VCT5_SAMPLE_POINT_DISTANCE, 1881 distance); 1882 if (err) 1883 return err; 1884 1885 reg = MII_VCT5_CTRL_ENABLE | 1886 MII_VCT5_CTRL_TX_SAME_CHANNEL | 1887 MII_VCT5_CTRL_SAMPLES_DEFAULT | 1888 MII_VCT5_CTRL_SAMPLE_POINT | 1889 MII_VCT5_CTRL_PEEK_HYST_DEFAULT; 1890 err = __phy_write(phydev, MII_VCT5_CTRL, reg); 1891 if (err) 1892 return err; 1893 1894 err = marvell_vct5_wait_complete(phydev); 1895 if (err) 1896 return err; 1897 1898 for (i = 0; i < 4; i++) { 1899 if (pair != PHY_PAIR_ALL && i != pair) 1900 continue; 1901 1902 mV = marvell_vct5_amplitude(phydev, i); 1903 ethnl_cable_test_amplitude(phydev, i, mV); 1904 } 1905 1906 return 0; 1907 } 1908 1909 static int marvell_vct5_amplitude_graph(struct phy_device *phydev) 1910 { 1911 struct marvell_priv *priv = phydev->priv; 1912 int distance; 1913 u16 width; 1914 int page; 1915 int err; 1916 u16 reg; 1917 1918 if (priv->first <= TDR_SHORT_CABLE_LENGTH) 1919 width = MII_VCT5_TX_PULSE_CTRL_PULSE_WIDTH_32nS; 1920 else 1921 width = MII_VCT5_TX_PULSE_CTRL_PULSE_WIDTH_128nS; 1922 1923 reg = MII_VCT5_TX_PULSE_CTRL_GT_140m_46_86mV | 1924 MII_VCT5_TX_PULSE_CTRL_DONT_WAIT_LINK_DOWN | 1925 MII_VCT5_TX_PULSE_CTRL_MAX_AMP | width; 1926 1927 err = phy_write_paged(phydev, MII_MARVELL_VCT5_PAGE, 1928 MII_VCT5_TX_PULSE_CTRL, reg); 1929 if (err) 1930 return err; 1931 1932 /* Reading the TDR data is very MDIO heavy. We need to optimize 1933 * access to keep the time to a minimum. So lock the bus once, 1934 * and don't release it until complete. We can then avoid having 1935 * to change the page for every access, greatly speeding things 1936 * up. 1937 */ 1938 page = phy_select_page(phydev, MII_MARVELL_VCT5_PAGE); 1939 if (page < 0) 1940 goto restore_page; 1941 1942 for (distance = priv->first; 1943 distance <= priv->last; 1944 distance += priv->step) { 1945 err = marvell_vct5_amplitude_distance(phydev, distance, 1946 priv->pair); 1947 if (err) 1948 goto restore_page; 1949 1950 if (distance > TDR_SHORT_CABLE_LENGTH && 1951 width == MII_VCT5_TX_PULSE_CTRL_PULSE_WIDTH_32nS) { 1952 width = MII_VCT5_TX_PULSE_CTRL_PULSE_WIDTH_128nS; 1953 reg = MII_VCT5_TX_PULSE_CTRL_GT_140m_46_86mV | 1954 MII_VCT5_TX_PULSE_CTRL_DONT_WAIT_LINK_DOWN | 1955 MII_VCT5_TX_PULSE_CTRL_MAX_AMP | width; 1956 err = __phy_write(phydev, MII_VCT5_TX_PULSE_CTRL, reg); 1957 if (err) 1958 goto restore_page; 1959 } 1960 } 1961 1962 restore_page: 1963 return phy_restore_page(phydev, page, err); 1964 } 1965 1966 static int marvell_cable_test_start_common(struct phy_device *phydev) 1967 { 1968 int bmcr, bmsr, ret; 1969 1970 /* If auto-negotiation is enabled, but not complete, the cable 1971 * test never completes. So disable auto-neg. 1972 */ 1973 bmcr = phy_read(phydev, MII_BMCR); 1974 if (bmcr < 0) 1975 return bmcr; 1976 1977 bmsr = phy_read(phydev, MII_BMSR); 1978 1979 if (bmsr < 0) 1980 return bmsr; 1981 1982 if (bmcr & BMCR_ANENABLE) { 1983 ret = phy_modify(phydev, MII_BMCR, BMCR_ANENABLE, 0); 1984 if (ret < 0) 1985 return ret; 1986 ret = genphy_soft_reset(phydev); 1987 if (ret < 0) 1988 return ret; 1989 } 1990 1991 /* If the link is up, allow it some time to go down */ 1992 if (bmsr & BMSR_LSTATUS) 1993 msleep(1500); 1994 1995 return 0; 1996 } 1997 1998 static int marvell_vct7_cable_test_start(struct phy_device *phydev) 1999 { 2000 struct marvell_priv *priv = phydev->priv; 2001 int ret; 2002 2003 ret = marvell_cable_test_start_common(phydev); 2004 if (ret) 2005 return ret; 2006 2007 priv->cable_test_tdr = false; 2008 2009 /* Reset the VCT5 API control to defaults, otherwise 2010 * VCT7 does not work correctly. 2011 */ 2012 ret = phy_write_paged(phydev, MII_MARVELL_VCT5_PAGE, 2013 MII_VCT5_CTRL, 2014 MII_VCT5_CTRL_TX_SAME_CHANNEL | 2015 MII_VCT5_CTRL_SAMPLES_DEFAULT | 2016 MII_VCT5_CTRL_MODE_MAXIMUM_PEEK | 2017 MII_VCT5_CTRL_PEEK_HYST_DEFAULT); 2018 if (ret) 2019 return ret; 2020 2021 ret = phy_write_paged(phydev, MII_MARVELL_VCT5_PAGE, 2022 MII_VCT5_SAMPLE_POINT_DISTANCE, 0); 2023 if (ret) 2024 return ret; 2025 2026 return phy_write_paged(phydev, MII_MARVELL_VCT7_PAGE, 2027 MII_VCT7_CTRL, 2028 MII_VCT7_CTRL_RUN_NOW | 2029 MII_VCT7_CTRL_CENTIMETERS); 2030 } 2031 2032 static int marvell_vct5_cable_test_tdr_start(struct phy_device *phydev, 2033 const struct phy_tdr_config *cfg) 2034 { 2035 struct marvell_priv *priv = phydev->priv; 2036 int ret; 2037 2038 priv->cable_test_tdr = true; 2039 priv->first = marvell_vct5_cm2distance(cfg->first); 2040 priv->last = marvell_vct5_cm2distance(cfg->last); 2041 priv->step = marvell_vct5_cm2distance(cfg->step); 2042 priv->pair = cfg->pair; 2043 2044 if (priv->first > MII_VCT5_SAMPLE_POINT_DISTANCE_MAX) 2045 return -EINVAL; 2046 2047 if (priv->last > MII_VCT5_SAMPLE_POINT_DISTANCE_MAX) 2048 return -EINVAL; 2049 2050 /* Disable VCT7 */ 2051 ret = phy_write_paged(phydev, MII_MARVELL_VCT7_PAGE, 2052 MII_VCT7_CTRL, 0); 2053 if (ret) 2054 return ret; 2055 2056 ret = marvell_cable_test_start_common(phydev); 2057 if (ret) 2058 return ret; 2059 2060 ret = ethnl_cable_test_pulse(phydev, 1000); 2061 if (ret) 2062 return ret; 2063 2064 return ethnl_cable_test_step(phydev, 2065 marvell_vct5_distance2cm(priv->first), 2066 marvell_vct5_distance2cm(priv->last), 2067 marvell_vct5_distance2cm(priv->step)); 2068 } 2069 2070 static int marvell_vct7_distance_to_length(int distance, bool meter) 2071 { 2072 if (meter) 2073 distance *= 100; 2074 2075 return distance; 2076 } 2077 2078 static bool marvell_vct7_distance_valid(int result) 2079 { 2080 switch (result) { 2081 case MII_VCT7_RESULTS_OPEN: 2082 case MII_VCT7_RESULTS_SAME_SHORT: 2083 case MII_VCT7_RESULTS_CROSS_SHORT: 2084 return true; 2085 } 2086 return false; 2087 } 2088 2089 static int marvell_vct7_report_length(struct phy_device *phydev, 2090 int pair, bool meter) 2091 { 2092 int length; 2093 int ret; 2094 2095 ret = phy_read_paged(phydev, MII_MARVELL_VCT7_PAGE, 2096 MII_VCT7_PAIR_0_DISTANCE + pair); 2097 if (ret < 0) 2098 return ret; 2099 2100 length = marvell_vct7_distance_to_length(ret, meter); 2101 2102 ethnl_cable_test_fault_length(phydev, pair, length); 2103 2104 return 0; 2105 } 2106 2107 static int marvell_vct7_cable_test_report_trans(int result) 2108 { 2109 switch (result) { 2110 case MII_VCT7_RESULTS_OK: 2111 return ETHTOOL_A_CABLE_RESULT_CODE_OK; 2112 case MII_VCT7_RESULTS_OPEN: 2113 return ETHTOOL_A_CABLE_RESULT_CODE_OPEN; 2114 case MII_VCT7_RESULTS_SAME_SHORT: 2115 return ETHTOOL_A_CABLE_RESULT_CODE_SAME_SHORT; 2116 case MII_VCT7_RESULTS_CROSS_SHORT: 2117 return ETHTOOL_A_CABLE_RESULT_CODE_CROSS_SHORT; 2118 default: 2119 return ETHTOOL_A_CABLE_RESULT_CODE_UNSPEC; 2120 } 2121 } 2122 2123 static int marvell_vct7_cable_test_report(struct phy_device *phydev) 2124 { 2125 int pair0, pair1, pair2, pair3; 2126 bool meter; 2127 int ret; 2128 2129 ret = phy_read_paged(phydev, MII_MARVELL_VCT7_PAGE, 2130 MII_VCT7_RESULTS); 2131 if (ret < 0) 2132 return ret; 2133 2134 pair3 = (ret & MII_VCT7_RESULTS_PAIR3_MASK) >> 2135 MII_VCT7_RESULTS_PAIR3_SHIFT; 2136 pair2 = (ret & MII_VCT7_RESULTS_PAIR2_MASK) >> 2137 MII_VCT7_RESULTS_PAIR2_SHIFT; 2138 pair1 = (ret & MII_VCT7_RESULTS_PAIR1_MASK) >> 2139 MII_VCT7_RESULTS_PAIR1_SHIFT; 2140 pair0 = (ret & MII_VCT7_RESULTS_PAIR0_MASK) >> 2141 MII_VCT7_RESULTS_PAIR0_SHIFT; 2142 2143 ethnl_cable_test_result(phydev, ETHTOOL_A_CABLE_PAIR_A, 2144 marvell_vct7_cable_test_report_trans(pair0)); 2145 ethnl_cable_test_result(phydev, ETHTOOL_A_CABLE_PAIR_B, 2146 marvell_vct7_cable_test_report_trans(pair1)); 2147 ethnl_cable_test_result(phydev, ETHTOOL_A_CABLE_PAIR_C, 2148 marvell_vct7_cable_test_report_trans(pair2)); 2149 ethnl_cable_test_result(phydev, ETHTOOL_A_CABLE_PAIR_D, 2150 marvell_vct7_cable_test_report_trans(pair3)); 2151 2152 ret = phy_read_paged(phydev, MII_MARVELL_VCT7_PAGE, MII_VCT7_CTRL); 2153 if (ret < 0) 2154 return ret; 2155 2156 meter = ret & MII_VCT7_CTRL_METERS; 2157 2158 if (marvell_vct7_distance_valid(pair0)) 2159 marvell_vct7_report_length(phydev, 0, meter); 2160 if (marvell_vct7_distance_valid(pair1)) 2161 marvell_vct7_report_length(phydev, 1, meter); 2162 if (marvell_vct7_distance_valid(pair2)) 2163 marvell_vct7_report_length(phydev, 2, meter); 2164 if (marvell_vct7_distance_valid(pair3)) 2165 marvell_vct7_report_length(phydev, 3, meter); 2166 2167 return 0; 2168 } 2169 2170 static int marvell_vct7_cable_test_get_status(struct phy_device *phydev, 2171 bool *finished) 2172 { 2173 struct marvell_priv *priv = phydev->priv; 2174 int ret; 2175 2176 if (priv->cable_test_tdr) { 2177 ret = marvell_vct5_amplitude_graph(phydev); 2178 *finished = true; 2179 return ret; 2180 } 2181 2182 *finished = false; 2183 2184 ret = phy_read_paged(phydev, MII_MARVELL_VCT7_PAGE, 2185 MII_VCT7_CTRL); 2186 2187 if (ret < 0) 2188 return ret; 2189 2190 if (!(ret & MII_VCT7_CTRL_IN_PROGRESS)) { 2191 *finished = true; 2192 2193 return marvell_vct7_cable_test_report(phydev); 2194 } 2195 2196 return 0; 2197 } 2198 2199 #ifdef CONFIG_HWMON 2200 static int m88e1121_get_temp(struct phy_device *phydev, long *temp) 2201 { 2202 int oldpage; 2203 int ret = 0; 2204 int val; 2205 2206 *temp = 0; 2207 2208 oldpage = phy_select_page(phydev, MII_MARVELL_MISC_TEST_PAGE); 2209 if (oldpage < 0) 2210 goto error; 2211 2212 /* Enable temperature sensor */ 2213 ret = __phy_read(phydev, MII_88E1121_MISC_TEST); 2214 if (ret < 0) 2215 goto error; 2216 2217 ret = __phy_write(phydev, MII_88E1121_MISC_TEST, 2218 ret | MII_88E1121_MISC_TEST_TEMP_SENSOR_EN); 2219 if (ret < 0) 2220 goto error; 2221 2222 /* Wait for temperature to stabilize */ 2223 usleep_range(10000, 12000); 2224 2225 val = __phy_read(phydev, MII_88E1121_MISC_TEST); 2226 if (val < 0) { 2227 ret = val; 2228 goto error; 2229 } 2230 2231 /* Disable temperature sensor */ 2232 ret = __phy_write(phydev, MII_88E1121_MISC_TEST, 2233 ret & ~MII_88E1121_MISC_TEST_TEMP_SENSOR_EN); 2234 if (ret < 0) 2235 goto error; 2236 2237 *temp = ((val & MII_88E1121_MISC_TEST_TEMP_MASK) - 5) * 5000; 2238 2239 error: 2240 return phy_restore_page(phydev, oldpage, ret); 2241 } 2242 2243 static int m88e1121_hwmon_read(struct device *dev, 2244 enum hwmon_sensor_types type, 2245 u32 attr, int channel, long *temp) 2246 { 2247 struct phy_device *phydev = dev_get_drvdata(dev); 2248 int err; 2249 2250 switch (attr) { 2251 case hwmon_temp_input: 2252 err = m88e1121_get_temp(phydev, temp); 2253 break; 2254 default: 2255 return -EOPNOTSUPP; 2256 } 2257 2258 return err; 2259 } 2260 2261 static umode_t m88e1121_hwmon_is_visible(const void *data, 2262 enum hwmon_sensor_types type, 2263 u32 attr, int channel) 2264 { 2265 if (type != hwmon_temp) 2266 return 0; 2267 2268 switch (attr) { 2269 case hwmon_temp_input: 2270 return 0444; 2271 default: 2272 return 0; 2273 } 2274 } 2275 2276 static u32 m88e1121_hwmon_chip_config[] = { 2277 HWMON_C_REGISTER_TZ, 2278 0 2279 }; 2280 2281 static const struct hwmon_channel_info m88e1121_hwmon_chip = { 2282 .type = hwmon_chip, 2283 .config = m88e1121_hwmon_chip_config, 2284 }; 2285 2286 static u32 m88e1121_hwmon_temp_config[] = { 2287 HWMON_T_INPUT, 2288 0 2289 }; 2290 2291 static const struct hwmon_channel_info m88e1121_hwmon_temp = { 2292 .type = hwmon_temp, 2293 .config = m88e1121_hwmon_temp_config, 2294 }; 2295 2296 static const struct hwmon_channel_info *m88e1121_hwmon_info[] = { 2297 &m88e1121_hwmon_chip, 2298 &m88e1121_hwmon_temp, 2299 NULL 2300 }; 2301 2302 static const struct hwmon_ops m88e1121_hwmon_hwmon_ops = { 2303 .is_visible = m88e1121_hwmon_is_visible, 2304 .read = m88e1121_hwmon_read, 2305 }; 2306 2307 static const struct hwmon_chip_info m88e1121_hwmon_chip_info = { 2308 .ops = &m88e1121_hwmon_hwmon_ops, 2309 .info = m88e1121_hwmon_info, 2310 }; 2311 2312 static int m88e1510_get_temp(struct phy_device *phydev, long *temp) 2313 { 2314 int ret; 2315 2316 *temp = 0; 2317 2318 ret = phy_read_paged(phydev, MII_MARVELL_MISC_TEST_PAGE, 2319 MII_88E1510_TEMP_SENSOR); 2320 if (ret < 0) 2321 return ret; 2322 2323 *temp = ((ret & MII_88E1510_TEMP_SENSOR_MASK) - 25) * 1000; 2324 2325 return 0; 2326 } 2327 2328 static int m88e1510_get_temp_critical(struct phy_device *phydev, long *temp) 2329 { 2330 int ret; 2331 2332 *temp = 0; 2333 2334 ret = phy_read_paged(phydev, MII_MARVELL_MISC_TEST_PAGE, 2335 MII_88E1121_MISC_TEST); 2336 if (ret < 0) 2337 return ret; 2338 2339 *temp = (((ret & MII_88E1510_MISC_TEST_TEMP_THRESHOLD_MASK) >> 2340 MII_88E1510_MISC_TEST_TEMP_THRESHOLD_SHIFT) * 5) - 25; 2341 /* convert to mC */ 2342 *temp *= 1000; 2343 2344 return 0; 2345 } 2346 2347 static int m88e1510_set_temp_critical(struct phy_device *phydev, long temp) 2348 { 2349 temp = temp / 1000; 2350 temp = clamp_val(DIV_ROUND_CLOSEST(temp, 5) + 5, 0, 0x1f); 2351 2352 return phy_modify_paged(phydev, MII_MARVELL_MISC_TEST_PAGE, 2353 MII_88E1121_MISC_TEST, 2354 MII_88E1510_MISC_TEST_TEMP_THRESHOLD_MASK, 2355 temp << MII_88E1510_MISC_TEST_TEMP_THRESHOLD_SHIFT); 2356 } 2357 2358 static int m88e1510_get_temp_alarm(struct phy_device *phydev, long *alarm) 2359 { 2360 int ret; 2361 2362 *alarm = false; 2363 2364 ret = phy_read_paged(phydev, MII_MARVELL_MISC_TEST_PAGE, 2365 MII_88E1121_MISC_TEST); 2366 if (ret < 0) 2367 return ret; 2368 2369 *alarm = !!(ret & MII_88E1510_MISC_TEST_TEMP_IRQ); 2370 2371 return 0; 2372 } 2373 2374 static int m88e1510_hwmon_read(struct device *dev, 2375 enum hwmon_sensor_types type, 2376 u32 attr, int channel, long *temp) 2377 { 2378 struct phy_device *phydev = dev_get_drvdata(dev); 2379 int err; 2380 2381 switch (attr) { 2382 case hwmon_temp_input: 2383 err = m88e1510_get_temp(phydev, temp); 2384 break; 2385 case hwmon_temp_crit: 2386 err = m88e1510_get_temp_critical(phydev, temp); 2387 break; 2388 case hwmon_temp_max_alarm: 2389 err = m88e1510_get_temp_alarm(phydev, temp); 2390 break; 2391 default: 2392 return -EOPNOTSUPP; 2393 } 2394 2395 return err; 2396 } 2397 2398 static int m88e1510_hwmon_write(struct device *dev, 2399 enum hwmon_sensor_types type, 2400 u32 attr, int channel, long temp) 2401 { 2402 struct phy_device *phydev = dev_get_drvdata(dev); 2403 int err; 2404 2405 switch (attr) { 2406 case hwmon_temp_crit: 2407 err = m88e1510_set_temp_critical(phydev, temp); 2408 break; 2409 default: 2410 return -EOPNOTSUPP; 2411 } 2412 return err; 2413 } 2414 2415 static umode_t m88e1510_hwmon_is_visible(const void *data, 2416 enum hwmon_sensor_types type, 2417 u32 attr, int channel) 2418 { 2419 if (type != hwmon_temp) 2420 return 0; 2421 2422 switch (attr) { 2423 case hwmon_temp_input: 2424 case hwmon_temp_max_alarm: 2425 return 0444; 2426 case hwmon_temp_crit: 2427 return 0644; 2428 default: 2429 return 0; 2430 } 2431 } 2432 2433 static u32 m88e1510_hwmon_temp_config[] = { 2434 HWMON_T_INPUT | HWMON_T_CRIT | HWMON_T_MAX_ALARM, 2435 0 2436 }; 2437 2438 static const struct hwmon_channel_info m88e1510_hwmon_temp = { 2439 .type = hwmon_temp, 2440 .config = m88e1510_hwmon_temp_config, 2441 }; 2442 2443 static const struct hwmon_channel_info *m88e1510_hwmon_info[] = { 2444 &m88e1121_hwmon_chip, 2445 &m88e1510_hwmon_temp, 2446 NULL 2447 }; 2448 2449 static const struct hwmon_ops m88e1510_hwmon_hwmon_ops = { 2450 .is_visible = m88e1510_hwmon_is_visible, 2451 .read = m88e1510_hwmon_read, 2452 .write = m88e1510_hwmon_write, 2453 }; 2454 2455 static const struct hwmon_chip_info m88e1510_hwmon_chip_info = { 2456 .ops = &m88e1510_hwmon_hwmon_ops, 2457 .info = m88e1510_hwmon_info, 2458 }; 2459 2460 static int m88e6390_get_temp(struct phy_device *phydev, long *temp) 2461 { 2462 int sum = 0; 2463 int oldpage; 2464 int ret = 0; 2465 int i; 2466 2467 *temp = 0; 2468 2469 oldpage = phy_select_page(phydev, MII_MARVELL_MISC_TEST_PAGE); 2470 if (oldpage < 0) 2471 goto error; 2472 2473 /* Enable temperature sensor */ 2474 ret = __phy_read(phydev, MII_88E6390_MISC_TEST); 2475 if (ret < 0) 2476 goto error; 2477 2478 ret = ret & ~MII_88E6390_MISC_TEST_SAMPLE_MASK; 2479 ret |= MII_88E6390_MISC_TEST_SAMPLE_ENABLE | 2480 MII_88E6390_MISC_TEST_SAMPLE_1S; 2481 2482 ret = __phy_write(phydev, MII_88E6390_MISC_TEST, ret); 2483 if (ret < 0) 2484 goto error; 2485 2486 /* Wait for temperature to stabilize */ 2487 usleep_range(10000, 12000); 2488 2489 /* Reading the temperature sense has an errata. You need to read 2490 * a number of times and take an average. 2491 */ 2492 for (i = 0; i < MII_88E6390_TEMP_SENSOR_SAMPLES; i++) { 2493 ret = __phy_read(phydev, MII_88E6390_TEMP_SENSOR); 2494 if (ret < 0) 2495 goto error; 2496 sum += ret & MII_88E6390_TEMP_SENSOR_MASK; 2497 } 2498 2499 sum /= MII_88E6390_TEMP_SENSOR_SAMPLES; 2500 *temp = (sum - 75) * 1000; 2501 2502 /* Disable temperature sensor */ 2503 ret = __phy_read(phydev, MII_88E6390_MISC_TEST); 2504 if (ret < 0) 2505 goto error; 2506 2507 ret = ret & ~MII_88E6390_MISC_TEST_SAMPLE_MASK; 2508 ret |= MII_88E6390_MISC_TEST_SAMPLE_DISABLE; 2509 2510 ret = __phy_write(phydev, MII_88E6390_MISC_TEST, ret); 2511 2512 error: 2513 phy_restore_page(phydev, oldpage, ret); 2514 2515 return ret; 2516 } 2517 2518 static int m88e6390_hwmon_read(struct device *dev, 2519 enum hwmon_sensor_types type, 2520 u32 attr, int channel, long *temp) 2521 { 2522 struct phy_device *phydev = dev_get_drvdata(dev); 2523 int err; 2524 2525 switch (attr) { 2526 case hwmon_temp_input: 2527 err = m88e6390_get_temp(phydev, temp); 2528 break; 2529 default: 2530 return -EOPNOTSUPP; 2531 } 2532 2533 return err; 2534 } 2535 2536 static umode_t m88e6390_hwmon_is_visible(const void *data, 2537 enum hwmon_sensor_types type, 2538 u32 attr, int channel) 2539 { 2540 if (type != hwmon_temp) 2541 return 0; 2542 2543 switch (attr) { 2544 case hwmon_temp_input: 2545 return 0444; 2546 default: 2547 return 0; 2548 } 2549 } 2550 2551 static u32 m88e6390_hwmon_temp_config[] = { 2552 HWMON_T_INPUT, 2553 0 2554 }; 2555 2556 static const struct hwmon_channel_info m88e6390_hwmon_temp = { 2557 .type = hwmon_temp, 2558 .config = m88e6390_hwmon_temp_config, 2559 }; 2560 2561 static const struct hwmon_channel_info *m88e6390_hwmon_info[] = { 2562 &m88e1121_hwmon_chip, 2563 &m88e6390_hwmon_temp, 2564 NULL 2565 }; 2566 2567 static const struct hwmon_ops m88e6390_hwmon_hwmon_ops = { 2568 .is_visible = m88e6390_hwmon_is_visible, 2569 .read = m88e6390_hwmon_read, 2570 }; 2571 2572 static const struct hwmon_chip_info m88e6390_hwmon_chip_info = { 2573 .ops = &m88e6390_hwmon_hwmon_ops, 2574 .info = m88e6390_hwmon_info, 2575 }; 2576 2577 static int marvell_hwmon_name(struct phy_device *phydev) 2578 { 2579 struct marvell_priv *priv = phydev->priv; 2580 struct device *dev = &phydev->mdio.dev; 2581 const char *devname = dev_name(dev); 2582 size_t len = strlen(devname); 2583 int i, j; 2584 2585 priv->hwmon_name = devm_kzalloc(dev, len, GFP_KERNEL); 2586 if (!priv->hwmon_name) 2587 return -ENOMEM; 2588 2589 for (i = j = 0; i < len && devname[i]; i++) { 2590 if (isalnum(devname[i])) 2591 priv->hwmon_name[j++] = devname[i]; 2592 } 2593 2594 return 0; 2595 } 2596 2597 static int marvell_hwmon_probe(struct phy_device *phydev, 2598 const struct hwmon_chip_info *chip) 2599 { 2600 struct marvell_priv *priv = phydev->priv; 2601 struct device *dev = &phydev->mdio.dev; 2602 int err; 2603 2604 err = marvell_hwmon_name(phydev); 2605 if (err) 2606 return err; 2607 2608 priv->hwmon_dev = devm_hwmon_device_register_with_info( 2609 dev, priv->hwmon_name, phydev, chip, NULL); 2610 2611 return PTR_ERR_OR_ZERO(priv->hwmon_dev); 2612 } 2613 2614 static int m88e1121_hwmon_probe(struct phy_device *phydev) 2615 { 2616 return marvell_hwmon_probe(phydev, &m88e1121_hwmon_chip_info); 2617 } 2618 2619 static int m88e1510_hwmon_probe(struct phy_device *phydev) 2620 { 2621 return marvell_hwmon_probe(phydev, &m88e1510_hwmon_chip_info); 2622 } 2623 2624 static int m88e6390_hwmon_probe(struct phy_device *phydev) 2625 { 2626 return marvell_hwmon_probe(phydev, &m88e6390_hwmon_chip_info); 2627 } 2628 #else 2629 static int m88e1121_hwmon_probe(struct phy_device *phydev) 2630 { 2631 return 0; 2632 } 2633 2634 static int m88e1510_hwmon_probe(struct phy_device *phydev) 2635 { 2636 return 0; 2637 } 2638 2639 static int m88e6390_hwmon_probe(struct phy_device *phydev) 2640 { 2641 return 0; 2642 } 2643 #endif 2644 2645 static int marvell_probe(struct phy_device *phydev) 2646 { 2647 struct marvell_priv *priv; 2648 2649 priv = devm_kzalloc(&phydev->mdio.dev, sizeof(*priv), GFP_KERNEL); 2650 if (!priv) 2651 return -ENOMEM; 2652 2653 phydev->priv = priv; 2654 2655 return 0; 2656 } 2657 2658 static int m88e1121_probe(struct phy_device *phydev) 2659 { 2660 int err; 2661 2662 err = marvell_probe(phydev); 2663 if (err) 2664 return err; 2665 2666 return m88e1121_hwmon_probe(phydev); 2667 } 2668 2669 static int m88e1510_probe(struct phy_device *phydev) 2670 { 2671 int err; 2672 2673 err = marvell_probe(phydev); 2674 if (err) 2675 return err; 2676 2677 return m88e1510_hwmon_probe(phydev); 2678 } 2679 2680 static int m88e6390_probe(struct phy_device *phydev) 2681 { 2682 int err; 2683 2684 err = marvell_probe(phydev); 2685 if (err) 2686 return err; 2687 2688 return m88e6390_hwmon_probe(phydev); 2689 } 2690 2691 static struct phy_driver marvell_drivers[] = { 2692 { 2693 .phy_id = MARVELL_PHY_ID_88E1101, 2694 .phy_id_mask = MARVELL_PHY_ID_MASK, 2695 .name = "Marvell 88E1101", 2696 /* PHY_GBIT_FEATURES */ 2697 .probe = marvell_probe, 2698 .config_init = marvell_config_init, 2699 .config_aneg = m88e1101_config_aneg, 2700 .ack_interrupt = marvell_ack_interrupt, 2701 .config_intr = marvell_config_intr, 2702 .resume = genphy_resume, 2703 .suspend = genphy_suspend, 2704 .read_page = marvell_read_page, 2705 .write_page = marvell_write_page, 2706 .get_sset_count = marvell_get_sset_count, 2707 .get_strings = marvell_get_strings, 2708 .get_stats = marvell_get_stats, 2709 }, 2710 { 2711 .phy_id = MARVELL_PHY_ID_88E1112, 2712 .phy_id_mask = MARVELL_PHY_ID_MASK, 2713 .name = "Marvell 88E1112", 2714 /* PHY_GBIT_FEATURES */ 2715 .probe = marvell_probe, 2716 .config_init = m88e1111_config_init, 2717 .config_aneg = marvell_config_aneg, 2718 .ack_interrupt = marvell_ack_interrupt, 2719 .config_intr = marvell_config_intr, 2720 .resume = genphy_resume, 2721 .suspend = genphy_suspend, 2722 .read_page = marvell_read_page, 2723 .write_page = marvell_write_page, 2724 .get_sset_count = marvell_get_sset_count, 2725 .get_strings = marvell_get_strings, 2726 .get_stats = marvell_get_stats, 2727 .get_tunable = m88e1011_get_tunable, 2728 .set_tunable = m88e1011_set_tunable, 2729 }, 2730 { 2731 .phy_id = MARVELL_PHY_ID_88E1111, 2732 .phy_id_mask = MARVELL_PHY_ID_MASK, 2733 .name = "Marvell 88E1111", 2734 /* PHY_GBIT_FEATURES */ 2735 .probe = marvell_probe, 2736 .config_init = m88e1111_config_init, 2737 .config_aneg = m88e1111_config_aneg, 2738 .read_status = marvell_read_status, 2739 .ack_interrupt = marvell_ack_interrupt, 2740 .config_intr = marvell_config_intr, 2741 .resume = genphy_resume, 2742 .suspend = genphy_suspend, 2743 .read_page = marvell_read_page, 2744 .write_page = marvell_write_page, 2745 .get_sset_count = marvell_get_sset_count, 2746 .get_strings = marvell_get_strings, 2747 .get_stats = marvell_get_stats, 2748 .get_tunable = m88e1111_get_tunable, 2749 .set_tunable = m88e1111_set_tunable, 2750 }, 2751 { 2752 .phy_id = MARVELL_PHY_ID_88E1111_FINISAR, 2753 .phy_id_mask = MARVELL_PHY_ID_MASK, 2754 .name = "Marvell 88E1111 (Finisar)", 2755 /* PHY_GBIT_FEATURES */ 2756 .probe = marvell_probe, 2757 .config_init = m88e1111_config_init, 2758 .config_aneg = m88e1111_config_aneg, 2759 .read_status = marvell_read_status, 2760 .ack_interrupt = marvell_ack_interrupt, 2761 .config_intr = marvell_config_intr, 2762 .resume = genphy_resume, 2763 .suspend = genphy_suspend, 2764 .read_page = marvell_read_page, 2765 .write_page = marvell_write_page, 2766 .get_sset_count = marvell_get_sset_count, 2767 .get_strings = marvell_get_strings, 2768 .get_stats = marvell_get_stats, 2769 .get_tunable = m88e1111_get_tunable, 2770 .set_tunable = m88e1111_set_tunable, 2771 }, 2772 { 2773 .phy_id = MARVELL_PHY_ID_88E1118, 2774 .phy_id_mask = MARVELL_PHY_ID_MASK, 2775 .name = "Marvell 88E1118", 2776 /* PHY_GBIT_FEATURES */ 2777 .probe = marvell_probe, 2778 .config_init = m88e1118_config_init, 2779 .config_aneg = m88e1118_config_aneg, 2780 .ack_interrupt = marvell_ack_interrupt, 2781 .config_intr = marvell_config_intr, 2782 .resume = genphy_resume, 2783 .suspend = genphy_suspend, 2784 .read_page = marvell_read_page, 2785 .write_page = marvell_write_page, 2786 .get_sset_count = marvell_get_sset_count, 2787 .get_strings = marvell_get_strings, 2788 .get_stats = marvell_get_stats, 2789 }, 2790 { 2791 .phy_id = MARVELL_PHY_ID_88E1121R, 2792 .phy_id_mask = MARVELL_PHY_ID_MASK, 2793 .name = "Marvell 88E1121R", 2794 /* PHY_GBIT_FEATURES */ 2795 .probe = m88e1121_probe, 2796 .config_init = marvell_config_init, 2797 .config_aneg = m88e1121_config_aneg, 2798 .read_status = marvell_read_status, 2799 .ack_interrupt = marvell_ack_interrupt, 2800 .config_intr = marvell_config_intr, 2801 .did_interrupt = m88e1121_did_interrupt, 2802 .resume = genphy_resume, 2803 .suspend = genphy_suspend, 2804 .read_page = marvell_read_page, 2805 .write_page = marvell_write_page, 2806 .get_sset_count = marvell_get_sset_count, 2807 .get_strings = marvell_get_strings, 2808 .get_stats = marvell_get_stats, 2809 .get_tunable = m88e1011_get_tunable, 2810 .set_tunable = m88e1011_set_tunable, 2811 }, 2812 { 2813 .phy_id = MARVELL_PHY_ID_88E1318S, 2814 .phy_id_mask = MARVELL_PHY_ID_MASK, 2815 .name = "Marvell 88E1318S", 2816 /* PHY_GBIT_FEATURES */ 2817 .probe = marvell_probe, 2818 .config_init = m88e1318_config_init, 2819 .config_aneg = m88e1318_config_aneg, 2820 .read_status = marvell_read_status, 2821 .ack_interrupt = marvell_ack_interrupt, 2822 .config_intr = marvell_config_intr, 2823 .did_interrupt = m88e1121_did_interrupt, 2824 .get_wol = m88e1318_get_wol, 2825 .set_wol = m88e1318_set_wol, 2826 .resume = genphy_resume, 2827 .suspend = genphy_suspend, 2828 .read_page = marvell_read_page, 2829 .write_page = marvell_write_page, 2830 .get_sset_count = marvell_get_sset_count, 2831 .get_strings = marvell_get_strings, 2832 .get_stats = marvell_get_stats, 2833 }, 2834 { 2835 .phy_id = MARVELL_PHY_ID_88E1145, 2836 .phy_id_mask = MARVELL_PHY_ID_MASK, 2837 .name = "Marvell 88E1145", 2838 /* PHY_GBIT_FEATURES */ 2839 .probe = marvell_probe, 2840 .config_init = m88e1145_config_init, 2841 .config_aneg = m88e1101_config_aneg, 2842 .read_status = genphy_read_status, 2843 .ack_interrupt = marvell_ack_interrupt, 2844 .config_intr = marvell_config_intr, 2845 .resume = genphy_resume, 2846 .suspend = genphy_suspend, 2847 .read_page = marvell_read_page, 2848 .write_page = marvell_write_page, 2849 .get_sset_count = marvell_get_sset_count, 2850 .get_strings = marvell_get_strings, 2851 .get_stats = marvell_get_stats, 2852 .get_tunable = m88e1111_get_tunable, 2853 .set_tunable = m88e1111_set_tunable, 2854 }, 2855 { 2856 .phy_id = MARVELL_PHY_ID_88E1149R, 2857 .phy_id_mask = MARVELL_PHY_ID_MASK, 2858 .name = "Marvell 88E1149R", 2859 /* PHY_GBIT_FEATURES */ 2860 .probe = marvell_probe, 2861 .config_init = m88e1149_config_init, 2862 .config_aneg = m88e1118_config_aneg, 2863 .ack_interrupt = marvell_ack_interrupt, 2864 .config_intr = marvell_config_intr, 2865 .resume = genphy_resume, 2866 .suspend = genphy_suspend, 2867 .read_page = marvell_read_page, 2868 .write_page = marvell_write_page, 2869 .get_sset_count = marvell_get_sset_count, 2870 .get_strings = marvell_get_strings, 2871 .get_stats = marvell_get_stats, 2872 }, 2873 { 2874 .phy_id = MARVELL_PHY_ID_88E1240, 2875 .phy_id_mask = MARVELL_PHY_ID_MASK, 2876 .name = "Marvell 88E1240", 2877 /* PHY_GBIT_FEATURES */ 2878 .probe = marvell_probe, 2879 .config_init = m88e1111_config_init, 2880 .config_aneg = marvell_config_aneg, 2881 .ack_interrupt = marvell_ack_interrupt, 2882 .config_intr = marvell_config_intr, 2883 .resume = genphy_resume, 2884 .suspend = genphy_suspend, 2885 .read_page = marvell_read_page, 2886 .write_page = marvell_write_page, 2887 .get_sset_count = marvell_get_sset_count, 2888 .get_strings = marvell_get_strings, 2889 .get_stats = marvell_get_stats, 2890 }, 2891 { 2892 .phy_id = MARVELL_PHY_ID_88E1116R, 2893 .phy_id_mask = MARVELL_PHY_ID_MASK, 2894 .name = "Marvell 88E1116R", 2895 /* PHY_GBIT_FEATURES */ 2896 .probe = marvell_probe, 2897 .config_init = m88e1116r_config_init, 2898 .ack_interrupt = marvell_ack_interrupt, 2899 .config_intr = marvell_config_intr, 2900 .resume = genphy_resume, 2901 .suspend = genphy_suspend, 2902 .read_page = marvell_read_page, 2903 .write_page = marvell_write_page, 2904 .get_sset_count = marvell_get_sset_count, 2905 .get_strings = marvell_get_strings, 2906 .get_stats = marvell_get_stats, 2907 .get_tunable = m88e1011_get_tunable, 2908 .set_tunable = m88e1011_set_tunable, 2909 }, 2910 { 2911 .phy_id = MARVELL_PHY_ID_88E1510, 2912 .phy_id_mask = MARVELL_PHY_ID_MASK, 2913 .name = "Marvell 88E1510", 2914 .features = PHY_GBIT_FIBRE_FEATURES, 2915 .flags = PHY_POLL_CABLE_TEST, 2916 .probe = m88e1510_probe, 2917 .config_init = m88e1510_config_init, 2918 .config_aneg = m88e1510_config_aneg, 2919 .read_status = marvell_read_status, 2920 .ack_interrupt = marvell_ack_interrupt, 2921 .config_intr = marvell_config_intr, 2922 .did_interrupt = m88e1121_did_interrupt, 2923 .get_wol = m88e1318_get_wol, 2924 .set_wol = m88e1318_set_wol, 2925 .resume = marvell_resume, 2926 .suspend = marvell_suspend, 2927 .read_page = marvell_read_page, 2928 .write_page = marvell_write_page, 2929 .get_sset_count = marvell_get_sset_count, 2930 .get_strings = marvell_get_strings, 2931 .get_stats = marvell_get_stats, 2932 .set_loopback = genphy_loopback, 2933 .get_tunable = m88e1011_get_tunable, 2934 .set_tunable = m88e1011_set_tunable, 2935 .cable_test_start = marvell_vct7_cable_test_start, 2936 .cable_test_tdr_start = marvell_vct5_cable_test_tdr_start, 2937 .cable_test_get_status = marvell_vct7_cable_test_get_status, 2938 }, 2939 { 2940 .phy_id = MARVELL_PHY_ID_88E1540, 2941 .phy_id_mask = MARVELL_PHY_ID_MASK, 2942 .name = "Marvell 88E1540", 2943 /* PHY_GBIT_FEATURES */ 2944 .flags = PHY_POLL_CABLE_TEST, 2945 .probe = m88e1510_probe, 2946 .config_init = marvell_config_init, 2947 .config_aneg = m88e1510_config_aneg, 2948 .read_status = marvell_read_status, 2949 .ack_interrupt = marvell_ack_interrupt, 2950 .config_intr = marvell_config_intr, 2951 .did_interrupt = m88e1121_did_interrupt, 2952 .resume = genphy_resume, 2953 .suspend = genphy_suspend, 2954 .read_page = marvell_read_page, 2955 .write_page = marvell_write_page, 2956 .get_sset_count = marvell_get_sset_count, 2957 .get_strings = marvell_get_strings, 2958 .get_stats = marvell_get_stats, 2959 .get_tunable = m88e1540_get_tunable, 2960 .set_tunable = m88e1540_set_tunable, 2961 .cable_test_start = marvell_vct7_cable_test_start, 2962 .cable_test_tdr_start = marvell_vct5_cable_test_tdr_start, 2963 .cable_test_get_status = marvell_vct7_cable_test_get_status, 2964 }, 2965 { 2966 .phy_id = MARVELL_PHY_ID_88E1545, 2967 .phy_id_mask = MARVELL_PHY_ID_MASK, 2968 .name = "Marvell 88E1545", 2969 .probe = m88e1510_probe, 2970 /* PHY_GBIT_FEATURES */ 2971 .flags = PHY_POLL_CABLE_TEST, 2972 .config_init = marvell_config_init, 2973 .config_aneg = m88e1510_config_aneg, 2974 .read_status = marvell_read_status, 2975 .ack_interrupt = marvell_ack_interrupt, 2976 .config_intr = marvell_config_intr, 2977 .did_interrupt = m88e1121_did_interrupt, 2978 .resume = genphy_resume, 2979 .suspend = genphy_suspend, 2980 .read_page = marvell_read_page, 2981 .write_page = marvell_write_page, 2982 .get_sset_count = marvell_get_sset_count, 2983 .get_strings = marvell_get_strings, 2984 .get_stats = marvell_get_stats, 2985 .get_tunable = m88e1540_get_tunable, 2986 .set_tunable = m88e1540_set_tunable, 2987 .cable_test_start = marvell_vct7_cable_test_start, 2988 .cable_test_tdr_start = marvell_vct5_cable_test_tdr_start, 2989 .cable_test_get_status = marvell_vct7_cable_test_get_status, 2990 }, 2991 { 2992 .phy_id = MARVELL_PHY_ID_88E3016, 2993 .phy_id_mask = MARVELL_PHY_ID_MASK, 2994 .name = "Marvell 88E3016", 2995 /* PHY_BASIC_FEATURES */ 2996 .probe = marvell_probe, 2997 .config_init = m88e3016_config_init, 2998 .aneg_done = marvell_aneg_done, 2999 .read_status = marvell_read_status, 3000 .ack_interrupt = marvell_ack_interrupt, 3001 .config_intr = marvell_config_intr, 3002 .did_interrupt = m88e1121_did_interrupt, 3003 .resume = genphy_resume, 3004 .suspend = genphy_suspend, 3005 .read_page = marvell_read_page, 3006 .write_page = marvell_write_page, 3007 .get_sset_count = marvell_get_sset_count, 3008 .get_strings = marvell_get_strings, 3009 .get_stats = marvell_get_stats, 3010 }, 3011 { 3012 .phy_id = MARVELL_PHY_ID_88E6390, 3013 .phy_id_mask = MARVELL_PHY_ID_MASK, 3014 .name = "Marvell 88E6390", 3015 /* PHY_GBIT_FEATURES */ 3016 .flags = PHY_POLL_CABLE_TEST, 3017 .probe = m88e6390_probe, 3018 .config_init = marvell_config_init, 3019 .config_aneg = m88e6390_config_aneg, 3020 .read_status = marvell_read_status, 3021 .ack_interrupt = marvell_ack_interrupt, 3022 .config_intr = marvell_config_intr, 3023 .did_interrupt = m88e1121_did_interrupt, 3024 .resume = genphy_resume, 3025 .suspend = genphy_suspend, 3026 .read_page = marvell_read_page, 3027 .write_page = marvell_write_page, 3028 .get_sset_count = marvell_get_sset_count, 3029 .get_strings = marvell_get_strings, 3030 .get_stats = marvell_get_stats, 3031 .get_tunable = m88e1540_get_tunable, 3032 .set_tunable = m88e1540_set_tunable, 3033 .cable_test_start = marvell_vct7_cable_test_start, 3034 .cable_test_tdr_start = marvell_vct5_cable_test_tdr_start, 3035 .cable_test_get_status = marvell_vct7_cable_test_get_status, 3036 }, 3037 { 3038 .phy_id = MARVELL_PHY_ID_88E1340S, 3039 .phy_id_mask = MARVELL_PHY_ID_MASK, 3040 .name = "Marvell 88E1340S", 3041 .probe = m88e1510_probe, 3042 /* PHY_GBIT_FEATURES */ 3043 .config_init = marvell_config_init, 3044 .config_aneg = m88e1510_config_aneg, 3045 .read_status = marvell_read_status, 3046 .ack_interrupt = marvell_ack_interrupt, 3047 .config_intr = marvell_config_intr, 3048 .did_interrupt = m88e1121_did_interrupt, 3049 .resume = genphy_resume, 3050 .suspend = genphy_suspend, 3051 .read_page = marvell_read_page, 3052 .write_page = marvell_write_page, 3053 .get_sset_count = marvell_get_sset_count, 3054 .get_strings = marvell_get_strings, 3055 .get_stats = marvell_get_stats, 3056 .get_tunable = m88e1540_get_tunable, 3057 .set_tunable = m88e1540_set_tunable, 3058 }, 3059 { 3060 .phy_id = MARVELL_PHY_ID_88E1548P, 3061 .phy_id_mask = MARVELL_PHY_ID_MASK, 3062 .name = "Marvell 88E1548P", 3063 .probe = m88e1510_probe, 3064 .features = PHY_GBIT_FIBRE_FEATURES, 3065 .config_init = marvell_config_init, 3066 .config_aneg = m88e1510_config_aneg, 3067 .read_status = marvell_read_status, 3068 .ack_interrupt = marvell_ack_interrupt, 3069 .config_intr = marvell_config_intr, 3070 .did_interrupt = m88e1121_did_interrupt, 3071 .resume = genphy_resume, 3072 .suspend = genphy_suspend, 3073 .read_page = marvell_read_page, 3074 .write_page = marvell_write_page, 3075 .get_sset_count = marvell_get_sset_count, 3076 .get_strings = marvell_get_strings, 3077 .get_stats = marvell_get_stats, 3078 .get_tunable = m88e1540_get_tunable, 3079 .set_tunable = m88e1540_set_tunable, 3080 }, 3081 }; 3082 3083 module_phy_driver(marvell_drivers); 3084 3085 static struct mdio_device_id __maybe_unused marvell_tbl[] = { 3086 { MARVELL_PHY_ID_88E1101, MARVELL_PHY_ID_MASK }, 3087 { MARVELL_PHY_ID_88E1112, MARVELL_PHY_ID_MASK }, 3088 { MARVELL_PHY_ID_88E1111, MARVELL_PHY_ID_MASK }, 3089 { MARVELL_PHY_ID_88E1111_FINISAR, MARVELL_PHY_ID_MASK }, 3090 { MARVELL_PHY_ID_88E1118, MARVELL_PHY_ID_MASK }, 3091 { MARVELL_PHY_ID_88E1121R, MARVELL_PHY_ID_MASK }, 3092 { MARVELL_PHY_ID_88E1145, MARVELL_PHY_ID_MASK }, 3093 { MARVELL_PHY_ID_88E1149R, MARVELL_PHY_ID_MASK }, 3094 { MARVELL_PHY_ID_88E1240, MARVELL_PHY_ID_MASK }, 3095 { MARVELL_PHY_ID_88E1318S, MARVELL_PHY_ID_MASK }, 3096 { MARVELL_PHY_ID_88E1116R, MARVELL_PHY_ID_MASK }, 3097 { MARVELL_PHY_ID_88E1510, MARVELL_PHY_ID_MASK }, 3098 { MARVELL_PHY_ID_88E1540, MARVELL_PHY_ID_MASK }, 3099 { MARVELL_PHY_ID_88E1545, MARVELL_PHY_ID_MASK }, 3100 { MARVELL_PHY_ID_88E3016, MARVELL_PHY_ID_MASK }, 3101 { MARVELL_PHY_ID_88E6390, MARVELL_PHY_ID_MASK }, 3102 { MARVELL_PHY_ID_88E1340S, MARVELL_PHY_ID_MASK }, 3103 { MARVELL_PHY_ID_88E1548P, MARVELL_PHY_ID_MASK }, 3104 { } 3105 }; 3106 3107 MODULE_DEVICE_TABLE(mdio, marvell_tbl); 3108