1 /* 2 * drivers/net/phy/marvell.c 3 * 4 * Driver for Marvell PHYs 5 * 6 * Author: Andy Fleming 7 * 8 * Copyright (c) 2004 Freescale Semiconductor, Inc. 9 * 10 * This program is free software; you can redistribute it and/or modify it 11 * under the terms of the GNU General Public License as published by the 12 * Free Software Foundation; either version 2 of the License, or (at your 13 * option) any later version. 14 * 15 */ 16 #include <linux/kernel.h> 17 #include <linux/string.h> 18 #include <linux/errno.h> 19 #include <linux/unistd.h> 20 #include <linux/interrupt.h> 21 #include <linux/init.h> 22 #include <linux/delay.h> 23 #include <linux/netdevice.h> 24 #include <linux/etherdevice.h> 25 #include <linux/skbuff.h> 26 #include <linux/spinlock.h> 27 #include <linux/mm.h> 28 #include <linux/module.h> 29 #include <linux/mii.h> 30 #include <linux/ethtool.h> 31 #include <linux/phy.h> 32 33 #include <asm/io.h> 34 #include <asm/irq.h> 35 #include <asm/uaccess.h> 36 37 #define MII_M1011_IEVENT 0x13 38 #define MII_M1011_IEVENT_CLEAR 0x0000 39 40 #define MII_M1011_IMASK 0x12 41 #define MII_M1011_IMASK_INIT 0x6400 42 #define MII_M1011_IMASK_CLEAR 0x0000 43 44 #define MII_M1011_PHY_SCR 0x10 45 #define MII_M1011_PHY_SCR_AUTO_CROSS 0x0060 46 47 #define MII_M1145_PHY_EXT_CR 0x14 48 #define MII_M1145_RGMII_RX_DELAY 0x0080 49 #define MII_M1145_RGMII_TX_DELAY 0x0002 50 51 #define M1145_DEV_FLAGS_RESISTANCE 0x00000001 52 53 #define MII_M1111_PHY_LED_CONTROL 0x18 54 #define MII_M1111_PHY_LED_DIRECT 0x4100 55 #define MII_M1111_PHY_LED_COMBINE 0x411c 56 #define MII_M1111_PHY_EXT_CR 0x14 57 #define MII_M1111_RX_DELAY 0x80 58 #define MII_M1111_TX_DELAY 0x2 59 #define MII_M1111_PHY_EXT_SR 0x1b 60 61 #define MII_M1111_HWCFG_MODE_MASK 0xf 62 #define MII_M1111_HWCFG_MODE_COPPER_RGMII 0xb 63 #define MII_M1111_HWCFG_MODE_FIBER_RGMII 0x3 64 #define MII_M1111_HWCFG_MODE_SGMII_NO_CLK 0x4 65 #define MII_M1111_HWCFG_MODE_COPPER_RTBI 0x9 66 #define MII_M1111_HWCFG_FIBER_COPPER_AUTO 0x8000 67 #define MII_M1111_HWCFG_FIBER_COPPER_RES 0x2000 68 69 #define MII_M1111_COPPER 0 70 #define MII_M1111_FIBER 1 71 72 #define MII_88E1121_PHY_LED_CTRL 16 73 #define MII_88E1121_PHY_LED_PAGE 3 74 #define MII_88E1121_PHY_LED_DEF 0x0030 75 #define MII_88E1121_PHY_PAGE 22 76 77 #define MII_M1011_PHY_STATUS 0x11 78 #define MII_M1011_PHY_STATUS_1000 0x8000 79 #define MII_M1011_PHY_STATUS_100 0x4000 80 #define MII_M1011_PHY_STATUS_SPD_MASK 0xc000 81 #define MII_M1011_PHY_STATUS_FULLDUPLEX 0x2000 82 #define MII_M1011_PHY_STATUS_RESOLVED 0x0800 83 #define MII_M1011_PHY_STATUS_LINK 0x0400 84 85 86 MODULE_DESCRIPTION("Marvell PHY driver"); 87 MODULE_AUTHOR("Andy Fleming"); 88 MODULE_LICENSE("GPL"); 89 90 static int marvell_ack_interrupt(struct phy_device *phydev) 91 { 92 int err; 93 94 /* Clear the interrupts by reading the reg */ 95 err = phy_read(phydev, MII_M1011_IEVENT); 96 97 if (err < 0) 98 return err; 99 100 return 0; 101 } 102 103 static int marvell_config_intr(struct phy_device *phydev) 104 { 105 int err; 106 107 if (phydev->interrupts == PHY_INTERRUPT_ENABLED) 108 err = phy_write(phydev, MII_M1011_IMASK, MII_M1011_IMASK_INIT); 109 else 110 err = phy_write(phydev, MII_M1011_IMASK, MII_M1011_IMASK_CLEAR); 111 112 return err; 113 } 114 115 static int marvell_config_aneg(struct phy_device *phydev) 116 { 117 int err; 118 119 /* The Marvell PHY has an errata which requires 120 * that certain registers get written in order 121 * to restart autonegotiation */ 122 err = phy_write(phydev, MII_BMCR, BMCR_RESET); 123 124 if (err < 0) 125 return err; 126 127 err = phy_write(phydev, 0x1d, 0x1f); 128 if (err < 0) 129 return err; 130 131 err = phy_write(phydev, 0x1e, 0x200c); 132 if (err < 0) 133 return err; 134 135 err = phy_write(phydev, 0x1d, 0x5); 136 if (err < 0) 137 return err; 138 139 err = phy_write(phydev, 0x1e, 0); 140 if (err < 0) 141 return err; 142 143 err = phy_write(phydev, 0x1e, 0x100); 144 if (err < 0) 145 return err; 146 147 err = phy_write(phydev, MII_M1011_PHY_SCR, 148 MII_M1011_PHY_SCR_AUTO_CROSS); 149 if (err < 0) 150 return err; 151 152 err = phy_write(phydev, MII_M1111_PHY_LED_CONTROL, 153 MII_M1111_PHY_LED_DIRECT); 154 if (err < 0) 155 return err; 156 157 err = genphy_config_aneg(phydev); 158 if (err < 0) 159 return err; 160 161 if (phydev->autoneg != AUTONEG_ENABLE) { 162 int bmcr; 163 164 /* 165 * A write to speed/duplex bits (that is performed by 166 * genphy_config_aneg() call above) must be followed by 167 * a software reset. Otherwise, the write has no effect. 168 */ 169 bmcr = phy_read(phydev, MII_BMCR); 170 if (bmcr < 0) 171 return bmcr; 172 173 err = phy_write(phydev, MII_BMCR, bmcr | BMCR_RESET); 174 if (err < 0) 175 return err; 176 } 177 178 return 0; 179 } 180 181 static int m88e1121_config_aneg(struct phy_device *phydev) 182 { 183 int err, temp; 184 185 err = phy_write(phydev, MII_BMCR, BMCR_RESET); 186 if (err < 0) 187 return err; 188 189 err = phy_write(phydev, MII_M1011_PHY_SCR, 190 MII_M1011_PHY_SCR_AUTO_CROSS); 191 if (err < 0) 192 return err; 193 194 temp = phy_read(phydev, MII_88E1121_PHY_PAGE); 195 196 phy_write(phydev, MII_88E1121_PHY_PAGE, MII_88E1121_PHY_LED_PAGE); 197 phy_write(phydev, MII_88E1121_PHY_LED_CTRL, MII_88E1121_PHY_LED_DEF); 198 phy_write(phydev, MII_88E1121_PHY_PAGE, temp); 199 200 err = genphy_config_aneg(phydev); 201 202 return err; 203 } 204 205 static int m88e1111_config_init(struct phy_device *phydev) 206 { 207 int err; 208 int temp; 209 210 /* Enable Fiber/Copper auto selection */ 211 temp = phy_read(phydev, MII_M1111_PHY_EXT_SR); 212 temp &= ~MII_M1111_HWCFG_FIBER_COPPER_AUTO; 213 phy_write(phydev, MII_M1111_PHY_EXT_SR, temp); 214 215 temp = phy_read(phydev, MII_BMCR); 216 temp |= BMCR_RESET; 217 phy_write(phydev, MII_BMCR, temp); 218 219 if ((phydev->interface == PHY_INTERFACE_MODE_RGMII) || 220 (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID) || 221 (phydev->interface == PHY_INTERFACE_MODE_RGMII_RXID) || 222 (phydev->interface == PHY_INTERFACE_MODE_RGMII_TXID)) { 223 224 temp = phy_read(phydev, MII_M1111_PHY_EXT_CR); 225 if (temp < 0) 226 return temp; 227 228 if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID) { 229 temp |= (MII_M1111_RX_DELAY | MII_M1111_TX_DELAY); 230 } else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_RXID) { 231 temp &= ~MII_M1111_TX_DELAY; 232 temp |= MII_M1111_RX_DELAY; 233 } else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_TXID) { 234 temp &= ~MII_M1111_RX_DELAY; 235 temp |= MII_M1111_TX_DELAY; 236 } 237 238 err = phy_write(phydev, MII_M1111_PHY_EXT_CR, temp); 239 if (err < 0) 240 return err; 241 242 temp = phy_read(phydev, MII_M1111_PHY_EXT_SR); 243 if (temp < 0) 244 return temp; 245 246 temp &= ~(MII_M1111_HWCFG_MODE_MASK); 247 248 if (temp & MII_M1111_HWCFG_FIBER_COPPER_RES) 249 temp |= MII_M1111_HWCFG_MODE_FIBER_RGMII; 250 else 251 temp |= MII_M1111_HWCFG_MODE_COPPER_RGMII; 252 253 err = phy_write(phydev, MII_M1111_PHY_EXT_SR, temp); 254 if (err < 0) 255 return err; 256 } 257 258 if (phydev->interface == PHY_INTERFACE_MODE_SGMII) { 259 temp = phy_read(phydev, MII_M1111_PHY_EXT_SR); 260 if (temp < 0) 261 return temp; 262 263 temp &= ~(MII_M1111_HWCFG_MODE_MASK); 264 temp |= MII_M1111_HWCFG_MODE_SGMII_NO_CLK; 265 temp |= MII_M1111_HWCFG_FIBER_COPPER_AUTO; 266 267 err = phy_write(phydev, MII_M1111_PHY_EXT_SR, temp); 268 if (err < 0) 269 return err; 270 } 271 272 if (phydev->interface == PHY_INTERFACE_MODE_RTBI) { 273 temp = phy_read(phydev, MII_M1111_PHY_EXT_CR); 274 if (temp < 0) 275 return temp; 276 temp |= (MII_M1111_RX_DELAY | MII_M1111_TX_DELAY); 277 err = phy_write(phydev, MII_M1111_PHY_EXT_CR, temp); 278 if (err < 0) 279 return err; 280 281 temp = phy_read(phydev, MII_M1111_PHY_EXT_SR); 282 if (temp < 0) 283 return temp; 284 temp &= ~(MII_M1111_HWCFG_MODE_MASK | MII_M1111_HWCFG_FIBER_COPPER_RES); 285 temp |= 0x7 | MII_M1111_HWCFG_FIBER_COPPER_AUTO; 286 err = phy_write(phydev, MII_M1111_PHY_EXT_SR, temp); 287 if (err < 0) 288 return err; 289 290 /* soft reset */ 291 err = phy_write(phydev, MII_BMCR, BMCR_RESET); 292 if (err < 0) 293 return err; 294 do 295 temp = phy_read(phydev, MII_BMCR); 296 while (temp & BMCR_RESET); 297 298 temp = phy_read(phydev, MII_M1111_PHY_EXT_SR); 299 if (temp < 0) 300 return temp; 301 temp &= ~(MII_M1111_HWCFG_MODE_MASK | MII_M1111_HWCFG_FIBER_COPPER_RES); 302 temp |= MII_M1111_HWCFG_MODE_COPPER_RTBI | MII_M1111_HWCFG_FIBER_COPPER_AUTO; 303 err = phy_write(phydev, MII_M1111_PHY_EXT_SR, temp); 304 if (err < 0) 305 return err; 306 } 307 308 309 err = phy_write(phydev, MII_BMCR, BMCR_RESET); 310 if (err < 0) 311 return err; 312 313 return 0; 314 } 315 316 static int m88e1118_config_aneg(struct phy_device *phydev) 317 { 318 int err; 319 320 err = phy_write(phydev, MII_BMCR, BMCR_RESET); 321 if (err < 0) 322 return err; 323 324 err = phy_write(phydev, MII_M1011_PHY_SCR, 325 MII_M1011_PHY_SCR_AUTO_CROSS); 326 if (err < 0) 327 return err; 328 329 err = genphy_config_aneg(phydev); 330 return 0; 331 } 332 333 static int m88e1118_config_init(struct phy_device *phydev) 334 { 335 int err; 336 337 /* Change address */ 338 err = phy_write(phydev, 0x16, 0x0002); 339 if (err < 0) 340 return err; 341 342 /* Enable 1000 Mbit */ 343 err = phy_write(phydev, 0x15, 0x1070); 344 if (err < 0) 345 return err; 346 347 /* Change address */ 348 err = phy_write(phydev, 0x16, 0x0003); 349 if (err < 0) 350 return err; 351 352 /* Adjust LED Control */ 353 err = phy_write(phydev, 0x10, 0x021e); 354 if (err < 0) 355 return err; 356 357 /* Reset address */ 358 err = phy_write(phydev, 0x16, 0x0); 359 if (err < 0) 360 return err; 361 362 err = phy_write(phydev, MII_BMCR, BMCR_RESET); 363 if (err < 0) 364 return err; 365 366 return 0; 367 } 368 369 static int m88e1145_config_init(struct phy_device *phydev) 370 { 371 int err; 372 373 /* Take care of errata E0 & E1 */ 374 err = phy_write(phydev, 0x1d, 0x001b); 375 if (err < 0) 376 return err; 377 378 err = phy_write(phydev, 0x1e, 0x418f); 379 if (err < 0) 380 return err; 381 382 err = phy_write(phydev, 0x1d, 0x0016); 383 if (err < 0) 384 return err; 385 386 err = phy_write(phydev, 0x1e, 0xa2da); 387 if (err < 0) 388 return err; 389 390 if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID) { 391 int temp = phy_read(phydev, MII_M1145_PHY_EXT_CR); 392 if (temp < 0) 393 return temp; 394 395 temp |= (MII_M1145_RGMII_RX_DELAY | MII_M1145_RGMII_TX_DELAY); 396 397 err = phy_write(phydev, MII_M1145_PHY_EXT_CR, temp); 398 if (err < 0) 399 return err; 400 401 if (phydev->dev_flags & M1145_DEV_FLAGS_RESISTANCE) { 402 err = phy_write(phydev, 0x1d, 0x0012); 403 if (err < 0) 404 return err; 405 406 temp = phy_read(phydev, 0x1e); 407 if (temp < 0) 408 return temp; 409 410 temp &= 0xf03f; 411 temp |= 2 << 9; /* 36 ohm */ 412 temp |= 2 << 6; /* 39 ohm */ 413 414 err = phy_write(phydev, 0x1e, temp); 415 if (err < 0) 416 return err; 417 418 err = phy_write(phydev, 0x1d, 0x3); 419 if (err < 0) 420 return err; 421 422 err = phy_write(phydev, 0x1e, 0x8000); 423 if (err < 0) 424 return err; 425 } 426 } 427 428 return 0; 429 } 430 431 /* marvell_read_status 432 * 433 * Generic status code does not detect Fiber correctly! 434 * Description: 435 * Check the link, then figure out the current state 436 * by comparing what we advertise with what the link partner 437 * advertises. Start by checking the gigabit possibilities, 438 * then move on to 10/100. 439 */ 440 static int marvell_read_status(struct phy_device *phydev) 441 { 442 int adv; 443 int err; 444 int lpa; 445 int status = 0; 446 447 /* Update the link, but return if there 448 * was an error */ 449 err = genphy_update_link(phydev); 450 if (err) 451 return err; 452 453 if (AUTONEG_ENABLE == phydev->autoneg) { 454 status = phy_read(phydev, MII_M1011_PHY_STATUS); 455 if (status < 0) 456 return status; 457 458 lpa = phy_read(phydev, MII_LPA); 459 if (lpa < 0) 460 return lpa; 461 462 adv = phy_read(phydev, MII_ADVERTISE); 463 if (adv < 0) 464 return adv; 465 466 lpa &= adv; 467 468 if (status & MII_M1011_PHY_STATUS_FULLDUPLEX) 469 phydev->duplex = DUPLEX_FULL; 470 else 471 phydev->duplex = DUPLEX_HALF; 472 473 status = status & MII_M1011_PHY_STATUS_SPD_MASK; 474 phydev->pause = phydev->asym_pause = 0; 475 476 switch (status) { 477 case MII_M1011_PHY_STATUS_1000: 478 phydev->speed = SPEED_1000; 479 break; 480 481 case MII_M1011_PHY_STATUS_100: 482 phydev->speed = SPEED_100; 483 break; 484 485 default: 486 phydev->speed = SPEED_10; 487 break; 488 } 489 490 if (phydev->duplex == DUPLEX_FULL) { 491 phydev->pause = lpa & LPA_PAUSE_CAP ? 1 : 0; 492 phydev->asym_pause = lpa & LPA_PAUSE_ASYM ? 1 : 0; 493 } 494 } else { 495 int bmcr = phy_read(phydev, MII_BMCR); 496 497 if (bmcr < 0) 498 return bmcr; 499 500 if (bmcr & BMCR_FULLDPLX) 501 phydev->duplex = DUPLEX_FULL; 502 else 503 phydev->duplex = DUPLEX_HALF; 504 505 if (bmcr & BMCR_SPEED1000) 506 phydev->speed = SPEED_1000; 507 else if (bmcr & BMCR_SPEED100) 508 phydev->speed = SPEED_100; 509 else 510 phydev->speed = SPEED_10; 511 512 phydev->pause = phydev->asym_pause = 0; 513 } 514 515 return 0; 516 } 517 518 static int m88e1121_did_interrupt(struct phy_device *phydev) 519 { 520 int imask; 521 522 imask = phy_read(phydev, MII_M1011_IEVENT); 523 524 if (imask & MII_M1011_IMASK_INIT) 525 return 1; 526 527 return 0; 528 } 529 530 static struct phy_driver marvell_drivers[] = { 531 { 532 .phy_id = 0x01410c60, 533 .phy_id_mask = 0xfffffff0, 534 .name = "Marvell 88E1101", 535 .features = PHY_GBIT_FEATURES, 536 .flags = PHY_HAS_INTERRUPT, 537 .config_aneg = &marvell_config_aneg, 538 .read_status = &genphy_read_status, 539 .ack_interrupt = &marvell_ack_interrupt, 540 .config_intr = &marvell_config_intr, 541 .driver = { .owner = THIS_MODULE }, 542 }, 543 { 544 .phy_id = 0x01410c90, 545 .phy_id_mask = 0xfffffff0, 546 .name = "Marvell 88E1112", 547 .features = PHY_GBIT_FEATURES, 548 .flags = PHY_HAS_INTERRUPT, 549 .config_init = &m88e1111_config_init, 550 .config_aneg = &marvell_config_aneg, 551 .read_status = &genphy_read_status, 552 .ack_interrupt = &marvell_ack_interrupt, 553 .config_intr = &marvell_config_intr, 554 .driver = { .owner = THIS_MODULE }, 555 }, 556 { 557 .phy_id = 0x01410cc0, 558 .phy_id_mask = 0xfffffff0, 559 .name = "Marvell 88E1111", 560 .features = PHY_GBIT_FEATURES, 561 .flags = PHY_HAS_INTERRUPT, 562 .config_init = &m88e1111_config_init, 563 .config_aneg = &marvell_config_aneg, 564 .read_status = &marvell_read_status, 565 .ack_interrupt = &marvell_ack_interrupt, 566 .config_intr = &marvell_config_intr, 567 .driver = { .owner = THIS_MODULE }, 568 }, 569 { 570 .phy_id = 0x01410e10, 571 .phy_id_mask = 0xfffffff0, 572 .name = "Marvell 88E1118", 573 .features = PHY_GBIT_FEATURES, 574 .flags = PHY_HAS_INTERRUPT, 575 .config_init = &m88e1118_config_init, 576 .config_aneg = &m88e1118_config_aneg, 577 .read_status = &genphy_read_status, 578 .ack_interrupt = &marvell_ack_interrupt, 579 .config_intr = &marvell_config_intr, 580 .driver = {.owner = THIS_MODULE,}, 581 }, 582 { 583 .phy_id = 0x01410cb0, 584 .phy_id_mask = 0xfffffff0, 585 .name = "Marvell 88E1121R", 586 .features = PHY_GBIT_FEATURES, 587 .flags = PHY_HAS_INTERRUPT, 588 .config_aneg = &m88e1121_config_aneg, 589 .read_status = &marvell_read_status, 590 .ack_interrupt = &marvell_ack_interrupt, 591 .config_intr = &marvell_config_intr, 592 .did_interrupt = &m88e1121_did_interrupt, 593 .driver = { .owner = THIS_MODULE }, 594 }, 595 { 596 .phy_id = 0x01410cd0, 597 .phy_id_mask = 0xfffffff0, 598 .name = "Marvell 88E1145", 599 .features = PHY_GBIT_FEATURES, 600 .flags = PHY_HAS_INTERRUPT, 601 .config_init = &m88e1145_config_init, 602 .config_aneg = &marvell_config_aneg, 603 .read_status = &genphy_read_status, 604 .ack_interrupt = &marvell_ack_interrupt, 605 .config_intr = &marvell_config_intr, 606 .driver = { .owner = THIS_MODULE }, 607 }, 608 { 609 .phy_id = 0x01410e30, 610 .phy_id_mask = 0xfffffff0, 611 .name = "Marvell 88E1240", 612 .features = PHY_GBIT_FEATURES, 613 .flags = PHY_HAS_INTERRUPT, 614 .config_init = &m88e1111_config_init, 615 .config_aneg = &marvell_config_aneg, 616 .read_status = &genphy_read_status, 617 .ack_interrupt = &marvell_ack_interrupt, 618 .config_intr = &marvell_config_intr, 619 .driver = { .owner = THIS_MODULE }, 620 }, 621 }; 622 623 static int __init marvell_init(void) 624 { 625 int ret; 626 int i; 627 628 for (i = 0; i < ARRAY_SIZE(marvell_drivers); i++) { 629 ret = phy_driver_register(&marvell_drivers[i]); 630 631 if (ret) { 632 while (i-- > 0) 633 phy_driver_unregister(&marvell_drivers[i]); 634 return ret; 635 } 636 } 637 638 return 0; 639 } 640 641 static void __exit marvell_exit(void) 642 { 643 int i; 644 645 for (i = 0; i < ARRAY_SIZE(marvell_drivers); i++) 646 phy_driver_unregister(&marvell_drivers[i]); 647 } 648 649 module_init(marvell_init); 650 module_exit(marvell_exit); 651 652 static struct mdio_device_id marvell_tbl[] = { 653 { 0x01410c60, 0xfffffff0 }, 654 { 0x01410c90, 0xfffffff0 }, 655 { 0x01410cc0, 0xfffffff0 }, 656 { 0x01410e10, 0xfffffff0 }, 657 { 0x01410cb0, 0xfffffff0 }, 658 { 0x01410cd0, 0xfffffff0 }, 659 { 0x01410e30, 0xfffffff0 }, 660 { } 661 }; 662 663 MODULE_DEVICE_TABLE(mdio, marvell_tbl); 664