1 // SPDX-License-Identifier: GPL-2.0+ 2 /* 3 * drivers/net/phy/marvell.c 4 * 5 * Driver for Marvell PHYs 6 * 7 * Author: Andy Fleming 8 * 9 * Copyright (c) 2004 Freescale Semiconductor, Inc. 10 * 11 * Copyright (c) 2013 Michael Stapelberg <michael@stapelberg.de> 12 */ 13 #include <linux/kernel.h> 14 #include <linux/string.h> 15 #include <linux/ctype.h> 16 #include <linux/errno.h> 17 #include <linux/unistd.h> 18 #include <linux/hwmon.h> 19 #include <linux/interrupt.h> 20 #include <linux/init.h> 21 #include <linux/delay.h> 22 #include <linux/netdevice.h> 23 #include <linux/etherdevice.h> 24 #include <linux/skbuff.h> 25 #include <linux/spinlock.h> 26 #include <linux/mm.h> 27 #include <linux/module.h> 28 #include <linux/mii.h> 29 #include <linux/ethtool.h> 30 #include <linux/ethtool_netlink.h> 31 #include <linux/phy.h> 32 #include <linux/marvell_phy.h> 33 #include <linux/bitfield.h> 34 #include <linux/of.h> 35 #include <linux/sfp.h> 36 37 #include <linux/io.h> 38 #include <asm/irq.h> 39 #include <linux/uaccess.h> 40 41 #define MII_MARVELL_PHY_PAGE 22 42 #define MII_MARVELL_COPPER_PAGE 0x00 43 #define MII_MARVELL_FIBER_PAGE 0x01 44 #define MII_MARVELL_MSCR_PAGE 0x02 45 #define MII_MARVELL_LED_PAGE 0x03 46 #define MII_MARVELL_VCT5_PAGE 0x05 47 #define MII_MARVELL_MISC_TEST_PAGE 0x06 48 #define MII_MARVELL_VCT7_PAGE 0x07 49 #define MII_MARVELL_WOL_PAGE 0x11 50 #define MII_MARVELL_MODE_PAGE 0x12 51 52 #define MII_M1011_IEVENT 0x13 53 #define MII_M1011_IEVENT_CLEAR 0x0000 54 55 #define MII_M1011_IMASK 0x12 56 #define MII_M1011_IMASK_INIT 0x6400 57 #define MII_M1011_IMASK_CLEAR 0x0000 58 59 #define MII_M1011_PHY_SCR 0x10 60 #define MII_M1011_PHY_SCR_DOWNSHIFT_EN BIT(11) 61 #define MII_M1011_PHY_SCR_DOWNSHIFT_MASK GENMASK(14, 12) 62 #define MII_M1011_PHY_SCR_DOWNSHIFT_MAX 8 63 #define MII_M1011_PHY_SCR_MDI (0x0 << 5) 64 #define MII_M1011_PHY_SCR_MDI_X (0x1 << 5) 65 #define MII_M1011_PHY_SCR_AUTO_CROSS (0x3 << 5) 66 67 #define MII_M1011_PHY_SSR 0x11 68 #define MII_M1011_PHY_SSR_DOWNSHIFT BIT(5) 69 70 #define MII_M1111_PHY_LED_CONTROL 0x18 71 #define MII_M1111_PHY_LED_DIRECT 0x4100 72 #define MII_M1111_PHY_LED_COMBINE 0x411c 73 #define MII_M1111_PHY_EXT_CR 0x14 74 #define MII_M1111_PHY_EXT_CR_DOWNSHIFT_MASK GENMASK(11, 9) 75 #define MII_M1111_PHY_EXT_CR_DOWNSHIFT_MAX 8 76 #define MII_M1111_PHY_EXT_CR_DOWNSHIFT_EN BIT(8) 77 #define MII_M1111_RGMII_RX_DELAY BIT(7) 78 #define MII_M1111_RGMII_TX_DELAY BIT(1) 79 #define MII_M1111_PHY_EXT_SR 0x1b 80 81 #define MII_M1111_HWCFG_MODE_MASK 0xf 82 #define MII_M1111_HWCFG_MODE_FIBER_RGMII 0x3 83 #define MII_M1111_HWCFG_MODE_SGMII_NO_CLK 0x4 84 #define MII_M1111_HWCFG_MODE_RTBI 0x7 85 #define MII_M1111_HWCFG_MODE_COPPER_1000X_AN 0x8 86 #define MII_M1111_HWCFG_MODE_COPPER_RTBI 0x9 87 #define MII_M1111_HWCFG_MODE_COPPER_RGMII 0xb 88 #define MII_M1111_HWCFG_MODE_COPPER_1000X_NOAN 0xc 89 #define MII_M1111_HWCFG_SERIAL_AN_BYPASS BIT(12) 90 #define MII_M1111_HWCFG_FIBER_COPPER_RES BIT(13) 91 #define MII_M1111_HWCFG_FIBER_COPPER_AUTO BIT(15) 92 93 #define MII_88E1121_PHY_MSCR_REG 21 94 #define MII_88E1121_PHY_MSCR_RX_DELAY BIT(5) 95 #define MII_88E1121_PHY_MSCR_TX_DELAY BIT(4) 96 #define MII_88E1121_PHY_MSCR_DELAY_MASK (BIT(5) | BIT(4)) 97 98 #define MII_88E1121_MISC_TEST 0x1a 99 #define MII_88E1510_MISC_TEST_TEMP_THRESHOLD_MASK 0x1f00 100 #define MII_88E1510_MISC_TEST_TEMP_THRESHOLD_SHIFT 8 101 #define MII_88E1510_MISC_TEST_TEMP_IRQ_EN BIT(7) 102 #define MII_88E1510_MISC_TEST_TEMP_IRQ BIT(6) 103 #define MII_88E1121_MISC_TEST_TEMP_SENSOR_EN BIT(5) 104 #define MII_88E1121_MISC_TEST_TEMP_MASK 0x1f 105 106 #define MII_88E1510_TEMP_SENSOR 0x1b 107 #define MII_88E1510_TEMP_SENSOR_MASK 0xff 108 109 #define MII_88E1540_COPPER_CTRL3 0x1a 110 #define MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_MASK GENMASK(11, 10) 111 #define MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_00MS 0 112 #define MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_10MS 1 113 #define MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_20MS 2 114 #define MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_40MS 3 115 #define MII_88E1540_COPPER_CTRL3_FAST_LINK_DOWN BIT(9) 116 117 #define MII_88E6390_MISC_TEST 0x1b 118 #define MII_88E6390_MISC_TEST_TEMP_SENSOR_ENABLE_SAMPLE_1S (0x0 << 14) 119 #define MII_88E6390_MISC_TEST_TEMP_SENSOR_ENABLE (0x1 << 14) 120 #define MII_88E6390_MISC_TEST_TEMP_SENSOR_ENABLE_ONESHOT (0x2 << 14) 121 #define MII_88E6390_MISC_TEST_TEMP_SENSOR_DISABLE (0x3 << 14) 122 #define MII_88E6390_MISC_TEST_TEMP_SENSOR_MASK (0x3 << 14) 123 #define MII_88E6393_MISC_TEST_SAMPLES_2048 (0x0 << 11) 124 #define MII_88E6393_MISC_TEST_SAMPLES_4096 (0x1 << 11) 125 #define MII_88E6393_MISC_TEST_SAMPLES_8192 (0x2 << 11) 126 #define MII_88E6393_MISC_TEST_SAMPLES_16384 (0x3 << 11) 127 #define MII_88E6393_MISC_TEST_SAMPLES_MASK (0x3 << 11) 128 #define MII_88E6393_MISC_TEST_RATE_2_3MS (0x5 << 8) 129 #define MII_88E6393_MISC_TEST_RATE_6_4MS (0x6 << 8) 130 #define MII_88E6393_MISC_TEST_RATE_11_9MS (0x7 << 8) 131 #define MII_88E6393_MISC_TEST_RATE_MASK (0x7 << 8) 132 133 #define MII_88E6390_TEMP_SENSOR 0x1c 134 #define MII_88E6393_TEMP_SENSOR_THRESHOLD_MASK 0xff00 135 #define MII_88E6393_TEMP_SENSOR_THRESHOLD_SHIFT 8 136 #define MII_88E6390_TEMP_SENSOR_MASK 0xff 137 #define MII_88E6390_TEMP_SENSOR_SAMPLES 10 138 139 #define MII_88E1318S_PHY_MSCR1_REG 16 140 #define MII_88E1318S_PHY_MSCR1_PAD_ODD BIT(6) 141 142 /* Copper Specific Interrupt Enable Register */ 143 #define MII_88E1318S_PHY_CSIER 0x12 144 /* WOL Event Interrupt Enable */ 145 #define MII_88E1318S_PHY_CSIER_WOL_EIE BIT(7) 146 147 #define MII_88E1318S_PHY_LED_FUNC 0x10 148 #define MII_88E1318S_PHY_LED_FUNC_OFF (0x8) 149 #define MII_88E1318S_PHY_LED_FUNC_ON (0x9) 150 #define MII_88E1318S_PHY_LED_FUNC_HI_Z (0xa) 151 #define MII_88E1318S_PHY_LED_FUNC_BLINK (0xb) 152 #define MII_88E1318S_PHY_LED_TCR 0x12 153 #define MII_88E1318S_PHY_LED_TCR_FORCE_INT BIT(15) 154 #define MII_88E1318S_PHY_LED_TCR_INTn_ENABLE BIT(7) 155 #define MII_88E1318S_PHY_LED_TCR_INT_ACTIVE_LOW BIT(11) 156 157 /* Magic Packet MAC address registers */ 158 #define MII_88E1318S_PHY_MAGIC_PACKET_WORD2 0x17 159 #define MII_88E1318S_PHY_MAGIC_PACKET_WORD1 0x18 160 #define MII_88E1318S_PHY_MAGIC_PACKET_WORD0 0x19 161 162 #define MII_88E1318S_PHY_WOL_CTRL 0x10 163 #define MII_88E1318S_PHY_WOL_CTRL_CLEAR_WOL_STATUS BIT(12) 164 #define MII_88E1318S_PHY_WOL_CTRL_LINK_UP_ENABLE BIT(13) 165 #define MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE BIT(14) 166 167 #define MII_PHY_LED_CTRL 16 168 #define MII_88E1121_PHY_LED_DEF 0x0030 169 #define MII_88E1510_PHY_LED_DEF 0x1177 170 #define MII_88E1510_PHY_LED0_LINK_LED1_ACTIVE 0x1040 171 172 #define MII_M1011_PHY_STATUS 0x11 173 #define MII_M1011_PHY_STATUS_1000 0x8000 174 #define MII_M1011_PHY_STATUS_100 0x4000 175 #define MII_M1011_PHY_STATUS_SPD_MASK 0xc000 176 #define MII_M1011_PHY_STATUS_FULLDUPLEX 0x2000 177 #define MII_M1011_PHY_STATUS_RESOLVED 0x0800 178 #define MII_M1011_PHY_STATUS_LINK 0x0400 179 #define MII_M1011_PHY_STATUS_MDIX BIT(6) 180 181 #define MII_88E3016_PHY_SPEC_CTRL 0x10 182 #define MII_88E3016_DISABLE_SCRAMBLER 0x0200 183 #define MII_88E3016_AUTO_MDIX_CROSSOVER 0x0030 184 185 #define MII_88E1510_GEN_CTRL_REG_1 0x14 186 #define MII_88E1510_GEN_CTRL_REG_1_MODE_MASK 0x7 187 #define MII_88E1510_GEN_CTRL_REG_1_MODE_RGMII 0x0 /* RGMII to copper */ 188 #define MII_88E1510_GEN_CTRL_REG_1_MODE_SGMII 0x1 /* SGMII to copper */ 189 /* RGMII to 1000BASE-X */ 190 #define MII_88E1510_GEN_CTRL_REG_1_MODE_RGMII_1000X 0x2 191 /* RGMII to 100BASE-FX */ 192 #define MII_88E1510_GEN_CTRL_REG_1_MODE_RGMII_100FX 0x3 193 /* RGMII to SGMII */ 194 #define MII_88E1510_GEN_CTRL_REG_1_MODE_RGMII_SGMII 0x4 195 #define MII_88E1510_GEN_CTRL_REG_1_RESET 0x8000 /* Soft reset */ 196 197 #define MII_88E1510_MSCR_2 0x15 198 199 #define MII_VCT5_TX_RX_MDI0_COUPLING 0x10 200 #define MII_VCT5_TX_RX_MDI1_COUPLING 0x11 201 #define MII_VCT5_TX_RX_MDI2_COUPLING 0x12 202 #define MII_VCT5_TX_RX_MDI3_COUPLING 0x13 203 #define MII_VCT5_TX_RX_AMPLITUDE_MASK 0x7f00 204 #define MII_VCT5_TX_RX_AMPLITUDE_SHIFT 8 205 #define MII_VCT5_TX_RX_COUPLING_POSITIVE_REFLECTION BIT(15) 206 207 #define MII_VCT5_CTRL 0x17 208 #define MII_VCT5_CTRL_ENABLE BIT(15) 209 #define MII_VCT5_CTRL_COMPLETE BIT(14) 210 #define MII_VCT5_CTRL_TX_SAME_CHANNEL (0x0 << 11) 211 #define MII_VCT5_CTRL_TX0_CHANNEL (0x4 << 11) 212 #define MII_VCT5_CTRL_TX1_CHANNEL (0x5 << 11) 213 #define MII_VCT5_CTRL_TX2_CHANNEL (0x6 << 11) 214 #define MII_VCT5_CTRL_TX3_CHANNEL (0x7 << 11) 215 #define MII_VCT5_CTRL_SAMPLES_2 (0x0 << 8) 216 #define MII_VCT5_CTRL_SAMPLES_4 (0x1 << 8) 217 #define MII_VCT5_CTRL_SAMPLES_8 (0x2 << 8) 218 #define MII_VCT5_CTRL_SAMPLES_16 (0x3 << 8) 219 #define MII_VCT5_CTRL_SAMPLES_32 (0x4 << 8) 220 #define MII_VCT5_CTRL_SAMPLES_64 (0x5 << 8) 221 #define MII_VCT5_CTRL_SAMPLES_128 (0x6 << 8) 222 #define MII_VCT5_CTRL_SAMPLES_DEFAULT (0x6 << 8) 223 #define MII_VCT5_CTRL_SAMPLES_256 (0x7 << 8) 224 #define MII_VCT5_CTRL_SAMPLES_SHIFT 8 225 #define MII_VCT5_CTRL_MODE_MAXIMUM_PEEK (0x0 << 6) 226 #define MII_VCT5_CTRL_MODE_FIRST_LAST_PEEK (0x1 << 6) 227 #define MII_VCT5_CTRL_MODE_OFFSET (0x2 << 6) 228 #define MII_VCT5_CTRL_SAMPLE_POINT (0x3 << 6) 229 #define MII_VCT5_CTRL_PEEK_HYST_DEFAULT 3 230 231 #define MII_VCT5_SAMPLE_POINT_DISTANCE 0x18 232 #define MII_VCT5_SAMPLE_POINT_DISTANCE_MAX 511 233 #define MII_VCT5_TX_PULSE_CTRL 0x1c 234 #define MII_VCT5_TX_PULSE_CTRL_DONT_WAIT_LINK_DOWN BIT(12) 235 #define MII_VCT5_TX_PULSE_CTRL_PULSE_WIDTH_128nS (0x0 << 10) 236 #define MII_VCT5_TX_PULSE_CTRL_PULSE_WIDTH_96nS (0x1 << 10) 237 #define MII_VCT5_TX_PULSE_CTRL_PULSE_WIDTH_64nS (0x2 << 10) 238 #define MII_VCT5_TX_PULSE_CTRL_PULSE_WIDTH_32nS (0x3 << 10) 239 #define MII_VCT5_TX_PULSE_CTRL_PULSE_WIDTH_SHIFT 10 240 #define MII_VCT5_TX_PULSE_CTRL_PULSE_AMPLITUDE_1000mV (0x0 << 8) 241 #define MII_VCT5_TX_PULSE_CTRL_PULSE_AMPLITUDE_750mV (0x1 << 8) 242 #define MII_VCT5_TX_PULSE_CTRL_PULSE_AMPLITUDE_500mV (0x2 << 8) 243 #define MII_VCT5_TX_PULSE_CTRL_PULSE_AMPLITUDE_250mV (0x3 << 8) 244 #define MII_VCT5_TX_PULSE_CTRL_PULSE_AMPLITUDE_SHIFT 8 245 #define MII_VCT5_TX_PULSE_CTRL_MAX_AMP BIT(7) 246 #define MII_VCT5_TX_PULSE_CTRL_GT_140m_46_86mV (0x6 << 0) 247 248 /* For TDR measurements less than 11 meters, a short pulse should be 249 * used. 250 */ 251 #define TDR_SHORT_CABLE_LENGTH 11 252 253 #define MII_VCT7_PAIR_0_DISTANCE 0x10 254 #define MII_VCT7_PAIR_1_DISTANCE 0x11 255 #define MII_VCT7_PAIR_2_DISTANCE 0x12 256 #define MII_VCT7_PAIR_3_DISTANCE 0x13 257 258 #define MII_VCT7_RESULTS 0x14 259 #define MII_VCT7_RESULTS_PAIR3_MASK 0xf000 260 #define MII_VCT7_RESULTS_PAIR2_MASK 0x0f00 261 #define MII_VCT7_RESULTS_PAIR1_MASK 0x00f0 262 #define MII_VCT7_RESULTS_PAIR0_MASK 0x000f 263 #define MII_VCT7_RESULTS_PAIR3_SHIFT 12 264 #define MII_VCT7_RESULTS_PAIR2_SHIFT 8 265 #define MII_VCT7_RESULTS_PAIR1_SHIFT 4 266 #define MII_VCT7_RESULTS_PAIR0_SHIFT 0 267 #define MII_VCT7_RESULTS_INVALID 0 268 #define MII_VCT7_RESULTS_OK 1 269 #define MII_VCT7_RESULTS_OPEN 2 270 #define MII_VCT7_RESULTS_SAME_SHORT 3 271 #define MII_VCT7_RESULTS_CROSS_SHORT 4 272 #define MII_VCT7_RESULTS_BUSY 9 273 274 #define MII_VCT7_CTRL 0x15 275 #define MII_VCT7_CTRL_RUN_NOW BIT(15) 276 #define MII_VCT7_CTRL_RUN_ANEG BIT(14) 277 #define MII_VCT7_CTRL_DISABLE_CROSS BIT(13) 278 #define MII_VCT7_CTRL_RUN_AFTER_BREAK_LINK BIT(12) 279 #define MII_VCT7_CTRL_IN_PROGRESS BIT(11) 280 #define MII_VCT7_CTRL_METERS BIT(10) 281 #define MII_VCT7_CTRL_CENTIMETERS 0 282 283 #define MII_VCT_TXPINS 0x1A 284 #define MII_VCT_RXPINS 0x1B 285 #define MII_VCT_SR 0x1C 286 #define MII_VCT_TXPINS_ENVCT BIT(15) 287 #define MII_VCT_TXRXPINS_VCTTST GENMASK(14, 13) 288 #define MII_VCT_TXRXPINS_VCTTST_SHIFT 13 289 #define MII_VCT_TXRXPINS_VCTTST_OK 0 290 #define MII_VCT_TXRXPINS_VCTTST_SHORT 1 291 #define MII_VCT_TXRXPINS_VCTTST_OPEN 2 292 #define MII_VCT_TXRXPINS_VCTTST_FAIL 3 293 #define MII_VCT_TXRXPINS_AMPRFLN GENMASK(12, 8) 294 #define MII_VCT_TXRXPINS_AMPRFLN_SHIFT 8 295 #define MII_VCT_TXRXPINS_DISTRFLN GENMASK(7, 0) 296 #define MII_VCT_TXRXPINS_DISTRFLN_MAX 0xff 297 298 #define M88E3082_PAIR_A BIT(0) 299 #define M88E3082_PAIR_B BIT(1) 300 301 #define LPA_PAUSE_FIBER 0x180 302 #define LPA_PAUSE_ASYM_FIBER 0x100 303 304 #define NB_FIBER_STATS 1 305 #define NB_STAT_MAX 3 306 307 MODULE_DESCRIPTION("Marvell PHY driver"); 308 MODULE_AUTHOR("Andy Fleming"); 309 MODULE_LICENSE("GPL"); 310 311 struct marvell_hw_stat { 312 const char *string; 313 u8 page; 314 u8 reg; 315 u8 bits; 316 }; 317 318 static const struct marvell_hw_stat marvell_hw_stats[] = { 319 { "phy_receive_errors_copper", 0, 21, 16}, 320 { "phy_idle_errors", 0, 10, 8 }, 321 { "phy_receive_errors_fiber", 1, 21, 16}, 322 }; 323 324 static_assert(ARRAY_SIZE(marvell_hw_stats) <= NB_STAT_MAX); 325 326 /* "simple" stat list + corresponding marvell_get_*_simple functions are used 327 * on PHYs without a page register 328 */ 329 struct marvell_hw_stat_simple { 330 const char *string; 331 u8 reg; 332 u8 bits; 333 }; 334 335 static const struct marvell_hw_stat_simple marvell_hw_stats_simple[] = { 336 { "phy_receive_errors", 21, 16}, 337 }; 338 339 static_assert(ARRAY_SIZE(marvell_hw_stats_simple) <= NB_STAT_MAX); 340 341 enum { 342 M88E3082_VCT_OFF, 343 M88E3082_VCT_PHASE1, 344 M88E3082_VCT_PHASE2, 345 }; 346 347 struct marvell_priv { 348 u64 stats[NB_STAT_MAX]; 349 char *hwmon_name; 350 struct device *hwmon_dev; 351 bool cable_test_tdr; 352 u32 first; 353 u32 last; 354 u32 step; 355 s8 pair; 356 u8 vct_phase; 357 }; 358 359 static int marvell_read_page(struct phy_device *phydev) 360 { 361 return __phy_read(phydev, MII_MARVELL_PHY_PAGE); 362 } 363 364 static int marvell_write_page(struct phy_device *phydev, int page) 365 { 366 return __phy_write(phydev, MII_MARVELL_PHY_PAGE, page); 367 } 368 369 static int marvell_set_page(struct phy_device *phydev, int page) 370 { 371 return phy_write(phydev, MII_MARVELL_PHY_PAGE, page); 372 } 373 374 static int marvell_ack_interrupt(struct phy_device *phydev) 375 { 376 int err; 377 378 /* Clear the interrupts by reading the reg */ 379 err = phy_read(phydev, MII_M1011_IEVENT); 380 381 if (err < 0) 382 return err; 383 384 return 0; 385 } 386 387 static int marvell_config_intr(struct phy_device *phydev) 388 { 389 int err; 390 391 if (phydev->interrupts == PHY_INTERRUPT_ENABLED) { 392 err = marvell_ack_interrupt(phydev); 393 if (err) 394 return err; 395 396 err = phy_write(phydev, MII_M1011_IMASK, 397 MII_M1011_IMASK_INIT); 398 } else { 399 err = phy_write(phydev, MII_M1011_IMASK, 400 MII_M1011_IMASK_CLEAR); 401 if (err) 402 return err; 403 404 err = marvell_ack_interrupt(phydev); 405 } 406 407 return err; 408 } 409 410 static irqreturn_t marvell_handle_interrupt(struct phy_device *phydev) 411 { 412 int irq_status; 413 414 irq_status = phy_read(phydev, MII_M1011_IEVENT); 415 if (irq_status < 0) { 416 phy_error(phydev); 417 return IRQ_NONE; 418 } 419 420 if (!(irq_status & MII_M1011_IMASK_INIT)) 421 return IRQ_NONE; 422 423 phy_trigger_machine(phydev); 424 425 return IRQ_HANDLED; 426 } 427 428 static int marvell_set_polarity(struct phy_device *phydev, int polarity) 429 { 430 u16 val; 431 432 switch (polarity) { 433 case ETH_TP_MDI: 434 val = MII_M1011_PHY_SCR_MDI; 435 break; 436 case ETH_TP_MDI_X: 437 val = MII_M1011_PHY_SCR_MDI_X; 438 break; 439 case ETH_TP_MDI_AUTO: 440 case ETH_TP_MDI_INVALID: 441 default: 442 val = MII_M1011_PHY_SCR_AUTO_CROSS; 443 break; 444 } 445 446 return phy_modify_changed(phydev, MII_M1011_PHY_SCR, 447 MII_M1011_PHY_SCR_AUTO_CROSS, val); 448 } 449 450 static int marvell_config_aneg(struct phy_device *phydev) 451 { 452 int changed = 0; 453 int err; 454 455 err = marvell_set_polarity(phydev, phydev->mdix_ctrl); 456 if (err < 0) 457 return err; 458 459 changed = err; 460 461 err = phy_write(phydev, MII_M1111_PHY_LED_CONTROL, 462 MII_M1111_PHY_LED_DIRECT); 463 if (err < 0) 464 return err; 465 466 err = genphy_config_aneg(phydev); 467 if (err < 0) 468 return err; 469 470 if (phydev->autoneg != AUTONEG_ENABLE || changed) { 471 /* A write to speed/duplex bits (that is performed by 472 * genphy_config_aneg() call above) must be followed by 473 * a software reset. Otherwise, the write has no effect. 474 */ 475 err = genphy_soft_reset(phydev); 476 if (err < 0) 477 return err; 478 } 479 480 return 0; 481 } 482 483 static int m88e1101_config_aneg(struct phy_device *phydev) 484 { 485 int err; 486 487 /* This Marvell PHY has an errata which requires 488 * that certain registers get written in order 489 * to restart autonegotiation 490 */ 491 err = genphy_soft_reset(phydev); 492 if (err < 0) 493 return err; 494 495 err = phy_write(phydev, 0x1d, 0x1f); 496 if (err < 0) 497 return err; 498 499 err = phy_write(phydev, 0x1e, 0x200c); 500 if (err < 0) 501 return err; 502 503 err = phy_write(phydev, 0x1d, 0x5); 504 if (err < 0) 505 return err; 506 507 err = phy_write(phydev, 0x1e, 0); 508 if (err < 0) 509 return err; 510 511 err = phy_write(phydev, 0x1e, 0x100); 512 if (err < 0) 513 return err; 514 515 return marvell_config_aneg(phydev); 516 } 517 518 #if IS_ENABLED(CONFIG_OF_MDIO) 519 /* Set and/or override some configuration registers based on the 520 * marvell,reg-init property stored in the of_node for the phydev. 521 * 522 * marvell,reg-init = <reg-page reg mask value>,...; 523 * 524 * There may be one or more sets of <reg-page reg mask value>: 525 * 526 * reg-page: which register bank to use. 527 * reg: the register. 528 * mask: if non-zero, ANDed with existing register value. 529 * value: ORed with the masked value and written to the regiser. 530 * 531 */ 532 static int marvell_of_reg_init(struct phy_device *phydev) 533 { 534 const __be32 *paddr; 535 int len, i, saved_page, current_page, ret = 0; 536 537 if (!phydev->mdio.dev.of_node) 538 return 0; 539 540 paddr = of_get_property(phydev->mdio.dev.of_node, 541 "marvell,reg-init", &len); 542 if (!paddr || len < (4 * sizeof(*paddr))) 543 return 0; 544 545 saved_page = phy_save_page(phydev); 546 if (saved_page < 0) 547 goto err; 548 current_page = saved_page; 549 550 len /= sizeof(*paddr); 551 for (i = 0; i < len - 3; i += 4) { 552 u16 page = be32_to_cpup(paddr + i); 553 u16 reg = be32_to_cpup(paddr + i + 1); 554 u16 mask = be32_to_cpup(paddr + i + 2); 555 u16 val_bits = be32_to_cpup(paddr + i + 3); 556 int val; 557 558 if (page != current_page) { 559 current_page = page; 560 ret = marvell_write_page(phydev, page); 561 if (ret < 0) 562 goto err; 563 } 564 565 val = 0; 566 if (mask) { 567 val = __phy_read(phydev, reg); 568 if (val < 0) { 569 ret = val; 570 goto err; 571 } 572 val &= mask; 573 } 574 val |= val_bits; 575 576 ret = __phy_write(phydev, reg, val); 577 if (ret < 0) 578 goto err; 579 } 580 err: 581 return phy_restore_page(phydev, saved_page, ret); 582 } 583 #else 584 static int marvell_of_reg_init(struct phy_device *phydev) 585 { 586 return 0; 587 } 588 #endif /* CONFIG_OF_MDIO */ 589 590 static int m88e1121_config_aneg_rgmii_delays(struct phy_device *phydev) 591 { 592 int mscr; 593 594 if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID) 595 mscr = MII_88E1121_PHY_MSCR_RX_DELAY | 596 MII_88E1121_PHY_MSCR_TX_DELAY; 597 else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_RXID) 598 mscr = MII_88E1121_PHY_MSCR_RX_DELAY; 599 else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_TXID) 600 mscr = MII_88E1121_PHY_MSCR_TX_DELAY; 601 else 602 mscr = 0; 603 604 return phy_modify_paged_changed(phydev, MII_MARVELL_MSCR_PAGE, 605 MII_88E1121_PHY_MSCR_REG, 606 MII_88E1121_PHY_MSCR_DELAY_MASK, mscr); 607 } 608 609 static int m88e1121_config_aneg(struct phy_device *phydev) 610 { 611 int changed = 0; 612 int err = 0; 613 614 if (phy_interface_is_rgmii(phydev)) { 615 err = m88e1121_config_aneg_rgmii_delays(phydev); 616 if (err < 0) 617 return err; 618 } 619 620 changed = err; 621 622 err = marvell_set_polarity(phydev, phydev->mdix_ctrl); 623 if (err < 0) 624 return err; 625 626 changed |= err; 627 628 err = genphy_config_aneg(phydev); 629 if (err < 0) 630 return err; 631 632 if (phydev->autoneg != AUTONEG_ENABLE || changed) { 633 /* A software reset is used to ensure a "commit" of the 634 * changes is done. 635 */ 636 err = genphy_soft_reset(phydev); 637 if (err < 0) 638 return err; 639 } 640 641 return 0; 642 } 643 644 static int m88e1318_config_aneg(struct phy_device *phydev) 645 { 646 int err; 647 648 err = phy_modify_paged(phydev, MII_MARVELL_MSCR_PAGE, 649 MII_88E1318S_PHY_MSCR1_REG, 650 0, MII_88E1318S_PHY_MSCR1_PAD_ODD); 651 if (err < 0) 652 return err; 653 654 return m88e1121_config_aneg(phydev); 655 } 656 657 /** 658 * linkmode_adv_to_fiber_adv_t 659 * @advertise: the linkmode advertisement settings 660 * 661 * A small helper function that translates linkmode advertisement 662 * settings to phy autonegotiation advertisements for the MII_ADV 663 * register for fiber link. 664 */ 665 static inline u32 linkmode_adv_to_fiber_adv_t(unsigned long *advertise) 666 { 667 u32 result = 0; 668 669 if (linkmode_test_bit(ETHTOOL_LINK_MODE_1000baseT_Half_BIT, advertise)) 670 result |= ADVERTISE_1000XHALF; 671 if (linkmode_test_bit(ETHTOOL_LINK_MODE_1000baseT_Full_BIT, advertise)) 672 result |= ADVERTISE_1000XFULL; 673 674 if (linkmode_test_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, advertise) && 675 linkmode_test_bit(ETHTOOL_LINK_MODE_Pause_BIT, advertise)) 676 result |= ADVERTISE_1000XPSE_ASYM; 677 else if (linkmode_test_bit(ETHTOOL_LINK_MODE_Pause_BIT, advertise)) 678 result |= ADVERTISE_1000XPAUSE; 679 680 return result; 681 } 682 683 /** 684 * marvell_config_aneg_fiber - restart auto-negotiation or write BMCR 685 * @phydev: target phy_device struct 686 * 687 * Description: If auto-negotiation is enabled, we configure the 688 * advertising, and then restart auto-negotiation. If it is not 689 * enabled, then we write the BMCR. Adapted for fiber link in 690 * some Marvell's devices. 691 */ 692 static int marvell_config_aneg_fiber(struct phy_device *phydev) 693 { 694 int changed = 0; 695 int err; 696 u16 adv; 697 698 if (phydev->autoneg != AUTONEG_ENABLE) 699 return genphy_setup_forced(phydev); 700 701 /* Only allow advertising what this PHY supports */ 702 linkmode_and(phydev->advertising, phydev->advertising, 703 phydev->supported); 704 705 adv = linkmode_adv_to_fiber_adv_t(phydev->advertising); 706 707 /* Setup fiber advertisement */ 708 err = phy_modify_changed(phydev, MII_ADVERTISE, 709 ADVERTISE_1000XHALF | ADVERTISE_1000XFULL | 710 ADVERTISE_1000XPAUSE | ADVERTISE_1000XPSE_ASYM, 711 adv); 712 if (err < 0) 713 return err; 714 if (err > 0) 715 changed = 1; 716 717 return genphy_check_and_restart_aneg(phydev, changed); 718 } 719 720 static int m88e1111_config_aneg(struct phy_device *phydev) 721 { 722 int extsr = phy_read(phydev, MII_M1111_PHY_EXT_SR); 723 int err; 724 725 if (extsr < 0) 726 return extsr; 727 728 /* If not using SGMII or copper 1000BaseX modes, use normal process. 729 * Steps below are only required for these modes. 730 */ 731 if (phydev->interface != PHY_INTERFACE_MODE_SGMII && 732 (extsr & MII_M1111_HWCFG_MODE_MASK) != 733 MII_M1111_HWCFG_MODE_COPPER_1000X_AN) 734 return marvell_config_aneg(phydev); 735 736 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); 737 if (err < 0) 738 goto error; 739 740 /* Configure the copper link first */ 741 err = marvell_config_aneg(phydev); 742 if (err < 0) 743 goto error; 744 745 /* Then the fiber link */ 746 err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE); 747 if (err < 0) 748 goto error; 749 750 if (phydev->interface == PHY_INTERFACE_MODE_SGMII) 751 /* Do not touch the fiber advertisement if we're in copper->sgmii mode. 752 * Just ensure that SGMII-side autonegotiation is enabled. 753 * If we switched from some other mode to SGMII it may not be. 754 */ 755 err = genphy_check_and_restart_aneg(phydev, false); 756 else 757 err = marvell_config_aneg_fiber(phydev); 758 if (err < 0) 759 goto error; 760 761 return marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); 762 763 error: 764 marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); 765 return err; 766 } 767 768 static int m88e1510_config_aneg(struct phy_device *phydev) 769 { 770 int err; 771 772 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); 773 if (err < 0) 774 goto error; 775 776 /* Configure the copper link first */ 777 err = m88e1318_config_aneg(phydev); 778 if (err < 0) 779 goto error; 780 781 /* Do not touch the fiber page if we're in copper->sgmii mode */ 782 if (phydev->interface == PHY_INTERFACE_MODE_SGMII) 783 return 0; 784 785 /* Then the fiber link */ 786 err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE); 787 if (err < 0) 788 goto error; 789 790 err = marvell_config_aneg_fiber(phydev); 791 if (err < 0) 792 goto error; 793 794 return marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); 795 796 error: 797 marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); 798 return err; 799 } 800 801 static void marvell_config_led(struct phy_device *phydev) 802 { 803 u16 def_config; 804 int err; 805 806 switch (MARVELL_PHY_FAMILY_ID(phydev->phy_id)) { 807 /* Default PHY LED config: LED[0] .. Link, LED[1] .. Activity */ 808 case MARVELL_PHY_FAMILY_ID(MARVELL_PHY_ID_88E1121R): 809 case MARVELL_PHY_FAMILY_ID(MARVELL_PHY_ID_88E1318S): 810 def_config = MII_88E1121_PHY_LED_DEF; 811 break; 812 /* Default PHY LED config: 813 * LED[0] .. 1000Mbps Link 814 * LED[1] .. 100Mbps Link 815 * LED[2] .. Blink, Activity 816 */ 817 case MARVELL_PHY_FAMILY_ID(MARVELL_PHY_ID_88E1510): 818 if (phydev->dev_flags & MARVELL_PHY_LED0_LINK_LED1_ACTIVE) 819 def_config = MII_88E1510_PHY_LED0_LINK_LED1_ACTIVE; 820 else 821 def_config = MII_88E1510_PHY_LED_DEF; 822 break; 823 default: 824 return; 825 } 826 827 err = phy_write_paged(phydev, MII_MARVELL_LED_PAGE, MII_PHY_LED_CTRL, 828 def_config); 829 if (err < 0) 830 phydev_warn(phydev, "Fail to config marvell phy LED.\n"); 831 } 832 833 static int marvell_config_init(struct phy_device *phydev) 834 { 835 /* Set default LED */ 836 marvell_config_led(phydev); 837 838 /* Set registers from marvell,reg-init DT property */ 839 return marvell_of_reg_init(phydev); 840 } 841 842 static int m88e3016_config_init(struct phy_device *phydev) 843 { 844 int ret; 845 846 /* Enable Scrambler and Auto-Crossover */ 847 ret = phy_modify(phydev, MII_88E3016_PHY_SPEC_CTRL, 848 MII_88E3016_DISABLE_SCRAMBLER, 849 MII_88E3016_AUTO_MDIX_CROSSOVER); 850 if (ret < 0) 851 return ret; 852 853 return marvell_config_init(phydev); 854 } 855 856 static int m88e1111_config_init_hwcfg_mode(struct phy_device *phydev, 857 u16 mode, 858 int fibre_copper_auto) 859 { 860 if (fibre_copper_auto) 861 mode |= MII_M1111_HWCFG_FIBER_COPPER_AUTO; 862 863 return phy_modify(phydev, MII_M1111_PHY_EXT_SR, 864 MII_M1111_HWCFG_MODE_MASK | 865 MII_M1111_HWCFG_FIBER_COPPER_AUTO | 866 MII_M1111_HWCFG_FIBER_COPPER_RES, 867 mode); 868 } 869 870 static int m88e1111_config_init_rgmii_delays(struct phy_device *phydev) 871 { 872 int delay; 873 874 switch (phydev->interface) { 875 case PHY_INTERFACE_MODE_RGMII_ID: 876 delay = MII_M1111_RGMII_RX_DELAY | MII_M1111_RGMII_TX_DELAY; 877 break; 878 case PHY_INTERFACE_MODE_RGMII_RXID: 879 delay = MII_M1111_RGMII_RX_DELAY; 880 break; 881 case PHY_INTERFACE_MODE_RGMII_TXID: 882 delay = MII_M1111_RGMII_TX_DELAY; 883 break; 884 default: 885 delay = 0; 886 break; 887 } 888 889 return phy_modify(phydev, MII_M1111_PHY_EXT_CR, 890 MII_M1111_RGMII_RX_DELAY | MII_M1111_RGMII_TX_DELAY, 891 delay); 892 } 893 894 static int m88e1111_config_init_rgmii(struct phy_device *phydev) 895 { 896 int temp; 897 int err; 898 899 err = m88e1111_config_init_rgmii_delays(phydev); 900 if (err < 0) 901 return err; 902 903 temp = phy_read(phydev, MII_M1111_PHY_EXT_SR); 904 if (temp < 0) 905 return temp; 906 907 temp &= ~(MII_M1111_HWCFG_MODE_MASK); 908 909 if (temp & MII_M1111_HWCFG_FIBER_COPPER_RES) 910 temp |= MII_M1111_HWCFG_MODE_FIBER_RGMII; 911 else 912 temp |= MII_M1111_HWCFG_MODE_COPPER_RGMII; 913 914 return phy_write(phydev, MII_M1111_PHY_EXT_SR, temp); 915 } 916 917 static int m88e1111_config_init_sgmii(struct phy_device *phydev) 918 { 919 int err; 920 921 err = m88e1111_config_init_hwcfg_mode( 922 phydev, 923 MII_M1111_HWCFG_MODE_SGMII_NO_CLK, 924 MII_M1111_HWCFG_FIBER_COPPER_AUTO); 925 if (err < 0) 926 return err; 927 928 /* make sure copper is selected */ 929 return marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); 930 } 931 932 static int m88e1111_config_init_rtbi(struct phy_device *phydev) 933 { 934 int err; 935 936 err = m88e1111_config_init_rgmii_delays(phydev); 937 if (err < 0) 938 return err; 939 940 err = m88e1111_config_init_hwcfg_mode( 941 phydev, 942 MII_M1111_HWCFG_MODE_RTBI, 943 MII_M1111_HWCFG_FIBER_COPPER_AUTO); 944 if (err < 0) 945 return err; 946 947 /* soft reset */ 948 err = genphy_soft_reset(phydev); 949 if (err < 0) 950 return err; 951 952 return m88e1111_config_init_hwcfg_mode( 953 phydev, 954 MII_M1111_HWCFG_MODE_RTBI, 955 MII_M1111_HWCFG_FIBER_COPPER_AUTO); 956 } 957 958 static int m88e1111_config_init_1000basex(struct phy_device *phydev) 959 { 960 int extsr = phy_read(phydev, MII_M1111_PHY_EXT_SR); 961 int err, mode; 962 963 if (extsr < 0) 964 return extsr; 965 966 /* If using copper mode, ensure 1000BaseX auto-negotiation is enabled. 967 * FIXME: this does not actually enable 1000BaseX auto-negotiation if 968 * it was previously disabled in the Fiber BMCR! 969 */ 970 mode = extsr & MII_M1111_HWCFG_MODE_MASK; 971 if (mode == MII_M1111_HWCFG_MODE_COPPER_1000X_NOAN) { 972 err = phy_modify(phydev, MII_M1111_PHY_EXT_SR, 973 MII_M1111_HWCFG_MODE_MASK | 974 MII_M1111_HWCFG_SERIAL_AN_BYPASS, 975 MII_M1111_HWCFG_MODE_COPPER_1000X_AN | 976 MII_M1111_HWCFG_SERIAL_AN_BYPASS); 977 if (err < 0) 978 return err; 979 } 980 return 0; 981 } 982 983 static int m88e1111_config_init(struct phy_device *phydev) 984 { 985 int err; 986 987 if (phy_interface_is_rgmii(phydev)) { 988 err = m88e1111_config_init_rgmii(phydev); 989 if (err < 0) 990 return err; 991 } 992 993 if (phydev->interface == PHY_INTERFACE_MODE_SGMII) { 994 err = m88e1111_config_init_sgmii(phydev); 995 if (err < 0) 996 return err; 997 } 998 999 if (phydev->interface == PHY_INTERFACE_MODE_RTBI) { 1000 err = m88e1111_config_init_rtbi(phydev); 1001 if (err < 0) 1002 return err; 1003 } 1004 1005 if (phydev->interface == PHY_INTERFACE_MODE_1000BASEX) { 1006 err = m88e1111_config_init_1000basex(phydev); 1007 if (err < 0) 1008 return err; 1009 } 1010 1011 err = marvell_of_reg_init(phydev); 1012 if (err < 0) 1013 return err; 1014 1015 err = genphy_soft_reset(phydev); 1016 if (err < 0) 1017 return err; 1018 1019 if (phydev->interface == PHY_INTERFACE_MODE_SGMII) { 1020 /* If the HWCFG_MODE was changed from another mode (such as 1021 * 1000BaseX) to SGMII, the state of the support bits may have 1022 * also changed now that the PHY has been reset. 1023 * Update the PHY abilities accordingly. 1024 */ 1025 err = genphy_read_abilities(phydev); 1026 linkmode_or(phydev->advertising, phydev->advertising, 1027 phydev->supported); 1028 } 1029 return err; 1030 } 1031 1032 static int m88e1111_get_downshift(struct phy_device *phydev, u8 *data) 1033 { 1034 int val, cnt, enable; 1035 1036 val = phy_read(phydev, MII_M1111_PHY_EXT_CR); 1037 if (val < 0) 1038 return val; 1039 1040 enable = FIELD_GET(MII_M1111_PHY_EXT_CR_DOWNSHIFT_EN, val); 1041 cnt = FIELD_GET(MII_M1111_PHY_EXT_CR_DOWNSHIFT_MASK, val) + 1; 1042 1043 *data = enable ? cnt : DOWNSHIFT_DEV_DISABLE; 1044 1045 return 0; 1046 } 1047 1048 static int m88e1111_set_downshift(struct phy_device *phydev, u8 cnt) 1049 { 1050 int val, err; 1051 1052 if (cnt > MII_M1111_PHY_EXT_CR_DOWNSHIFT_MAX) 1053 return -E2BIG; 1054 1055 if (!cnt) { 1056 err = phy_clear_bits(phydev, MII_M1111_PHY_EXT_CR, 1057 MII_M1111_PHY_EXT_CR_DOWNSHIFT_EN); 1058 } else { 1059 val = MII_M1111_PHY_EXT_CR_DOWNSHIFT_EN; 1060 val |= FIELD_PREP(MII_M1111_PHY_EXT_CR_DOWNSHIFT_MASK, cnt - 1); 1061 1062 err = phy_modify(phydev, MII_M1111_PHY_EXT_CR, 1063 MII_M1111_PHY_EXT_CR_DOWNSHIFT_EN | 1064 MII_M1111_PHY_EXT_CR_DOWNSHIFT_MASK, 1065 val); 1066 } 1067 1068 if (err < 0) 1069 return err; 1070 1071 return genphy_soft_reset(phydev); 1072 } 1073 1074 static int m88e1111_get_tunable(struct phy_device *phydev, 1075 struct ethtool_tunable *tuna, void *data) 1076 { 1077 switch (tuna->id) { 1078 case ETHTOOL_PHY_DOWNSHIFT: 1079 return m88e1111_get_downshift(phydev, data); 1080 default: 1081 return -EOPNOTSUPP; 1082 } 1083 } 1084 1085 static int m88e1111_set_tunable(struct phy_device *phydev, 1086 struct ethtool_tunable *tuna, const void *data) 1087 { 1088 switch (tuna->id) { 1089 case ETHTOOL_PHY_DOWNSHIFT: 1090 return m88e1111_set_downshift(phydev, *(const u8 *)data); 1091 default: 1092 return -EOPNOTSUPP; 1093 } 1094 } 1095 1096 static int m88e1011_get_downshift(struct phy_device *phydev, u8 *data) 1097 { 1098 int val, cnt, enable; 1099 1100 val = phy_read(phydev, MII_M1011_PHY_SCR); 1101 if (val < 0) 1102 return val; 1103 1104 enable = FIELD_GET(MII_M1011_PHY_SCR_DOWNSHIFT_EN, val); 1105 cnt = FIELD_GET(MII_M1011_PHY_SCR_DOWNSHIFT_MASK, val) + 1; 1106 1107 *data = enable ? cnt : DOWNSHIFT_DEV_DISABLE; 1108 1109 return 0; 1110 } 1111 1112 static int m88e1011_set_downshift(struct phy_device *phydev, u8 cnt) 1113 { 1114 int val, err; 1115 1116 if (cnt > MII_M1011_PHY_SCR_DOWNSHIFT_MAX) 1117 return -E2BIG; 1118 1119 if (!cnt) { 1120 err = phy_clear_bits(phydev, MII_M1011_PHY_SCR, 1121 MII_M1011_PHY_SCR_DOWNSHIFT_EN); 1122 } else { 1123 val = MII_M1011_PHY_SCR_DOWNSHIFT_EN; 1124 val |= FIELD_PREP(MII_M1011_PHY_SCR_DOWNSHIFT_MASK, cnt - 1); 1125 1126 err = phy_modify(phydev, MII_M1011_PHY_SCR, 1127 MII_M1011_PHY_SCR_DOWNSHIFT_EN | 1128 MII_M1011_PHY_SCR_DOWNSHIFT_MASK, 1129 val); 1130 } 1131 1132 if (err < 0) 1133 return err; 1134 1135 return genphy_soft_reset(phydev); 1136 } 1137 1138 static int m88e1011_get_tunable(struct phy_device *phydev, 1139 struct ethtool_tunable *tuna, void *data) 1140 { 1141 switch (tuna->id) { 1142 case ETHTOOL_PHY_DOWNSHIFT: 1143 return m88e1011_get_downshift(phydev, data); 1144 default: 1145 return -EOPNOTSUPP; 1146 } 1147 } 1148 1149 static int m88e1011_set_tunable(struct phy_device *phydev, 1150 struct ethtool_tunable *tuna, const void *data) 1151 { 1152 switch (tuna->id) { 1153 case ETHTOOL_PHY_DOWNSHIFT: 1154 return m88e1011_set_downshift(phydev, *(const u8 *)data); 1155 default: 1156 return -EOPNOTSUPP; 1157 } 1158 } 1159 1160 static int m88e1112_config_init(struct phy_device *phydev) 1161 { 1162 int err; 1163 1164 err = m88e1011_set_downshift(phydev, 3); 1165 if (err < 0) 1166 return err; 1167 1168 return m88e1111_config_init(phydev); 1169 } 1170 1171 static int m88e1111gbe_config_init(struct phy_device *phydev) 1172 { 1173 int err; 1174 1175 err = m88e1111_set_downshift(phydev, 3); 1176 if (err < 0) 1177 return err; 1178 1179 return m88e1111_config_init(phydev); 1180 } 1181 1182 static int marvell_1011gbe_config_init(struct phy_device *phydev) 1183 { 1184 int err; 1185 1186 err = m88e1011_set_downshift(phydev, 3); 1187 if (err < 0) 1188 return err; 1189 1190 return marvell_config_init(phydev); 1191 } 1192 static int m88e1116r_config_init(struct phy_device *phydev) 1193 { 1194 int err; 1195 1196 err = genphy_soft_reset(phydev); 1197 if (err < 0) 1198 return err; 1199 1200 msleep(500); 1201 1202 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); 1203 if (err < 0) 1204 return err; 1205 1206 err = marvell_set_polarity(phydev, phydev->mdix_ctrl); 1207 if (err < 0) 1208 return err; 1209 1210 err = m88e1011_set_downshift(phydev, 8); 1211 if (err < 0) 1212 return err; 1213 1214 if (phy_interface_is_rgmii(phydev)) { 1215 err = m88e1121_config_aneg_rgmii_delays(phydev); 1216 if (err < 0) 1217 return err; 1218 } 1219 1220 err = genphy_soft_reset(phydev); 1221 if (err < 0) 1222 return err; 1223 1224 return marvell_config_init(phydev); 1225 } 1226 1227 static int m88e1318_config_init(struct phy_device *phydev) 1228 { 1229 if (phy_interrupt_is_valid(phydev)) { 1230 int err = phy_modify_paged( 1231 phydev, MII_MARVELL_LED_PAGE, 1232 MII_88E1318S_PHY_LED_TCR, 1233 MII_88E1318S_PHY_LED_TCR_FORCE_INT, 1234 MII_88E1318S_PHY_LED_TCR_INTn_ENABLE | 1235 MII_88E1318S_PHY_LED_TCR_INT_ACTIVE_LOW); 1236 if (err < 0) 1237 return err; 1238 } 1239 1240 return marvell_config_init(phydev); 1241 } 1242 1243 static int m88e1510_config_init(struct phy_device *phydev) 1244 { 1245 static const struct { 1246 u16 reg17, reg16; 1247 } errata_vals[] = { 1248 { 0x214b, 0x2144 }, 1249 { 0x0c28, 0x2146 }, 1250 { 0xb233, 0x214d }, 1251 { 0xcc0c, 0x2159 }, 1252 }; 1253 int err; 1254 int i; 1255 1256 /* As per Marvell Release Notes - Alaska 88E1510/88E1518/88E1512/ 1257 * 88E1514 Rev A0, Errata Section 5.1: 1258 * If EEE is intended to be used, the following register writes 1259 * must be done once after every hardware reset. 1260 */ 1261 err = marvell_set_page(phydev, 0x00FF); 1262 if (err < 0) 1263 return err; 1264 1265 for (i = 0; i < ARRAY_SIZE(errata_vals); ++i) { 1266 err = phy_write(phydev, 17, errata_vals[i].reg17); 1267 if (err) 1268 return err; 1269 err = phy_write(phydev, 16, errata_vals[i].reg16); 1270 if (err) 1271 return err; 1272 } 1273 1274 err = marvell_set_page(phydev, 0x00FB); 1275 if (err < 0) 1276 return err; 1277 err = phy_write(phydev, 07, 0xC00D); 1278 if (err < 0) 1279 return err; 1280 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); 1281 if (err < 0) 1282 return err; 1283 1284 /* SGMII-to-Copper mode initialization */ 1285 if (phydev->interface == PHY_INTERFACE_MODE_SGMII) { 1286 /* Select page 18 */ 1287 err = marvell_set_page(phydev, 18); 1288 if (err < 0) 1289 return err; 1290 1291 /* In reg 20, write MODE[2:0] = 0x1 (SGMII to Copper) */ 1292 err = phy_modify(phydev, MII_88E1510_GEN_CTRL_REG_1, 1293 MII_88E1510_GEN_CTRL_REG_1_MODE_MASK, 1294 MII_88E1510_GEN_CTRL_REG_1_MODE_SGMII); 1295 if (err < 0) 1296 return err; 1297 1298 /* PHY reset is necessary after changing MODE[2:0] */ 1299 err = phy_set_bits(phydev, MII_88E1510_GEN_CTRL_REG_1, 1300 MII_88E1510_GEN_CTRL_REG_1_RESET); 1301 if (err < 0) 1302 return err; 1303 1304 /* Reset page selection */ 1305 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); 1306 if (err < 0) 1307 return err; 1308 } 1309 err = m88e1011_set_downshift(phydev, 3); 1310 if (err < 0) 1311 return err; 1312 1313 return m88e1318_config_init(phydev); 1314 } 1315 1316 static int m88e1118_config_aneg(struct phy_device *phydev) 1317 { 1318 int err; 1319 1320 err = marvell_set_polarity(phydev, phydev->mdix_ctrl); 1321 if (err < 0) 1322 return err; 1323 1324 err = genphy_config_aneg(phydev); 1325 if (err < 0) 1326 return err; 1327 1328 return genphy_soft_reset(phydev); 1329 } 1330 1331 static int m88e1118_config_init(struct phy_device *phydev) 1332 { 1333 u16 leds; 1334 int err; 1335 1336 /* Enable 1000 Mbit */ 1337 err = phy_write_paged(phydev, MII_MARVELL_MSCR_PAGE, 1338 MII_88E1121_PHY_MSCR_REG, 0x1070); 1339 if (err < 0) 1340 return err; 1341 1342 if (phy_interface_is_rgmii(phydev)) { 1343 err = m88e1121_config_aneg_rgmii_delays(phydev); 1344 if (err < 0) 1345 return err; 1346 } 1347 1348 /* Adjust LED Control */ 1349 if (phydev->dev_flags & MARVELL_PHY_M1118_DNS323_LEDS) 1350 leds = 0x1100; 1351 else 1352 leds = 0x021e; 1353 1354 err = phy_write_paged(phydev, MII_MARVELL_LED_PAGE, 0x10, leds); 1355 if (err < 0) 1356 return err; 1357 1358 err = marvell_of_reg_init(phydev); 1359 if (err < 0) 1360 return err; 1361 1362 /* Reset page register */ 1363 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); 1364 if (err < 0) 1365 return err; 1366 1367 return genphy_soft_reset(phydev); 1368 } 1369 1370 static int m88e1149_config_init(struct phy_device *phydev) 1371 { 1372 int err; 1373 1374 /* Change address */ 1375 err = marvell_set_page(phydev, MII_MARVELL_MSCR_PAGE); 1376 if (err < 0) 1377 return err; 1378 1379 /* Enable 1000 Mbit */ 1380 err = phy_write(phydev, 0x15, 0x1048); 1381 if (err < 0) 1382 return err; 1383 1384 err = marvell_of_reg_init(phydev); 1385 if (err < 0) 1386 return err; 1387 1388 /* Reset address */ 1389 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); 1390 if (err < 0) 1391 return err; 1392 1393 return genphy_soft_reset(phydev); 1394 } 1395 1396 static int m88e1145_config_init_rgmii(struct phy_device *phydev) 1397 { 1398 int err; 1399 1400 err = m88e1111_config_init_rgmii_delays(phydev); 1401 if (err < 0) 1402 return err; 1403 1404 if (phydev->dev_flags & MARVELL_PHY_M1145_FLAGS_RESISTANCE) { 1405 err = phy_write(phydev, 0x1d, 0x0012); 1406 if (err < 0) 1407 return err; 1408 1409 err = phy_modify(phydev, 0x1e, 0x0fc0, 1410 2 << 9 | /* 36 ohm */ 1411 2 << 6); /* 39 ohm */ 1412 if (err < 0) 1413 return err; 1414 1415 err = phy_write(phydev, 0x1d, 0x3); 1416 if (err < 0) 1417 return err; 1418 1419 err = phy_write(phydev, 0x1e, 0x8000); 1420 } 1421 return err; 1422 } 1423 1424 static int m88e1145_config_init_sgmii(struct phy_device *phydev) 1425 { 1426 return m88e1111_config_init_hwcfg_mode( 1427 phydev, MII_M1111_HWCFG_MODE_SGMII_NO_CLK, 1428 MII_M1111_HWCFG_FIBER_COPPER_AUTO); 1429 } 1430 1431 static int m88e1145_config_init(struct phy_device *phydev) 1432 { 1433 int err; 1434 1435 /* Take care of errata E0 & E1 */ 1436 err = phy_write(phydev, 0x1d, 0x001b); 1437 if (err < 0) 1438 return err; 1439 1440 err = phy_write(phydev, 0x1e, 0x418f); 1441 if (err < 0) 1442 return err; 1443 1444 err = phy_write(phydev, 0x1d, 0x0016); 1445 if (err < 0) 1446 return err; 1447 1448 err = phy_write(phydev, 0x1e, 0xa2da); 1449 if (err < 0) 1450 return err; 1451 1452 if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID) { 1453 err = m88e1145_config_init_rgmii(phydev); 1454 if (err < 0) 1455 return err; 1456 } 1457 1458 if (phydev->interface == PHY_INTERFACE_MODE_SGMII) { 1459 err = m88e1145_config_init_sgmii(phydev); 1460 if (err < 0) 1461 return err; 1462 } 1463 err = m88e1111_set_downshift(phydev, 3); 1464 if (err < 0) 1465 return err; 1466 1467 err = marvell_of_reg_init(phydev); 1468 if (err < 0) 1469 return err; 1470 1471 return 0; 1472 } 1473 1474 static int m88e1540_get_fld(struct phy_device *phydev, u8 *msecs) 1475 { 1476 int val; 1477 1478 val = phy_read(phydev, MII_88E1540_COPPER_CTRL3); 1479 if (val < 0) 1480 return val; 1481 1482 if (!(val & MII_88E1540_COPPER_CTRL3_FAST_LINK_DOWN)) { 1483 *msecs = ETHTOOL_PHY_FAST_LINK_DOWN_OFF; 1484 return 0; 1485 } 1486 1487 val = FIELD_GET(MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_MASK, val); 1488 1489 switch (val) { 1490 case MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_00MS: 1491 *msecs = 0; 1492 break; 1493 case MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_10MS: 1494 *msecs = 10; 1495 break; 1496 case MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_20MS: 1497 *msecs = 20; 1498 break; 1499 case MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_40MS: 1500 *msecs = 40; 1501 break; 1502 default: 1503 return -EINVAL; 1504 } 1505 1506 return 0; 1507 } 1508 1509 static int m88e1540_set_fld(struct phy_device *phydev, const u8 *msecs) 1510 { 1511 struct ethtool_keee eee; 1512 int val, ret; 1513 1514 if (*msecs == ETHTOOL_PHY_FAST_LINK_DOWN_OFF) 1515 return phy_clear_bits(phydev, MII_88E1540_COPPER_CTRL3, 1516 MII_88E1540_COPPER_CTRL3_FAST_LINK_DOWN); 1517 1518 /* According to the Marvell data sheet EEE must be disabled for 1519 * Fast Link Down detection to work properly 1520 */ 1521 ret = genphy_c45_ethtool_get_eee(phydev, &eee); 1522 if (!ret && eee.eee_enabled) { 1523 phydev_warn(phydev, "Fast Link Down detection requires EEE to be disabled!\n"); 1524 return -EBUSY; 1525 } 1526 1527 if (*msecs <= 5) 1528 val = MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_00MS; 1529 else if (*msecs <= 15) 1530 val = MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_10MS; 1531 else if (*msecs <= 30) 1532 val = MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_20MS; 1533 else 1534 val = MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_40MS; 1535 1536 val = FIELD_PREP(MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_MASK, val); 1537 1538 ret = phy_modify(phydev, MII_88E1540_COPPER_CTRL3, 1539 MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_MASK, val); 1540 if (ret) 1541 return ret; 1542 1543 return phy_set_bits(phydev, MII_88E1540_COPPER_CTRL3, 1544 MII_88E1540_COPPER_CTRL3_FAST_LINK_DOWN); 1545 } 1546 1547 static int m88e1540_get_tunable(struct phy_device *phydev, 1548 struct ethtool_tunable *tuna, void *data) 1549 { 1550 switch (tuna->id) { 1551 case ETHTOOL_PHY_FAST_LINK_DOWN: 1552 return m88e1540_get_fld(phydev, data); 1553 case ETHTOOL_PHY_DOWNSHIFT: 1554 return m88e1011_get_downshift(phydev, data); 1555 default: 1556 return -EOPNOTSUPP; 1557 } 1558 } 1559 1560 static int m88e1540_set_tunable(struct phy_device *phydev, 1561 struct ethtool_tunable *tuna, const void *data) 1562 { 1563 switch (tuna->id) { 1564 case ETHTOOL_PHY_FAST_LINK_DOWN: 1565 return m88e1540_set_fld(phydev, data); 1566 case ETHTOOL_PHY_DOWNSHIFT: 1567 return m88e1011_set_downshift(phydev, *(const u8 *)data); 1568 default: 1569 return -EOPNOTSUPP; 1570 } 1571 } 1572 1573 /* The VOD can be out of specification on link up. Poke an 1574 * undocumented register, in an undocumented page, with a magic value 1575 * to fix this. 1576 */ 1577 static int m88e6390_errata(struct phy_device *phydev) 1578 { 1579 int err; 1580 1581 err = phy_write(phydev, MII_BMCR, 1582 BMCR_ANENABLE | BMCR_SPEED1000 | BMCR_FULLDPLX); 1583 if (err) 1584 return err; 1585 1586 usleep_range(300, 400); 1587 1588 err = phy_write_paged(phydev, 0xf8, 0x08, 0x36); 1589 if (err) 1590 return err; 1591 1592 return genphy_soft_reset(phydev); 1593 } 1594 1595 static int m88e6390_config_aneg(struct phy_device *phydev) 1596 { 1597 int err; 1598 1599 err = m88e6390_errata(phydev); 1600 if (err) 1601 return err; 1602 1603 return m88e1510_config_aneg(phydev); 1604 } 1605 1606 /** 1607 * fiber_lpa_mod_linkmode_lpa_t 1608 * @advertising: the linkmode advertisement settings 1609 * @lpa: value of the MII_LPA register for fiber link 1610 * 1611 * A small helper function that translates MII_LPA bits to linkmode LP 1612 * advertisement settings. Other bits in advertising are left 1613 * unchanged. 1614 */ 1615 static void fiber_lpa_mod_linkmode_lpa_t(unsigned long *advertising, u32 lpa) 1616 { 1617 linkmode_mod_bit(ETHTOOL_LINK_MODE_1000baseT_Half_BIT, 1618 advertising, lpa & LPA_1000XHALF); 1619 1620 linkmode_mod_bit(ETHTOOL_LINK_MODE_1000baseT_Full_BIT, 1621 advertising, lpa & LPA_1000XFULL); 1622 } 1623 1624 static int marvell_read_status_page_an(struct phy_device *phydev, 1625 int fiber, int status) 1626 { 1627 int lpa; 1628 int err; 1629 1630 if (!(status & MII_M1011_PHY_STATUS_RESOLVED)) { 1631 phydev->link = 0; 1632 return 0; 1633 } 1634 1635 if (status & MII_M1011_PHY_STATUS_FULLDUPLEX) 1636 phydev->duplex = DUPLEX_FULL; 1637 else 1638 phydev->duplex = DUPLEX_HALF; 1639 1640 switch (status & MII_M1011_PHY_STATUS_SPD_MASK) { 1641 case MII_M1011_PHY_STATUS_1000: 1642 phydev->speed = SPEED_1000; 1643 break; 1644 1645 case MII_M1011_PHY_STATUS_100: 1646 phydev->speed = SPEED_100; 1647 break; 1648 1649 default: 1650 phydev->speed = SPEED_10; 1651 break; 1652 } 1653 1654 if (!fiber) { 1655 err = genphy_read_lpa(phydev); 1656 if (err < 0) 1657 return err; 1658 1659 phy_resolve_aneg_pause(phydev); 1660 } else { 1661 lpa = phy_read(phydev, MII_LPA); 1662 if (lpa < 0) 1663 return lpa; 1664 1665 /* The fiber link is only 1000M capable */ 1666 fiber_lpa_mod_linkmode_lpa_t(phydev->lp_advertising, lpa); 1667 1668 if (phydev->duplex == DUPLEX_FULL) { 1669 if (!(lpa & LPA_PAUSE_FIBER)) { 1670 phydev->pause = 0; 1671 phydev->asym_pause = 0; 1672 } else if ((lpa & LPA_PAUSE_ASYM_FIBER)) { 1673 phydev->pause = 1; 1674 phydev->asym_pause = 1; 1675 } else { 1676 phydev->pause = 1; 1677 phydev->asym_pause = 0; 1678 } 1679 } 1680 } 1681 1682 return 0; 1683 } 1684 1685 /* marvell_read_status_page 1686 * 1687 * Description: 1688 * Check the link, then figure out the current state 1689 * by comparing what we advertise with what the link partner 1690 * advertises. Start by checking the gigabit possibilities, 1691 * then move on to 10/100. 1692 */ 1693 static int marvell_read_status_page(struct phy_device *phydev, int page) 1694 { 1695 int status; 1696 int fiber; 1697 int err; 1698 1699 status = phy_read(phydev, MII_M1011_PHY_STATUS); 1700 if (status < 0) 1701 return status; 1702 1703 /* Use the generic register for copper link status, 1704 * and the PHY status register for fiber link status. 1705 */ 1706 if (page == MII_MARVELL_FIBER_PAGE) { 1707 phydev->link = !!(status & MII_M1011_PHY_STATUS_LINK); 1708 } else { 1709 err = genphy_update_link(phydev); 1710 if (err) 1711 return err; 1712 } 1713 1714 if (page == MII_MARVELL_FIBER_PAGE) 1715 fiber = 1; 1716 else 1717 fiber = 0; 1718 1719 linkmode_zero(phydev->lp_advertising); 1720 phydev->pause = 0; 1721 phydev->asym_pause = 0; 1722 phydev->speed = SPEED_UNKNOWN; 1723 phydev->duplex = DUPLEX_UNKNOWN; 1724 phydev->port = fiber ? PORT_FIBRE : PORT_TP; 1725 1726 if (fiber) { 1727 phydev->mdix = ETH_TP_MDI_INVALID; 1728 } else { 1729 /* The MDI-X state is set regardless of Autoneg being enabled 1730 * and reflects forced MDI-X state as well as auto resolution 1731 */ 1732 if (status & MII_M1011_PHY_STATUS_RESOLVED) 1733 phydev->mdix = status & MII_M1011_PHY_STATUS_MDIX ? 1734 ETH_TP_MDI_X : ETH_TP_MDI; 1735 else 1736 phydev->mdix = ETH_TP_MDI_INVALID; 1737 } 1738 1739 if (phydev->autoneg == AUTONEG_ENABLE) 1740 err = marvell_read_status_page_an(phydev, fiber, status); 1741 else 1742 err = genphy_read_status_fixed(phydev); 1743 1744 return err; 1745 } 1746 1747 /* marvell_read_status 1748 * 1749 * Some Marvell's phys have two modes: fiber and copper. 1750 * Both need status checked. 1751 * Description: 1752 * First, check the fiber link and status. 1753 * If the fiber link is down, check the copper link and status which 1754 * will be the default value if both link are down. 1755 */ 1756 static int marvell_read_status(struct phy_device *phydev) 1757 { 1758 int err; 1759 1760 /* Check the fiber mode first */ 1761 if (linkmode_test_bit(ETHTOOL_LINK_MODE_FIBRE_BIT, 1762 phydev->supported) && 1763 phydev->interface != PHY_INTERFACE_MODE_SGMII) { 1764 err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE); 1765 if (err < 0) 1766 goto error; 1767 1768 err = marvell_read_status_page(phydev, MII_MARVELL_FIBER_PAGE); 1769 if (err < 0) 1770 goto error; 1771 1772 /* If the fiber link is up, it is the selected and 1773 * used link. In this case, we need to stay in the 1774 * fiber page. Please to be careful about that, avoid 1775 * to restore Copper page in other functions which 1776 * could break the behaviour for some fiber phy like 1777 * 88E1512. 1778 */ 1779 if (phydev->link) 1780 return 0; 1781 1782 /* If fiber link is down, check and save copper mode state */ 1783 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); 1784 if (err < 0) 1785 goto error; 1786 } 1787 1788 return marvell_read_status_page(phydev, MII_MARVELL_COPPER_PAGE); 1789 1790 error: 1791 marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); 1792 return err; 1793 } 1794 1795 /* marvell_suspend 1796 * 1797 * Some Marvell's phys have two modes: fiber and copper. 1798 * Both need to be suspended 1799 */ 1800 static int marvell_suspend(struct phy_device *phydev) 1801 { 1802 int err; 1803 1804 /* Suspend the fiber mode first */ 1805 if (linkmode_test_bit(ETHTOOL_LINK_MODE_FIBRE_BIT, 1806 phydev->supported)) { 1807 err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE); 1808 if (err < 0) 1809 goto error; 1810 1811 /* With the page set, use the generic suspend */ 1812 err = genphy_suspend(phydev); 1813 if (err < 0) 1814 goto error; 1815 1816 /* Then, the copper link */ 1817 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); 1818 if (err < 0) 1819 goto error; 1820 } 1821 1822 /* With the page set, use the generic suspend */ 1823 return genphy_suspend(phydev); 1824 1825 error: 1826 marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); 1827 return err; 1828 } 1829 1830 /* marvell_resume 1831 * 1832 * Some Marvell's phys have two modes: fiber and copper. 1833 * Both need to be resumed 1834 */ 1835 static int marvell_resume(struct phy_device *phydev) 1836 { 1837 int err; 1838 1839 /* Resume the fiber mode first */ 1840 if (linkmode_test_bit(ETHTOOL_LINK_MODE_FIBRE_BIT, 1841 phydev->supported)) { 1842 err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE); 1843 if (err < 0) 1844 goto error; 1845 1846 /* With the page set, use the generic resume */ 1847 err = genphy_resume(phydev); 1848 if (err < 0) 1849 goto error; 1850 1851 /* Then, the copper link */ 1852 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); 1853 if (err < 0) 1854 goto error; 1855 } 1856 1857 /* With the page set, use the generic resume */ 1858 return genphy_resume(phydev); 1859 1860 error: 1861 marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); 1862 return err; 1863 } 1864 1865 static int marvell_aneg_done(struct phy_device *phydev) 1866 { 1867 int retval = phy_read(phydev, MII_M1011_PHY_STATUS); 1868 1869 return (retval < 0) ? retval : (retval & MII_M1011_PHY_STATUS_RESOLVED); 1870 } 1871 1872 static void m88e1318_get_wol(struct phy_device *phydev, 1873 struct ethtool_wolinfo *wol) 1874 { 1875 int ret; 1876 1877 wol->supported = WAKE_MAGIC | WAKE_PHY; 1878 wol->wolopts = 0; 1879 1880 ret = phy_read_paged(phydev, MII_MARVELL_WOL_PAGE, 1881 MII_88E1318S_PHY_WOL_CTRL); 1882 if (ret < 0) 1883 return; 1884 1885 if (ret & MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE) 1886 wol->wolopts |= WAKE_MAGIC; 1887 1888 if (ret & MII_88E1318S_PHY_WOL_CTRL_LINK_UP_ENABLE) 1889 wol->wolopts |= WAKE_PHY; 1890 } 1891 1892 static int m88e1318_set_wol(struct phy_device *phydev, 1893 struct ethtool_wolinfo *wol) 1894 { 1895 int err = 0, oldpage; 1896 1897 oldpage = phy_save_page(phydev); 1898 if (oldpage < 0) 1899 goto error; 1900 1901 if (wol->wolopts & (WAKE_MAGIC | WAKE_PHY)) { 1902 /* Explicitly switch to page 0x00, just to be sure */ 1903 err = marvell_write_page(phydev, MII_MARVELL_COPPER_PAGE); 1904 if (err < 0) 1905 goto error; 1906 1907 /* If WOL event happened once, the LED[2] interrupt pin 1908 * will not be cleared unless we reading the interrupt status 1909 * register. If interrupts are in use, the normal interrupt 1910 * handling will clear the WOL event. Clear the WOL event 1911 * before enabling it if !phy_interrupt_is_valid() 1912 */ 1913 if (!phy_interrupt_is_valid(phydev)) 1914 __phy_read(phydev, MII_M1011_IEVENT); 1915 1916 /* Enable the WOL interrupt */ 1917 err = __phy_set_bits(phydev, MII_88E1318S_PHY_CSIER, 1918 MII_88E1318S_PHY_CSIER_WOL_EIE); 1919 if (err < 0) 1920 goto error; 1921 1922 err = marvell_write_page(phydev, MII_MARVELL_LED_PAGE); 1923 if (err < 0) 1924 goto error; 1925 1926 /* Setup LED[2] as interrupt pin (active low) */ 1927 err = __phy_modify(phydev, MII_88E1318S_PHY_LED_TCR, 1928 MII_88E1318S_PHY_LED_TCR_FORCE_INT, 1929 MII_88E1318S_PHY_LED_TCR_INTn_ENABLE | 1930 MII_88E1318S_PHY_LED_TCR_INT_ACTIVE_LOW); 1931 if (err < 0) 1932 goto error; 1933 } 1934 1935 if (wol->wolopts & WAKE_MAGIC) { 1936 err = marvell_write_page(phydev, MII_MARVELL_WOL_PAGE); 1937 if (err < 0) 1938 goto error; 1939 1940 /* Store the device address for the magic packet */ 1941 err = __phy_write(phydev, MII_88E1318S_PHY_MAGIC_PACKET_WORD2, 1942 ((phydev->attached_dev->dev_addr[5] << 8) | 1943 phydev->attached_dev->dev_addr[4])); 1944 if (err < 0) 1945 goto error; 1946 err = __phy_write(phydev, MII_88E1318S_PHY_MAGIC_PACKET_WORD1, 1947 ((phydev->attached_dev->dev_addr[3] << 8) | 1948 phydev->attached_dev->dev_addr[2])); 1949 if (err < 0) 1950 goto error; 1951 err = __phy_write(phydev, MII_88E1318S_PHY_MAGIC_PACKET_WORD0, 1952 ((phydev->attached_dev->dev_addr[1] << 8) | 1953 phydev->attached_dev->dev_addr[0])); 1954 if (err < 0) 1955 goto error; 1956 1957 /* Clear WOL status and enable magic packet matching */ 1958 err = __phy_set_bits(phydev, MII_88E1318S_PHY_WOL_CTRL, 1959 MII_88E1318S_PHY_WOL_CTRL_CLEAR_WOL_STATUS | 1960 MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE); 1961 if (err < 0) 1962 goto error; 1963 } else { 1964 err = marvell_write_page(phydev, MII_MARVELL_WOL_PAGE); 1965 if (err < 0) 1966 goto error; 1967 1968 /* Clear WOL status and disable magic packet matching */ 1969 err = __phy_modify(phydev, MII_88E1318S_PHY_WOL_CTRL, 1970 MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE, 1971 MII_88E1318S_PHY_WOL_CTRL_CLEAR_WOL_STATUS); 1972 if (err < 0) 1973 goto error; 1974 } 1975 1976 if (wol->wolopts & WAKE_PHY) { 1977 err = marvell_write_page(phydev, MII_MARVELL_WOL_PAGE); 1978 if (err < 0) 1979 goto error; 1980 1981 /* Clear WOL status and enable link up event */ 1982 err = __phy_modify(phydev, MII_88E1318S_PHY_WOL_CTRL, 0, 1983 MII_88E1318S_PHY_WOL_CTRL_CLEAR_WOL_STATUS | 1984 MII_88E1318S_PHY_WOL_CTRL_LINK_UP_ENABLE); 1985 if (err < 0) 1986 goto error; 1987 } else { 1988 err = marvell_write_page(phydev, MII_MARVELL_WOL_PAGE); 1989 if (err < 0) 1990 goto error; 1991 1992 /* Clear WOL status and disable link up event */ 1993 err = __phy_modify(phydev, MII_88E1318S_PHY_WOL_CTRL, 1994 MII_88E1318S_PHY_WOL_CTRL_LINK_UP_ENABLE, 1995 MII_88E1318S_PHY_WOL_CTRL_CLEAR_WOL_STATUS); 1996 if (err < 0) 1997 goto error; 1998 } 1999 2000 error: 2001 return phy_restore_page(phydev, oldpage, err); 2002 } 2003 2004 static int marvell_get_sset_count(struct phy_device *phydev) 2005 { 2006 if (linkmode_test_bit(ETHTOOL_LINK_MODE_FIBRE_BIT, 2007 phydev->supported)) 2008 return ARRAY_SIZE(marvell_hw_stats); 2009 else 2010 return ARRAY_SIZE(marvell_hw_stats) - NB_FIBER_STATS; 2011 } 2012 2013 static int marvell_get_sset_count_simple(struct phy_device *phydev) 2014 { 2015 return ARRAY_SIZE(marvell_hw_stats_simple); 2016 } 2017 2018 static void marvell_get_strings(struct phy_device *phydev, u8 *data) 2019 { 2020 int count = marvell_get_sset_count(phydev); 2021 int i; 2022 2023 for (i = 0; i < count; i++) { 2024 strscpy(data + i * ETH_GSTRING_LEN, 2025 marvell_hw_stats[i].string, ETH_GSTRING_LEN); 2026 } 2027 } 2028 2029 static void marvell_get_strings_simple(struct phy_device *phydev, u8 *data) 2030 { 2031 int count = marvell_get_sset_count_simple(phydev); 2032 int i; 2033 2034 for (i = 0; i < count; i++) { 2035 strscpy(data + i * ETH_GSTRING_LEN, 2036 marvell_hw_stats_simple[i].string, ETH_GSTRING_LEN); 2037 } 2038 } 2039 2040 static u64 marvell_get_stat(struct phy_device *phydev, int i) 2041 { 2042 struct marvell_hw_stat stat = marvell_hw_stats[i]; 2043 struct marvell_priv *priv = phydev->priv; 2044 int val; 2045 u64 ret; 2046 2047 val = phy_read_paged(phydev, stat.page, stat.reg); 2048 if (val < 0) { 2049 ret = U64_MAX; 2050 } else { 2051 val = val & ((1 << stat.bits) - 1); 2052 priv->stats[i] += val; 2053 ret = priv->stats[i]; 2054 } 2055 2056 return ret; 2057 } 2058 2059 static u64 marvell_get_stat_simple(struct phy_device *phydev, int i) 2060 { 2061 struct marvell_hw_stat_simple stat = marvell_hw_stats_simple[i]; 2062 struct marvell_priv *priv = phydev->priv; 2063 int val; 2064 u64 ret; 2065 2066 val = phy_read(phydev, stat.reg); 2067 if (val < 0) { 2068 ret = U64_MAX; 2069 } else { 2070 val = val & ((1 << stat.bits) - 1); 2071 priv->stats[i] += val; 2072 ret = priv->stats[i]; 2073 } 2074 2075 return ret; 2076 } 2077 2078 static void marvell_get_stats(struct phy_device *phydev, 2079 struct ethtool_stats *stats, u64 *data) 2080 { 2081 int count = marvell_get_sset_count(phydev); 2082 int i; 2083 2084 for (i = 0; i < count; i++) 2085 data[i] = marvell_get_stat(phydev, i); 2086 } 2087 2088 static void marvell_get_stats_simple(struct phy_device *phydev, 2089 struct ethtool_stats *stats, u64 *data) 2090 { 2091 int count = marvell_get_sset_count_simple(phydev); 2092 int i; 2093 2094 for (i = 0; i < count; i++) 2095 data[i] = marvell_get_stat_simple(phydev, i); 2096 } 2097 2098 static int m88e1510_loopback(struct phy_device *phydev, bool enable) 2099 { 2100 int err; 2101 2102 if (enable) { 2103 u16 bmcr_ctl, mscr2_ctl = 0; 2104 2105 bmcr_ctl = mii_bmcr_encode_fixed(phydev->speed, phydev->duplex); 2106 2107 err = phy_write(phydev, MII_BMCR, bmcr_ctl); 2108 if (err < 0) 2109 return err; 2110 2111 if (phydev->speed == SPEED_1000) 2112 mscr2_ctl = BMCR_SPEED1000; 2113 else if (phydev->speed == SPEED_100) 2114 mscr2_ctl = BMCR_SPEED100; 2115 2116 err = phy_modify_paged(phydev, MII_MARVELL_MSCR_PAGE, 2117 MII_88E1510_MSCR_2, BMCR_SPEED1000 | 2118 BMCR_SPEED100, mscr2_ctl); 2119 if (err < 0) 2120 return err; 2121 2122 /* Need soft reset to have speed configuration takes effect */ 2123 err = genphy_soft_reset(phydev); 2124 if (err < 0) 2125 return err; 2126 2127 err = phy_modify(phydev, MII_BMCR, BMCR_LOOPBACK, 2128 BMCR_LOOPBACK); 2129 2130 if (!err) { 2131 /* It takes some time for PHY device to switch 2132 * into/out-of loopback mode. 2133 */ 2134 msleep(1000); 2135 } 2136 return err; 2137 } else { 2138 err = phy_modify(phydev, MII_BMCR, BMCR_LOOPBACK, 0); 2139 if (err < 0) 2140 return err; 2141 2142 return phy_config_aneg(phydev); 2143 } 2144 } 2145 2146 static int marvell_vct5_wait_complete(struct phy_device *phydev) 2147 { 2148 int i; 2149 int val; 2150 2151 for (i = 0; i < 32; i++) { 2152 val = __phy_read(phydev, MII_VCT5_CTRL); 2153 if (val < 0) 2154 return val; 2155 2156 if (val & MII_VCT5_CTRL_COMPLETE) 2157 return 0; 2158 } 2159 2160 phydev_err(phydev, "Timeout while waiting for cable test to finish\n"); 2161 return -ETIMEDOUT; 2162 } 2163 2164 static int marvell_vct5_amplitude(struct phy_device *phydev, int pair) 2165 { 2166 int amplitude; 2167 int val; 2168 int reg; 2169 2170 reg = MII_VCT5_TX_RX_MDI0_COUPLING + pair; 2171 val = __phy_read(phydev, reg); 2172 2173 if (val < 0) 2174 return 0; 2175 2176 amplitude = (val & MII_VCT5_TX_RX_AMPLITUDE_MASK) >> 2177 MII_VCT5_TX_RX_AMPLITUDE_SHIFT; 2178 2179 if (!(val & MII_VCT5_TX_RX_COUPLING_POSITIVE_REFLECTION)) 2180 amplitude = -amplitude; 2181 2182 return 1000 * amplitude / 128; 2183 } 2184 2185 static u32 marvell_vct5_distance2cm(int distance) 2186 { 2187 return distance * 805 / 10; 2188 } 2189 2190 static u32 marvell_vct5_cm2distance(int cm) 2191 { 2192 return cm * 10 / 805; 2193 } 2194 2195 static int marvell_vct5_amplitude_distance(struct phy_device *phydev, 2196 int distance, int pair) 2197 { 2198 u16 reg; 2199 int err; 2200 int mV; 2201 int i; 2202 2203 err = __phy_write(phydev, MII_VCT5_SAMPLE_POINT_DISTANCE, 2204 distance); 2205 if (err) 2206 return err; 2207 2208 reg = MII_VCT5_CTRL_ENABLE | 2209 MII_VCT5_CTRL_TX_SAME_CHANNEL | 2210 MII_VCT5_CTRL_SAMPLES_DEFAULT | 2211 MII_VCT5_CTRL_SAMPLE_POINT | 2212 MII_VCT5_CTRL_PEEK_HYST_DEFAULT; 2213 err = __phy_write(phydev, MII_VCT5_CTRL, reg); 2214 if (err) 2215 return err; 2216 2217 err = marvell_vct5_wait_complete(phydev); 2218 if (err) 2219 return err; 2220 2221 for (i = 0; i < 4; i++) { 2222 if (pair != PHY_PAIR_ALL && i != pair) 2223 continue; 2224 2225 mV = marvell_vct5_amplitude(phydev, i); 2226 ethnl_cable_test_amplitude(phydev, i, mV); 2227 } 2228 2229 return 0; 2230 } 2231 2232 static int marvell_vct5_amplitude_graph(struct phy_device *phydev) 2233 { 2234 struct marvell_priv *priv = phydev->priv; 2235 int distance; 2236 u16 width; 2237 int page; 2238 int err; 2239 u16 reg; 2240 2241 if (priv->first <= TDR_SHORT_CABLE_LENGTH) 2242 width = MII_VCT5_TX_PULSE_CTRL_PULSE_WIDTH_32nS; 2243 else 2244 width = MII_VCT5_TX_PULSE_CTRL_PULSE_WIDTH_128nS; 2245 2246 reg = MII_VCT5_TX_PULSE_CTRL_GT_140m_46_86mV | 2247 MII_VCT5_TX_PULSE_CTRL_DONT_WAIT_LINK_DOWN | 2248 MII_VCT5_TX_PULSE_CTRL_MAX_AMP | width; 2249 2250 err = phy_write_paged(phydev, MII_MARVELL_VCT5_PAGE, 2251 MII_VCT5_TX_PULSE_CTRL, reg); 2252 if (err) 2253 return err; 2254 2255 /* Reading the TDR data is very MDIO heavy. We need to optimize 2256 * access to keep the time to a minimum. So lock the bus once, 2257 * and don't release it until complete. We can then avoid having 2258 * to change the page for every access, greatly speeding things 2259 * up. 2260 */ 2261 page = phy_select_page(phydev, MII_MARVELL_VCT5_PAGE); 2262 if (page < 0) 2263 goto restore_page; 2264 2265 for (distance = priv->first; 2266 distance <= priv->last; 2267 distance += priv->step) { 2268 err = marvell_vct5_amplitude_distance(phydev, distance, 2269 priv->pair); 2270 if (err) 2271 goto restore_page; 2272 2273 if (distance > TDR_SHORT_CABLE_LENGTH && 2274 width == MII_VCT5_TX_PULSE_CTRL_PULSE_WIDTH_32nS) { 2275 width = MII_VCT5_TX_PULSE_CTRL_PULSE_WIDTH_128nS; 2276 reg = MII_VCT5_TX_PULSE_CTRL_GT_140m_46_86mV | 2277 MII_VCT5_TX_PULSE_CTRL_DONT_WAIT_LINK_DOWN | 2278 MII_VCT5_TX_PULSE_CTRL_MAX_AMP | width; 2279 err = __phy_write(phydev, MII_VCT5_TX_PULSE_CTRL, reg); 2280 if (err) 2281 goto restore_page; 2282 } 2283 } 2284 2285 restore_page: 2286 return phy_restore_page(phydev, page, err); 2287 } 2288 2289 static int marvell_cable_test_start_common(struct phy_device *phydev) 2290 { 2291 int bmcr, bmsr, ret; 2292 2293 /* If auto-negotiation is enabled, but not complete, the cable 2294 * test never completes. So disable auto-neg. 2295 */ 2296 bmcr = phy_read(phydev, MII_BMCR); 2297 if (bmcr < 0) 2298 return bmcr; 2299 2300 bmsr = phy_read(phydev, MII_BMSR); 2301 2302 if (bmsr < 0) 2303 return bmsr; 2304 2305 if (bmcr & BMCR_ANENABLE) { 2306 ret = phy_clear_bits(phydev, MII_BMCR, BMCR_ANENABLE); 2307 if (ret < 0) 2308 return ret; 2309 ret = genphy_soft_reset(phydev); 2310 if (ret < 0) 2311 return ret; 2312 } 2313 2314 /* If the link is up, allow it some time to go down */ 2315 if (bmsr & BMSR_LSTATUS) 2316 msleep(1500); 2317 2318 return 0; 2319 } 2320 2321 static int marvell_vct7_cable_test_start(struct phy_device *phydev) 2322 { 2323 struct marvell_priv *priv = phydev->priv; 2324 int ret; 2325 2326 ret = marvell_cable_test_start_common(phydev); 2327 if (ret) 2328 return ret; 2329 2330 priv->cable_test_tdr = false; 2331 2332 /* Reset the VCT5 API control to defaults, otherwise 2333 * VCT7 does not work correctly. 2334 */ 2335 ret = phy_write_paged(phydev, MII_MARVELL_VCT5_PAGE, 2336 MII_VCT5_CTRL, 2337 MII_VCT5_CTRL_TX_SAME_CHANNEL | 2338 MII_VCT5_CTRL_SAMPLES_DEFAULT | 2339 MII_VCT5_CTRL_MODE_MAXIMUM_PEEK | 2340 MII_VCT5_CTRL_PEEK_HYST_DEFAULT); 2341 if (ret) 2342 return ret; 2343 2344 ret = phy_write_paged(phydev, MII_MARVELL_VCT5_PAGE, 2345 MII_VCT5_SAMPLE_POINT_DISTANCE, 0); 2346 if (ret) 2347 return ret; 2348 2349 return phy_write_paged(phydev, MII_MARVELL_VCT7_PAGE, 2350 MII_VCT7_CTRL, 2351 MII_VCT7_CTRL_RUN_NOW | 2352 MII_VCT7_CTRL_CENTIMETERS); 2353 } 2354 2355 static int marvell_vct5_cable_test_tdr_start(struct phy_device *phydev, 2356 const struct phy_tdr_config *cfg) 2357 { 2358 struct marvell_priv *priv = phydev->priv; 2359 int ret; 2360 2361 priv->cable_test_tdr = true; 2362 priv->first = marvell_vct5_cm2distance(cfg->first); 2363 priv->last = marvell_vct5_cm2distance(cfg->last); 2364 priv->step = marvell_vct5_cm2distance(cfg->step); 2365 priv->pair = cfg->pair; 2366 2367 if (priv->first > MII_VCT5_SAMPLE_POINT_DISTANCE_MAX) 2368 return -EINVAL; 2369 2370 if (priv->last > MII_VCT5_SAMPLE_POINT_DISTANCE_MAX) 2371 return -EINVAL; 2372 2373 /* Disable VCT7 */ 2374 ret = phy_write_paged(phydev, MII_MARVELL_VCT7_PAGE, 2375 MII_VCT7_CTRL, 0); 2376 if (ret) 2377 return ret; 2378 2379 ret = marvell_cable_test_start_common(phydev); 2380 if (ret) 2381 return ret; 2382 2383 ret = ethnl_cable_test_pulse(phydev, 1000); 2384 if (ret) 2385 return ret; 2386 2387 return ethnl_cable_test_step(phydev, 2388 marvell_vct5_distance2cm(priv->first), 2389 marvell_vct5_distance2cm(priv->last), 2390 marvell_vct5_distance2cm(priv->step)); 2391 } 2392 2393 static int marvell_vct7_distance_to_length(int distance, bool meter) 2394 { 2395 if (meter) 2396 distance *= 100; 2397 2398 return distance; 2399 } 2400 2401 static bool marvell_vct7_distance_valid(int result) 2402 { 2403 switch (result) { 2404 case MII_VCT7_RESULTS_OPEN: 2405 case MII_VCT7_RESULTS_SAME_SHORT: 2406 case MII_VCT7_RESULTS_CROSS_SHORT: 2407 return true; 2408 } 2409 return false; 2410 } 2411 2412 static int marvell_vct7_report_length(struct phy_device *phydev, 2413 int pair, bool meter) 2414 { 2415 int length; 2416 int ret; 2417 2418 ret = phy_read_paged(phydev, MII_MARVELL_VCT7_PAGE, 2419 MII_VCT7_PAIR_0_DISTANCE + pair); 2420 if (ret < 0) 2421 return ret; 2422 2423 length = marvell_vct7_distance_to_length(ret, meter); 2424 2425 ethnl_cable_test_fault_length(phydev, pair, length); 2426 2427 return 0; 2428 } 2429 2430 static int marvell_vct7_cable_test_report_trans(int result) 2431 { 2432 switch (result) { 2433 case MII_VCT7_RESULTS_OK: 2434 return ETHTOOL_A_CABLE_RESULT_CODE_OK; 2435 case MII_VCT7_RESULTS_OPEN: 2436 return ETHTOOL_A_CABLE_RESULT_CODE_OPEN; 2437 case MII_VCT7_RESULTS_SAME_SHORT: 2438 return ETHTOOL_A_CABLE_RESULT_CODE_SAME_SHORT; 2439 case MII_VCT7_RESULTS_CROSS_SHORT: 2440 return ETHTOOL_A_CABLE_RESULT_CODE_CROSS_SHORT; 2441 default: 2442 return ETHTOOL_A_CABLE_RESULT_CODE_UNSPEC; 2443 } 2444 } 2445 2446 static int marvell_vct7_cable_test_report(struct phy_device *phydev) 2447 { 2448 int pair0, pair1, pair2, pair3; 2449 bool meter; 2450 int ret; 2451 2452 ret = phy_read_paged(phydev, MII_MARVELL_VCT7_PAGE, 2453 MII_VCT7_RESULTS); 2454 if (ret < 0) 2455 return ret; 2456 2457 pair3 = (ret & MII_VCT7_RESULTS_PAIR3_MASK) >> 2458 MII_VCT7_RESULTS_PAIR3_SHIFT; 2459 pair2 = (ret & MII_VCT7_RESULTS_PAIR2_MASK) >> 2460 MII_VCT7_RESULTS_PAIR2_SHIFT; 2461 pair1 = (ret & MII_VCT7_RESULTS_PAIR1_MASK) >> 2462 MII_VCT7_RESULTS_PAIR1_SHIFT; 2463 pair0 = (ret & MII_VCT7_RESULTS_PAIR0_MASK) >> 2464 MII_VCT7_RESULTS_PAIR0_SHIFT; 2465 2466 ethnl_cable_test_result(phydev, ETHTOOL_A_CABLE_PAIR_A, 2467 marvell_vct7_cable_test_report_trans(pair0)); 2468 ethnl_cable_test_result(phydev, ETHTOOL_A_CABLE_PAIR_B, 2469 marvell_vct7_cable_test_report_trans(pair1)); 2470 ethnl_cable_test_result(phydev, ETHTOOL_A_CABLE_PAIR_C, 2471 marvell_vct7_cable_test_report_trans(pair2)); 2472 ethnl_cable_test_result(phydev, ETHTOOL_A_CABLE_PAIR_D, 2473 marvell_vct7_cable_test_report_trans(pair3)); 2474 2475 ret = phy_read_paged(phydev, MII_MARVELL_VCT7_PAGE, MII_VCT7_CTRL); 2476 if (ret < 0) 2477 return ret; 2478 2479 meter = ret & MII_VCT7_CTRL_METERS; 2480 2481 if (marvell_vct7_distance_valid(pair0)) 2482 marvell_vct7_report_length(phydev, 0, meter); 2483 if (marvell_vct7_distance_valid(pair1)) 2484 marvell_vct7_report_length(phydev, 1, meter); 2485 if (marvell_vct7_distance_valid(pair2)) 2486 marvell_vct7_report_length(phydev, 2, meter); 2487 if (marvell_vct7_distance_valid(pair3)) 2488 marvell_vct7_report_length(phydev, 3, meter); 2489 2490 return 0; 2491 } 2492 2493 static int marvell_vct7_cable_test_get_status(struct phy_device *phydev, 2494 bool *finished) 2495 { 2496 struct marvell_priv *priv = phydev->priv; 2497 int ret; 2498 2499 if (priv->cable_test_tdr) { 2500 ret = marvell_vct5_amplitude_graph(phydev); 2501 *finished = true; 2502 return ret; 2503 } 2504 2505 *finished = false; 2506 2507 ret = phy_read_paged(phydev, MII_MARVELL_VCT7_PAGE, 2508 MII_VCT7_CTRL); 2509 2510 if (ret < 0) 2511 return ret; 2512 2513 if (!(ret & MII_VCT7_CTRL_IN_PROGRESS)) { 2514 *finished = true; 2515 2516 return marvell_vct7_cable_test_report(phydev); 2517 } 2518 2519 return 0; 2520 } 2521 2522 static int m88e3082_vct_cable_test_start(struct phy_device *phydev) 2523 { 2524 struct marvell_priv *priv = phydev->priv; 2525 int ret; 2526 2527 /* It needs some magic workarounds described in VCT manual for this PHY. 2528 */ 2529 ret = phy_write(phydev, 29, 0x0003); 2530 if (ret < 0) 2531 return ret; 2532 2533 ret = phy_write(phydev, 30, 0x6440); 2534 if (ret < 0) 2535 return ret; 2536 2537 if (priv->vct_phase == M88E3082_VCT_PHASE1) { 2538 ret = phy_write(phydev, 29, 0x000a); 2539 if (ret < 0) 2540 return ret; 2541 2542 ret = phy_write(phydev, 30, 0x0002); 2543 if (ret < 0) 2544 return ret; 2545 } 2546 2547 ret = phy_write(phydev, MII_BMCR, 2548 BMCR_RESET | BMCR_SPEED100 | BMCR_FULLDPLX); 2549 if (ret < 0) 2550 return ret; 2551 2552 ret = phy_write(phydev, MII_VCT_TXPINS, MII_VCT_TXPINS_ENVCT); 2553 if (ret < 0) 2554 return ret; 2555 2556 ret = phy_write(phydev, 29, 0x0003); 2557 if (ret < 0) 2558 return ret; 2559 2560 ret = phy_write(phydev, 30, 0x0); 2561 if (ret < 0) 2562 return ret; 2563 2564 if (priv->vct_phase == M88E3082_VCT_OFF) { 2565 priv->vct_phase = M88E3082_VCT_PHASE1; 2566 priv->pair = 0; 2567 2568 return 0; 2569 } 2570 2571 ret = phy_write(phydev, 29, 0x000a); 2572 if (ret < 0) 2573 return ret; 2574 2575 ret = phy_write(phydev, 30, 0x0); 2576 if (ret < 0) 2577 return ret; 2578 2579 priv->vct_phase = M88E3082_VCT_PHASE2; 2580 2581 return 0; 2582 } 2583 2584 static int m88e3082_vct_cable_test_report_trans(int result, u8 distance) 2585 { 2586 switch (result) { 2587 case MII_VCT_TXRXPINS_VCTTST_OK: 2588 if (distance == MII_VCT_TXRXPINS_DISTRFLN_MAX) 2589 return ETHTOOL_A_CABLE_RESULT_CODE_OK; 2590 return ETHTOOL_A_CABLE_RESULT_CODE_IMPEDANCE_MISMATCH; 2591 case MII_VCT_TXRXPINS_VCTTST_SHORT: 2592 return ETHTOOL_A_CABLE_RESULT_CODE_SAME_SHORT; 2593 case MII_VCT_TXRXPINS_VCTTST_OPEN: 2594 return ETHTOOL_A_CABLE_RESULT_CODE_OPEN; 2595 default: 2596 return ETHTOOL_A_CABLE_RESULT_CODE_UNSPEC; 2597 } 2598 } 2599 2600 static u32 m88e3082_vct_distrfln_2_cm(u8 distrfln) 2601 { 2602 if (distrfln < 24) 2603 return 0; 2604 2605 /* Original function for meters: y = 0.7861x - 18.862 */ 2606 return (7861 * distrfln - 188620) / 100; 2607 } 2608 2609 static int m88e3082_vct_cable_test_get_status(struct phy_device *phydev, 2610 bool *finished) 2611 { 2612 u8 tx_vcttst_res, rx_vcttst_res, tx_distrfln, rx_distrfln; 2613 struct marvell_priv *priv = phydev->priv; 2614 int ret, tx_result, rx_result; 2615 bool done_phase = true; 2616 2617 *finished = false; 2618 2619 ret = phy_read(phydev, MII_VCT_TXPINS); 2620 if (ret < 0) 2621 return ret; 2622 else if (ret & MII_VCT_TXPINS_ENVCT) 2623 return 0; 2624 2625 tx_distrfln = ret & MII_VCT_TXRXPINS_DISTRFLN; 2626 tx_vcttst_res = (ret & MII_VCT_TXRXPINS_VCTTST) >> 2627 MII_VCT_TXRXPINS_VCTTST_SHIFT; 2628 2629 ret = phy_read(phydev, MII_VCT_RXPINS); 2630 if (ret < 0) 2631 return ret; 2632 2633 rx_distrfln = ret & MII_VCT_TXRXPINS_DISTRFLN; 2634 rx_vcttst_res = (ret & MII_VCT_TXRXPINS_VCTTST) >> 2635 MII_VCT_TXRXPINS_VCTTST_SHIFT; 2636 2637 *finished = true; 2638 2639 switch (priv->vct_phase) { 2640 case M88E3082_VCT_PHASE1: 2641 tx_result = m88e3082_vct_cable_test_report_trans(tx_vcttst_res, 2642 tx_distrfln); 2643 rx_result = m88e3082_vct_cable_test_report_trans(rx_vcttst_res, 2644 rx_distrfln); 2645 2646 ethnl_cable_test_result(phydev, ETHTOOL_A_CABLE_PAIR_A, 2647 tx_result); 2648 ethnl_cable_test_result(phydev, ETHTOOL_A_CABLE_PAIR_B, 2649 rx_result); 2650 2651 if (tx_vcttst_res == MII_VCT_TXRXPINS_VCTTST_OPEN) { 2652 done_phase = false; 2653 priv->pair |= M88E3082_PAIR_A; 2654 } else if (tx_distrfln < MII_VCT_TXRXPINS_DISTRFLN_MAX) { 2655 u8 pair = ETHTOOL_A_CABLE_PAIR_A; 2656 u32 cm = m88e3082_vct_distrfln_2_cm(tx_distrfln); 2657 2658 ethnl_cable_test_fault_length(phydev, pair, cm); 2659 } 2660 2661 if (rx_vcttst_res == MII_VCT_TXRXPINS_VCTTST_OPEN) { 2662 done_phase = false; 2663 priv->pair |= M88E3082_PAIR_B; 2664 } else if (rx_distrfln < MII_VCT_TXRXPINS_DISTRFLN_MAX) { 2665 u8 pair = ETHTOOL_A_CABLE_PAIR_B; 2666 u32 cm = m88e3082_vct_distrfln_2_cm(rx_distrfln); 2667 2668 ethnl_cable_test_fault_length(phydev, pair, cm); 2669 } 2670 2671 break; 2672 case M88E3082_VCT_PHASE2: 2673 if (priv->pair & M88E3082_PAIR_A && 2674 tx_vcttst_res == MII_VCT_TXRXPINS_VCTTST_OPEN && 2675 tx_distrfln < MII_VCT_TXRXPINS_DISTRFLN_MAX) { 2676 u8 pair = ETHTOOL_A_CABLE_PAIR_A; 2677 u32 cm = m88e3082_vct_distrfln_2_cm(tx_distrfln); 2678 2679 ethnl_cable_test_fault_length(phydev, pair, cm); 2680 } 2681 if (priv->pair & M88E3082_PAIR_B && 2682 rx_vcttst_res == MII_VCT_TXRXPINS_VCTTST_OPEN && 2683 rx_distrfln < MII_VCT_TXRXPINS_DISTRFLN_MAX) { 2684 u8 pair = ETHTOOL_A_CABLE_PAIR_B; 2685 u32 cm = m88e3082_vct_distrfln_2_cm(rx_distrfln); 2686 2687 ethnl_cable_test_fault_length(phydev, pair, cm); 2688 } 2689 2690 break; 2691 default: 2692 return -EINVAL; 2693 } 2694 2695 if (!done_phase) { 2696 *finished = false; 2697 return m88e3082_vct_cable_test_start(phydev); 2698 } 2699 if (*finished) 2700 priv->vct_phase = M88E3082_VCT_OFF; 2701 return 0; 2702 } 2703 2704 static int m88e1111_vct_cable_test_start(struct phy_device *phydev) 2705 { 2706 int ret; 2707 2708 ret = marvell_cable_test_start_common(phydev); 2709 if (ret) 2710 return ret; 2711 2712 /* It needs some magic workarounds described in VCT manual for this PHY. 2713 */ 2714 ret = phy_write(phydev, 29, 0x0018); 2715 if (ret < 0) 2716 return ret; 2717 2718 ret = phy_write(phydev, 30, 0x00c2); 2719 if (ret < 0) 2720 return ret; 2721 2722 ret = phy_write(phydev, 30, 0x00ca); 2723 if (ret < 0) 2724 return ret; 2725 2726 ret = phy_write(phydev, 30, 0x00c2); 2727 if (ret < 0) 2728 return ret; 2729 2730 ret = phy_write_paged(phydev, MII_MARVELL_COPPER_PAGE, MII_VCT_SR, 2731 MII_VCT_TXPINS_ENVCT); 2732 if (ret < 0) 2733 return ret; 2734 2735 ret = phy_write(phydev, 29, 0x0018); 2736 if (ret < 0) 2737 return ret; 2738 2739 ret = phy_write(phydev, 30, 0x0042); 2740 if (ret < 0) 2741 return ret; 2742 2743 return 0; 2744 } 2745 2746 static u32 m88e1111_vct_distrfln_2_cm(u8 distrfln) 2747 { 2748 if (distrfln < 36) 2749 return 0; 2750 2751 /* Original function for meters: y = 0.8018x - 28.751 */ 2752 return (8018 * distrfln - 287510) / 100; 2753 } 2754 2755 static int m88e1111_vct_cable_test_get_status(struct phy_device *phydev, 2756 bool *finished) 2757 { 2758 u8 vcttst_res, distrfln; 2759 int ret, result; 2760 2761 *finished = false; 2762 2763 /* Each pair use one page: A-0, B-1, C-2, D-3 */ 2764 for (u8 i = 0; i < 4; i++) { 2765 ret = phy_read_paged(phydev, i, MII_VCT_SR); 2766 if (ret < 0) 2767 return ret; 2768 else if (i == 0 && ret & MII_VCT_TXPINS_ENVCT) 2769 return 0; 2770 2771 distrfln = ret & MII_VCT_TXRXPINS_DISTRFLN; 2772 vcttst_res = (ret & MII_VCT_TXRXPINS_VCTTST) >> 2773 MII_VCT_TXRXPINS_VCTTST_SHIFT; 2774 2775 result = m88e3082_vct_cable_test_report_trans(vcttst_res, 2776 distrfln); 2777 ethnl_cable_test_result(phydev, i, result); 2778 2779 if (distrfln < MII_VCT_TXRXPINS_DISTRFLN_MAX) { 2780 u32 cm = m88e1111_vct_distrfln_2_cm(distrfln); 2781 2782 ethnl_cable_test_fault_length(phydev, i, cm); 2783 } 2784 } 2785 2786 *finished = true; 2787 return 0; 2788 } 2789 2790 #ifdef CONFIG_HWMON 2791 struct marvell_hwmon_ops { 2792 int (*config)(struct phy_device *phydev); 2793 int (*get_temp)(struct phy_device *phydev, long *temp); 2794 int (*get_temp_critical)(struct phy_device *phydev, long *temp); 2795 int (*set_temp_critical)(struct phy_device *phydev, long temp); 2796 int (*get_temp_alarm)(struct phy_device *phydev, long *alarm); 2797 }; 2798 2799 static const struct marvell_hwmon_ops * 2800 to_marvell_hwmon_ops(const struct phy_device *phydev) 2801 { 2802 return phydev->drv->driver_data; 2803 } 2804 2805 static int m88e1121_get_temp(struct phy_device *phydev, long *temp) 2806 { 2807 int oldpage; 2808 int ret = 0; 2809 int val; 2810 2811 *temp = 0; 2812 2813 oldpage = phy_select_page(phydev, MII_MARVELL_MISC_TEST_PAGE); 2814 if (oldpage < 0) 2815 goto error; 2816 2817 /* Enable temperature sensor */ 2818 ret = __phy_read(phydev, MII_88E1121_MISC_TEST); 2819 if (ret < 0) 2820 goto error; 2821 2822 ret = __phy_write(phydev, MII_88E1121_MISC_TEST, 2823 ret | MII_88E1121_MISC_TEST_TEMP_SENSOR_EN); 2824 if (ret < 0) 2825 goto error; 2826 2827 /* Wait for temperature to stabilize */ 2828 usleep_range(10000, 12000); 2829 2830 val = __phy_read(phydev, MII_88E1121_MISC_TEST); 2831 if (val < 0) { 2832 ret = val; 2833 goto error; 2834 } 2835 2836 /* Disable temperature sensor */ 2837 ret = __phy_write(phydev, MII_88E1121_MISC_TEST, 2838 ret & ~MII_88E1121_MISC_TEST_TEMP_SENSOR_EN); 2839 if (ret < 0) 2840 goto error; 2841 2842 *temp = ((val & MII_88E1121_MISC_TEST_TEMP_MASK) - 5) * 5000; 2843 2844 error: 2845 return phy_restore_page(phydev, oldpage, ret); 2846 } 2847 2848 static int m88e1510_get_temp(struct phy_device *phydev, long *temp) 2849 { 2850 int ret; 2851 2852 *temp = 0; 2853 2854 ret = phy_read_paged(phydev, MII_MARVELL_MISC_TEST_PAGE, 2855 MII_88E1510_TEMP_SENSOR); 2856 if (ret < 0) 2857 return ret; 2858 2859 *temp = ((ret & MII_88E1510_TEMP_SENSOR_MASK) - 25) * 1000; 2860 2861 return 0; 2862 } 2863 2864 static int m88e1510_get_temp_critical(struct phy_device *phydev, long *temp) 2865 { 2866 int ret; 2867 2868 *temp = 0; 2869 2870 ret = phy_read_paged(phydev, MII_MARVELL_MISC_TEST_PAGE, 2871 MII_88E1121_MISC_TEST); 2872 if (ret < 0) 2873 return ret; 2874 2875 *temp = (((ret & MII_88E1510_MISC_TEST_TEMP_THRESHOLD_MASK) >> 2876 MII_88E1510_MISC_TEST_TEMP_THRESHOLD_SHIFT) * 5) - 25; 2877 /* convert to mC */ 2878 *temp *= 1000; 2879 2880 return 0; 2881 } 2882 2883 static int m88e1510_set_temp_critical(struct phy_device *phydev, long temp) 2884 { 2885 temp = temp / 1000; 2886 temp = clamp_val(DIV_ROUND_CLOSEST(temp, 5) + 5, 0, 0x1f); 2887 2888 return phy_modify_paged(phydev, MII_MARVELL_MISC_TEST_PAGE, 2889 MII_88E1121_MISC_TEST, 2890 MII_88E1510_MISC_TEST_TEMP_THRESHOLD_MASK, 2891 temp << MII_88E1510_MISC_TEST_TEMP_THRESHOLD_SHIFT); 2892 } 2893 2894 static int m88e1510_get_temp_alarm(struct phy_device *phydev, long *alarm) 2895 { 2896 int ret; 2897 2898 *alarm = false; 2899 2900 ret = phy_read_paged(phydev, MII_MARVELL_MISC_TEST_PAGE, 2901 MII_88E1121_MISC_TEST); 2902 if (ret < 0) 2903 return ret; 2904 2905 *alarm = !!(ret & MII_88E1510_MISC_TEST_TEMP_IRQ); 2906 2907 return 0; 2908 } 2909 2910 static int m88e6390_get_temp(struct phy_device *phydev, long *temp) 2911 { 2912 int sum = 0; 2913 int oldpage; 2914 int ret = 0; 2915 int i; 2916 2917 *temp = 0; 2918 2919 oldpage = phy_select_page(phydev, MII_MARVELL_MISC_TEST_PAGE); 2920 if (oldpage < 0) 2921 goto error; 2922 2923 /* Enable temperature sensor */ 2924 ret = __phy_read(phydev, MII_88E6390_MISC_TEST); 2925 if (ret < 0) 2926 goto error; 2927 2928 ret &= ~MII_88E6390_MISC_TEST_TEMP_SENSOR_MASK; 2929 ret |= MII_88E6390_MISC_TEST_TEMP_SENSOR_ENABLE_SAMPLE_1S; 2930 2931 ret = __phy_write(phydev, MII_88E6390_MISC_TEST, ret); 2932 if (ret < 0) 2933 goto error; 2934 2935 /* Wait for temperature to stabilize */ 2936 usleep_range(10000, 12000); 2937 2938 /* Reading the temperature sense has an errata. You need to read 2939 * a number of times and take an average. 2940 */ 2941 for (i = 0; i < MII_88E6390_TEMP_SENSOR_SAMPLES; i++) { 2942 ret = __phy_read(phydev, MII_88E6390_TEMP_SENSOR); 2943 if (ret < 0) 2944 goto error; 2945 sum += ret & MII_88E6390_TEMP_SENSOR_MASK; 2946 } 2947 2948 sum /= MII_88E6390_TEMP_SENSOR_SAMPLES; 2949 *temp = (sum - 75) * 1000; 2950 2951 /* Disable temperature sensor */ 2952 ret = __phy_read(phydev, MII_88E6390_MISC_TEST); 2953 if (ret < 0) 2954 goto error; 2955 2956 ret = ret & ~MII_88E6390_MISC_TEST_TEMP_SENSOR_MASK; 2957 ret |= MII_88E6390_MISC_TEST_TEMP_SENSOR_DISABLE; 2958 2959 ret = __phy_write(phydev, MII_88E6390_MISC_TEST, ret); 2960 2961 error: 2962 phy_restore_page(phydev, oldpage, ret); 2963 2964 return ret; 2965 } 2966 2967 static int m88e6393_get_temp(struct phy_device *phydev, long *temp) 2968 { 2969 int err; 2970 2971 err = m88e1510_get_temp(phydev, temp); 2972 2973 /* 88E1510 measures T + 25, while the PHY on 88E6393X switch 2974 * T + 75, so we have to subtract another 50 2975 */ 2976 *temp -= 50000; 2977 2978 return err; 2979 } 2980 2981 static int m88e6393_get_temp_critical(struct phy_device *phydev, long *temp) 2982 { 2983 int ret; 2984 2985 *temp = 0; 2986 2987 ret = phy_read_paged(phydev, MII_MARVELL_MISC_TEST_PAGE, 2988 MII_88E6390_TEMP_SENSOR); 2989 if (ret < 0) 2990 return ret; 2991 2992 *temp = (((ret & MII_88E6393_TEMP_SENSOR_THRESHOLD_MASK) >> 2993 MII_88E6393_TEMP_SENSOR_THRESHOLD_SHIFT) - 75) * 1000; 2994 2995 return 0; 2996 } 2997 2998 static int m88e6393_set_temp_critical(struct phy_device *phydev, long temp) 2999 { 3000 temp = (temp / 1000) + 75; 3001 3002 return phy_modify_paged(phydev, MII_MARVELL_MISC_TEST_PAGE, 3003 MII_88E6390_TEMP_SENSOR, 3004 MII_88E6393_TEMP_SENSOR_THRESHOLD_MASK, 3005 temp << MII_88E6393_TEMP_SENSOR_THRESHOLD_SHIFT); 3006 } 3007 3008 static int m88e6393_hwmon_config(struct phy_device *phydev) 3009 { 3010 int err; 3011 3012 err = m88e6393_set_temp_critical(phydev, 100000); 3013 if (err) 3014 return err; 3015 3016 return phy_modify_paged(phydev, MII_MARVELL_MISC_TEST_PAGE, 3017 MII_88E6390_MISC_TEST, 3018 MII_88E6390_MISC_TEST_TEMP_SENSOR_MASK | 3019 MII_88E6393_MISC_TEST_SAMPLES_MASK | 3020 MII_88E6393_MISC_TEST_RATE_MASK, 3021 MII_88E6390_MISC_TEST_TEMP_SENSOR_ENABLE | 3022 MII_88E6393_MISC_TEST_SAMPLES_2048 | 3023 MII_88E6393_MISC_TEST_RATE_2_3MS); 3024 } 3025 3026 static int marvell_hwmon_read(struct device *dev, enum hwmon_sensor_types type, 3027 u32 attr, int channel, long *temp) 3028 { 3029 struct phy_device *phydev = dev_get_drvdata(dev); 3030 const struct marvell_hwmon_ops *ops = to_marvell_hwmon_ops(phydev); 3031 int err = -EOPNOTSUPP; 3032 3033 switch (attr) { 3034 case hwmon_temp_input: 3035 if (ops->get_temp) 3036 err = ops->get_temp(phydev, temp); 3037 break; 3038 case hwmon_temp_crit: 3039 if (ops->get_temp_critical) 3040 err = ops->get_temp_critical(phydev, temp); 3041 break; 3042 case hwmon_temp_max_alarm: 3043 if (ops->get_temp_alarm) 3044 err = ops->get_temp_alarm(phydev, temp); 3045 break; 3046 } 3047 3048 return err; 3049 } 3050 3051 static int marvell_hwmon_write(struct device *dev, enum hwmon_sensor_types type, 3052 u32 attr, int channel, long temp) 3053 { 3054 struct phy_device *phydev = dev_get_drvdata(dev); 3055 const struct marvell_hwmon_ops *ops = to_marvell_hwmon_ops(phydev); 3056 int err = -EOPNOTSUPP; 3057 3058 switch (attr) { 3059 case hwmon_temp_crit: 3060 if (ops->set_temp_critical) 3061 err = ops->set_temp_critical(phydev, temp); 3062 break; 3063 } 3064 3065 return err; 3066 } 3067 3068 static umode_t marvell_hwmon_is_visible(const void *data, 3069 enum hwmon_sensor_types type, 3070 u32 attr, int channel) 3071 { 3072 const struct phy_device *phydev = data; 3073 const struct marvell_hwmon_ops *ops = to_marvell_hwmon_ops(phydev); 3074 3075 if (type != hwmon_temp) 3076 return 0; 3077 3078 switch (attr) { 3079 case hwmon_temp_input: 3080 return ops->get_temp ? 0444 : 0; 3081 case hwmon_temp_max_alarm: 3082 return ops->get_temp_alarm ? 0444 : 0; 3083 case hwmon_temp_crit: 3084 return (ops->get_temp_critical ? 0444 : 0) | 3085 (ops->set_temp_critical ? 0200 : 0); 3086 default: 3087 return 0; 3088 } 3089 } 3090 3091 static u32 marvell_hwmon_chip_config[] = { 3092 HWMON_C_REGISTER_TZ, 3093 0 3094 }; 3095 3096 static const struct hwmon_channel_info marvell_hwmon_chip = { 3097 .type = hwmon_chip, 3098 .config = marvell_hwmon_chip_config, 3099 }; 3100 3101 /* we can define HWMON_T_CRIT and HWMON_T_MAX_ALARM even though these are not 3102 * defined for all PHYs, because the hwmon code checks whether the attributes 3103 * exists via the .is_visible method 3104 */ 3105 static u32 marvell_hwmon_temp_config[] = { 3106 HWMON_T_INPUT | HWMON_T_CRIT | HWMON_T_MAX_ALARM, 3107 0 3108 }; 3109 3110 static const struct hwmon_channel_info marvell_hwmon_temp = { 3111 .type = hwmon_temp, 3112 .config = marvell_hwmon_temp_config, 3113 }; 3114 3115 static const struct hwmon_channel_info * const marvell_hwmon_info[] = { 3116 &marvell_hwmon_chip, 3117 &marvell_hwmon_temp, 3118 NULL 3119 }; 3120 3121 static const struct hwmon_ops marvell_hwmon_hwmon_ops = { 3122 .is_visible = marvell_hwmon_is_visible, 3123 .read = marvell_hwmon_read, 3124 .write = marvell_hwmon_write, 3125 }; 3126 3127 static const struct hwmon_chip_info marvell_hwmon_chip_info = { 3128 .ops = &marvell_hwmon_hwmon_ops, 3129 .info = marvell_hwmon_info, 3130 }; 3131 3132 static int marvell_hwmon_name(struct phy_device *phydev) 3133 { 3134 struct marvell_priv *priv = phydev->priv; 3135 struct device *dev = &phydev->mdio.dev; 3136 const char *devname = dev_name(dev); 3137 size_t len = strlen(devname); 3138 int i, j; 3139 3140 priv->hwmon_name = devm_kzalloc(dev, len, GFP_KERNEL); 3141 if (!priv->hwmon_name) 3142 return -ENOMEM; 3143 3144 for (i = j = 0; i < len && devname[i]; i++) { 3145 if (isalnum(devname[i])) 3146 priv->hwmon_name[j++] = devname[i]; 3147 } 3148 3149 return 0; 3150 } 3151 3152 static int marvell_hwmon_probe(struct phy_device *phydev) 3153 { 3154 const struct marvell_hwmon_ops *ops = to_marvell_hwmon_ops(phydev); 3155 struct marvell_priv *priv = phydev->priv; 3156 struct device *dev = &phydev->mdio.dev; 3157 int err; 3158 3159 if (!ops) 3160 return 0; 3161 3162 err = marvell_hwmon_name(phydev); 3163 if (err) 3164 return err; 3165 3166 priv->hwmon_dev = devm_hwmon_device_register_with_info( 3167 dev, priv->hwmon_name, phydev, &marvell_hwmon_chip_info, NULL); 3168 if (IS_ERR(priv->hwmon_dev)) 3169 return PTR_ERR(priv->hwmon_dev); 3170 3171 if (ops->config) 3172 err = ops->config(phydev); 3173 3174 return err; 3175 } 3176 3177 static const struct marvell_hwmon_ops m88e1121_hwmon_ops = { 3178 .get_temp = m88e1121_get_temp, 3179 }; 3180 3181 static const struct marvell_hwmon_ops m88e1510_hwmon_ops = { 3182 .get_temp = m88e1510_get_temp, 3183 .get_temp_critical = m88e1510_get_temp_critical, 3184 .set_temp_critical = m88e1510_set_temp_critical, 3185 .get_temp_alarm = m88e1510_get_temp_alarm, 3186 }; 3187 3188 static const struct marvell_hwmon_ops m88e6390_hwmon_ops = { 3189 .get_temp = m88e6390_get_temp, 3190 }; 3191 3192 static const struct marvell_hwmon_ops m88e6393_hwmon_ops = { 3193 .config = m88e6393_hwmon_config, 3194 .get_temp = m88e6393_get_temp, 3195 .get_temp_critical = m88e6393_get_temp_critical, 3196 .set_temp_critical = m88e6393_set_temp_critical, 3197 .get_temp_alarm = m88e1510_get_temp_alarm, 3198 }; 3199 3200 #define DEF_MARVELL_HWMON_OPS(s) (&(s)) 3201 3202 #else 3203 3204 #define DEF_MARVELL_HWMON_OPS(s) NULL 3205 3206 static int marvell_hwmon_probe(struct phy_device *phydev) 3207 { 3208 return 0; 3209 } 3210 #endif 3211 3212 static int m88e1318_led_brightness_set(struct phy_device *phydev, 3213 u8 index, enum led_brightness value) 3214 { 3215 int reg; 3216 3217 reg = phy_read_paged(phydev, MII_MARVELL_LED_PAGE, 3218 MII_88E1318S_PHY_LED_FUNC); 3219 if (reg < 0) 3220 return reg; 3221 3222 switch (index) { 3223 case 0: 3224 case 1: 3225 case 2: 3226 reg &= ~(0xf << (4 * index)); 3227 if (value == LED_OFF) 3228 reg |= MII_88E1318S_PHY_LED_FUNC_OFF << (4 * index); 3229 else 3230 reg |= MII_88E1318S_PHY_LED_FUNC_ON << (4 * index); 3231 break; 3232 default: 3233 return -EINVAL; 3234 } 3235 3236 return phy_write_paged(phydev, MII_MARVELL_LED_PAGE, 3237 MII_88E1318S_PHY_LED_FUNC, reg); 3238 } 3239 3240 static int m88e1318_led_blink_set(struct phy_device *phydev, u8 index, 3241 unsigned long *delay_on, 3242 unsigned long *delay_off) 3243 { 3244 int reg; 3245 3246 reg = phy_read_paged(phydev, MII_MARVELL_LED_PAGE, 3247 MII_88E1318S_PHY_LED_FUNC); 3248 if (reg < 0) 3249 return reg; 3250 3251 switch (index) { 3252 case 0: 3253 case 1: 3254 case 2: 3255 reg &= ~(0xf << (4 * index)); 3256 reg |= MII_88E1318S_PHY_LED_FUNC_BLINK << (4 * index); 3257 /* Reset default is 84ms */ 3258 *delay_on = 84 / 2; 3259 *delay_off = 84 / 2; 3260 break; 3261 default: 3262 return -EINVAL; 3263 } 3264 3265 return phy_write_paged(phydev, MII_MARVELL_LED_PAGE, 3266 MII_88E1318S_PHY_LED_FUNC, reg); 3267 } 3268 3269 struct marvell_led_rules { 3270 int mode; 3271 unsigned long rules; 3272 }; 3273 3274 static const struct marvell_led_rules marvell_led0[] = { 3275 { 3276 .mode = 0, 3277 .rules = BIT(TRIGGER_NETDEV_LINK), 3278 }, 3279 { 3280 .mode = 1, 3281 .rules = (BIT(TRIGGER_NETDEV_LINK) | 3282 BIT(TRIGGER_NETDEV_RX) | 3283 BIT(TRIGGER_NETDEV_TX)), 3284 }, 3285 { 3286 .mode = 3, 3287 .rules = (BIT(TRIGGER_NETDEV_RX) | 3288 BIT(TRIGGER_NETDEV_TX)), 3289 }, 3290 { 3291 .mode = 4, 3292 .rules = (BIT(TRIGGER_NETDEV_RX) | 3293 BIT(TRIGGER_NETDEV_TX)), 3294 }, 3295 { 3296 .mode = 5, 3297 .rules = BIT(TRIGGER_NETDEV_TX), 3298 }, 3299 { 3300 .mode = 6, 3301 .rules = BIT(TRIGGER_NETDEV_LINK), 3302 }, 3303 { 3304 .mode = 7, 3305 .rules = BIT(TRIGGER_NETDEV_LINK_1000), 3306 }, 3307 { 3308 .mode = 8, 3309 .rules = 0, 3310 }, 3311 }; 3312 3313 static const struct marvell_led_rules marvell_led1[] = { 3314 { 3315 .mode = 1, 3316 .rules = (BIT(TRIGGER_NETDEV_LINK) | 3317 BIT(TRIGGER_NETDEV_RX) | 3318 BIT(TRIGGER_NETDEV_TX)), 3319 }, 3320 { 3321 .mode = 2, 3322 .rules = (BIT(TRIGGER_NETDEV_LINK) | 3323 BIT(TRIGGER_NETDEV_RX)), 3324 }, 3325 { 3326 .mode = 3, 3327 .rules = (BIT(TRIGGER_NETDEV_RX) | 3328 BIT(TRIGGER_NETDEV_TX)), 3329 }, 3330 { 3331 .mode = 4, 3332 .rules = (BIT(TRIGGER_NETDEV_RX) | 3333 BIT(TRIGGER_NETDEV_TX)), 3334 }, 3335 { 3336 .mode = 6, 3337 .rules = (BIT(TRIGGER_NETDEV_LINK_100) | 3338 BIT(TRIGGER_NETDEV_LINK_1000)), 3339 }, 3340 { 3341 .mode = 7, 3342 .rules = BIT(TRIGGER_NETDEV_LINK_100), 3343 }, 3344 { 3345 .mode = 8, 3346 .rules = 0, 3347 }, 3348 }; 3349 3350 static const struct marvell_led_rules marvell_led2[] = { 3351 { 3352 .mode = 0, 3353 .rules = BIT(TRIGGER_NETDEV_LINK), 3354 }, 3355 { 3356 .mode = 1, 3357 .rules = (BIT(TRIGGER_NETDEV_LINK) | 3358 BIT(TRIGGER_NETDEV_RX) | 3359 BIT(TRIGGER_NETDEV_TX)), 3360 }, 3361 { 3362 .mode = 3, 3363 .rules = (BIT(TRIGGER_NETDEV_RX) | 3364 BIT(TRIGGER_NETDEV_TX)), 3365 }, 3366 { 3367 .mode = 4, 3368 .rules = (BIT(TRIGGER_NETDEV_RX) | 3369 BIT(TRIGGER_NETDEV_TX)), 3370 }, 3371 { 3372 .mode = 5, 3373 .rules = BIT(TRIGGER_NETDEV_TX), 3374 }, 3375 { 3376 .mode = 6, 3377 .rules = (BIT(TRIGGER_NETDEV_LINK_10) | 3378 BIT(TRIGGER_NETDEV_LINK_1000)), 3379 }, 3380 { 3381 .mode = 7, 3382 .rules = BIT(TRIGGER_NETDEV_LINK_10), 3383 }, 3384 { 3385 .mode = 8, 3386 .rules = 0, 3387 }, 3388 }; 3389 3390 static int marvell_find_led_mode(unsigned long rules, 3391 const struct marvell_led_rules *marvell_rules, 3392 int count, 3393 int *mode) 3394 { 3395 int i; 3396 3397 for (i = 0; i < count; i++) { 3398 if (marvell_rules[i].rules == rules) { 3399 *mode = marvell_rules[i].mode; 3400 return 0; 3401 } 3402 } 3403 return -EOPNOTSUPP; 3404 } 3405 3406 static int marvell_get_led_mode(u8 index, unsigned long rules, int *mode) 3407 { 3408 int ret; 3409 3410 switch (index) { 3411 case 0: 3412 ret = marvell_find_led_mode(rules, marvell_led0, 3413 ARRAY_SIZE(marvell_led0), mode); 3414 break; 3415 case 1: 3416 ret = marvell_find_led_mode(rules, marvell_led1, 3417 ARRAY_SIZE(marvell_led1), mode); 3418 break; 3419 case 2: 3420 ret = marvell_find_led_mode(rules, marvell_led2, 3421 ARRAY_SIZE(marvell_led2), mode); 3422 break; 3423 default: 3424 ret = -EINVAL; 3425 } 3426 3427 return ret; 3428 } 3429 3430 static int marvell_find_led_rules(unsigned long *rules, 3431 const struct marvell_led_rules *marvell_rules, 3432 int count, 3433 int mode) 3434 { 3435 int i; 3436 3437 for (i = 0; i < count; i++) { 3438 if (marvell_rules[i].mode == mode) { 3439 *rules = marvell_rules[i].rules; 3440 return 0; 3441 } 3442 } 3443 return -EOPNOTSUPP; 3444 } 3445 3446 static int marvell_get_led_rules(u8 index, unsigned long *rules, int mode) 3447 { 3448 int ret; 3449 3450 switch (index) { 3451 case 0: 3452 ret = marvell_find_led_rules(rules, marvell_led0, 3453 ARRAY_SIZE(marvell_led0), mode); 3454 break; 3455 case 1: 3456 ret = marvell_find_led_rules(rules, marvell_led1, 3457 ARRAY_SIZE(marvell_led1), mode); 3458 break; 3459 case 2: 3460 ret = marvell_find_led_rules(rules, marvell_led2, 3461 ARRAY_SIZE(marvell_led2), mode); 3462 break; 3463 default: 3464 ret = -EOPNOTSUPP; 3465 } 3466 3467 return ret; 3468 } 3469 3470 static int m88e1318_led_hw_is_supported(struct phy_device *phydev, u8 index, 3471 unsigned long rules) 3472 { 3473 int mode, ret; 3474 3475 switch (index) { 3476 case 0: 3477 case 1: 3478 case 2: 3479 ret = marvell_get_led_mode(index, rules, &mode); 3480 break; 3481 default: 3482 ret = -EINVAL; 3483 } 3484 3485 return ret; 3486 } 3487 3488 static int m88e1318_led_hw_control_set(struct phy_device *phydev, u8 index, 3489 unsigned long rules) 3490 { 3491 int mode, ret, reg; 3492 3493 switch (index) { 3494 case 0: 3495 case 1: 3496 case 2: 3497 ret = marvell_get_led_mode(index, rules, &mode); 3498 break; 3499 default: 3500 ret = -EINVAL; 3501 } 3502 3503 if (ret < 0) 3504 return ret; 3505 3506 reg = phy_read_paged(phydev, MII_MARVELL_LED_PAGE, 3507 MII_88E1318S_PHY_LED_FUNC); 3508 if (reg < 0) 3509 return reg; 3510 3511 reg &= ~(0xf << (4 * index)); 3512 reg |= mode << (4 * index); 3513 return phy_write_paged(phydev, MII_MARVELL_LED_PAGE, 3514 MII_88E1318S_PHY_LED_FUNC, reg); 3515 } 3516 3517 static int m88e1318_led_hw_control_get(struct phy_device *phydev, u8 index, 3518 unsigned long *rules) 3519 { 3520 int mode, reg; 3521 3522 if (index > 2) 3523 return -EINVAL; 3524 3525 reg = phy_read_paged(phydev, MII_MARVELL_LED_PAGE, 3526 MII_88E1318S_PHY_LED_FUNC); 3527 if (reg < 0) 3528 return reg; 3529 3530 mode = (reg >> (4 * index)) & 0xf; 3531 3532 return marvell_get_led_rules(index, rules, mode); 3533 } 3534 3535 static int marvell_probe(struct phy_device *phydev) 3536 { 3537 struct marvell_priv *priv; 3538 3539 priv = devm_kzalloc(&phydev->mdio.dev, sizeof(*priv), GFP_KERNEL); 3540 if (!priv) 3541 return -ENOMEM; 3542 3543 phydev->priv = priv; 3544 3545 return marvell_hwmon_probe(phydev); 3546 } 3547 3548 static int m88e1510_sfp_insert(void *upstream, const struct sfp_eeprom_id *id) 3549 { 3550 DECLARE_PHY_INTERFACE_MASK(interfaces); 3551 struct phy_device *phydev = upstream; 3552 phy_interface_t interface; 3553 struct device *dev; 3554 int oldpage; 3555 int ret = 0; 3556 u16 mode; 3557 3558 __ETHTOOL_DECLARE_LINK_MODE_MASK(supported) = { 0, }; 3559 3560 dev = &phydev->mdio.dev; 3561 3562 sfp_parse_support(phydev->sfp_bus, id, supported, interfaces); 3563 interface = sfp_select_interface(phydev->sfp_bus, supported); 3564 3565 dev_info(dev, "%s SFP module inserted\n", phy_modes(interface)); 3566 3567 switch (interface) { 3568 case PHY_INTERFACE_MODE_1000BASEX: 3569 mode = MII_88E1510_GEN_CTRL_REG_1_MODE_RGMII_1000X; 3570 3571 break; 3572 case PHY_INTERFACE_MODE_100BASEX: 3573 mode = MII_88E1510_GEN_CTRL_REG_1_MODE_RGMII_100FX; 3574 3575 break; 3576 case PHY_INTERFACE_MODE_SGMII: 3577 mode = MII_88E1510_GEN_CTRL_REG_1_MODE_RGMII_SGMII; 3578 3579 break; 3580 default: 3581 dev_err(dev, "Incompatible SFP module inserted\n"); 3582 3583 return -EINVAL; 3584 } 3585 3586 oldpage = phy_select_page(phydev, MII_MARVELL_MODE_PAGE); 3587 if (oldpage < 0) 3588 goto error; 3589 3590 ret = __phy_modify(phydev, MII_88E1510_GEN_CTRL_REG_1, 3591 MII_88E1510_GEN_CTRL_REG_1_MODE_MASK, mode); 3592 if (ret < 0) 3593 goto error; 3594 3595 ret = __phy_set_bits(phydev, MII_88E1510_GEN_CTRL_REG_1, 3596 MII_88E1510_GEN_CTRL_REG_1_RESET); 3597 3598 error: 3599 return phy_restore_page(phydev, oldpage, ret); 3600 } 3601 3602 static void m88e1510_sfp_remove(void *upstream) 3603 { 3604 struct phy_device *phydev = upstream; 3605 int oldpage; 3606 int ret = 0; 3607 3608 oldpage = phy_select_page(phydev, MII_MARVELL_MODE_PAGE); 3609 if (oldpage < 0) 3610 goto error; 3611 3612 ret = __phy_modify(phydev, MII_88E1510_GEN_CTRL_REG_1, 3613 MII_88E1510_GEN_CTRL_REG_1_MODE_MASK, 3614 MII_88E1510_GEN_CTRL_REG_1_MODE_RGMII); 3615 if (ret < 0) 3616 goto error; 3617 3618 ret = __phy_set_bits(phydev, MII_88E1510_GEN_CTRL_REG_1, 3619 MII_88E1510_GEN_CTRL_REG_1_RESET); 3620 3621 error: 3622 phy_restore_page(phydev, oldpage, ret); 3623 } 3624 3625 static const struct sfp_upstream_ops m88e1510_sfp_ops = { 3626 .module_insert = m88e1510_sfp_insert, 3627 .module_remove = m88e1510_sfp_remove, 3628 .attach = phy_sfp_attach, 3629 .detach = phy_sfp_detach, 3630 .connect_phy = phy_sfp_connect_phy, 3631 .disconnect_phy = phy_sfp_disconnect_phy, 3632 }; 3633 3634 static int m88e1510_probe(struct phy_device *phydev) 3635 { 3636 int err; 3637 3638 err = marvell_probe(phydev); 3639 if (err) 3640 return err; 3641 3642 return phy_sfp_probe(phydev, &m88e1510_sfp_ops); 3643 } 3644 3645 static struct phy_driver marvell_drivers[] = { 3646 { 3647 .phy_id = MARVELL_PHY_ID_88E1101, 3648 .phy_id_mask = MARVELL_PHY_ID_MASK, 3649 .name = "Marvell 88E1101", 3650 /* PHY_GBIT_FEATURES */ 3651 .probe = marvell_probe, 3652 .config_init = marvell_config_init, 3653 .config_aneg = m88e1101_config_aneg, 3654 .config_intr = marvell_config_intr, 3655 .handle_interrupt = marvell_handle_interrupt, 3656 .resume = genphy_resume, 3657 .suspend = genphy_suspend, 3658 .read_page = marvell_read_page, 3659 .write_page = marvell_write_page, 3660 .get_sset_count = marvell_get_sset_count, 3661 .get_strings = marvell_get_strings, 3662 .get_stats = marvell_get_stats, 3663 }, 3664 { 3665 .phy_id = MARVELL_PHY_ID_88E3082, 3666 .phy_id_mask = MARVELL_PHY_ID_MASK, 3667 .name = "Marvell 88E308X/88E609X Family", 3668 /* PHY_BASIC_FEATURES */ 3669 .probe = marvell_probe, 3670 .config_init = marvell_config_init, 3671 .aneg_done = marvell_aneg_done, 3672 .read_status = marvell_read_status, 3673 .resume = genphy_resume, 3674 .suspend = genphy_suspend, 3675 .cable_test_start = m88e3082_vct_cable_test_start, 3676 .cable_test_get_status = m88e3082_vct_cable_test_get_status, 3677 }, 3678 { 3679 .phy_id = MARVELL_PHY_ID_88E1112, 3680 .phy_id_mask = MARVELL_PHY_ID_MASK, 3681 .name = "Marvell 88E1112", 3682 /* PHY_GBIT_FEATURES */ 3683 .probe = marvell_probe, 3684 .config_init = m88e1112_config_init, 3685 .config_aneg = marvell_config_aneg, 3686 .config_intr = marvell_config_intr, 3687 .handle_interrupt = marvell_handle_interrupt, 3688 .resume = genphy_resume, 3689 .suspend = genphy_suspend, 3690 .read_page = marvell_read_page, 3691 .write_page = marvell_write_page, 3692 .get_sset_count = marvell_get_sset_count, 3693 .get_strings = marvell_get_strings, 3694 .get_stats = marvell_get_stats, 3695 .get_tunable = m88e1011_get_tunable, 3696 .set_tunable = m88e1011_set_tunable, 3697 }, 3698 { 3699 .phy_id = MARVELL_PHY_ID_88E1111, 3700 .phy_id_mask = MARVELL_PHY_ID_MASK, 3701 .name = "Marvell 88E1111", 3702 /* PHY_GBIT_FEATURES */ 3703 .flags = PHY_POLL_CABLE_TEST, 3704 .probe = marvell_probe, 3705 .config_init = m88e1111gbe_config_init, 3706 .config_aneg = m88e1111_config_aneg, 3707 .read_status = marvell_read_status, 3708 .config_intr = marvell_config_intr, 3709 .handle_interrupt = marvell_handle_interrupt, 3710 .resume = genphy_resume, 3711 .suspend = genphy_suspend, 3712 .read_page = marvell_read_page, 3713 .write_page = marvell_write_page, 3714 .get_sset_count = marvell_get_sset_count, 3715 .get_strings = marvell_get_strings, 3716 .get_stats = marvell_get_stats, 3717 .get_tunable = m88e1111_get_tunable, 3718 .set_tunable = m88e1111_set_tunable, 3719 .cable_test_start = m88e1111_vct_cable_test_start, 3720 .cable_test_get_status = m88e1111_vct_cable_test_get_status, 3721 }, 3722 { 3723 .phy_id = MARVELL_PHY_ID_88E1111_FINISAR, 3724 .phy_id_mask = MARVELL_PHY_ID_MASK, 3725 .name = "Marvell 88E1111 (Finisar)", 3726 /* PHY_GBIT_FEATURES */ 3727 .probe = marvell_probe, 3728 .config_init = m88e1111gbe_config_init, 3729 .config_aneg = m88e1111_config_aneg, 3730 .read_status = marvell_read_status, 3731 .config_intr = marvell_config_intr, 3732 .handle_interrupt = marvell_handle_interrupt, 3733 .resume = genphy_resume, 3734 .suspend = genphy_suspend, 3735 .read_page = marvell_read_page, 3736 .write_page = marvell_write_page, 3737 .get_sset_count = marvell_get_sset_count, 3738 .get_strings = marvell_get_strings, 3739 .get_stats = marvell_get_stats, 3740 .get_tunable = m88e1111_get_tunable, 3741 .set_tunable = m88e1111_set_tunable, 3742 }, 3743 { 3744 .phy_id = MARVELL_PHY_ID_88E1118, 3745 .phy_id_mask = MARVELL_PHY_ID_MASK, 3746 .name = "Marvell 88E1118", 3747 /* PHY_GBIT_FEATURES */ 3748 .probe = marvell_probe, 3749 .config_init = m88e1118_config_init, 3750 .config_aneg = m88e1118_config_aneg, 3751 .config_intr = marvell_config_intr, 3752 .handle_interrupt = marvell_handle_interrupt, 3753 .resume = genphy_resume, 3754 .suspend = genphy_suspend, 3755 .read_page = marvell_read_page, 3756 .write_page = marvell_write_page, 3757 .get_sset_count = marvell_get_sset_count, 3758 .get_strings = marvell_get_strings, 3759 .get_stats = marvell_get_stats, 3760 }, 3761 { 3762 .phy_id = MARVELL_PHY_ID_88E1121R, 3763 .phy_id_mask = MARVELL_PHY_ID_MASK, 3764 .name = "Marvell 88E1121R", 3765 .driver_data = DEF_MARVELL_HWMON_OPS(m88e1121_hwmon_ops), 3766 /* PHY_GBIT_FEATURES */ 3767 .probe = marvell_probe, 3768 .config_init = marvell_1011gbe_config_init, 3769 .config_aneg = m88e1121_config_aneg, 3770 .read_status = marvell_read_status, 3771 .config_intr = marvell_config_intr, 3772 .handle_interrupt = marvell_handle_interrupt, 3773 .resume = genphy_resume, 3774 .suspend = genphy_suspend, 3775 .read_page = marvell_read_page, 3776 .write_page = marvell_write_page, 3777 .get_sset_count = marvell_get_sset_count, 3778 .get_strings = marvell_get_strings, 3779 .get_stats = marvell_get_stats, 3780 .get_tunable = m88e1011_get_tunable, 3781 .set_tunable = m88e1011_set_tunable, 3782 }, 3783 { 3784 .phy_id = MARVELL_PHY_ID_88E1318S, 3785 .phy_id_mask = MARVELL_PHY_ID_MASK, 3786 .name = "Marvell 88E1318S", 3787 /* PHY_GBIT_FEATURES */ 3788 .probe = marvell_probe, 3789 .config_init = m88e1318_config_init, 3790 .config_aneg = m88e1318_config_aneg, 3791 .read_status = marvell_read_status, 3792 .config_intr = marvell_config_intr, 3793 .handle_interrupt = marvell_handle_interrupt, 3794 .get_wol = m88e1318_get_wol, 3795 .set_wol = m88e1318_set_wol, 3796 .resume = genphy_resume, 3797 .suspend = genphy_suspend, 3798 .read_page = marvell_read_page, 3799 .write_page = marvell_write_page, 3800 .get_sset_count = marvell_get_sset_count, 3801 .get_strings = marvell_get_strings, 3802 .get_stats = marvell_get_stats, 3803 .led_brightness_set = m88e1318_led_brightness_set, 3804 .led_blink_set = m88e1318_led_blink_set, 3805 .led_hw_is_supported = m88e1318_led_hw_is_supported, 3806 .led_hw_control_set = m88e1318_led_hw_control_set, 3807 .led_hw_control_get = m88e1318_led_hw_control_get, 3808 }, 3809 { 3810 .phy_id = MARVELL_PHY_ID_88E1145, 3811 .phy_id_mask = MARVELL_PHY_ID_MASK, 3812 .name = "Marvell 88E1145", 3813 /* PHY_GBIT_FEATURES */ 3814 .flags = PHY_POLL_CABLE_TEST, 3815 .probe = marvell_probe, 3816 .config_init = m88e1145_config_init, 3817 .config_aneg = m88e1101_config_aneg, 3818 .config_intr = marvell_config_intr, 3819 .handle_interrupt = marvell_handle_interrupt, 3820 .resume = genphy_resume, 3821 .suspend = genphy_suspend, 3822 .read_page = marvell_read_page, 3823 .write_page = marvell_write_page, 3824 .get_sset_count = marvell_get_sset_count, 3825 .get_strings = marvell_get_strings, 3826 .get_stats = marvell_get_stats, 3827 .get_tunable = m88e1111_get_tunable, 3828 .set_tunable = m88e1111_set_tunable, 3829 .cable_test_start = m88e1111_vct_cable_test_start, 3830 .cable_test_get_status = m88e1111_vct_cable_test_get_status, 3831 }, 3832 { 3833 .phy_id = MARVELL_PHY_ID_88E1149R, 3834 .phy_id_mask = MARVELL_PHY_ID_MASK, 3835 .name = "Marvell 88E1149R", 3836 /* PHY_GBIT_FEATURES */ 3837 .probe = marvell_probe, 3838 .config_init = m88e1149_config_init, 3839 .config_aneg = m88e1118_config_aneg, 3840 .config_intr = marvell_config_intr, 3841 .handle_interrupt = marvell_handle_interrupt, 3842 .resume = genphy_resume, 3843 .suspend = genphy_suspend, 3844 .read_page = marvell_read_page, 3845 .write_page = marvell_write_page, 3846 .get_sset_count = marvell_get_sset_count, 3847 .get_strings = marvell_get_strings, 3848 .get_stats = marvell_get_stats, 3849 }, 3850 { 3851 .phy_id = MARVELL_PHY_ID_88E1240, 3852 .phy_id_mask = MARVELL_PHY_ID_MASK, 3853 .name = "Marvell 88E1240", 3854 /* PHY_GBIT_FEATURES */ 3855 .probe = marvell_probe, 3856 .config_init = m88e1112_config_init, 3857 .config_aneg = marvell_config_aneg, 3858 .config_intr = marvell_config_intr, 3859 .handle_interrupt = marvell_handle_interrupt, 3860 .resume = genphy_resume, 3861 .suspend = genphy_suspend, 3862 .read_page = marvell_read_page, 3863 .write_page = marvell_write_page, 3864 .get_sset_count = marvell_get_sset_count, 3865 .get_strings = marvell_get_strings, 3866 .get_stats = marvell_get_stats, 3867 .get_tunable = m88e1011_get_tunable, 3868 .set_tunable = m88e1011_set_tunable, 3869 }, 3870 { 3871 .phy_id = MARVELL_PHY_ID_88E1116R, 3872 .phy_id_mask = MARVELL_PHY_ID_MASK, 3873 .name = "Marvell 88E1116R", 3874 /* PHY_GBIT_FEATURES */ 3875 .probe = marvell_probe, 3876 .config_init = m88e1116r_config_init, 3877 .config_intr = marvell_config_intr, 3878 .handle_interrupt = marvell_handle_interrupt, 3879 .resume = genphy_resume, 3880 .suspend = genphy_suspend, 3881 .read_page = marvell_read_page, 3882 .write_page = marvell_write_page, 3883 .get_sset_count = marvell_get_sset_count, 3884 .get_strings = marvell_get_strings, 3885 .get_stats = marvell_get_stats, 3886 .get_tunable = m88e1011_get_tunable, 3887 .set_tunable = m88e1011_set_tunable, 3888 }, 3889 { 3890 .phy_id = MARVELL_PHY_ID_88E1510, 3891 .phy_id_mask = MARVELL_PHY_ID_MASK, 3892 .name = "Marvell 88E1510", 3893 .driver_data = DEF_MARVELL_HWMON_OPS(m88e1510_hwmon_ops), 3894 .features = PHY_GBIT_FIBRE_FEATURES, 3895 .flags = PHY_POLL_CABLE_TEST, 3896 .probe = m88e1510_probe, 3897 .config_init = m88e1510_config_init, 3898 .config_aneg = m88e1510_config_aneg, 3899 .read_status = marvell_read_status, 3900 .config_intr = marvell_config_intr, 3901 .handle_interrupt = marvell_handle_interrupt, 3902 .get_wol = m88e1318_get_wol, 3903 .set_wol = m88e1318_set_wol, 3904 .resume = marvell_resume, 3905 .suspend = marvell_suspend, 3906 .read_page = marvell_read_page, 3907 .write_page = marvell_write_page, 3908 .get_sset_count = marvell_get_sset_count, 3909 .get_strings = marvell_get_strings, 3910 .get_stats = marvell_get_stats, 3911 .set_loopback = m88e1510_loopback, 3912 .get_tunable = m88e1011_get_tunable, 3913 .set_tunable = m88e1011_set_tunable, 3914 .cable_test_start = marvell_vct7_cable_test_start, 3915 .cable_test_tdr_start = marvell_vct5_cable_test_tdr_start, 3916 .cable_test_get_status = marvell_vct7_cable_test_get_status, 3917 .led_brightness_set = m88e1318_led_brightness_set, 3918 .led_blink_set = m88e1318_led_blink_set, 3919 .led_hw_is_supported = m88e1318_led_hw_is_supported, 3920 .led_hw_control_set = m88e1318_led_hw_control_set, 3921 .led_hw_control_get = m88e1318_led_hw_control_get, 3922 }, 3923 { 3924 .phy_id = MARVELL_PHY_ID_88E1540, 3925 .phy_id_mask = MARVELL_PHY_ID_MASK, 3926 .name = "Marvell 88E1540", 3927 .driver_data = DEF_MARVELL_HWMON_OPS(m88e1510_hwmon_ops), 3928 /* PHY_GBIT_FEATURES */ 3929 .flags = PHY_POLL_CABLE_TEST, 3930 .probe = marvell_probe, 3931 .config_init = marvell_1011gbe_config_init, 3932 .config_aneg = m88e1510_config_aneg, 3933 .read_status = marvell_read_status, 3934 .config_intr = marvell_config_intr, 3935 .handle_interrupt = marvell_handle_interrupt, 3936 .resume = genphy_resume, 3937 .suspend = genphy_suspend, 3938 .read_page = marvell_read_page, 3939 .write_page = marvell_write_page, 3940 .get_sset_count = marvell_get_sset_count, 3941 .get_strings = marvell_get_strings, 3942 .get_stats = marvell_get_stats, 3943 .get_tunable = m88e1540_get_tunable, 3944 .set_tunable = m88e1540_set_tunable, 3945 .cable_test_start = marvell_vct7_cable_test_start, 3946 .cable_test_tdr_start = marvell_vct5_cable_test_tdr_start, 3947 .cable_test_get_status = marvell_vct7_cable_test_get_status, 3948 .led_brightness_set = m88e1318_led_brightness_set, 3949 .led_blink_set = m88e1318_led_blink_set, 3950 .led_hw_is_supported = m88e1318_led_hw_is_supported, 3951 .led_hw_control_set = m88e1318_led_hw_control_set, 3952 .led_hw_control_get = m88e1318_led_hw_control_get, 3953 }, 3954 { 3955 .phy_id = MARVELL_PHY_ID_88E1545, 3956 .phy_id_mask = MARVELL_PHY_ID_MASK, 3957 .name = "Marvell 88E1545", 3958 .driver_data = DEF_MARVELL_HWMON_OPS(m88e1510_hwmon_ops), 3959 .probe = marvell_probe, 3960 /* PHY_GBIT_FEATURES */ 3961 .flags = PHY_POLL_CABLE_TEST, 3962 .config_init = marvell_1011gbe_config_init, 3963 .config_aneg = m88e1510_config_aneg, 3964 .read_status = marvell_read_status, 3965 .config_intr = marvell_config_intr, 3966 .handle_interrupt = marvell_handle_interrupt, 3967 .resume = genphy_resume, 3968 .suspend = genphy_suspend, 3969 .read_page = marvell_read_page, 3970 .write_page = marvell_write_page, 3971 .get_sset_count = marvell_get_sset_count, 3972 .get_strings = marvell_get_strings, 3973 .get_stats = marvell_get_stats, 3974 .get_tunable = m88e1540_get_tunable, 3975 .set_tunable = m88e1540_set_tunable, 3976 .cable_test_start = marvell_vct7_cable_test_start, 3977 .cable_test_tdr_start = marvell_vct5_cable_test_tdr_start, 3978 .cable_test_get_status = marvell_vct7_cable_test_get_status, 3979 .led_brightness_set = m88e1318_led_brightness_set, 3980 .led_blink_set = m88e1318_led_blink_set, 3981 .led_hw_is_supported = m88e1318_led_hw_is_supported, 3982 .led_hw_control_set = m88e1318_led_hw_control_set, 3983 .led_hw_control_get = m88e1318_led_hw_control_get, 3984 }, 3985 { 3986 .phy_id = MARVELL_PHY_ID_88E3016, 3987 .phy_id_mask = MARVELL_PHY_ID_MASK, 3988 .name = "Marvell 88E3016", 3989 /* PHY_BASIC_FEATURES */ 3990 .probe = marvell_probe, 3991 .config_init = m88e3016_config_init, 3992 .aneg_done = marvell_aneg_done, 3993 .read_status = marvell_read_status, 3994 .config_intr = marvell_config_intr, 3995 .handle_interrupt = marvell_handle_interrupt, 3996 .resume = genphy_resume, 3997 .suspend = genphy_suspend, 3998 .read_page = marvell_read_page, 3999 .write_page = marvell_write_page, 4000 .get_sset_count = marvell_get_sset_count, 4001 .get_strings = marvell_get_strings, 4002 .get_stats = marvell_get_stats, 4003 }, 4004 { 4005 .phy_id = MARVELL_PHY_ID_88E6250_FAMILY, 4006 .phy_id_mask = MARVELL_PHY_ID_MASK, 4007 .name = "Marvell 88E6250 Family", 4008 /* PHY_BASIC_FEATURES */ 4009 .probe = marvell_probe, 4010 .aneg_done = marvell_aneg_done, 4011 .config_intr = marvell_config_intr, 4012 .handle_interrupt = marvell_handle_interrupt, 4013 .resume = genphy_resume, 4014 .suspend = genphy_suspend, 4015 .get_sset_count = marvell_get_sset_count_simple, 4016 .get_strings = marvell_get_strings_simple, 4017 .get_stats = marvell_get_stats_simple, 4018 }, 4019 { 4020 .phy_id = MARVELL_PHY_ID_88E6341_FAMILY, 4021 .phy_id_mask = MARVELL_PHY_ID_MASK, 4022 .name = "Marvell 88E6341 Family", 4023 .driver_data = DEF_MARVELL_HWMON_OPS(m88e1510_hwmon_ops), 4024 /* PHY_GBIT_FEATURES */ 4025 .flags = PHY_POLL_CABLE_TEST, 4026 .probe = marvell_probe, 4027 .config_init = marvell_1011gbe_config_init, 4028 .config_aneg = m88e6390_config_aneg, 4029 .read_status = marvell_read_status, 4030 .config_intr = marvell_config_intr, 4031 .handle_interrupt = marvell_handle_interrupt, 4032 .resume = genphy_resume, 4033 .suspend = genphy_suspend, 4034 .read_page = marvell_read_page, 4035 .write_page = marvell_write_page, 4036 .get_sset_count = marvell_get_sset_count, 4037 .get_strings = marvell_get_strings, 4038 .get_stats = marvell_get_stats, 4039 .get_tunable = m88e1540_get_tunable, 4040 .set_tunable = m88e1540_set_tunable, 4041 .cable_test_start = marvell_vct7_cable_test_start, 4042 .cable_test_tdr_start = marvell_vct5_cable_test_tdr_start, 4043 .cable_test_get_status = marvell_vct7_cable_test_get_status, 4044 }, 4045 { 4046 .phy_id = MARVELL_PHY_ID_88E6390_FAMILY, 4047 .phy_id_mask = MARVELL_PHY_ID_MASK, 4048 .name = "Marvell 88E6390 Family", 4049 .driver_data = DEF_MARVELL_HWMON_OPS(m88e6390_hwmon_ops), 4050 /* PHY_GBIT_FEATURES */ 4051 .flags = PHY_POLL_CABLE_TEST, 4052 .probe = marvell_probe, 4053 .config_init = marvell_1011gbe_config_init, 4054 .config_aneg = m88e6390_config_aneg, 4055 .read_status = marvell_read_status, 4056 .config_intr = marvell_config_intr, 4057 .handle_interrupt = marvell_handle_interrupt, 4058 .resume = genphy_resume, 4059 .suspend = genphy_suspend, 4060 .read_page = marvell_read_page, 4061 .write_page = marvell_write_page, 4062 .get_sset_count = marvell_get_sset_count, 4063 .get_strings = marvell_get_strings, 4064 .get_stats = marvell_get_stats, 4065 .get_tunable = m88e1540_get_tunable, 4066 .set_tunable = m88e1540_set_tunable, 4067 .cable_test_start = marvell_vct7_cable_test_start, 4068 .cable_test_tdr_start = marvell_vct5_cable_test_tdr_start, 4069 .cable_test_get_status = marvell_vct7_cable_test_get_status, 4070 }, 4071 { 4072 .phy_id = MARVELL_PHY_ID_88E6393_FAMILY, 4073 .phy_id_mask = MARVELL_PHY_ID_MASK, 4074 .name = "Marvell 88E6393 Family", 4075 .driver_data = DEF_MARVELL_HWMON_OPS(m88e6393_hwmon_ops), 4076 /* PHY_GBIT_FEATURES */ 4077 .flags = PHY_POLL_CABLE_TEST, 4078 .probe = marvell_probe, 4079 .config_init = marvell_1011gbe_config_init, 4080 .config_aneg = m88e1510_config_aneg, 4081 .read_status = marvell_read_status, 4082 .config_intr = marvell_config_intr, 4083 .handle_interrupt = marvell_handle_interrupt, 4084 .resume = genphy_resume, 4085 .suspend = genphy_suspend, 4086 .read_page = marvell_read_page, 4087 .write_page = marvell_write_page, 4088 .get_sset_count = marvell_get_sset_count, 4089 .get_strings = marvell_get_strings, 4090 .get_stats = marvell_get_stats, 4091 .get_tunable = m88e1540_get_tunable, 4092 .set_tunable = m88e1540_set_tunable, 4093 .cable_test_start = marvell_vct7_cable_test_start, 4094 .cable_test_tdr_start = marvell_vct5_cable_test_tdr_start, 4095 .cable_test_get_status = marvell_vct7_cable_test_get_status, 4096 }, 4097 { 4098 .phy_id = MARVELL_PHY_ID_88E1340S, 4099 .phy_id_mask = MARVELL_PHY_ID_MASK, 4100 .name = "Marvell 88E1340S", 4101 .driver_data = DEF_MARVELL_HWMON_OPS(m88e1510_hwmon_ops), 4102 .probe = marvell_probe, 4103 /* PHY_GBIT_FEATURES */ 4104 .config_init = marvell_1011gbe_config_init, 4105 .config_aneg = m88e1510_config_aneg, 4106 .read_status = marvell_read_status, 4107 .config_intr = marvell_config_intr, 4108 .handle_interrupt = marvell_handle_interrupt, 4109 .resume = genphy_resume, 4110 .suspend = genphy_suspend, 4111 .read_page = marvell_read_page, 4112 .write_page = marvell_write_page, 4113 .get_sset_count = marvell_get_sset_count, 4114 .get_strings = marvell_get_strings, 4115 .get_stats = marvell_get_stats, 4116 .get_tunable = m88e1540_get_tunable, 4117 .set_tunable = m88e1540_set_tunable, 4118 }, 4119 { 4120 .phy_id = MARVELL_PHY_ID_88E1548P, 4121 .phy_id_mask = MARVELL_PHY_ID_MASK, 4122 .name = "Marvell 88E1548P", 4123 .driver_data = DEF_MARVELL_HWMON_OPS(m88e1510_hwmon_ops), 4124 .probe = marvell_probe, 4125 .features = PHY_GBIT_FIBRE_FEATURES, 4126 .config_init = marvell_1011gbe_config_init, 4127 .config_aneg = m88e1510_config_aneg, 4128 .read_status = marvell_read_status, 4129 .config_intr = marvell_config_intr, 4130 .handle_interrupt = marvell_handle_interrupt, 4131 .resume = genphy_resume, 4132 .suspend = genphy_suspend, 4133 .read_page = marvell_read_page, 4134 .write_page = marvell_write_page, 4135 .get_sset_count = marvell_get_sset_count, 4136 .get_strings = marvell_get_strings, 4137 .get_stats = marvell_get_stats, 4138 .get_tunable = m88e1540_get_tunable, 4139 .set_tunable = m88e1540_set_tunable, 4140 .led_brightness_set = m88e1318_led_brightness_set, 4141 .led_blink_set = m88e1318_led_blink_set, 4142 .led_hw_is_supported = m88e1318_led_hw_is_supported, 4143 .led_hw_control_set = m88e1318_led_hw_control_set, 4144 .led_hw_control_get = m88e1318_led_hw_control_get, 4145 }, 4146 }; 4147 4148 module_phy_driver(marvell_drivers); 4149 4150 static struct mdio_device_id __maybe_unused marvell_tbl[] = { 4151 { MARVELL_PHY_ID_88E1101, MARVELL_PHY_ID_MASK }, 4152 { MARVELL_PHY_ID_88E3082, MARVELL_PHY_ID_MASK }, 4153 { MARVELL_PHY_ID_88E1112, MARVELL_PHY_ID_MASK }, 4154 { MARVELL_PHY_ID_88E1111, MARVELL_PHY_ID_MASK }, 4155 { MARVELL_PHY_ID_88E1111_FINISAR, MARVELL_PHY_ID_MASK }, 4156 { MARVELL_PHY_ID_88E1118, MARVELL_PHY_ID_MASK }, 4157 { MARVELL_PHY_ID_88E1121R, MARVELL_PHY_ID_MASK }, 4158 { MARVELL_PHY_ID_88E1145, MARVELL_PHY_ID_MASK }, 4159 { MARVELL_PHY_ID_88E1149R, MARVELL_PHY_ID_MASK }, 4160 { MARVELL_PHY_ID_88E1240, MARVELL_PHY_ID_MASK }, 4161 { MARVELL_PHY_ID_88E1318S, MARVELL_PHY_ID_MASK }, 4162 { MARVELL_PHY_ID_88E1116R, MARVELL_PHY_ID_MASK }, 4163 { MARVELL_PHY_ID_88E1510, MARVELL_PHY_ID_MASK }, 4164 { MARVELL_PHY_ID_88E1540, MARVELL_PHY_ID_MASK }, 4165 { MARVELL_PHY_ID_88E1545, MARVELL_PHY_ID_MASK }, 4166 { MARVELL_PHY_ID_88E3016, MARVELL_PHY_ID_MASK }, 4167 { MARVELL_PHY_ID_88E6250_FAMILY, MARVELL_PHY_ID_MASK }, 4168 { MARVELL_PHY_ID_88E6341_FAMILY, MARVELL_PHY_ID_MASK }, 4169 { MARVELL_PHY_ID_88E6390_FAMILY, MARVELL_PHY_ID_MASK }, 4170 { MARVELL_PHY_ID_88E6393_FAMILY, MARVELL_PHY_ID_MASK }, 4171 { MARVELL_PHY_ID_88E1340S, MARVELL_PHY_ID_MASK }, 4172 { MARVELL_PHY_ID_88E1548P, MARVELL_PHY_ID_MASK }, 4173 { } 4174 }; 4175 4176 MODULE_DEVICE_TABLE(mdio, marvell_tbl); 4177