1 // SPDX-License-Identifier: GPL-2.0+ 2 /* 3 * drivers/net/phy/marvell.c 4 * 5 * Driver for Marvell PHYs 6 * 7 * Author: Andy Fleming 8 * 9 * Copyright (c) 2004 Freescale Semiconductor, Inc. 10 * 11 * Copyright (c) 2013 Michael Stapelberg <michael@stapelberg.de> 12 */ 13 #include <linux/kernel.h> 14 #include <linux/string.h> 15 #include <linux/ctype.h> 16 #include <linux/errno.h> 17 #include <linux/unistd.h> 18 #include <linux/hwmon.h> 19 #include <linux/interrupt.h> 20 #include <linux/init.h> 21 #include <linux/delay.h> 22 #include <linux/netdevice.h> 23 #include <linux/etherdevice.h> 24 #include <linux/skbuff.h> 25 #include <linux/spinlock.h> 26 #include <linux/mm.h> 27 #include <linux/module.h> 28 #include <linux/mii.h> 29 #include <linux/ethtool.h> 30 #include <linux/ethtool_netlink.h> 31 #include <linux/phy.h> 32 #include <linux/marvell_phy.h> 33 #include <linux/bitfield.h> 34 #include <linux/of.h> 35 #include <linux/sfp.h> 36 37 #include <linux/io.h> 38 #include <asm/irq.h> 39 #include <linux/uaccess.h> 40 41 #define MII_MARVELL_PHY_PAGE 22 42 #define MII_MARVELL_COPPER_PAGE 0x00 43 #define MII_MARVELL_FIBER_PAGE 0x01 44 #define MII_MARVELL_MSCR_PAGE 0x02 45 #define MII_MARVELL_LED_PAGE 0x03 46 #define MII_MARVELL_VCT5_PAGE 0x05 47 #define MII_MARVELL_MISC_TEST_PAGE 0x06 48 #define MII_MARVELL_VCT7_PAGE 0x07 49 #define MII_MARVELL_WOL_PAGE 0x11 50 #define MII_MARVELL_MODE_PAGE 0x12 51 52 #define MII_M1011_IEVENT 0x13 53 #define MII_M1011_IEVENT_CLEAR 0x0000 54 55 #define MII_M1011_IMASK 0x12 56 #define MII_M1011_IMASK_INIT 0x6400 57 #define MII_M1011_IMASK_CLEAR 0x0000 58 59 #define MII_M1011_PHY_SCR 0x10 60 #define MII_M1011_PHY_SCR_DOWNSHIFT_EN BIT(11) 61 #define MII_M1011_PHY_SCR_DOWNSHIFT_MASK GENMASK(14, 12) 62 #define MII_M1011_PHY_SCR_DOWNSHIFT_MAX 8 63 #define MII_M1011_PHY_SCR_MDI (0x0 << 5) 64 #define MII_M1011_PHY_SCR_MDI_X (0x1 << 5) 65 #define MII_M1011_PHY_SCR_AUTO_CROSS (0x3 << 5) 66 67 #define MII_M1011_PHY_SSR 0x11 68 #define MII_M1011_PHY_SSR_DOWNSHIFT BIT(5) 69 70 #define MII_M1111_PHY_LED_CONTROL 0x18 71 #define MII_M1111_PHY_LED_DIRECT 0x4100 72 #define MII_M1111_PHY_LED_COMBINE 0x411c 73 #define MII_M1111_PHY_EXT_CR 0x14 74 #define MII_M1111_PHY_EXT_CR_DOWNSHIFT_MASK GENMASK(11, 9) 75 #define MII_M1111_PHY_EXT_CR_DOWNSHIFT_MAX 8 76 #define MII_M1111_PHY_EXT_CR_DOWNSHIFT_EN BIT(8) 77 #define MII_M1111_RGMII_RX_DELAY BIT(7) 78 #define MII_M1111_RGMII_TX_DELAY BIT(1) 79 #define MII_M1111_PHY_EXT_SR 0x1b 80 81 #define MII_M1111_HWCFG_MODE_MASK 0xf 82 #define MII_M1111_HWCFG_MODE_FIBER_RGMII 0x3 83 #define MII_M1111_HWCFG_MODE_SGMII_NO_CLK 0x4 84 #define MII_M1111_HWCFG_MODE_RTBI 0x7 85 #define MII_M1111_HWCFG_MODE_COPPER_1000X_AN 0x8 86 #define MII_M1111_HWCFG_MODE_COPPER_RTBI 0x9 87 #define MII_M1111_HWCFG_MODE_COPPER_RGMII 0xb 88 #define MII_M1111_HWCFG_MODE_COPPER_1000X_NOAN 0xc 89 #define MII_M1111_HWCFG_SERIAL_AN_BYPASS BIT(12) 90 #define MII_M1111_HWCFG_FIBER_COPPER_RES BIT(13) 91 #define MII_M1111_HWCFG_FIBER_COPPER_AUTO BIT(15) 92 93 #define MII_88E1121_PHY_MSCR_REG 21 94 #define MII_88E1121_PHY_MSCR_RX_DELAY BIT(5) 95 #define MII_88E1121_PHY_MSCR_TX_DELAY BIT(4) 96 #define MII_88E1121_PHY_MSCR_DELAY_MASK (BIT(5) | BIT(4)) 97 98 #define MII_88E1121_MISC_TEST 0x1a 99 #define MII_88E1510_MISC_TEST_TEMP_THRESHOLD_MASK 0x1f00 100 #define MII_88E1510_MISC_TEST_TEMP_THRESHOLD_SHIFT 8 101 #define MII_88E1510_MISC_TEST_TEMP_IRQ_EN BIT(7) 102 #define MII_88E1510_MISC_TEST_TEMP_IRQ BIT(6) 103 #define MII_88E1121_MISC_TEST_TEMP_SENSOR_EN BIT(5) 104 #define MII_88E1121_MISC_TEST_TEMP_MASK 0x1f 105 106 #define MII_88E1510_TEMP_SENSOR 0x1b 107 #define MII_88E1510_TEMP_SENSOR_MASK 0xff 108 109 #define MII_88E1540_COPPER_CTRL3 0x1a 110 #define MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_MASK GENMASK(11, 10) 111 #define MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_00MS 0 112 #define MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_10MS 1 113 #define MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_20MS 2 114 #define MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_40MS 3 115 #define MII_88E1540_COPPER_CTRL3_FAST_LINK_DOWN BIT(9) 116 117 #define MII_88E6390_MISC_TEST 0x1b 118 #define MII_88E6390_MISC_TEST_TEMP_SENSOR_ENABLE_SAMPLE_1S (0x0 << 14) 119 #define MII_88E6390_MISC_TEST_TEMP_SENSOR_ENABLE (0x1 << 14) 120 #define MII_88E6390_MISC_TEST_TEMP_SENSOR_ENABLE_ONESHOT (0x2 << 14) 121 #define MII_88E6390_MISC_TEST_TEMP_SENSOR_DISABLE (0x3 << 14) 122 #define MII_88E6390_MISC_TEST_TEMP_SENSOR_MASK (0x3 << 14) 123 #define MII_88E6393_MISC_TEST_SAMPLES_2048 (0x0 << 11) 124 #define MII_88E6393_MISC_TEST_SAMPLES_4096 (0x1 << 11) 125 #define MII_88E6393_MISC_TEST_SAMPLES_8192 (0x2 << 11) 126 #define MII_88E6393_MISC_TEST_SAMPLES_16384 (0x3 << 11) 127 #define MII_88E6393_MISC_TEST_SAMPLES_MASK (0x3 << 11) 128 #define MII_88E6393_MISC_TEST_RATE_2_3MS (0x5 << 8) 129 #define MII_88E6393_MISC_TEST_RATE_6_4MS (0x6 << 8) 130 #define MII_88E6393_MISC_TEST_RATE_11_9MS (0x7 << 8) 131 #define MII_88E6393_MISC_TEST_RATE_MASK (0x7 << 8) 132 133 #define MII_88E6390_TEMP_SENSOR 0x1c 134 #define MII_88E6393_TEMP_SENSOR_THRESHOLD_MASK 0xff00 135 #define MII_88E6393_TEMP_SENSOR_THRESHOLD_SHIFT 8 136 #define MII_88E6390_TEMP_SENSOR_MASK 0xff 137 #define MII_88E6390_TEMP_SENSOR_SAMPLES 10 138 139 #define MII_88E1318S_PHY_MSCR1_REG 16 140 #define MII_88E1318S_PHY_MSCR1_PAD_ODD BIT(6) 141 142 /* Copper Specific Interrupt Enable Register */ 143 #define MII_88E1318S_PHY_CSIER 0x12 144 /* WOL Event Interrupt Enable */ 145 #define MII_88E1318S_PHY_CSIER_WOL_EIE BIT(7) 146 147 /* LED Timer Control Register */ 148 #define MII_88E1318S_PHY_LED_TCR 0x12 149 #define MII_88E1318S_PHY_LED_TCR_FORCE_INT BIT(15) 150 #define MII_88E1318S_PHY_LED_TCR_INTn_ENABLE BIT(7) 151 #define MII_88E1318S_PHY_LED_TCR_INT_ACTIVE_LOW BIT(11) 152 153 /* Magic Packet MAC address registers */ 154 #define MII_88E1318S_PHY_MAGIC_PACKET_WORD2 0x17 155 #define MII_88E1318S_PHY_MAGIC_PACKET_WORD1 0x18 156 #define MII_88E1318S_PHY_MAGIC_PACKET_WORD0 0x19 157 158 #define MII_88E1318S_PHY_WOL_CTRL 0x10 159 #define MII_88E1318S_PHY_WOL_CTRL_CLEAR_WOL_STATUS BIT(12) 160 #define MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE BIT(14) 161 162 #define MII_PHY_LED_CTRL 16 163 #define MII_88E1121_PHY_LED_DEF 0x0030 164 #define MII_88E1510_PHY_LED_DEF 0x1177 165 #define MII_88E1510_PHY_LED0_LINK_LED1_ACTIVE 0x1040 166 167 #define MII_M1011_PHY_STATUS 0x11 168 #define MII_M1011_PHY_STATUS_1000 0x8000 169 #define MII_M1011_PHY_STATUS_100 0x4000 170 #define MII_M1011_PHY_STATUS_SPD_MASK 0xc000 171 #define MII_M1011_PHY_STATUS_FULLDUPLEX 0x2000 172 #define MII_M1011_PHY_STATUS_RESOLVED 0x0800 173 #define MII_M1011_PHY_STATUS_LINK 0x0400 174 175 #define MII_88E3016_PHY_SPEC_CTRL 0x10 176 #define MII_88E3016_DISABLE_SCRAMBLER 0x0200 177 #define MII_88E3016_AUTO_MDIX_CROSSOVER 0x0030 178 179 #define MII_88E1510_GEN_CTRL_REG_1 0x14 180 #define MII_88E1510_GEN_CTRL_REG_1_MODE_MASK 0x7 181 #define MII_88E1510_GEN_CTRL_REG_1_MODE_RGMII 0x0 /* RGMII to copper */ 182 #define MII_88E1510_GEN_CTRL_REG_1_MODE_SGMII 0x1 /* SGMII to copper */ 183 /* RGMII to 1000BASE-X */ 184 #define MII_88E1510_GEN_CTRL_REG_1_MODE_RGMII_1000X 0x2 185 /* RGMII to 100BASE-FX */ 186 #define MII_88E1510_GEN_CTRL_REG_1_MODE_RGMII_100FX 0x3 187 /* RGMII to SGMII */ 188 #define MII_88E1510_GEN_CTRL_REG_1_MODE_RGMII_SGMII 0x4 189 #define MII_88E1510_GEN_CTRL_REG_1_RESET 0x8000 /* Soft reset */ 190 191 #define MII_VCT5_TX_RX_MDI0_COUPLING 0x10 192 #define MII_VCT5_TX_RX_MDI1_COUPLING 0x11 193 #define MII_VCT5_TX_RX_MDI2_COUPLING 0x12 194 #define MII_VCT5_TX_RX_MDI3_COUPLING 0x13 195 #define MII_VCT5_TX_RX_AMPLITUDE_MASK 0x7f00 196 #define MII_VCT5_TX_RX_AMPLITUDE_SHIFT 8 197 #define MII_VCT5_TX_RX_COUPLING_POSITIVE_REFLECTION BIT(15) 198 199 #define MII_VCT5_CTRL 0x17 200 #define MII_VCT5_CTRL_ENABLE BIT(15) 201 #define MII_VCT5_CTRL_COMPLETE BIT(14) 202 #define MII_VCT5_CTRL_TX_SAME_CHANNEL (0x0 << 11) 203 #define MII_VCT5_CTRL_TX0_CHANNEL (0x4 << 11) 204 #define MII_VCT5_CTRL_TX1_CHANNEL (0x5 << 11) 205 #define MII_VCT5_CTRL_TX2_CHANNEL (0x6 << 11) 206 #define MII_VCT5_CTRL_TX3_CHANNEL (0x7 << 11) 207 #define MII_VCT5_CTRL_SAMPLES_2 (0x0 << 8) 208 #define MII_VCT5_CTRL_SAMPLES_4 (0x1 << 8) 209 #define MII_VCT5_CTRL_SAMPLES_8 (0x2 << 8) 210 #define MII_VCT5_CTRL_SAMPLES_16 (0x3 << 8) 211 #define MII_VCT5_CTRL_SAMPLES_32 (0x4 << 8) 212 #define MII_VCT5_CTRL_SAMPLES_64 (0x5 << 8) 213 #define MII_VCT5_CTRL_SAMPLES_128 (0x6 << 8) 214 #define MII_VCT5_CTRL_SAMPLES_DEFAULT (0x6 << 8) 215 #define MII_VCT5_CTRL_SAMPLES_256 (0x7 << 8) 216 #define MII_VCT5_CTRL_SAMPLES_SHIFT 8 217 #define MII_VCT5_CTRL_MODE_MAXIMUM_PEEK (0x0 << 6) 218 #define MII_VCT5_CTRL_MODE_FIRST_LAST_PEEK (0x1 << 6) 219 #define MII_VCT5_CTRL_MODE_OFFSET (0x2 << 6) 220 #define MII_VCT5_CTRL_SAMPLE_POINT (0x3 << 6) 221 #define MII_VCT5_CTRL_PEEK_HYST_DEFAULT 3 222 223 #define MII_VCT5_SAMPLE_POINT_DISTANCE 0x18 224 #define MII_VCT5_SAMPLE_POINT_DISTANCE_MAX 511 225 #define MII_VCT5_TX_PULSE_CTRL 0x1c 226 #define MII_VCT5_TX_PULSE_CTRL_DONT_WAIT_LINK_DOWN BIT(12) 227 #define MII_VCT5_TX_PULSE_CTRL_PULSE_WIDTH_128nS (0x0 << 10) 228 #define MII_VCT5_TX_PULSE_CTRL_PULSE_WIDTH_96nS (0x1 << 10) 229 #define MII_VCT5_TX_PULSE_CTRL_PULSE_WIDTH_64nS (0x2 << 10) 230 #define MII_VCT5_TX_PULSE_CTRL_PULSE_WIDTH_32nS (0x3 << 10) 231 #define MII_VCT5_TX_PULSE_CTRL_PULSE_WIDTH_SHIFT 10 232 #define MII_VCT5_TX_PULSE_CTRL_PULSE_AMPLITUDE_1000mV (0x0 << 8) 233 #define MII_VCT5_TX_PULSE_CTRL_PULSE_AMPLITUDE_750mV (0x1 << 8) 234 #define MII_VCT5_TX_PULSE_CTRL_PULSE_AMPLITUDE_500mV (0x2 << 8) 235 #define MII_VCT5_TX_PULSE_CTRL_PULSE_AMPLITUDE_250mV (0x3 << 8) 236 #define MII_VCT5_TX_PULSE_CTRL_PULSE_AMPLITUDE_SHIFT 8 237 #define MII_VCT5_TX_PULSE_CTRL_MAX_AMP BIT(7) 238 #define MII_VCT5_TX_PULSE_CTRL_GT_140m_46_86mV (0x6 << 0) 239 240 /* For TDR measurements less than 11 meters, a short pulse should be 241 * used. 242 */ 243 #define TDR_SHORT_CABLE_LENGTH 11 244 245 #define MII_VCT7_PAIR_0_DISTANCE 0x10 246 #define MII_VCT7_PAIR_1_DISTANCE 0x11 247 #define MII_VCT7_PAIR_2_DISTANCE 0x12 248 #define MII_VCT7_PAIR_3_DISTANCE 0x13 249 250 #define MII_VCT7_RESULTS 0x14 251 #define MII_VCT7_RESULTS_PAIR3_MASK 0xf000 252 #define MII_VCT7_RESULTS_PAIR2_MASK 0x0f00 253 #define MII_VCT7_RESULTS_PAIR1_MASK 0x00f0 254 #define MII_VCT7_RESULTS_PAIR0_MASK 0x000f 255 #define MII_VCT7_RESULTS_PAIR3_SHIFT 12 256 #define MII_VCT7_RESULTS_PAIR2_SHIFT 8 257 #define MII_VCT7_RESULTS_PAIR1_SHIFT 4 258 #define MII_VCT7_RESULTS_PAIR0_SHIFT 0 259 #define MII_VCT7_RESULTS_INVALID 0 260 #define MII_VCT7_RESULTS_OK 1 261 #define MII_VCT7_RESULTS_OPEN 2 262 #define MII_VCT7_RESULTS_SAME_SHORT 3 263 #define MII_VCT7_RESULTS_CROSS_SHORT 4 264 #define MII_VCT7_RESULTS_BUSY 9 265 266 #define MII_VCT7_CTRL 0x15 267 #define MII_VCT7_CTRL_RUN_NOW BIT(15) 268 #define MII_VCT7_CTRL_RUN_ANEG BIT(14) 269 #define MII_VCT7_CTRL_DISABLE_CROSS BIT(13) 270 #define MII_VCT7_CTRL_RUN_AFTER_BREAK_LINK BIT(12) 271 #define MII_VCT7_CTRL_IN_PROGRESS BIT(11) 272 #define MII_VCT7_CTRL_METERS BIT(10) 273 #define MII_VCT7_CTRL_CENTIMETERS 0 274 275 #define LPA_PAUSE_FIBER 0x180 276 #define LPA_PAUSE_ASYM_FIBER 0x100 277 278 #define NB_FIBER_STATS 1 279 280 MODULE_DESCRIPTION("Marvell PHY driver"); 281 MODULE_AUTHOR("Andy Fleming"); 282 MODULE_LICENSE("GPL"); 283 284 struct marvell_hw_stat { 285 const char *string; 286 u8 page; 287 u8 reg; 288 u8 bits; 289 }; 290 291 static struct marvell_hw_stat marvell_hw_stats[] = { 292 { "phy_receive_errors_copper", 0, 21, 16}, 293 { "phy_idle_errors", 0, 10, 8 }, 294 { "phy_receive_errors_fiber", 1, 21, 16}, 295 }; 296 297 struct marvell_priv { 298 u64 stats[ARRAY_SIZE(marvell_hw_stats)]; 299 char *hwmon_name; 300 struct device *hwmon_dev; 301 bool cable_test_tdr; 302 u32 first; 303 u32 last; 304 u32 step; 305 s8 pair; 306 }; 307 308 static int marvell_read_page(struct phy_device *phydev) 309 { 310 return __phy_read(phydev, MII_MARVELL_PHY_PAGE); 311 } 312 313 static int marvell_write_page(struct phy_device *phydev, int page) 314 { 315 return __phy_write(phydev, MII_MARVELL_PHY_PAGE, page); 316 } 317 318 static int marvell_set_page(struct phy_device *phydev, int page) 319 { 320 return phy_write(phydev, MII_MARVELL_PHY_PAGE, page); 321 } 322 323 static int marvell_ack_interrupt(struct phy_device *phydev) 324 { 325 int err; 326 327 /* Clear the interrupts by reading the reg */ 328 err = phy_read(phydev, MII_M1011_IEVENT); 329 330 if (err < 0) 331 return err; 332 333 return 0; 334 } 335 336 static int marvell_config_intr(struct phy_device *phydev) 337 { 338 int err; 339 340 if (phydev->interrupts == PHY_INTERRUPT_ENABLED) { 341 err = marvell_ack_interrupt(phydev); 342 if (err) 343 return err; 344 345 err = phy_write(phydev, MII_M1011_IMASK, 346 MII_M1011_IMASK_INIT); 347 } else { 348 err = phy_write(phydev, MII_M1011_IMASK, 349 MII_M1011_IMASK_CLEAR); 350 if (err) 351 return err; 352 353 err = marvell_ack_interrupt(phydev); 354 } 355 356 return err; 357 } 358 359 static irqreturn_t marvell_handle_interrupt(struct phy_device *phydev) 360 { 361 int irq_status; 362 363 irq_status = phy_read(phydev, MII_M1011_IEVENT); 364 if (irq_status < 0) { 365 phy_error(phydev); 366 return IRQ_NONE; 367 } 368 369 if (!(irq_status & MII_M1011_IMASK_INIT)) 370 return IRQ_NONE; 371 372 phy_trigger_machine(phydev); 373 374 return IRQ_HANDLED; 375 } 376 377 static int marvell_set_polarity(struct phy_device *phydev, int polarity) 378 { 379 u16 val; 380 381 switch (polarity) { 382 case ETH_TP_MDI: 383 val = MII_M1011_PHY_SCR_MDI; 384 break; 385 case ETH_TP_MDI_X: 386 val = MII_M1011_PHY_SCR_MDI_X; 387 break; 388 case ETH_TP_MDI_AUTO: 389 case ETH_TP_MDI_INVALID: 390 default: 391 val = MII_M1011_PHY_SCR_AUTO_CROSS; 392 break; 393 } 394 395 return phy_modify_changed(phydev, MII_M1011_PHY_SCR, 396 MII_M1011_PHY_SCR_AUTO_CROSS, val); 397 } 398 399 static int marvell_config_aneg(struct phy_device *phydev) 400 { 401 int changed = 0; 402 int err; 403 404 err = marvell_set_polarity(phydev, phydev->mdix_ctrl); 405 if (err < 0) 406 return err; 407 408 changed = err; 409 410 err = phy_write(phydev, MII_M1111_PHY_LED_CONTROL, 411 MII_M1111_PHY_LED_DIRECT); 412 if (err < 0) 413 return err; 414 415 err = genphy_config_aneg(phydev); 416 if (err < 0) 417 return err; 418 419 if (phydev->autoneg != AUTONEG_ENABLE || changed) { 420 /* A write to speed/duplex bits (that is performed by 421 * genphy_config_aneg() call above) must be followed by 422 * a software reset. Otherwise, the write has no effect. 423 */ 424 err = genphy_soft_reset(phydev); 425 if (err < 0) 426 return err; 427 } 428 429 return 0; 430 } 431 432 static int m88e1101_config_aneg(struct phy_device *phydev) 433 { 434 int err; 435 436 /* This Marvell PHY has an errata which requires 437 * that certain registers get written in order 438 * to restart autonegotiation 439 */ 440 err = genphy_soft_reset(phydev); 441 if (err < 0) 442 return err; 443 444 err = phy_write(phydev, 0x1d, 0x1f); 445 if (err < 0) 446 return err; 447 448 err = phy_write(phydev, 0x1e, 0x200c); 449 if (err < 0) 450 return err; 451 452 err = phy_write(phydev, 0x1d, 0x5); 453 if (err < 0) 454 return err; 455 456 err = phy_write(phydev, 0x1e, 0); 457 if (err < 0) 458 return err; 459 460 err = phy_write(phydev, 0x1e, 0x100); 461 if (err < 0) 462 return err; 463 464 return marvell_config_aneg(phydev); 465 } 466 467 #if IS_ENABLED(CONFIG_OF_MDIO) 468 /* Set and/or override some configuration registers based on the 469 * marvell,reg-init property stored in the of_node for the phydev. 470 * 471 * marvell,reg-init = <reg-page reg mask value>,...; 472 * 473 * There may be one or more sets of <reg-page reg mask value>: 474 * 475 * reg-page: which register bank to use. 476 * reg: the register. 477 * mask: if non-zero, ANDed with existing register value. 478 * value: ORed with the masked value and written to the regiser. 479 * 480 */ 481 static int marvell_of_reg_init(struct phy_device *phydev) 482 { 483 const __be32 *paddr; 484 int len, i, saved_page, current_page, ret = 0; 485 486 if (!phydev->mdio.dev.of_node) 487 return 0; 488 489 paddr = of_get_property(phydev->mdio.dev.of_node, 490 "marvell,reg-init", &len); 491 if (!paddr || len < (4 * sizeof(*paddr))) 492 return 0; 493 494 saved_page = phy_save_page(phydev); 495 if (saved_page < 0) 496 goto err; 497 current_page = saved_page; 498 499 len /= sizeof(*paddr); 500 for (i = 0; i < len - 3; i += 4) { 501 u16 page = be32_to_cpup(paddr + i); 502 u16 reg = be32_to_cpup(paddr + i + 1); 503 u16 mask = be32_to_cpup(paddr + i + 2); 504 u16 val_bits = be32_to_cpup(paddr + i + 3); 505 int val; 506 507 if (page != current_page) { 508 current_page = page; 509 ret = marvell_write_page(phydev, page); 510 if (ret < 0) 511 goto err; 512 } 513 514 val = 0; 515 if (mask) { 516 val = __phy_read(phydev, reg); 517 if (val < 0) { 518 ret = val; 519 goto err; 520 } 521 val &= mask; 522 } 523 val |= val_bits; 524 525 ret = __phy_write(phydev, reg, val); 526 if (ret < 0) 527 goto err; 528 } 529 err: 530 return phy_restore_page(phydev, saved_page, ret); 531 } 532 #else 533 static int marvell_of_reg_init(struct phy_device *phydev) 534 { 535 return 0; 536 } 537 #endif /* CONFIG_OF_MDIO */ 538 539 static int m88e1121_config_aneg_rgmii_delays(struct phy_device *phydev) 540 { 541 int mscr; 542 543 if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID) 544 mscr = MII_88E1121_PHY_MSCR_RX_DELAY | 545 MII_88E1121_PHY_MSCR_TX_DELAY; 546 else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_RXID) 547 mscr = MII_88E1121_PHY_MSCR_RX_DELAY; 548 else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_TXID) 549 mscr = MII_88E1121_PHY_MSCR_TX_DELAY; 550 else 551 mscr = 0; 552 553 return phy_modify_paged(phydev, MII_MARVELL_MSCR_PAGE, 554 MII_88E1121_PHY_MSCR_REG, 555 MII_88E1121_PHY_MSCR_DELAY_MASK, mscr); 556 } 557 558 static int m88e1121_config_aneg(struct phy_device *phydev) 559 { 560 int changed = 0; 561 int err = 0; 562 563 if (phy_interface_is_rgmii(phydev)) { 564 err = m88e1121_config_aneg_rgmii_delays(phydev); 565 if (err < 0) 566 return err; 567 } 568 569 err = marvell_set_polarity(phydev, phydev->mdix_ctrl); 570 if (err < 0) 571 return err; 572 573 changed = err; 574 575 err = genphy_config_aneg(phydev); 576 if (err < 0) 577 return err; 578 579 if (phydev->autoneg != AUTONEG_ENABLE || changed) { 580 /* A software reset is used to ensure a "commit" of the 581 * changes is done. 582 */ 583 err = genphy_soft_reset(phydev); 584 if (err < 0) 585 return err; 586 } 587 588 return 0; 589 } 590 591 static int m88e1318_config_aneg(struct phy_device *phydev) 592 { 593 int err; 594 595 err = phy_modify_paged(phydev, MII_MARVELL_MSCR_PAGE, 596 MII_88E1318S_PHY_MSCR1_REG, 597 0, MII_88E1318S_PHY_MSCR1_PAD_ODD); 598 if (err < 0) 599 return err; 600 601 return m88e1121_config_aneg(phydev); 602 } 603 604 /** 605 * linkmode_adv_to_fiber_adv_t 606 * @advertise: the linkmode advertisement settings 607 * 608 * A small helper function that translates linkmode advertisement 609 * settings to phy autonegotiation advertisements for the MII_ADV 610 * register for fiber link. 611 */ 612 static inline u32 linkmode_adv_to_fiber_adv_t(unsigned long *advertise) 613 { 614 u32 result = 0; 615 616 if (linkmode_test_bit(ETHTOOL_LINK_MODE_1000baseT_Half_BIT, advertise)) 617 result |= ADVERTISE_1000XHALF; 618 if (linkmode_test_bit(ETHTOOL_LINK_MODE_1000baseT_Full_BIT, advertise)) 619 result |= ADVERTISE_1000XFULL; 620 621 if (linkmode_test_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, advertise) && 622 linkmode_test_bit(ETHTOOL_LINK_MODE_Pause_BIT, advertise)) 623 result |= ADVERTISE_1000XPSE_ASYM; 624 else if (linkmode_test_bit(ETHTOOL_LINK_MODE_Pause_BIT, advertise)) 625 result |= ADVERTISE_1000XPAUSE; 626 627 return result; 628 } 629 630 /** 631 * marvell_config_aneg_fiber - restart auto-negotiation or write BMCR 632 * @phydev: target phy_device struct 633 * 634 * Description: If auto-negotiation is enabled, we configure the 635 * advertising, and then restart auto-negotiation. If it is not 636 * enabled, then we write the BMCR. Adapted for fiber link in 637 * some Marvell's devices. 638 */ 639 static int marvell_config_aneg_fiber(struct phy_device *phydev) 640 { 641 int changed = 0; 642 int err; 643 u16 adv; 644 645 if (phydev->autoneg != AUTONEG_ENABLE) 646 return genphy_setup_forced(phydev); 647 648 /* Only allow advertising what this PHY supports */ 649 linkmode_and(phydev->advertising, phydev->advertising, 650 phydev->supported); 651 652 adv = linkmode_adv_to_fiber_adv_t(phydev->advertising); 653 654 /* Setup fiber advertisement */ 655 err = phy_modify_changed(phydev, MII_ADVERTISE, 656 ADVERTISE_1000XHALF | ADVERTISE_1000XFULL | 657 ADVERTISE_1000XPAUSE | ADVERTISE_1000XPSE_ASYM, 658 adv); 659 if (err < 0) 660 return err; 661 if (err > 0) 662 changed = 1; 663 664 return genphy_check_and_restart_aneg(phydev, changed); 665 } 666 667 static int m88e1111_config_aneg(struct phy_device *phydev) 668 { 669 int extsr = phy_read(phydev, MII_M1111_PHY_EXT_SR); 670 int err; 671 672 if (extsr < 0) 673 return extsr; 674 675 /* If not using SGMII or copper 1000BaseX modes, use normal process. 676 * Steps below are only required for these modes. 677 */ 678 if (phydev->interface != PHY_INTERFACE_MODE_SGMII && 679 (extsr & MII_M1111_HWCFG_MODE_MASK) != 680 MII_M1111_HWCFG_MODE_COPPER_1000X_AN) 681 return marvell_config_aneg(phydev); 682 683 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); 684 if (err < 0) 685 goto error; 686 687 /* Configure the copper link first */ 688 err = marvell_config_aneg(phydev); 689 if (err < 0) 690 goto error; 691 692 /* Then the fiber link */ 693 err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE); 694 if (err < 0) 695 goto error; 696 697 if (phydev->interface == PHY_INTERFACE_MODE_SGMII) 698 /* Do not touch the fiber advertisement if we're in copper->sgmii mode. 699 * Just ensure that SGMII-side autonegotiation is enabled. 700 * If we switched from some other mode to SGMII it may not be. 701 */ 702 err = genphy_check_and_restart_aneg(phydev, false); 703 else 704 err = marvell_config_aneg_fiber(phydev); 705 if (err < 0) 706 goto error; 707 708 return marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); 709 710 error: 711 marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); 712 return err; 713 } 714 715 static int m88e1510_config_aneg(struct phy_device *phydev) 716 { 717 int err; 718 719 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); 720 if (err < 0) 721 goto error; 722 723 /* Configure the copper link first */ 724 err = m88e1318_config_aneg(phydev); 725 if (err < 0) 726 goto error; 727 728 /* Do not touch the fiber page if we're in copper->sgmii mode */ 729 if (phydev->interface == PHY_INTERFACE_MODE_SGMII) 730 return 0; 731 732 /* Then the fiber link */ 733 err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE); 734 if (err < 0) 735 goto error; 736 737 err = marvell_config_aneg_fiber(phydev); 738 if (err < 0) 739 goto error; 740 741 return marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); 742 743 error: 744 marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); 745 return err; 746 } 747 748 static void marvell_config_led(struct phy_device *phydev) 749 { 750 u16 def_config; 751 int err; 752 753 switch (MARVELL_PHY_FAMILY_ID(phydev->phy_id)) { 754 /* Default PHY LED config: LED[0] .. Link, LED[1] .. Activity */ 755 case MARVELL_PHY_FAMILY_ID(MARVELL_PHY_ID_88E1121R): 756 case MARVELL_PHY_FAMILY_ID(MARVELL_PHY_ID_88E1318S): 757 def_config = MII_88E1121_PHY_LED_DEF; 758 break; 759 /* Default PHY LED config: 760 * LED[0] .. 1000Mbps Link 761 * LED[1] .. 100Mbps Link 762 * LED[2] .. Blink, Activity 763 */ 764 case MARVELL_PHY_FAMILY_ID(MARVELL_PHY_ID_88E1510): 765 if (phydev->dev_flags & MARVELL_PHY_LED0_LINK_LED1_ACTIVE) 766 def_config = MII_88E1510_PHY_LED0_LINK_LED1_ACTIVE; 767 else 768 def_config = MII_88E1510_PHY_LED_DEF; 769 break; 770 default: 771 return; 772 } 773 774 err = phy_write_paged(phydev, MII_MARVELL_LED_PAGE, MII_PHY_LED_CTRL, 775 def_config); 776 if (err < 0) 777 phydev_warn(phydev, "Fail to config marvell phy LED.\n"); 778 } 779 780 static int marvell_config_init(struct phy_device *phydev) 781 { 782 /* Set default LED */ 783 marvell_config_led(phydev); 784 785 /* Set registers from marvell,reg-init DT property */ 786 return marvell_of_reg_init(phydev); 787 } 788 789 static int m88e3016_config_init(struct phy_device *phydev) 790 { 791 int ret; 792 793 /* Enable Scrambler and Auto-Crossover */ 794 ret = phy_modify(phydev, MII_88E3016_PHY_SPEC_CTRL, 795 MII_88E3016_DISABLE_SCRAMBLER, 796 MII_88E3016_AUTO_MDIX_CROSSOVER); 797 if (ret < 0) 798 return ret; 799 800 return marvell_config_init(phydev); 801 } 802 803 static int m88e1111_config_init_hwcfg_mode(struct phy_device *phydev, 804 u16 mode, 805 int fibre_copper_auto) 806 { 807 if (fibre_copper_auto) 808 mode |= MII_M1111_HWCFG_FIBER_COPPER_AUTO; 809 810 return phy_modify(phydev, MII_M1111_PHY_EXT_SR, 811 MII_M1111_HWCFG_MODE_MASK | 812 MII_M1111_HWCFG_FIBER_COPPER_AUTO | 813 MII_M1111_HWCFG_FIBER_COPPER_RES, 814 mode); 815 } 816 817 static int m88e1111_config_init_rgmii_delays(struct phy_device *phydev) 818 { 819 int delay; 820 821 switch (phydev->interface) { 822 case PHY_INTERFACE_MODE_RGMII_ID: 823 delay = MII_M1111_RGMII_RX_DELAY | MII_M1111_RGMII_TX_DELAY; 824 break; 825 case PHY_INTERFACE_MODE_RGMII_RXID: 826 delay = MII_M1111_RGMII_RX_DELAY; 827 break; 828 case PHY_INTERFACE_MODE_RGMII_TXID: 829 delay = MII_M1111_RGMII_TX_DELAY; 830 break; 831 default: 832 delay = 0; 833 break; 834 } 835 836 return phy_modify(phydev, MII_M1111_PHY_EXT_CR, 837 MII_M1111_RGMII_RX_DELAY | MII_M1111_RGMII_TX_DELAY, 838 delay); 839 } 840 841 static int m88e1111_config_init_rgmii(struct phy_device *phydev) 842 { 843 int temp; 844 int err; 845 846 err = m88e1111_config_init_rgmii_delays(phydev); 847 if (err < 0) 848 return err; 849 850 temp = phy_read(phydev, MII_M1111_PHY_EXT_SR); 851 if (temp < 0) 852 return temp; 853 854 temp &= ~(MII_M1111_HWCFG_MODE_MASK); 855 856 if (temp & MII_M1111_HWCFG_FIBER_COPPER_RES) 857 temp |= MII_M1111_HWCFG_MODE_FIBER_RGMII; 858 else 859 temp |= MII_M1111_HWCFG_MODE_COPPER_RGMII; 860 861 return phy_write(phydev, MII_M1111_PHY_EXT_SR, temp); 862 } 863 864 static int m88e1111_config_init_sgmii(struct phy_device *phydev) 865 { 866 int err; 867 868 err = m88e1111_config_init_hwcfg_mode( 869 phydev, 870 MII_M1111_HWCFG_MODE_SGMII_NO_CLK, 871 MII_M1111_HWCFG_FIBER_COPPER_AUTO); 872 if (err < 0) 873 return err; 874 875 /* make sure copper is selected */ 876 return marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); 877 } 878 879 static int m88e1111_config_init_rtbi(struct phy_device *phydev) 880 { 881 int err; 882 883 err = m88e1111_config_init_rgmii_delays(phydev); 884 if (err < 0) 885 return err; 886 887 err = m88e1111_config_init_hwcfg_mode( 888 phydev, 889 MII_M1111_HWCFG_MODE_RTBI, 890 MII_M1111_HWCFG_FIBER_COPPER_AUTO); 891 if (err < 0) 892 return err; 893 894 /* soft reset */ 895 err = genphy_soft_reset(phydev); 896 if (err < 0) 897 return err; 898 899 return m88e1111_config_init_hwcfg_mode( 900 phydev, 901 MII_M1111_HWCFG_MODE_RTBI, 902 MII_M1111_HWCFG_FIBER_COPPER_AUTO); 903 } 904 905 static int m88e1111_config_init_1000basex(struct phy_device *phydev) 906 { 907 int extsr = phy_read(phydev, MII_M1111_PHY_EXT_SR); 908 int err, mode; 909 910 if (extsr < 0) 911 return extsr; 912 913 /* If using copper mode, ensure 1000BaseX auto-negotiation is enabled */ 914 mode = extsr & MII_M1111_HWCFG_MODE_MASK; 915 if (mode == MII_M1111_HWCFG_MODE_COPPER_1000X_NOAN) { 916 err = phy_modify(phydev, MII_M1111_PHY_EXT_SR, 917 MII_M1111_HWCFG_MODE_MASK | 918 MII_M1111_HWCFG_SERIAL_AN_BYPASS, 919 MII_M1111_HWCFG_MODE_COPPER_1000X_AN | 920 MII_M1111_HWCFG_SERIAL_AN_BYPASS); 921 if (err < 0) 922 return err; 923 } 924 return 0; 925 } 926 927 static int m88e1111_config_init(struct phy_device *phydev) 928 { 929 int err; 930 931 if (phy_interface_is_rgmii(phydev)) { 932 err = m88e1111_config_init_rgmii(phydev); 933 if (err < 0) 934 return err; 935 } 936 937 if (phydev->interface == PHY_INTERFACE_MODE_SGMII) { 938 err = m88e1111_config_init_sgmii(phydev); 939 if (err < 0) 940 return err; 941 } 942 943 if (phydev->interface == PHY_INTERFACE_MODE_RTBI) { 944 err = m88e1111_config_init_rtbi(phydev); 945 if (err < 0) 946 return err; 947 } 948 949 if (phydev->interface == PHY_INTERFACE_MODE_1000BASEX) { 950 err = m88e1111_config_init_1000basex(phydev); 951 if (err < 0) 952 return err; 953 } 954 955 err = marvell_of_reg_init(phydev); 956 if (err < 0) 957 return err; 958 959 return genphy_soft_reset(phydev); 960 } 961 962 static int m88e1111_get_downshift(struct phy_device *phydev, u8 *data) 963 { 964 int val, cnt, enable; 965 966 val = phy_read(phydev, MII_M1111_PHY_EXT_CR); 967 if (val < 0) 968 return val; 969 970 enable = FIELD_GET(MII_M1111_PHY_EXT_CR_DOWNSHIFT_EN, val); 971 cnt = FIELD_GET(MII_M1111_PHY_EXT_CR_DOWNSHIFT_MASK, val) + 1; 972 973 *data = enable ? cnt : DOWNSHIFT_DEV_DISABLE; 974 975 return 0; 976 } 977 978 static int m88e1111_set_downshift(struct phy_device *phydev, u8 cnt) 979 { 980 int val, err; 981 982 if (cnt > MII_M1111_PHY_EXT_CR_DOWNSHIFT_MAX) 983 return -E2BIG; 984 985 if (!cnt) { 986 err = phy_clear_bits(phydev, MII_M1111_PHY_EXT_CR, 987 MII_M1111_PHY_EXT_CR_DOWNSHIFT_EN); 988 } else { 989 val = MII_M1111_PHY_EXT_CR_DOWNSHIFT_EN; 990 val |= FIELD_PREP(MII_M1111_PHY_EXT_CR_DOWNSHIFT_MASK, cnt - 1); 991 992 err = phy_modify(phydev, MII_M1111_PHY_EXT_CR, 993 MII_M1111_PHY_EXT_CR_DOWNSHIFT_EN | 994 MII_M1111_PHY_EXT_CR_DOWNSHIFT_MASK, 995 val); 996 } 997 998 if (err < 0) 999 return err; 1000 1001 return genphy_soft_reset(phydev); 1002 } 1003 1004 static int m88e1111_get_tunable(struct phy_device *phydev, 1005 struct ethtool_tunable *tuna, void *data) 1006 { 1007 switch (tuna->id) { 1008 case ETHTOOL_PHY_DOWNSHIFT: 1009 return m88e1111_get_downshift(phydev, data); 1010 default: 1011 return -EOPNOTSUPP; 1012 } 1013 } 1014 1015 static int m88e1111_set_tunable(struct phy_device *phydev, 1016 struct ethtool_tunable *tuna, const void *data) 1017 { 1018 switch (tuna->id) { 1019 case ETHTOOL_PHY_DOWNSHIFT: 1020 return m88e1111_set_downshift(phydev, *(const u8 *)data); 1021 default: 1022 return -EOPNOTSUPP; 1023 } 1024 } 1025 1026 static int m88e1011_get_downshift(struct phy_device *phydev, u8 *data) 1027 { 1028 int val, cnt, enable; 1029 1030 val = phy_read(phydev, MII_M1011_PHY_SCR); 1031 if (val < 0) 1032 return val; 1033 1034 enable = FIELD_GET(MII_M1011_PHY_SCR_DOWNSHIFT_EN, val); 1035 cnt = FIELD_GET(MII_M1011_PHY_SCR_DOWNSHIFT_MASK, val) + 1; 1036 1037 *data = enable ? cnt : DOWNSHIFT_DEV_DISABLE; 1038 1039 return 0; 1040 } 1041 1042 static int m88e1011_set_downshift(struct phy_device *phydev, u8 cnt) 1043 { 1044 int val, err; 1045 1046 if (cnt > MII_M1011_PHY_SCR_DOWNSHIFT_MAX) 1047 return -E2BIG; 1048 1049 if (!cnt) { 1050 err = phy_clear_bits(phydev, MII_M1011_PHY_SCR, 1051 MII_M1011_PHY_SCR_DOWNSHIFT_EN); 1052 } else { 1053 val = MII_M1011_PHY_SCR_DOWNSHIFT_EN; 1054 val |= FIELD_PREP(MII_M1011_PHY_SCR_DOWNSHIFT_MASK, cnt - 1); 1055 1056 err = phy_modify(phydev, MII_M1011_PHY_SCR, 1057 MII_M1011_PHY_SCR_DOWNSHIFT_EN | 1058 MII_M1011_PHY_SCR_DOWNSHIFT_MASK, 1059 val); 1060 } 1061 1062 if (err < 0) 1063 return err; 1064 1065 return genphy_soft_reset(phydev); 1066 } 1067 1068 static int m88e1011_get_tunable(struct phy_device *phydev, 1069 struct ethtool_tunable *tuna, void *data) 1070 { 1071 switch (tuna->id) { 1072 case ETHTOOL_PHY_DOWNSHIFT: 1073 return m88e1011_get_downshift(phydev, data); 1074 default: 1075 return -EOPNOTSUPP; 1076 } 1077 } 1078 1079 static int m88e1011_set_tunable(struct phy_device *phydev, 1080 struct ethtool_tunable *tuna, const void *data) 1081 { 1082 switch (tuna->id) { 1083 case ETHTOOL_PHY_DOWNSHIFT: 1084 return m88e1011_set_downshift(phydev, *(const u8 *)data); 1085 default: 1086 return -EOPNOTSUPP; 1087 } 1088 } 1089 1090 static int m88e1112_config_init(struct phy_device *phydev) 1091 { 1092 int err; 1093 1094 err = m88e1011_set_downshift(phydev, 3); 1095 if (err < 0) 1096 return err; 1097 1098 return m88e1111_config_init(phydev); 1099 } 1100 1101 static int m88e1111gbe_config_init(struct phy_device *phydev) 1102 { 1103 int err; 1104 1105 err = m88e1111_set_downshift(phydev, 3); 1106 if (err < 0) 1107 return err; 1108 1109 return m88e1111_config_init(phydev); 1110 } 1111 1112 static int marvell_1011gbe_config_init(struct phy_device *phydev) 1113 { 1114 int err; 1115 1116 err = m88e1011_set_downshift(phydev, 3); 1117 if (err < 0) 1118 return err; 1119 1120 return marvell_config_init(phydev); 1121 } 1122 static int m88e1116r_config_init(struct phy_device *phydev) 1123 { 1124 int err; 1125 1126 err = genphy_soft_reset(phydev); 1127 if (err < 0) 1128 return err; 1129 1130 msleep(500); 1131 1132 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); 1133 if (err < 0) 1134 return err; 1135 1136 err = marvell_set_polarity(phydev, phydev->mdix_ctrl); 1137 if (err < 0) 1138 return err; 1139 1140 err = m88e1011_set_downshift(phydev, 8); 1141 if (err < 0) 1142 return err; 1143 1144 if (phy_interface_is_rgmii(phydev)) { 1145 err = m88e1121_config_aneg_rgmii_delays(phydev); 1146 if (err < 0) 1147 return err; 1148 } 1149 1150 err = genphy_soft_reset(phydev); 1151 if (err < 0) 1152 return err; 1153 1154 return marvell_config_init(phydev); 1155 } 1156 1157 static int m88e1318_config_init(struct phy_device *phydev) 1158 { 1159 if (phy_interrupt_is_valid(phydev)) { 1160 int err = phy_modify_paged( 1161 phydev, MII_MARVELL_LED_PAGE, 1162 MII_88E1318S_PHY_LED_TCR, 1163 MII_88E1318S_PHY_LED_TCR_FORCE_INT, 1164 MII_88E1318S_PHY_LED_TCR_INTn_ENABLE | 1165 MII_88E1318S_PHY_LED_TCR_INT_ACTIVE_LOW); 1166 if (err < 0) 1167 return err; 1168 } 1169 1170 return marvell_config_init(phydev); 1171 } 1172 1173 static int m88e1510_config_init(struct phy_device *phydev) 1174 { 1175 int err; 1176 1177 /* SGMII-to-Copper mode initialization */ 1178 if (phydev->interface == PHY_INTERFACE_MODE_SGMII) { 1179 /* Select page 18 */ 1180 err = marvell_set_page(phydev, 18); 1181 if (err < 0) 1182 return err; 1183 1184 /* In reg 20, write MODE[2:0] = 0x1 (SGMII to Copper) */ 1185 err = phy_modify(phydev, MII_88E1510_GEN_CTRL_REG_1, 1186 MII_88E1510_GEN_CTRL_REG_1_MODE_MASK, 1187 MII_88E1510_GEN_CTRL_REG_1_MODE_SGMII); 1188 if (err < 0) 1189 return err; 1190 1191 /* PHY reset is necessary after changing MODE[2:0] */ 1192 err = phy_set_bits(phydev, MII_88E1510_GEN_CTRL_REG_1, 1193 MII_88E1510_GEN_CTRL_REG_1_RESET); 1194 if (err < 0) 1195 return err; 1196 1197 /* Reset page selection */ 1198 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); 1199 if (err < 0) 1200 return err; 1201 } 1202 err = m88e1011_set_downshift(phydev, 3); 1203 if (err < 0) 1204 return err; 1205 1206 return m88e1318_config_init(phydev); 1207 } 1208 1209 static int m88e1118_config_aneg(struct phy_device *phydev) 1210 { 1211 int err; 1212 1213 err = genphy_soft_reset(phydev); 1214 if (err < 0) 1215 return err; 1216 1217 err = marvell_set_polarity(phydev, phydev->mdix_ctrl); 1218 if (err < 0) 1219 return err; 1220 1221 err = genphy_config_aneg(phydev); 1222 return 0; 1223 } 1224 1225 static int m88e1118_config_init(struct phy_device *phydev) 1226 { 1227 int err; 1228 1229 /* Change address */ 1230 err = marvell_set_page(phydev, MII_MARVELL_MSCR_PAGE); 1231 if (err < 0) 1232 return err; 1233 1234 /* Enable 1000 Mbit */ 1235 err = phy_write(phydev, 0x15, 0x1070); 1236 if (err < 0) 1237 return err; 1238 1239 /* Change address */ 1240 err = marvell_set_page(phydev, MII_MARVELL_LED_PAGE); 1241 if (err < 0) 1242 return err; 1243 1244 /* Adjust LED Control */ 1245 if (phydev->dev_flags & MARVELL_PHY_M1118_DNS323_LEDS) 1246 err = phy_write(phydev, 0x10, 0x1100); 1247 else 1248 err = phy_write(phydev, 0x10, 0x021e); 1249 if (err < 0) 1250 return err; 1251 1252 err = marvell_of_reg_init(phydev); 1253 if (err < 0) 1254 return err; 1255 1256 /* Reset address */ 1257 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); 1258 if (err < 0) 1259 return err; 1260 1261 return genphy_soft_reset(phydev); 1262 } 1263 1264 static int m88e1149_config_init(struct phy_device *phydev) 1265 { 1266 int err; 1267 1268 /* Change address */ 1269 err = marvell_set_page(phydev, MII_MARVELL_MSCR_PAGE); 1270 if (err < 0) 1271 return err; 1272 1273 /* Enable 1000 Mbit */ 1274 err = phy_write(phydev, 0x15, 0x1048); 1275 if (err < 0) 1276 return err; 1277 1278 err = marvell_of_reg_init(phydev); 1279 if (err < 0) 1280 return err; 1281 1282 /* Reset address */ 1283 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); 1284 if (err < 0) 1285 return err; 1286 1287 return genphy_soft_reset(phydev); 1288 } 1289 1290 static int m88e1145_config_init_rgmii(struct phy_device *phydev) 1291 { 1292 int err; 1293 1294 err = m88e1111_config_init_rgmii_delays(phydev); 1295 if (err < 0) 1296 return err; 1297 1298 if (phydev->dev_flags & MARVELL_PHY_M1145_FLAGS_RESISTANCE) { 1299 err = phy_write(phydev, 0x1d, 0x0012); 1300 if (err < 0) 1301 return err; 1302 1303 err = phy_modify(phydev, 0x1e, 0x0fc0, 1304 2 << 9 | /* 36 ohm */ 1305 2 << 6); /* 39 ohm */ 1306 if (err < 0) 1307 return err; 1308 1309 err = phy_write(phydev, 0x1d, 0x3); 1310 if (err < 0) 1311 return err; 1312 1313 err = phy_write(phydev, 0x1e, 0x8000); 1314 } 1315 return err; 1316 } 1317 1318 static int m88e1145_config_init_sgmii(struct phy_device *phydev) 1319 { 1320 return m88e1111_config_init_hwcfg_mode( 1321 phydev, MII_M1111_HWCFG_MODE_SGMII_NO_CLK, 1322 MII_M1111_HWCFG_FIBER_COPPER_AUTO); 1323 } 1324 1325 static int m88e1145_config_init(struct phy_device *phydev) 1326 { 1327 int err; 1328 1329 /* Take care of errata E0 & E1 */ 1330 err = phy_write(phydev, 0x1d, 0x001b); 1331 if (err < 0) 1332 return err; 1333 1334 err = phy_write(phydev, 0x1e, 0x418f); 1335 if (err < 0) 1336 return err; 1337 1338 err = phy_write(phydev, 0x1d, 0x0016); 1339 if (err < 0) 1340 return err; 1341 1342 err = phy_write(phydev, 0x1e, 0xa2da); 1343 if (err < 0) 1344 return err; 1345 1346 if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID) { 1347 err = m88e1145_config_init_rgmii(phydev); 1348 if (err < 0) 1349 return err; 1350 } 1351 1352 if (phydev->interface == PHY_INTERFACE_MODE_SGMII) { 1353 err = m88e1145_config_init_sgmii(phydev); 1354 if (err < 0) 1355 return err; 1356 } 1357 err = m88e1111_set_downshift(phydev, 3); 1358 if (err < 0) 1359 return err; 1360 1361 err = marvell_of_reg_init(phydev); 1362 if (err < 0) 1363 return err; 1364 1365 return 0; 1366 } 1367 1368 static int m88e1540_get_fld(struct phy_device *phydev, u8 *msecs) 1369 { 1370 int val; 1371 1372 val = phy_read(phydev, MII_88E1540_COPPER_CTRL3); 1373 if (val < 0) 1374 return val; 1375 1376 if (!(val & MII_88E1540_COPPER_CTRL3_FAST_LINK_DOWN)) { 1377 *msecs = ETHTOOL_PHY_FAST_LINK_DOWN_OFF; 1378 return 0; 1379 } 1380 1381 val = FIELD_GET(MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_MASK, val); 1382 1383 switch (val) { 1384 case MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_00MS: 1385 *msecs = 0; 1386 break; 1387 case MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_10MS: 1388 *msecs = 10; 1389 break; 1390 case MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_20MS: 1391 *msecs = 20; 1392 break; 1393 case MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_40MS: 1394 *msecs = 40; 1395 break; 1396 default: 1397 return -EINVAL; 1398 } 1399 1400 return 0; 1401 } 1402 1403 static int m88e1540_set_fld(struct phy_device *phydev, const u8 *msecs) 1404 { 1405 struct ethtool_eee eee; 1406 int val, ret; 1407 1408 if (*msecs == ETHTOOL_PHY_FAST_LINK_DOWN_OFF) 1409 return phy_clear_bits(phydev, MII_88E1540_COPPER_CTRL3, 1410 MII_88E1540_COPPER_CTRL3_FAST_LINK_DOWN); 1411 1412 /* According to the Marvell data sheet EEE must be disabled for 1413 * Fast Link Down detection to work properly 1414 */ 1415 ret = phy_ethtool_get_eee(phydev, &eee); 1416 if (!ret && eee.eee_enabled) { 1417 phydev_warn(phydev, "Fast Link Down detection requires EEE to be disabled!\n"); 1418 return -EBUSY; 1419 } 1420 1421 if (*msecs <= 5) 1422 val = MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_00MS; 1423 else if (*msecs <= 15) 1424 val = MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_10MS; 1425 else if (*msecs <= 30) 1426 val = MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_20MS; 1427 else 1428 val = MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_40MS; 1429 1430 val = FIELD_PREP(MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_MASK, val); 1431 1432 ret = phy_modify(phydev, MII_88E1540_COPPER_CTRL3, 1433 MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_MASK, val); 1434 if (ret) 1435 return ret; 1436 1437 return phy_set_bits(phydev, MII_88E1540_COPPER_CTRL3, 1438 MII_88E1540_COPPER_CTRL3_FAST_LINK_DOWN); 1439 } 1440 1441 static int m88e1540_get_tunable(struct phy_device *phydev, 1442 struct ethtool_tunable *tuna, void *data) 1443 { 1444 switch (tuna->id) { 1445 case ETHTOOL_PHY_FAST_LINK_DOWN: 1446 return m88e1540_get_fld(phydev, data); 1447 case ETHTOOL_PHY_DOWNSHIFT: 1448 return m88e1011_get_downshift(phydev, data); 1449 default: 1450 return -EOPNOTSUPP; 1451 } 1452 } 1453 1454 static int m88e1540_set_tunable(struct phy_device *phydev, 1455 struct ethtool_tunable *tuna, const void *data) 1456 { 1457 switch (tuna->id) { 1458 case ETHTOOL_PHY_FAST_LINK_DOWN: 1459 return m88e1540_set_fld(phydev, data); 1460 case ETHTOOL_PHY_DOWNSHIFT: 1461 return m88e1011_set_downshift(phydev, *(const u8 *)data); 1462 default: 1463 return -EOPNOTSUPP; 1464 } 1465 } 1466 1467 /* The VOD can be out of specification on link up. Poke an 1468 * undocumented register, in an undocumented page, with a magic value 1469 * to fix this. 1470 */ 1471 static int m88e6390_errata(struct phy_device *phydev) 1472 { 1473 int err; 1474 1475 err = phy_write(phydev, MII_BMCR, 1476 BMCR_ANENABLE | BMCR_SPEED1000 | BMCR_FULLDPLX); 1477 if (err) 1478 return err; 1479 1480 usleep_range(300, 400); 1481 1482 err = phy_write_paged(phydev, 0xf8, 0x08, 0x36); 1483 if (err) 1484 return err; 1485 1486 return genphy_soft_reset(phydev); 1487 } 1488 1489 static int m88e6390_config_aneg(struct phy_device *phydev) 1490 { 1491 int err; 1492 1493 err = m88e6390_errata(phydev); 1494 if (err) 1495 return err; 1496 1497 return m88e1510_config_aneg(phydev); 1498 } 1499 1500 /** 1501 * fiber_lpa_mod_linkmode_lpa_t 1502 * @advertising: the linkmode advertisement settings 1503 * @lpa: value of the MII_LPA register for fiber link 1504 * 1505 * A small helper function that translates MII_LPA bits to linkmode LP 1506 * advertisement settings. Other bits in advertising are left 1507 * unchanged. 1508 */ 1509 static void fiber_lpa_mod_linkmode_lpa_t(unsigned long *advertising, u32 lpa) 1510 { 1511 linkmode_mod_bit(ETHTOOL_LINK_MODE_1000baseT_Half_BIT, 1512 advertising, lpa & LPA_1000XHALF); 1513 1514 linkmode_mod_bit(ETHTOOL_LINK_MODE_1000baseT_Full_BIT, 1515 advertising, lpa & LPA_1000XFULL); 1516 } 1517 1518 static int marvell_read_status_page_an(struct phy_device *phydev, 1519 int fiber, int status) 1520 { 1521 int lpa; 1522 int err; 1523 1524 if (!(status & MII_M1011_PHY_STATUS_RESOLVED)) { 1525 phydev->link = 0; 1526 return 0; 1527 } 1528 1529 if (status & MII_M1011_PHY_STATUS_FULLDUPLEX) 1530 phydev->duplex = DUPLEX_FULL; 1531 else 1532 phydev->duplex = DUPLEX_HALF; 1533 1534 switch (status & MII_M1011_PHY_STATUS_SPD_MASK) { 1535 case MII_M1011_PHY_STATUS_1000: 1536 phydev->speed = SPEED_1000; 1537 break; 1538 1539 case MII_M1011_PHY_STATUS_100: 1540 phydev->speed = SPEED_100; 1541 break; 1542 1543 default: 1544 phydev->speed = SPEED_10; 1545 break; 1546 } 1547 1548 if (!fiber) { 1549 err = genphy_read_lpa(phydev); 1550 if (err < 0) 1551 return err; 1552 1553 phy_resolve_aneg_pause(phydev); 1554 } else { 1555 lpa = phy_read(phydev, MII_LPA); 1556 if (lpa < 0) 1557 return lpa; 1558 1559 /* The fiber link is only 1000M capable */ 1560 fiber_lpa_mod_linkmode_lpa_t(phydev->lp_advertising, lpa); 1561 1562 if (phydev->duplex == DUPLEX_FULL) { 1563 if (!(lpa & LPA_PAUSE_FIBER)) { 1564 phydev->pause = 0; 1565 phydev->asym_pause = 0; 1566 } else if ((lpa & LPA_PAUSE_ASYM_FIBER)) { 1567 phydev->pause = 1; 1568 phydev->asym_pause = 1; 1569 } else { 1570 phydev->pause = 1; 1571 phydev->asym_pause = 0; 1572 } 1573 } 1574 } 1575 1576 return 0; 1577 } 1578 1579 /* marvell_read_status_page 1580 * 1581 * Description: 1582 * Check the link, then figure out the current state 1583 * by comparing what we advertise with what the link partner 1584 * advertises. Start by checking the gigabit possibilities, 1585 * then move on to 10/100. 1586 */ 1587 static int marvell_read_status_page(struct phy_device *phydev, int page) 1588 { 1589 int status; 1590 int fiber; 1591 int err; 1592 1593 status = phy_read(phydev, MII_M1011_PHY_STATUS); 1594 if (status < 0) 1595 return status; 1596 1597 /* Use the generic register for copper link status, 1598 * and the PHY status register for fiber link status. 1599 */ 1600 if (page == MII_MARVELL_FIBER_PAGE) { 1601 phydev->link = !!(status & MII_M1011_PHY_STATUS_LINK); 1602 } else { 1603 err = genphy_update_link(phydev); 1604 if (err) 1605 return err; 1606 } 1607 1608 if (page == MII_MARVELL_FIBER_PAGE) 1609 fiber = 1; 1610 else 1611 fiber = 0; 1612 1613 linkmode_zero(phydev->lp_advertising); 1614 phydev->pause = 0; 1615 phydev->asym_pause = 0; 1616 phydev->speed = SPEED_UNKNOWN; 1617 phydev->duplex = DUPLEX_UNKNOWN; 1618 phydev->port = fiber ? PORT_FIBRE : PORT_TP; 1619 1620 if (phydev->autoneg == AUTONEG_ENABLE) 1621 err = marvell_read_status_page_an(phydev, fiber, status); 1622 else 1623 err = genphy_read_status_fixed(phydev); 1624 1625 return err; 1626 } 1627 1628 /* marvell_read_status 1629 * 1630 * Some Marvell's phys have two modes: fiber and copper. 1631 * Both need status checked. 1632 * Description: 1633 * First, check the fiber link and status. 1634 * If the fiber link is down, check the copper link and status which 1635 * will be the default value if both link are down. 1636 */ 1637 static int marvell_read_status(struct phy_device *phydev) 1638 { 1639 int err; 1640 1641 /* Check the fiber mode first */ 1642 if (linkmode_test_bit(ETHTOOL_LINK_MODE_FIBRE_BIT, 1643 phydev->supported) && 1644 phydev->interface != PHY_INTERFACE_MODE_SGMII) { 1645 err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE); 1646 if (err < 0) 1647 goto error; 1648 1649 err = marvell_read_status_page(phydev, MII_MARVELL_FIBER_PAGE); 1650 if (err < 0) 1651 goto error; 1652 1653 /* If the fiber link is up, it is the selected and 1654 * used link. In this case, we need to stay in the 1655 * fiber page. Please to be careful about that, avoid 1656 * to restore Copper page in other functions which 1657 * could break the behaviour for some fiber phy like 1658 * 88E1512. 1659 */ 1660 if (phydev->link) 1661 return 0; 1662 1663 /* If fiber link is down, check and save copper mode state */ 1664 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); 1665 if (err < 0) 1666 goto error; 1667 } 1668 1669 return marvell_read_status_page(phydev, MII_MARVELL_COPPER_PAGE); 1670 1671 error: 1672 marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); 1673 return err; 1674 } 1675 1676 /* marvell_suspend 1677 * 1678 * Some Marvell's phys have two modes: fiber and copper. 1679 * Both need to be suspended 1680 */ 1681 static int marvell_suspend(struct phy_device *phydev) 1682 { 1683 int err; 1684 1685 /* Suspend the fiber mode first */ 1686 if (!linkmode_test_bit(ETHTOOL_LINK_MODE_FIBRE_BIT, 1687 phydev->supported)) { 1688 err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE); 1689 if (err < 0) 1690 goto error; 1691 1692 /* With the page set, use the generic suspend */ 1693 err = genphy_suspend(phydev); 1694 if (err < 0) 1695 goto error; 1696 1697 /* Then, the copper link */ 1698 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); 1699 if (err < 0) 1700 goto error; 1701 } 1702 1703 /* With the page set, use the generic suspend */ 1704 return genphy_suspend(phydev); 1705 1706 error: 1707 marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); 1708 return err; 1709 } 1710 1711 /* marvell_resume 1712 * 1713 * Some Marvell's phys have two modes: fiber and copper. 1714 * Both need to be resumed 1715 */ 1716 static int marvell_resume(struct phy_device *phydev) 1717 { 1718 int err; 1719 1720 /* Resume the fiber mode first */ 1721 if (!linkmode_test_bit(ETHTOOL_LINK_MODE_FIBRE_BIT, 1722 phydev->supported)) { 1723 err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE); 1724 if (err < 0) 1725 goto error; 1726 1727 /* With the page set, use the generic resume */ 1728 err = genphy_resume(phydev); 1729 if (err < 0) 1730 goto error; 1731 1732 /* Then, the copper link */ 1733 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); 1734 if (err < 0) 1735 goto error; 1736 } 1737 1738 /* With the page set, use the generic resume */ 1739 return genphy_resume(phydev); 1740 1741 error: 1742 marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE); 1743 return err; 1744 } 1745 1746 static int marvell_aneg_done(struct phy_device *phydev) 1747 { 1748 int retval = phy_read(phydev, MII_M1011_PHY_STATUS); 1749 1750 return (retval < 0) ? retval : (retval & MII_M1011_PHY_STATUS_RESOLVED); 1751 } 1752 1753 static void m88e1318_get_wol(struct phy_device *phydev, 1754 struct ethtool_wolinfo *wol) 1755 { 1756 int ret; 1757 1758 wol->supported = WAKE_MAGIC; 1759 wol->wolopts = 0; 1760 1761 ret = phy_read_paged(phydev, MII_MARVELL_WOL_PAGE, 1762 MII_88E1318S_PHY_WOL_CTRL); 1763 if (ret >= 0 && ret & MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE) 1764 wol->wolopts |= WAKE_MAGIC; 1765 } 1766 1767 static int m88e1318_set_wol(struct phy_device *phydev, 1768 struct ethtool_wolinfo *wol) 1769 { 1770 int err = 0, oldpage; 1771 1772 oldpage = phy_save_page(phydev); 1773 if (oldpage < 0) 1774 goto error; 1775 1776 if (wol->wolopts & WAKE_MAGIC) { 1777 /* Explicitly switch to page 0x00, just to be sure */ 1778 err = marvell_write_page(phydev, MII_MARVELL_COPPER_PAGE); 1779 if (err < 0) 1780 goto error; 1781 1782 /* If WOL event happened once, the LED[2] interrupt pin 1783 * will not be cleared unless we reading the interrupt status 1784 * register. If interrupts are in use, the normal interrupt 1785 * handling will clear the WOL event. Clear the WOL event 1786 * before enabling it if !phy_interrupt_is_valid() 1787 */ 1788 if (!phy_interrupt_is_valid(phydev)) 1789 __phy_read(phydev, MII_M1011_IEVENT); 1790 1791 /* Enable the WOL interrupt */ 1792 err = __phy_set_bits(phydev, MII_88E1318S_PHY_CSIER, 1793 MII_88E1318S_PHY_CSIER_WOL_EIE); 1794 if (err < 0) 1795 goto error; 1796 1797 err = marvell_write_page(phydev, MII_MARVELL_LED_PAGE); 1798 if (err < 0) 1799 goto error; 1800 1801 /* Setup LED[2] as interrupt pin (active low) */ 1802 err = __phy_modify(phydev, MII_88E1318S_PHY_LED_TCR, 1803 MII_88E1318S_PHY_LED_TCR_FORCE_INT, 1804 MII_88E1318S_PHY_LED_TCR_INTn_ENABLE | 1805 MII_88E1318S_PHY_LED_TCR_INT_ACTIVE_LOW); 1806 if (err < 0) 1807 goto error; 1808 1809 err = marvell_write_page(phydev, MII_MARVELL_WOL_PAGE); 1810 if (err < 0) 1811 goto error; 1812 1813 /* Store the device address for the magic packet */ 1814 err = __phy_write(phydev, MII_88E1318S_PHY_MAGIC_PACKET_WORD2, 1815 ((phydev->attached_dev->dev_addr[5] << 8) | 1816 phydev->attached_dev->dev_addr[4])); 1817 if (err < 0) 1818 goto error; 1819 err = __phy_write(phydev, MII_88E1318S_PHY_MAGIC_PACKET_WORD1, 1820 ((phydev->attached_dev->dev_addr[3] << 8) | 1821 phydev->attached_dev->dev_addr[2])); 1822 if (err < 0) 1823 goto error; 1824 err = __phy_write(phydev, MII_88E1318S_PHY_MAGIC_PACKET_WORD0, 1825 ((phydev->attached_dev->dev_addr[1] << 8) | 1826 phydev->attached_dev->dev_addr[0])); 1827 if (err < 0) 1828 goto error; 1829 1830 /* Clear WOL status and enable magic packet matching */ 1831 err = __phy_set_bits(phydev, MII_88E1318S_PHY_WOL_CTRL, 1832 MII_88E1318S_PHY_WOL_CTRL_CLEAR_WOL_STATUS | 1833 MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE); 1834 if (err < 0) 1835 goto error; 1836 } else { 1837 err = marvell_write_page(phydev, MII_MARVELL_WOL_PAGE); 1838 if (err < 0) 1839 goto error; 1840 1841 /* Clear WOL status and disable magic packet matching */ 1842 err = __phy_modify(phydev, MII_88E1318S_PHY_WOL_CTRL, 1843 MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE, 1844 MII_88E1318S_PHY_WOL_CTRL_CLEAR_WOL_STATUS); 1845 if (err < 0) 1846 goto error; 1847 } 1848 1849 error: 1850 return phy_restore_page(phydev, oldpage, err); 1851 } 1852 1853 static int marvell_get_sset_count(struct phy_device *phydev) 1854 { 1855 if (linkmode_test_bit(ETHTOOL_LINK_MODE_FIBRE_BIT, 1856 phydev->supported)) 1857 return ARRAY_SIZE(marvell_hw_stats); 1858 else 1859 return ARRAY_SIZE(marvell_hw_stats) - NB_FIBER_STATS; 1860 } 1861 1862 static void marvell_get_strings(struct phy_device *phydev, u8 *data) 1863 { 1864 int count = marvell_get_sset_count(phydev); 1865 int i; 1866 1867 for (i = 0; i < count; i++) { 1868 strlcpy(data + i * ETH_GSTRING_LEN, 1869 marvell_hw_stats[i].string, ETH_GSTRING_LEN); 1870 } 1871 } 1872 1873 static u64 marvell_get_stat(struct phy_device *phydev, int i) 1874 { 1875 struct marvell_hw_stat stat = marvell_hw_stats[i]; 1876 struct marvell_priv *priv = phydev->priv; 1877 int val; 1878 u64 ret; 1879 1880 val = phy_read_paged(phydev, stat.page, stat.reg); 1881 if (val < 0) { 1882 ret = U64_MAX; 1883 } else { 1884 val = val & ((1 << stat.bits) - 1); 1885 priv->stats[i] += val; 1886 ret = priv->stats[i]; 1887 } 1888 1889 return ret; 1890 } 1891 1892 static void marvell_get_stats(struct phy_device *phydev, 1893 struct ethtool_stats *stats, u64 *data) 1894 { 1895 int count = marvell_get_sset_count(phydev); 1896 int i; 1897 1898 for (i = 0; i < count; i++) 1899 data[i] = marvell_get_stat(phydev, i); 1900 } 1901 1902 static int marvell_vct5_wait_complete(struct phy_device *phydev) 1903 { 1904 int i; 1905 int val; 1906 1907 for (i = 0; i < 32; i++) { 1908 val = __phy_read(phydev, MII_VCT5_CTRL); 1909 if (val < 0) 1910 return val; 1911 1912 if (val & MII_VCT5_CTRL_COMPLETE) 1913 return 0; 1914 } 1915 1916 phydev_err(phydev, "Timeout while waiting for cable test to finish\n"); 1917 return -ETIMEDOUT; 1918 } 1919 1920 static int marvell_vct5_amplitude(struct phy_device *phydev, int pair) 1921 { 1922 int amplitude; 1923 int val; 1924 int reg; 1925 1926 reg = MII_VCT5_TX_RX_MDI0_COUPLING + pair; 1927 val = __phy_read(phydev, reg); 1928 1929 if (val < 0) 1930 return 0; 1931 1932 amplitude = (val & MII_VCT5_TX_RX_AMPLITUDE_MASK) >> 1933 MII_VCT5_TX_RX_AMPLITUDE_SHIFT; 1934 1935 if (!(val & MII_VCT5_TX_RX_COUPLING_POSITIVE_REFLECTION)) 1936 amplitude = -amplitude; 1937 1938 return 1000 * amplitude / 128; 1939 } 1940 1941 static u32 marvell_vct5_distance2cm(int distance) 1942 { 1943 return distance * 805 / 10; 1944 } 1945 1946 static u32 marvell_vct5_cm2distance(int cm) 1947 { 1948 return cm * 10 / 805; 1949 } 1950 1951 static int marvell_vct5_amplitude_distance(struct phy_device *phydev, 1952 int distance, int pair) 1953 { 1954 u16 reg; 1955 int err; 1956 int mV; 1957 int i; 1958 1959 err = __phy_write(phydev, MII_VCT5_SAMPLE_POINT_DISTANCE, 1960 distance); 1961 if (err) 1962 return err; 1963 1964 reg = MII_VCT5_CTRL_ENABLE | 1965 MII_VCT5_CTRL_TX_SAME_CHANNEL | 1966 MII_VCT5_CTRL_SAMPLES_DEFAULT | 1967 MII_VCT5_CTRL_SAMPLE_POINT | 1968 MII_VCT5_CTRL_PEEK_HYST_DEFAULT; 1969 err = __phy_write(phydev, MII_VCT5_CTRL, reg); 1970 if (err) 1971 return err; 1972 1973 err = marvell_vct5_wait_complete(phydev); 1974 if (err) 1975 return err; 1976 1977 for (i = 0; i < 4; i++) { 1978 if (pair != PHY_PAIR_ALL && i != pair) 1979 continue; 1980 1981 mV = marvell_vct5_amplitude(phydev, i); 1982 ethnl_cable_test_amplitude(phydev, i, mV); 1983 } 1984 1985 return 0; 1986 } 1987 1988 static int marvell_vct5_amplitude_graph(struct phy_device *phydev) 1989 { 1990 struct marvell_priv *priv = phydev->priv; 1991 int distance; 1992 u16 width; 1993 int page; 1994 int err; 1995 u16 reg; 1996 1997 if (priv->first <= TDR_SHORT_CABLE_LENGTH) 1998 width = MII_VCT5_TX_PULSE_CTRL_PULSE_WIDTH_32nS; 1999 else 2000 width = MII_VCT5_TX_PULSE_CTRL_PULSE_WIDTH_128nS; 2001 2002 reg = MII_VCT5_TX_PULSE_CTRL_GT_140m_46_86mV | 2003 MII_VCT5_TX_PULSE_CTRL_DONT_WAIT_LINK_DOWN | 2004 MII_VCT5_TX_PULSE_CTRL_MAX_AMP | width; 2005 2006 err = phy_write_paged(phydev, MII_MARVELL_VCT5_PAGE, 2007 MII_VCT5_TX_PULSE_CTRL, reg); 2008 if (err) 2009 return err; 2010 2011 /* Reading the TDR data is very MDIO heavy. We need to optimize 2012 * access to keep the time to a minimum. So lock the bus once, 2013 * and don't release it until complete. We can then avoid having 2014 * to change the page for every access, greatly speeding things 2015 * up. 2016 */ 2017 page = phy_select_page(phydev, MII_MARVELL_VCT5_PAGE); 2018 if (page < 0) 2019 goto restore_page; 2020 2021 for (distance = priv->first; 2022 distance <= priv->last; 2023 distance += priv->step) { 2024 err = marvell_vct5_amplitude_distance(phydev, distance, 2025 priv->pair); 2026 if (err) 2027 goto restore_page; 2028 2029 if (distance > TDR_SHORT_CABLE_LENGTH && 2030 width == MII_VCT5_TX_PULSE_CTRL_PULSE_WIDTH_32nS) { 2031 width = MII_VCT5_TX_PULSE_CTRL_PULSE_WIDTH_128nS; 2032 reg = MII_VCT5_TX_PULSE_CTRL_GT_140m_46_86mV | 2033 MII_VCT5_TX_PULSE_CTRL_DONT_WAIT_LINK_DOWN | 2034 MII_VCT5_TX_PULSE_CTRL_MAX_AMP | width; 2035 err = __phy_write(phydev, MII_VCT5_TX_PULSE_CTRL, reg); 2036 if (err) 2037 goto restore_page; 2038 } 2039 } 2040 2041 restore_page: 2042 return phy_restore_page(phydev, page, err); 2043 } 2044 2045 static int marvell_cable_test_start_common(struct phy_device *phydev) 2046 { 2047 int bmcr, bmsr, ret; 2048 2049 /* If auto-negotiation is enabled, but not complete, the cable 2050 * test never completes. So disable auto-neg. 2051 */ 2052 bmcr = phy_read(phydev, MII_BMCR); 2053 if (bmcr < 0) 2054 return bmcr; 2055 2056 bmsr = phy_read(phydev, MII_BMSR); 2057 2058 if (bmsr < 0) 2059 return bmsr; 2060 2061 if (bmcr & BMCR_ANENABLE) { 2062 ret = phy_clear_bits(phydev, MII_BMCR, BMCR_ANENABLE); 2063 if (ret < 0) 2064 return ret; 2065 ret = genphy_soft_reset(phydev); 2066 if (ret < 0) 2067 return ret; 2068 } 2069 2070 /* If the link is up, allow it some time to go down */ 2071 if (bmsr & BMSR_LSTATUS) 2072 msleep(1500); 2073 2074 return 0; 2075 } 2076 2077 static int marvell_vct7_cable_test_start(struct phy_device *phydev) 2078 { 2079 struct marvell_priv *priv = phydev->priv; 2080 int ret; 2081 2082 ret = marvell_cable_test_start_common(phydev); 2083 if (ret) 2084 return ret; 2085 2086 priv->cable_test_tdr = false; 2087 2088 /* Reset the VCT5 API control to defaults, otherwise 2089 * VCT7 does not work correctly. 2090 */ 2091 ret = phy_write_paged(phydev, MII_MARVELL_VCT5_PAGE, 2092 MII_VCT5_CTRL, 2093 MII_VCT5_CTRL_TX_SAME_CHANNEL | 2094 MII_VCT5_CTRL_SAMPLES_DEFAULT | 2095 MII_VCT5_CTRL_MODE_MAXIMUM_PEEK | 2096 MII_VCT5_CTRL_PEEK_HYST_DEFAULT); 2097 if (ret) 2098 return ret; 2099 2100 ret = phy_write_paged(phydev, MII_MARVELL_VCT5_PAGE, 2101 MII_VCT5_SAMPLE_POINT_DISTANCE, 0); 2102 if (ret) 2103 return ret; 2104 2105 return phy_write_paged(phydev, MII_MARVELL_VCT7_PAGE, 2106 MII_VCT7_CTRL, 2107 MII_VCT7_CTRL_RUN_NOW | 2108 MII_VCT7_CTRL_CENTIMETERS); 2109 } 2110 2111 static int marvell_vct5_cable_test_tdr_start(struct phy_device *phydev, 2112 const struct phy_tdr_config *cfg) 2113 { 2114 struct marvell_priv *priv = phydev->priv; 2115 int ret; 2116 2117 priv->cable_test_tdr = true; 2118 priv->first = marvell_vct5_cm2distance(cfg->first); 2119 priv->last = marvell_vct5_cm2distance(cfg->last); 2120 priv->step = marvell_vct5_cm2distance(cfg->step); 2121 priv->pair = cfg->pair; 2122 2123 if (priv->first > MII_VCT5_SAMPLE_POINT_DISTANCE_MAX) 2124 return -EINVAL; 2125 2126 if (priv->last > MII_VCT5_SAMPLE_POINT_DISTANCE_MAX) 2127 return -EINVAL; 2128 2129 /* Disable VCT7 */ 2130 ret = phy_write_paged(phydev, MII_MARVELL_VCT7_PAGE, 2131 MII_VCT7_CTRL, 0); 2132 if (ret) 2133 return ret; 2134 2135 ret = marvell_cable_test_start_common(phydev); 2136 if (ret) 2137 return ret; 2138 2139 ret = ethnl_cable_test_pulse(phydev, 1000); 2140 if (ret) 2141 return ret; 2142 2143 return ethnl_cable_test_step(phydev, 2144 marvell_vct5_distance2cm(priv->first), 2145 marvell_vct5_distance2cm(priv->last), 2146 marvell_vct5_distance2cm(priv->step)); 2147 } 2148 2149 static int marvell_vct7_distance_to_length(int distance, bool meter) 2150 { 2151 if (meter) 2152 distance *= 100; 2153 2154 return distance; 2155 } 2156 2157 static bool marvell_vct7_distance_valid(int result) 2158 { 2159 switch (result) { 2160 case MII_VCT7_RESULTS_OPEN: 2161 case MII_VCT7_RESULTS_SAME_SHORT: 2162 case MII_VCT7_RESULTS_CROSS_SHORT: 2163 return true; 2164 } 2165 return false; 2166 } 2167 2168 static int marvell_vct7_report_length(struct phy_device *phydev, 2169 int pair, bool meter) 2170 { 2171 int length; 2172 int ret; 2173 2174 ret = phy_read_paged(phydev, MII_MARVELL_VCT7_PAGE, 2175 MII_VCT7_PAIR_0_DISTANCE + pair); 2176 if (ret < 0) 2177 return ret; 2178 2179 length = marvell_vct7_distance_to_length(ret, meter); 2180 2181 ethnl_cable_test_fault_length(phydev, pair, length); 2182 2183 return 0; 2184 } 2185 2186 static int marvell_vct7_cable_test_report_trans(int result) 2187 { 2188 switch (result) { 2189 case MII_VCT7_RESULTS_OK: 2190 return ETHTOOL_A_CABLE_RESULT_CODE_OK; 2191 case MII_VCT7_RESULTS_OPEN: 2192 return ETHTOOL_A_CABLE_RESULT_CODE_OPEN; 2193 case MII_VCT7_RESULTS_SAME_SHORT: 2194 return ETHTOOL_A_CABLE_RESULT_CODE_SAME_SHORT; 2195 case MII_VCT7_RESULTS_CROSS_SHORT: 2196 return ETHTOOL_A_CABLE_RESULT_CODE_CROSS_SHORT; 2197 default: 2198 return ETHTOOL_A_CABLE_RESULT_CODE_UNSPEC; 2199 } 2200 } 2201 2202 static int marvell_vct7_cable_test_report(struct phy_device *phydev) 2203 { 2204 int pair0, pair1, pair2, pair3; 2205 bool meter; 2206 int ret; 2207 2208 ret = phy_read_paged(phydev, MII_MARVELL_VCT7_PAGE, 2209 MII_VCT7_RESULTS); 2210 if (ret < 0) 2211 return ret; 2212 2213 pair3 = (ret & MII_VCT7_RESULTS_PAIR3_MASK) >> 2214 MII_VCT7_RESULTS_PAIR3_SHIFT; 2215 pair2 = (ret & MII_VCT7_RESULTS_PAIR2_MASK) >> 2216 MII_VCT7_RESULTS_PAIR2_SHIFT; 2217 pair1 = (ret & MII_VCT7_RESULTS_PAIR1_MASK) >> 2218 MII_VCT7_RESULTS_PAIR1_SHIFT; 2219 pair0 = (ret & MII_VCT7_RESULTS_PAIR0_MASK) >> 2220 MII_VCT7_RESULTS_PAIR0_SHIFT; 2221 2222 ethnl_cable_test_result(phydev, ETHTOOL_A_CABLE_PAIR_A, 2223 marvell_vct7_cable_test_report_trans(pair0)); 2224 ethnl_cable_test_result(phydev, ETHTOOL_A_CABLE_PAIR_B, 2225 marvell_vct7_cable_test_report_trans(pair1)); 2226 ethnl_cable_test_result(phydev, ETHTOOL_A_CABLE_PAIR_C, 2227 marvell_vct7_cable_test_report_trans(pair2)); 2228 ethnl_cable_test_result(phydev, ETHTOOL_A_CABLE_PAIR_D, 2229 marvell_vct7_cable_test_report_trans(pair3)); 2230 2231 ret = phy_read_paged(phydev, MII_MARVELL_VCT7_PAGE, MII_VCT7_CTRL); 2232 if (ret < 0) 2233 return ret; 2234 2235 meter = ret & MII_VCT7_CTRL_METERS; 2236 2237 if (marvell_vct7_distance_valid(pair0)) 2238 marvell_vct7_report_length(phydev, 0, meter); 2239 if (marvell_vct7_distance_valid(pair1)) 2240 marvell_vct7_report_length(phydev, 1, meter); 2241 if (marvell_vct7_distance_valid(pair2)) 2242 marvell_vct7_report_length(phydev, 2, meter); 2243 if (marvell_vct7_distance_valid(pair3)) 2244 marvell_vct7_report_length(phydev, 3, meter); 2245 2246 return 0; 2247 } 2248 2249 static int marvell_vct7_cable_test_get_status(struct phy_device *phydev, 2250 bool *finished) 2251 { 2252 struct marvell_priv *priv = phydev->priv; 2253 int ret; 2254 2255 if (priv->cable_test_tdr) { 2256 ret = marvell_vct5_amplitude_graph(phydev); 2257 *finished = true; 2258 return ret; 2259 } 2260 2261 *finished = false; 2262 2263 ret = phy_read_paged(phydev, MII_MARVELL_VCT7_PAGE, 2264 MII_VCT7_CTRL); 2265 2266 if (ret < 0) 2267 return ret; 2268 2269 if (!(ret & MII_VCT7_CTRL_IN_PROGRESS)) { 2270 *finished = true; 2271 2272 return marvell_vct7_cable_test_report(phydev); 2273 } 2274 2275 return 0; 2276 } 2277 2278 #ifdef CONFIG_HWMON 2279 struct marvell_hwmon_ops { 2280 int (*config)(struct phy_device *phydev); 2281 int (*get_temp)(struct phy_device *phydev, long *temp); 2282 int (*get_temp_critical)(struct phy_device *phydev, long *temp); 2283 int (*set_temp_critical)(struct phy_device *phydev, long temp); 2284 int (*get_temp_alarm)(struct phy_device *phydev, long *alarm); 2285 }; 2286 2287 static const struct marvell_hwmon_ops * 2288 to_marvell_hwmon_ops(const struct phy_device *phydev) 2289 { 2290 return phydev->drv->driver_data; 2291 } 2292 2293 static int m88e1121_get_temp(struct phy_device *phydev, long *temp) 2294 { 2295 int oldpage; 2296 int ret = 0; 2297 int val; 2298 2299 *temp = 0; 2300 2301 oldpage = phy_select_page(phydev, MII_MARVELL_MISC_TEST_PAGE); 2302 if (oldpage < 0) 2303 goto error; 2304 2305 /* Enable temperature sensor */ 2306 ret = __phy_read(phydev, MII_88E1121_MISC_TEST); 2307 if (ret < 0) 2308 goto error; 2309 2310 ret = __phy_write(phydev, MII_88E1121_MISC_TEST, 2311 ret | MII_88E1121_MISC_TEST_TEMP_SENSOR_EN); 2312 if (ret < 0) 2313 goto error; 2314 2315 /* Wait for temperature to stabilize */ 2316 usleep_range(10000, 12000); 2317 2318 val = __phy_read(phydev, MII_88E1121_MISC_TEST); 2319 if (val < 0) { 2320 ret = val; 2321 goto error; 2322 } 2323 2324 /* Disable temperature sensor */ 2325 ret = __phy_write(phydev, MII_88E1121_MISC_TEST, 2326 ret & ~MII_88E1121_MISC_TEST_TEMP_SENSOR_EN); 2327 if (ret < 0) 2328 goto error; 2329 2330 *temp = ((val & MII_88E1121_MISC_TEST_TEMP_MASK) - 5) * 5000; 2331 2332 error: 2333 return phy_restore_page(phydev, oldpage, ret); 2334 } 2335 2336 static int m88e1510_get_temp(struct phy_device *phydev, long *temp) 2337 { 2338 int ret; 2339 2340 *temp = 0; 2341 2342 ret = phy_read_paged(phydev, MII_MARVELL_MISC_TEST_PAGE, 2343 MII_88E1510_TEMP_SENSOR); 2344 if (ret < 0) 2345 return ret; 2346 2347 *temp = ((ret & MII_88E1510_TEMP_SENSOR_MASK) - 25) * 1000; 2348 2349 return 0; 2350 } 2351 2352 static int m88e1510_get_temp_critical(struct phy_device *phydev, long *temp) 2353 { 2354 int ret; 2355 2356 *temp = 0; 2357 2358 ret = phy_read_paged(phydev, MII_MARVELL_MISC_TEST_PAGE, 2359 MII_88E1121_MISC_TEST); 2360 if (ret < 0) 2361 return ret; 2362 2363 *temp = (((ret & MII_88E1510_MISC_TEST_TEMP_THRESHOLD_MASK) >> 2364 MII_88E1510_MISC_TEST_TEMP_THRESHOLD_SHIFT) * 5) - 25; 2365 /* convert to mC */ 2366 *temp *= 1000; 2367 2368 return 0; 2369 } 2370 2371 static int m88e1510_set_temp_critical(struct phy_device *phydev, long temp) 2372 { 2373 temp = temp / 1000; 2374 temp = clamp_val(DIV_ROUND_CLOSEST(temp, 5) + 5, 0, 0x1f); 2375 2376 return phy_modify_paged(phydev, MII_MARVELL_MISC_TEST_PAGE, 2377 MII_88E1121_MISC_TEST, 2378 MII_88E1510_MISC_TEST_TEMP_THRESHOLD_MASK, 2379 temp << MII_88E1510_MISC_TEST_TEMP_THRESHOLD_SHIFT); 2380 } 2381 2382 static int m88e1510_get_temp_alarm(struct phy_device *phydev, long *alarm) 2383 { 2384 int ret; 2385 2386 *alarm = false; 2387 2388 ret = phy_read_paged(phydev, MII_MARVELL_MISC_TEST_PAGE, 2389 MII_88E1121_MISC_TEST); 2390 if (ret < 0) 2391 return ret; 2392 2393 *alarm = !!(ret & MII_88E1510_MISC_TEST_TEMP_IRQ); 2394 2395 return 0; 2396 } 2397 2398 static int m88e6390_get_temp(struct phy_device *phydev, long *temp) 2399 { 2400 int sum = 0; 2401 int oldpage; 2402 int ret = 0; 2403 int i; 2404 2405 *temp = 0; 2406 2407 oldpage = phy_select_page(phydev, MII_MARVELL_MISC_TEST_PAGE); 2408 if (oldpage < 0) 2409 goto error; 2410 2411 /* Enable temperature sensor */ 2412 ret = __phy_read(phydev, MII_88E6390_MISC_TEST); 2413 if (ret < 0) 2414 goto error; 2415 2416 ret &= ~MII_88E6390_MISC_TEST_TEMP_SENSOR_MASK; 2417 ret |= MII_88E6390_MISC_TEST_TEMP_SENSOR_ENABLE_SAMPLE_1S; 2418 2419 ret = __phy_write(phydev, MII_88E6390_MISC_TEST, ret); 2420 if (ret < 0) 2421 goto error; 2422 2423 /* Wait for temperature to stabilize */ 2424 usleep_range(10000, 12000); 2425 2426 /* Reading the temperature sense has an errata. You need to read 2427 * a number of times and take an average. 2428 */ 2429 for (i = 0; i < MII_88E6390_TEMP_SENSOR_SAMPLES; i++) { 2430 ret = __phy_read(phydev, MII_88E6390_TEMP_SENSOR); 2431 if (ret < 0) 2432 goto error; 2433 sum += ret & MII_88E6390_TEMP_SENSOR_MASK; 2434 } 2435 2436 sum /= MII_88E6390_TEMP_SENSOR_SAMPLES; 2437 *temp = (sum - 75) * 1000; 2438 2439 /* Disable temperature sensor */ 2440 ret = __phy_read(phydev, MII_88E6390_MISC_TEST); 2441 if (ret < 0) 2442 goto error; 2443 2444 ret = ret & ~MII_88E6390_MISC_TEST_TEMP_SENSOR_MASK; 2445 ret |= MII_88E6390_MISC_TEST_TEMP_SENSOR_DISABLE; 2446 2447 ret = __phy_write(phydev, MII_88E6390_MISC_TEST, ret); 2448 2449 error: 2450 phy_restore_page(phydev, oldpage, ret); 2451 2452 return ret; 2453 } 2454 2455 static int m88e6393_get_temp(struct phy_device *phydev, long *temp) 2456 { 2457 int err; 2458 2459 err = m88e1510_get_temp(phydev, temp); 2460 2461 /* 88E1510 measures T + 25, while the PHY on 88E6393X switch 2462 * T + 75, so we have to subtract another 50 2463 */ 2464 *temp -= 50000; 2465 2466 return err; 2467 } 2468 2469 static int m88e6393_get_temp_critical(struct phy_device *phydev, long *temp) 2470 { 2471 int ret; 2472 2473 *temp = 0; 2474 2475 ret = phy_read_paged(phydev, MII_MARVELL_MISC_TEST_PAGE, 2476 MII_88E6390_TEMP_SENSOR); 2477 if (ret < 0) 2478 return ret; 2479 2480 *temp = (((ret & MII_88E6393_TEMP_SENSOR_THRESHOLD_MASK) >> 2481 MII_88E6393_TEMP_SENSOR_THRESHOLD_SHIFT) - 75) * 1000; 2482 2483 return 0; 2484 } 2485 2486 static int m88e6393_set_temp_critical(struct phy_device *phydev, long temp) 2487 { 2488 temp = (temp / 1000) + 75; 2489 2490 return phy_modify_paged(phydev, MII_MARVELL_MISC_TEST_PAGE, 2491 MII_88E6390_TEMP_SENSOR, 2492 MII_88E6393_TEMP_SENSOR_THRESHOLD_MASK, 2493 temp << MII_88E6393_TEMP_SENSOR_THRESHOLD_SHIFT); 2494 } 2495 2496 static int m88e6393_hwmon_config(struct phy_device *phydev) 2497 { 2498 int err; 2499 2500 err = m88e6393_set_temp_critical(phydev, 100000); 2501 if (err) 2502 return err; 2503 2504 return phy_modify_paged(phydev, MII_MARVELL_MISC_TEST_PAGE, 2505 MII_88E6390_MISC_TEST, 2506 MII_88E6390_MISC_TEST_TEMP_SENSOR_MASK | 2507 MII_88E6393_MISC_TEST_SAMPLES_MASK | 2508 MII_88E6393_MISC_TEST_RATE_MASK, 2509 MII_88E6390_MISC_TEST_TEMP_SENSOR_ENABLE | 2510 MII_88E6393_MISC_TEST_SAMPLES_2048 | 2511 MII_88E6393_MISC_TEST_RATE_2_3MS); 2512 } 2513 2514 static int marvell_hwmon_read(struct device *dev, enum hwmon_sensor_types type, 2515 u32 attr, int channel, long *temp) 2516 { 2517 struct phy_device *phydev = dev_get_drvdata(dev); 2518 const struct marvell_hwmon_ops *ops = to_marvell_hwmon_ops(phydev); 2519 int err = -EOPNOTSUPP; 2520 2521 switch (attr) { 2522 case hwmon_temp_input: 2523 if (ops->get_temp) 2524 err = ops->get_temp(phydev, temp); 2525 break; 2526 case hwmon_temp_crit: 2527 if (ops->get_temp_critical) 2528 err = ops->get_temp_critical(phydev, temp); 2529 break; 2530 case hwmon_temp_max_alarm: 2531 if (ops->get_temp_alarm) 2532 err = ops->get_temp_alarm(phydev, temp); 2533 break; 2534 } 2535 2536 return err; 2537 } 2538 2539 static int marvell_hwmon_write(struct device *dev, enum hwmon_sensor_types type, 2540 u32 attr, int channel, long temp) 2541 { 2542 struct phy_device *phydev = dev_get_drvdata(dev); 2543 const struct marvell_hwmon_ops *ops = to_marvell_hwmon_ops(phydev); 2544 int err = -EOPNOTSUPP; 2545 2546 switch (attr) { 2547 case hwmon_temp_crit: 2548 if (ops->set_temp_critical) 2549 err = ops->set_temp_critical(phydev, temp); 2550 break; 2551 } 2552 2553 return err; 2554 } 2555 2556 static umode_t marvell_hwmon_is_visible(const void *data, 2557 enum hwmon_sensor_types type, 2558 u32 attr, int channel) 2559 { 2560 const struct phy_device *phydev = data; 2561 const struct marvell_hwmon_ops *ops = to_marvell_hwmon_ops(phydev); 2562 2563 if (type != hwmon_temp) 2564 return 0; 2565 2566 switch (attr) { 2567 case hwmon_temp_input: 2568 return ops->get_temp ? 0444 : 0; 2569 case hwmon_temp_max_alarm: 2570 return ops->get_temp_alarm ? 0444 : 0; 2571 case hwmon_temp_crit: 2572 return (ops->get_temp_critical ? 0444 : 0) | 2573 (ops->set_temp_critical ? 0200 : 0); 2574 default: 2575 return 0; 2576 } 2577 } 2578 2579 static u32 marvell_hwmon_chip_config[] = { 2580 HWMON_C_REGISTER_TZ, 2581 0 2582 }; 2583 2584 static const struct hwmon_channel_info marvell_hwmon_chip = { 2585 .type = hwmon_chip, 2586 .config = marvell_hwmon_chip_config, 2587 }; 2588 2589 /* we can define HWMON_T_CRIT and HWMON_T_MAX_ALARM even though these are not 2590 * defined for all PHYs, because the hwmon code checks whether the attributes 2591 * exists via the .is_visible method 2592 */ 2593 static u32 marvell_hwmon_temp_config[] = { 2594 HWMON_T_INPUT | HWMON_T_CRIT | HWMON_T_MAX_ALARM, 2595 0 2596 }; 2597 2598 static const struct hwmon_channel_info marvell_hwmon_temp = { 2599 .type = hwmon_temp, 2600 .config = marvell_hwmon_temp_config, 2601 }; 2602 2603 static const struct hwmon_channel_info *marvell_hwmon_info[] = { 2604 &marvell_hwmon_chip, 2605 &marvell_hwmon_temp, 2606 NULL 2607 }; 2608 2609 static const struct hwmon_ops marvell_hwmon_hwmon_ops = { 2610 .is_visible = marvell_hwmon_is_visible, 2611 .read = marvell_hwmon_read, 2612 .write = marvell_hwmon_write, 2613 }; 2614 2615 static const struct hwmon_chip_info marvell_hwmon_chip_info = { 2616 .ops = &marvell_hwmon_hwmon_ops, 2617 .info = marvell_hwmon_info, 2618 }; 2619 2620 static int marvell_hwmon_name(struct phy_device *phydev) 2621 { 2622 struct marvell_priv *priv = phydev->priv; 2623 struct device *dev = &phydev->mdio.dev; 2624 const char *devname = dev_name(dev); 2625 size_t len = strlen(devname); 2626 int i, j; 2627 2628 priv->hwmon_name = devm_kzalloc(dev, len, GFP_KERNEL); 2629 if (!priv->hwmon_name) 2630 return -ENOMEM; 2631 2632 for (i = j = 0; i < len && devname[i]; i++) { 2633 if (isalnum(devname[i])) 2634 priv->hwmon_name[j++] = devname[i]; 2635 } 2636 2637 return 0; 2638 } 2639 2640 static int marvell_hwmon_probe(struct phy_device *phydev) 2641 { 2642 const struct marvell_hwmon_ops *ops = to_marvell_hwmon_ops(phydev); 2643 struct marvell_priv *priv = phydev->priv; 2644 struct device *dev = &phydev->mdio.dev; 2645 int err; 2646 2647 if (!ops) 2648 return 0; 2649 2650 err = marvell_hwmon_name(phydev); 2651 if (err) 2652 return err; 2653 2654 priv->hwmon_dev = devm_hwmon_device_register_with_info( 2655 dev, priv->hwmon_name, phydev, &marvell_hwmon_chip_info, NULL); 2656 if (IS_ERR(priv->hwmon_dev)) 2657 return PTR_ERR(priv->hwmon_dev); 2658 2659 if (ops->config) 2660 err = ops->config(phydev); 2661 2662 return err; 2663 } 2664 2665 static const struct marvell_hwmon_ops m88e1121_hwmon_ops = { 2666 .get_temp = m88e1121_get_temp, 2667 }; 2668 2669 static const struct marvell_hwmon_ops m88e1510_hwmon_ops = { 2670 .get_temp = m88e1510_get_temp, 2671 .get_temp_critical = m88e1510_get_temp_critical, 2672 .set_temp_critical = m88e1510_set_temp_critical, 2673 .get_temp_alarm = m88e1510_get_temp_alarm, 2674 }; 2675 2676 static const struct marvell_hwmon_ops m88e6390_hwmon_ops = { 2677 .get_temp = m88e6390_get_temp, 2678 }; 2679 2680 static const struct marvell_hwmon_ops m88e6393_hwmon_ops = { 2681 .config = m88e6393_hwmon_config, 2682 .get_temp = m88e6393_get_temp, 2683 .get_temp_critical = m88e6393_get_temp_critical, 2684 .set_temp_critical = m88e6393_set_temp_critical, 2685 .get_temp_alarm = m88e1510_get_temp_alarm, 2686 }; 2687 2688 #define DEF_MARVELL_HWMON_OPS(s) (&(s)) 2689 2690 #else 2691 2692 #define DEF_MARVELL_HWMON_OPS(s) NULL 2693 2694 static int marvell_hwmon_probe(struct phy_device *phydev) 2695 { 2696 return 0; 2697 } 2698 #endif 2699 2700 static int marvell_probe(struct phy_device *phydev) 2701 { 2702 struct marvell_priv *priv; 2703 2704 priv = devm_kzalloc(&phydev->mdio.dev, sizeof(*priv), GFP_KERNEL); 2705 if (!priv) 2706 return -ENOMEM; 2707 2708 phydev->priv = priv; 2709 2710 return marvell_hwmon_probe(phydev); 2711 } 2712 2713 static int m88e1510_sfp_insert(void *upstream, const struct sfp_eeprom_id *id) 2714 { 2715 struct phy_device *phydev = upstream; 2716 phy_interface_t interface; 2717 struct device *dev; 2718 int oldpage; 2719 int ret = 0; 2720 u16 mode; 2721 2722 __ETHTOOL_DECLARE_LINK_MODE_MASK(supported) = { 0, }; 2723 2724 dev = &phydev->mdio.dev; 2725 2726 sfp_parse_support(phydev->sfp_bus, id, supported); 2727 interface = sfp_select_interface(phydev->sfp_bus, supported); 2728 2729 dev_info(dev, "%s SFP module inserted\n", phy_modes(interface)); 2730 2731 switch (interface) { 2732 case PHY_INTERFACE_MODE_1000BASEX: 2733 mode = MII_88E1510_GEN_CTRL_REG_1_MODE_RGMII_1000X; 2734 2735 break; 2736 case PHY_INTERFACE_MODE_100BASEX: 2737 mode = MII_88E1510_GEN_CTRL_REG_1_MODE_RGMII_100FX; 2738 2739 break; 2740 case PHY_INTERFACE_MODE_SGMII: 2741 mode = MII_88E1510_GEN_CTRL_REG_1_MODE_RGMII_SGMII; 2742 2743 break; 2744 default: 2745 dev_err(dev, "Incompatible SFP module inserted\n"); 2746 2747 return -EINVAL; 2748 } 2749 2750 oldpage = phy_select_page(phydev, MII_MARVELL_MODE_PAGE); 2751 if (oldpage < 0) 2752 goto error; 2753 2754 ret = __phy_modify(phydev, MII_88E1510_GEN_CTRL_REG_1, 2755 MII_88E1510_GEN_CTRL_REG_1_MODE_MASK, mode); 2756 if (ret < 0) 2757 goto error; 2758 2759 ret = __phy_set_bits(phydev, MII_88E1510_GEN_CTRL_REG_1, 2760 MII_88E1510_GEN_CTRL_REG_1_RESET); 2761 2762 error: 2763 return phy_restore_page(phydev, oldpage, ret); 2764 } 2765 2766 static void m88e1510_sfp_remove(void *upstream) 2767 { 2768 struct phy_device *phydev = upstream; 2769 int oldpage; 2770 int ret = 0; 2771 2772 oldpage = phy_select_page(phydev, MII_MARVELL_MODE_PAGE); 2773 if (oldpage < 0) 2774 goto error; 2775 2776 ret = __phy_modify(phydev, MII_88E1510_GEN_CTRL_REG_1, 2777 MII_88E1510_GEN_CTRL_REG_1_MODE_MASK, 2778 MII_88E1510_GEN_CTRL_REG_1_MODE_RGMII); 2779 if (ret < 0) 2780 goto error; 2781 2782 ret = __phy_set_bits(phydev, MII_88E1510_GEN_CTRL_REG_1, 2783 MII_88E1510_GEN_CTRL_REG_1_RESET); 2784 2785 error: 2786 phy_restore_page(phydev, oldpage, ret); 2787 } 2788 2789 static const struct sfp_upstream_ops m88e1510_sfp_ops = { 2790 .module_insert = m88e1510_sfp_insert, 2791 .module_remove = m88e1510_sfp_remove, 2792 .attach = phy_sfp_attach, 2793 .detach = phy_sfp_detach, 2794 }; 2795 2796 static int m88e1510_probe(struct phy_device *phydev) 2797 { 2798 int err; 2799 2800 err = marvell_probe(phydev); 2801 if (err) 2802 return err; 2803 2804 return phy_sfp_probe(phydev, &m88e1510_sfp_ops); 2805 } 2806 2807 static struct phy_driver marvell_drivers[] = { 2808 { 2809 .phy_id = MARVELL_PHY_ID_88E1101, 2810 .phy_id_mask = MARVELL_PHY_ID_MASK, 2811 .name = "Marvell 88E1101", 2812 /* PHY_GBIT_FEATURES */ 2813 .probe = marvell_probe, 2814 .config_init = marvell_config_init, 2815 .config_aneg = m88e1101_config_aneg, 2816 .config_intr = marvell_config_intr, 2817 .handle_interrupt = marvell_handle_interrupt, 2818 .resume = genphy_resume, 2819 .suspend = genphy_suspend, 2820 .read_page = marvell_read_page, 2821 .write_page = marvell_write_page, 2822 .get_sset_count = marvell_get_sset_count, 2823 .get_strings = marvell_get_strings, 2824 .get_stats = marvell_get_stats, 2825 }, 2826 { 2827 .phy_id = MARVELL_PHY_ID_88E1112, 2828 .phy_id_mask = MARVELL_PHY_ID_MASK, 2829 .name = "Marvell 88E1112", 2830 /* PHY_GBIT_FEATURES */ 2831 .probe = marvell_probe, 2832 .config_init = m88e1112_config_init, 2833 .config_aneg = marvell_config_aneg, 2834 .config_intr = marvell_config_intr, 2835 .handle_interrupt = marvell_handle_interrupt, 2836 .resume = genphy_resume, 2837 .suspend = genphy_suspend, 2838 .read_page = marvell_read_page, 2839 .write_page = marvell_write_page, 2840 .get_sset_count = marvell_get_sset_count, 2841 .get_strings = marvell_get_strings, 2842 .get_stats = marvell_get_stats, 2843 .get_tunable = m88e1011_get_tunable, 2844 .set_tunable = m88e1011_set_tunable, 2845 }, 2846 { 2847 .phy_id = MARVELL_PHY_ID_88E1111, 2848 .phy_id_mask = MARVELL_PHY_ID_MASK, 2849 .name = "Marvell 88E1111", 2850 /* PHY_GBIT_FEATURES */ 2851 .probe = marvell_probe, 2852 .config_init = m88e1111gbe_config_init, 2853 .config_aneg = m88e1111_config_aneg, 2854 .read_status = marvell_read_status, 2855 .config_intr = marvell_config_intr, 2856 .handle_interrupt = marvell_handle_interrupt, 2857 .resume = genphy_resume, 2858 .suspend = genphy_suspend, 2859 .read_page = marvell_read_page, 2860 .write_page = marvell_write_page, 2861 .get_sset_count = marvell_get_sset_count, 2862 .get_strings = marvell_get_strings, 2863 .get_stats = marvell_get_stats, 2864 .get_tunable = m88e1111_get_tunable, 2865 .set_tunable = m88e1111_set_tunable, 2866 }, 2867 { 2868 .phy_id = MARVELL_PHY_ID_88E1111_FINISAR, 2869 .phy_id_mask = MARVELL_PHY_ID_MASK, 2870 .name = "Marvell 88E1111 (Finisar)", 2871 /* PHY_GBIT_FEATURES */ 2872 .probe = marvell_probe, 2873 .config_init = m88e1111gbe_config_init, 2874 .config_aneg = m88e1111_config_aneg, 2875 .read_status = marvell_read_status, 2876 .config_intr = marvell_config_intr, 2877 .handle_interrupt = marvell_handle_interrupt, 2878 .resume = genphy_resume, 2879 .suspend = genphy_suspend, 2880 .read_page = marvell_read_page, 2881 .write_page = marvell_write_page, 2882 .get_sset_count = marvell_get_sset_count, 2883 .get_strings = marvell_get_strings, 2884 .get_stats = marvell_get_stats, 2885 .get_tunable = m88e1111_get_tunable, 2886 .set_tunable = m88e1111_set_tunable, 2887 }, 2888 { 2889 .phy_id = MARVELL_PHY_ID_88E1118, 2890 .phy_id_mask = MARVELL_PHY_ID_MASK, 2891 .name = "Marvell 88E1118", 2892 /* PHY_GBIT_FEATURES */ 2893 .probe = marvell_probe, 2894 .config_init = m88e1118_config_init, 2895 .config_aneg = m88e1118_config_aneg, 2896 .config_intr = marvell_config_intr, 2897 .handle_interrupt = marvell_handle_interrupt, 2898 .resume = genphy_resume, 2899 .suspend = genphy_suspend, 2900 .read_page = marvell_read_page, 2901 .write_page = marvell_write_page, 2902 .get_sset_count = marvell_get_sset_count, 2903 .get_strings = marvell_get_strings, 2904 .get_stats = marvell_get_stats, 2905 }, 2906 { 2907 .phy_id = MARVELL_PHY_ID_88E1121R, 2908 .phy_id_mask = MARVELL_PHY_ID_MASK, 2909 .name = "Marvell 88E1121R", 2910 .driver_data = DEF_MARVELL_HWMON_OPS(m88e1121_hwmon_ops), 2911 /* PHY_GBIT_FEATURES */ 2912 .probe = marvell_probe, 2913 .config_init = marvell_1011gbe_config_init, 2914 .config_aneg = m88e1121_config_aneg, 2915 .read_status = marvell_read_status, 2916 .config_intr = marvell_config_intr, 2917 .handle_interrupt = marvell_handle_interrupt, 2918 .resume = genphy_resume, 2919 .suspend = genphy_suspend, 2920 .read_page = marvell_read_page, 2921 .write_page = marvell_write_page, 2922 .get_sset_count = marvell_get_sset_count, 2923 .get_strings = marvell_get_strings, 2924 .get_stats = marvell_get_stats, 2925 .get_tunable = m88e1011_get_tunable, 2926 .set_tunable = m88e1011_set_tunable, 2927 }, 2928 { 2929 .phy_id = MARVELL_PHY_ID_88E1318S, 2930 .phy_id_mask = MARVELL_PHY_ID_MASK, 2931 .name = "Marvell 88E1318S", 2932 /* PHY_GBIT_FEATURES */ 2933 .probe = marvell_probe, 2934 .config_init = m88e1318_config_init, 2935 .config_aneg = m88e1318_config_aneg, 2936 .read_status = marvell_read_status, 2937 .config_intr = marvell_config_intr, 2938 .handle_interrupt = marvell_handle_interrupt, 2939 .get_wol = m88e1318_get_wol, 2940 .set_wol = m88e1318_set_wol, 2941 .resume = genphy_resume, 2942 .suspend = genphy_suspend, 2943 .read_page = marvell_read_page, 2944 .write_page = marvell_write_page, 2945 .get_sset_count = marvell_get_sset_count, 2946 .get_strings = marvell_get_strings, 2947 .get_stats = marvell_get_stats, 2948 }, 2949 { 2950 .phy_id = MARVELL_PHY_ID_88E1145, 2951 .phy_id_mask = MARVELL_PHY_ID_MASK, 2952 .name = "Marvell 88E1145", 2953 /* PHY_GBIT_FEATURES */ 2954 .probe = marvell_probe, 2955 .config_init = m88e1145_config_init, 2956 .config_aneg = m88e1101_config_aneg, 2957 .config_intr = marvell_config_intr, 2958 .handle_interrupt = marvell_handle_interrupt, 2959 .resume = genphy_resume, 2960 .suspend = genphy_suspend, 2961 .read_page = marvell_read_page, 2962 .write_page = marvell_write_page, 2963 .get_sset_count = marvell_get_sset_count, 2964 .get_strings = marvell_get_strings, 2965 .get_stats = marvell_get_stats, 2966 .get_tunable = m88e1111_get_tunable, 2967 .set_tunable = m88e1111_set_tunable, 2968 }, 2969 { 2970 .phy_id = MARVELL_PHY_ID_88E1149R, 2971 .phy_id_mask = MARVELL_PHY_ID_MASK, 2972 .name = "Marvell 88E1149R", 2973 /* PHY_GBIT_FEATURES */ 2974 .probe = marvell_probe, 2975 .config_init = m88e1149_config_init, 2976 .config_aneg = m88e1118_config_aneg, 2977 .config_intr = marvell_config_intr, 2978 .handle_interrupt = marvell_handle_interrupt, 2979 .resume = genphy_resume, 2980 .suspend = genphy_suspend, 2981 .read_page = marvell_read_page, 2982 .write_page = marvell_write_page, 2983 .get_sset_count = marvell_get_sset_count, 2984 .get_strings = marvell_get_strings, 2985 .get_stats = marvell_get_stats, 2986 }, 2987 { 2988 .phy_id = MARVELL_PHY_ID_88E1240, 2989 .phy_id_mask = MARVELL_PHY_ID_MASK, 2990 .name = "Marvell 88E1240", 2991 /* PHY_GBIT_FEATURES */ 2992 .probe = marvell_probe, 2993 .config_init = m88e1112_config_init, 2994 .config_aneg = marvell_config_aneg, 2995 .config_intr = marvell_config_intr, 2996 .handle_interrupt = marvell_handle_interrupt, 2997 .resume = genphy_resume, 2998 .suspend = genphy_suspend, 2999 .read_page = marvell_read_page, 3000 .write_page = marvell_write_page, 3001 .get_sset_count = marvell_get_sset_count, 3002 .get_strings = marvell_get_strings, 3003 .get_stats = marvell_get_stats, 3004 .get_tunable = m88e1011_get_tunable, 3005 .set_tunable = m88e1011_set_tunable, 3006 }, 3007 { 3008 .phy_id = MARVELL_PHY_ID_88E1116R, 3009 .phy_id_mask = MARVELL_PHY_ID_MASK, 3010 .name = "Marvell 88E1116R", 3011 /* PHY_GBIT_FEATURES */ 3012 .probe = marvell_probe, 3013 .config_init = m88e1116r_config_init, 3014 .config_intr = marvell_config_intr, 3015 .handle_interrupt = marvell_handle_interrupt, 3016 .resume = genphy_resume, 3017 .suspend = genphy_suspend, 3018 .read_page = marvell_read_page, 3019 .write_page = marvell_write_page, 3020 .get_sset_count = marvell_get_sset_count, 3021 .get_strings = marvell_get_strings, 3022 .get_stats = marvell_get_stats, 3023 .get_tunable = m88e1011_get_tunable, 3024 .set_tunable = m88e1011_set_tunable, 3025 }, 3026 { 3027 .phy_id = MARVELL_PHY_ID_88E1510, 3028 .phy_id_mask = MARVELL_PHY_ID_MASK, 3029 .name = "Marvell 88E1510", 3030 .driver_data = DEF_MARVELL_HWMON_OPS(m88e1510_hwmon_ops), 3031 .features = PHY_GBIT_FIBRE_FEATURES, 3032 .flags = PHY_POLL_CABLE_TEST, 3033 .probe = m88e1510_probe, 3034 .config_init = m88e1510_config_init, 3035 .config_aneg = m88e1510_config_aneg, 3036 .read_status = marvell_read_status, 3037 .config_intr = marvell_config_intr, 3038 .handle_interrupt = marvell_handle_interrupt, 3039 .get_wol = m88e1318_get_wol, 3040 .set_wol = m88e1318_set_wol, 3041 .resume = marvell_resume, 3042 .suspend = marvell_suspend, 3043 .read_page = marvell_read_page, 3044 .write_page = marvell_write_page, 3045 .get_sset_count = marvell_get_sset_count, 3046 .get_strings = marvell_get_strings, 3047 .get_stats = marvell_get_stats, 3048 .set_loopback = genphy_loopback, 3049 .get_tunable = m88e1011_get_tunable, 3050 .set_tunable = m88e1011_set_tunable, 3051 .cable_test_start = marvell_vct7_cable_test_start, 3052 .cable_test_tdr_start = marvell_vct5_cable_test_tdr_start, 3053 .cable_test_get_status = marvell_vct7_cable_test_get_status, 3054 }, 3055 { 3056 .phy_id = MARVELL_PHY_ID_88E1540, 3057 .phy_id_mask = MARVELL_PHY_ID_MASK, 3058 .name = "Marvell 88E1540", 3059 .driver_data = DEF_MARVELL_HWMON_OPS(m88e1510_hwmon_ops), 3060 /* PHY_GBIT_FEATURES */ 3061 .flags = PHY_POLL_CABLE_TEST, 3062 .probe = marvell_probe, 3063 .config_init = marvell_1011gbe_config_init, 3064 .config_aneg = m88e1510_config_aneg, 3065 .read_status = marvell_read_status, 3066 .config_intr = marvell_config_intr, 3067 .handle_interrupt = marvell_handle_interrupt, 3068 .resume = genphy_resume, 3069 .suspend = genphy_suspend, 3070 .read_page = marvell_read_page, 3071 .write_page = marvell_write_page, 3072 .get_sset_count = marvell_get_sset_count, 3073 .get_strings = marvell_get_strings, 3074 .get_stats = marvell_get_stats, 3075 .get_tunable = m88e1540_get_tunable, 3076 .set_tunable = m88e1540_set_tunable, 3077 .cable_test_start = marvell_vct7_cable_test_start, 3078 .cable_test_tdr_start = marvell_vct5_cable_test_tdr_start, 3079 .cable_test_get_status = marvell_vct7_cable_test_get_status, 3080 }, 3081 { 3082 .phy_id = MARVELL_PHY_ID_88E1545, 3083 .phy_id_mask = MARVELL_PHY_ID_MASK, 3084 .name = "Marvell 88E1545", 3085 .driver_data = DEF_MARVELL_HWMON_OPS(m88e1510_hwmon_ops), 3086 .probe = marvell_probe, 3087 /* PHY_GBIT_FEATURES */ 3088 .flags = PHY_POLL_CABLE_TEST, 3089 .config_init = marvell_1011gbe_config_init, 3090 .config_aneg = m88e1510_config_aneg, 3091 .read_status = marvell_read_status, 3092 .config_intr = marvell_config_intr, 3093 .handle_interrupt = marvell_handle_interrupt, 3094 .resume = genphy_resume, 3095 .suspend = genphy_suspend, 3096 .read_page = marvell_read_page, 3097 .write_page = marvell_write_page, 3098 .get_sset_count = marvell_get_sset_count, 3099 .get_strings = marvell_get_strings, 3100 .get_stats = marvell_get_stats, 3101 .get_tunable = m88e1540_get_tunable, 3102 .set_tunable = m88e1540_set_tunable, 3103 .cable_test_start = marvell_vct7_cable_test_start, 3104 .cable_test_tdr_start = marvell_vct5_cable_test_tdr_start, 3105 .cable_test_get_status = marvell_vct7_cable_test_get_status, 3106 }, 3107 { 3108 .phy_id = MARVELL_PHY_ID_88E3016, 3109 .phy_id_mask = MARVELL_PHY_ID_MASK, 3110 .name = "Marvell 88E3016", 3111 /* PHY_BASIC_FEATURES */ 3112 .probe = marvell_probe, 3113 .config_init = m88e3016_config_init, 3114 .aneg_done = marvell_aneg_done, 3115 .read_status = marvell_read_status, 3116 .config_intr = marvell_config_intr, 3117 .handle_interrupt = marvell_handle_interrupt, 3118 .resume = genphy_resume, 3119 .suspend = genphy_suspend, 3120 .read_page = marvell_read_page, 3121 .write_page = marvell_write_page, 3122 .get_sset_count = marvell_get_sset_count, 3123 .get_strings = marvell_get_strings, 3124 .get_stats = marvell_get_stats, 3125 }, 3126 { 3127 .phy_id = MARVELL_PHY_ID_88E6341_FAMILY, 3128 .phy_id_mask = MARVELL_PHY_ID_MASK, 3129 .name = "Marvell 88E6341 Family", 3130 .driver_data = DEF_MARVELL_HWMON_OPS(m88e1510_hwmon_ops), 3131 /* PHY_GBIT_FEATURES */ 3132 .flags = PHY_POLL_CABLE_TEST, 3133 .probe = marvell_probe, 3134 .config_init = marvell_1011gbe_config_init, 3135 .config_aneg = m88e6390_config_aneg, 3136 .read_status = marvell_read_status, 3137 .config_intr = marvell_config_intr, 3138 .handle_interrupt = marvell_handle_interrupt, 3139 .resume = genphy_resume, 3140 .suspend = genphy_suspend, 3141 .read_page = marvell_read_page, 3142 .write_page = marvell_write_page, 3143 .get_sset_count = marvell_get_sset_count, 3144 .get_strings = marvell_get_strings, 3145 .get_stats = marvell_get_stats, 3146 .get_tunable = m88e1540_get_tunable, 3147 .set_tunable = m88e1540_set_tunable, 3148 .cable_test_start = marvell_vct7_cable_test_start, 3149 .cable_test_tdr_start = marvell_vct5_cable_test_tdr_start, 3150 .cable_test_get_status = marvell_vct7_cable_test_get_status, 3151 }, 3152 { 3153 .phy_id = MARVELL_PHY_ID_88E6390_FAMILY, 3154 .phy_id_mask = MARVELL_PHY_ID_MASK, 3155 .name = "Marvell 88E6390 Family", 3156 .driver_data = DEF_MARVELL_HWMON_OPS(m88e6390_hwmon_ops), 3157 /* PHY_GBIT_FEATURES */ 3158 .flags = PHY_POLL_CABLE_TEST, 3159 .probe = marvell_probe, 3160 .config_init = marvell_1011gbe_config_init, 3161 .config_aneg = m88e6390_config_aneg, 3162 .read_status = marvell_read_status, 3163 .config_intr = marvell_config_intr, 3164 .handle_interrupt = marvell_handle_interrupt, 3165 .resume = genphy_resume, 3166 .suspend = genphy_suspend, 3167 .read_page = marvell_read_page, 3168 .write_page = marvell_write_page, 3169 .get_sset_count = marvell_get_sset_count, 3170 .get_strings = marvell_get_strings, 3171 .get_stats = marvell_get_stats, 3172 .get_tunable = m88e1540_get_tunable, 3173 .set_tunable = m88e1540_set_tunable, 3174 .cable_test_start = marvell_vct7_cable_test_start, 3175 .cable_test_tdr_start = marvell_vct5_cable_test_tdr_start, 3176 .cable_test_get_status = marvell_vct7_cable_test_get_status, 3177 }, 3178 { 3179 .phy_id = MARVELL_PHY_ID_88E6393_FAMILY, 3180 .phy_id_mask = MARVELL_PHY_ID_MASK, 3181 .name = "Marvell 88E6393 Family", 3182 .driver_data = DEF_MARVELL_HWMON_OPS(m88e6393_hwmon_ops), 3183 /* PHY_GBIT_FEATURES */ 3184 .flags = PHY_POLL_CABLE_TEST, 3185 .probe = marvell_probe, 3186 .config_init = marvell_1011gbe_config_init, 3187 .config_aneg = m88e1510_config_aneg, 3188 .read_status = marvell_read_status, 3189 .config_intr = marvell_config_intr, 3190 .handle_interrupt = marvell_handle_interrupt, 3191 .resume = genphy_resume, 3192 .suspend = genphy_suspend, 3193 .read_page = marvell_read_page, 3194 .write_page = marvell_write_page, 3195 .get_sset_count = marvell_get_sset_count, 3196 .get_strings = marvell_get_strings, 3197 .get_stats = marvell_get_stats, 3198 .get_tunable = m88e1540_get_tunable, 3199 .set_tunable = m88e1540_set_tunable, 3200 .cable_test_start = marvell_vct7_cable_test_start, 3201 .cable_test_tdr_start = marvell_vct5_cable_test_tdr_start, 3202 .cable_test_get_status = marvell_vct7_cable_test_get_status, 3203 }, 3204 { 3205 .phy_id = MARVELL_PHY_ID_88E1340S, 3206 .phy_id_mask = MARVELL_PHY_ID_MASK, 3207 .name = "Marvell 88E1340S", 3208 .driver_data = DEF_MARVELL_HWMON_OPS(m88e1510_hwmon_ops), 3209 .probe = marvell_probe, 3210 /* PHY_GBIT_FEATURES */ 3211 .config_init = marvell_1011gbe_config_init, 3212 .config_aneg = m88e1510_config_aneg, 3213 .read_status = marvell_read_status, 3214 .config_intr = marvell_config_intr, 3215 .handle_interrupt = marvell_handle_interrupt, 3216 .resume = genphy_resume, 3217 .suspend = genphy_suspend, 3218 .read_page = marvell_read_page, 3219 .write_page = marvell_write_page, 3220 .get_sset_count = marvell_get_sset_count, 3221 .get_strings = marvell_get_strings, 3222 .get_stats = marvell_get_stats, 3223 .get_tunable = m88e1540_get_tunable, 3224 .set_tunable = m88e1540_set_tunable, 3225 }, 3226 { 3227 .phy_id = MARVELL_PHY_ID_88E1548P, 3228 .phy_id_mask = MARVELL_PHY_ID_MASK, 3229 .name = "Marvell 88E1548P", 3230 .driver_data = DEF_MARVELL_HWMON_OPS(m88e1510_hwmon_ops), 3231 .probe = marvell_probe, 3232 .features = PHY_GBIT_FIBRE_FEATURES, 3233 .config_init = marvell_1011gbe_config_init, 3234 .config_aneg = m88e1510_config_aneg, 3235 .read_status = marvell_read_status, 3236 .config_intr = marvell_config_intr, 3237 .handle_interrupt = marvell_handle_interrupt, 3238 .resume = genphy_resume, 3239 .suspend = genphy_suspend, 3240 .read_page = marvell_read_page, 3241 .write_page = marvell_write_page, 3242 .get_sset_count = marvell_get_sset_count, 3243 .get_strings = marvell_get_strings, 3244 .get_stats = marvell_get_stats, 3245 .get_tunable = m88e1540_get_tunable, 3246 .set_tunable = m88e1540_set_tunable, 3247 }, 3248 }; 3249 3250 module_phy_driver(marvell_drivers); 3251 3252 static struct mdio_device_id __maybe_unused marvell_tbl[] = { 3253 { MARVELL_PHY_ID_88E1101, MARVELL_PHY_ID_MASK }, 3254 { MARVELL_PHY_ID_88E1112, MARVELL_PHY_ID_MASK }, 3255 { MARVELL_PHY_ID_88E1111, MARVELL_PHY_ID_MASK }, 3256 { MARVELL_PHY_ID_88E1111_FINISAR, MARVELL_PHY_ID_MASK }, 3257 { MARVELL_PHY_ID_88E1118, MARVELL_PHY_ID_MASK }, 3258 { MARVELL_PHY_ID_88E1121R, MARVELL_PHY_ID_MASK }, 3259 { MARVELL_PHY_ID_88E1145, MARVELL_PHY_ID_MASK }, 3260 { MARVELL_PHY_ID_88E1149R, MARVELL_PHY_ID_MASK }, 3261 { MARVELL_PHY_ID_88E1240, MARVELL_PHY_ID_MASK }, 3262 { MARVELL_PHY_ID_88E1318S, MARVELL_PHY_ID_MASK }, 3263 { MARVELL_PHY_ID_88E1116R, MARVELL_PHY_ID_MASK }, 3264 { MARVELL_PHY_ID_88E1510, MARVELL_PHY_ID_MASK }, 3265 { MARVELL_PHY_ID_88E1540, MARVELL_PHY_ID_MASK }, 3266 { MARVELL_PHY_ID_88E1545, MARVELL_PHY_ID_MASK }, 3267 { MARVELL_PHY_ID_88E3016, MARVELL_PHY_ID_MASK }, 3268 { MARVELL_PHY_ID_88E6341_FAMILY, MARVELL_PHY_ID_MASK }, 3269 { MARVELL_PHY_ID_88E6390_FAMILY, MARVELL_PHY_ID_MASK }, 3270 { MARVELL_PHY_ID_88E6393_FAMILY, MARVELL_PHY_ID_MASK }, 3271 { MARVELL_PHY_ID_88E1340S, MARVELL_PHY_ID_MASK }, 3272 { MARVELL_PHY_ID_88E1548P, MARVELL_PHY_ID_MASK }, 3273 { } 3274 }; 3275 3276 MODULE_DEVICE_TABLE(mdio, marvell_tbl); 3277