xref: /linux/drivers/net/phy/marvell.c (revision 523d3cc4b6d1ae18bfa516345d48332d455181e6)
1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3  * drivers/net/phy/marvell.c
4  *
5  * Driver for Marvell PHYs
6  *
7  * Author: Andy Fleming
8  *
9  * Copyright (c) 2004 Freescale Semiconductor, Inc.
10  *
11  * Copyright (c) 2013 Michael Stapelberg <michael@stapelberg.de>
12  */
13 #include <linux/kernel.h>
14 #include <linux/string.h>
15 #include <linux/ctype.h>
16 #include <linux/errno.h>
17 #include <linux/unistd.h>
18 #include <linux/hwmon.h>
19 #include <linux/interrupt.h>
20 #include <linux/init.h>
21 #include <linux/delay.h>
22 #include <linux/netdevice.h>
23 #include <linux/etherdevice.h>
24 #include <linux/skbuff.h>
25 #include <linux/spinlock.h>
26 #include <linux/mm.h>
27 #include <linux/module.h>
28 #include <linux/mii.h>
29 #include <linux/ethtool.h>
30 #include <linux/ethtool_netlink.h>
31 #include <linux/phy.h>
32 #include <linux/marvell_phy.h>
33 #include <linux/bitfield.h>
34 #include <linux/of.h>
35 #include <linux/sfp.h>
36 
37 #include <linux/io.h>
38 #include <asm/irq.h>
39 #include <linux/uaccess.h>
40 
41 #define MII_MARVELL_PHY_PAGE		22
42 #define MII_MARVELL_COPPER_PAGE		0x00
43 #define MII_MARVELL_FIBER_PAGE		0x01
44 #define MII_MARVELL_MSCR_PAGE		0x02
45 #define MII_MARVELL_LED_PAGE		0x03
46 #define MII_MARVELL_VCT5_PAGE		0x05
47 #define MII_MARVELL_MISC_TEST_PAGE	0x06
48 #define MII_MARVELL_VCT7_PAGE		0x07
49 #define MII_MARVELL_WOL_PAGE		0x11
50 #define MII_MARVELL_MODE_PAGE		0x12
51 
52 #define MII_M1011_IEVENT		0x13
53 #define MII_M1011_IEVENT_CLEAR		0x0000
54 
55 #define MII_M1011_IMASK			0x12
56 #define MII_M1011_IMASK_INIT		0x6400
57 #define MII_M1011_IMASK_CLEAR		0x0000
58 
59 #define MII_M1011_PHY_SCR			0x10
60 #define MII_M1011_PHY_SCR_DOWNSHIFT_EN		BIT(11)
61 #define MII_M1011_PHY_SCR_DOWNSHIFT_MASK	GENMASK(14, 12)
62 #define MII_M1011_PHY_SCR_DOWNSHIFT_MAX		8
63 #define MII_M1011_PHY_SCR_MDI			(0x0 << 5)
64 #define MII_M1011_PHY_SCR_MDI_X			(0x1 << 5)
65 #define MII_M1011_PHY_SCR_AUTO_CROSS		(0x3 << 5)
66 
67 #define MII_M1011_PHY_SSR			0x11
68 #define MII_M1011_PHY_SSR_DOWNSHIFT		BIT(5)
69 
70 #define MII_M1111_PHY_LED_CONTROL	0x18
71 #define MII_M1111_PHY_LED_DIRECT	0x4100
72 #define MII_M1111_PHY_LED_COMBINE	0x411c
73 #define MII_M1111_PHY_EXT_CR		0x14
74 #define MII_M1111_PHY_EXT_CR_DOWNSHIFT_MASK	GENMASK(11, 9)
75 #define MII_M1111_PHY_EXT_CR_DOWNSHIFT_MAX	8
76 #define MII_M1111_PHY_EXT_CR_DOWNSHIFT_EN	BIT(8)
77 #define MII_M1111_RGMII_RX_DELAY	BIT(7)
78 #define MII_M1111_RGMII_TX_DELAY	BIT(1)
79 #define MII_M1111_PHY_EXT_SR		0x1b
80 
81 #define MII_M1111_HWCFG_MODE_MASK		0xf
82 #define MII_M1111_HWCFG_MODE_FIBER_RGMII	0x3
83 #define MII_M1111_HWCFG_MODE_SGMII_NO_CLK	0x4
84 #define MII_M1111_HWCFG_MODE_RTBI		0x7
85 #define MII_M1111_HWCFG_MODE_COPPER_1000X_AN	0x8
86 #define MII_M1111_HWCFG_MODE_COPPER_RTBI	0x9
87 #define MII_M1111_HWCFG_MODE_COPPER_RGMII	0xb
88 #define MII_M1111_HWCFG_MODE_COPPER_1000X_NOAN	0xc
89 #define MII_M1111_HWCFG_SERIAL_AN_BYPASS	BIT(12)
90 #define MII_M1111_HWCFG_FIBER_COPPER_RES	BIT(13)
91 #define MII_M1111_HWCFG_FIBER_COPPER_AUTO	BIT(15)
92 
93 #define MII_88E1121_PHY_MSCR_REG	21
94 #define MII_88E1121_PHY_MSCR_RX_DELAY	BIT(5)
95 #define MII_88E1121_PHY_MSCR_TX_DELAY	BIT(4)
96 #define MII_88E1121_PHY_MSCR_DELAY_MASK	(BIT(5) | BIT(4))
97 
98 #define MII_88E1121_MISC_TEST				0x1a
99 #define MII_88E1510_MISC_TEST_TEMP_THRESHOLD_MASK	0x1f00
100 #define MII_88E1510_MISC_TEST_TEMP_THRESHOLD_SHIFT	8
101 #define MII_88E1510_MISC_TEST_TEMP_IRQ_EN		BIT(7)
102 #define MII_88E1510_MISC_TEST_TEMP_IRQ			BIT(6)
103 #define MII_88E1121_MISC_TEST_TEMP_SENSOR_EN		BIT(5)
104 #define MII_88E1121_MISC_TEST_TEMP_MASK			0x1f
105 
106 #define MII_88E1510_TEMP_SENSOR		0x1b
107 #define MII_88E1510_TEMP_SENSOR_MASK	0xff
108 
109 #define MII_88E1540_COPPER_CTRL3	0x1a
110 #define MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_MASK	GENMASK(11, 10)
111 #define MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_00MS	0
112 #define MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_10MS	1
113 #define MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_20MS	2
114 #define MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_40MS	3
115 #define MII_88E1540_COPPER_CTRL3_FAST_LINK_DOWN		BIT(9)
116 
117 #define MII_88E6390_MISC_TEST		0x1b
118 #define MII_88E6390_MISC_TEST_TEMP_SENSOR_ENABLE_SAMPLE_1S	(0x0 << 14)
119 #define MII_88E6390_MISC_TEST_TEMP_SENSOR_ENABLE		(0x1 << 14)
120 #define MII_88E6390_MISC_TEST_TEMP_SENSOR_ENABLE_ONESHOT	(0x2 << 14)
121 #define MII_88E6390_MISC_TEST_TEMP_SENSOR_DISABLE		(0x3 << 14)
122 #define MII_88E6390_MISC_TEST_TEMP_SENSOR_MASK			(0x3 << 14)
123 #define MII_88E6393_MISC_TEST_SAMPLES_2048	(0x0 << 11)
124 #define MII_88E6393_MISC_TEST_SAMPLES_4096	(0x1 << 11)
125 #define MII_88E6393_MISC_TEST_SAMPLES_8192	(0x2 << 11)
126 #define MII_88E6393_MISC_TEST_SAMPLES_16384	(0x3 << 11)
127 #define MII_88E6393_MISC_TEST_SAMPLES_MASK	(0x3 << 11)
128 #define MII_88E6393_MISC_TEST_RATE_2_3MS	(0x5 << 8)
129 #define MII_88E6393_MISC_TEST_RATE_6_4MS	(0x6 << 8)
130 #define MII_88E6393_MISC_TEST_RATE_11_9MS	(0x7 << 8)
131 #define MII_88E6393_MISC_TEST_RATE_MASK		(0x7 << 8)
132 
133 #define MII_88E6390_TEMP_SENSOR		0x1c
134 #define MII_88E6393_TEMP_SENSOR_THRESHOLD_MASK	0xff00
135 #define MII_88E6393_TEMP_SENSOR_THRESHOLD_SHIFT	8
136 #define MII_88E6390_TEMP_SENSOR_MASK		0xff
137 #define MII_88E6390_TEMP_SENSOR_SAMPLES		10
138 
139 #define MII_88E1318S_PHY_MSCR1_REG	16
140 #define MII_88E1318S_PHY_MSCR1_PAD_ODD	BIT(6)
141 
142 /* Copper Specific Interrupt Enable Register */
143 #define MII_88E1318S_PHY_CSIER				0x12
144 /* WOL Event Interrupt Enable */
145 #define MII_88E1318S_PHY_CSIER_WOL_EIE			BIT(7)
146 
147 #define MII_88E1318S_PHY_LED_FUNC		0x10
148 #define MII_88E1318S_PHY_LED_FUNC_OFF		(0x8)
149 #define MII_88E1318S_PHY_LED_FUNC_ON		(0x9)
150 #define MII_88E1318S_PHY_LED_FUNC_HI_Z		(0xa)
151 #define MII_88E1318S_PHY_LED_FUNC_BLINK		(0xb)
152 #define MII_88E1318S_PHY_LED_TCR		0x12
153 #define MII_88E1318S_PHY_LED_TCR_FORCE_INT	BIT(15)
154 #define MII_88E1318S_PHY_LED_TCR_INTn_ENABLE	BIT(7)
155 #define MII_88E1318S_PHY_LED_TCR_INT_ACTIVE_LOW	BIT(11)
156 
157 /* Magic Packet MAC address registers */
158 #define MII_88E1318S_PHY_MAGIC_PACKET_WORD2		0x17
159 #define MII_88E1318S_PHY_MAGIC_PACKET_WORD1		0x18
160 #define MII_88E1318S_PHY_MAGIC_PACKET_WORD0		0x19
161 
162 #define MII_88E1318S_PHY_WOL_CTRL				0x10
163 #define MII_88E1318S_PHY_WOL_CTRL_CLEAR_WOL_STATUS		BIT(12)
164 #define MII_88E1318S_PHY_WOL_CTRL_LINK_UP_ENABLE		BIT(13)
165 #define MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE	BIT(14)
166 
167 #define MII_PHY_LED_CTRL	        16
168 #define MII_88E1121_PHY_LED_DEF		0x0030
169 #define MII_88E1510_PHY_LED_DEF		0x1177
170 #define MII_88E1510_PHY_LED0_LINK_LED1_ACTIVE	0x1040
171 
172 #define MII_M1011_PHY_STATUS		0x11
173 #define MII_M1011_PHY_STATUS_1000	0x8000
174 #define MII_M1011_PHY_STATUS_100	0x4000
175 #define MII_M1011_PHY_STATUS_SPD_MASK	0xc000
176 #define MII_M1011_PHY_STATUS_FULLDUPLEX	0x2000
177 #define MII_M1011_PHY_STATUS_RESOLVED	0x0800
178 #define MII_M1011_PHY_STATUS_LINK	0x0400
179 #define MII_M1011_PHY_STATUS_MDIX	BIT(6)
180 
181 #define MII_88E3016_PHY_SPEC_CTRL	0x10
182 #define MII_88E3016_DISABLE_SCRAMBLER	0x0200
183 #define MII_88E3016_AUTO_MDIX_CROSSOVER	0x0030
184 
185 #define MII_88E1510_GEN_CTRL_REG_1		0x14
186 #define MII_88E1510_GEN_CTRL_REG_1_MODE_MASK	0x7
187 #define MII_88E1510_GEN_CTRL_REG_1_MODE_RGMII	0x0	/* RGMII to copper */
188 #define MII_88E1510_GEN_CTRL_REG_1_MODE_SGMII	0x1	/* SGMII to copper */
189 /* RGMII to 1000BASE-X */
190 #define MII_88E1510_GEN_CTRL_REG_1_MODE_RGMII_1000X	0x2
191 /* RGMII to 100BASE-FX */
192 #define MII_88E1510_GEN_CTRL_REG_1_MODE_RGMII_100FX	0x3
193 /* RGMII to SGMII */
194 #define MII_88E1510_GEN_CTRL_REG_1_MODE_RGMII_SGMII	0x4
195 #define MII_88E1510_GEN_CTRL_REG_1_RESET	0x8000	/* Soft reset */
196 
197 #define MII_88E1510_MSCR_2		0x15
198 
199 #define MII_VCT5_TX_RX_MDI0_COUPLING	0x10
200 #define MII_VCT5_TX_RX_MDI1_COUPLING	0x11
201 #define MII_VCT5_TX_RX_MDI2_COUPLING	0x12
202 #define MII_VCT5_TX_RX_MDI3_COUPLING	0x13
203 #define MII_VCT5_TX_RX_AMPLITUDE_MASK	0x7f00
204 #define MII_VCT5_TX_RX_AMPLITUDE_SHIFT	8
205 #define MII_VCT5_TX_RX_COUPLING_POSITIVE_REFLECTION	BIT(15)
206 
207 #define MII_VCT5_CTRL				0x17
208 #define MII_VCT5_CTRL_ENABLE				BIT(15)
209 #define MII_VCT5_CTRL_COMPLETE				BIT(14)
210 #define MII_VCT5_CTRL_TX_SAME_CHANNEL			(0x0 << 11)
211 #define MII_VCT5_CTRL_TX0_CHANNEL			(0x4 << 11)
212 #define MII_VCT5_CTRL_TX1_CHANNEL			(0x5 << 11)
213 #define MII_VCT5_CTRL_TX2_CHANNEL			(0x6 << 11)
214 #define MII_VCT5_CTRL_TX3_CHANNEL			(0x7 << 11)
215 #define MII_VCT5_CTRL_SAMPLES_2				(0x0 << 8)
216 #define MII_VCT5_CTRL_SAMPLES_4				(0x1 << 8)
217 #define MII_VCT5_CTRL_SAMPLES_8				(0x2 << 8)
218 #define MII_VCT5_CTRL_SAMPLES_16			(0x3 << 8)
219 #define MII_VCT5_CTRL_SAMPLES_32			(0x4 << 8)
220 #define MII_VCT5_CTRL_SAMPLES_64			(0x5 << 8)
221 #define MII_VCT5_CTRL_SAMPLES_128			(0x6 << 8)
222 #define MII_VCT5_CTRL_SAMPLES_DEFAULT			(0x6 << 8)
223 #define MII_VCT5_CTRL_SAMPLES_256			(0x7 << 8)
224 #define MII_VCT5_CTRL_SAMPLES_SHIFT			8
225 #define MII_VCT5_CTRL_MODE_MAXIMUM_PEEK			(0x0 << 6)
226 #define MII_VCT5_CTRL_MODE_FIRST_LAST_PEEK		(0x1 << 6)
227 #define MII_VCT5_CTRL_MODE_OFFSET			(0x2 << 6)
228 #define MII_VCT5_CTRL_SAMPLE_POINT			(0x3 << 6)
229 #define MII_VCT5_CTRL_PEEK_HYST_DEFAULT			3
230 
231 #define MII_VCT5_SAMPLE_POINT_DISTANCE		0x18
232 #define MII_VCT5_SAMPLE_POINT_DISTANCE_MAX	511
233 #define MII_VCT5_TX_PULSE_CTRL			0x1c
234 #define MII_VCT5_TX_PULSE_CTRL_DONT_WAIT_LINK_DOWN	BIT(12)
235 #define MII_VCT5_TX_PULSE_CTRL_PULSE_WIDTH_128nS	(0x0 << 10)
236 #define MII_VCT5_TX_PULSE_CTRL_PULSE_WIDTH_96nS		(0x1 << 10)
237 #define MII_VCT5_TX_PULSE_CTRL_PULSE_WIDTH_64nS		(0x2 << 10)
238 #define MII_VCT5_TX_PULSE_CTRL_PULSE_WIDTH_32nS		(0x3 << 10)
239 #define MII_VCT5_TX_PULSE_CTRL_PULSE_WIDTH_SHIFT	10
240 #define MII_VCT5_TX_PULSE_CTRL_PULSE_AMPLITUDE_1000mV	(0x0 << 8)
241 #define MII_VCT5_TX_PULSE_CTRL_PULSE_AMPLITUDE_750mV	(0x1 << 8)
242 #define MII_VCT5_TX_PULSE_CTRL_PULSE_AMPLITUDE_500mV	(0x2 << 8)
243 #define MII_VCT5_TX_PULSE_CTRL_PULSE_AMPLITUDE_250mV	(0x3 << 8)
244 #define MII_VCT5_TX_PULSE_CTRL_PULSE_AMPLITUDE_SHIFT	8
245 #define MII_VCT5_TX_PULSE_CTRL_MAX_AMP			BIT(7)
246 #define MII_VCT5_TX_PULSE_CTRL_GT_140m_46_86mV		(0x6 << 0)
247 
248 /* For TDR measurements less than 11 meters, a short pulse should be
249  * used.
250  */
251 #define TDR_SHORT_CABLE_LENGTH	11
252 
253 #define MII_VCT7_PAIR_0_DISTANCE	0x10
254 #define MII_VCT7_PAIR_1_DISTANCE	0x11
255 #define MII_VCT7_PAIR_2_DISTANCE	0x12
256 #define MII_VCT7_PAIR_3_DISTANCE	0x13
257 
258 #define MII_VCT7_RESULTS	0x14
259 #define MII_VCT7_RESULTS_PAIR3_MASK	0xf000
260 #define MII_VCT7_RESULTS_PAIR2_MASK	0x0f00
261 #define MII_VCT7_RESULTS_PAIR1_MASK	0x00f0
262 #define MII_VCT7_RESULTS_PAIR0_MASK	0x000f
263 #define MII_VCT7_RESULTS_PAIR3_SHIFT	12
264 #define MII_VCT7_RESULTS_PAIR2_SHIFT	8
265 #define MII_VCT7_RESULTS_PAIR1_SHIFT	4
266 #define MII_VCT7_RESULTS_PAIR0_SHIFT	0
267 #define MII_VCT7_RESULTS_INVALID	0
268 #define MII_VCT7_RESULTS_OK		1
269 #define MII_VCT7_RESULTS_OPEN		2
270 #define MII_VCT7_RESULTS_SAME_SHORT	3
271 #define MII_VCT7_RESULTS_CROSS_SHORT	4
272 #define MII_VCT7_RESULTS_BUSY		9
273 
274 #define MII_VCT7_CTRL		0x15
275 #define MII_VCT7_CTRL_RUN_NOW			BIT(15)
276 #define MII_VCT7_CTRL_RUN_ANEG			BIT(14)
277 #define MII_VCT7_CTRL_DISABLE_CROSS		BIT(13)
278 #define MII_VCT7_CTRL_RUN_AFTER_BREAK_LINK	BIT(12)
279 #define MII_VCT7_CTRL_IN_PROGRESS		BIT(11)
280 #define MII_VCT7_CTRL_METERS			BIT(10)
281 #define MII_VCT7_CTRL_CENTIMETERS		0
282 
283 #define MII_VCT_TXPINS			0x1A
284 #define MII_VCT_RXPINS			0x1B
285 #define MII_VCT_SR			0x1C
286 #define MII_VCT_TXPINS_ENVCT		BIT(15)
287 #define MII_VCT_TXRXPINS_VCTTST		GENMASK(14, 13)
288 #define MII_VCT_TXRXPINS_VCTTST_SHIFT	13
289 #define MII_VCT_TXRXPINS_VCTTST_OK	0
290 #define MII_VCT_TXRXPINS_VCTTST_SHORT	1
291 #define MII_VCT_TXRXPINS_VCTTST_OPEN	2
292 #define MII_VCT_TXRXPINS_VCTTST_FAIL	3
293 #define MII_VCT_TXRXPINS_AMPRFLN	GENMASK(12, 8)
294 #define MII_VCT_TXRXPINS_AMPRFLN_SHIFT	8
295 #define MII_VCT_TXRXPINS_DISTRFLN	GENMASK(7, 0)
296 #define MII_VCT_TXRXPINS_DISTRFLN_MAX	0xff
297 
298 #define M88E3082_PAIR_A		BIT(0)
299 #define M88E3082_PAIR_B		BIT(1)
300 
301 #define LPA_PAUSE_FIBER		0x180
302 #define LPA_PAUSE_ASYM_FIBER	0x100
303 
304 #define NB_FIBER_STATS	1
305 #define NB_STAT_MAX	3
306 
307 MODULE_DESCRIPTION("Marvell PHY driver");
308 MODULE_AUTHOR("Andy Fleming");
309 MODULE_LICENSE("GPL");
310 
311 struct marvell_hw_stat {
312 	const char *string;
313 	u8 page;
314 	u8 reg;
315 	u8 bits;
316 };
317 
318 static const struct marvell_hw_stat marvell_hw_stats[] = {
319 	{ "phy_receive_errors_copper", 0, 21, 16},
320 	{ "phy_idle_errors", 0, 10, 8 },
321 	{ "phy_receive_errors_fiber", 1, 21, 16},
322 };
323 
324 static_assert(ARRAY_SIZE(marvell_hw_stats) <= NB_STAT_MAX);
325 
326 /* "simple" stat list + corresponding marvell_get_*_simple functions are used
327  * on PHYs without a page register
328  */
329 struct marvell_hw_stat_simple {
330 	const char *string;
331 	u8 reg;
332 	u8 bits;
333 };
334 
335 static const struct marvell_hw_stat_simple marvell_hw_stats_simple[] = {
336 	{ "phy_receive_errors", 21, 16},
337 };
338 
339 static_assert(ARRAY_SIZE(marvell_hw_stats_simple) <= NB_STAT_MAX);
340 
341 enum {
342 	M88E3082_VCT_OFF,
343 	M88E3082_VCT_PHASE1,
344 	M88E3082_VCT_PHASE2,
345 };
346 
347 struct marvell_priv {
348 	u64 stats[NB_STAT_MAX];
349 	char *hwmon_name;
350 	struct device *hwmon_dev;
351 	bool cable_test_tdr;
352 	u32 first;
353 	u32 last;
354 	u32 step;
355 	s8 pair;
356 	u8 vct_phase;
357 };
358 
359 static int marvell_read_page(struct phy_device *phydev)
360 {
361 	return __phy_read(phydev, MII_MARVELL_PHY_PAGE);
362 }
363 
364 static int marvell_write_page(struct phy_device *phydev, int page)
365 {
366 	return __phy_write(phydev, MII_MARVELL_PHY_PAGE, page);
367 }
368 
369 static int marvell_set_page(struct phy_device *phydev, int page)
370 {
371 	return phy_write(phydev, MII_MARVELL_PHY_PAGE, page);
372 }
373 
374 static int marvell_ack_interrupt(struct phy_device *phydev)
375 {
376 	int err;
377 
378 	/* Clear the interrupts by reading the reg */
379 	err = phy_read(phydev, MII_M1011_IEVENT);
380 
381 	if (err < 0)
382 		return err;
383 
384 	return 0;
385 }
386 
387 static int marvell_config_intr(struct phy_device *phydev)
388 {
389 	int err;
390 
391 	if (phydev->interrupts == PHY_INTERRUPT_ENABLED) {
392 		err = marvell_ack_interrupt(phydev);
393 		if (err)
394 			return err;
395 
396 		err = phy_write(phydev, MII_M1011_IMASK,
397 				MII_M1011_IMASK_INIT);
398 	} else {
399 		err = phy_write(phydev, MII_M1011_IMASK,
400 				MII_M1011_IMASK_CLEAR);
401 		if (err)
402 			return err;
403 
404 		err = marvell_ack_interrupt(phydev);
405 	}
406 
407 	return err;
408 }
409 
410 static irqreturn_t marvell_handle_interrupt(struct phy_device *phydev)
411 {
412 	int irq_status;
413 
414 	irq_status = phy_read(phydev, MII_M1011_IEVENT);
415 	if (irq_status < 0) {
416 		phy_error(phydev);
417 		return IRQ_NONE;
418 	}
419 
420 	if (!(irq_status & MII_M1011_IMASK_INIT))
421 		return IRQ_NONE;
422 
423 	phy_trigger_machine(phydev);
424 
425 	return IRQ_HANDLED;
426 }
427 
428 static int marvell_set_polarity(struct phy_device *phydev, int polarity)
429 {
430 	u16 val;
431 
432 	switch (polarity) {
433 	case ETH_TP_MDI:
434 		val = MII_M1011_PHY_SCR_MDI;
435 		break;
436 	case ETH_TP_MDI_X:
437 		val = MII_M1011_PHY_SCR_MDI_X;
438 		break;
439 	case ETH_TP_MDI_AUTO:
440 	case ETH_TP_MDI_INVALID:
441 	default:
442 		val = MII_M1011_PHY_SCR_AUTO_CROSS;
443 		break;
444 	}
445 
446 	return phy_modify_changed(phydev, MII_M1011_PHY_SCR,
447 				  MII_M1011_PHY_SCR_AUTO_CROSS, val);
448 }
449 
450 static int marvell_config_aneg(struct phy_device *phydev)
451 {
452 	int changed = 0;
453 	int err;
454 
455 	err = marvell_set_polarity(phydev, phydev->mdix_ctrl);
456 	if (err < 0)
457 		return err;
458 
459 	changed = err;
460 
461 	err = phy_write(phydev, MII_M1111_PHY_LED_CONTROL,
462 			MII_M1111_PHY_LED_DIRECT);
463 	if (err < 0)
464 		return err;
465 
466 	err = genphy_config_aneg(phydev);
467 	if (err < 0)
468 		return err;
469 
470 	if (phydev->autoneg != AUTONEG_ENABLE || changed) {
471 		/* A write to speed/duplex bits (that is performed by
472 		 * genphy_config_aneg() call above) must be followed by
473 		 * a software reset. Otherwise, the write has no effect.
474 		 */
475 		err = genphy_soft_reset(phydev);
476 		if (err < 0)
477 			return err;
478 	}
479 
480 	return 0;
481 }
482 
483 static int m88e1101_config_aneg(struct phy_device *phydev)
484 {
485 	int err;
486 
487 	/* This Marvell PHY has an errata which requires
488 	 * that certain registers get written in order
489 	 * to restart autonegotiation
490 	 */
491 	err = genphy_soft_reset(phydev);
492 	if (err < 0)
493 		return err;
494 
495 	err = phy_write(phydev, 0x1d, 0x1f);
496 	if (err < 0)
497 		return err;
498 
499 	err = phy_write(phydev, 0x1e, 0x200c);
500 	if (err < 0)
501 		return err;
502 
503 	err = phy_write(phydev, 0x1d, 0x5);
504 	if (err < 0)
505 		return err;
506 
507 	err = phy_write(phydev, 0x1e, 0);
508 	if (err < 0)
509 		return err;
510 
511 	err = phy_write(phydev, 0x1e, 0x100);
512 	if (err < 0)
513 		return err;
514 
515 	return marvell_config_aneg(phydev);
516 }
517 
518 #if IS_ENABLED(CONFIG_OF_MDIO)
519 /* Set and/or override some configuration registers based on the
520  * marvell,reg-init property stored in the of_node for the phydev.
521  *
522  * marvell,reg-init = <reg-page reg mask value>,...;
523  *
524  * There may be one or more sets of <reg-page reg mask value>:
525  *
526  * reg-page: which register bank to use.
527  * reg: the register.
528  * mask: if non-zero, ANDed with existing register value.
529  * value: ORed with the masked value and written to the regiser.
530  *
531  */
532 static int marvell_of_reg_init(struct phy_device *phydev)
533 {
534 	const __be32 *paddr;
535 	int len, i, saved_page, current_page, ret = 0;
536 
537 	if (!phydev->mdio.dev.of_node)
538 		return 0;
539 
540 	paddr = of_get_property(phydev->mdio.dev.of_node,
541 				"marvell,reg-init", &len);
542 	if (!paddr || len < (4 * sizeof(*paddr)))
543 		return 0;
544 
545 	saved_page = phy_save_page(phydev);
546 	if (saved_page < 0)
547 		goto err;
548 	current_page = saved_page;
549 
550 	len /= sizeof(*paddr);
551 	for (i = 0; i < len - 3; i += 4) {
552 		u16 page = be32_to_cpup(paddr + i);
553 		u16 reg = be32_to_cpup(paddr + i + 1);
554 		u16 mask = be32_to_cpup(paddr + i + 2);
555 		u16 val_bits = be32_to_cpup(paddr + i + 3);
556 		int val;
557 
558 		if (page != current_page) {
559 			current_page = page;
560 			ret = marvell_write_page(phydev, page);
561 			if (ret < 0)
562 				goto err;
563 		}
564 
565 		val = 0;
566 		if (mask) {
567 			val = __phy_read(phydev, reg);
568 			if (val < 0) {
569 				ret = val;
570 				goto err;
571 			}
572 			val &= mask;
573 		}
574 		val |= val_bits;
575 
576 		ret = __phy_write(phydev, reg, val);
577 		if (ret < 0)
578 			goto err;
579 	}
580 err:
581 	return phy_restore_page(phydev, saved_page, ret);
582 }
583 #else
584 static int marvell_of_reg_init(struct phy_device *phydev)
585 {
586 	return 0;
587 }
588 #endif /* CONFIG_OF_MDIO */
589 
590 static int m88e1121_config_aneg_rgmii_delays(struct phy_device *phydev)
591 {
592 	int mscr;
593 
594 	if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID)
595 		mscr = MII_88E1121_PHY_MSCR_RX_DELAY |
596 		       MII_88E1121_PHY_MSCR_TX_DELAY;
597 	else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_RXID)
598 		mscr = MII_88E1121_PHY_MSCR_RX_DELAY;
599 	else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_TXID)
600 		mscr = MII_88E1121_PHY_MSCR_TX_DELAY;
601 	else
602 		mscr = 0;
603 
604 	return phy_modify_paged_changed(phydev, MII_MARVELL_MSCR_PAGE,
605 					MII_88E1121_PHY_MSCR_REG,
606 					MII_88E1121_PHY_MSCR_DELAY_MASK, mscr);
607 }
608 
609 static int m88e1121_config_aneg(struct phy_device *phydev)
610 {
611 	int changed = 0;
612 	int err = 0;
613 
614 	if (phy_interface_is_rgmii(phydev)) {
615 		err = m88e1121_config_aneg_rgmii_delays(phydev);
616 		if (err < 0)
617 			return err;
618 	}
619 
620 	changed = err;
621 
622 	err = marvell_set_polarity(phydev, phydev->mdix_ctrl);
623 	if (err < 0)
624 		return err;
625 
626 	changed |= err;
627 
628 	err = genphy_config_aneg(phydev);
629 	if (err < 0)
630 		return err;
631 
632 	if (phydev->autoneg != AUTONEG_ENABLE || changed) {
633 		/* A software reset is used to ensure a "commit" of the
634 		 * changes is done.
635 		 */
636 		err = genphy_soft_reset(phydev);
637 		if (err < 0)
638 			return err;
639 	}
640 
641 	return 0;
642 }
643 
644 static int m88e1318_config_aneg(struct phy_device *phydev)
645 {
646 	int err;
647 
648 	err = phy_modify_paged(phydev, MII_MARVELL_MSCR_PAGE,
649 			       MII_88E1318S_PHY_MSCR1_REG,
650 			       0, MII_88E1318S_PHY_MSCR1_PAD_ODD);
651 	if (err < 0)
652 		return err;
653 
654 	return m88e1121_config_aneg(phydev);
655 }
656 
657 /**
658  * linkmode_adv_to_fiber_adv_t
659  * @advertise: the linkmode advertisement settings
660  *
661  * A small helper function that translates linkmode advertisement
662  * settings to phy autonegotiation advertisements for the MII_ADV
663  * register for fiber link.
664  */
665 static inline u32 linkmode_adv_to_fiber_adv_t(unsigned long *advertise)
666 {
667 	u32 result = 0;
668 
669 	if (linkmode_test_bit(ETHTOOL_LINK_MODE_1000baseT_Half_BIT, advertise))
670 		result |= ADVERTISE_1000XHALF;
671 	if (linkmode_test_bit(ETHTOOL_LINK_MODE_1000baseT_Full_BIT, advertise))
672 		result |= ADVERTISE_1000XFULL;
673 
674 	if (linkmode_test_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, advertise) &&
675 	    linkmode_test_bit(ETHTOOL_LINK_MODE_Pause_BIT, advertise))
676 		result |= ADVERTISE_1000XPSE_ASYM;
677 	else if (linkmode_test_bit(ETHTOOL_LINK_MODE_Pause_BIT, advertise))
678 		result |= ADVERTISE_1000XPAUSE;
679 
680 	return result;
681 }
682 
683 /**
684  * marvell_config_aneg_fiber - restart auto-negotiation or write BMCR
685  * @phydev: target phy_device struct
686  *
687  * Description: If auto-negotiation is enabled, we configure the
688  *   advertising, and then restart auto-negotiation.  If it is not
689  *   enabled, then we write the BMCR. Adapted for fiber link in
690  *   some Marvell's devices.
691  */
692 static int marvell_config_aneg_fiber(struct phy_device *phydev)
693 {
694 	int changed = 0;
695 	int err;
696 	u16 adv;
697 
698 	if (phydev->autoneg != AUTONEG_ENABLE)
699 		return genphy_setup_forced(phydev);
700 
701 	/* Only allow advertising what this PHY supports */
702 	linkmode_and(phydev->advertising, phydev->advertising,
703 		     phydev->supported);
704 
705 	adv = linkmode_adv_to_fiber_adv_t(phydev->advertising);
706 
707 	/* Setup fiber advertisement */
708 	err = phy_modify_changed(phydev, MII_ADVERTISE,
709 				 ADVERTISE_1000XHALF | ADVERTISE_1000XFULL |
710 				 ADVERTISE_1000XPAUSE | ADVERTISE_1000XPSE_ASYM,
711 				 adv);
712 	if (err < 0)
713 		return err;
714 	if (err > 0)
715 		changed = 1;
716 
717 	return genphy_check_and_restart_aneg(phydev, changed);
718 }
719 
720 static unsigned int m88e1111_inband_caps(struct phy_device *phydev,
721 					 phy_interface_t interface)
722 {
723 	/* In 1000base-X and SGMII modes, the inband mode can be changed
724 	 * through the Fibre page BMCR ANENABLE bit.
725 	 */
726 	if (interface == PHY_INTERFACE_MODE_1000BASEX ||
727 	    interface == PHY_INTERFACE_MODE_SGMII)
728 		return LINK_INBAND_DISABLE | LINK_INBAND_ENABLE |
729 		       LINK_INBAND_BYPASS;
730 
731 	return 0;
732 }
733 
734 static int m88e1111_config_inband(struct phy_device *phydev, unsigned int modes)
735 {
736 	u16 extsr, bmcr;
737 	int err;
738 
739 	if (phydev->interface != PHY_INTERFACE_MODE_1000BASEX &&
740 	    phydev->interface != PHY_INTERFACE_MODE_SGMII)
741 		return -EINVAL;
742 
743 	if (modes == LINK_INBAND_BYPASS)
744 		extsr = MII_M1111_HWCFG_SERIAL_AN_BYPASS;
745 	else
746 		extsr = 0;
747 
748 	if (modes == LINK_INBAND_DISABLE)
749 		bmcr = 0;
750 	else
751 		bmcr = BMCR_ANENABLE;
752 
753 	err = phy_modify(phydev, MII_M1111_PHY_EXT_SR,
754 			 MII_M1111_HWCFG_SERIAL_AN_BYPASS, extsr);
755 	if (err < 0)
756 		return extsr;
757 
758 	return phy_modify_paged(phydev, MII_MARVELL_FIBER_PAGE, MII_BMCR,
759 				BMCR_ANENABLE, bmcr);
760 }
761 
762 static int m88e1111_config_aneg(struct phy_device *phydev)
763 {
764 	int extsr = phy_read(phydev, MII_M1111_PHY_EXT_SR);
765 	int err;
766 
767 	if (extsr < 0)
768 		return extsr;
769 
770 	/* If not using SGMII or copper 1000BaseX modes, use normal process.
771 	 * Steps below are only required for these modes.
772 	 */
773 	if (phydev->interface != PHY_INTERFACE_MODE_SGMII &&
774 	    (extsr & MII_M1111_HWCFG_MODE_MASK) !=
775 	    MII_M1111_HWCFG_MODE_COPPER_1000X_AN)
776 		return marvell_config_aneg(phydev);
777 
778 	err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
779 	if (err < 0)
780 		goto error;
781 
782 	/* Configure the copper link first */
783 	err = marvell_config_aneg(phydev);
784 	if (err < 0)
785 		goto error;
786 
787 	/* Then the fiber link */
788 	err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE);
789 	if (err < 0)
790 		goto error;
791 
792 	if (phydev->interface == PHY_INTERFACE_MODE_SGMII)
793 		/* Do not touch the fiber advertisement if we're in copper->sgmii mode.
794 		 * Just ensure that SGMII-side autonegotiation is enabled.
795 		 * If we switched from some other mode to SGMII it may not be.
796 		 */
797 		err = genphy_check_and_restart_aneg(phydev, false);
798 	else
799 		err = marvell_config_aneg_fiber(phydev);
800 	if (err < 0)
801 		goto error;
802 
803 	return marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
804 
805 error:
806 	marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
807 	return err;
808 }
809 
810 static int m88e1510_config_aneg(struct phy_device *phydev)
811 {
812 	int err;
813 
814 	err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
815 	if (err < 0)
816 		goto error;
817 
818 	/* Configure the copper link first */
819 	err = m88e1318_config_aneg(phydev);
820 	if (err < 0)
821 		goto error;
822 
823 	/* Do not touch the fiber page if we're in copper->sgmii mode */
824 	if (phydev->interface == PHY_INTERFACE_MODE_SGMII)
825 		return 0;
826 
827 	/* Then the fiber link */
828 	err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE);
829 	if (err < 0)
830 		goto error;
831 
832 	err = marvell_config_aneg_fiber(phydev);
833 	if (err < 0)
834 		goto error;
835 
836 	return marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
837 
838 error:
839 	marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
840 	return err;
841 }
842 
843 static void marvell_config_led(struct phy_device *phydev)
844 {
845 	u16 def_config;
846 	int err;
847 
848 	switch (MARVELL_PHY_FAMILY_ID(phydev->phy_id)) {
849 	/* Default PHY LED config: LED[0] .. Link, LED[1] .. Activity */
850 	case MARVELL_PHY_FAMILY_ID(MARVELL_PHY_ID_88E1121R):
851 	case MARVELL_PHY_FAMILY_ID(MARVELL_PHY_ID_88E1318S):
852 		def_config = MII_88E1121_PHY_LED_DEF;
853 		break;
854 	/* Default PHY LED config:
855 	 * LED[0] .. 1000Mbps Link
856 	 * LED[1] .. 100Mbps Link
857 	 * LED[2] .. Blink, Activity
858 	 */
859 	case MARVELL_PHY_FAMILY_ID(MARVELL_PHY_ID_88E1510):
860 		if (phydev->dev_flags & MARVELL_PHY_LED0_LINK_LED1_ACTIVE)
861 			def_config = MII_88E1510_PHY_LED0_LINK_LED1_ACTIVE;
862 		else
863 			def_config = MII_88E1510_PHY_LED_DEF;
864 		break;
865 	default:
866 		return;
867 	}
868 
869 	err = phy_write_paged(phydev, MII_MARVELL_LED_PAGE, MII_PHY_LED_CTRL,
870 			      def_config);
871 	if (err < 0)
872 		phydev_warn(phydev, "Fail to config marvell phy LED.\n");
873 }
874 
875 static int marvell_config_init(struct phy_device *phydev)
876 {
877 	/* Set default LED */
878 	marvell_config_led(phydev);
879 
880 	/* Set registers from marvell,reg-init DT property */
881 	return marvell_of_reg_init(phydev);
882 }
883 
884 static int m88e3016_config_init(struct phy_device *phydev)
885 {
886 	int ret;
887 
888 	/* Enable Scrambler and Auto-Crossover */
889 	ret = phy_modify(phydev, MII_88E3016_PHY_SPEC_CTRL,
890 			 MII_88E3016_DISABLE_SCRAMBLER,
891 			 MII_88E3016_AUTO_MDIX_CROSSOVER);
892 	if (ret < 0)
893 		return ret;
894 
895 	return marvell_config_init(phydev);
896 }
897 
898 static int m88e1111_config_init_hwcfg_mode(struct phy_device *phydev,
899 					   u16 mode,
900 					   int fibre_copper_auto)
901 {
902 	if (fibre_copper_auto)
903 		mode |= MII_M1111_HWCFG_FIBER_COPPER_AUTO;
904 
905 	return phy_modify(phydev, MII_M1111_PHY_EXT_SR,
906 			  MII_M1111_HWCFG_MODE_MASK |
907 			  MII_M1111_HWCFG_FIBER_COPPER_AUTO |
908 			  MII_M1111_HWCFG_FIBER_COPPER_RES,
909 			  mode);
910 }
911 
912 static int m88e1111_config_init_rgmii_delays(struct phy_device *phydev)
913 {
914 	int delay;
915 
916 	switch (phydev->interface) {
917 	case PHY_INTERFACE_MODE_RGMII_ID:
918 		delay = MII_M1111_RGMII_RX_DELAY | MII_M1111_RGMII_TX_DELAY;
919 		break;
920 	case PHY_INTERFACE_MODE_RGMII_RXID:
921 		delay = MII_M1111_RGMII_RX_DELAY;
922 		break;
923 	case PHY_INTERFACE_MODE_RGMII_TXID:
924 		delay = MII_M1111_RGMII_TX_DELAY;
925 		break;
926 	default:
927 		delay = 0;
928 		break;
929 	}
930 
931 	return phy_modify(phydev, MII_M1111_PHY_EXT_CR,
932 			  MII_M1111_RGMII_RX_DELAY | MII_M1111_RGMII_TX_DELAY,
933 			  delay);
934 }
935 
936 static int m88e1111_config_init_rgmii(struct phy_device *phydev)
937 {
938 	int temp;
939 	int err;
940 
941 	err = m88e1111_config_init_rgmii_delays(phydev);
942 	if (err < 0)
943 		return err;
944 
945 	temp = phy_read(phydev, MII_M1111_PHY_EXT_SR);
946 	if (temp < 0)
947 		return temp;
948 
949 	temp &= ~(MII_M1111_HWCFG_MODE_MASK);
950 
951 	if (temp & MII_M1111_HWCFG_FIBER_COPPER_RES)
952 		temp |= MII_M1111_HWCFG_MODE_FIBER_RGMII;
953 	else
954 		temp |= MII_M1111_HWCFG_MODE_COPPER_RGMII;
955 
956 	return phy_write(phydev, MII_M1111_PHY_EXT_SR, temp);
957 }
958 
959 static int m88e1111_config_init_sgmii(struct phy_device *phydev)
960 {
961 	int err;
962 
963 	err = m88e1111_config_init_hwcfg_mode(
964 		phydev,
965 		MII_M1111_HWCFG_MODE_SGMII_NO_CLK,
966 		MII_M1111_HWCFG_FIBER_COPPER_AUTO);
967 	if (err < 0)
968 		return err;
969 
970 	/* make sure copper is selected */
971 	return marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
972 }
973 
974 static int m88e1111_config_init_rtbi(struct phy_device *phydev)
975 {
976 	int err;
977 
978 	err = m88e1111_config_init_rgmii_delays(phydev);
979 	if (err < 0)
980 		return err;
981 
982 	err = m88e1111_config_init_hwcfg_mode(
983 		phydev,
984 		MII_M1111_HWCFG_MODE_RTBI,
985 		MII_M1111_HWCFG_FIBER_COPPER_AUTO);
986 	if (err < 0)
987 		return err;
988 
989 	/* soft reset */
990 	err = genphy_soft_reset(phydev);
991 	if (err < 0)
992 		return err;
993 
994 	return m88e1111_config_init_hwcfg_mode(
995 		phydev,
996 		MII_M1111_HWCFG_MODE_RTBI,
997 		MII_M1111_HWCFG_FIBER_COPPER_AUTO);
998 }
999 
1000 static int m88e1111_config_init_1000basex(struct phy_device *phydev)
1001 {
1002 	int extsr = phy_read(phydev, MII_M1111_PHY_EXT_SR);
1003 	int err, mode;
1004 
1005 	if (extsr < 0)
1006 		return extsr;
1007 
1008 	/* If using copper mode, ensure 1000BaseX auto-negotiation is enabled.
1009 	 * FIXME: this does not actually enable 1000BaseX auto-negotiation if
1010 	 * it was previously disabled in the Fiber BMCR!
1011 	 */
1012 	mode = extsr & MII_M1111_HWCFG_MODE_MASK;
1013 	if (mode == MII_M1111_HWCFG_MODE_COPPER_1000X_NOAN) {
1014 		err = phy_modify(phydev, MII_M1111_PHY_EXT_SR,
1015 				 MII_M1111_HWCFG_MODE_MASK |
1016 				 MII_M1111_HWCFG_SERIAL_AN_BYPASS,
1017 				 MII_M1111_HWCFG_MODE_COPPER_1000X_AN |
1018 				 MII_M1111_HWCFG_SERIAL_AN_BYPASS);
1019 		if (err < 0)
1020 			return err;
1021 	}
1022 	return 0;
1023 }
1024 
1025 static int m88e1111_config_init(struct phy_device *phydev)
1026 {
1027 	int err;
1028 
1029 	if (phy_interface_is_rgmii(phydev)) {
1030 		err = m88e1111_config_init_rgmii(phydev);
1031 		if (err < 0)
1032 			return err;
1033 	}
1034 
1035 	if (phydev->interface == PHY_INTERFACE_MODE_SGMII) {
1036 		err = m88e1111_config_init_sgmii(phydev);
1037 		if (err < 0)
1038 			return err;
1039 	}
1040 
1041 	if (phydev->interface == PHY_INTERFACE_MODE_RTBI) {
1042 		err = m88e1111_config_init_rtbi(phydev);
1043 		if (err < 0)
1044 			return err;
1045 	}
1046 
1047 	if (phydev->interface == PHY_INTERFACE_MODE_1000BASEX) {
1048 		err = m88e1111_config_init_1000basex(phydev);
1049 		if (err < 0)
1050 			return err;
1051 	}
1052 
1053 	err = marvell_of_reg_init(phydev);
1054 	if (err < 0)
1055 		return err;
1056 
1057 	err = genphy_soft_reset(phydev);
1058 	if (err < 0)
1059 		return err;
1060 
1061 	if (phydev->interface == PHY_INTERFACE_MODE_SGMII) {
1062 		/* If the HWCFG_MODE was changed from another mode (such as
1063 		 * 1000BaseX) to SGMII, the state of the support bits may have
1064 		 * also changed now that the PHY has been reset.
1065 		 * Update the PHY abilities accordingly.
1066 		 */
1067 		err = genphy_read_abilities(phydev);
1068 		linkmode_or(phydev->advertising, phydev->advertising,
1069 			    phydev->supported);
1070 	}
1071 	return err;
1072 }
1073 
1074 static int m88e1111_get_downshift(struct phy_device *phydev, u8 *data)
1075 {
1076 	int val, cnt, enable;
1077 
1078 	val = phy_read(phydev, MII_M1111_PHY_EXT_CR);
1079 	if (val < 0)
1080 		return val;
1081 
1082 	enable = FIELD_GET(MII_M1111_PHY_EXT_CR_DOWNSHIFT_EN, val);
1083 	cnt = FIELD_GET(MII_M1111_PHY_EXT_CR_DOWNSHIFT_MASK, val) + 1;
1084 
1085 	*data = enable ? cnt : DOWNSHIFT_DEV_DISABLE;
1086 
1087 	return 0;
1088 }
1089 
1090 static int m88e1111_set_downshift(struct phy_device *phydev, u8 cnt)
1091 {
1092 	int val, err;
1093 
1094 	if (cnt > MII_M1111_PHY_EXT_CR_DOWNSHIFT_MAX)
1095 		return -E2BIG;
1096 
1097 	if (!cnt) {
1098 		err = phy_clear_bits(phydev, MII_M1111_PHY_EXT_CR,
1099 				     MII_M1111_PHY_EXT_CR_DOWNSHIFT_EN);
1100 	} else {
1101 		val = MII_M1111_PHY_EXT_CR_DOWNSHIFT_EN;
1102 		val |= FIELD_PREP(MII_M1111_PHY_EXT_CR_DOWNSHIFT_MASK, cnt - 1);
1103 
1104 		err = phy_modify(phydev, MII_M1111_PHY_EXT_CR,
1105 				 MII_M1111_PHY_EXT_CR_DOWNSHIFT_EN |
1106 				 MII_M1111_PHY_EXT_CR_DOWNSHIFT_MASK,
1107 				 val);
1108 	}
1109 
1110 	if (err < 0)
1111 		return err;
1112 
1113 	return genphy_soft_reset(phydev);
1114 }
1115 
1116 static int m88e1111_get_tunable(struct phy_device *phydev,
1117 				struct ethtool_tunable *tuna, void *data)
1118 {
1119 	switch (tuna->id) {
1120 	case ETHTOOL_PHY_DOWNSHIFT:
1121 		return m88e1111_get_downshift(phydev, data);
1122 	default:
1123 		return -EOPNOTSUPP;
1124 	}
1125 }
1126 
1127 static int m88e1111_set_tunable(struct phy_device *phydev,
1128 				struct ethtool_tunable *tuna, const void *data)
1129 {
1130 	switch (tuna->id) {
1131 	case ETHTOOL_PHY_DOWNSHIFT:
1132 		return m88e1111_set_downshift(phydev, *(const u8 *)data);
1133 	default:
1134 		return -EOPNOTSUPP;
1135 	}
1136 }
1137 
1138 static int m88e1011_get_downshift(struct phy_device *phydev, u8 *data)
1139 {
1140 	int val, cnt, enable;
1141 
1142 	val = phy_read(phydev, MII_M1011_PHY_SCR);
1143 	if (val < 0)
1144 		return val;
1145 
1146 	enable = FIELD_GET(MII_M1011_PHY_SCR_DOWNSHIFT_EN, val);
1147 	cnt = FIELD_GET(MII_M1011_PHY_SCR_DOWNSHIFT_MASK, val) + 1;
1148 
1149 	*data = enable ? cnt : DOWNSHIFT_DEV_DISABLE;
1150 
1151 	return 0;
1152 }
1153 
1154 static int m88e1011_set_downshift(struct phy_device *phydev, u8 cnt)
1155 {
1156 	int val, err;
1157 
1158 	if (cnt > MII_M1011_PHY_SCR_DOWNSHIFT_MAX)
1159 		return -E2BIG;
1160 
1161 	if (!cnt) {
1162 		err = phy_clear_bits(phydev, MII_M1011_PHY_SCR,
1163 				     MII_M1011_PHY_SCR_DOWNSHIFT_EN);
1164 	} else {
1165 		val = MII_M1011_PHY_SCR_DOWNSHIFT_EN;
1166 		val |= FIELD_PREP(MII_M1011_PHY_SCR_DOWNSHIFT_MASK, cnt - 1);
1167 
1168 		err = phy_modify(phydev, MII_M1011_PHY_SCR,
1169 				 MII_M1011_PHY_SCR_DOWNSHIFT_EN |
1170 				 MII_M1011_PHY_SCR_DOWNSHIFT_MASK,
1171 				 val);
1172 	}
1173 
1174 	if (err < 0)
1175 		return err;
1176 
1177 	return genphy_soft_reset(phydev);
1178 }
1179 
1180 static int m88e1011_get_tunable(struct phy_device *phydev,
1181 				struct ethtool_tunable *tuna, void *data)
1182 {
1183 	switch (tuna->id) {
1184 	case ETHTOOL_PHY_DOWNSHIFT:
1185 		return m88e1011_get_downshift(phydev, data);
1186 	default:
1187 		return -EOPNOTSUPP;
1188 	}
1189 }
1190 
1191 static int m88e1011_set_tunable(struct phy_device *phydev,
1192 				struct ethtool_tunable *tuna, const void *data)
1193 {
1194 	switch (tuna->id) {
1195 	case ETHTOOL_PHY_DOWNSHIFT:
1196 		return m88e1011_set_downshift(phydev, *(const u8 *)data);
1197 	default:
1198 		return -EOPNOTSUPP;
1199 	}
1200 }
1201 
1202 static int m88e1112_config_init(struct phy_device *phydev)
1203 {
1204 	int err;
1205 
1206 	err = m88e1011_set_downshift(phydev, 3);
1207 	if (err < 0)
1208 		return err;
1209 
1210 	return m88e1111_config_init(phydev);
1211 }
1212 
1213 static int m88e1111gbe_config_init(struct phy_device *phydev)
1214 {
1215 	int err;
1216 
1217 	err = m88e1111_set_downshift(phydev, 3);
1218 	if (err < 0)
1219 		return err;
1220 
1221 	return m88e1111_config_init(phydev);
1222 }
1223 
1224 static int marvell_1011gbe_config_init(struct phy_device *phydev)
1225 {
1226 	int err;
1227 
1228 	err = m88e1011_set_downshift(phydev, 3);
1229 	if (err < 0)
1230 		return err;
1231 
1232 	return marvell_config_init(phydev);
1233 }
1234 static int m88e1116r_config_init(struct phy_device *phydev)
1235 {
1236 	int err;
1237 
1238 	err = genphy_soft_reset(phydev);
1239 	if (err < 0)
1240 		return err;
1241 
1242 	msleep(500);
1243 
1244 	err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
1245 	if (err < 0)
1246 		return err;
1247 
1248 	err = marvell_set_polarity(phydev, phydev->mdix_ctrl);
1249 	if (err < 0)
1250 		return err;
1251 
1252 	err = m88e1011_set_downshift(phydev, 8);
1253 	if (err < 0)
1254 		return err;
1255 
1256 	if (phy_interface_is_rgmii(phydev)) {
1257 		err = m88e1121_config_aneg_rgmii_delays(phydev);
1258 		if (err < 0)
1259 			return err;
1260 	}
1261 
1262 	err = genphy_soft_reset(phydev);
1263 	if (err < 0)
1264 		return err;
1265 
1266 	return marvell_config_init(phydev);
1267 }
1268 
1269 static int m88e1318_config_init(struct phy_device *phydev)
1270 {
1271 	if (phy_interrupt_is_valid(phydev)) {
1272 		int err = phy_modify_paged(
1273 			phydev, MII_MARVELL_LED_PAGE,
1274 			MII_88E1318S_PHY_LED_TCR,
1275 			MII_88E1318S_PHY_LED_TCR_FORCE_INT,
1276 			MII_88E1318S_PHY_LED_TCR_INTn_ENABLE |
1277 			MII_88E1318S_PHY_LED_TCR_INT_ACTIVE_LOW);
1278 		if (err < 0)
1279 			return err;
1280 	}
1281 
1282 	return marvell_config_init(phydev);
1283 }
1284 
1285 static int m88e1510_config_init(struct phy_device *phydev)
1286 {
1287 	static const struct {
1288 		u16 reg17, reg16;
1289 	} errata_vals[] = {
1290 		{ 0x214b, 0x2144 },
1291 		{ 0x0c28, 0x2146 },
1292 		{ 0xb233, 0x214d },
1293 		{ 0xcc0c, 0x2159 },
1294 	};
1295 	int err;
1296 	int i;
1297 
1298 	/* As per Marvell Release Notes - Alaska 88E1510/88E1518/88E1512/
1299 	 * 88E1514 Rev A0, Errata Section 5.1:
1300 	 * If EEE is intended to be used, the following register writes
1301 	 * must be done once after every hardware reset.
1302 	 */
1303 	err = marvell_set_page(phydev, 0x00FF);
1304 	if (err < 0)
1305 		return err;
1306 
1307 	for (i = 0; i < ARRAY_SIZE(errata_vals); ++i) {
1308 		err = phy_write(phydev, 17, errata_vals[i].reg17);
1309 		if (err)
1310 			return err;
1311 		err = phy_write(phydev, 16, errata_vals[i].reg16);
1312 		if (err)
1313 			return err;
1314 	}
1315 
1316 	err = marvell_set_page(phydev, 0x00FB);
1317 	if (err < 0)
1318 		return err;
1319 	err = phy_write(phydev, 07, 0xC00D);
1320 	if (err < 0)
1321 		return err;
1322 	err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
1323 	if (err < 0)
1324 		return err;
1325 
1326 	/* SGMII-to-Copper mode initialization */
1327 	if (phydev->interface == PHY_INTERFACE_MODE_SGMII) {
1328 		/* Select page 18 */
1329 		err = marvell_set_page(phydev, 18);
1330 		if (err < 0)
1331 			return err;
1332 
1333 		/* In reg 20, write MODE[2:0] = 0x1 (SGMII to Copper) */
1334 		err = phy_modify(phydev, MII_88E1510_GEN_CTRL_REG_1,
1335 				 MII_88E1510_GEN_CTRL_REG_1_MODE_MASK,
1336 				 MII_88E1510_GEN_CTRL_REG_1_MODE_SGMII);
1337 		if (err < 0)
1338 			return err;
1339 
1340 		/* PHY reset is necessary after changing MODE[2:0] */
1341 		err = phy_set_bits(phydev, MII_88E1510_GEN_CTRL_REG_1,
1342 				   MII_88E1510_GEN_CTRL_REG_1_RESET);
1343 		if (err < 0)
1344 			return err;
1345 
1346 		/* Reset page selection */
1347 		err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
1348 		if (err < 0)
1349 			return err;
1350 	}
1351 	err = m88e1011_set_downshift(phydev, 3);
1352 	if (err < 0)
1353 		return err;
1354 
1355 	return m88e1318_config_init(phydev);
1356 }
1357 
1358 static int m88e1118_config_aneg(struct phy_device *phydev)
1359 {
1360 	int err;
1361 
1362 	err = marvell_set_polarity(phydev, phydev->mdix_ctrl);
1363 	if (err < 0)
1364 		return err;
1365 
1366 	err = genphy_config_aneg(phydev);
1367 	if (err < 0)
1368 		return err;
1369 
1370 	return genphy_soft_reset(phydev);
1371 }
1372 
1373 static int m88e1118_config_init(struct phy_device *phydev)
1374 {
1375 	u16 leds;
1376 	int err;
1377 
1378 	/* Enable 1000 Mbit */
1379 	err = phy_write_paged(phydev, MII_MARVELL_MSCR_PAGE,
1380 			      MII_88E1121_PHY_MSCR_REG, 0x1070);
1381 	if (err < 0)
1382 		return err;
1383 
1384 	if (phy_interface_is_rgmii(phydev)) {
1385 		err = m88e1121_config_aneg_rgmii_delays(phydev);
1386 		if (err < 0)
1387 			return err;
1388 	}
1389 
1390 	/* Adjust LED Control */
1391 	if (phydev->dev_flags & MARVELL_PHY_M1118_DNS323_LEDS)
1392 		leds = 0x1100;
1393 	else
1394 		leds = 0x021e;
1395 
1396 	err = phy_write_paged(phydev, MII_MARVELL_LED_PAGE, 0x10, leds);
1397 	if (err < 0)
1398 		return err;
1399 
1400 	err = marvell_of_reg_init(phydev);
1401 	if (err < 0)
1402 		return err;
1403 
1404 	/* Reset page register */
1405 	err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
1406 	if (err < 0)
1407 		return err;
1408 
1409 	return genphy_soft_reset(phydev);
1410 }
1411 
1412 static int m88e1149_config_init(struct phy_device *phydev)
1413 {
1414 	int err;
1415 
1416 	/* Change address */
1417 	err = marvell_set_page(phydev, MII_MARVELL_MSCR_PAGE);
1418 	if (err < 0)
1419 		return err;
1420 
1421 	/* Enable 1000 Mbit */
1422 	err = phy_write(phydev, 0x15, 0x1048);
1423 	if (err < 0)
1424 		return err;
1425 
1426 	err = marvell_of_reg_init(phydev);
1427 	if (err < 0)
1428 		return err;
1429 
1430 	/* Reset address */
1431 	err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
1432 	if (err < 0)
1433 		return err;
1434 
1435 	return genphy_soft_reset(phydev);
1436 }
1437 
1438 static int m88e1145_config_init_rgmii(struct phy_device *phydev)
1439 {
1440 	int err;
1441 
1442 	err = m88e1111_config_init_rgmii_delays(phydev);
1443 	if (err < 0)
1444 		return err;
1445 
1446 	if (phydev->dev_flags & MARVELL_PHY_M1145_FLAGS_RESISTANCE) {
1447 		err = phy_write(phydev, 0x1d, 0x0012);
1448 		if (err < 0)
1449 			return err;
1450 
1451 		err = phy_modify(phydev, 0x1e, 0x0fc0,
1452 				 2 << 9 | /* 36 ohm */
1453 				 2 << 6); /* 39 ohm */
1454 		if (err < 0)
1455 			return err;
1456 
1457 		err = phy_write(phydev, 0x1d, 0x3);
1458 		if (err < 0)
1459 			return err;
1460 
1461 		err = phy_write(phydev, 0x1e, 0x8000);
1462 	}
1463 	return err;
1464 }
1465 
1466 static int m88e1145_config_init_sgmii(struct phy_device *phydev)
1467 {
1468 	return m88e1111_config_init_hwcfg_mode(
1469 		phydev, MII_M1111_HWCFG_MODE_SGMII_NO_CLK,
1470 		MII_M1111_HWCFG_FIBER_COPPER_AUTO);
1471 }
1472 
1473 static int m88e1145_config_init(struct phy_device *phydev)
1474 {
1475 	int err;
1476 
1477 	/* Take care of errata E0 & E1 */
1478 	err = phy_write(phydev, 0x1d, 0x001b);
1479 	if (err < 0)
1480 		return err;
1481 
1482 	err = phy_write(phydev, 0x1e, 0x418f);
1483 	if (err < 0)
1484 		return err;
1485 
1486 	err = phy_write(phydev, 0x1d, 0x0016);
1487 	if (err < 0)
1488 		return err;
1489 
1490 	err = phy_write(phydev, 0x1e, 0xa2da);
1491 	if (err < 0)
1492 		return err;
1493 
1494 	if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID) {
1495 		err = m88e1145_config_init_rgmii(phydev);
1496 		if (err < 0)
1497 			return err;
1498 	}
1499 
1500 	if (phydev->interface == PHY_INTERFACE_MODE_SGMII) {
1501 		err = m88e1145_config_init_sgmii(phydev);
1502 		if (err < 0)
1503 			return err;
1504 	}
1505 	err = m88e1111_set_downshift(phydev, 3);
1506 	if (err < 0)
1507 		return err;
1508 
1509 	err = marvell_of_reg_init(phydev);
1510 	if (err < 0)
1511 		return err;
1512 
1513 	return 0;
1514 }
1515 
1516 static int m88e1540_get_fld(struct phy_device *phydev, u8 *msecs)
1517 {
1518 	int val;
1519 
1520 	val = phy_read(phydev, MII_88E1540_COPPER_CTRL3);
1521 	if (val < 0)
1522 		return val;
1523 
1524 	if (!(val & MII_88E1540_COPPER_CTRL3_FAST_LINK_DOWN)) {
1525 		*msecs = ETHTOOL_PHY_FAST_LINK_DOWN_OFF;
1526 		return 0;
1527 	}
1528 
1529 	val = FIELD_GET(MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_MASK, val);
1530 
1531 	switch (val) {
1532 	case MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_00MS:
1533 		*msecs = 0;
1534 		break;
1535 	case MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_10MS:
1536 		*msecs = 10;
1537 		break;
1538 	case MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_20MS:
1539 		*msecs = 20;
1540 		break;
1541 	case MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_40MS:
1542 		*msecs = 40;
1543 		break;
1544 	default:
1545 		return -EINVAL;
1546 	}
1547 
1548 	return 0;
1549 }
1550 
1551 static int m88e1540_set_fld(struct phy_device *phydev, const u8 *msecs)
1552 {
1553 	struct ethtool_keee eee;
1554 	int val, ret;
1555 
1556 	if (*msecs == ETHTOOL_PHY_FAST_LINK_DOWN_OFF)
1557 		return phy_clear_bits(phydev, MII_88E1540_COPPER_CTRL3,
1558 				      MII_88E1540_COPPER_CTRL3_FAST_LINK_DOWN);
1559 
1560 	/* According to the Marvell data sheet EEE must be disabled for
1561 	 * Fast Link Down detection to work properly
1562 	 */
1563 	ret = genphy_c45_ethtool_get_eee(phydev, &eee);
1564 	if (!ret && eee.eee_enabled) {
1565 		phydev_warn(phydev, "Fast Link Down detection requires EEE to be disabled!\n");
1566 		return -EBUSY;
1567 	}
1568 
1569 	if (*msecs <= 5)
1570 		val = MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_00MS;
1571 	else if (*msecs <= 15)
1572 		val = MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_10MS;
1573 	else if (*msecs <= 30)
1574 		val = MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_20MS;
1575 	else
1576 		val = MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_40MS;
1577 
1578 	val = FIELD_PREP(MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_MASK, val);
1579 
1580 	ret = phy_modify(phydev, MII_88E1540_COPPER_CTRL3,
1581 			 MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_MASK, val);
1582 	if (ret)
1583 		return ret;
1584 
1585 	return phy_set_bits(phydev, MII_88E1540_COPPER_CTRL3,
1586 			    MII_88E1540_COPPER_CTRL3_FAST_LINK_DOWN);
1587 }
1588 
1589 static int m88e1540_get_tunable(struct phy_device *phydev,
1590 				struct ethtool_tunable *tuna, void *data)
1591 {
1592 	switch (tuna->id) {
1593 	case ETHTOOL_PHY_FAST_LINK_DOWN:
1594 		return m88e1540_get_fld(phydev, data);
1595 	case ETHTOOL_PHY_DOWNSHIFT:
1596 		return m88e1011_get_downshift(phydev, data);
1597 	default:
1598 		return -EOPNOTSUPP;
1599 	}
1600 }
1601 
1602 static int m88e1540_set_tunable(struct phy_device *phydev,
1603 				struct ethtool_tunable *tuna, const void *data)
1604 {
1605 	switch (tuna->id) {
1606 	case ETHTOOL_PHY_FAST_LINK_DOWN:
1607 		return m88e1540_set_fld(phydev, data);
1608 	case ETHTOOL_PHY_DOWNSHIFT:
1609 		return m88e1011_set_downshift(phydev, *(const u8 *)data);
1610 	default:
1611 		return -EOPNOTSUPP;
1612 	}
1613 }
1614 
1615 /* The VOD can be out of specification on link up. Poke an
1616  * undocumented register, in an undocumented page, with a magic value
1617  * to fix this.
1618  */
1619 static int m88e6390_errata(struct phy_device *phydev)
1620 {
1621 	int err;
1622 
1623 	err = phy_write(phydev, MII_BMCR,
1624 			BMCR_ANENABLE | BMCR_SPEED1000 | BMCR_FULLDPLX);
1625 	if (err)
1626 		return err;
1627 
1628 	usleep_range(300, 400);
1629 
1630 	err = phy_write_paged(phydev, 0xf8, 0x08, 0x36);
1631 	if (err)
1632 		return err;
1633 
1634 	return genphy_soft_reset(phydev);
1635 }
1636 
1637 static int m88e6390_config_aneg(struct phy_device *phydev)
1638 {
1639 	int err;
1640 
1641 	err = m88e6390_errata(phydev);
1642 	if (err)
1643 		return err;
1644 
1645 	return m88e1510_config_aneg(phydev);
1646 }
1647 
1648 /**
1649  * fiber_lpa_mod_linkmode_lpa_t
1650  * @advertising: the linkmode advertisement settings
1651  * @lpa: value of the MII_LPA register for fiber link
1652  *
1653  * A small helper function that translates MII_LPA bits to linkmode LP
1654  * advertisement settings. Other bits in advertising are left
1655  * unchanged.
1656  */
1657 static void fiber_lpa_mod_linkmode_lpa_t(unsigned long *advertising, u32 lpa)
1658 {
1659 	linkmode_mod_bit(ETHTOOL_LINK_MODE_1000baseT_Half_BIT,
1660 			 advertising, lpa & LPA_1000XHALF);
1661 
1662 	linkmode_mod_bit(ETHTOOL_LINK_MODE_1000baseT_Full_BIT,
1663 			 advertising, lpa & LPA_1000XFULL);
1664 }
1665 
1666 static int marvell_read_status_page_an(struct phy_device *phydev,
1667 				       int fiber, int status)
1668 {
1669 	int lpa;
1670 	int err;
1671 
1672 	if (!(status & MII_M1011_PHY_STATUS_RESOLVED)) {
1673 		phydev->link = 0;
1674 		return 0;
1675 	}
1676 
1677 	if (status & MII_M1011_PHY_STATUS_FULLDUPLEX)
1678 		phydev->duplex = DUPLEX_FULL;
1679 	else
1680 		phydev->duplex = DUPLEX_HALF;
1681 
1682 	switch (status & MII_M1011_PHY_STATUS_SPD_MASK) {
1683 	case MII_M1011_PHY_STATUS_1000:
1684 		phydev->speed = SPEED_1000;
1685 		break;
1686 
1687 	case MII_M1011_PHY_STATUS_100:
1688 		phydev->speed = SPEED_100;
1689 		break;
1690 
1691 	default:
1692 		phydev->speed = SPEED_10;
1693 		break;
1694 	}
1695 
1696 	if (!fiber) {
1697 		err = genphy_read_lpa(phydev);
1698 		if (err < 0)
1699 			return err;
1700 
1701 		phy_resolve_aneg_pause(phydev);
1702 	} else {
1703 		lpa = phy_read(phydev, MII_LPA);
1704 		if (lpa < 0)
1705 			return lpa;
1706 
1707 		/* The fiber link is only 1000M capable */
1708 		fiber_lpa_mod_linkmode_lpa_t(phydev->lp_advertising, lpa);
1709 
1710 		if (phydev->duplex == DUPLEX_FULL) {
1711 			if (!(lpa & LPA_PAUSE_FIBER)) {
1712 				phydev->pause = 0;
1713 				phydev->asym_pause = 0;
1714 			} else if ((lpa & LPA_PAUSE_ASYM_FIBER)) {
1715 				phydev->pause = 1;
1716 				phydev->asym_pause = 1;
1717 			} else {
1718 				phydev->pause = 1;
1719 				phydev->asym_pause = 0;
1720 			}
1721 		}
1722 	}
1723 
1724 	return 0;
1725 }
1726 
1727 /* marvell_read_status_page
1728  *
1729  * Description:
1730  *   Check the link, then figure out the current state
1731  *   by comparing what we advertise with what the link partner
1732  *   advertises.  Start by checking the gigabit possibilities,
1733  *   then move on to 10/100.
1734  */
1735 static int marvell_read_status_page(struct phy_device *phydev, int page)
1736 {
1737 	int status;
1738 	int fiber;
1739 	int err;
1740 
1741 	status = phy_read(phydev, MII_M1011_PHY_STATUS);
1742 	if (status < 0)
1743 		return status;
1744 
1745 	/* Use the generic register for copper link status,
1746 	 * and the PHY status register for fiber link status.
1747 	 */
1748 	if (page == MII_MARVELL_FIBER_PAGE) {
1749 		phydev->link = !!(status & MII_M1011_PHY_STATUS_LINK);
1750 	} else {
1751 		err = genphy_update_link(phydev);
1752 		if (err)
1753 			return err;
1754 	}
1755 
1756 	if (page == MII_MARVELL_FIBER_PAGE)
1757 		fiber = 1;
1758 	else
1759 		fiber = 0;
1760 
1761 	linkmode_zero(phydev->lp_advertising);
1762 	phydev->pause = 0;
1763 	phydev->asym_pause = 0;
1764 	phydev->speed = SPEED_UNKNOWN;
1765 	phydev->duplex = DUPLEX_UNKNOWN;
1766 	phydev->port = fiber ? PORT_FIBRE : PORT_TP;
1767 
1768 	if (fiber) {
1769 		phydev->mdix = ETH_TP_MDI_INVALID;
1770 	} else {
1771 		/* The MDI-X state is set regardless of Autoneg being enabled
1772 		 * and reflects forced MDI-X state as well as auto resolution
1773 		 */
1774 		if (status & MII_M1011_PHY_STATUS_RESOLVED)
1775 			phydev->mdix = status & MII_M1011_PHY_STATUS_MDIX ?
1776 				ETH_TP_MDI_X : ETH_TP_MDI;
1777 		else
1778 			phydev->mdix = ETH_TP_MDI_INVALID;
1779 	}
1780 
1781 	if (phydev->autoneg == AUTONEG_ENABLE)
1782 		err = marvell_read_status_page_an(phydev, fiber, status);
1783 	else
1784 		err = genphy_read_status_fixed(phydev);
1785 
1786 	return err;
1787 }
1788 
1789 /* marvell_read_status
1790  *
1791  * Some Marvell's phys have two modes: fiber and copper.
1792  * Both need status checked.
1793  * Description:
1794  *   First, check the fiber link and status.
1795  *   If the fiber link is down, check the copper link and status which
1796  *   will be the default value if both link are down.
1797  */
1798 static int marvell_read_status(struct phy_device *phydev)
1799 {
1800 	int err;
1801 
1802 	/* Check the fiber mode first */
1803 	if (linkmode_test_bit(ETHTOOL_LINK_MODE_FIBRE_BIT,
1804 			      phydev->supported) &&
1805 	    phydev->interface != PHY_INTERFACE_MODE_SGMII) {
1806 		err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE);
1807 		if (err < 0)
1808 			goto error;
1809 
1810 		err = marvell_read_status_page(phydev, MII_MARVELL_FIBER_PAGE);
1811 		if (err < 0)
1812 			goto error;
1813 
1814 		/* If the fiber link is up, it is the selected and
1815 		 * used link. In this case, we need to stay in the
1816 		 * fiber page. Please to be careful about that, avoid
1817 		 * to restore Copper page in other functions which
1818 		 * could break the behaviour for some fiber phy like
1819 		 * 88E1512.
1820 		 */
1821 		if (phydev->link)
1822 			return 0;
1823 
1824 		/* If fiber link is down, check and save copper mode state */
1825 		err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
1826 		if (err < 0)
1827 			goto error;
1828 	}
1829 
1830 	return marvell_read_status_page(phydev, MII_MARVELL_COPPER_PAGE);
1831 
1832 error:
1833 	marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
1834 	return err;
1835 }
1836 
1837 /* marvell_suspend
1838  *
1839  * Some Marvell's phys have two modes: fiber and copper.
1840  * Both need to be suspended
1841  */
1842 static int marvell_suspend(struct phy_device *phydev)
1843 {
1844 	int err;
1845 
1846 	/* Suspend the fiber mode first */
1847 	if (linkmode_test_bit(ETHTOOL_LINK_MODE_FIBRE_BIT,
1848 			      phydev->supported)) {
1849 		err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE);
1850 		if (err < 0)
1851 			goto error;
1852 
1853 		/* With the page set, use the generic suspend */
1854 		err = genphy_suspend(phydev);
1855 		if (err < 0)
1856 			goto error;
1857 
1858 		/* Then, the copper link */
1859 		err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
1860 		if (err < 0)
1861 			goto error;
1862 	}
1863 
1864 	/* With the page set, use the generic suspend */
1865 	return genphy_suspend(phydev);
1866 
1867 error:
1868 	marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
1869 	return err;
1870 }
1871 
1872 /* marvell_resume
1873  *
1874  * Some Marvell's phys have two modes: fiber and copper.
1875  * Both need to be resumed
1876  */
1877 static int marvell_resume(struct phy_device *phydev)
1878 {
1879 	int err;
1880 
1881 	/* Resume the fiber mode first */
1882 	if (linkmode_test_bit(ETHTOOL_LINK_MODE_FIBRE_BIT,
1883 			      phydev->supported)) {
1884 		err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE);
1885 		if (err < 0)
1886 			goto error;
1887 
1888 		/* With the page set, use the generic resume */
1889 		err = genphy_resume(phydev);
1890 		if (err < 0)
1891 			goto error;
1892 
1893 		/* Then, the copper link */
1894 		err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
1895 		if (err < 0)
1896 			goto error;
1897 	}
1898 
1899 	/* With the page set, use the generic resume */
1900 	return genphy_resume(phydev);
1901 
1902 error:
1903 	marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
1904 	return err;
1905 }
1906 
1907 static int marvell_aneg_done(struct phy_device *phydev)
1908 {
1909 	int retval = phy_read(phydev, MII_M1011_PHY_STATUS);
1910 
1911 	return (retval < 0) ? retval : (retval & MII_M1011_PHY_STATUS_RESOLVED);
1912 }
1913 
1914 static void m88e1318_get_wol(struct phy_device *phydev,
1915 			     struct ethtool_wolinfo *wol)
1916 {
1917 	int ret;
1918 
1919 	wol->supported = WAKE_MAGIC | WAKE_PHY;
1920 	wol->wolopts = 0;
1921 
1922 	ret = phy_read_paged(phydev, MII_MARVELL_WOL_PAGE,
1923 			     MII_88E1318S_PHY_WOL_CTRL);
1924 	if (ret < 0)
1925 		return;
1926 
1927 	if (ret & MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE)
1928 		wol->wolopts |= WAKE_MAGIC;
1929 
1930 	if (ret & MII_88E1318S_PHY_WOL_CTRL_LINK_UP_ENABLE)
1931 		wol->wolopts |= WAKE_PHY;
1932 }
1933 
1934 static int m88e1318_set_wol(struct phy_device *phydev,
1935 			    struct ethtool_wolinfo *wol)
1936 {
1937 	int err = 0, oldpage;
1938 
1939 	oldpage = phy_save_page(phydev);
1940 	if (oldpage < 0)
1941 		goto error;
1942 
1943 	if (wol->wolopts & (WAKE_MAGIC | WAKE_PHY)) {
1944 		/* Explicitly switch to page 0x00, just to be sure */
1945 		err = marvell_write_page(phydev, MII_MARVELL_COPPER_PAGE);
1946 		if (err < 0)
1947 			goto error;
1948 
1949 		/* If WOL event happened once, the LED[2] interrupt pin
1950 		 * will not be cleared unless we reading the interrupt status
1951 		 * register. If interrupts are in use, the normal interrupt
1952 		 * handling will clear the WOL event. Clear the WOL event
1953 		 * before enabling it if !phy_interrupt_is_valid()
1954 		 */
1955 		if (!phy_interrupt_is_valid(phydev))
1956 			__phy_read(phydev, MII_M1011_IEVENT);
1957 
1958 		/* Enable the WOL interrupt */
1959 		err = __phy_set_bits(phydev, MII_88E1318S_PHY_CSIER,
1960 				     MII_88E1318S_PHY_CSIER_WOL_EIE);
1961 		if (err < 0)
1962 			goto error;
1963 
1964 		err = marvell_write_page(phydev, MII_MARVELL_LED_PAGE);
1965 		if (err < 0)
1966 			goto error;
1967 
1968 		/* Setup LED[2] as interrupt pin (active low) */
1969 		err = __phy_modify(phydev, MII_88E1318S_PHY_LED_TCR,
1970 				   MII_88E1318S_PHY_LED_TCR_FORCE_INT,
1971 				   MII_88E1318S_PHY_LED_TCR_INTn_ENABLE |
1972 				   MII_88E1318S_PHY_LED_TCR_INT_ACTIVE_LOW);
1973 		if (err < 0)
1974 			goto error;
1975 	}
1976 
1977 	if (wol->wolopts & WAKE_MAGIC) {
1978 		err = marvell_write_page(phydev, MII_MARVELL_WOL_PAGE);
1979 		if (err < 0)
1980 			goto error;
1981 
1982 		/* Store the device address for the magic packet */
1983 		err = __phy_write(phydev, MII_88E1318S_PHY_MAGIC_PACKET_WORD2,
1984 				((phydev->attached_dev->dev_addr[5] << 8) |
1985 				 phydev->attached_dev->dev_addr[4]));
1986 		if (err < 0)
1987 			goto error;
1988 		err = __phy_write(phydev, MII_88E1318S_PHY_MAGIC_PACKET_WORD1,
1989 				((phydev->attached_dev->dev_addr[3] << 8) |
1990 				 phydev->attached_dev->dev_addr[2]));
1991 		if (err < 0)
1992 			goto error;
1993 		err = __phy_write(phydev, MII_88E1318S_PHY_MAGIC_PACKET_WORD0,
1994 				((phydev->attached_dev->dev_addr[1] << 8) |
1995 				 phydev->attached_dev->dev_addr[0]));
1996 		if (err < 0)
1997 			goto error;
1998 
1999 		/* Clear WOL status and enable magic packet matching */
2000 		err = __phy_set_bits(phydev, MII_88E1318S_PHY_WOL_CTRL,
2001 				     MII_88E1318S_PHY_WOL_CTRL_CLEAR_WOL_STATUS |
2002 				     MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE);
2003 		if (err < 0)
2004 			goto error;
2005 	} else {
2006 		err = marvell_write_page(phydev, MII_MARVELL_WOL_PAGE);
2007 		if (err < 0)
2008 			goto error;
2009 
2010 		/* Clear WOL status and disable magic packet matching */
2011 		err = __phy_modify(phydev, MII_88E1318S_PHY_WOL_CTRL,
2012 				   MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE,
2013 				   MII_88E1318S_PHY_WOL_CTRL_CLEAR_WOL_STATUS);
2014 		if (err < 0)
2015 			goto error;
2016 	}
2017 
2018 	if (wol->wolopts & WAKE_PHY) {
2019 		err = marvell_write_page(phydev, MII_MARVELL_WOL_PAGE);
2020 		if (err < 0)
2021 			goto error;
2022 
2023 		/* Clear WOL status and enable link up event */
2024 		err = __phy_modify(phydev, MII_88E1318S_PHY_WOL_CTRL, 0,
2025 				   MII_88E1318S_PHY_WOL_CTRL_CLEAR_WOL_STATUS |
2026 				   MII_88E1318S_PHY_WOL_CTRL_LINK_UP_ENABLE);
2027 		if (err < 0)
2028 			goto error;
2029 	} else {
2030 		err = marvell_write_page(phydev, MII_MARVELL_WOL_PAGE);
2031 		if (err < 0)
2032 			goto error;
2033 
2034 		/* Clear WOL status and disable link up event */
2035 		err = __phy_modify(phydev, MII_88E1318S_PHY_WOL_CTRL,
2036 				   MII_88E1318S_PHY_WOL_CTRL_LINK_UP_ENABLE,
2037 				   MII_88E1318S_PHY_WOL_CTRL_CLEAR_WOL_STATUS);
2038 		if (err < 0)
2039 			goto error;
2040 	}
2041 
2042 error:
2043 	return phy_restore_page(phydev, oldpage, err);
2044 }
2045 
2046 static int marvell_get_sset_count(struct phy_device *phydev)
2047 {
2048 	if (linkmode_test_bit(ETHTOOL_LINK_MODE_FIBRE_BIT,
2049 			      phydev->supported))
2050 		return ARRAY_SIZE(marvell_hw_stats);
2051 	else
2052 		return ARRAY_SIZE(marvell_hw_stats) - NB_FIBER_STATS;
2053 }
2054 
2055 static int marvell_get_sset_count_simple(struct phy_device *phydev)
2056 {
2057 	return ARRAY_SIZE(marvell_hw_stats_simple);
2058 }
2059 
2060 static void marvell_get_strings(struct phy_device *phydev, u8 *data)
2061 {
2062 	int count = marvell_get_sset_count(phydev);
2063 	int i;
2064 
2065 	for (i = 0; i < count; i++)
2066 		ethtool_puts(&data, marvell_hw_stats[i].string);
2067 }
2068 
2069 static void marvell_get_strings_simple(struct phy_device *phydev, u8 *data)
2070 {
2071 	int count = marvell_get_sset_count_simple(phydev);
2072 	int i;
2073 
2074 	for (i = 0; i < count; i++)
2075 		ethtool_puts(&data, marvell_hw_stats_simple[i].string);
2076 }
2077 
2078 static u64 marvell_get_stat(struct phy_device *phydev, int i)
2079 {
2080 	struct marvell_hw_stat stat = marvell_hw_stats[i];
2081 	struct marvell_priv *priv = phydev->priv;
2082 	int val;
2083 	u64 ret;
2084 
2085 	val = phy_read_paged(phydev, stat.page, stat.reg);
2086 	if (val < 0) {
2087 		ret = U64_MAX;
2088 	} else {
2089 		val = val & ((1 << stat.bits) - 1);
2090 		priv->stats[i] += val;
2091 		ret = priv->stats[i];
2092 	}
2093 
2094 	return ret;
2095 }
2096 
2097 static u64 marvell_get_stat_simple(struct phy_device *phydev, int i)
2098 {
2099 	struct marvell_hw_stat_simple stat = marvell_hw_stats_simple[i];
2100 	struct marvell_priv *priv = phydev->priv;
2101 	int val;
2102 	u64 ret;
2103 
2104 	val = phy_read(phydev, stat.reg);
2105 	if (val < 0) {
2106 		ret = U64_MAX;
2107 	} else {
2108 		val = val & ((1 << stat.bits) - 1);
2109 		priv->stats[i] += val;
2110 		ret = priv->stats[i];
2111 	}
2112 
2113 	return ret;
2114 }
2115 
2116 static void marvell_get_stats(struct phy_device *phydev,
2117 			      struct ethtool_stats *stats, u64 *data)
2118 {
2119 	int count = marvell_get_sset_count(phydev);
2120 	int i;
2121 
2122 	for (i = 0; i < count; i++)
2123 		data[i] = marvell_get_stat(phydev, i);
2124 }
2125 
2126 static void marvell_get_stats_simple(struct phy_device *phydev,
2127 				     struct ethtool_stats *stats, u64 *data)
2128 {
2129 	int count = marvell_get_sset_count_simple(phydev);
2130 	int i;
2131 
2132 	for (i = 0; i < count; i++)
2133 		data[i] = marvell_get_stat_simple(phydev, i);
2134 }
2135 
2136 static int m88e1510_loopback(struct phy_device *phydev, bool enable)
2137 {
2138 	int err;
2139 
2140 	if (enable) {
2141 		u16 bmcr_ctl, mscr2_ctl = 0;
2142 
2143 		bmcr_ctl = mii_bmcr_encode_fixed(phydev->speed, phydev->duplex);
2144 
2145 		err = phy_write(phydev, MII_BMCR, bmcr_ctl);
2146 		if (err < 0)
2147 			return err;
2148 
2149 		if (phydev->speed == SPEED_1000)
2150 			mscr2_ctl = BMCR_SPEED1000;
2151 		else if (phydev->speed == SPEED_100)
2152 			mscr2_ctl = BMCR_SPEED100;
2153 
2154 		err = phy_modify_paged(phydev, MII_MARVELL_MSCR_PAGE,
2155 				       MII_88E1510_MSCR_2, BMCR_SPEED1000 |
2156 				       BMCR_SPEED100, mscr2_ctl);
2157 		if (err < 0)
2158 			return err;
2159 
2160 		/* Need soft reset to have speed configuration takes effect */
2161 		err = genphy_soft_reset(phydev);
2162 		if (err < 0)
2163 			return err;
2164 
2165 		err = phy_modify(phydev, MII_BMCR, BMCR_LOOPBACK,
2166 				 BMCR_LOOPBACK);
2167 
2168 		if (!err) {
2169 			/* It takes some time for PHY device to switch
2170 			 * into/out-of loopback mode.
2171 			 */
2172 			msleep(1000);
2173 		}
2174 		return err;
2175 	} else {
2176 		err = phy_modify(phydev, MII_BMCR, BMCR_LOOPBACK, 0);
2177 		if (err < 0)
2178 			return err;
2179 
2180 		return phy_config_aneg(phydev);
2181 	}
2182 }
2183 
2184 static int marvell_vct5_wait_complete(struct phy_device *phydev)
2185 {
2186 	int i;
2187 	int val;
2188 
2189 	for (i = 0; i < 32; i++) {
2190 		val = __phy_read(phydev, MII_VCT5_CTRL);
2191 		if (val < 0)
2192 			return val;
2193 
2194 		if (val & MII_VCT5_CTRL_COMPLETE)
2195 			return 0;
2196 	}
2197 
2198 	phydev_err(phydev, "Timeout while waiting for cable test to finish\n");
2199 	return -ETIMEDOUT;
2200 }
2201 
2202 static int marvell_vct5_amplitude(struct phy_device *phydev, int pair)
2203 {
2204 	int amplitude;
2205 	int val;
2206 	int reg;
2207 
2208 	reg = MII_VCT5_TX_RX_MDI0_COUPLING + pair;
2209 	val = __phy_read(phydev, reg);
2210 
2211 	if (val < 0)
2212 		return 0;
2213 
2214 	amplitude = (val & MII_VCT5_TX_RX_AMPLITUDE_MASK) >>
2215 		MII_VCT5_TX_RX_AMPLITUDE_SHIFT;
2216 
2217 	if (!(val & MII_VCT5_TX_RX_COUPLING_POSITIVE_REFLECTION))
2218 		amplitude = -amplitude;
2219 
2220 	return 1000 * amplitude / 128;
2221 }
2222 
2223 static u32 marvell_vct5_distance2cm(int distance)
2224 {
2225 	return distance * 805 / 10;
2226 }
2227 
2228 static u32 marvell_vct5_cm2distance(int cm)
2229 {
2230 	return cm * 10 / 805;
2231 }
2232 
2233 static int marvell_vct5_amplitude_distance(struct phy_device *phydev,
2234 					   int distance, int pair)
2235 {
2236 	u16 reg;
2237 	int err;
2238 	int mV;
2239 	int i;
2240 
2241 	err = __phy_write(phydev, MII_VCT5_SAMPLE_POINT_DISTANCE,
2242 			  distance);
2243 	if (err)
2244 		return err;
2245 
2246 	reg = MII_VCT5_CTRL_ENABLE |
2247 		MII_VCT5_CTRL_TX_SAME_CHANNEL |
2248 		MII_VCT5_CTRL_SAMPLES_DEFAULT |
2249 		MII_VCT5_CTRL_SAMPLE_POINT |
2250 		MII_VCT5_CTRL_PEEK_HYST_DEFAULT;
2251 	err = __phy_write(phydev, MII_VCT5_CTRL, reg);
2252 	if (err)
2253 		return err;
2254 
2255 	err = marvell_vct5_wait_complete(phydev);
2256 	if (err)
2257 		return err;
2258 
2259 	for (i = 0; i < 4; i++) {
2260 		if (pair != PHY_PAIR_ALL && i != pair)
2261 			continue;
2262 
2263 		mV = marvell_vct5_amplitude(phydev, i);
2264 		ethnl_cable_test_amplitude(phydev, i, mV);
2265 	}
2266 
2267 	return 0;
2268 }
2269 
2270 static int marvell_vct5_amplitude_graph(struct phy_device *phydev)
2271 {
2272 	struct marvell_priv *priv = phydev->priv;
2273 	int distance;
2274 	u16 width;
2275 	int page;
2276 	int err;
2277 	u16 reg;
2278 
2279 	if (priv->first <= TDR_SHORT_CABLE_LENGTH)
2280 		width = MII_VCT5_TX_PULSE_CTRL_PULSE_WIDTH_32nS;
2281 	else
2282 		width = MII_VCT5_TX_PULSE_CTRL_PULSE_WIDTH_128nS;
2283 
2284 	reg = MII_VCT5_TX_PULSE_CTRL_GT_140m_46_86mV |
2285 		MII_VCT5_TX_PULSE_CTRL_DONT_WAIT_LINK_DOWN |
2286 		MII_VCT5_TX_PULSE_CTRL_MAX_AMP | width;
2287 
2288 	err = phy_write_paged(phydev, MII_MARVELL_VCT5_PAGE,
2289 			      MII_VCT5_TX_PULSE_CTRL, reg);
2290 	if (err)
2291 		return err;
2292 
2293 	/* Reading the TDR data is very MDIO heavy. We need to optimize
2294 	 * access to keep the time to a minimum. So lock the bus once,
2295 	 * and don't release it until complete. We can then avoid having
2296 	 * to change the page for every access, greatly speeding things
2297 	 * up.
2298 	 */
2299 	page = phy_select_page(phydev, MII_MARVELL_VCT5_PAGE);
2300 	if (page < 0)
2301 		goto restore_page;
2302 
2303 	for (distance = priv->first;
2304 	     distance <= priv->last;
2305 	     distance += priv->step) {
2306 		err = marvell_vct5_amplitude_distance(phydev, distance,
2307 						      priv->pair);
2308 		if (err)
2309 			goto restore_page;
2310 
2311 		if (distance > TDR_SHORT_CABLE_LENGTH &&
2312 		    width == MII_VCT5_TX_PULSE_CTRL_PULSE_WIDTH_32nS) {
2313 			width = MII_VCT5_TX_PULSE_CTRL_PULSE_WIDTH_128nS;
2314 			reg = MII_VCT5_TX_PULSE_CTRL_GT_140m_46_86mV |
2315 				MII_VCT5_TX_PULSE_CTRL_DONT_WAIT_LINK_DOWN |
2316 				MII_VCT5_TX_PULSE_CTRL_MAX_AMP | width;
2317 			err = __phy_write(phydev, MII_VCT5_TX_PULSE_CTRL, reg);
2318 			if (err)
2319 				goto restore_page;
2320 		}
2321 	}
2322 
2323 restore_page:
2324 	return phy_restore_page(phydev, page, err);
2325 }
2326 
2327 static int marvell_cable_test_start_common(struct phy_device *phydev)
2328 {
2329 	int bmcr, bmsr, ret;
2330 
2331 	/* If auto-negotiation is enabled, but not complete, the cable
2332 	 * test never completes. So disable auto-neg.
2333 	 */
2334 	bmcr = phy_read(phydev, MII_BMCR);
2335 	if (bmcr < 0)
2336 		return bmcr;
2337 
2338 	bmsr = phy_read(phydev, MII_BMSR);
2339 
2340 	if (bmsr < 0)
2341 		return bmsr;
2342 
2343 	if (bmcr & BMCR_ANENABLE) {
2344 		ret =  phy_clear_bits(phydev, MII_BMCR, BMCR_ANENABLE);
2345 		if (ret < 0)
2346 			return ret;
2347 		ret = genphy_soft_reset(phydev);
2348 		if (ret < 0)
2349 			return ret;
2350 	}
2351 
2352 	/* If the link is up, allow it some time to go down */
2353 	if (bmsr & BMSR_LSTATUS)
2354 		msleep(1500);
2355 
2356 	return 0;
2357 }
2358 
2359 static int marvell_vct7_cable_test_start(struct phy_device *phydev)
2360 {
2361 	struct marvell_priv *priv = phydev->priv;
2362 	int ret;
2363 
2364 	ret = marvell_cable_test_start_common(phydev);
2365 	if (ret)
2366 		return ret;
2367 
2368 	priv->cable_test_tdr = false;
2369 
2370 	/* Reset the VCT5 API control to defaults, otherwise
2371 	 * VCT7 does not work correctly.
2372 	 */
2373 	ret = phy_write_paged(phydev, MII_MARVELL_VCT5_PAGE,
2374 			      MII_VCT5_CTRL,
2375 			      MII_VCT5_CTRL_TX_SAME_CHANNEL |
2376 			      MII_VCT5_CTRL_SAMPLES_DEFAULT |
2377 			      MII_VCT5_CTRL_MODE_MAXIMUM_PEEK |
2378 			      MII_VCT5_CTRL_PEEK_HYST_DEFAULT);
2379 	if (ret)
2380 		return ret;
2381 
2382 	ret = phy_write_paged(phydev, MII_MARVELL_VCT5_PAGE,
2383 			      MII_VCT5_SAMPLE_POINT_DISTANCE, 0);
2384 	if (ret)
2385 		return ret;
2386 
2387 	return phy_write_paged(phydev, MII_MARVELL_VCT7_PAGE,
2388 			       MII_VCT7_CTRL,
2389 			       MII_VCT7_CTRL_RUN_NOW |
2390 			       MII_VCT7_CTRL_CENTIMETERS);
2391 }
2392 
2393 static int marvell_vct5_cable_test_tdr_start(struct phy_device *phydev,
2394 					     const struct phy_tdr_config *cfg)
2395 {
2396 	struct marvell_priv *priv = phydev->priv;
2397 	int ret;
2398 
2399 	priv->cable_test_tdr = true;
2400 	priv->first = marvell_vct5_cm2distance(cfg->first);
2401 	priv->last = marvell_vct5_cm2distance(cfg->last);
2402 	priv->step = marvell_vct5_cm2distance(cfg->step);
2403 	priv->pair = cfg->pair;
2404 
2405 	if (priv->first > MII_VCT5_SAMPLE_POINT_DISTANCE_MAX)
2406 		return -EINVAL;
2407 
2408 	if (priv->last > MII_VCT5_SAMPLE_POINT_DISTANCE_MAX)
2409 		return -EINVAL;
2410 
2411 	/* Disable  VCT7 */
2412 	ret = phy_write_paged(phydev, MII_MARVELL_VCT7_PAGE,
2413 			      MII_VCT7_CTRL, 0);
2414 	if (ret)
2415 		return ret;
2416 
2417 	ret = marvell_cable_test_start_common(phydev);
2418 	if (ret)
2419 		return ret;
2420 
2421 	ret = ethnl_cable_test_pulse(phydev, 1000);
2422 	if (ret)
2423 		return ret;
2424 
2425 	return ethnl_cable_test_step(phydev,
2426 				     marvell_vct5_distance2cm(priv->first),
2427 				     marvell_vct5_distance2cm(priv->last),
2428 				     marvell_vct5_distance2cm(priv->step));
2429 }
2430 
2431 static int marvell_vct7_distance_to_length(int distance, bool meter)
2432 {
2433 	if (meter)
2434 		distance *= 100;
2435 
2436 	return distance;
2437 }
2438 
2439 static bool marvell_vct7_distance_valid(int result)
2440 {
2441 	switch (result) {
2442 	case MII_VCT7_RESULTS_OPEN:
2443 	case MII_VCT7_RESULTS_SAME_SHORT:
2444 	case MII_VCT7_RESULTS_CROSS_SHORT:
2445 		return true;
2446 	}
2447 	return false;
2448 }
2449 
2450 static int marvell_vct7_report_length(struct phy_device *phydev,
2451 				      int pair, bool meter)
2452 {
2453 	int length;
2454 	int ret;
2455 
2456 	ret = phy_read_paged(phydev, MII_MARVELL_VCT7_PAGE,
2457 			     MII_VCT7_PAIR_0_DISTANCE + pair);
2458 	if (ret < 0)
2459 		return ret;
2460 
2461 	length = marvell_vct7_distance_to_length(ret, meter);
2462 
2463 	ethnl_cable_test_fault_length(phydev, pair, length);
2464 
2465 	return 0;
2466 }
2467 
2468 static int marvell_vct7_cable_test_report_trans(int result)
2469 {
2470 	switch (result) {
2471 	case MII_VCT7_RESULTS_OK:
2472 		return ETHTOOL_A_CABLE_RESULT_CODE_OK;
2473 	case MII_VCT7_RESULTS_OPEN:
2474 		return ETHTOOL_A_CABLE_RESULT_CODE_OPEN;
2475 	case MII_VCT7_RESULTS_SAME_SHORT:
2476 		return ETHTOOL_A_CABLE_RESULT_CODE_SAME_SHORT;
2477 	case MII_VCT7_RESULTS_CROSS_SHORT:
2478 		return ETHTOOL_A_CABLE_RESULT_CODE_CROSS_SHORT;
2479 	default:
2480 		return ETHTOOL_A_CABLE_RESULT_CODE_UNSPEC;
2481 	}
2482 }
2483 
2484 static int marvell_vct7_cable_test_report(struct phy_device *phydev)
2485 {
2486 	int pair0, pair1, pair2, pair3;
2487 	bool meter;
2488 	int ret;
2489 
2490 	ret = phy_read_paged(phydev, MII_MARVELL_VCT7_PAGE,
2491 			     MII_VCT7_RESULTS);
2492 	if (ret < 0)
2493 		return ret;
2494 
2495 	pair3 = (ret & MII_VCT7_RESULTS_PAIR3_MASK) >>
2496 		MII_VCT7_RESULTS_PAIR3_SHIFT;
2497 	pair2 = (ret & MII_VCT7_RESULTS_PAIR2_MASK) >>
2498 		MII_VCT7_RESULTS_PAIR2_SHIFT;
2499 	pair1 = (ret & MII_VCT7_RESULTS_PAIR1_MASK) >>
2500 		MII_VCT7_RESULTS_PAIR1_SHIFT;
2501 	pair0 = (ret & MII_VCT7_RESULTS_PAIR0_MASK) >>
2502 		MII_VCT7_RESULTS_PAIR0_SHIFT;
2503 
2504 	ethnl_cable_test_result(phydev, ETHTOOL_A_CABLE_PAIR_A,
2505 				marvell_vct7_cable_test_report_trans(pair0));
2506 	ethnl_cable_test_result(phydev, ETHTOOL_A_CABLE_PAIR_B,
2507 				marvell_vct7_cable_test_report_trans(pair1));
2508 	ethnl_cable_test_result(phydev, ETHTOOL_A_CABLE_PAIR_C,
2509 				marvell_vct7_cable_test_report_trans(pair2));
2510 	ethnl_cable_test_result(phydev, ETHTOOL_A_CABLE_PAIR_D,
2511 				marvell_vct7_cable_test_report_trans(pair3));
2512 
2513 	ret = phy_read_paged(phydev, MII_MARVELL_VCT7_PAGE, MII_VCT7_CTRL);
2514 	if (ret < 0)
2515 		return ret;
2516 
2517 	meter = ret & MII_VCT7_CTRL_METERS;
2518 
2519 	if (marvell_vct7_distance_valid(pair0))
2520 		marvell_vct7_report_length(phydev, 0, meter);
2521 	if (marvell_vct7_distance_valid(pair1))
2522 		marvell_vct7_report_length(phydev, 1, meter);
2523 	if (marvell_vct7_distance_valid(pair2))
2524 		marvell_vct7_report_length(phydev, 2, meter);
2525 	if (marvell_vct7_distance_valid(pair3))
2526 		marvell_vct7_report_length(phydev, 3, meter);
2527 
2528 	return 0;
2529 }
2530 
2531 static int marvell_vct7_cable_test_get_status(struct phy_device *phydev,
2532 					      bool *finished)
2533 {
2534 	struct marvell_priv *priv = phydev->priv;
2535 	int ret;
2536 
2537 	if (priv->cable_test_tdr) {
2538 		ret = marvell_vct5_amplitude_graph(phydev);
2539 		*finished = true;
2540 		return ret;
2541 	}
2542 
2543 	*finished = false;
2544 
2545 	ret = phy_read_paged(phydev, MII_MARVELL_VCT7_PAGE,
2546 			     MII_VCT7_CTRL);
2547 
2548 	if (ret < 0)
2549 		return ret;
2550 
2551 	if (!(ret & MII_VCT7_CTRL_IN_PROGRESS)) {
2552 		*finished = true;
2553 
2554 		return marvell_vct7_cable_test_report(phydev);
2555 	}
2556 
2557 	return 0;
2558 }
2559 
2560 static int m88e3082_vct_cable_test_start(struct phy_device *phydev)
2561 {
2562 	struct marvell_priv *priv = phydev->priv;
2563 	int ret;
2564 
2565 	/* It needs some magic workarounds described in VCT manual for this PHY.
2566 	 */
2567 	ret = phy_write(phydev, 29, 0x0003);
2568 	if (ret < 0)
2569 		return ret;
2570 
2571 	ret = phy_write(phydev, 30, 0x6440);
2572 	if (ret < 0)
2573 		return ret;
2574 
2575 	if (priv->vct_phase == M88E3082_VCT_PHASE1) {
2576 		ret = phy_write(phydev, 29, 0x000a);
2577 		if (ret < 0)
2578 			return ret;
2579 
2580 		ret = phy_write(phydev, 30, 0x0002);
2581 		if (ret < 0)
2582 			return ret;
2583 	}
2584 
2585 	ret = phy_write(phydev, MII_BMCR,
2586 			BMCR_RESET | BMCR_SPEED100 | BMCR_FULLDPLX);
2587 	if (ret < 0)
2588 		return ret;
2589 
2590 	ret = phy_write(phydev, MII_VCT_TXPINS, MII_VCT_TXPINS_ENVCT);
2591 	if (ret < 0)
2592 		return ret;
2593 
2594 	ret = phy_write(phydev, 29, 0x0003);
2595 	if (ret < 0)
2596 		return ret;
2597 
2598 	ret = phy_write(phydev, 30, 0x0);
2599 	if (ret < 0)
2600 		return ret;
2601 
2602 	if (priv->vct_phase == M88E3082_VCT_OFF) {
2603 		priv->vct_phase = M88E3082_VCT_PHASE1;
2604 		priv->pair = 0;
2605 
2606 		return 0;
2607 	}
2608 
2609 	ret = phy_write(phydev, 29, 0x000a);
2610 	if (ret < 0)
2611 		return ret;
2612 
2613 	ret = phy_write(phydev, 30, 0x0);
2614 	if (ret < 0)
2615 		return ret;
2616 
2617 	priv->vct_phase = M88E3082_VCT_PHASE2;
2618 
2619 	return 0;
2620 }
2621 
2622 static int m88e3082_vct_cable_test_report_trans(int result, u8 distance)
2623 {
2624 	switch (result) {
2625 	case MII_VCT_TXRXPINS_VCTTST_OK:
2626 		if (distance == MII_VCT_TXRXPINS_DISTRFLN_MAX)
2627 			return ETHTOOL_A_CABLE_RESULT_CODE_OK;
2628 		return ETHTOOL_A_CABLE_RESULT_CODE_IMPEDANCE_MISMATCH;
2629 	case MII_VCT_TXRXPINS_VCTTST_SHORT:
2630 		return ETHTOOL_A_CABLE_RESULT_CODE_SAME_SHORT;
2631 	case MII_VCT_TXRXPINS_VCTTST_OPEN:
2632 		return ETHTOOL_A_CABLE_RESULT_CODE_OPEN;
2633 	default:
2634 		return ETHTOOL_A_CABLE_RESULT_CODE_UNSPEC;
2635 	}
2636 }
2637 
2638 static u32 m88e3082_vct_distrfln_2_cm(u8 distrfln)
2639 {
2640 	if (distrfln < 24)
2641 		return 0;
2642 
2643 	/* Original function for meters: y = 0.7861x - 18.862 */
2644 	return (7861 * distrfln - 188620) / 100;
2645 }
2646 
2647 static int m88e3082_vct_cable_test_get_status(struct phy_device *phydev,
2648 					      bool *finished)
2649 {
2650 	u8 tx_vcttst_res, rx_vcttst_res, tx_distrfln, rx_distrfln;
2651 	struct marvell_priv *priv = phydev->priv;
2652 	int ret, tx_result, rx_result;
2653 	bool done_phase = true;
2654 
2655 	*finished = false;
2656 
2657 	ret = phy_read(phydev, MII_VCT_TXPINS);
2658 	if (ret < 0)
2659 		return ret;
2660 	else if (ret & MII_VCT_TXPINS_ENVCT)
2661 		return 0;
2662 
2663 	tx_distrfln = ret & MII_VCT_TXRXPINS_DISTRFLN;
2664 	tx_vcttst_res = (ret & MII_VCT_TXRXPINS_VCTTST) >>
2665 			MII_VCT_TXRXPINS_VCTTST_SHIFT;
2666 
2667 	ret = phy_read(phydev, MII_VCT_RXPINS);
2668 	if (ret < 0)
2669 		return ret;
2670 
2671 	rx_distrfln = ret & MII_VCT_TXRXPINS_DISTRFLN;
2672 	rx_vcttst_res = (ret & MII_VCT_TXRXPINS_VCTTST) >>
2673 			MII_VCT_TXRXPINS_VCTTST_SHIFT;
2674 
2675 	*finished = true;
2676 
2677 	switch (priv->vct_phase) {
2678 	case M88E3082_VCT_PHASE1:
2679 		tx_result = m88e3082_vct_cable_test_report_trans(tx_vcttst_res,
2680 								 tx_distrfln);
2681 		rx_result = m88e3082_vct_cable_test_report_trans(rx_vcttst_res,
2682 								 rx_distrfln);
2683 
2684 		ethnl_cable_test_result(phydev, ETHTOOL_A_CABLE_PAIR_A,
2685 					tx_result);
2686 		ethnl_cable_test_result(phydev, ETHTOOL_A_CABLE_PAIR_B,
2687 					rx_result);
2688 
2689 		if (tx_vcttst_res == MII_VCT_TXRXPINS_VCTTST_OPEN) {
2690 			done_phase = false;
2691 			priv->pair |= M88E3082_PAIR_A;
2692 		} else if (tx_distrfln < MII_VCT_TXRXPINS_DISTRFLN_MAX) {
2693 			u8 pair = ETHTOOL_A_CABLE_PAIR_A;
2694 			u32 cm = m88e3082_vct_distrfln_2_cm(tx_distrfln);
2695 
2696 			ethnl_cable_test_fault_length(phydev, pair, cm);
2697 		}
2698 
2699 		if (rx_vcttst_res == MII_VCT_TXRXPINS_VCTTST_OPEN) {
2700 			done_phase = false;
2701 			priv->pair |= M88E3082_PAIR_B;
2702 		} else if (rx_distrfln < MII_VCT_TXRXPINS_DISTRFLN_MAX) {
2703 			u8 pair = ETHTOOL_A_CABLE_PAIR_B;
2704 			u32 cm = m88e3082_vct_distrfln_2_cm(rx_distrfln);
2705 
2706 			ethnl_cable_test_fault_length(phydev, pair, cm);
2707 		}
2708 
2709 		break;
2710 	case M88E3082_VCT_PHASE2:
2711 		if (priv->pair & M88E3082_PAIR_A &&
2712 		    tx_vcttst_res == MII_VCT_TXRXPINS_VCTTST_OPEN &&
2713 		    tx_distrfln < MII_VCT_TXRXPINS_DISTRFLN_MAX) {
2714 			u8 pair = ETHTOOL_A_CABLE_PAIR_A;
2715 			u32 cm = m88e3082_vct_distrfln_2_cm(tx_distrfln);
2716 
2717 			ethnl_cable_test_fault_length(phydev, pair, cm);
2718 		}
2719 		if (priv->pair & M88E3082_PAIR_B &&
2720 		    rx_vcttst_res == MII_VCT_TXRXPINS_VCTTST_OPEN &&
2721 		    rx_distrfln < MII_VCT_TXRXPINS_DISTRFLN_MAX) {
2722 			u8 pair = ETHTOOL_A_CABLE_PAIR_B;
2723 			u32 cm = m88e3082_vct_distrfln_2_cm(rx_distrfln);
2724 
2725 			ethnl_cable_test_fault_length(phydev, pair, cm);
2726 		}
2727 
2728 		break;
2729 	default:
2730 		return -EINVAL;
2731 	}
2732 
2733 	if (!done_phase) {
2734 		*finished = false;
2735 		return m88e3082_vct_cable_test_start(phydev);
2736 	}
2737 	if (*finished)
2738 		priv->vct_phase = M88E3082_VCT_OFF;
2739 	return 0;
2740 }
2741 
2742 static int m88e1111_vct_cable_test_start(struct phy_device *phydev)
2743 {
2744 	int ret;
2745 
2746 	ret = marvell_cable_test_start_common(phydev);
2747 	if (ret)
2748 		return ret;
2749 
2750 	/* It needs some magic workarounds described in VCT manual for this PHY.
2751 	 */
2752 	ret = phy_write(phydev, 29, 0x0018);
2753 	if (ret < 0)
2754 		return ret;
2755 
2756 	ret = phy_write(phydev, 30, 0x00c2);
2757 	if (ret < 0)
2758 		return ret;
2759 
2760 	ret = phy_write(phydev, 30, 0x00ca);
2761 	if (ret < 0)
2762 		return ret;
2763 
2764 	ret = phy_write(phydev, 30, 0x00c2);
2765 	if (ret < 0)
2766 		return ret;
2767 
2768 	ret = phy_write_paged(phydev, MII_MARVELL_COPPER_PAGE, MII_VCT_SR,
2769 			      MII_VCT_TXPINS_ENVCT);
2770 	if (ret < 0)
2771 		return ret;
2772 
2773 	ret = phy_write(phydev, 29, 0x0018);
2774 	if (ret < 0)
2775 		return ret;
2776 
2777 	ret = phy_write(phydev, 30, 0x0042);
2778 	if (ret < 0)
2779 		return ret;
2780 
2781 	return 0;
2782 }
2783 
2784 static u32 m88e1111_vct_distrfln_2_cm(u8 distrfln)
2785 {
2786 	if (distrfln < 36)
2787 		return 0;
2788 
2789 	/* Original function for meters: y = 0.8018x - 28.751 */
2790 	return (8018 * distrfln - 287510) / 100;
2791 }
2792 
2793 static int m88e1111_vct_cable_test_get_status(struct phy_device *phydev,
2794 					      bool *finished)
2795 {
2796 	u8 vcttst_res, distrfln;
2797 	int ret, result;
2798 
2799 	*finished = false;
2800 
2801 	/* Each pair use one page: A-0, B-1, C-2, D-3 */
2802 	for (u8 i = 0; i < 4; i++) {
2803 		ret = phy_read_paged(phydev, i, MII_VCT_SR);
2804 		if (ret < 0)
2805 			return ret;
2806 		else if (i == 0 && ret & MII_VCT_TXPINS_ENVCT)
2807 			return 0;
2808 
2809 		distrfln = ret & MII_VCT_TXRXPINS_DISTRFLN;
2810 		vcttst_res = (ret & MII_VCT_TXRXPINS_VCTTST) >>
2811 			      MII_VCT_TXRXPINS_VCTTST_SHIFT;
2812 
2813 		result = m88e3082_vct_cable_test_report_trans(vcttst_res,
2814 							      distrfln);
2815 		ethnl_cable_test_result(phydev, i, result);
2816 
2817 		if (distrfln < MII_VCT_TXRXPINS_DISTRFLN_MAX) {
2818 			u32 cm = m88e1111_vct_distrfln_2_cm(distrfln);
2819 
2820 			ethnl_cable_test_fault_length(phydev, i, cm);
2821 		}
2822 	}
2823 
2824 	*finished = true;
2825 	return 0;
2826 }
2827 
2828 #ifdef CONFIG_HWMON
2829 struct marvell_hwmon_ops {
2830 	int (*config)(struct phy_device *phydev);
2831 	int (*get_temp)(struct phy_device *phydev, long *temp);
2832 	int (*get_temp_critical)(struct phy_device *phydev, long *temp);
2833 	int (*set_temp_critical)(struct phy_device *phydev, long temp);
2834 	int (*get_temp_alarm)(struct phy_device *phydev, long *alarm);
2835 };
2836 
2837 static const struct marvell_hwmon_ops *
2838 to_marvell_hwmon_ops(const struct phy_device *phydev)
2839 {
2840 	return phydev->drv->driver_data;
2841 }
2842 
2843 static int m88e1121_get_temp(struct phy_device *phydev, long *temp)
2844 {
2845 	int oldpage;
2846 	int ret = 0;
2847 	int val;
2848 
2849 	*temp = 0;
2850 
2851 	oldpage = phy_select_page(phydev, MII_MARVELL_MISC_TEST_PAGE);
2852 	if (oldpage < 0)
2853 		goto error;
2854 
2855 	/* Enable temperature sensor */
2856 	ret = __phy_read(phydev, MII_88E1121_MISC_TEST);
2857 	if (ret < 0)
2858 		goto error;
2859 
2860 	ret = __phy_write(phydev, MII_88E1121_MISC_TEST,
2861 			  ret | MII_88E1121_MISC_TEST_TEMP_SENSOR_EN);
2862 	if (ret < 0)
2863 		goto error;
2864 
2865 	/* Wait for temperature to stabilize */
2866 	usleep_range(10000, 12000);
2867 
2868 	val = __phy_read(phydev, MII_88E1121_MISC_TEST);
2869 	if (val < 0) {
2870 		ret = val;
2871 		goto error;
2872 	}
2873 
2874 	/* Disable temperature sensor */
2875 	ret = __phy_write(phydev, MII_88E1121_MISC_TEST,
2876 			  ret & ~MII_88E1121_MISC_TEST_TEMP_SENSOR_EN);
2877 	if (ret < 0)
2878 		goto error;
2879 
2880 	*temp = ((val & MII_88E1121_MISC_TEST_TEMP_MASK) - 5) * 5000;
2881 
2882 error:
2883 	return phy_restore_page(phydev, oldpage, ret);
2884 }
2885 
2886 static int m88e1510_get_temp(struct phy_device *phydev, long *temp)
2887 {
2888 	int ret;
2889 
2890 	*temp = 0;
2891 
2892 	ret = phy_read_paged(phydev, MII_MARVELL_MISC_TEST_PAGE,
2893 			     MII_88E1510_TEMP_SENSOR);
2894 	if (ret < 0)
2895 		return ret;
2896 
2897 	*temp = ((ret & MII_88E1510_TEMP_SENSOR_MASK) - 25) * 1000;
2898 
2899 	return 0;
2900 }
2901 
2902 static int m88e1510_get_temp_critical(struct phy_device *phydev, long *temp)
2903 {
2904 	int ret;
2905 
2906 	*temp = 0;
2907 
2908 	ret = phy_read_paged(phydev, MII_MARVELL_MISC_TEST_PAGE,
2909 			     MII_88E1121_MISC_TEST);
2910 	if (ret < 0)
2911 		return ret;
2912 
2913 	*temp = (((ret & MII_88E1510_MISC_TEST_TEMP_THRESHOLD_MASK) >>
2914 		  MII_88E1510_MISC_TEST_TEMP_THRESHOLD_SHIFT) * 5) - 25;
2915 	/* convert to mC */
2916 	*temp *= 1000;
2917 
2918 	return 0;
2919 }
2920 
2921 static int m88e1510_set_temp_critical(struct phy_device *phydev, long temp)
2922 {
2923 	temp = temp / 1000;
2924 	temp = clamp_val(DIV_ROUND_CLOSEST(temp, 5) + 5, 0, 0x1f);
2925 
2926 	return phy_modify_paged(phydev, MII_MARVELL_MISC_TEST_PAGE,
2927 				MII_88E1121_MISC_TEST,
2928 				MII_88E1510_MISC_TEST_TEMP_THRESHOLD_MASK,
2929 				temp << MII_88E1510_MISC_TEST_TEMP_THRESHOLD_SHIFT);
2930 }
2931 
2932 static int m88e1510_get_temp_alarm(struct phy_device *phydev, long *alarm)
2933 {
2934 	int ret;
2935 
2936 	*alarm = false;
2937 
2938 	ret = phy_read_paged(phydev, MII_MARVELL_MISC_TEST_PAGE,
2939 			     MII_88E1121_MISC_TEST);
2940 	if (ret < 0)
2941 		return ret;
2942 
2943 	*alarm = !!(ret & MII_88E1510_MISC_TEST_TEMP_IRQ);
2944 
2945 	return 0;
2946 }
2947 
2948 static int m88e6390_get_temp(struct phy_device *phydev, long *temp)
2949 {
2950 	int sum = 0;
2951 	int oldpage;
2952 	int ret = 0;
2953 	int i;
2954 
2955 	*temp = 0;
2956 
2957 	oldpage = phy_select_page(phydev, MII_MARVELL_MISC_TEST_PAGE);
2958 	if (oldpage < 0)
2959 		goto error;
2960 
2961 	/* Enable temperature sensor */
2962 	ret = __phy_read(phydev, MII_88E6390_MISC_TEST);
2963 	if (ret < 0)
2964 		goto error;
2965 
2966 	ret &= ~MII_88E6390_MISC_TEST_TEMP_SENSOR_MASK;
2967 	ret |= MII_88E6390_MISC_TEST_TEMP_SENSOR_ENABLE_SAMPLE_1S;
2968 
2969 	ret = __phy_write(phydev, MII_88E6390_MISC_TEST, ret);
2970 	if (ret < 0)
2971 		goto error;
2972 
2973 	/* Wait for temperature to stabilize */
2974 	usleep_range(10000, 12000);
2975 
2976 	/* Reading the temperature sense has an errata. You need to read
2977 	 * a number of times and take an average.
2978 	 */
2979 	for (i = 0; i < MII_88E6390_TEMP_SENSOR_SAMPLES; i++) {
2980 		ret = __phy_read(phydev, MII_88E6390_TEMP_SENSOR);
2981 		if (ret < 0)
2982 			goto error;
2983 		sum += ret & MII_88E6390_TEMP_SENSOR_MASK;
2984 	}
2985 
2986 	sum /= MII_88E6390_TEMP_SENSOR_SAMPLES;
2987 	*temp = (sum  - 75) * 1000;
2988 
2989 	/* Disable temperature sensor */
2990 	ret = __phy_read(phydev, MII_88E6390_MISC_TEST);
2991 	if (ret < 0)
2992 		goto error;
2993 
2994 	ret = ret & ~MII_88E6390_MISC_TEST_TEMP_SENSOR_MASK;
2995 	ret |= MII_88E6390_MISC_TEST_TEMP_SENSOR_DISABLE;
2996 
2997 	ret = __phy_write(phydev, MII_88E6390_MISC_TEST, ret);
2998 
2999 error:
3000 	phy_restore_page(phydev, oldpage, ret);
3001 
3002 	return ret;
3003 }
3004 
3005 static int m88e6393_get_temp(struct phy_device *phydev, long *temp)
3006 {
3007 	int err;
3008 
3009 	err = m88e1510_get_temp(phydev, temp);
3010 
3011 	/* 88E1510 measures T + 25, while the PHY on 88E6393X switch
3012 	 * T + 75, so we have to subtract another 50
3013 	 */
3014 	*temp -= 50000;
3015 
3016 	return err;
3017 }
3018 
3019 static int m88e6393_get_temp_critical(struct phy_device *phydev, long *temp)
3020 {
3021 	int ret;
3022 
3023 	*temp = 0;
3024 
3025 	ret = phy_read_paged(phydev, MII_MARVELL_MISC_TEST_PAGE,
3026 			     MII_88E6390_TEMP_SENSOR);
3027 	if (ret < 0)
3028 		return ret;
3029 
3030 	*temp = (((ret & MII_88E6393_TEMP_SENSOR_THRESHOLD_MASK) >>
3031 		  MII_88E6393_TEMP_SENSOR_THRESHOLD_SHIFT) - 75) * 1000;
3032 
3033 	return 0;
3034 }
3035 
3036 static int m88e6393_set_temp_critical(struct phy_device *phydev, long temp)
3037 {
3038 	temp = (temp / 1000) + 75;
3039 
3040 	return phy_modify_paged(phydev, MII_MARVELL_MISC_TEST_PAGE,
3041 				MII_88E6390_TEMP_SENSOR,
3042 				MII_88E6393_TEMP_SENSOR_THRESHOLD_MASK,
3043 				temp << MII_88E6393_TEMP_SENSOR_THRESHOLD_SHIFT);
3044 }
3045 
3046 static int m88e6393_hwmon_config(struct phy_device *phydev)
3047 {
3048 	int err;
3049 
3050 	err = m88e6393_set_temp_critical(phydev, 100000);
3051 	if (err)
3052 		return err;
3053 
3054 	return phy_modify_paged(phydev, MII_MARVELL_MISC_TEST_PAGE,
3055 				MII_88E6390_MISC_TEST,
3056 				MII_88E6390_MISC_TEST_TEMP_SENSOR_MASK |
3057 				MII_88E6393_MISC_TEST_SAMPLES_MASK |
3058 				MII_88E6393_MISC_TEST_RATE_MASK,
3059 				MII_88E6390_MISC_TEST_TEMP_SENSOR_ENABLE |
3060 				MII_88E6393_MISC_TEST_SAMPLES_2048 |
3061 				MII_88E6393_MISC_TEST_RATE_2_3MS);
3062 }
3063 
3064 static int marvell_hwmon_read(struct device *dev, enum hwmon_sensor_types type,
3065 			      u32 attr, int channel, long *temp)
3066 {
3067 	struct phy_device *phydev = dev_get_drvdata(dev);
3068 	const struct marvell_hwmon_ops *ops = to_marvell_hwmon_ops(phydev);
3069 	int err = -EOPNOTSUPP;
3070 
3071 	switch (attr) {
3072 	case hwmon_temp_input:
3073 		if (ops->get_temp)
3074 			err = ops->get_temp(phydev, temp);
3075 		break;
3076 	case hwmon_temp_crit:
3077 		if (ops->get_temp_critical)
3078 			err = ops->get_temp_critical(phydev, temp);
3079 		break;
3080 	case hwmon_temp_max_alarm:
3081 		if (ops->get_temp_alarm)
3082 			err = ops->get_temp_alarm(phydev, temp);
3083 		break;
3084 	}
3085 
3086 	return err;
3087 }
3088 
3089 static int marvell_hwmon_write(struct device *dev, enum hwmon_sensor_types type,
3090 			       u32 attr, int channel, long temp)
3091 {
3092 	struct phy_device *phydev = dev_get_drvdata(dev);
3093 	const struct marvell_hwmon_ops *ops = to_marvell_hwmon_ops(phydev);
3094 	int err = -EOPNOTSUPP;
3095 
3096 	switch (attr) {
3097 	case hwmon_temp_crit:
3098 		if (ops->set_temp_critical)
3099 			err = ops->set_temp_critical(phydev, temp);
3100 		break;
3101 	}
3102 
3103 	return err;
3104 }
3105 
3106 static umode_t marvell_hwmon_is_visible(const void *data,
3107 					enum hwmon_sensor_types type,
3108 					u32 attr, int channel)
3109 {
3110 	const struct phy_device *phydev = data;
3111 	const struct marvell_hwmon_ops *ops = to_marvell_hwmon_ops(phydev);
3112 
3113 	if (type != hwmon_temp)
3114 		return 0;
3115 
3116 	switch (attr) {
3117 	case hwmon_temp_input:
3118 		return ops->get_temp ? 0444 : 0;
3119 	case hwmon_temp_max_alarm:
3120 		return ops->get_temp_alarm ? 0444 : 0;
3121 	case hwmon_temp_crit:
3122 		return (ops->get_temp_critical ? 0444 : 0) |
3123 		       (ops->set_temp_critical ? 0200 : 0);
3124 	default:
3125 		return 0;
3126 	}
3127 }
3128 
3129 static u32 marvell_hwmon_chip_config[] = {
3130 	HWMON_C_REGISTER_TZ,
3131 	0
3132 };
3133 
3134 static const struct hwmon_channel_info marvell_hwmon_chip = {
3135 	.type = hwmon_chip,
3136 	.config = marvell_hwmon_chip_config,
3137 };
3138 
3139 /* we can define HWMON_T_CRIT and HWMON_T_MAX_ALARM even though these are not
3140  * defined for all PHYs, because the hwmon code checks whether the attributes
3141  * exists via the .is_visible method
3142  */
3143 static u32 marvell_hwmon_temp_config[] = {
3144 	HWMON_T_INPUT | HWMON_T_CRIT | HWMON_T_MAX_ALARM,
3145 	0
3146 };
3147 
3148 static const struct hwmon_channel_info marvell_hwmon_temp = {
3149 	.type = hwmon_temp,
3150 	.config = marvell_hwmon_temp_config,
3151 };
3152 
3153 static const struct hwmon_channel_info * const marvell_hwmon_info[] = {
3154 	&marvell_hwmon_chip,
3155 	&marvell_hwmon_temp,
3156 	NULL
3157 };
3158 
3159 static const struct hwmon_ops marvell_hwmon_hwmon_ops = {
3160 	.is_visible = marvell_hwmon_is_visible,
3161 	.read = marvell_hwmon_read,
3162 	.write = marvell_hwmon_write,
3163 };
3164 
3165 static const struct hwmon_chip_info marvell_hwmon_chip_info = {
3166 	.ops = &marvell_hwmon_hwmon_ops,
3167 	.info = marvell_hwmon_info,
3168 };
3169 
3170 static int marvell_hwmon_name(struct phy_device *phydev)
3171 {
3172 	struct marvell_priv *priv = phydev->priv;
3173 	struct device *dev = &phydev->mdio.dev;
3174 	const char *devname = dev_name(dev);
3175 	size_t len = strlen(devname);
3176 	int i, j;
3177 
3178 	priv->hwmon_name = devm_kzalloc(dev, len, GFP_KERNEL);
3179 	if (!priv->hwmon_name)
3180 		return -ENOMEM;
3181 
3182 	for (i = j = 0; i < len && devname[i]; i++) {
3183 		if (isalnum(devname[i]))
3184 			priv->hwmon_name[j++] = devname[i];
3185 	}
3186 
3187 	return 0;
3188 }
3189 
3190 static int marvell_hwmon_probe(struct phy_device *phydev)
3191 {
3192 	const struct marvell_hwmon_ops *ops = to_marvell_hwmon_ops(phydev);
3193 	struct marvell_priv *priv = phydev->priv;
3194 	struct device *dev = &phydev->mdio.dev;
3195 	int err;
3196 
3197 	if (!ops)
3198 		return 0;
3199 
3200 	err = marvell_hwmon_name(phydev);
3201 	if (err)
3202 		return err;
3203 
3204 	priv->hwmon_dev = devm_hwmon_device_register_with_info(
3205 		dev, priv->hwmon_name, phydev, &marvell_hwmon_chip_info, NULL);
3206 	if (IS_ERR(priv->hwmon_dev))
3207 		return PTR_ERR(priv->hwmon_dev);
3208 
3209 	if (ops->config)
3210 		err = ops->config(phydev);
3211 
3212 	return err;
3213 }
3214 
3215 static const struct marvell_hwmon_ops m88e1121_hwmon_ops = {
3216 	.get_temp = m88e1121_get_temp,
3217 };
3218 
3219 static const struct marvell_hwmon_ops m88e1510_hwmon_ops = {
3220 	.get_temp = m88e1510_get_temp,
3221 	.get_temp_critical = m88e1510_get_temp_critical,
3222 	.set_temp_critical = m88e1510_set_temp_critical,
3223 	.get_temp_alarm = m88e1510_get_temp_alarm,
3224 };
3225 
3226 static const struct marvell_hwmon_ops m88e6390_hwmon_ops = {
3227 	.get_temp = m88e6390_get_temp,
3228 };
3229 
3230 static const struct marvell_hwmon_ops m88e6393_hwmon_ops = {
3231 	.config = m88e6393_hwmon_config,
3232 	.get_temp = m88e6393_get_temp,
3233 	.get_temp_critical = m88e6393_get_temp_critical,
3234 	.set_temp_critical = m88e6393_set_temp_critical,
3235 	.get_temp_alarm = m88e1510_get_temp_alarm,
3236 };
3237 
3238 #define DEF_MARVELL_HWMON_OPS(s) (&(s))
3239 
3240 #else
3241 
3242 #define DEF_MARVELL_HWMON_OPS(s) NULL
3243 
3244 static int marvell_hwmon_probe(struct phy_device *phydev)
3245 {
3246 	return 0;
3247 }
3248 #endif
3249 
3250 static int m88e1318_led_brightness_set(struct phy_device *phydev,
3251 				       u8 index, enum led_brightness value)
3252 {
3253 	int reg;
3254 
3255 	reg = phy_read_paged(phydev, MII_MARVELL_LED_PAGE,
3256 			     MII_88E1318S_PHY_LED_FUNC);
3257 	if (reg < 0)
3258 		return reg;
3259 
3260 	switch (index) {
3261 	case 0:
3262 	case 1:
3263 	case 2:
3264 		reg &= ~(0xf << (4 * index));
3265 		if (value == LED_OFF)
3266 			reg |= MII_88E1318S_PHY_LED_FUNC_OFF << (4 * index);
3267 		else
3268 			reg |= MII_88E1318S_PHY_LED_FUNC_ON << (4 * index);
3269 		break;
3270 	default:
3271 		return -EINVAL;
3272 	}
3273 
3274 	return phy_write_paged(phydev, MII_MARVELL_LED_PAGE,
3275 			       MII_88E1318S_PHY_LED_FUNC, reg);
3276 }
3277 
3278 static int m88e1318_led_blink_set(struct phy_device *phydev, u8 index,
3279 				  unsigned long *delay_on,
3280 				  unsigned long *delay_off)
3281 {
3282 	int reg;
3283 
3284 	reg = phy_read_paged(phydev, MII_MARVELL_LED_PAGE,
3285 			     MII_88E1318S_PHY_LED_FUNC);
3286 	if (reg < 0)
3287 		return reg;
3288 
3289 	switch (index) {
3290 	case 0:
3291 	case 1:
3292 	case 2:
3293 		reg &= ~(0xf << (4 * index));
3294 		reg |= MII_88E1318S_PHY_LED_FUNC_BLINK << (4 * index);
3295 		/* Reset default is 84ms */
3296 		*delay_on = 84 / 2;
3297 		*delay_off = 84 / 2;
3298 		break;
3299 	default:
3300 		return -EINVAL;
3301 	}
3302 
3303 	return phy_write_paged(phydev, MII_MARVELL_LED_PAGE,
3304 			       MII_88E1318S_PHY_LED_FUNC, reg);
3305 }
3306 
3307 struct marvell_led_rules {
3308 	int mode;
3309 	unsigned long rules;
3310 };
3311 
3312 static const struct marvell_led_rules marvell_led0[] = {
3313 	{
3314 		.mode = 0,
3315 		.rules = BIT(TRIGGER_NETDEV_LINK),
3316 	},
3317 	{
3318 		.mode = 1,
3319 		.rules = (BIT(TRIGGER_NETDEV_LINK) |
3320 			  BIT(TRIGGER_NETDEV_RX) |
3321 			  BIT(TRIGGER_NETDEV_TX)),
3322 	},
3323 	{
3324 		.mode = 3,
3325 		.rules = (BIT(TRIGGER_NETDEV_RX) |
3326 			  BIT(TRIGGER_NETDEV_TX)),
3327 	},
3328 	{
3329 		.mode = 4,
3330 		.rules = (BIT(TRIGGER_NETDEV_RX) |
3331 			  BIT(TRIGGER_NETDEV_TX)),
3332 	},
3333 	{
3334 		.mode = 5,
3335 		.rules = BIT(TRIGGER_NETDEV_TX),
3336 	},
3337 	{
3338 		.mode = 6,
3339 		.rules = BIT(TRIGGER_NETDEV_LINK),
3340 	},
3341 	{
3342 		.mode = 7,
3343 		.rules = BIT(TRIGGER_NETDEV_LINK_1000),
3344 	},
3345 	{
3346 		.mode = 8,
3347 		.rules = 0,
3348 	},
3349 };
3350 
3351 static const struct marvell_led_rules marvell_led1[] = {
3352 	{
3353 		.mode = 1,
3354 		.rules = (BIT(TRIGGER_NETDEV_LINK) |
3355 			  BIT(TRIGGER_NETDEV_RX) |
3356 			  BIT(TRIGGER_NETDEV_TX)),
3357 	},
3358 	{
3359 		.mode = 2,
3360 		.rules = (BIT(TRIGGER_NETDEV_LINK) |
3361 			  BIT(TRIGGER_NETDEV_RX)),
3362 	},
3363 	{
3364 		.mode = 3,
3365 		.rules = (BIT(TRIGGER_NETDEV_RX) |
3366 			  BIT(TRIGGER_NETDEV_TX)),
3367 	},
3368 	{
3369 		.mode = 4,
3370 		.rules = (BIT(TRIGGER_NETDEV_RX) |
3371 			  BIT(TRIGGER_NETDEV_TX)),
3372 	},
3373 	{
3374 		.mode = 6,
3375 		.rules = (BIT(TRIGGER_NETDEV_LINK_100) |
3376 			  BIT(TRIGGER_NETDEV_LINK_1000)),
3377 	},
3378 	{
3379 		.mode = 7,
3380 		.rules = BIT(TRIGGER_NETDEV_LINK_100),
3381 	},
3382 	{
3383 		.mode = 8,
3384 		.rules = 0,
3385 	},
3386 };
3387 
3388 static const struct marvell_led_rules marvell_led2[] = {
3389 	{
3390 		.mode = 0,
3391 		.rules = BIT(TRIGGER_NETDEV_LINK),
3392 	},
3393 	{
3394 		.mode = 1,
3395 		.rules = (BIT(TRIGGER_NETDEV_LINK) |
3396 			  BIT(TRIGGER_NETDEV_RX) |
3397 			  BIT(TRIGGER_NETDEV_TX)),
3398 	},
3399 	{
3400 		.mode = 3,
3401 		.rules = (BIT(TRIGGER_NETDEV_RX) |
3402 			  BIT(TRIGGER_NETDEV_TX)),
3403 	},
3404 	{
3405 		.mode = 4,
3406 		.rules = (BIT(TRIGGER_NETDEV_RX) |
3407 			  BIT(TRIGGER_NETDEV_TX)),
3408 	},
3409 	{
3410 		.mode = 5,
3411 		.rules = BIT(TRIGGER_NETDEV_TX),
3412 	},
3413 	{
3414 		.mode = 6,
3415 		.rules = (BIT(TRIGGER_NETDEV_LINK_10) |
3416 			  BIT(TRIGGER_NETDEV_LINK_1000)),
3417 	},
3418 	{
3419 		.mode = 7,
3420 		.rules = BIT(TRIGGER_NETDEV_LINK_10),
3421 	},
3422 	{
3423 		.mode = 8,
3424 		.rules = 0,
3425 	},
3426 };
3427 
3428 static int marvell_find_led_mode(unsigned long rules,
3429 				 const struct marvell_led_rules *marvell_rules,
3430 				 int count,
3431 				 int *mode)
3432 {
3433 	int i;
3434 
3435 	for (i = 0; i < count; i++) {
3436 		if (marvell_rules[i].rules == rules) {
3437 			*mode = marvell_rules[i].mode;
3438 			return 0;
3439 		}
3440 	}
3441 	return -EOPNOTSUPP;
3442 }
3443 
3444 static int marvell_get_led_mode(u8 index, unsigned long rules, int *mode)
3445 {
3446 	int ret;
3447 
3448 	switch (index) {
3449 	case 0:
3450 		ret = marvell_find_led_mode(rules, marvell_led0,
3451 					    ARRAY_SIZE(marvell_led0), mode);
3452 		break;
3453 	case 1:
3454 		ret = marvell_find_led_mode(rules, marvell_led1,
3455 					    ARRAY_SIZE(marvell_led1), mode);
3456 		break;
3457 	case 2:
3458 		ret = marvell_find_led_mode(rules, marvell_led2,
3459 					    ARRAY_SIZE(marvell_led2), mode);
3460 		break;
3461 	default:
3462 		ret = -EINVAL;
3463 	}
3464 
3465 	return ret;
3466 }
3467 
3468 static int marvell_find_led_rules(unsigned long *rules,
3469 				  const struct marvell_led_rules *marvell_rules,
3470 				  int count,
3471 				  int mode)
3472 {
3473 	int i;
3474 
3475 	for (i = 0; i < count; i++) {
3476 		if (marvell_rules[i].mode == mode) {
3477 			*rules = marvell_rules[i].rules;
3478 			return 0;
3479 		}
3480 	}
3481 	return -EOPNOTSUPP;
3482 }
3483 
3484 static int marvell_get_led_rules(u8 index, unsigned long *rules, int mode)
3485 {
3486 	int ret;
3487 
3488 	switch (index) {
3489 	case 0:
3490 		ret = marvell_find_led_rules(rules, marvell_led0,
3491 					     ARRAY_SIZE(marvell_led0), mode);
3492 		break;
3493 	case 1:
3494 		ret = marvell_find_led_rules(rules, marvell_led1,
3495 					     ARRAY_SIZE(marvell_led1), mode);
3496 		break;
3497 	case 2:
3498 		ret = marvell_find_led_rules(rules, marvell_led2,
3499 					     ARRAY_SIZE(marvell_led2), mode);
3500 		break;
3501 	default:
3502 		ret = -EOPNOTSUPP;
3503 	}
3504 
3505 	return ret;
3506 }
3507 
3508 static int m88e1318_led_hw_is_supported(struct phy_device *phydev, u8 index,
3509 					unsigned long rules)
3510 {
3511 	int mode, ret;
3512 
3513 	switch (index) {
3514 	case 0:
3515 	case 1:
3516 	case 2:
3517 		ret = marvell_get_led_mode(index, rules, &mode);
3518 		break;
3519 	default:
3520 		ret = -EINVAL;
3521 	}
3522 
3523 	return ret;
3524 }
3525 
3526 static int m88e1318_led_hw_control_set(struct phy_device *phydev, u8 index,
3527 				       unsigned long rules)
3528 {
3529 	int mode, ret, reg;
3530 
3531 	switch (index) {
3532 	case 0:
3533 	case 1:
3534 	case 2:
3535 		ret = marvell_get_led_mode(index, rules, &mode);
3536 		break;
3537 	default:
3538 		ret = -EINVAL;
3539 	}
3540 
3541 	if (ret < 0)
3542 		return ret;
3543 
3544 	reg = phy_read_paged(phydev, MII_MARVELL_LED_PAGE,
3545 			     MII_88E1318S_PHY_LED_FUNC);
3546 	if (reg < 0)
3547 		return reg;
3548 
3549 	reg &= ~(0xf << (4 * index));
3550 	reg |= mode << (4 * index);
3551 	return phy_write_paged(phydev, MII_MARVELL_LED_PAGE,
3552 			       MII_88E1318S_PHY_LED_FUNC, reg);
3553 }
3554 
3555 static int m88e1318_led_hw_control_get(struct phy_device *phydev, u8 index,
3556 				       unsigned long *rules)
3557 {
3558 	int mode, reg;
3559 
3560 	if (index > 2)
3561 		return -EINVAL;
3562 
3563 	reg = phy_read_paged(phydev, MII_MARVELL_LED_PAGE,
3564 			     MII_88E1318S_PHY_LED_FUNC);
3565 	if (reg < 0)
3566 		return reg;
3567 
3568 	mode = (reg >> (4 * index)) & 0xf;
3569 
3570 	return marvell_get_led_rules(index, rules, mode);
3571 }
3572 
3573 static int marvell_probe(struct phy_device *phydev)
3574 {
3575 	struct marvell_priv *priv;
3576 
3577 	priv = devm_kzalloc(&phydev->mdio.dev, sizeof(*priv), GFP_KERNEL);
3578 	if (!priv)
3579 		return -ENOMEM;
3580 
3581 	phydev->priv = priv;
3582 
3583 	return marvell_hwmon_probe(phydev);
3584 }
3585 
3586 static int m88e1510_sfp_insert(void *upstream, const struct sfp_eeprom_id *id)
3587 {
3588 	DECLARE_PHY_INTERFACE_MASK(interfaces);
3589 	struct phy_device *phydev = upstream;
3590 	phy_interface_t interface;
3591 	struct device *dev;
3592 	int oldpage;
3593 	int ret = 0;
3594 	u16 mode;
3595 
3596 	__ETHTOOL_DECLARE_LINK_MODE_MASK(supported) = { 0, };
3597 
3598 	dev = &phydev->mdio.dev;
3599 
3600 	sfp_parse_support(phydev->sfp_bus, id, supported, interfaces);
3601 	interface = sfp_select_interface(phydev->sfp_bus, supported);
3602 
3603 	dev_info(dev, "%s SFP module inserted\n", phy_modes(interface));
3604 
3605 	switch (interface) {
3606 	case PHY_INTERFACE_MODE_1000BASEX:
3607 		mode = MII_88E1510_GEN_CTRL_REG_1_MODE_RGMII_1000X;
3608 
3609 		break;
3610 	case PHY_INTERFACE_MODE_100BASEX:
3611 		mode = MII_88E1510_GEN_CTRL_REG_1_MODE_RGMII_100FX;
3612 
3613 		break;
3614 	case PHY_INTERFACE_MODE_SGMII:
3615 		mode = MII_88E1510_GEN_CTRL_REG_1_MODE_RGMII_SGMII;
3616 
3617 		break;
3618 	default:
3619 		dev_err(dev, "Incompatible SFP module inserted\n");
3620 
3621 		return -EINVAL;
3622 	}
3623 
3624 	oldpage = phy_select_page(phydev, MII_MARVELL_MODE_PAGE);
3625 	if (oldpage < 0)
3626 		goto error;
3627 
3628 	ret = __phy_modify(phydev, MII_88E1510_GEN_CTRL_REG_1,
3629 			   MII_88E1510_GEN_CTRL_REG_1_MODE_MASK, mode);
3630 	if (ret < 0)
3631 		goto error;
3632 
3633 	ret = __phy_set_bits(phydev, MII_88E1510_GEN_CTRL_REG_1,
3634 			     MII_88E1510_GEN_CTRL_REG_1_RESET);
3635 
3636 error:
3637 	return phy_restore_page(phydev, oldpage, ret);
3638 }
3639 
3640 static void m88e1510_sfp_remove(void *upstream)
3641 {
3642 	struct phy_device *phydev = upstream;
3643 	int oldpage;
3644 	int ret = 0;
3645 
3646 	oldpage = phy_select_page(phydev, MII_MARVELL_MODE_PAGE);
3647 	if (oldpage < 0)
3648 		goto error;
3649 
3650 	ret = __phy_modify(phydev, MII_88E1510_GEN_CTRL_REG_1,
3651 			   MII_88E1510_GEN_CTRL_REG_1_MODE_MASK,
3652 			   MII_88E1510_GEN_CTRL_REG_1_MODE_RGMII);
3653 	if (ret < 0)
3654 		goto error;
3655 
3656 	ret = __phy_set_bits(phydev, MII_88E1510_GEN_CTRL_REG_1,
3657 			     MII_88E1510_GEN_CTRL_REG_1_RESET);
3658 
3659 error:
3660 	phy_restore_page(phydev, oldpage, ret);
3661 }
3662 
3663 static const struct sfp_upstream_ops m88e1510_sfp_ops = {
3664 	.module_insert = m88e1510_sfp_insert,
3665 	.module_remove = m88e1510_sfp_remove,
3666 	.attach = phy_sfp_attach,
3667 	.detach = phy_sfp_detach,
3668 	.connect_phy = phy_sfp_connect_phy,
3669 	.disconnect_phy = phy_sfp_disconnect_phy,
3670 };
3671 
3672 static int m88e1510_probe(struct phy_device *phydev)
3673 {
3674 	int err;
3675 
3676 	err = marvell_probe(phydev);
3677 	if (err)
3678 		return err;
3679 
3680 	return phy_sfp_probe(phydev, &m88e1510_sfp_ops);
3681 }
3682 
3683 static struct phy_driver marvell_drivers[] = {
3684 	{
3685 		.phy_id = MARVELL_PHY_ID_88E1101,
3686 		.phy_id_mask = MARVELL_PHY_ID_MASK,
3687 		.name = "Marvell 88E1101",
3688 		/* PHY_GBIT_FEATURES */
3689 		.probe = marvell_probe,
3690 		.config_init = marvell_config_init,
3691 		.config_aneg = m88e1101_config_aneg,
3692 		.config_intr = marvell_config_intr,
3693 		.handle_interrupt = marvell_handle_interrupt,
3694 		.resume = genphy_resume,
3695 		.suspend = genphy_suspend,
3696 		.read_page = marvell_read_page,
3697 		.write_page = marvell_write_page,
3698 		.get_sset_count = marvell_get_sset_count,
3699 		.get_strings = marvell_get_strings,
3700 		.get_stats = marvell_get_stats,
3701 	},
3702 	{
3703 		.phy_id = MARVELL_PHY_ID_88E3082,
3704 		.phy_id_mask = MARVELL_PHY_ID_MASK,
3705 		.name = "Marvell 88E308X/88E609X Family",
3706 		/* PHY_BASIC_FEATURES */
3707 		.probe = marvell_probe,
3708 		.config_init = marvell_config_init,
3709 		.aneg_done = marvell_aneg_done,
3710 		.read_status = marvell_read_status,
3711 		.resume = genphy_resume,
3712 		.suspend = genphy_suspend,
3713 		.cable_test_start = m88e3082_vct_cable_test_start,
3714 		.cable_test_get_status = m88e3082_vct_cable_test_get_status,
3715 	},
3716 	{
3717 		.phy_id = MARVELL_PHY_ID_88E1112,
3718 		.phy_id_mask = MARVELL_PHY_ID_MASK,
3719 		.name = "Marvell 88E1112",
3720 		/* PHY_GBIT_FEATURES */
3721 		.probe = marvell_probe,
3722 		.inband_caps = m88e1111_inband_caps,
3723 		.config_inband = m88e1111_config_inband,
3724 		.config_init = m88e1112_config_init,
3725 		.config_aneg = marvell_config_aneg,
3726 		.config_intr = marvell_config_intr,
3727 		.handle_interrupt = marvell_handle_interrupt,
3728 		.resume = genphy_resume,
3729 		.suspend = genphy_suspend,
3730 		.read_page = marvell_read_page,
3731 		.write_page = marvell_write_page,
3732 		.get_sset_count = marvell_get_sset_count,
3733 		.get_strings = marvell_get_strings,
3734 		.get_stats = marvell_get_stats,
3735 		.get_tunable = m88e1011_get_tunable,
3736 		.set_tunable = m88e1011_set_tunable,
3737 	},
3738 	{
3739 		.phy_id = MARVELL_PHY_ID_88E1111,
3740 		.phy_id_mask = MARVELL_PHY_ID_MASK,
3741 		.name = "Marvell 88E1111",
3742 		/* PHY_GBIT_FEATURES */
3743 		.flags = PHY_POLL_CABLE_TEST,
3744 		.probe = marvell_probe,
3745 		.inband_caps = m88e1111_inband_caps,
3746 		.config_inband = m88e1111_config_inband,
3747 		.config_init = m88e1111gbe_config_init,
3748 		.config_aneg = m88e1111_config_aneg,
3749 		.read_status = marvell_read_status,
3750 		.config_intr = marvell_config_intr,
3751 		.handle_interrupt = marvell_handle_interrupt,
3752 		.resume = genphy_resume,
3753 		.suspend = genphy_suspend,
3754 		.read_page = marvell_read_page,
3755 		.write_page = marvell_write_page,
3756 		.get_sset_count = marvell_get_sset_count,
3757 		.get_strings = marvell_get_strings,
3758 		.get_stats = marvell_get_stats,
3759 		.get_tunable = m88e1111_get_tunable,
3760 		.set_tunable = m88e1111_set_tunable,
3761 		.cable_test_start = m88e1111_vct_cable_test_start,
3762 		.cable_test_get_status = m88e1111_vct_cable_test_get_status,
3763 	},
3764 	{
3765 		.phy_id = MARVELL_PHY_ID_88E1111_FINISAR,
3766 		.phy_id_mask = MARVELL_PHY_ID_MASK,
3767 		.name = "Marvell 88E1111 (Finisar)",
3768 		/* PHY_GBIT_FEATURES */
3769 		.probe = marvell_probe,
3770 		.inband_caps = m88e1111_inband_caps,
3771 		.config_inband = m88e1111_config_inband,
3772 		.config_init = m88e1111gbe_config_init,
3773 		.config_aneg = m88e1111_config_aneg,
3774 		.read_status = marvell_read_status,
3775 		.config_intr = marvell_config_intr,
3776 		.handle_interrupt = marvell_handle_interrupt,
3777 		.resume = genphy_resume,
3778 		.suspend = genphy_suspend,
3779 		.read_page = marvell_read_page,
3780 		.write_page = marvell_write_page,
3781 		.get_sset_count = marvell_get_sset_count,
3782 		.get_strings = marvell_get_strings,
3783 		.get_stats = marvell_get_stats,
3784 		.get_tunable = m88e1111_get_tunable,
3785 		.set_tunable = m88e1111_set_tunable,
3786 	},
3787 	{
3788 		.phy_id = MARVELL_PHY_ID_88E1118,
3789 		.phy_id_mask = MARVELL_PHY_ID_MASK,
3790 		.name = "Marvell 88E1118",
3791 		/* PHY_GBIT_FEATURES */
3792 		.probe = marvell_probe,
3793 		.config_init = m88e1118_config_init,
3794 		.config_aneg = m88e1118_config_aneg,
3795 		.config_intr = marvell_config_intr,
3796 		.handle_interrupt = marvell_handle_interrupt,
3797 		.resume = genphy_resume,
3798 		.suspend = genphy_suspend,
3799 		.read_page = marvell_read_page,
3800 		.write_page = marvell_write_page,
3801 		.get_sset_count = marvell_get_sset_count,
3802 		.get_strings = marvell_get_strings,
3803 		.get_stats = marvell_get_stats,
3804 	},
3805 	{
3806 		.phy_id = MARVELL_PHY_ID_88E1121R,
3807 		.phy_id_mask = MARVELL_PHY_ID_MASK,
3808 		.name = "Marvell 88E1121R",
3809 		.driver_data = DEF_MARVELL_HWMON_OPS(m88e1121_hwmon_ops),
3810 		/* PHY_GBIT_FEATURES */
3811 		.probe = marvell_probe,
3812 		.config_init = marvell_1011gbe_config_init,
3813 		.config_aneg = m88e1121_config_aneg,
3814 		.read_status = marvell_read_status,
3815 		.config_intr = marvell_config_intr,
3816 		.handle_interrupt = marvell_handle_interrupt,
3817 		.resume = genphy_resume,
3818 		.suspend = genphy_suspend,
3819 		.read_page = marvell_read_page,
3820 		.write_page = marvell_write_page,
3821 		.get_sset_count = marvell_get_sset_count,
3822 		.get_strings = marvell_get_strings,
3823 		.get_stats = marvell_get_stats,
3824 		.get_tunable = m88e1011_get_tunable,
3825 		.set_tunable = m88e1011_set_tunable,
3826 	},
3827 	{
3828 		.phy_id = MARVELL_PHY_ID_88E1318S,
3829 		.phy_id_mask = MARVELL_PHY_ID_MASK,
3830 		.name = "Marvell 88E1318S",
3831 		/* PHY_GBIT_FEATURES */
3832 		.probe = marvell_probe,
3833 		.config_init = m88e1318_config_init,
3834 		.config_aneg = m88e1318_config_aneg,
3835 		.read_status = marvell_read_status,
3836 		.config_intr = marvell_config_intr,
3837 		.handle_interrupt = marvell_handle_interrupt,
3838 		.get_wol = m88e1318_get_wol,
3839 		.set_wol = m88e1318_set_wol,
3840 		.resume = genphy_resume,
3841 		.suspend = genphy_suspend,
3842 		.read_page = marvell_read_page,
3843 		.write_page = marvell_write_page,
3844 		.get_sset_count = marvell_get_sset_count,
3845 		.get_strings = marvell_get_strings,
3846 		.get_stats = marvell_get_stats,
3847 		.led_brightness_set = m88e1318_led_brightness_set,
3848 		.led_blink_set = m88e1318_led_blink_set,
3849 		.led_hw_is_supported = m88e1318_led_hw_is_supported,
3850 		.led_hw_control_set = m88e1318_led_hw_control_set,
3851 		.led_hw_control_get = m88e1318_led_hw_control_get,
3852 	},
3853 	{
3854 		.phy_id = MARVELL_PHY_ID_88E1145,
3855 		.phy_id_mask = MARVELL_PHY_ID_MASK,
3856 		.name = "Marvell 88E1145",
3857 		/* PHY_GBIT_FEATURES */
3858 		.flags = PHY_POLL_CABLE_TEST,
3859 		.probe = marvell_probe,
3860 		.config_init = m88e1145_config_init,
3861 		.config_aneg = m88e1101_config_aneg,
3862 		.config_intr = marvell_config_intr,
3863 		.handle_interrupt = marvell_handle_interrupt,
3864 		.resume = genphy_resume,
3865 		.suspend = genphy_suspend,
3866 		.read_page = marvell_read_page,
3867 		.write_page = marvell_write_page,
3868 		.get_sset_count = marvell_get_sset_count,
3869 		.get_strings = marvell_get_strings,
3870 		.get_stats = marvell_get_stats,
3871 		.get_tunable = m88e1111_get_tunable,
3872 		.set_tunable = m88e1111_set_tunable,
3873 		.cable_test_start = m88e1111_vct_cable_test_start,
3874 		.cable_test_get_status = m88e1111_vct_cable_test_get_status,
3875 	},
3876 	{
3877 		.phy_id = MARVELL_PHY_ID_88E1149R,
3878 		.phy_id_mask = MARVELL_PHY_ID_MASK,
3879 		.name = "Marvell 88E1149R",
3880 		/* PHY_GBIT_FEATURES */
3881 		.probe = marvell_probe,
3882 		.config_init = m88e1149_config_init,
3883 		.config_aneg = m88e1118_config_aneg,
3884 		.config_intr = marvell_config_intr,
3885 		.handle_interrupt = marvell_handle_interrupt,
3886 		.resume = genphy_resume,
3887 		.suspend = genphy_suspend,
3888 		.read_page = marvell_read_page,
3889 		.write_page = marvell_write_page,
3890 		.get_sset_count = marvell_get_sset_count,
3891 		.get_strings = marvell_get_strings,
3892 		.get_stats = marvell_get_stats,
3893 	},
3894 	{
3895 		.phy_id = MARVELL_PHY_ID_88E1240,
3896 		.phy_id_mask = MARVELL_PHY_ID_MASK,
3897 		.name = "Marvell 88E1240",
3898 		/* PHY_GBIT_FEATURES */
3899 		.probe = marvell_probe,
3900 		.config_init = m88e1112_config_init,
3901 		.config_aneg = marvell_config_aneg,
3902 		.config_intr = marvell_config_intr,
3903 		.handle_interrupt = marvell_handle_interrupt,
3904 		.resume = genphy_resume,
3905 		.suspend = genphy_suspend,
3906 		.read_page = marvell_read_page,
3907 		.write_page = marvell_write_page,
3908 		.get_sset_count = marvell_get_sset_count,
3909 		.get_strings = marvell_get_strings,
3910 		.get_stats = marvell_get_stats,
3911 		.get_tunable = m88e1011_get_tunable,
3912 		.set_tunable = m88e1011_set_tunable,
3913 	},
3914 	{
3915 		.phy_id = MARVELL_PHY_ID_88E1116R,
3916 		.phy_id_mask = MARVELL_PHY_ID_MASK,
3917 		.name = "Marvell 88E1116R",
3918 		/* PHY_GBIT_FEATURES */
3919 		.probe = marvell_probe,
3920 		.config_init = m88e1116r_config_init,
3921 		.config_intr = marvell_config_intr,
3922 		.handle_interrupt = marvell_handle_interrupt,
3923 		.resume = genphy_resume,
3924 		.suspend = genphy_suspend,
3925 		.read_page = marvell_read_page,
3926 		.write_page = marvell_write_page,
3927 		.get_sset_count = marvell_get_sset_count,
3928 		.get_strings = marvell_get_strings,
3929 		.get_stats = marvell_get_stats,
3930 		.get_tunable = m88e1011_get_tunable,
3931 		.set_tunable = m88e1011_set_tunable,
3932 	},
3933 	{
3934 		.phy_id = MARVELL_PHY_ID_88E1510,
3935 		.phy_id_mask = MARVELL_PHY_ID_MASK,
3936 		.name = "Marvell 88E1510",
3937 		.driver_data = DEF_MARVELL_HWMON_OPS(m88e1510_hwmon_ops),
3938 		.features = PHY_GBIT_FIBRE_FEATURES,
3939 		.flags = PHY_POLL_CABLE_TEST,
3940 		.probe = m88e1510_probe,
3941 		.config_init = m88e1510_config_init,
3942 		.config_aneg = m88e1510_config_aneg,
3943 		.read_status = marvell_read_status,
3944 		.config_intr = marvell_config_intr,
3945 		.handle_interrupt = marvell_handle_interrupt,
3946 		.get_wol = m88e1318_get_wol,
3947 		.set_wol = m88e1318_set_wol,
3948 		.resume = marvell_resume,
3949 		.suspend = marvell_suspend,
3950 		.read_page = marvell_read_page,
3951 		.write_page = marvell_write_page,
3952 		.get_sset_count = marvell_get_sset_count,
3953 		.get_strings = marvell_get_strings,
3954 		.get_stats = marvell_get_stats,
3955 		.set_loopback = m88e1510_loopback,
3956 		.get_tunable = m88e1011_get_tunable,
3957 		.set_tunable = m88e1011_set_tunable,
3958 		.cable_test_start = marvell_vct7_cable_test_start,
3959 		.cable_test_tdr_start = marvell_vct5_cable_test_tdr_start,
3960 		.cable_test_get_status = marvell_vct7_cable_test_get_status,
3961 		.led_brightness_set = m88e1318_led_brightness_set,
3962 		.led_blink_set = m88e1318_led_blink_set,
3963 		.led_hw_is_supported = m88e1318_led_hw_is_supported,
3964 		.led_hw_control_set = m88e1318_led_hw_control_set,
3965 		.led_hw_control_get = m88e1318_led_hw_control_get,
3966 	},
3967 	{
3968 		.phy_id = MARVELL_PHY_ID_88E1540,
3969 		.phy_id_mask = MARVELL_PHY_ID_MASK,
3970 		.name = "Marvell 88E1540",
3971 		.driver_data = DEF_MARVELL_HWMON_OPS(m88e1510_hwmon_ops),
3972 		/* PHY_GBIT_FEATURES */
3973 		.flags = PHY_POLL_CABLE_TEST,
3974 		.probe = marvell_probe,
3975 		.config_init = marvell_1011gbe_config_init,
3976 		.config_aneg = m88e1510_config_aneg,
3977 		.read_status = marvell_read_status,
3978 		.config_intr = marvell_config_intr,
3979 		.handle_interrupt = marvell_handle_interrupt,
3980 		.resume = genphy_resume,
3981 		.suspend = genphy_suspend,
3982 		.read_page = marvell_read_page,
3983 		.write_page = marvell_write_page,
3984 		.get_sset_count = marvell_get_sset_count,
3985 		.get_strings = marvell_get_strings,
3986 		.get_stats = marvell_get_stats,
3987 		.get_tunable = m88e1540_get_tunable,
3988 		.set_tunable = m88e1540_set_tunable,
3989 		.cable_test_start = marvell_vct7_cable_test_start,
3990 		.cable_test_tdr_start = marvell_vct5_cable_test_tdr_start,
3991 		.cable_test_get_status = marvell_vct7_cable_test_get_status,
3992 		.led_brightness_set = m88e1318_led_brightness_set,
3993 		.led_blink_set = m88e1318_led_blink_set,
3994 		.led_hw_is_supported = m88e1318_led_hw_is_supported,
3995 		.led_hw_control_set = m88e1318_led_hw_control_set,
3996 		.led_hw_control_get = m88e1318_led_hw_control_get,
3997 	},
3998 	{
3999 		.phy_id = MARVELL_PHY_ID_88E1545,
4000 		.phy_id_mask = MARVELL_PHY_ID_MASK,
4001 		.name = "Marvell 88E1545",
4002 		.driver_data = DEF_MARVELL_HWMON_OPS(m88e1510_hwmon_ops),
4003 		.probe = marvell_probe,
4004 		/* PHY_GBIT_FEATURES */
4005 		.flags = PHY_POLL_CABLE_TEST,
4006 		.config_init = marvell_1011gbe_config_init,
4007 		.config_aneg = m88e1510_config_aneg,
4008 		.read_status = marvell_read_status,
4009 		.config_intr = marvell_config_intr,
4010 		.handle_interrupt = marvell_handle_interrupt,
4011 		.resume = genphy_resume,
4012 		.suspend = genphy_suspend,
4013 		.read_page = marvell_read_page,
4014 		.write_page = marvell_write_page,
4015 		.get_sset_count = marvell_get_sset_count,
4016 		.get_strings = marvell_get_strings,
4017 		.get_stats = marvell_get_stats,
4018 		.get_tunable = m88e1540_get_tunable,
4019 		.set_tunable = m88e1540_set_tunable,
4020 		.cable_test_start = marvell_vct7_cable_test_start,
4021 		.cable_test_tdr_start = marvell_vct5_cable_test_tdr_start,
4022 		.cable_test_get_status = marvell_vct7_cable_test_get_status,
4023 		.led_brightness_set = m88e1318_led_brightness_set,
4024 		.led_blink_set = m88e1318_led_blink_set,
4025 		.led_hw_is_supported = m88e1318_led_hw_is_supported,
4026 		.led_hw_control_set = m88e1318_led_hw_control_set,
4027 		.led_hw_control_get = m88e1318_led_hw_control_get,
4028 	},
4029 	{
4030 		.phy_id = MARVELL_PHY_ID_88E3016,
4031 		.phy_id_mask = MARVELL_PHY_ID_MASK,
4032 		.name = "Marvell 88E3016",
4033 		/* PHY_BASIC_FEATURES */
4034 		.probe = marvell_probe,
4035 		.config_init = m88e3016_config_init,
4036 		.aneg_done = marvell_aneg_done,
4037 		.read_status = marvell_read_status,
4038 		.config_intr = marvell_config_intr,
4039 		.handle_interrupt = marvell_handle_interrupt,
4040 		.resume = genphy_resume,
4041 		.suspend = genphy_suspend,
4042 		.read_page = marvell_read_page,
4043 		.write_page = marvell_write_page,
4044 		.get_sset_count = marvell_get_sset_count,
4045 		.get_strings = marvell_get_strings,
4046 		.get_stats = marvell_get_stats,
4047 	},
4048 	{
4049 		.phy_id = MARVELL_PHY_ID_88E6250_FAMILY,
4050 		.phy_id_mask = MARVELL_PHY_ID_MASK,
4051 		.name = "Marvell 88E6250 Family",
4052 		/* PHY_BASIC_FEATURES */
4053 		.probe = marvell_probe,
4054 		.aneg_done = marvell_aneg_done,
4055 		.config_intr = marvell_config_intr,
4056 		.handle_interrupt = marvell_handle_interrupt,
4057 		.resume = genphy_resume,
4058 		.suspend = genphy_suspend,
4059 		.get_sset_count = marvell_get_sset_count_simple,
4060 		.get_strings = marvell_get_strings_simple,
4061 		.get_stats = marvell_get_stats_simple,
4062 	},
4063 	{
4064 		.phy_id = MARVELL_PHY_ID_88E6341_FAMILY,
4065 		.phy_id_mask = MARVELL_PHY_ID_MASK,
4066 		.name = "Marvell 88E6341 Family",
4067 		.driver_data = DEF_MARVELL_HWMON_OPS(m88e1510_hwmon_ops),
4068 		/* PHY_GBIT_FEATURES */
4069 		.flags = PHY_POLL_CABLE_TEST,
4070 		.probe = marvell_probe,
4071 		.config_init = marvell_1011gbe_config_init,
4072 		.config_aneg = m88e6390_config_aneg,
4073 		.read_status = marvell_read_status,
4074 		.config_intr = marvell_config_intr,
4075 		.handle_interrupt = marvell_handle_interrupt,
4076 		.resume = genphy_resume,
4077 		.suspend = genphy_suspend,
4078 		.read_page = marvell_read_page,
4079 		.write_page = marvell_write_page,
4080 		.get_sset_count = marvell_get_sset_count,
4081 		.get_strings = marvell_get_strings,
4082 		.get_stats = marvell_get_stats,
4083 		.get_tunable = m88e1540_get_tunable,
4084 		.set_tunable = m88e1540_set_tunable,
4085 		.cable_test_start = marvell_vct7_cable_test_start,
4086 		.cable_test_tdr_start = marvell_vct5_cable_test_tdr_start,
4087 		.cable_test_get_status = marvell_vct7_cable_test_get_status,
4088 	},
4089 	{
4090 		.phy_id = MARVELL_PHY_ID_88E6390_FAMILY,
4091 		.phy_id_mask = MARVELL_PHY_ID_MASK,
4092 		.name = "Marvell 88E6390 Family",
4093 		.driver_data = DEF_MARVELL_HWMON_OPS(m88e6390_hwmon_ops),
4094 		/* PHY_GBIT_FEATURES */
4095 		.flags = PHY_POLL_CABLE_TEST,
4096 		.probe = marvell_probe,
4097 		.config_init = marvell_1011gbe_config_init,
4098 		.config_aneg = m88e6390_config_aneg,
4099 		.read_status = marvell_read_status,
4100 		.config_intr = marvell_config_intr,
4101 		.handle_interrupt = marvell_handle_interrupt,
4102 		.resume = genphy_resume,
4103 		.suspend = genphy_suspend,
4104 		.read_page = marvell_read_page,
4105 		.write_page = marvell_write_page,
4106 		.get_sset_count = marvell_get_sset_count,
4107 		.get_strings = marvell_get_strings,
4108 		.get_stats = marvell_get_stats,
4109 		.get_tunable = m88e1540_get_tunable,
4110 		.set_tunable = m88e1540_set_tunable,
4111 		.cable_test_start = marvell_vct7_cable_test_start,
4112 		.cable_test_tdr_start = marvell_vct5_cable_test_tdr_start,
4113 		.cable_test_get_status = marvell_vct7_cable_test_get_status,
4114 	},
4115 	{
4116 		.phy_id = MARVELL_PHY_ID_88E6393_FAMILY,
4117 		.phy_id_mask = MARVELL_PHY_ID_MASK,
4118 		.name = "Marvell 88E6393 Family",
4119 		.driver_data = DEF_MARVELL_HWMON_OPS(m88e6393_hwmon_ops),
4120 		/* PHY_GBIT_FEATURES */
4121 		.flags = PHY_POLL_CABLE_TEST,
4122 		.probe = marvell_probe,
4123 		.config_init = marvell_1011gbe_config_init,
4124 		.config_aneg = m88e1510_config_aneg,
4125 		.read_status = marvell_read_status,
4126 		.config_intr = marvell_config_intr,
4127 		.handle_interrupt = marvell_handle_interrupt,
4128 		.resume = genphy_resume,
4129 		.suspend = genphy_suspend,
4130 		.read_page = marvell_read_page,
4131 		.write_page = marvell_write_page,
4132 		.get_sset_count = marvell_get_sset_count,
4133 		.get_strings = marvell_get_strings,
4134 		.get_stats = marvell_get_stats,
4135 		.get_tunable = m88e1540_get_tunable,
4136 		.set_tunable = m88e1540_set_tunable,
4137 		.cable_test_start = marvell_vct7_cable_test_start,
4138 		.cable_test_tdr_start = marvell_vct5_cable_test_tdr_start,
4139 		.cable_test_get_status = marvell_vct7_cable_test_get_status,
4140 	},
4141 	{
4142 		.phy_id = MARVELL_PHY_ID_88E1340S,
4143 		.phy_id_mask = MARVELL_PHY_ID_MASK,
4144 		.name = "Marvell 88E1340S",
4145 		.driver_data = DEF_MARVELL_HWMON_OPS(m88e1510_hwmon_ops),
4146 		.probe = marvell_probe,
4147 		/* PHY_GBIT_FEATURES */
4148 		.config_init = marvell_1011gbe_config_init,
4149 		.config_aneg = m88e1510_config_aneg,
4150 		.read_status = marvell_read_status,
4151 		.config_intr = marvell_config_intr,
4152 		.handle_interrupt = marvell_handle_interrupt,
4153 		.resume = genphy_resume,
4154 		.suspend = genphy_suspend,
4155 		.read_page = marvell_read_page,
4156 		.write_page = marvell_write_page,
4157 		.get_sset_count = marvell_get_sset_count,
4158 		.get_strings = marvell_get_strings,
4159 		.get_stats = marvell_get_stats,
4160 		.get_tunable = m88e1540_get_tunable,
4161 		.set_tunable = m88e1540_set_tunable,
4162 	},
4163 	{
4164 		.phy_id = MARVELL_PHY_ID_88E1548P,
4165 		.phy_id_mask = MARVELL_PHY_ID_MASK,
4166 		.name = "Marvell 88E1548P",
4167 		.driver_data = DEF_MARVELL_HWMON_OPS(m88e1510_hwmon_ops),
4168 		.probe = marvell_probe,
4169 		.features = PHY_GBIT_FIBRE_FEATURES,
4170 		.config_init = marvell_1011gbe_config_init,
4171 		.config_aneg = m88e1510_config_aneg,
4172 		.read_status = marvell_read_status,
4173 		.config_intr = marvell_config_intr,
4174 		.handle_interrupt = marvell_handle_interrupt,
4175 		.resume = genphy_resume,
4176 		.suspend = genphy_suspend,
4177 		.read_page = marvell_read_page,
4178 		.write_page = marvell_write_page,
4179 		.get_sset_count = marvell_get_sset_count,
4180 		.get_strings = marvell_get_strings,
4181 		.get_stats = marvell_get_stats,
4182 		.get_tunable = m88e1540_get_tunable,
4183 		.set_tunable = m88e1540_set_tunable,
4184 		.led_brightness_set = m88e1318_led_brightness_set,
4185 		.led_blink_set = m88e1318_led_blink_set,
4186 		.led_hw_is_supported = m88e1318_led_hw_is_supported,
4187 		.led_hw_control_set = m88e1318_led_hw_control_set,
4188 		.led_hw_control_get = m88e1318_led_hw_control_get,
4189 	},
4190 };
4191 
4192 module_phy_driver(marvell_drivers);
4193 
4194 static struct mdio_device_id __maybe_unused marvell_tbl[] = {
4195 	{ MARVELL_PHY_ID_88E1101, MARVELL_PHY_ID_MASK },
4196 	{ MARVELL_PHY_ID_88E3082, MARVELL_PHY_ID_MASK },
4197 	{ MARVELL_PHY_ID_88E1112, MARVELL_PHY_ID_MASK },
4198 	{ MARVELL_PHY_ID_88E1111, MARVELL_PHY_ID_MASK },
4199 	{ MARVELL_PHY_ID_88E1111_FINISAR, MARVELL_PHY_ID_MASK },
4200 	{ MARVELL_PHY_ID_88E1118, MARVELL_PHY_ID_MASK },
4201 	{ MARVELL_PHY_ID_88E1121R, MARVELL_PHY_ID_MASK },
4202 	{ MARVELL_PHY_ID_88E1145, MARVELL_PHY_ID_MASK },
4203 	{ MARVELL_PHY_ID_88E1149R, MARVELL_PHY_ID_MASK },
4204 	{ MARVELL_PHY_ID_88E1240, MARVELL_PHY_ID_MASK },
4205 	{ MARVELL_PHY_ID_88E1318S, MARVELL_PHY_ID_MASK },
4206 	{ MARVELL_PHY_ID_88E1116R, MARVELL_PHY_ID_MASK },
4207 	{ MARVELL_PHY_ID_88E1510, MARVELL_PHY_ID_MASK },
4208 	{ MARVELL_PHY_ID_88E1540, MARVELL_PHY_ID_MASK },
4209 	{ MARVELL_PHY_ID_88E1545, MARVELL_PHY_ID_MASK },
4210 	{ MARVELL_PHY_ID_88E3016, MARVELL_PHY_ID_MASK },
4211 	{ MARVELL_PHY_ID_88E6250_FAMILY, MARVELL_PHY_ID_MASK },
4212 	{ MARVELL_PHY_ID_88E6341_FAMILY, MARVELL_PHY_ID_MASK },
4213 	{ MARVELL_PHY_ID_88E6390_FAMILY, MARVELL_PHY_ID_MASK },
4214 	{ MARVELL_PHY_ID_88E6393_FAMILY, MARVELL_PHY_ID_MASK },
4215 	{ MARVELL_PHY_ID_88E1340S, MARVELL_PHY_ID_MASK },
4216 	{ MARVELL_PHY_ID_88E1548P, MARVELL_PHY_ID_MASK },
4217 	{ }
4218 };
4219 
4220 MODULE_DEVICE_TABLE(mdio, marvell_tbl);
4221