xref: /linux/drivers/net/phy/icplus.c (revision f3449bf31d352f70c80a7993c272a7854ae98086)
1 /*
2  * Driver for ICPlus PHYs
3  *
4  * Copyright (c) 2007 Freescale Semiconductor, Inc.
5  *
6  * This program is free software; you can redistribute  it and/or modify it
7  * under  the terms of  the GNU General  Public License as published by the
8  * Free Software Foundation;  either version 2 of the  License, or (at your
9  * option) any later version.
10  *
11  */
12 #include <linux/kernel.h>
13 #include <linux/string.h>
14 #include <linux/errno.h>
15 #include <linux/unistd.h>
16 #include <linux/interrupt.h>
17 #include <linux/init.h>
18 #include <linux/delay.h>
19 #include <linux/netdevice.h>
20 #include <linux/etherdevice.h>
21 #include <linux/skbuff.h>
22 #include <linux/spinlock.h>
23 #include <linux/mm.h>
24 #include <linux/module.h>
25 #include <linux/mii.h>
26 #include <linux/ethtool.h>
27 #include <linux/phy.h>
28 
29 #include <asm/io.h>
30 #include <asm/irq.h>
31 #include <asm/uaccess.h>
32 
33 MODULE_DESCRIPTION("ICPlus IP175C/IC1001 PHY drivers");
34 MODULE_AUTHOR("Michael Barkowski");
35 MODULE_LICENSE("GPL");
36 
37 static int ip175c_config_init(struct phy_device *phydev)
38 {
39 	int err, i;
40 	static int full_reset_performed = 0;
41 
42 	if (full_reset_performed == 0) {
43 
44 		/* master reset */
45 		err = phydev->bus->write(phydev->bus, 30, 0, 0x175c);
46 		if (err < 0)
47 			return err;
48 
49 		/* ensure no bus delays overlap reset period */
50 		err = phydev->bus->read(phydev->bus, 30, 0);
51 
52 		/* data sheet specifies reset period is 2 msec */
53 		mdelay(2);
54 
55 		/* enable IP175C mode */
56 		err = phydev->bus->write(phydev->bus, 29, 31, 0x175c);
57 		if (err < 0)
58 			return err;
59 
60 		/* Set MII0 speed and duplex (in PHY mode) */
61 		err = phydev->bus->write(phydev->bus, 29, 22, 0x420);
62 		if (err < 0)
63 			return err;
64 
65 		/* reset switch ports */
66 		for (i = 0; i < 5; i++) {
67 			err = phydev->bus->write(phydev->bus, i,
68 						 MII_BMCR, BMCR_RESET);
69 			if (err < 0)
70 				return err;
71 		}
72 
73 		for (i = 0; i < 5; i++)
74 			err = phydev->bus->read(phydev->bus, i, MII_BMCR);
75 
76 		mdelay(2);
77 
78 		full_reset_performed = 1;
79 	}
80 
81 	if (phydev->addr != 4) {
82 		phydev->state = PHY_RUNNING;
83 		phydev->speed = SPEED_100;
84 		phydev->duplex = DUPLEX_FULL;
85 		phydev->link = 1;
86 		netif_carrier_on(phydev->attached_dev);
87 	}
88 
89 	return 0;
90 }
91 
92 static int ip1001_config_init(struct phy_device *phydev)
93 {
94 	int err, value;
95 
96 	/* Software Reset PHY */
97 	value = phy_read(phydev, MII_BMCR);
98 	value |= BMCR_RESET;
99 	err = phy_write(phydev, MII_BMCR, value);
100 	if (err < 0)
101 		return err;
102 
103 	do {
104 		value = phy_read(phydev, MII_BMCR);
105 	} while (value & BMCR_RESET);
106 
107 	/* Additional delay (2ns) used to adjust RX clock phase
108 	 * at GMII/ RGMII interface */
109 	value = phy_read(phydev, 16);
110 	value |= 0x3;
111 
112 	err = phy_write(phydev, 16, value);
113 	if (err < 0)
114 		return err;
115 
116 	return err;
117 }
118 
119 static int ip175c_read_status(struct phy_device *phydev)
120 {
121 	if (phydev->addr == 4) /* WAN port */
122 		genphy_read_status(phydev);
123 	else
124 		/* Don't need to read status for switch ports */
125 		phydev->irq = PHY_IGNORE_INTERRUPT;
126 
127 	return 0;
128 }
129 
130 static int ip175c_config_aneg(struct phy_device *phydev)
131 {
132 	if (phydev->addr == 4) /* WAN port */
133 		genphy_config_aneg(phydev);
134 
135 	return 0;
136 }
137 
138 static struct phy_driver ip175c_driver = {
139 	.phy_id		= 0x02430d80,
140 	.name		= "ICPlus IP175C",
141 	.phy_id_mask	= 0x0ffffff0,
142 	.features	= PHY_BASIC_FEATURES,
143 	.config_init	= &ip175c_config_init,
144 	.config_aneg	= &ip175c_config_aneg,
145 	.read_status	= &ip175c_read_status,
146 	.suspend	= genphy_suspend,
147 	.resume		= genphy_resume,
148 	.driver		= { .owner = THIS_MODULE,},
149 };
150 
151 static struct phy_driver ip1001_driver = {
152 	.phy_id		= 0x02430d90,
153 	.name		= "ICPlus IP1001",
154 	.phy_id_mask	= 0x0ffffff0,
155 	.features	= PHY_GBIT_FEATURES | SUPPORTED_Pause |
156 			  SUPPORTED_Asym_Pause,
157 	.config_init	= &ip1001_config_init,
158 	.config_aneg	= &genphy_config_aneg,
159 	.read_status	= &genphy_read_status,
160 	.suspend	= genphy_suspend,
161 	.resume		= genphy_resume,
162 	.driver		= { .owner = THIS_MODULE,},
163 };
164 
165 static int __init icplus_init(void)
166 {
167 	int ret = 0;
168 
169 	ret = phy_driver_register(&ip1001_driver);
170 	if (ret < 0)
171 		return -ENODEV;
172 
173 	return phy_driver_register(&ip175c_driver);
174 }
175 
176 static void __exit icplus_exit(void)
177 {
178 	phy_driver_unregister(&ip1001_driver);
179 	phy_driver_unregister(&ip175c_driver);
180 }
181 
182 module_init(icplus_init);
183 module_exit(icplus_exit);
184 
185 static struct mdio_device_id __maybe_unused icplus_tbl[] = {
186 	{ 0x02430d80, 0x0ffffff0 },
187 	{ 0x02430d90, 0x0ffffff0 },
188 	{ }
189 };
190 
191 MODULE_DEVICE_TABLE(mdio, icplus_tbl);
192