19aab906aSNishad Kamdar /* SPDX-License-Identifier: GPL-2.0 */ 2a1cba561SArun Parameswaran /* 3a1cba561SArun Parameswaran * Copyright (C) 2015 Broadcom Corporation 4a1cba561SArun Parameswaran */ 5a1cba561SArun Parameswaran 6a1cba561SArun Parameswaran #ifndef _LINUX_BCM_PHY_LIB_H 7a1cba561SArun Parameswaran #define _LINUX_BCM_PHY_LIB_H 8a1cba561SArun Parameswaran 979fb218dSFlorian Fainelli #include <linux/brcmphy.h> 10a1cba561SArun Parameswaran #include <linux/phy.h> 11a1cba561SArun Parameswaran 12f878fe56SFlorian Fainelli /* 28nm only register definitions */ 13f878fe56SFlorian Fainelli #define MISC_ADDR(base, channel) base, channel 14f878fe56SFlorian Fainelli 15f878fe56SFlorian Fainelli #define DSP_TAP10 MISC_ADDR(0x0a, 0) 16f878fe56SFlorian Fainelli #define PLL_PLLCTRL_1 MISC_ADDR(0x32, 1) 17f878fe56SFlorian Fainelli #define PLL_PLLCTRL_2 MISC_ADDR(0x32, 2) 18f878fe56SFlorian Fainelli #define PLL_PLLCTRL_4 MISC_ADDR(0x33, 0) 19f878fe56SFlorian Fainelli 20f878fe56SFlorian Fainelli #define AFE_RXCONFIG_0 MISC_ADDR(0x38, 0) 21f878fe56SFlorian Fainelli #define AFE_RXCONFIG_1 MISC_ADDR(0x38, 1) 22f878fe56SFlorian Fainelli #define AFE_RXCONFIG_2 MISC_ADDR(0x38, 2) 23f878fe56SFlorian Fainelli #define AFE_RX_LP_COUNTER MISC_ADDR(0x38, 3) 24f878fe56SFlorian Fainelli #define AFE_TX_CONFIG MISC_ADDR(0x39, 0) 25f878fe56SFlorian Fainelli #define AFE_VDCA_ICTRL_0 MISC_ADDR(0x39, 1) 26f878fe56SFlorian Fainelli #define AFE_VDAC_OTHERS_0 MISC_ADDR(0x39, 3) 27f878fe56SFlorian Fainelli #define AFE_HPF_TRIM_OTHERS MISC_ADDR(0x3a, 0) 28f878fe56SFlorian Fainelli 29f878fe56SFlorian Fainelli 30a1cba561SArun Parameswaran int bcm_phy_write_exp(struct phy_device *phydev, u16 reg, u16 val); 31a1cba561SArun Parameswaran int bcm_phy_read_exp(struct phy_device *phydev, u16 reg); 32a1cba561SArun Parameswaran 3379fb218dSFlorian Fainelli static inline int bcm_phy_write_exp_sel(struct phy_device *phydev, 3479fb218dSFlorian Fainelli u16 reg, u16 val) 3579fb218dSFlorian Fainelli { 3679fb218dSFlorian Fainelli return bcm_phy_write_exp(phydev, reg | MII_BCM54XX_EXP_SEL_ER, val); 3779fb218dSFlorian Fainelli } 3879fb218dSFlorian Fainelli 395519da87SFlorian Fainelli int bcm54xx_auxctl_write(struct phy_device *phydev, u16 regnum, u16 val); 405519da87SFlorian Fainelli int bcm54xx_auxctl_read(struct phy_device *phydev, u16 regnum); 415519da87SFlorian Fainelli 42a1cba561SArun Parameswaran int bcm_phy_write_misc(struct phy_device *phydev, 43a1cba561SArun Parameswaran u16 reg, u16 chl, u16 value); 44a1cba561SArun Parameswaran int bcm_phy_read_misc(struct phy_device *phydev, 45a1cba561SArun Parameswaran u16 reg, u16 chl); 46a1cba561SArun Parameswaran 47a1cba561SArun Parameswaran int bcm_phy_write_shadow(struct phy_device *phydev, u16 shadow, 48a1cba561SArun Parameswaran u16 val); 49a1cba561SArun Parameswaran int bcm_phy_read_shadow(struct phy_device *phydev, u16 shadow); 50a1cba561SArun Parameswaran 51*0a32f1ffSMichael Walle int __bcm_phy_write_rdb(struct phy_device *phydev, u16 rdb, u16 val); 52*0a32f1ffSMichael Walle int bcm_phy_write_rdb(struct phy_device *phydev, u16 rdb, u16 val); 53*0a32f1ffSMichael Walle int __bcm_phy_read_rdb(struct phy_device *phydev, u16 rdb); 54*0a32f1ffSMichael Walle int bcm_phy_read_rdb(struct phy_device *phydev, u16 rdb); 55*0a32f1ffSMichael Walle int __bcm_phy_modify_rdb(struct phy_device *phydev, u16 rdb, u16 mask, 56*0a32f1ffSMichael Walle u16 set); 57*0a32f1ffSMichael Walle int bcm_phy_modify_rdb(struct phy_device *phydev, u16 rdb, u16 mask, 58*0a32f1ffSMichael Walle u16 set); 59*0a32f1ffSMichael Walle 60a1cba561SArun Parameswaran int bcm_phy_ack_intr(struct phy_device *phydev); 61a1cba561SArun Parameswaran int bcm_phy_config_intr(struct phy_device *phydev); 62a1cba561SArun Parameswaran 63a1cba561SArun Parameswaran int bcm_phy_enable_apd(struct phy_device *phydev, bool dll_pwr_down); 64a1cba561SArun Parameswaran 6599cec8a4SFlorian Fainelli int bcm_phy_set_eee(struct phy_device *phydev, bool enable); 66d06f78c4SFlorian Fainelli 67d06f78c4SFlorian Fainelli int bcm_phy_downshift_get(struct phy_device *phydev, u8 *count); 68d06f78c4SFlorian Fainelli 69d06f78c4SFlorian Fainelli int bcm_phy_downshift_set(struct phy_device *phydev, u8 count); 70d06f78c4SFlorian Fainelli 71820ee17bSFlorian Fainelli int bcm_phy_get_sset_count(struct phy_device *phydev); 72820ee17bSFlorian Fainelli void bcm_phy_get_strings(struct phy_device *phydev, u8 *data); 73820ee17bSFlorian Fainelli void bcm_phy_get_stats(struct phy_device *phydev, u64 *shadow, 74820ee17bSFlorian Fainelli struct ethtool_stats *stats, u64 *data); 75f878fe56SFlorian Fainelli void bcm_phy_r_rc_cal_reset(struct phy_device *phydev); 76f878fe56SFlorian Fainelli int bcm_phy_28nm_a0b0_afe_config_init(struct phy_device *phydev); 77ab41ca34SMurali Krishna Policharla int bcm_phy_enable_jumbo(struct phy_device *phydev); 78820ee17bSFlorian Fainelli 79a1cba561SArun Parameswaran #endif /* _LINUX_BCM_PHY_LIB_H */ 80