1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) 2 /* Copyright 2020 NXP 3 * Lynx PCS MDIO helpers 4 */ 5 6 #include <linux/mdio.h> 7 #include <linux/phylink.h> 8 #include <linux/pcs-lynx.h> 9 #include <linux/property.h> 10 11 #define SGMII_CLOCK_PERIOD_NS 8 /* PCS is clocked at 125 MHz */ 12 #define LINK_TIMER_VAL(ns) ((u32)((ns) / SGMII_CLOCK_PERIOD_NS)) 13 14 #define LINK_TIMER_LO 0x12 15 #define LINK_TIMER_HI 0x13 16 #define IF_MODE 0x14 17 #define IF_MODE_SGMII_EN BIT(0) 18 #define IF_MODE_USE_SGMII_AN BIT(1) 19 #define IF_MODE_SPEED(x) (((x) << 2) & GENMASK(3, 2)) 20 #define IF_MODE_SPEED_MSK GENMASK(3, 2) 21 #define IF_MODE_HALF_DUPLEX BIT(4) 22 23 struct lynx_pcs { 24 struct phylink_pcs pcs; 25 struct mdio_device *mdio; 26 }; 27 28 enum sgmii_speed { 29 SGMII_SPEED_10 = 0, 30 SGMII_SPEED_100 = 1, 31 SGMII_SPEED_1000 = 2, 32 SGMII_SPEED_2500 = 2, 33 }; 34 35 #define phylink_pcs_to_lynx(pl_pcs) container_of((pl_pcs), struct lynx_pcs, pcs) 36 #define lynx_to_phylink_pcs(lynx) (&(lynx)->pcs) 37 38 static unsigned int lynx_pcs_inband_caps(struct phylink_pcs *pcs, 39 phy_interface_t interface) 40 { 41 switch (interface) { 42 case PHY_INTERFACE_MODE_1000BASEX: 43 case PHY_INTERFACE_MODE_SGMII: 44 case PHY_INTERFACE_MODE_QSGMII: 45 return LINK_INBAND_DISABLE | LINK_INBAND_ENABLE; 46 47 case PHY_INTERFACE_MODE_10GBASER: 48 case PHY_INTERFACE_MODE_2500BASEX: 49 return LINK_INBAND_DISABLE; 50 51 case PHY_INTERFACE_MODE_USXGMII: 52 case PHY_INTERFACE_MODE_10G_QXGMII: 53 return LINK_INBAND_ENABLE; 54 55 default: 56 return 0; 57 } 58 } 59 60 static void lynx_pcs_get_state_usxgmii(struct mdio_device *pcs, 61 struct phylink_link_state *state) 62 { 63 struct mii_bus *bus = pcs->bus; 64 int addr = pcs->addr; 65 int status, lpa; 66 67 status = mdiobus_c45_read(bus, addr, MDIO_MMD_VEND2, MII_BMSR); 68 if (status < 0) 69 return; 70 71 state->link = !!(status & MDIO_STAT1_LSTATUS); 72 state->an_complete = !!(status & MDIO_AN_STAT1_COMPLETE); 73 if (!state->link || !state->an_complete) 74 return; 75 76 lpa = mdiobus_c45_read(bus, addr, MDIO_MMD_VEND2, MII_LPA); 77 if (lpa < 0) 78 return; 79 80 phylink_decode_usxgmii_word(state, lpa); 81 } 82 83 static void lynx_pcs_get_state_2500basex(struct mdio_device *pcs, 84 struct phylink_link_state *state) 85 { 86 int bmsr; 87 88 bmsr = mdiodev_read(pcs, MII_BMSR); 89 if (bmsr < 0) { 90 state->link = false; 91 return; 92 } 93 94 state->link = !!(bmsr & BMSR_LSTATUS); 95 state->an_complete = !!(bmsr & BMSR_ANEGCOMPLETE); 96 if (!state->link) 97 return; 98 99 state->speed = SPEED_2500; 100 state->pause |= MLO_PAUSE_TX | MLO_PAUSE_RX; 101 state->duplex = DUPLEX_FULL; 102 } 103 104 static void lynx_pcs_get_state(struct phylink_pcs *pcs, unsigned int neg_mode, 105 struct phylink_link_state *state) 106 { 107 struct lynx_pcs *lynx = phylink_pcs_to_lynx(pcs); 108 109 switch (state->interface) { 110 case PHY_INTERFACE_MODE_1000BASEX: 111 case PHY_INTERFACE_MODE_SGMII: 112 case PHY_INTERFACE_MODE_QSGMII: 113 phylink_mii_c22_pcs_get_state(lynx->mdio, neg_mode, state); 114 break; 115 case PHY_INTERFACE_MODE_2500BASEX: 116 lynx_pcs_get_state_2500basex(lynx->mdio, state); 117 break; 118 case PHY_INTERFACE_MODE_USXGMII: 119 case PHY_INTERFACE_MODE_10G_QXGMII: 120 lynx_pcs_get_state_usxgmii(lynx->mdio, state); 121 break; 122 case PHY_INTERFACE_MODE_10GBASER: 123 phylink_mii_c45_pcs_get_state(lynx->mdio, state); 124 break; 125 default: 126 break; 127 } 128 129 dev_dbg(&lynx->mdio->dev, 130 "mode=%s/%s/%s link=%u an_complete=%u\n", 131 phy_modes(state->interface), 132 phy_speed_to_str(state->speed), 133 phy_duplex_to_str(state->duplex), 134 state->link, state->an_complete); 135 } 136 137 static int lynx_pcs_config_giga(struct mdio_device *pcs, 138 phy_interface_t interface, 139 const unsigned long *advertising, 140 unsigned int neg_mode) 141 { 142 int link_timer_ns; 143 u32 link_timer; 144 u16 if_mode; 145 int err; 146 147 link_timer_ns = phylink_get_link_timer_ns(interface); 148 if (link_timer_ns > 0) { 149 link_timer = LINK_TIMER_VAL(link_timer_ns); 150 151 mdiodev_write(pcs, LINK_TIMER_LO, link_timer & 0xffff); 152 mdiodev_write(pcs, LINK_TIMER_HI, link_timer >> 16); 153 } 154 155 if (interface == PHY_INTERFACE_MODE_1000BASEX) { 156 if_mode = 0; 157 } else { 158 /* SGMII and QSGMII */ 159 if_mode = IF_MODE_SGMII_EN; 160 if (neg_mode == PHYLINK_PCS_NEG_INBAND_ENABLED) 161 if_mode |= IF_MODE_USE_SGMII_AN; 162 } 163 164 err = mdiodev_modify(pcs, IF_MODE, 165 IF_MODE_SGMII_EN | IF_MODE_USE_SGMII_AN, 166 if_mode); 167 if (err) 168 return err; 169 170 return phylink_mii_c22_pcs_config(pcs, interface, advertising, 171 neg_mode); 172 } 173 174 static int lynx_pcs_config_usxgmii(struct mdio_device *pcs, 175 phy_interface_t interface, 176 const unsigned long *advertising, 177 unsigned int neg_mode) 178 { 179 struct mii_bus *bus = pcs->bus; 180 int addr = pcs->addr; 181 182 if (neg_mode != PHYLINK_PCS_NEG_INBAND_ENABLED) { 183 dev_err(&pcs->dev, "%s only supports in-band AN for now\n", 184 phy_modes(interface)); 185 return -EOPNOTSUPP; 186 } 187 188 /* Configure device ability for the USXGMII Replicator */ 189 return mdiobus_c45_write(bus, addr, MDIO_MMD_VEND2, MII_ADVERTISE, 190 MDIO_USXGMII_10G | MDIO_USXGMII_LINK | 191 MDIO_USXGMII_FULL_DUPLEX | 192 ADVERTISE_SGMII | ADVERTISE_LPACK); 193 } 194 195 static int lynx_pcs_config(struct phylink_pcs *pcs, unsigned int neg_mode, 196 phy_interface_t ifmode, 197 const unsigned long *advertising, bool permit) 198 { 199 struct lynx_pcs *lynx = phylink_pcs_to_lynx(pcs); 200 201 switch (ifmode) { 202 case PHY_INTERFACE_MODE_1000BASEX: 203 case PHY_INTERFACE_MODE_SGMII: 204 case PHY_INTERFACE_MODE_QSGMII: 205 return lynx_pcs_config_giga(lynx->mdio, ifmode, advertising, 206 neg_mode); 207 case PHY_INTERFACE_MODE_2500BASEX: 208 if (neg_mode == PHYLINK_PCS_NEG_INBAND_ENABLED) { 209 dev_err(&lynx->mdio->dev, 210 "AN not supported on 3.125GHz SerDes lane\n"); 211 return -EOPNOTSUPP; 212 } 213 break; 214 case PHY_INTERFACE_MODE_USXGMII: 215 case PHY_INTERFACE_MODE_10G_QXGMII: 216 return lynx_pcs_config_usxgmii(lynx->mdio, ifmode, advertising, 217 neg_mode); 218 case PHY_INTERFACE_MODE_10GBASER: 219 /* Nothing to do here for 10GBASER */ 220 break; 221 default: 222 return -EOPNOTSUPP; 223 } 224 225 return 0; 226 } 227 228 static void lynx_pcs_an_restart(struct phylink_pcs *pcs) 229 { 230 struct lynx_pcs *lynx = phylink_pcs_to_lynx(pcs); 231 232 phylink_mii_c22_pcs_an_restart(lynx->mdio); 233 } 234 235 static void lynx_pcs_link_up_sgmii(struct mdio_device *pcs, 236 unsigned int neg_mode, 237 int speed, int duplex) 238 { 239 u16 if_mode = 0, sgmii_speed; 240 241 /* The PCS needs to be configured manually only 242 * when not operating on in-band mode 243 */ 244 if (neg_mode == PHYLINK_PCS_NEG_INBAND_ENABLED) 245 return; 246 247 if (duplex == DUPLEX_HALF) 248 if_mode |= IF_MODE_HALF_DUPLEX; 249 250 switch (speed) { 251 case SPEED_1000: 252 sgmii_speed = SGMII_SPEED_1000; 253 break; 254 case SPEED_100: 255 sgmii_speed = SGMII_SPEED_100; 256 break; 257 case SPEED_10: 258 sgmii_speed = SGMII_SPEED_10; 259 break; 260 case SPEED_UNKNOWN: 261 /* Silently don't do anything */ 262 return; 263 default: 264 dev_err(&pcs->dev, "Invalid PCS speed %d\n", speed); 265 return; 266 } 267 if_mode |= IF_MODE_SPEED(sgmii_speed); 268 269 mdiodev_modify(pcs, IF_MODE, 270 IF_MODE_HALF_DUPLEX | IF_MODE_SPEED_MSK, 271 if_mode); 272 } 273 274 /* 2500Base-X is SerDes protocol 7 on Felix and 6 on ENETC. It is a SerDes lane 275 * clocked at 3.125 GHz which encodes symbols with 8b/10b and does not have 276 * auto-negotiation of any link parameters. Electrically it is compatible with 277 * a single lane of XAUI. 278 * The hardware reference manual wants to call this mode SGMII, but it isn't 279 * really, since the fundamental features of SGMII: 280 * - Downgrading the link speed by duplicating symbols 281 * - Auto-negotiation 282 * are not there. 283 * The speed is configured at 1000 in the IF_MODE because the clock frequency 284 * is actually given by a PLL configured in the Reset Configuration Word (RCW). 285 * Since there is no difference between fixed speed SGMII w/o AN and 802.3z w/o 286 * AN, we call this PHY interface type 2500Base-X. In case a PHY negotiates a 287 * lower link speed on line side, the system-side interface remains fixed at 288 * 2500 Mbps and we do rate adaptation through pause frames. 289 */ 290 static void lynx_pcs_link_up_2500basex(struct mdio_device *pcs, 291 unsigned int neg_mode, 292 int speed, int duplex) 293 { 294 u16 if_mode = 0; 295 296 if (neg_mode == PHYLINK_PCS_NEG_INBAND_ENABLED) { 297 dev_err(&pcs->dev, "AN not supported for 2500BaseX\n"); 298 return; 299 } 300 301 if (duplex == DUPLEX_HALF) 302 if_mode |= IF_MODE_HALF_DUPLEX; 303 if_mode |= IF_MODE_SPEED(SGMII_SPEED_2500); 304 305 mdiodev_modify(pcs, IF_MODE, 306 IF_MODE_HALF_DUPLEX | IF_MODE_SPEED_MSK, 307 if_mode); 308 } 309 310 static void lynx_pcs_link_up(struct phylink_pcs *pcs, unsigned int neg_mode, 311 phy_interface_t interface, 312 int speed, int duplex) 313 { 314 struct lynx_pcs *lynx = phylink_pcs_to_lynx(pcs); 315 316 switch (interface) { 317 case PHY_INTERFACE_MODE_SGMII: 318 case PHY_INTERFACE_MODE_QSGMII: 319 lynx_pcs_link_up_sgmii(lynx->mdio, neg_mode, speed, duplex); 320 break; 321 case PHY_INTERFACE_MODE_2500BASEX: 322 lynx_pcs_link_up_2500basex(lynx->mdio, neg_mode, speed, duplex); 323 break; 324 case PHY_INTERFACE_MODE_USXGMII: 325 case PHY_INTERFACE_MODE_10G_QXGMII: 326 /* At the moment, only in-band AN is supported for USXGMII 327 * so nothing to do in link_up 328 */ 329 break; 330 default: 331 break; 332 } 333 } 334 335 static const struct phylink_pcs_ops lynx_pcs_phylink_ops = { 336 .pcs_inband_caps = lynx_pcs_inband_caps, 337 .pcs_get_state = lynx_pcs_get_state, 338 .pcs_config = lynx_pcs_config, 339 .pcs_an_restart = lynx_pcs_an_restart, 340 .pcs_link_up = lynx_pcs_link_up, 341 }; 342 343 static const phy_interface_t lynx_interfaces[] = { 344 PHY_INTERFACE_MODE_SGMII, 345 PHY_INTERFACE_MODE_QSGMII, 346 PHY_INTERFACE_MODE_1000BASEX, 347 PHY_INTERFACE_MODE_2500BASEX, 348 PHY_INTERFACE_MODE_10GBASER, 349 PHY_INTERFACE_MODE_USXGMII, 350 PHY_INTERFACE_MODE_10G_QXGMII, 351 }; 352 353 static struct phylink_pcs *lynx_pcs_create(struct mdio_device *mdio) 354 { 355 struct lynx_pcs *lynx; 356 int i; 357 358 lynx = kzalloc(sizeof(*lynx), GFP_KERNEL); 359 if (!lynx) 360 return ERR_PTR(-ENOMEM); 361 362 mdio_device_get(mdio); 363 lynx->mdio = mdio; 364 lynx->pcs.ops = &lynx_pcs_phylink_ops; 365 lynx->pcs.poll = true; 366 367 for (i = 0; i < ARRAY_SIZE(lynx_interfaces); i++) 368 __set_bit(lynx_interfaces[i], lynx->pcs.supported_interfaces); 369 370 return lynx_to_phylink_pcs(lynx); 371 } 372 373 struct phylink_pcs *lynx_pcs_create_mdiodev(struct mii_bus *bus, int addr) 374 { 375 struct mdio_device *mdio; 376 struct phylink_pcs *pcs; 377 378 mdio = mdio_device_create(bus, addr); 379 if (IS_ERR(mdio)) 380 return ERR_CAST(mdio); 381 382 pcs = lynx_pcs_create(mdio); 383 384 /* lynx_create() has taken a refcount on the mdiodev if it was 385 * successful. If lynx_create() fails, this will free the mdio 386 * device here. In any case, we don't need to hold our reference 387 * anymore, and putting it here will allow mdio_device_put() in 388 * lynx_destroy() to automatically free the mdio device. 389 */ 390 mdio_device_put(mdio); 391 392 return pcs; 393 } 394 EXPORT_SYMBOL(lynx_pcs_create_mdiodev); 395 396 /* 397 * lynx_pcs_create_fwnode() creates a lynx PCS instance from the fwnode 398 * device indicated by node. 399 * 400 * Returns: 401 * -ENODEV if the fwnode is marked unavailable 402 * -EPROBE_DEFER if we fail to find the device 403 * -ENOMEM if we fail to allocate memory 404 * pointer to a phylink_pcs on success 405 */ 406 struct phylink_pcs *lynx_pcs_create_fwnode(struct fwnode_handle *node) 407 { 408 struct mdio_device *mdio; 409 struct phylink_pcs *pcs; 410 411 if (!fwnode_device_is_available(node)) 412 return ERR_PTR(-ENODEV); 413 414 mdio = fwnode_mdio_find_device(node); 415 if (!mdio) 416 return ERR_PTR(-EPROBE_DEFER); 417 418 pcs = lynx_pcs_create(mdio); 419 420 /* lynx_create() has taken a refcount on the mdiodev if it was 421 * successful. If lynx_create() fails, this will free the mdio 422 * device here. In any case, we don't need to hold our reference 423 * anymore, and putting it here will allow mdio_device_put() in 424 * lynx_destroy() to automatically free the mdio device. 425 */ 426 mdio_device_put(mdio); 427 428 return pcs; 429 } 430 EXPORT_SYMBOL_GPL(lynx_pcs_create_fwnode); 431 432 void lynx_pcs_destroy(struct phylink_pcs *pcs) 433 { 434 struct lynx_pcs *lynx = phylink_pcs_to_lynx(pcs); 435 436 mdio_device_put(lynx->mdio); 437 kfree(lynx); 438 } 439 EXPORT_SYMBOL(lynx_pcs_destroy); 440 441 MODULE_DESCRIPTION("NXP Lynx PCS phylink library"); 442 MODULE_LICENSE("Dual BSD/GPL"); 443