1 // SPDX-License-Identifier: GPL-2.0 2 3 /* Copyright (c) 2012-2018, The Linux Foundation. All rights reserved. 4 * Copyright (C) 2018-2022 Linaro Ltd. 5 */ 6 7 #include <linux/clk.h> 8 #include <linux/device.h> 9 #include <linux/interconnect.h> 10 #include <linux/pm.h> 11 #include <linux/pm_runtime.h> 12 #include <linux/bitops.h> 13 14 #include "linux/soc/qcom/qcom_aoss.h" 15 16 #include "ipa.h" 17 #include "ipa_power.h" 18 #include "ipa_endpoint.h" 19 #include "ipa_modem.h" 20 #include "ipa_data.h" 21 22 /** 23 * DOC: IPA Power Management 24 * 25 * The IPA hardware is enabled when the IPA core clock and all the 26 * interconnects (buses) it depends on are enabled. Runtime power 27 * management is used to determine whether the core clock and 28 * interconnects are enabled, and if not in use to be suspended 29 * automatically. 30 * 31 * The core clock currently runs at a fixed clock rate when enabled, 32 * an all interconnects use a fixed average and peak bandwidth. 33 */ 34 35 #define IPA_AUTOSUSPEND_DELAY 500 /* milliseconds */ 36 37 /** 38 * struct ipa_power - IPA power management information 39 * @dev: IPA device pointer 40 * @core: IPA core clock 41 * @qmp: QMP handle for AOSS communication 42 * @interconnect_count: Number of elements in interconnect[] 43 * @interconnect: Interconnect array 44 */ 45 struct ipa_power { 46 struct device *dev; 47 struct clk *core; 48 struct qmp *qmp; 49 u32 interconnect_count; 50 struct icc_bulk_data interconnect[] __counted_by(interconnect_count); 51 }; 52 53 /* Initialize interconnects required for IPA operation */ 54 static int ipa_interconnect_init(struct ipa_power *power, 55 const struct ipa_interconnect_data *data) 56 { 57 struct icc_bulk_data *interconnect; 58 int ret; 59 u32 i; 60 61 /* Initialize our interconnect data array for bulk operations */ 62 interconnect = &power->interconnect[0]; 63 for (i = 0; i < power->interconnect_count; i++) { 64 /* interconnect->path is filled in by of_icc_bulk_get() */ 65 interconnect->name = data->name; 66 interconnect->avg_bw = data->average_bandwidth; 67 interconnect->peak_bw = data->peak_bandwidth; 68 data++; 69 interconnect++; 70 } 71 72 ret = of_icc_bulk_get(power->dev, power->interconnect_count, 73 power->interconnect); 74 if (ret) 75 return ret; 76 77 /* All interconnects are initially disabled */ 78 icc_bulk_disable(power->interconnect_count, power->interconnect); 79 80 /* Set the bandwidth values to be used when enabled */ 81 ret = icc_bulk_set_bw(power->interconnect_count, power->interconnect); 82 if (ret) 83 icc_bulk_put(power->interconnect_count, power->interconnect); 84 85 return ret; 86 } 87 88 /* Inverse of ipa_interconnect_init() */ 89 static void ipa_interconnect_exit(struct ipa_power *power) 90 { 91 icc_bulk_put(power->interconnect_count, power->interconnect); 92 } 93 94 /* Enable IPA power, enabling interconnects and the core clock */ 95 static int ipa_power_enable(struct ipa *ipa) 96 { 97 struct ipa_power *power = ipa->power; 98 int ret; 99 100 ret = icc_bulk_enable(power->interconnect_count, power->interconnect); 101 if (ret) 102 return ret; 103 104 ret = clk_prepare_enable(power->core); 105 if (ret) { 106 dev_err(power->dev, "error %d enabling core clock\n", ret); 107 icc_bulk_disable(power->interconnect_count, 108 power->interconnect); 109 } 110 111 return ret; 112 } 113 114 /* Inverse of ipa_power_enable() */ 115 static void ipa_power_disable(struct ipa *ipa) 116 { 117 struct ipa_power *power = ipa->power; 118 119 clk_disable_unprepare(power->core); 120 121 icc_bulk_disable(power->interconnect_count, power->interconnect); 122 } 123 124 static int ipa_runtime_suspend(struct device *dev) 125 { 126 struct ipa *ipa = dev_get_drvdata(dev); 127 128 /* Endpoints aren't usable until setup is complete */ 129 if (ipa->setup_complete) { 130 ipa_endpoint_suspend(ipa); 131 gsi_suspend(&ipa->gsi); 132 } 133 134 ipa_power_disable(ipa); 135 136 return 0; 137 } 138 139 static int ipa_runtime_resume(struct device *dev) 140 { 141 struct ipa *ipa = dev_get_drvdata(dev); 142 int ret; 143 144 ret = ipa_power_enable(ipa); 145 if (WARN_ON(ret < 0)) 146 return ret; 147 148 /* Endpoints aren't usable until setup is complete */ 149 if (ipa->setup_complete) { 150 gsi_resume(&ipa->gsi); 151 ipa_endpoint_resume(ipa); 152 } 153 154 return 0; 155 } 156 157 static int ipa_suspend(struct device *dev) 158 { 159 struct ipa *ipa = dev_get_drvdata(dev); 160 161 /* Increment the disable depth to ensure that the IRQ won't 162 * be re-enabled until the matching _enable call in 163 * ipa_resume(). We do this to ensure that the interrupt 164 * handler won't run whilst PM runtime is disabled. 165 * 166 * Note that disabling the IRQ is NOT the same as disabling 167 * irq wake. If wakeup is enabled for the IPA then the IRQ 168 * will still cause the system to wake up, see irq_set_irq_wake(). 169 */ 170 ipa_interrupt_irq_disable(ipa); 171 172 return pm_runtime_force_suspend(dev); 173 } 174 175 static int ipa_resume(struct device *dev) 176 { 177 struct ipa *ipa = dev_get_drvdata(dev); 178 int ret; 179 180 ret = pm_runtime_force_resume(dev); 181 182 /* Now that PM runtime is enabled again it's safe 183 * to turn the IRQ back on and process any data 184 * that was received during suspend. 185 */ 186 ipa_interrupt_irq_enable(ipa); 187 188 return ret; 189 } 190 191 /* Return the current IPA core clock rate */ 192 u32 ipa_core_clock_rate(struct ipa *ipa) 193 { 194 return ipa->power ? (u32)clk_get_rate(ipa->power->core) : 0; 195 } 196 197 static int ipa_power_retention_init(struct ipa_power *power) 198 { 199 struct qmp *qmp = qmp_get(power->dev); 200 201 if (IS_ERR(qmp)) { 202 if (PTR_ERR(qmp) == -EPROBE_DEFER) 203 return -EPROBE_DEFER; 204 205 /* We assume any other error means it's not defined/needed */ 206 qmp = NULL; 207 } 208 power->qmp = qmp; 209 210 return 0; 211 } 212 213 static void ipa_power_retention_exit(struct ipa_power *power) 214 { 215 qmp_put(power->qmp); 216 power->qmp = NULL; 217 } 218 219 /* Control register retention on power collapse */ 220 void ipa_power_retention(struct ipa *ipa, bool enable) 221 { 222 static const char fmt[] = "{ class: bcm, res: ipa_pc, val: %c }"; 223 struct ipa_power *power = ipa->power; 224 int ret; 225 226 if (!power->qmp) 227 return; /* Not needed on this platform */ 228 229 ret = qmp_send(power->qmp, fmt, enable ? '1' : '0'); 230 if (ret) 231 dev_err(power->dev, "error %d sending QMP %sable request\n", 232 ret, enable ? "en" : "dis"); 233 } 234 235 int ipa_power_setup(struct ipa *ipa) 236 { 237 int ret; 238 239 ipa_interrupt_enable(ipa, IPA_IRQ_TX_SUSPEND); 240 241 ret = device_init_wakeup(ipa->dev, true); 242 if (ret) 243 ipa_interrupt_disable(ipa, IPA_IRQ_TX_SUSPEND); 244 245 return ret; 246 } 247 248 void ipa_power_teardown(struct ipa *ipa) 249 { 250 (void)device_init_wakeup(ipa->dev, false); 251 ipa_interrupt_disable(ipa, IPA_IRQ_TX_SUSPEND); 252 } 253 254 /* Initialize IPA power management */ 255 struct ipa_power * 256 ipa_power_init(struct device *dev, const struct ipa_power_data *data) 257 { 258 struct ipa_power *power; 259 struct clk *clk; 260 size_t size; 261 int ret; 262 263 clk = clk_get(dev, "core"); 264 if (IS_ERR(clk)) { 265 dev_err_probe(dev, PTR_ERR(clk), "error getting core clock\n"); 266 267 return ERR_CAST(clk); 268 } 269 270 ret = clk_set_rate(clk, data->core_clock_rate); 271 if (ret) { 272 dev_err(dev, "error %d setting core clock rate to %u\n", 273 ret, data->core_clock_rate); 274 goto err_clk_put; 275 } 276 277 size = struct_size(power, interconnect, data->interconnect_count); 278 power = kzalloc(size, GFP_KERNEL); 279 if (!power) { 280 ret = -ENOMEM; 281 goto err_clk_put; 282 } 283 power->dev = dev; 284 power->core = clk; 285 power->interconnect_count = data->interconnect_count; 286 287 ret = ipa_interconnect_init(power, data->interconnect_data); 288 if (ret) 289 goto err_kfree; 290 291 ret = ipa_power_retention_init(power); 292 if (ret) 293 goto err_interconnect_exit; 294 295 pm_runtime_set_autosuspend_delay(dev, IPA_AUTOSUSPEND_DELAY); 296 pm_runtime_use_autosuspend(dev); 297 pm_runtime_enable(dev); 298 299 return power; 300 301 err_interconnect_exit: 302 ipa_interconnect_exit(power); 303 err_kfree: 304 kfree(power); 305 err_clk_put: 306 clk_put(clk); 307 308 return ERR_PTR(ret); 309 } 310 311 /* Inverse of ipa_power_init() */ 312 void ipa_power_exit(struct ipa_power *power) 313 { 314 struct device *dev = power->dev; 315 struct clk *clk = power->core; 316 317 pm_runtime_disable(dev); 318 pm_runtime_dont_use_autosuspend(dev); 319 ipa_power_retention_exit(power); 320 ipa_interconnect_exit(power); 321 kfree(power); 322 clk_put(clk); 323 } 324 325 const struct dev_pm_ops ipa_pm_ops = { 326 .suspend = ipa_suspend, 327 .resume = ipa_resume, 328 .runtime_suspend = ipa_runtime_suspend, 329 .runtime_resume = ipa_runtime_resume, 330 }; 331