1 // SPDX-License-Identifier: GPL-2.0 2 3 /* Copyright (c) 2012-2018, The Linux Foundation. All rights reserved. 4 * Copyright (C) 2018-2021 Linaro Ltd. 5 */ 6 7 #include <linux/types.h> 8 #include <linux/atomic.h> 9 #include <linux/bitfield.h> 10 #include <linux/device.h> 11 #include <linux/bug.h> 12 #include <linux/io.h> 13 #include <linux/firmware.h> 14 #include <linux/module.h> 15 #include <linux/of.h> 16 #include <linux/of_device.h> 17 #include <linux/of_address.h> 18 #include <linux/qcom_scm.h> 19 #include <linux/soc/qcom/mdt_loader.h> 20 21 #include "ipa.h" 22 #include "ipa_clock.h" 23 #include "ipa_data.h" 24 #include "ipa_endpoint.h" 25 #include "ipa_resource.h" 26 #include "ipa_cmd.h" 27 #include "ipa_reg.h" 28 #include "ipa_mem.h" 29 #include "ipa_table.h" 30 #include "ipa_modem.h" 31 #include "ipa_uc.h" 32 #include "ipa_interrupt.h" 33 #include "gsi_trans.h" 34 #include "ipa_sysfs.h" 35 36 /** 37 * DOC: The IP Accelerator 38 * 39 * This driver supports the Qualcomm IP Accelerator (IPA), which is a 40 * networking component found in many Qualcomm SoCs. The IPA is connected 41 * to the application processor (AP), but is also connected (and partially 42 * controlled by) other "execution environments" (EEs), such as a modem. 43 * 44 * The IPA is the conduit between the AP and the modem that carries network 45 * traffic. This driver presents a network interface representing the 46 * connection of the modem to external (e.g. LTE) networks. 47 * 48 * The IPA provides protocol checksum calculation, offloading this work 49 * from the AP. The IPA offers additional functionality, including routing, 50 * filtering, and NAT support, but that more advanced functionality is not 51 * currently supported. Despite that, some resources--including routing 52 * tables and filter tables--are defined in this driver because they must 53 * be initialized even when the advanced hardware features are not used. 54 * 55 * There are two distinct layers that implement the IPA hardware, and this 56 * is reflected in the organization of the driver. The generic software 57 * interface (GSI) is an integral component of the IPA, providing a 58 * well-defined communication layer between the AP subsystem and the IPA 59 * core. The GSI implements a set of "channels" used for communication 60 * between the AP and the IPA. 61 * 62 * The IPA layer uses GSI channels to implement its "endpoints". And while 63 * a GSI channel carries data between the AP and the IPA, a pair of IPA 64 * endpoints is used to carry traffic between two EEs. Specifically, the main 65 * modem network interface is implemented by two pairs of endpoints: a TX 66 * endpoint on the AP coupled with an RX endpoint on the modem; and another 67 * RX endpoint on the AP receiving data from a TX endpoint on the modem. 68 */ 69 70 /* The name of the GSI firmware file relative to /lib/firmware */ 71 #define IPA_FW_PATH_DEFAULT "ipa_fws.mdt" 72 #define IPA_PAS_ID 15 73 74 /* Shift of 19.2 MHz timestamp to achieve lower resolution timestamps */ 75 #define DPL_TIMESTAMP_SHIFT 14 /* ~1.172 kHz, ~853 usec per tick */ 76 #define TAG_TIMESTAMP_SHIFT 14 77 #define NAT_TIMESTAMP_SHIFT 24 /* ~1.144 Hz, ~874 msec per tick */ 78 79 /* Divider for 19.2 MHz crystal oscillator clock to get common timer clock */ 80 #define IPA_XO_CLOCK_DIVIDER 192 /* 1 is subtracted where used */ 81 82 /** 83 * ipa_setup() - Set up IPA hardware 84 * @ipa: IPA pointer 85 * 86 * Perform initialization that requires issuing immediate commands on 87 * the command TX endpoint. If the modem is doing GSI firmware load 88 * and initialization, this function will be called when an SMP2P 89 * interrupt has been signaled by the modem. Otherwise it will be 90 * called from ipa_probe() after GSI firmware has been successfully 91 * loaded, authenticated, and started by Trust Zone. 92 */ 93 int ipa_setup(struct ipa *ipa) 94 { 95 struct ipa_endpoint *exception_endpoint; 96 struct ipa_endpoint *command_endpoint; 97 struct device *dev = &ipa->pdev->dev; 98 int ret; 99 100 ret = gsi_setup(&ipa->gsi); 101 if (ret) 102 return ret; 103 104 ipa_power_setup(ipa); 105 106 ret = device_init_wakeup(dev, true); 107 if (ret) 108 goto err_gsi_teardown; 109 110 ipa_endpoint_setup(ipa); 111 112 /* We need to use the AP command TX endpoint to perform other 113 * initialization, so we enable first. 114 */ 115 command_endpoint = ipa->name_map[IPA_ENDPOINT_AP_COMMAND_TX]; 116 ret = ipa_endpoint_enable_one(command_endpoint); 117 if (ret) 118 goto err_endpoint_teardown; 119 120 ret = ipa_mem_setup(ipa); /* No matching teardown required */ 121 if (ret) 122 goto err_command_disable; 123 124 ret = ipa_table_setup(ipa); /* No matching teardown required */ 125 if (ret) 126 goto err_command_disable; 127 128 /* Enable the exception handling endpoint, and tell the hardware 129 * to use it by default. 130 */ 131 exception_endpoint = ipa->name_map[IPA_ENDPOINT_AP_LAN_RX]; 132 ret = ipa_endpoint_enable_one(exception_endpoint); 133 if (ret) 134 goto err_command_disable; 135 136 ipa_endpoint_default_route_set(ipa, exception_endpoint->endpoint_id); 137 138 /* We're all set. Now prepare for communication with the modem */ 139 ret = ipa_qmi_setup(ipa); 140 if (ret) 141 goto err_default_route_clear; 142 143 ipa->setup_complete = true; 144 145 dev_info(dev, "IPA driver setup completed successfully\n"); 146 147 return 0; 148 149 err_default_route_clear: 150 ipa_endpoint_default_route_clear(ipa); 151 ipa_endpoint_disable_one(exception_endpoint); 152 err_command_disable: 153 ipa_endpoint_disable_one(command_endpoint); 154 err_endpoint_teardown: 155 ipa_endpoint_teardown(ipa); 156 ipa_power_teardown(ipa); 157 (void)device_init_wakeup(dev, false); 158 err_gsi_teardown: 159 gsi_teardown(&ipa->gsi); 160 161 return ret; 162 } 163 164 /** 165 * ipa_teardown() - Inverse of ipa_setup() 166 * @ipa: IPA pointer 167 */ 168 static void ipa_teardown(struct ipa *ipa) 169 { 170 struct ipa_endpoint *exception_endpoint; 171 struct ipa_endpoint *command_endpoint; 172 173 /* We're going to tear everything down, as if setup never completed */ 174 ipa->setup_complete = false; 175 176 ipa_qmi_teardown(ipa); 177 ipa_endpoint_default_route_clear(ipa); 178 exception_endpoint = ipa->name_map[IPA_ENDPOINT_AP_LAN_RX]; 179 ipa_endpoint_disable_one(exception_endpoint); 180 command_endpoint = ipa->name_map[IPA_ENDPOINT_AP_COMMAND_TX]; 181 ipa_endpoint_disable_one(command_endpoint); 182 ipa_endpoint_teardown(ipa); 183 ipa_power_teardown(ipa); 184 (void)device_init_wakeup(&ipa->pdev->dev, false); 185 gsi_teardown(&ipa->gsi); 186 } 187 188 /* Configure bus access behavior for IPA components */ 189 static void ipa_hardware_config_comp(struct ipa *ipa) 190 { 191 u32 val; 192 193 /* Nothing to configure prior to IPA v4.0 */ 194 if (ipa->version < IPA_VERSION_4_0) 195 return; 196 197 val = ioread32(ipa->reg_virt + IPA_REG_COMP_CFG_OFFSET); 198 199 if (ipa->version == IPA_VERSION_4_0) { 200 val &= ~IPA_QMB_SELECT_CONS_EN_FMASK; 201 val &= ~IPA_QMB_SELECT_PROD_EN_FMASK; 202 val &= ~IPA_QMB_SELECT_GLOBAL_EN_FMASK; 203 } else if (ipa->version < IPA_VERSION_4_5) { 204 val |= GSI_MULTI_AXI_MASTERS_DIS_FMASK; 205 } else { 206 /* For IPA v4.5 IPA_FULL_FLUSH_WAIT_RSC_CLOSE_EN is 0 */ 207 } 208 209 val |= GSI_MULTI_INORDER_RD_DIS_FMASK; 210 val |= GSI_MULTI_INORDER_WR_DIS_FMASK; 211 212 iowrite32(val, ipa->reg_virt + IPA_REG_COMP_CFG_OFFSET); 213 } 214 215 /* Configure DDR and (possibly) PCIe max read/write QSB values */ 216 static void 217 ipa_hardware_config_qsb(struct ipa *ipa, const struct ipa_data *data) 218 { 219 const struct ipa_qsb_data *data0; 220 const struct ipa_qsb_data *data1; 221 u32 val; 222 223 /* QMB 0 represents DDR; QMB 1 (if present) represents PCIe */ 224 data0 = &data->qsb_data[IPA_QSB_MASTER_DDR]; 225 if (data->qsb_count > 1) 226 data1 = &data->qsb_data[IPA_QSB_MASTER_PCIE]; 227 228 /* Max outstanding write accesses for QSB masters */ 229 val = u32_encode_bits(data0->max_writes, GEN_QMB_0_MAX_WRITES_FMASK); 230 if (data->qsb_count > 1) 231 val |= u32_encode_bits(data1->max_writes, 232 GEN_QMB_1_MAX_WRITES_FMASK); 233 iowrite32(val, ipa->reg_virt + IPA_REG_QSB_MAX_WRITES_OFFSET); 234 235 /* Max outstanding read accesses for QSB masters */ 236 val = u32_encode_bits(data0->max_reads, GEN_QMB_0_MAX_READS_FMASK); 237 if (ipa->version >= IPA_VERSION_4_0) 238 val |= u32_encode_bits(data0->max_reads_beats, 239 GEN_QMB_0_MAX_READS_BEATS_FMASK); 240 if (data->qsb_count > 1) { 241 val |= u32_encode_bits(data1->max_reads, 242 GEN_QMB_1_MAX_READS_FMASK); 243 if (ipa->version >= IPA_VERSION_4_0) 244 val |= u32_encode_bits(data1->max_reads_beats, 245 GEN_QMB_1_MAX_READS_BEATS_FMASK); 246 } 247 iowrite32(val, ipa->reg_virt + IPA_REG_QSB_MAX_READS_OFFSET); 248 } 249 250 /* The internal inactivity timer clock is used for the aggregation timer */ 251 #define TIMER_FREQUENCY 32000 /* 32 KHz inactivity timer clock */ 252 253 /* Compute the value to use in the COUNTER_CFG register AGGR_GRANULARITY 254 * field to represent the given number of microseconds. The value is one 255 * less than the number of timer ticks in the requested period. 0 is not 256 * a valid granularity value (so for example @usec must be at least 16 for 257 * a TIMER_FREQUENCY of 32000). 258 */ 259 static __always_inline u32 ipa_aggr_granularity_val(u32 usec) 260 { 261 return DIV_ROUND_CLOSEST(usec * TIMER_FREQUENCY, USEC_PER_SEC) - 1; 262 } 263 264 /* IPA uses unified Qtime starting at IPA v4.5, implementing various 265 * timestamps and timers independent of the IPA core clock rate. The 266 * Qtimer is based on a 56-bit timestamp incremented at each tick of 267 * a 19.2 MHz SoC crystal oscillator (XO clock). 268 * 269 * For IPA timestamps (tag, NAT, data path logging) a lower resolution 270 * timestamp is achieved by shifting the Qtimer timestamp value right 271 * some number of bits to produce the low-order bits of the coarser 272 * granularity timestamp. 273 * 274 * For timers, a common timer clock is derived from the XO clock using 275 * a divider (we use 192, to produce a 100kHz timer clock). From 276 * this common clock, three "pulse generators" are used to produce 277 * timer ticks at a configurable frequency. IPA timers (such as 278 * those used for aggregation or head-of-line block handling) now 279 * define their period based on one of these pulse generators. 280 */ 281 static void ipa_qtime_config(struct ipa *ipa) 282 { 283 u32 val; 284 285 /* Timer clock divider must be disabled when we change the rate */ 286 iowrite32(0, ipa->reg_virt + IPA_REG_TIMERS_XO_CLK_DIV_CFG_OFFSET); 287 288 /* Set DPL time stamp resolution to use Qtime (instead of 1 msec) */ 289 val = u32_encode_bits(DPL_TIMESTAMP_SHIFT, DPL_TIMESTAMP_LSB_FMASK); 290 val |= u32_encode_bits(1, DPL_TIMESTAMP_SEL_FMASK); 291 /* Configure tag and NAT Qtime timestamp resolution as well */ 292 val |= u32_encode_bits(TAG_TIMESTAMP_SHIFT, TAG_TIMESTAMP_LSB_FMASK); 293 val |= u32_encode_bits(NAT_TIMESTAMP_SHIFT, NAT_TIMESTAMP_LSB_FMASK); 294 iowrite32(val, ipa->reg_virt + IPA_REG_QTIME_TIMESTAMP_CFG_OFFSET); 295 296 /* Set granularity of pulse generators used for other timers */ 297 val = u32_encode_bits(IPA_GRAN_100_US, GRAN_0_FMASK); 298 val |= u32_encode_bits(IPA_GRAN_1_MS, GRAN_1_FMASK); 299 val |= u32_encode_bits(IPA_GRAN_1_MS, GRAN_2_FMASK); 300 iowrite32(val, ipa->reg_virt + IPA_REG_TIMERS_PULSE_GRAN_CFG_OFFSET); 301 302 /* Actual divider is 1 more than value supplied here */ 303 val = u32_encode_bits(IPA_XO_CLOCK_DIVIDER - 1, DIV_VALUE_FMASK); 304 iowrite32(val, ipa->reg_virt + IPA_REG_TIMERS_XO_CLK_DIV_CFG_OFFSET); 305 306 /* Divider value is set; re-enable the common timer clock divider */ 307 val |= u32_encode_bits(1, DIV_ENABLE_FMASK); 308 iowrite32(val, ipa->reg_virt + IPA_REG_TIMERS_XO_CLK_DIV_CFG_OFFSET); 309 } 310 311 static void ipa_idle_indication_cfg(struct ipa *ipa, 312 u32 enter_idle_debounce_thresh, 313 bool const_non_idle_enable) 314 { 315 u32 offset; 316 u32 val; 317 318 val = u32_encode_bits(enter_idle_debounce_thresh, 319 ENTER_IDLE_DEBOUNCE_THRESH_FMASK); 320 if (const_non_idle_enable) 321 val |= CONST_NON_IDLE_ENABLE_FMASK; 322 323 offset = ipa_reg_idle_indication_cfg_offset(ipa->version); 324 iowrite32(val, ipa->reg_virt + offset); 325 } 326 327 /** 328 * ipa_hardware_dcd_config() - Enable dynamic clock division on IPA 329 * @ipa: IPA pointer 330 * 331 * Configures when the IPA signals it is idle to the global clock 332 * controller, which can respond by scalling down the clock to 333 * save power. 334 */ 335 static void ipa_hardware_dcd_config(struct ipa *ipa) 336 { 337 /* Recommended values for IPA 3.5 and later according to IPA HPG */ 338 ipa_idle_indication_cfg(ipa, 256, false); 339 } 340 341 static void ipa_hardware_dcd_deconfig(struct ipa *ipa) 342 { 343 /* Power-on reset values */ 344 ipa_idle_indication_cfg(ipa, 0, true); 345 } 346 347 /** 348 * ipa_hardware_config() - Primitive hardware initialization 349 * @ipa: IPA pointer 350 * @data: IPA configuration data 351 */ 352 static void ipa_hardware_config(struct ipa *ipa, const struct ipa_data *data) 353 { 354 enum ipa_version version = ipa->version; 355 u32 granularity; 356 u32 val; 357 358 /* IPA v4.5+ has no backward compatibility register */ 359 if (version < IPA_VERSION_4_5) { 360 val = data->backward_compat; 361 iowrite32(val, ipa->reg_virt + IPA_REG_BCR_OFFSET); 362 } 363 364 /* Implement some hardware workarounds */ 365 if (version >= IPA_VERSION_4_0 && version < IPA_VERSION_4_5) { 366 /* Disable PA mask to allow HOLB drop */ 367 val = ioread32(ipa->reg_virt + IPA_REG_TX_CFG_OFFSET); 368 val &= ~PA_MASK_EN_FMASK; 369 iowrite32(val, ipa->reg_virt + IPA_REG_TX_CFG_OFFSET); 370 371 /* Enable open global clocks in the CLKON configuration */ 372 val = GLOBAL_FMASK | GLOBAL_2X_CLK_FMASK; 373 } else if (version == IPA_VERSION_3_1) { 374 val = MISC_FMASK; /* Disable MISC clock gating */ 375 } else { 376 val = 0; /* No CLKON configuration needed */ 377 } 378 if (val) 379 iowrite32(val, ipa->reg_virt + IPA_REG_CLKON_CFG_OFFSET); 380 381 ipa_hardware_config_comp(ipa); 382 383 /* Configure system bus limits */ 384 ipa_hardware_config_qsb(ipa, data); 385 386 if (version < IPA_VERSION_4_5) { 387 /* Configure aggregation timer granularity */ 388 granularity = ipa_aggr_granularity_val(IPA_AGGR_GRANULARITY); 389 val = u32_encode_bits(granularity, AGGR_GRANULARITY_FMASK); 390 iowrite32(val, ipa->reg_virt + IPA_REG_COUNTER_CFG_OFFSET); 391 } else { 392 ipa_qtime_config(ipa); 393 } 394 395 /* IPA v4.2 does not support hashed tables, so disable them */ 396 if (version == IPA_VERSION_4_2) { 397 u32 offset = ipa_reg_filt_rout_hash_en_offset(version); 398 399 iowrite32(0, ipa->reg_virt + offset); 400 } 401 402 /* Enable dynamic clock division */ 403 ipa_hardware_dcd_config(ipa); 404 } 405 406 /** 407 * ipa_hardware_deconfig() - Inverse of ipa_hardware_config() 408 * @ipa: IPA pointer 409 * 410 * This restores the power-on reset values (even if they aren't different) 411 */ 412 static void ipa_hardware_deconfig(struct ipa *ipa) 413 { 414 /* Mostly we just leave things as we set them. */ 415 ipa_hardware_dcd_deconfig(ipa); 416 } 417 418 /** 419 * ipa_config() - Configure IPA hardware 420 * @ipa: IPA pointer 421 * @data: IPA configuration data 422 * 423 * Perform initialization requiring IPA clock to be enabled. 424 */ 425 static int ipa_config(struct ipa *ipa, const struct ipa_data *data) 426 { 427 int ret; 428 429 ipa_hardware_config(ipa, data); 430 431 ret = ipa_mem_config(ipa); 432 if (ret) 433 goto err_hardware_deconfig; 434 435 ipa->interrupt = ipa_interrupt_config(ipa); 436 if (IS_ERR(ipa->interrupt)) { 437 ret = PTR_ERR(ipa->interrupt); 438 ipa->interrupt = NULL; 439 goto err_mem_deconfig; 440 } 441 442 ipa_uc_config(ipa); 443 444 ret = ipa_endpoint_config(ipa); 445 if (ret) 446 goto err_uc_deconfig; 447 448 ipa_table_config(ipa); /* No deconfig required */ 449 450 /* Assign resource limitation to each group; no deconfig required */ 451 ret = ipa_resource_config(ipa, data->resource_data); 452 if (ret) 453 goto err_endpoint_deconfig; 454 455 ret = ipa_modem_config(ipa); 456 if (ret) 457 goto err_endpoint_deconfig; 458 459 return 0; 460 461 err_endpoint_deconfig: 462 ipa_endpoint_deconfig(ipa); 463 err_uc_deconfig: 464 ipa_uc_deconfig(ipa); 465 ipa_interrupt_deconfig(ipa->interrupt); 466 ipa->interrupt = NULL; 467 err_mem_deconfig: 468 ipa_mem_deconfig(ipa); 469 err_hardware_deconfig: 470 ipa_hardware_deconfig(ipa); 471 472 return ret; 473 } 474 475 /** 476 * ipa_deconfig() - Inverse of ipa_config() 477 * @ipa: IPA pointer 478 */ 479 static void ipa_deconfig(struct ipa *ipa) 480 { 481 ipa_modem_deconfig(ipa); 482 ipa_endpoint_deconfig(ipa); 483 ipa_uc_deconfig(ipa); 484 ipa_interrupt_deconfig(ipa->interrupt); 485 ipa->interrupt = NULL; 486 ipa_mem_deconfig(ipa); 487 ipa_hardware_deconfig(ipa); 488 } 489 490 static int ipa_firmware_load(struct device *dev) 491 { 492 const struct firmware *fw; 493 struct device_node *node; 494 struct resource res; 495 phys_addr_t phys; 496 const char *path; 497 ssize_t size; 498 void *virt; 499 int ret; 500 501 node = of_parse_phandle(dev->of_node, "memory-region", 0); 502 if (!node) { 503 dev_err(dev, "DT error getting \"memory-region\" property\n"); 504 return -EINVAL; 505 } 506 507 ret = of_address_to_resource(node, 0, &res); 508 of_node_put(node); 509 if (ret) { 510 dev_err(dev, "error %d getting \"memory-region\" resource\n", 511 ret); 512 return ret; 513 } 514 515 /* Use name from DTB if specified; use default for *any* error */ 516 ret = of_property_read_string(dev->of_node, "firmware-name", &path); 517 if (ret) { 518 dev_dbg(dev, "error %d getting \"firmware-name\" resource\n", 519 ret); 520 path = IPA_FW_PATH_DEFAULT; 521 } 522 523 ret = request_firmware(&fw, path, dev); 524 if (ret) { 525 dev_err(dev, "error %d requesting \"%s\"\n", ret, path); 526 return ret; 527 } 528 529 phys = res.start; 530 size = (size_t)resource_size(&res); 531 virt = memremap(phys, size, MEMREMAP_WC); 532 if (!virt) { 533 dev_err(dev, "unable to remap firmware memory\n"); 534 ret = -ENOMEM; 535 goto out_release_firmware; 536 } 537 538 ret = qcom_mdt_load(dev, fw, path, IPA_PAS_ID, virt, phys, size, NULL); 539 if (ret) 540 dev_err(dev, "error %d loading \"%s\"\n", ret, path); 541 else if ((ret = qcom_scm_pas_auth_and_reset(IPA_PAS_ID))) 542 dev_err(dev, "error %d authenticating \"%s\"\n", ret, path); 543 544 memunmap(virt); 545 out_release_firmware: 546 release_firmware(fw); 547 548 return ret; 549 } 550 551 static const struct of_device_id ipa_match[] = { 552 { 553 .compatible = "qcom,msm8998-ipa", 554 .data = &ipa_data_v3_1, 555 }, 556 { 557 .compatible = "qcom,sdm845-ipa", 558 .data = &ipa_data_v3_5_1, 559 }, 560 { 561 .compatible = "qcom,sc7180-ipa", 562 .data = &ipa_data_v4_2, 563 }, 564 { 565 .compatible = "qcom,sdx55-ipa", 566 .data = &ipa_data_v4_5, 567 }, 568 { 569 .compatible = "qcom,sm8350-ipa", 570 .data = &ipa_data_v4_9, 571 }, 572 { 573 .compatible = "qcom,sc7280-ipa", 574 .data = &ipa_data_v4_11, 575 }, 576 { }, 577 }; 578 MODULE_DEVICE_TABLE(of, ipa_match); 579 580 /* Check things that can be validated at build time. This just 581 * groups these things BUILD_BUG_ON() calls don't clutter the rest 582 * of the code. 583 * */ 584 static void ipa_validate_build(void) 585 { 586 /* At one time we assumed a 64-bit build, allowing some do_div() 587 * calls to be replaced by simple division or modulo operations. 588 * We currently only perform divide and modulo operations on u32, 589 * u16, or size_t objects, and of those only size_t has any chance 590 * of being a 64-bit value. (It should be guaranteed 32 bits wide 591 * on a 32-bit build, but there is no harm in verifying that.) 592 */ 593 BUILD_BUG_ON(!IS_ENABLED(CONFIG_64BIT) && sizeof(size_t) != 4); 594 595 /* Code assumes the EE ID for the AP is 0 (zeroed structure field) */ 596 BUILD_BUG_ON(GSI_EE_AP != 0); 597 598 /* There's no point if we have no channels or event rings */ 599 BUILD_BUG_ON(!GSI_CHANNEL_COUNT_MAX); 600 BUILD_BUG_ON(!GSI_EVT_RING_COUNT_MAX); 601 602 /* GSI hardware design limits */ 603 BUILD_BUG_ON(GSI_CHANNEL_COUNT_MAX > 32); 604 BUILD_BUG_ON(GSI_EVT_RING_COUNT_MAX > 31); 605 606 /* The number of TREs in a transaction is limited by the channel's 607 * TLV FIFO size. A transaction structure uses 8-bit fields 608 * to represents the number of TREs it has allocated and used. 609 */ 610 BUILD_BUG_ON(GSI_TLV_MAX > U8_MAX); 611 612 /* This is used as a divisor */ 613 BUILD_BUG_ON(!IPA_AGGR_GRANULARITY); 614 615 /* Aggregation granularity value can't be 0, and must fit */ 616 BUILD_BUG_ON(!ipa_aggr_granularity_val(IPA_AGGR_GRANULARITY)); 617 BUILD_BUG_ON(ipa_aggr_granularity_val(IPA_AGGR_GRANULARITY) > 618 field_max(AGGR_GRANULARITY_FMASK)); 619 } 620 621 static bool ipa_version_valid(enum ipa_version version) 622 { 623 switch (version) { 624 case IPA_VERSION_3_0: 625 case IPA_VERSION_3_1: 626 case IPA_VERSION_3_5: 627 case IPA_VERSION_3_5_1: 628 case IPA_VERSION_4_0: 629 case IPA_VERSION_4_1: 630 case IPA_VERSION_4_2: 631 case IPA_VERSION_4_5: 632 case IPA_VERSION_4_7: 633 case IPA_VERSION_4_9: 634 case IPA_VERSION_4_11: 635 return true; 636 637 default: 638 return false; 639 } 640 } 641 642 /** 643 * ipa_probe() - IPA platform driver probe function 644 * @pdev: Platform device pointer 645 * 646 * Return: 0 if successful, or a negative error code (possibly 647 * EPROBE_DEFER) 648 * 649 * This is the main entry point for the IPA driver. Initialization proceeds 650 * in several stages: 651 * - The "init" stage involves activities that can be initialized without 652 * access to the IPA hardware. 653 * - The "config" stage requires the IPA clock to be active so IPA registers 654 * can be accessed, but does not require the use of IPA immediate commands. 655 * - The "setup" stage uses IPA immediate commands, and so requires the GSI 656 * layer to be initialized. 657 * 658 * A Boolean Device Tree "modem-init" property determines whether GSI 659 * initialization will be performed by the AP (Trust Zone) or the modem. 660 * If the AP does GSI initialization, the setup phase is entered after 661 * this has completed successfully. Otherwise the modem initializes 662 * the GSI layer and signals it has finished by sending an SMP2P interrupt 663 * to the AP; this triggers the start if IPA setup. 664 */ 665 static int ipa_probe(struct platform_device *pdev) 666 { 667 struct device *dev = &pdev->dev; 668 const struct ipa_data *data; 669 struct ipa_clock *clock; 670 bool modem_init; 671 struct ipa *ipa; 672 int ret; 673 674 ipa_validate_build(); 675 676 /* Get configuration data early; needed for clock initialization */ 677 data = of_device_get_match_data(dev); 678 if (!data) { 679 dev_err(dev, "matched hardware not supported\n"); 680 return -ENODEV; 681 } 682 683 if (!ipa_version_valid(data->version)) { 684 dev_err(dev, "invalid IPA version\n"); 685 return -EINVAL; 686 } 687 688 /* If we need Trust Zone, make sure it's available */ 689 modem_init = of_property_read_bool(dev->of_node, "modem-init"); 690 if (!modem_init) 691 if (!qcom_scm_is_available()) 692 return -EPROBE_DEFER; 693 694 /* The clock and interconnects might not be ready when we're 695 * probed, so might return -EPROBE_DEFER. 696 */ 697 clock = ipa_clock_init(dev, data->clock_data); 698 if (IS_ERR(clock)) 699 return PTR_ERR(clock); 700 701 /* No more EPROBE_DEFER. Allocate and initialize the IPA structure */ 702 ipa = kzalloc(sizeof(*ipa), GFP_KERNEL); 703 if (!ipa) { 704 ret = -ENOMEM; 705 goto err_clock_exit; 706 } 707 708 ipa->pdev = pdev; 709 dev_set_drvdata(dev, ipa); 710 ipa->clock = clock; 711 ipa->version = data->version; 712 init_completion(&ipa->completion); 713 714 ret = ipa_reg_init(ipa); 715 if (ret) 716 goto err_kfree_ipa; 717 718 ret = ipa_mem_init(ipa, data->mem_data); 719 if (ret) 720 goto err_reg_exit; 721 722 ret = gsi_init(&ipa->gsi, pdev, ipa->version, data->endpoint_count, 723 data->endpoint_data); 724 if (ret) 725 goto err_mem_exit; 726 727 /* Result is a non-zero mask of endpoints that support filtering */ 728 ipa->filter_map = ipa_endpoint_init(ipa, data->endpoint_count, 729 data->endpoint_data); 730 if (!ipa->filter_map) { 731 ret = -EINVAL; 732 goto err_gsi_exit; 733 } 734 735 ret = ipa_table_init(ipa); 736 if (ret) 737 goto err_endpoint_exit; 738 739 ret = ipa_modem_init(ipa, modem_init); 740 if (ret) 741 goto err_table_exit; 742 743 /* The clock needs to be active for config and setup */ 744 ret = ipa_clock_get(ipa); 745 if (WARN_ON(ret < 0)) 746 goto err_clock_put; 747 748 ret = ipa_config(ipa, data); 749 if (ret) 750 goto err_clock_put; 751 752 dev_info(dev, "IPA driver initialized"); 753 754 /* If the modem is doing early initialization, it will trigger a 755 * call to ipa_setup() when it has finished. In that case we're 756 * done here. 757 */ 758 if (modem_init) 759 goto done; 760 761 /* Otherwise we need to load the firmware and have Trust Zone validate 762 * and install it. If that succeeds we can proceed with setup. 763 */ 764 ret = ipa_firmware_load(dev); 765 if (ret) 766 goto err_deconfig; 767 768 ret = ipa_setup(ipa); 769 if (ret) 770 goto err_deconfig; 771 done: 772 (void)ipa_clock_put(ipa); 773 774 return 0; 775 776 err_deconfig: 777 ipa_deconfig(ipa); 778 err_clock_put: 779 (void)ipa_clock_put(ipa); 780 ipa_modem_exit(ipa); 781 err_table_exit: 782 ipa_table_exit(ipa); 783 err_endpoint_exit: 784 ipa_endpoint_exit(ipa); 785 err_gsi_exit: 786 gsi_exit(&ipa->gsi); 787 err_mem_exit: 788 ipa_mem_exit(ipa); 789 err_reg_exit: 790 ipa_reg_exit(ipa); 791 err_kfree_ipa: 792 kfree(ipa); 793 err_clock_exit: 794 ipa_clock_exit(clock); 795 796 return ret; 797 } 798 799 static int ipa_remove(struct platform_device *pdev) 800 { 801 struct ipa *ipa = dev_get_drvdata(&pdev->dev); 802 struct ipa_clock *clock = ipa->clock; 803 int ret; 804 805 ret = ipa_clock_get(ipa); 806 if (WARN_ON(ret < 0)) 807 goto out_clock_put; 808 809 if (ipa->setup_complete) { 810 ret = ipa_modem_stop(ipa); 811 /* If starting or stopping is in progress, try once more */ 812 if (ret == -EBUSY) { 813 usleep_range(USEC_PER_MSEC, 2 * USEC_PER_MSEC); 814 ret = ipa_modem_stop(ipa); 815 } 816 if (ret) 817 return ret; 818 819 ipa_teardown(ipa); 820 } 821 822 ipa_deconfig(ipa); 823 out_clock_put: 824 (void)ipa_clock_put(ipa); 825 826 ipa_modem_exit(ipa); 827 ipa_table_exit(ipa); 828 ipa_endpoint_exit(ipa); 829 gsi_exit(&ipa->gsi); 830 ipa_mem_exit(ipa); 831 ipa_reg_exit(ipa); 832 kfree(ipa); 833 ipa_clock_exit(clock); 834 835 return 0; 836 } 837 838 static void ipa_shutdown(struct platform_device *pdev) 839 { 840 int ret; 841 842 ret = ipa_remove(pdev); 843 if (ret) 844 dev_err(&pdev->dev, "shutdown: remove returned %d\n", ret); 845 } 846 847 static const struct attribute_group *ipa_attribute_groups[] = { 848 &ipa_attribute_group, 849 &ipa_feature_attribute_group, 850 &ipa_modem_attribute_group, 851 NULL, 852 }; 853 854 static struct platform_driver ipa_driver = { 855 .probe = ipa_probe, 856 .remove = ipa_remove, 857 .shutdown = ipa_shutdown, 858 .driver = { 859 .name = "ipa", 860 .pm = &ipa_pm_ops, 861 .of_match_table = ipa_match, 862 .dev_groups = ipa_attribute_groups, 863 }, 864 }; 865 866 module_platform_driver(ipa_driver); 867 868 MODULE_LICENSE("GPL v2"); 869 MODULE_DESCRIPTION("Qualcomm IP Accelerator device driver"); 870