1 // SPDX-License-Identifier: GPL-2.0 2 3 /* Copyright (c) 2012-2018, The Linux Foundation. All rights reserved. 4 * Copyright (C) 2018-2021 Linaro Ltd. 5 */ 6 7 #include <linux/types.h> 8 #include <linux/atomic.h> 9 #include <linux/bitfield.h> 10 #include <linux/device.h> 11 #include <linux/bug.h> 12 #include <linux/io.h> 13 #include <linux/firmware.h> 14 #include <linux/module.h> 15 #include <linux/of.h> 16 #include <linux/of_device.h> 17 #include <linux/of_address.h> 18 #include <linux/qcom_scm.h> 19 #include <linux/soc/qcom/mdt_loader.h> 20 21 #include "ipa.h" 22 #include "ipa_clock.h" 23 #include "ipa_data.h" 24 #include "ipa_endpoint.h" 25 #include "ipa_resource.h" 26 #include "ipa_cmd.h" 27 #include "ipa_reg.h" 28 #include "ipa_mem.h" 29 #include "ipa_table.h" 30 #include "ipa_modem.h" 31 #include "ipa_uc.h" 32 #include "ipa_interrupt.h" 33 #include "gsi_trans.h" 34 #include "ipa_sysfs.h" 35 36 /** 37 * DOC: The IP Accelerator 38 * 39 * This driver supports the Qualcomm IP Accelerator (IPA), which is a 40 * networking component found in many Qualcomm SoCs. The IPA is connected 41 * to the application processor (AP), but is also connected (and partially 42 * controlled by) other "execution environments" (EEs), such as a modem. 43 * 44 * The IPA is the conduit between the AP and the modem that carries network 45 * traffic. This driver presents a network interface representing the 46 * connection of the modem to external (e.g. LTE) networks. 47 * 48 * The IPA provides protocol checksum calculation, offloading this work 49 * from the AP. The IPA offers additional functionality, including routing, 50 * filtering, and NAT support, but that more advanced functionality is not 51 * currently supported. Despite that, some resources--including routing 52 * tables and filter tables--are defined in this driver because they must 53 * be initialized even when the advanced hardware features are not used. 54 * 55 * There are two distinct layers that implement the IPA hardware, and this 56 * is reflected in the organization of the driver. The generic software 57 * interface (GSI) is an integral component of the IPA, providing a 58 * well-defined communication layer between the AP subsystem and the IPA 59 * core. The GSI implements a set of "channels" used for communication 60 * between the AP and the IPA. 61 * 62 * The IPA layer uses GSI channels to implement its "endpoints". And while 63 * a GSI channel carries data between the AP and the IPA, a pair of IPA 64 * endpoints is used to carry traffic between two EEs. Specifically, the main 65 * modem network interface is implemented by two pairs of endpoints: a TX 66 * endpoint on the AP coupled with an RX endpoint on the modem; and another 67 * RX endpoint on the AP receiving data from a TX endpoint on the modem. 68 */ 69 70 /* The name of the GSI firmware file relative to /lib/firmware */ 71 #define IPA_FW_PATH_DEFAULT "ipa_fws.mdt" 72 #define IPA_PAS_ID 15 73 74 /* Shift of 19.2 MHz timestamp to achieve lower resolution timestamps */ 75 #define DPL_TIMESTAMP_SHIFT 14 /* ~1.172 kHz, ~853 usec per tick */ 76 #define TAG_TIMESTAMP_SHIFT 14 77 #define NAT_TIMESTAMP_SHIFT 24 /* ~1.144 Hz, ~874 msec per tick */ 78 79 /* Divider for 19.2 MHz crystal oscillator clock to get common timer clock */ 80 #define IPA_XO_CLOCK_DIVIDER 192 /* 1 is subtracted where used */ 81 82 /** 83 * ipa_suspend_handler() - Handle the suspend IPA interrupt 84 * @ipa: IPA pointer 85 * @irq_id: IPA interrupt type (unused) 86 * 87 * If an RX endpoint is in suspend state, and the IPA has a packet 88 * destined for that endpoint, the IPA generates a SUSPEND interrupt 89 * to inform the AP that it should resume the endpoint. If we get 90 * one of these interrupts we just resume everything. 91 */ 92 static void ipa_suspend_handler(struct ipa *ipa, enum ipa_irq_id irq_id) 93 { 94 /* Just report the event, and let system resume handle the rest. 95 * More than one endpoint could signal this; if so, ignore 96 * all but the first. 97 */ 98 if (!test_and_set_bit(IPA_FLAG_RESUMED, ipa->flags)) 99 pm_wakeup_dev_event(&ipa->pdev->dev, 0, true); 100 101 /* Acknowledge/clear the suspend interrupt on all endpoints */ 102 ipa_interrupt_suspend_clear_all(ipa->interrupt); 103 } 104 105 /** 106 * ipa_setup() - Set up IPA hardware 107 * @ipa: IPA pointer 108 * 109 * Perform initialization that requires issuing immediate commands on 110 * the command TX endpoint. If the modem is doing GSI firmware load 111 * and initialization, this function will be called when an SMP2P 112 * interrupt has been signaled by the modem. Otherwise it will be 113 * called from ipa_probe() after GSI firmware has been successfully 114 * loaded, authenticated, and started by Trust Zone. 115 */ 116 int ipa_setup(struct ipa *ipa) 117 { 118 struct ipa_endpoint *exception_endpoint; 119 struct ipa_endpoint *command_endpoint; 120 struct device *dev = &ipa->pdev->dev; 121 int ret; 122 123 ret = gsi_setup(&ipa->gsi); 124 if (ret) 125 return ret; 126 127 ipa_interrupt_add(ipa->interrupt, IPA_IRQ_TX_SUSPEND, 128 ipa_suspend_handler); 129 130 ret = device_init_wakeup(dev, true); 131 if (ret) 132 goto err_interrupt_remove; 133 134 ipa_endpoint_setup(ipa); 135 136 /* We need to use the AP command TX endpoint to perform other 137 * initialization, so we enable first. 138 */ 139 command_endpoint = ipa->name_map[IPA_ENDPOINT_AP_COMMAND_TX]; 140 ret = ipa_endpoint_enable_one(command_endpoint); 141 if (ret) 142 goto err_endpoint_teardown; 143 144 ret = ipa_mem_setup(ipa); /* No matching teardown required */ 145 if (ret) 146 goto err_command_disable; 147 148 ret = ipa_table_setup(ipa); /* No matching teardown required */ 149 if (ret) 150 goto err_command_disable; 151 152 /* Enable the exception handling endpoint, and tell the hardware 153 * to use it by default. 154 */ 155 exception_endpoint = ipa->name_map[IPA_ENDPOINT_AP_LAN_RX]; 156 ret = ipa_endpoint_enable_one(exception_endpoint); 157 if (ret) 158 goto err_command_disable; 159 160 ipa_endpoint_default_route_set(ipa, exception_endpoint->endpoint_id); 161 162 /* We're all set. Now prepare for communication with the modem */ 163 ret = ipa_qmi_setup(ipa); 164 if (ret) 165 goto err_default_route_clear; 166 167 ipa->setup_complete = true; 168 169 dev_info(dev, "IPA driver setup completed successfully\n"); 170 171 return 0; 172 173 err_default_route_clear: 174 ipa_endpoint_default_route_clear(ipa); 175 ipa_endpoint_disable_one(exception_endpoint); 176 err_command_disable: 177 ipa_endpoint_disable_one(command_endpoint); 178 err_endpoint_teardown: 179 ipa_endpoint_teardown(ipa); 180 (void)device_init_wakeup(dev, false); 181 err_interrupt_remove: 182 ipa_interrupt_remove(ipa->interrupt, IPA_IRQ_TX_SUSPEND); 183 gsi_teardown(&ipa->gsi); 184 185 return ret; 186 } 187 188 /** 189 * ipa_teardown() - Inverse of ipa_setup() 190 * @ipa: IPA pointer 191 */ 192 static void ipa_teardown(struct ipa *ipa) 193 { 194 struct ipa_endpoint *exception_endpoint; 195 struct ipa_endpoint *command_endpoint; 196 197 /* We're going to tear everything down, as if setup never completed */ 198 ipa->setup_complete = false; 199 200 ipa_qmi_teardown(ipa); 201 ipa_endpoint_default_route_clear(ipa); 202 exception_endpoint = ipa->name_map[IPA_ENDPOINT_AP_LAN_RX]; 203 ipa_endpoint_disable_one(exception_endpoint); 204 command_endpoint = ipa->name_map[IPA_ENDPOINT_AP_COMMAND_TX]; 205 ipa_endpoint_disable_one(command_endpoint); 206 ipa_endpoint_teardown(ipa); 207 (void)device_init_wakeup(&ipa->pdev->dev, false); 208 ipa_interrupt_remove(ipa->interrupt, IPA_IRQ_TX_SUSPEND); 209 gsi_teardown(&ipa->gsi); 210 } 211 212 /* Configure bus access behavior for IPA components */ 213 static void ipa_hardware_config_comp(struct ipa *ipa) 214 { 215 u32 val; 216 217 /* Nothing to configure prior to IPA v4.0 */ 218 if (ipa->version < IPA_VERSION_4_0) 219 return; 220 221 val = ioread32(ipa->reg_virt + IPA_REG_COMP_CFG_OFFSET); 222 223 if (ipa->version == IPA_VERSION_4_0) { 224 val &= ~IPA_QMB_SELECT_CONS_EN_FMASK; 225 val &= ~IPA_QMB_SELECT_PROD_EN_FMASK; 226 val &= ~IPA_QMB_SELECT_GLOBAL_EN_FMASK; 227 } else if (ipa->version < IPA_VERSION_4_5) { 228 val |= GSI_MULTI_AXI_MASTERS_DIS_FMASK; 229 } else { 230 /* For IPA v4.5 IPA_FULL_FLUSH_WAIT_RSC_CLOSE_EN is 0 */ 231 } 232 233 val |= GSI_MULTI_INORDER_RD_DIS_FMASK; 234 val |= GSI_MULTI_INORDER_WR_DIS_FMASK; 235 236 iowrite32(val, ipa->reg_virt + IPA_REG_COMP_CFG_OFFSET); 237 } 238 239 /* Configure DDR and (possibly) PCIe max read/write QSB values */ 240 static void 241 ipa_hardware_config_qsb(struct ipa *ipa, const struct ipa_data *data) 242 { 243 const struct ipa_qsb_data *data0; 244 const struct ipa_qsb_data *data1; 245 u32 val; 246 247 /* QMB 0 represents DDR; QMB 1 (if present) represents PCIe */ 248 data0 = &data->qsb_data[IPA_QSB_MASTER_DDR]; 249 if (data->qsb_count > 1) 250 data1 = &data->qsb_data[IPA_QSB_MASTER_PCIE]; 251 252 /* Max outstanding write accesses for QSB masters */ 253 val = u32_encode_bits(data0->max_writes, GEN_QMB_0_MAX_WRITES_FMASK); 254 if (data->qsb_count > 1) 255 val |= u32_encode_bits(data1->max_writes, 256 GEN_QMB_1_MAX_WRITES_FMASK); 257 iowrite32(val, ipa->reg_virt + IPA_REG_QSB_MAX_WRITES_OFFSET); 258 259 /* Max outstanding read accesses for QSB masters */ 260 val = u32_encode_bits(data0->max_reads, GEN_QMB_0_MAX_READS_FMASK); 261 if (ipa->version >= IPA_VERSION_4_0) 262 val |= u32_encode_bits(data0->max_reads_beats, 263 GEN_QMB_0_MAX_READS_BEATS_FMASK); 264 if (data->qsb_count > 1) { 265 val |= u32_encode_bits(data1->max_reads, 266 GEN_QMB_1_MAX_READS_FMASK); 267 if (ipa->version >= IPA_VERSION_4_0) 268 val |= u32_encode_bits(data1->max_reads_beats, 269 GEN_QMB_1_MAX_READS_BEATS_FMASK); 270 } 271 iowrite32(val, ipa->reg_virt + IPA_REG_QSB_MAX_READS_OFFSET); 272 } 273 274 /* The internal inactivity timer clock is used for the aggregation timer */ 275 #define TIMER_FREQUENCY 32000 /* 32 KHz inactivity timer clock */ 276 277 /* Compute the value to use in the COUNTER_CFG register AGGR_GRANULARITY 278 * field to represent the given number of microseconds. The value is one 279 * less than the number of timer ticks in the requested period. 0 is not 280 * a valid granularity value. 281 */ 282 static u32 ipa_aggr_granularity_val(u32 usec) 283 { 284 WARN_ON(!usec); 285 286 return DIV_ROUND_CLOSEST(usec * TIMER_FREQUENCY, USEC_PER_SEC) - 1; 287 } 288 289 /* IPA uses unified Qtime starting at IPA v4.5, implementing various 290 * timestamps and timers independent of the IPA core clock rate. The 291 * Qtimer is based on a 56-bit timestamp incremented at each tick of 292 * a 19.2 MHz SoC crystal oscillator (XO clock). 293 * 294 * For IPA timestamps (tag, NAT, data path logging) a lower resolution 295 * timestamp is achieved by shifting the Qtimer timestamp value right 296 * some number of bits to produce the low-order bits of the coarser 297 * granularity timestamp. 298 * 299 * For timers, a common timer clock is derived from the XO clock using 300 * a divider (we use 192, to produce a 100kHz timer clock). From 301 * this common clock, three "pulse generators" are used to produce 302 * timer ticks at a configurable frequency. IPA timers (such as 303 * those used for aggregation or head-of-line block handling) now 304 * define their period based on one of these pulse generators. 305 */ 306 static void ipa_qtime_config(struct ipa *ipa) 307 { 308 u32 val; 309 310 /* Timer clock divider must be disabled when we change the rate */ 311 iowrite32(0, ipa->reg_virt + IPA_REG_TIMERS_XO_CLK_DIV_CFG_OFFSET); 312 313 /* Set DPL time stamp resolution to use Qtime (instead of 1 msec) */ 314 val = u32_encode_bits(DPL_TIMESTAMP_SHIFT, DPL_TIMESTAMP_LSB_FMASK); 315 val |= u32_encode_bits(1, DPL_TIMESTAMP_SEL_FMASK); 316 /* Configure tag and NAT Qtime timestamp resolution as well */ 317 val |= u32_encode_bits(TAG_TIMESTAMP_SHIFT, TAG_TIMESTAMP_LSB_FMASK); 318 val |= u32_encode_bits(NAT_TIMESTAMP_SHIFT, NAT_TIMESTAMP_LSB_FMASK); 319 iowrite32(val, ipa->reg_virt + IPA_REG_QTIME_TIMESTAMP_CFG_OFFSET); 320 321 /* Set granularity of pulse generators used for other timers */ 322 val = u32_encode_bits(IPA_GRAN_100_US, GRAN_0_FMASK); 323 val |= u32_encode_bits(IPA_GRAN_1_MS, GRAN_1_FMASK); 324 val |= u32_encode_bits(IPA_GRAN_1_MS, GRAN_2_FMASK); 325 iowrite32(val, ipa->reg_virt + IPA_REG_TIMERS_PULSE_GRAN_CFG_OFFSET); 326 327 /* Actual divider is 1 more than value supplied here */ 328 val = u32_encode_bits(IPA_XO_CLOCK_DIVIDER - 1, DIV_VALUE_FMASK); 329 iowrite32(val, ipa->reg_virt + IPA_REG_TIMERS_XO_CLK_DIV_CFG_OFFSET); 330 331 /* Divider value is set; re-enable the common timer clock divider */ 332 val |= u32_encode_bits(1, DIV_ENABLE_FMASK); 333 iowrite32(val, ipa->reg_virt + IPA_REG_TIMERS_XO_CLK_DIV_CFG_OFFSET); 334 } 335 336 static void ipa_idle_indication_cfg(struct ipa *ipa, 337 u32 enter_idle_debounce_thresh, 338 bool const_non_idle_enable) 339 { 340 u32 offset; 341 u32 val; 342 343 val = u32_encode_bits(enter_idle_debounce_thresh, 344 ENTER_IDLE_DEBOUNCE_THRESH_FMASK); 345 if (const_non_idle_enable) 346 val |= CONST_NON_IDLE_ENABLE_FMASK; 347 348 offset = ipa_reg_idle_indication_cfg_offset(ipa->version); 349 iowrite32(val, ipa->reg_virt + offset); 350 } 351 352 /** 353 * ipa_hardware_dcd_config() - Enable dynamic clock division on IPA 354 * @ipa: IPA pointer 355 * 356 * Configures when the IPA signals it is idle to the global clock 357 * controller, which can respond by scalling down the clock to 358 * save power. 359 */ 360 static void ipa_hardware_dcd_config(struct ipa *ipa) 361 { 362 /* Recommended values for IPA 3.5 and later according to IPA HPG */ 363 ipa_idle_indication_cfg(ipa, 256, false); 364 } 365 366 static void ipa_hardware_dcd_deconfig(struct ipa *ipa) 367 { 368 /* Power-on reset values */ 369 ipa_idle_indication_cfg(ipa, 0, true); 370 } 371 372 /** 373 * ipa_hardware_config() - Primitive hardware initialization 374 * @ipa: IPA pointer 375 * @data: IPA configuration data 376 */ 377 static void ipa_hardware_config(struct ipa *ipa, const struct ipa_data *data) 378 { 379 enum ipa_version version = ipa->version; 380 u32 granularity; 381 u32 val; 382 383 /* IPA v4.5+ has no backward compatibility register */ 384 if (version < IPA_VERSION_4_5) { 385 val = data->backward_compat; 386 iowrite32(val, ipa->reg_virt + IPA_REG_BCR_OFFSET); 387 } 388 389 /* Implement some hardware workarounds */ 390 if (version >= IPA_VERSION_4_0 && version < IPA_VERSION_4_5) { 391 /* Disable PA mask to allow HOLB drop */ 392 val = ioread32(ipa->reg_virt + IPA_REG_TX_CFG_OFFSET); 393 val &= ~PA_MASK_EN_FMASK; 394 iowrite32(val, ipa->reg_virt + IPA_REG_TX_CFG_OFFSET); 395 396 /* Enable open global clocks in the CLKON configuration */ 397 val = GLOBAL_FMASK | GLOBAL_2X_CLK_FMASK; 398 } else if (version == IPA_VERSION_3_1) { 399 val = MISC_FMASK; /* Disable MISC clock gating */ 400 } else { 401 val = 0; /* No CLKON configuration needed */ 402 } 403 if (val) 404 iowrite32(val, ipa->reg_virt + IPA_REG_CLKON_CFG_OFFSET); 405 406 ipa_hardware_config_comp(ipa); 407 408 /* Configure system bus limits */ 409 ipa_hardware_config_qsb(ipa, data); 410 411 if (version < IPA_VERSION_4_5) { 412 /* Configure aggregation timer granularity */ 413 granularity = ipa_aggr_granularity_val(IPA_AGGR_GRANULARITY); 414 val = u32_encode_bits(granularity, AGGR_GRANULARITY_FMASK); 415 iowrite32(val, ipa->reg_virt + IPA_REG_COUNTER_CFG_OFFSET); 416 } else { 417 ipa_qtime_config(ipa); 418 } 419 420 /* IPA v4.2 does not support hashed tables, so disable them */ 421 if (version == IPA_VERSION_4_2) { 422 u32 offset = ipa_reg_filt_rout_hash_en_offset(version); 423 424 iowrite32(0, ipa->reg_virt + offset); 425 } 426 427 /* Enable dynamic clock division */ 428 ipa_hardware_dcd_config(ipa); 429 } 430 431 /** 432 * ipa_hardware_deconfig() - Inverse of ipa_hardware_config() 433 * @ipa: IPA pointer 434 * 435 * This restores the power-on reset values (even if they aren't different) 436 */ 437 static void ipa_hardware_deconfig(struct ipa *ipa) 438 { 439 /* Mostly we just leave things as we set them. */ 440 ipa_hardware_dcd_deconfig(ipa); 441 } 442 443 /** 444 * ipa_config() - Configure IPA hardware 445 * @ipa: IPA pointer 446 * @data: IPA configuration data 447 * 448 * Perform initialization requiring IPA clock to be enabled. 449 */ 450 static int ipa_config(struct ipa *ipa, const struct ipa_data *data) 451 { 452 int ret; 453 454 /* Get a clock reference to allow initialization. This reference 455 * is held after initialization completes, and won't get dropped 456 * unless/until a system suspend request arrives. 457 */ 458 ipa_clock_get(ipa); 459 460 ipa_hardware_config(ipa, data); 461 462 ret = ipa_mem_config(ipa); 463 if (ret) 464 goto err_hardware_deconfig; 465 466 ipa->interrupt = ipa_interrupt_config(ipa); 467 if (IS_ERR(ipa->interrupt)) { 468 ret = PTR_ERR(ipa->interrupt); 469 ipa->interrupt = NULL; 470 goto err_mem_deconfig; 471 } 472 473 ipa_uc_config(ipa); 474 475 ret = ipa_endpoint_config(ipa); 476 if (ret) 477 goto err_interrupt_deconfig; 478 479 ipa_table_config(ipa); /* No deconfig required */ 480 481 /* Assign resource limitation to each group; no deconfig required */ 482 ret = ipa_resource_config(ipa, data->resource_data); 483 if (ret) 484 goto err_endpoint_deconfig; 485 486 ret = ipa_modem_config(ipa); 487 if (ret) 488 goto err_endpoint_deconfig; 489 490 return 0; 491 492 err_endpoint_deconfig: 493 ipa_endpoint_deconfig(ipa); 494 err_interrupt_deconfig: 495 ipa_uc_deconfig(ipa); 496 ipa_interrupt_deconfig(ipa->interrupt); 497 ipa->interrupt = NULL; 498 err_mem_deconfig: 499 ipa_mem_deconfig(ipa); 500 err_hardware_deconfig: 501 ipa_hardware_deconfig(ipa); 502 ipa_clock_put(ipa); 503 504 return ret; 505 } 506 507 /** 508 * ipa_deconfig() - Inverse of ipa_config() 509 * @ipa: IPA pointer 510 */ 511 static void ipa_deconfig(struct ipa *ipa) 512 { 513 ipa_modem_deconfig(ipa); 514 ipa_endpoint_deconfig(ipa); 515 ipa_uc_deconfig(ipa); 516 ipa_interrupt_deconfig(ipa->interrupt); 517 ipa->interrupt = NULL; 518 ipa_mem_deconfig(ipa); 519 ipa_hardware_deconfig(ipa); 520 ipa_clock_put(ipa); 521 } 522 523 static int ipa_firmware_load(struct device *dev) 524 { 525 const struct firmware *fw; 526 struct device_node *node; 527 struct resource res; 528 phys_addr_t phys; 529 const char *path; 530 ssize_t size; 531 void *virt; 532 int ret; 533 534 node = of_parse_phandle(dev->of_node, "memory-region", 0); 535 if (!node) { 536 dev_err(dev, "DT error getting \"memory-region\" property\n"); 537 return -EINVAL; 538 } 539 540 ret = of_address_to_resource(node, 0, &res); 541 of_node_put(node); 542 if (ret) { 543 dev_err(dev, "error %d getting \"memory-region\" resource\n", 544 ret); 545 return ret; 546 } 547 548 /* Use name from DTB if specified; use default for *any* error */ 549 ret = of_property_read_string(dev->of_node, "firmware-name", &path); 550 if (ret) { 551 dev_dbg(dev, "error %d getting \"firmware-name\" resource\n", 552 ret); 553 path = IPA_FW_PATH_DEFAULT; 554 } 555 556 ret = request_firmware(&fw, path, dev); 557 if (ret) { 558 dev_err(dev, "error %d requesting \"%s\"\n", ret, path); 559 return ret; 560 } 561 562 phys = res.start; 563 size = (size_t)resource_size(&res); 564 virt = memremap(phys, size, MEMREMAP_WC); 565 if (!virt) { 566 dev_err(dev, "unable to remap firmware memory\n"); 567 ret = -ENOMEM; 568 goto out_release_firmware; 569 } 570 571 ret = qcom_mdt_load(dev, fw, path, IPA_PAS_ID, virt, phys, size, NULL); 572 if (ret) 573 dev_err(dev, "error %d loading \"%s\"\n", ret, path); 574 else if ((ret = qcom_scm_pas_auth_and_reset(IPA_PAS_ID))) 575 dev_err(dev, "error %d authenticating \"%s\"\n", ret, path); 576 577 memunmap(virt); 578 out_release_firmware: 579 release_firmware(fw); 580 581 return ret; 582 } 583 584 static const struct of_device_id ipa_match[] = { 585 { 586 .compatible = "qcom,msm8998-ipa", 587 .data = &ipa_data_v3_1, 588 }, 589 { 590 .compatible = "qcom,sdm845-ipa", 591 .data = &ipa_data_v3_5_1, 592 }, 593 { 594 .compatible = "qcom,sc7180-ipa", 595 .data = &ipa_data_v4_2, 596 }, 597 { 598 .compatible = "qcom,sdx55-ipa", 599 .data = &ipa_data_v4_5, 600 }, 601 { 602 .compatible = "qcom,sm8350-ipa", 603 .data = &ipa_data_v4_9, 604 }, 605 { 606 .compatible = "qcom,sc7280-ipa", 607 .data = &ipa_data_v4_11, 608 }, 609 { }, 610 }; 611 MODULE_DEVICE_TABLE(of, ipa_match); 612 613 /* Check things that can be validated at build time. This just 614 * groups these things BUILD_BUG_ON() calls don't clutter the rest 615 * of the code. 616 * */ 617 static void ipa_validate_build(void) 618 { 619 /* At one time we assumed a 64-bit build, allowing some do_div() 620 * calls to be replaced by simple division or modulo operations. 621 * We currently only perform divide and modulo operations on u32, 622 * u16, or size_t objects, and of those only size_t has any chance 623 * of being a 64-bit value. (It should be guaranteed 32 bits wide 624 * on a 32-bit build, but there is no harm in verifying that.) 625 */ 626 BUILD_BUG_ON(!IS_ENABLED(CONFIG_64BIT) && sizeof(size_t) != 4); 627 628 /* Code assumes the EE ID for the AP is 0 (zeroed structure field) */ 629 BUILD_BUG_ON(GSI_EE_AP != 0); 630 631 /* There's no point if we have no channels or event rings */ 632 BUILD_BUG_ON(!GSI_CHANNEL_COUNT_MAX); 633 BUILD_BUG_ON(!GSI_EVT_RING_COUNT_MAX); 634 635 /* GSI hardware design limits */ 636 BUILD_BUG_ON(GSI_CHANNEL_COUNT_MAX > 32); 637 BUILD_BUG_ON(GSI_EVT_RING_COUNT_MAX > 31); 638 639 /* The number of TREs in a transaction is limited by the channel's 640 * TLV FIFO size. A transaction structure uses 8-bit fields 641 * to represents the number of TREs it has allocated and used. 642 */ 643 BUILD_BUG_ON(GSI_TLV_MAX > U8_MAX); 644 645 /* This is used as a divisor */ 646 BUILD_BUG_ON(!IPA_AGGR_GRANULARITY); 647 648 /* Aggregation granularity value can't be 0, and must fit */ 649 BUILD_BUG_ON(!ipa_aggr_granularity_val(IPA_AGGR_GRANULARITY)); 650 BUILD_BUG_ON(ipa_aggr_granularity_val(IPA_AGGR_GRANULARITY) > 651 field_max(AGGR_GRANULARITY_FMASK)); 652 } 653 654 static bool ipa_version_valid(enum ipa_version version) 655 { 656 switch (version) { 657 case IPA_VERSION_3_0: 658 case IPA_VERSION_3_1: 659 case IPA_VERSION_3_5: 660 case IPA_VERSION_3_5_1: 661 case IPA_VERSION_4_0: 662 case IPA_VERSION_4_1: 663 case IPA_VERSION_4_2: 664 case IPA_VERSION_4_5: 665 case IPA_VERSION_4_7: 666 case IPA_VERSION_4_9: 667 case IPA_VERSION_4_11: 668 return true; 669 670 default: 671 return false; 672 } 673 } 674 675 /** 676 * ipa_probe() - IPA platform driver probe function 677 * @pdev: Platform device pointer 678 * 679 * Return: 0 if successful, or a negative error code (possibly 680 * EPROBE_DEFER) 681 * 682 * This is the main entry point for the IPA driver. Initialization proceeds 683 * in several stages: 684 * - The "init" stage involves activities that can be initialized without 685 * access to the IPA hardware. 686 * - The "config" stage requires the IPA clock to be active so IPA registers 687 * can be accessed, but does not require the use of IPA immediate commands. 688 * - The "setup" stage uses IPA immediate commands, and so requires the GSI 689 * layer to be initialized. 690 * 691 * A Boolean Device Tree "modem-init" property determines whether GSI 692 * initialization will be performed by the AP (Trust Zone) or the modem. 693 * If the AP does GSI initialization, the setup phase is entered after 694 * this has completed successfully. Otherwise the modem initializes 695 * the GSI layer and signals it has finished by sending an SMP2P interrupt 696 * to the AP; this triggers the start if IPA setup. 697 */ 698 static int ipa_probe(struct platform_device *pdev) 699 { 700 struct device *dev = &pdev->dev; 701 const struct ipa_data *data; 702 struct ipa_clock *clock; 703 bool modem_init; 704 struct ipa *ipa; 705 int ret; 706 707 ipa_validate_build(); 708 709 /* Get configuration data early; needed for clock initialization */ 710 data = of_device_get_match_data(dev); 711 if (!data) { 712 dev_err(dev, "matched hardware not supported\n"); 713 return -ENODEV; 714 } 715 716 if (!ipa_version_valid(data->version)) { 717 dev_err(dev, "invalid IPA version\n"); 718 return -EINVAL; 719 } 720 721 /* If we need Trust Zone, make sure it's available */ 722 modem_init = of_property_read_bool(dev->of_node, "modem-init"); 723 if (!modem_init) 724 if (!qcom_scm_is_available()) 725 return -EPROBE_DEFER; 726 727 /* The clock and interconnects might not be ready when we're 728 * probed, so might return -EPROBE_DEFER. 729 */ 730 clock = ipa_clock_init(dev, data->clock_data); 731 if (IS_ERR(clock)) 732 return PTR_ERR(clock); 733 734 /* No more EPROBE_DEFER. Allocate and initialize the IPA structure */ 735 ipa = kzalloc(sizeof(*ipa), GFP_KERNEL); 736 if (!ipa) { 737 ret = -ENOMEM; 738 goto err_clock_exit; 739 } 740 741 ipa->pdev = pdev; 742 dev_set_drvdata(dev, ipa); 743 ipa->clock = clock; 744 ipa->version = data->version; 745 init_completion(&ipa->completion); 746 747 ret = ipa_reg_init(ipa); 748 if (ret) 749 goto err_kfree_ipa; 750 751 ret = ipa_mem_init(ipa, data->mem_data); 752 if (ret) 753 goto err_reg_exit; 754 755 ret = gsi_init(&ipa->gsi, pdev, ipa->version, data->endpoint_count, 756 data->endpoint_data); 757 if (ret) 758 goto err_mem_exit; 759 760 /* Result is a non-zero mask of endpoints that support filtering */ 761 ipa->filter_map = ipa_endpoint_init(ipa, data->endpoint_count, 762 data->endpoint_data); 763 if (!ipa->filter_map) { 764 ret = -EINVAL; 765 goto err_gsi_exit; 766 } 767 768 ret = ipa_table_init(ipa); 769 if (ret) 770 goto err_endpoint_exit; 771 772 ret = ipa_modem_init(ipa, modem_init); 773 if (ret) 774 goto err_table_exit; 775 776 /* The clock needs to be active for config and setup */ 777 ipa_clock_get(ipa); 778 779 ret = ipa_config(ipa, data); 780 if (ret) 781 goto err_clock_put; /* Error */ 782 783 dev_info(dev, "IPA driver initialized"); 784 785 /* If the modem is doing early initialization, it will trigger a 786 * call to ipa_setup() call when it has finished. In that case 787 * we're done here. 788 */ 789 if (modem_init) 790 goto out_clock_put; /* Done; no error */ 791 792 /* Otherwise we need to load the firmware and have Trust Zone validate 793 * and install it. If that succeeds we can proceed with setup. 794 */ 795 ret = ipa_firmware_load(dev); 796 if (ret) 797 goto err_deconfig; 798 799 ret = ipa_setup(ipa); 800 if (ret) 801 goto err_deconfig; 802 803 out_clock_put: 804 ipa_clock_put(ipa); 805 806 return 0; 807 808 err_deconfig: 809 ipa_deconfig(ipa); 810 err_clock_put: 811 ipa_clock_put(ipa); 812 ipa_modem_exit(ipa); 813 err_table_exit: 814 ipa_table_exit(ipa); 815 err_endpoint_exit: 816 ipa_endpoint_exit(ipa); 817 err_gsi_exit: 818 gsi_exit(&ipa->gsi); 819 err_mem_exit: 820 ipa_mem_exit(ipa); 821 err_reg_exit: 822 ipa_reg_exit(ipa); 823 err_kfree_ipa: 824 kfree(ipa); 825 err_clock_exit: 826 ipa_clock_exit(clock); 827 828 return ret; 829 } 830 831 static int ipa_remove(struct platform_device *pdev) 832 { 833 struct ipa *ipa = dev_get_drvdata(&pdev->dev); 834 struct ipa_clock *clock = ipa->clock; 835 int ret; 836 837 ipa_clock_get(ipa); 838 839 if (ipa->setup_complete) { 840 ret = ipa_modem_stop(ipa); 841 /* If starting or stopping is in progress, try once more */ 842 if (ret == -EBUSY) { 843 usleep_range(USEC_PER_MSEC, 2 * USEC_PER_MSEC); 844 ret = ipa_modem_stop(ipa); 845 } 846 if (ret) 847 return ret; 848 849 ipa_teardown(ipa); 850 } 851 852 ipa_deconfig(ipa); 853 854 ipa_clock_put(ipa); 855 856 ipa_modem_exit(ipa); 857 ipa_table_exit(ipa); 858 ipa_endpoint_exit(ipa); 859 gsi_exit(&ipa->gsi); 860 ipa_mem_exit(ipa); 861 ipa_reg_exit(ipa); 862 kfree(ipa); 863 ipa_clock_exit(clock); 864 865 return 0; 866 } 867 868 static void ipa_shutdown(struct platform_device *pdev) 869 { 870 int ret; 871 872 ret = ipa_remove(pdev); 873 if (ret) 874 dev_err(&pdev->dev, "shutdown: remove returned %d\n", ret); 875 } 876 877 /** 878 * ipa_suspend() - Power management system suspend callback 879 * @dev: IPA device structure 880 * 881 * Return: Always returns zero 882 * 883 * Called by the PM framework when a system suspend operation is invoked. 884 * Suspends endpoints and releases the clock reference held to keep 885 * the IPA clock running until this point. 886 */ 887 static int ipa_suspend(struct device *dev) 888 { 889 struct ipa *ipa = dev_get_drvdata(dev); 890 891 /* Endpoints aren't usable until setup is complete */ 892 if (ipa->setup_complete) { 893 __clear_bit(IPA_FLAG_RESUMED, ipa->flags); 894 ipa_endpoint_suspend(ipa); 895 } 896 897 ipa_clock_put(ipa); 898 899 return 0; 900 } 901 902 /** 903 * ipa_resume() - Power management system resume callback 904 * @dev: IPA device structure 905 * 906 * Return: Always returns 0 907 * 908 * Called by the PM framework when a system resume operation is invoked. 909 * Takes an IPA clock reference to keep the clock running until suspend, 910 * and resumes endpoints. 911 */ 912 static int ipa_resume(struct device *dev) 913 { 914 struct ipa *ipa = dev_get_drvdata(dev); 915 916 /* This clock reference will keep the IPA out of suspend 917 * until we get a power management suspend request. 918 */ 919 ipa_clock_get(ipa); 920 921 /* Endpoints aren't usable until setup is complete */ 922 if (ipa->setup_complete) 923 ipa_endpoint_resume(ipa); 924 925 return 0; 926 } 927 928 static const struct dev_pm_ops ipa_pm_ops = { 929 .suspend = ipa_suspend, 930 .resume = ipa_resume, 931 }; 932 933 static const struct attribute_group *ipa_attribute_groups[] = { 934 &ipa_attribute_group, 935 &ipa_feature_attribute_group, 936 &ipa_modem_attribute_group, 937 NULL, 938 }; 939 940 static struct platform_driver ipa_driver = { 941 .probe = ipa_probe, 942 .remove = ipa_remove, 943 .shutdown = ipa_shutdown, 944 .driver = { 945 .name = "ipa", 946 .pm = &ipa_pm_ops, 947 .of_match_table = ipa_match, 948 .dev_groups = ipa_attribute_groups, 949 }, 950 }; 951 952 module_platform_driver(ipa_driver); 953 954 MODULE_LICENSE("GPL v2"); 955 MODULE_DESCRIPTION("Qualcomm IP Accelerator device driver"); 956