1 // SPDX-License-Identifier: GPL-2.0 2 3 /* Copyright (c) 2012-2018, The Linux Foundation. All rights reserved. 4 * Copyright (C) 2018-2021 Linaro Ltd. 5 */ 6 7 #include <linux/types.h> 8 #include <linux/atomic.h> 9 #include <linux/bitfield.h> 10 #include <linux/device.h> 11 #include <linux/bug.h> 12 #include <linux/io.h> 13 #include <linux/firmware.h> 14 #include <linux/module.h> 15 #include <linux/of.h> 16 #include <linux/of_device.h> 17 #include <linux/of_address.h> 18 #include <linux/qcom_scm.h> 19 #include <linux/soc/qcom/mdt_loader.h> 20 21 #include "ipa.h" 22 #include "ipa_clock.h" 23 #include "ipa_data.h" 24 #include "ipa_endpoint.h" 25 #include "ipa_resource.h" 26 #include "ipa_cmd.h" 27 #include "ipa_reg.h" 28 #include "ipa_mem.h" 29 #include "ipa_table.h" 30 #include "ipa_modem.h" 31 #include "ipa_uc.h" 32 #include "ipa_interrupt.h" 33 #include "gsi_trans.h" 34 #include "ipa_sysfs.h" 35 36 /** 37 * DOC: The IP Accelerator 38 * 39 * This driver supports the Qualcomm IP Accelerator (IPA), which is a 40 * networking component found in many Qualcomm SoCs. The IPA is connected 41 * to the application processor (AP), but is also connected (and partially 42 * controlled by) other "execution environments" (EEs), such as a modem. 43 * 44 * The IPA is the conduit between the AP and the modem that carries network 45 * traffic. This driver presents a network interface representing the 46 * connection of the modem to external (e.g. LTE) networks. 47 * 48 * The IPA provides protocol checksum calculation, offloading this work 49 * from the AP. The IPA offers additional functionality, including routing, 50 * filtering, and NAT support, but that more advanced functionality is not 51 * currently supported. Despite that, some resources--including routing 52 * tables and filter tables--are defined in this driver because they must 53 * be initialized even when the advanced hardware features are not used. 54 * 55 * There are two distinct layers that implement the IPA hardware, and this 56 * is reflected in the organization of the driver. The generic software 57 * interface (GSI) is an integral component of the IPA, providing a 58 * well-defined communication layer between the AP subsystem and the IPA 59 * core. The GSI implements a set of "channels" used for communication 60 * between the AP and the IPA. 61 * 62 * The IPA layer uses GSI channels to implement its "endpoints". And while 63 * a GSI channel carries data between the AP and the IPA, a pair of IPA 64 * endpoints is used to carry traffic between two EEs. Specifically, the main 65 * modem network interface is implemented by two pairs of endpoints: a TX 66 * endpoint on the AP coupled with an RX endpoint on the modem; and another 67 * RX endpoint on the AP receiving data from a TX endpoint on the modem. 68 */ 69 70 /* The name of the GSI firmware file relative to /lib/firmware */ 71 #define IPA_FW_PATH_DEFAULT "ipa_fws.mdt" 72 #define IPA_PAS_ID 15 73 74 /* Shift of 19.2 MHz timestamp to achieve lower resolution timestamps */ 75 #define DPL_TIMESTAMP_SHIFT 14 /* ~1.172 kHz, ~853 usec per tick */ 76 #define TAG_TIMESTAMP_SHIFT 14 77 #define NAT_TIMESTAMP_SHIFT 24 /* ~1.144 Hz, ~874 msec per tick */ 78 79 /* Divider for 19.2 MHz crystal oscillator clock to get common timer clock */ 80 #define IPA_XO_CLOCK_DIVIDER 192 /* 1 is subtracted where used */ 81 82 /** 83 * ipa_setup() - Set up IPA hardware 84 * @ipa: IPA pointer 85 * 86 * Perform initialization that requires issuing immediate commands on 87 * the command TX endpoint. If the modem is doing GSI firmware load 88 * and initialization, this function will be called when an SMP2P 89 * interrupt has been signaled by the modem. Otherwise it will be 90 * called from ipa_probe() after GSI firmware has been successfully 91 * loaded, authenticated, and started by Trust Zone. 92 */ 93 int ipa_setup(struct ipa *ipa) 94 { 95 struct ipa_endpoint *exception_endpoint; 96 struct ipa_endpoint *command_endpoint; 97 struct device *dev = &ipa->pdev->dev; 98 int ret; 99 100 ret = gsi_setup(&ipa->gsi); 101 if (ret) 102 return ret; 103 104 ret = ipa_power_setup(ipa); 105 if (ret) 106 goto err_gsi_teardown; 107 108 ipa_endpoint_setup(ipa); 109 110 /* We need to use the AP command TX endpoint to perform other 111 * initialization, so we enable first. 112 */ 113 command_endpoint = ipa->name_map[IPA_ENDPOINT_AP_COMMAND_TX]; 114 ret = ipa_endpoint_enable_one(command_endpoint); 115 if (ret) 116 goto err_endpoint_teardown; 117 118 ret = ipa_mem_setup(ipa); /* No matching teardown required */ 119 if (ret) 120 goto err_command_disable; 121 122 ret = ipa_table_setup(ipa); /* No matching teardown required */ 123 if (ret) 124 goto err_command_disable; 125 126 /* Enable the exception handling endpoint, and tell the hardware 127 * to use it by default. 128 */ 129 exception_endpoint = ipa->name_map[IPA_ENDPOINT_AP_LAN_RX]; 130 ret = ipa_endpoint_enable_one(exception_endpoint); 131 if (ret) 132 goto err_command_disable; 133 134 ipa_endpoint_default_route_set(ipa, exception_endpoint->endpoint_id); 135 136 /* We're all set. Now prepare for communication with the modem */ 137 ret = ipa_qmi_setup(ipa); 138 if (ret) 139 goto err_default_route_clear; 140 141 ipa->setup_complete = true; 142 143 dev_info(dev, "IPA driver setup completed successfully\n"); 144 145 return 0; 146 147 err_default_route_clear: 148 ipa_endpoint_default_route_clear(ipa); 149 ipa_endpoint_disable_one(exception_endpoint); 150 err_command_disable: 151 ipa_endpoint_disable_one(command_endpoint); 152 err_endpoint_teardown: 153 ipa_endpoint_teardown(ipa); 154 ipa_power_teardown(ipa); 155 err_gsi_teardown: 156 gsi_teardown(&ipa->gsi); 157 158 return ret; 159 } 160 161 /** 162 * ipa_teardown() - Inverse of ipa_setup() 163 * @ipa: IPA pointer 164 */ 165 static void ipa_teardown(struct ipa *ipa) 166 { 167 struct ipa_endpoint *exception_endpoint; 168 struct ipa_endpoint *command_endpoint; 169 170 /* We're going to tear everything down, as if setup never completed */ 171 ipa->setup_complete = false; 172 173 ipa_qmi_teardown(ipa); 174 ipa_endpoint_default_route_clear(ipa); 175 exception_endpoint = ipa->name_map[IPA_ENDPOINT_AP_LAN_RX]; 176 ipa_endpoint_disable_one(exception_endpoint); 177 command_endpoint = ipa->name_map[IPA_ENDPOINT_AP_COMMAND_TX]; 178 ipa_endpoint_disable_one(command_endpoint); 179 ipa_endpoint_teardown(ipa); 180 ipa_power_teardown(ipa); 181 gsi_teardown(&ipa->gsi); 182 } 183 184 /* Configure bus access behavior for IPA components */ 185 static void ipa_hardware_config_comp(struct ipa *ipa) 186 { 187 u32 val; 188 189 /* Nothing to configure prior to IPA v4.0 */ 190 if (ipa->version < IPA_VERSION_4_0) 191 return; 192 193 val = ioread32(ipa->reg_virt + IPA_REG_COMP_CFG_OFFSET); 194 195 if (ipa->version == IPA_VERSION_4_0) { 196 val &= ~IPA_QMB_SELECT_CONS_EN_FMASK; 197 val &= ~IPA_QMB_SELECT_PROD_EN_FMASK; 198 val &= ~IPA_QMB_SELECT_GLOBAL_EN_FMASK; 199 } else if (ipa->version < IPA_VERSION_4_5) { 200 val |= GSI_MULTI_AXI_MASTERS_DIS_FMASK; 201 } else { 202 /* For IPA v4.5 IPA_FULL_FLUSH_WAIT_RSC_CLOSE_EN is 0 */ 203 } 204 205 val |= GSI_MULTI_INORDER_RD_DIS_FMASK; 206 val |= GSI_MULTI_INORDER_WR_DIS_FMASK; 207 208 iowrite32(val, ipa->reg_virt + IPA_REG_COMP_CFG_OFFSET); 209 } 210 211 /* Configure DDR and (possibly) PCIe max read/write QSB values */ 212 static void 213 ipa_hardware_config_qsb(struct ipa *ipa, const struct ipa_data *data) 214 { 215 const struct ipa_qsb_data *data0; 216 const struct ipa_qsb_data *data1; 217 u32 val; 218 219 /* QMB 0 represents DDR; QMB 1 (if present) represents PCIe */ 220 data0 = &data->qsb_data[IPA_QSB_MASTER_DDR]; 221 if (data->qsb_count > 1) 222 data1 = &data->qsb_data[IPA_QSB_MASTER_PCIE]; 223 224 /* Max outstanding write accesses for QSB masters */ 225 val = u32_encode_bits(data0->max_writes, GEN_QMB_0_MAX_WRITES_FMASK); 226 if (data->qsb_count > 1) 227 val |= u32_encode_bits(data1->max_writes, 228 GEN_QMB_1_MAX_WRITES_FMASK); 229 iowrite32(val, ipa->reg_virt + IPA_REG_QSB_MAX_WRITES_OFFSET); 230 231 /* Max outstanding read accesses for QSB masters */ 232 val = u32_encode_bits(data0->max_reads, GEN_QMB_0_MAX_READS_FMASK); 233 if (ipa->version >= IPA_VERSION_4_0) 234 val |= u32_encode_bits(data0->max_reads_beats, 235 GEN_QMB_0_MAX_READS_BEATS_FMASK); 236 if (data->qsb_count > 1) { 237 val |= u32_encode_bits(data1->max_reads, 238 GEN_QMB_1_MAX_READS_FMASK); 239 if (ipa->version >= IPA_VERSION_4_0) 240 val |= u32_encode_bits(data1->max_reads_beats, 241 GEN_QMB_1_MAX_READS_BEATS_FMASK); 242 } 243 iowrite32(val, ipa->reg_virt + IPA_REG_QSB_MAX_READS_OFFSET); 244 } 245 246 /* The internal inactivity timer clock is used for the aggregation timer */ 247 #define TIMER_FREQUENCY 32000 /* 32 KHz inactivity timer clock */ 248 249 /* Compute the value to use in the COUNTER_CFG register AGGR_GRANULARITY 250 * field to represent the given number of microseconds. The value is one 251 * less than the number of timer ticks in the requested period. 0 is not 252 * a valid granularity value (so for example @usec must be at least 16 for 253 * a TIMER_FREQUENCY of 32000). 254 */ 255 static __always_inline u32 ipa_aggr_granularity_val(u32 usec) 256 { 257 return DIV_ROUND_CLOSEST(usec * TIMER_FREQUENCY, USEC_PER_SEC) - 1; 258 } 259 260 /* IPA uses unified Qtime starting at IPA v4.5, implementing various 261 * timestamps and timers independent of the IPA core clock rate. The 262 * Qtimer is based on a 56-bit timestamp incremented at each tick of 263 * a 19.2 MHz SoC crystal oscillator (XO clock). 264 * 265 * For IPA timestamps (tag, NAT, data path logging) a lower resolution 266 * timestamp is achieved by shifting the Qtimer timestamp value right 267 * some number of bits to produce the low-order bits of the coarser 268 * granularity timestamp. 269 * 270 * For timers, a common timer clock is derived from the XO clock using 271 * a divider (we use 192, to produce a 100kHz timer clock). From 272 * this common clock, three "pulse generators" are used to produce 273 * timer ticks at a configurable frequency. IPA timers (such as 274 * those used for aggregation or head-of-line block handling) now 275 * define their period based on one of these pulse generators. 276 */ 277 static void ipa_qtime_config(struct ipa *ipa) 278 { 279 u32 val; 280 281 /* Timer clock divider must be disabled when we change the rate */ 282 iowrite32(0, ipa->reg_virt + IPA_REG_TIMERS_XO_CLK_DIV_CFG_OFFSET); 283 284 /* Set DPL time stamp resolution to use Qtime (instead of 1 msec) */ 285 val = u32_encode_bits(DPL_TIMESTAMP_SHIFT, DPL_TIMESTAMP_LSB_FMASK); 286 val |= u32_encode_bits(1, DPL_TIMESTAMP_SEL_FMASK); 287 /* Configure tag and NAT Qtime timestamp resolution as well */ 288 val |= u32_encode_bits(TAG_TIMESTAMP_SHIFT, TAG_TIMESTAMP_LSB_FMASK); 289 val |= u32_encode_bits(NAT_TIMESTAMP_SHIFT, NAT_TIMESTAMP_LSB_FMASK); 290 iowrite32(val, ipa->reg_virt + IPA_REG_QTIME_TIMESTAMP_CFG_OFFSET); 291 292 /* Set granularity of pulse generators used for other timers */ 293 val = u32_encode_bits(IPA_GRAN_100_US, GRAN_0_FMASK); 294 val |= u32_encode_bits(IPA_GRAN_1_MS, GRAN_1_FMASK); 295 val |= u32_encode_bits(IPA_GRAN_1_MS, GRAN_2_FMASK); 296 iowrite32(val, ipa->reg_virt + IPA_REG_TIMERS_PULSE_GRAN_CFG_OFFSET); 297 298 /* Actual divider is 1 more than value supplied here */ 299 val = u32_encode_bits(IPA_XO_CLOCK_DIVIDER - 1, DIV_VALUE_FMASK); 300 iowrite32(val, ipa->reg_virt + IPA_REG_TIMERS_XO_CLK_DIV_CFG_OFFSET); 301 302 /* Divider value is set; re-enable the common timer clock divider */ 303 val |= u32_encode_bits(1, DIV_ENABLE_FMASK); 304 iowrite32(val, ipa->reg_virt + IPA_REG_TIMERS_XO_CLK_DIV_CFG_OFFSET); 305 } 306 307 static void ipa_idle_indication_cfg(struct ipa *ipa, 308 u32 enter_idle_debounce_thresh, 309 bool const_non_idle_enable) 310 { 311 u32 offset; 312 u32 val; 313 314 val = u32_encode_bits(enter_idle_debounce_thresh, 315 ENTER_IDLE_DEBOUNCE_THRESH_FMASK); 316 if (const_non_idle_enable) 317 val |= CONST_NON_IDLE_ENABLE_FMASK; 318 319 offset = ipa_reg_idle_indication_cfg_offset(ipa->version); 320 iowrite32(val, ipa->reg_virt + offset); 321 } 322 323 /** 324 * ipa_hardware_dcd_config() - Enable dynamic clock division on IPA 325 * @ipa: IPA pointer 326 * 327 * Configures when the IPA signals it is idle to the global clock 328 * controller, which can respond by scalling down the clock to 329 * save power. 330 */ 331 static void ipa_hardware_dcd_config(struct ipa *ipa) 332 { 333 /* Recommended values for IPA 3.5 and later according to IPA HPG */ 334 ipa_idle_indication_cfg(ipa, 256, false); 335 } 336 337 static void ipa_hardware_dcd_deconfig(struct ipa *ipa) 338 { 339 /* Power-on reset values */ 340 ipa_idle_indication_cfg(ipa, 0, true); 341 } 342 343 /** 344 * ipa_hardware_config() - Primitive hardware initialization 345 * @ipa: IPA pointer 346 * @data: IPA configuration data 347 */ 348 static void ipa_hardware_config(struct ipa *ipa, const struct ipa_data *data) 349 { 350 enum ipa_version version = ipa->version; 351 u32 granularity; 352 u32 val; 353 354 /* IPA v4.5+ has no backward compatibility register */ 355 if (version < IPA_VERSION_4_5) { 356 val = data->backward_compat; 357 iowrite32(val, ipa->reg_virt + IPA_REG_BCR_OFFSET); 358 } 359 360 /* Implement some hardware workarounds */ 361 if (version >= IPA_VERSION_4_0 && version < IPA_VERSION_4_5) { 362 /* Disable PA mask to allow HOLB drop */ 363 val = ioread32(ipa->reg_virt + IPA_REG_TX_CFG_OFFSET); 364 val &= ~PA_MASK_EN_FMASK; 365 iowrite32(val, ipa->reg_virt + IPA_REG_TX_CFG_OFFSET); 366 367 /* Enable open global clocks in the CLKON configuration */ 368 val = GLOBAL_FMASK | GLOBAL_2X_CLK_FMASK; 369 } else if (version == IPA_VERSION_3_1) { 370 val = MISC_FMASK; /* Disable MISC clock gating */ 371 } else { 372 val = 0; /* No CLKON configuration needed */ 373 } 374 if (val) 375 iowrite32(val, ipa->reg_virt + IPA_REG_CLKON_CFG_OFFSET); 376 377 ipa_hardware_config_comp(ipa); 378 379 /* Configure system bus limits */ 380 ipa_hardware_config_qsb(ipa, data); 381 382 if (version < IPA_VERSION_4_5) { 383 /* Configure aggregation timer granularity */ 384 granularity = ipa_aggr_granularity_val(IPA_AGGR_GRANULARITY); 385 val = u32_encode_bits(granularity, AGGR_GRANULARITY_FMASK); 386 iowrite32(val, ipa->reg_virt + IPA_REG_COUNTER_CFG_OFFSET); 387 } else { 388 ipa_qtime_config(ipa); 389 } 390 391 /* IPA v4.2 does not support hashed tables, so disable them */ 392 if (version == IPA_VERSION_4_2) { 393 u32 offset = ipa_reg_filt_rout_hash_en_offset(version); 394 395 iowrite32(0, ipa->reg_virt + offset); 396 } 397 398 /* Enable dynamic clock division */ 399 ipa_hardware_dcd_config(ipa); 400 } 401 402 /** 403 * ipa_hardware_deconfig() - Inverse of ipa_hardware_config() 404 * @ipa: IPA pointer 405 * 406 * This restores the power-on reset values (even if they aren't different) 407 */ 408 static void ipa_hardware_deconfig(struct ipa *ipa) 409 { 410 /* Mostly we just leave things as we set them. */ 411 ipa_hardware_dcd_deconfig(ipa); 412 } 413 414 /** 415 * ipa_config() - Configure IPA hardware 416 * @ipa: IPA pointer 417 * @data: IPA configuration data 418 * 419 * Perform initialization requiring IPA clock to be enabled. 420 */ 421 static int ipa_config(struct ipa *ipa, const struct ipa_data *data) 422 { 423 int ret; 424 425 ipa_hardware_config(ipa, data); 426 427 ret = ipa_mem_config(ipa); 428 if (ret) 429 goto err_hardware_deconfig; 430 431 ipa->interrupt = ipa_interrupt_config(ipa); 432 if (IS_ERR(ipa->interrupt)) { 433 ret = PTR_ERR(ipa->interrupt); 434 ipa->interrupt = NULL; 435 goto err_mem_deconfig; 436 } 437 438 ipa_uc_config(ipa); 439 440 ret = ipa_endpoint_config(ipa); 441 if (ret) 442 goto err_uc_deconfig; 443 444 ipa_table_config(ipa); /* No deconfig required */ 445 446 /* Assign resource limitation to each group; no deconfig required */ 447 ret = ipa_resource_config(ipa, data->resource_data); 448 if (ret) 449 goto err_endpoint_deconfig; 450 451 ret = ipa_modem_config(ipa); 452 if (ret) 453 goto err_endpoint_deconfig; 454 455 return 0; 456 457 err_endpoint_deconfig: 458 ipa_endpoint_deconfig(ipa); 459 err_uc_deconfig: 460 ipa_uc_deconfig(ipa); 461 ipa_interrupt_deconfig(ipa->interrupt); 462 ipa->interrupt = NULL; 463 err_mem_deconfig: 464 ipa_mem_deconfig(ipa); 465 err_hardware_deconfig: 466 ipa_hardware_deconfig(ipa); 467 468 return ret; 469 } 470 471 /** 472 * ipa_deconfig() - Inverse of ipa_config() 473 * @ipa: IPA pointer 474 */ 475 static void ipa_deconfig(struct ipa *ipa) 476 { 477 ipa_modem_deconfig(ipa); 478 ipa_endpoint_deconfig(ipa); 479 ipa_uc_deconfig(ipa); 480 ipa_interrupt_deconfig(ipa->interrupt); 481 ipa->interrupt = NULL; 482 ipa_mem_deconfig(ipa); 483 ipa_hardware_deconfig(ipa); 484 } 485 486 static int ipa_firmware_load(struct device *dev) 487 { 488 const struct firmware *fw; 489 struct device_node *node; 490 struct resource res; 491 phys_addr_t phys; 492 const char *path; 493 ssize_t size; 494 void *virt; 495 int ret; 496 497 node = of_parse_phandle(dev->of_node, "memory-region", 0); 498 if (!node) { 499 dev_err(dev, "DT error getting \"memory-region\" property\n"); 500 return -EINVAL; 501 } 502 503 ret = of_address_to_resource(node, 0, &res); 504 of_node_put(node); 505 if (ret) { 506 dev_err(dev, "error %d getting \"memory-region\" resource\n", 507 ret); 508 return ret; 509 } 510 511 /* Use name from DTB if specified; use default for *any* error */ 512 ret = of_property_read_string(dev->of_node, "firmware-name", &path); 513 if (ret) { 514 dev_dbg(dev, "error %d getting \"firmware-name\" resource\n", 515 ret); 516 path = IPA_FW_PATH_DEFAULT; 517 } 518 519 ret = request_firmware(&fw, path, dev); 520 if (ret) { 521 dev_err(dev, "error %d requesting \"%s\"\n", ret, path); 522 return ret; 523 } 524 525 phys = res.start; 526 size = (size_t)resource_size(&res); 527 virt = memremap(phys, size, MEMREMAP_WC); 528 if (!virt) { 529 dev_err(dev, "unable to remap firmware memory\n"); 530 ret = -ENOMEM; 531 goto out_release_firmware; 532 } 533 534 ret = qcom_mdt_load(dev, fw, path, IPA_PAS_ID, virt, phys, size, NULL); 535 if (ret) 536 dev_err(dev, "error %d loading \"%s\"\n", ret, path); 537 else if ((ret = qcom_scm_pas_auth_and_reset(IPA_PAS_ID))) 538 dev_err(dev, "error %d authenticating \"%s\"\n", ret, path); 539 540 memunmap(virt); 541 out_release_firmware: 542 release_firmware(fw); 543 544 return ret; 545 } 546 547 static const struct of_device_id ipa_match[] = { 548 { 549 .compatible = "qcom,msm8998-ipa", 550 .data = &ipa_data_v3_1, 551 }, 552 { 553 .compatible = "qcom,sdm845-ipa", 554 .data = &ipa_data_v3_5_1, 555 }, 556 { 557 .compatible = "qcom,sc7180-ipa", 558 .data = &ipa_data_v4_2, 559 }, 560 { 561 .compatible = "qcom,sdx55-ipa", 562 .data = &ipa_data_v4_5, 563 }, 564 { 565 .compatible = "qcom,sm8350-ipa", 566 .data = &ipa_data_v4_9, 567 }, 568 { 569 .compatible = "qcom,sc7280-ipa", 570 .data = &ipa_data_v4_11, 571 }, 572 { }, 573 }; 574 MODULE_DEVICE_TABLE(of, ipa_match); 575 576 /* Check things that can be validated at build time. This just 577 * groups these things BUILD_BUG_ON() calls don't clutter the rest 578 * of the code. 579 * */ 580 static void ipa_validate_build(void) 581 { 582 /* At one time we assumed a 64-bit build, allowing some do_div() 583 * calls to be replaced by simple division or modulo operations. 584 * We currently only perform divide and modulo operations on u32, 585 * u16, or size_t objects, and of those only size_t has any chance 586 * of being a 64-bit value. (It should be guaranteed 32 bits wide 587 * on a 32-bit build, but there is no harm in verifying that.) 588 */ 589 BUILD_BUG_ON(!IS_ENABLED(CONFIG_64BIT) && sizeof(size_t) != 4); 590 591 /* Code assumes the EE ID for the AP is 0 (zeroed structure field) */ 592 BUILD_BUG_ON(GSI_EE_AP != 0); 593 594 /* There's no point if we have no channels or event rings */ 595 BUILD_BUG_ON(!GSI_CHANNEL_COUNT_MAX); 596 BUILD_BUG_ON(!GSI_EVT_RING_COUNT_MAX); 597 598 /* GSI hardware design limits */ 599 BUILD_BUG_ON(GSI_CHANNEL_COUNT_MAX > 32); 600 BUILD_BUG_ON(GSI_EVT_RING_COUNT_MAX > 31); 601 602 /* The number of TREs in a transaction is limited by the channel's 603 * TLV FIFO size. A transaction structure uses 8-bit fields 604 * to represents the number of TREs it has allocated and used. 605 */ 606 BUILD_BUG_ON(GSI_TLV_MAX > U8_MAX); 607 608 /* This is used as a divisor */ 609 BUILD_BUG_ON(!IPA_AGGR_GRANULARITY); 610 611 /* Aggregation granularity value can't be 0, and must fit */ 612 BUILD_BUG_ON(!ipa_aggr_granularity_val(IPA_AGGR_GRANULARITY)); 613 BUILD_BUG_ON(ipa_aggr_granularity_val(IPA_AGGR_GRANULARITY) > 614 field_max(AGGR_GRANULARITY_FMASK)); 615 } 616 617 static bool ipa_version_valid(enum ipa_version version) 618 { 619 switch (version) { 620 case IPA_VERSION_3_0: 621 case IPA_VERSION_3_1: 622 case IPA_VERSION_3_5: 623 case IPA_VERSION_3_5_1: 624 case IPA_VERSION_4_0: 625 case IPA_VERSION_4_1: 626 case IPA_VERSION_4_2: 627 case IPA_VERSION_4_5: 628 case IPA_VERSION_4_7: 629 case IPA_VERSION_4_9: 630 case IPA_VERSION_4_11: 631 return true; 632 633 default: 634 return false; 635 } 636 } 637 638 /** 639 * ipa_probe() - IPA platform driver probe function 640 * @pdev: Platform device pointer 641 * 642 * Return: 0 if successful, or a negative error code (possibly 643 * EPROBE_DEFER) 644 * 645 * This is the main entry point for the IPA driver. Initialization proceeds 646 * in several stages: 647 * - The "init" stage involves activities that can be initialized without 648 * access to the IPA hardware. 649 * - The "config" stage requires the IPA clock to be active so IPA registers 650 * can be accessed, but does not require the use of IPA immediate commands. 651 * - The "setup" stage uses IPA immediate commands, and so requires the GSI 652 * layer to be initialized. 653 * 654 * A Boolean Device Tree "modem-init" property determines whether GSI 655 * initialization will be performed by the AP (Trust Zone) or the modem. 656 * If the AP does GSI initialization, the setup phase is entered after 657 * this has completed successfully. Otherwise the modem initializes 658 * the GSI layer and signals it has finished by sending an SMP2P interrupt 659 * to the AP; this triggers the start if IPA setup. 660 */ 661 static int ipa_probe(struct platform_device *pdev) 662 { 663 struct device *dev = &pdev->dev; 664 const struct ipa_data *data; 665 struct ipa_clock *clock; 666 bool modem_init; 667 struct ipa *ipa; 668 int ret; 669 670 ipa_validate_build(); 671 672 /* Get configuration data early; needed for clock initialization */ 673 data = of_device_get_match_data(dev); 674 if (!data) { 675 dev_err(dev, "matched hardware not supported\n"); 676 return -ENODEV; 677 } 678 679 if (!ipa_version_valid(data->version)) { 680 dev_err(dev, "invalid IPA version\n"); 681 return -EINVAL; 682 } 683 684 /* If we need Trust Zone, make sure it's available */ 685 modem_init = of_property_read_bool(dev->of_node, "modem-init"); 686 if (!modem_init) 687 if (!qcom_scm_is_available()) 688 return -EPROBE_DEFER; 689 690 /* The clock and interconnects might not be ready when we're 691 * probed, so might return -EPROBE_DEFER. 692 */ 693 clock = ipa_clock_init(dev, data->clock_data); 694 if (IS_ERR(clock)) 695 return PTR_ERR(clock); 696 697 /* No more EPROBE_DEFER. Allocate and initialize the IPA structure */ 698 ipa = kzalloc(sizeof(*ipa), GFP_KERNEL); 699 if (!ipa) { 700 ret = -ENOMEM; 701 goto err_clock_exit; 702 } 703 704 ipa->pdev = pdev; 705 dev_set_drvdata(dev, ipa); 706 ipa->clock = clock; 707 ipa->version = data->version; 708 init_completion(&ipa->completion); 709 710 ret = ipa_reg_init(ipa); 711 if (ret) 712 goto err_kfree_ipa; 713 714 ret = ipa_mem_init(ipa, data->mem_data); 715 if (ret) 716 goto err_reg_exit; 717 718 ret = gsi_init(&ipa->gsi, pdev, ipa->version, data->endpoint_count, 719 data->endpoint_data); 720 if (ret) 721 goto err_mem_exit; 722 723 /* Result is a non-zero mask of endpoints that support filtering */ 724 ipa->filter_map = ipa_endpoint_init(ipa, data->endpoint_count, 725 data->endpoint_data); 726 if (!ipa->filter_map) { 727 ret = -EINVAL; 728 goto err_gsi_exit; 729 } 730 731 ret = ipa_table_init(ipa); 732 if (ret) 733 goto err_endpoint_exit; 734 735 ret = ipa_modem_init(ipa, modem_init); 736 if (ret) 737 goto err_table_exit; 738 739 /* The clock needs to be active for config and setup */ 740 ret = ipa_clock_get(ipa); 741 if (WARN_ON(ret < 0)) 742 goto err_clock_put; 743 744 ret = ipa_config(ipa, data); 745 if (ret) 746 goto err_clock_put; 747 748 dev_info(dev, "IPA driver initialized"); 749 750 /* If the modem is doing early initialization, it will trigger a 751 * call to ipa_setup() when it has finished. In that case we're 752 * done here. 753 */ 754 if (modem_init) 755 goto done; 756 757 /* Otherwise we need to load the firmware and have Trust Zone validate 758 * and install it. If that succeeds we can proceed with setup. 759 */ 760 ret = ipa_firmware_load(dev); 761 if (ret) 762 goto err_deconfig; 763 764 ret = ipa_setup(ipa); 765 if (ret) 766 goto err_deconfig; 767 done: 768 (void)ipa_clock_put(ipa); 769 770 return 0; 771 772 err_deconfig: 773 ipa_deconfig(ipa); 774 err_clock_put: 775 (void)ipa_clock_put(ipa); 776 ipa_modem_exit(ipa); 777 err_table_exit: 778 ipa_table_exit(ipa); 779 err_endpoint_exit: 780 ipa_endpoint_exit(ipa); 781 err_gsi_exit: 782 gsi_exit(&ipa->gsi); 783 err_mem_exit: 784 ipa_mem_exit(ipa); 785 err_reg_exit: 786 ipa_reg_exit(ipa); 787 err_kfree_ipa: 788 kfree(ipa); 789 err_clock_exit: 790 ipa_clock_exit(clock); 791 792 return ret; 793 } 794 795 static int ipa_remove(struct platform_device *pdev) 796 { 797 struct ipa *ipa = dev_get_drvdata(&pdev->dev); 798 struct ipa_clock *clock = ipa->clock; 799 int ret; 800 801 ret = ipa_clock_get(ipa); 802 if (WARN_ON(ret < 0)) 803 goto out_clock_put; 804 805 if (ipa->setup_complete) { 806 ret = ipa_modem_stop(ipa); 807 /* If starting or stopping is in progress, try once more */ 808 if (ret == -EBUSY) { 809 usleep_range(USEC_PER_MSEC, 2 * USEC_PER_MSEC); 810 ret = ipa_modem_stop(ipa); 811 } 812 if (ret) 813 return ret; 814 815 ipa_teardown(ipa); 816 } 817 818 ipa_deconfig(ipa); 819 out_clock_put: 820 (void)ipa_clock_put(ipa); 821 822 ipa_modem_exit(ipa); 823 ipa_table_exit(ipa); 824 ipa_endpoint_exit(ipa); 825 gsi_exit(&ipa->gsi); 826 ipa_mem_exit(ipa); 827 ipa_reg_exit(ipa); 828 kfree(ipa); 829 ipa_clock_exit(clock); 830 831 return 0; 832 } 833 834 static void ipa_shutdown(struct platform_device *pdev) 835 { 836 int ret; 837 838 ret = ipa_remove(pdev); 839 if (ret) 840 dev_err(&pdev->dev, "shutdown: remove returned %d\n", ret); 841 } 842 843 static const struct attribute_group *ipa_attribute_groups[] = { 844 &ipa_attribute_group, 845 &ipa_feature_attribute_group, 846 &ipa_modem_attribute_group, 847 NULL, 848 }; 849 850 static struct platform_driver ipa_driver = { 851 .probe = ipa_probe, 852 .remove = ipa_remove, 853 .shutdown = ipa_shutdown, 854 .driver = { 855 .name = "ipa", 856 .pm = &ipa_pm_ops, 857 .of_match_table = ipa_match, 858 .dev_groups = ipa_attribute_groups, 859 }, 860 }; 861 862 module_platform_driver(ipa_driver); 863 864 MODULE_LICENSE("GPL v2"); 865 MODULE_DESCRIPTION("Qualcomm IP Accelerator device driver"); 866