1 // SPDX-License-Identifier: GPL-2.0 2 3 /* Copyright (c) 2012-2018, The Linux Foundation. All rights reserved. 4 * Copyright (C) 2018-2021 Linaro Ltd. 5 */ 6 7 #include <linux/types.h> 8 #include <linux/atomic.h> 9 #include <linux/bitfield.h> 10 #include <linux/device.h> 11 #include <linux/bug.h> 12 #include <linux/io.h> 13 #include <linux/firmware.h> 14 #include <linux/module.h> 15 #include <linux/of.h> 16 #include <linux/of_device.h> 17 #include <linux/of_address.h> 18 #include <linux/qcom_scm.h> 19 #include <linux/soc/qcom/mdt_loader.h> 20 21 #include "ipa.h" 22 #include "ipa_clock.h" 23 #include "ipa_data.h" 24 #include "ipa_endpoint.h" 25 #include "ipa_resource.h" 26 #include "ipa_cmd.h" 27 #include "ipa_reg.h" 28 #include "ipa_mem.h" 29 #include "ipa_table.h" 30 #include "ipa_modem.h" 31 #include "ipa_uc.h" 32 #include "ipa_interrupt.h" 33 #include "gsi_trans.h" 34 #include "ipa_sysfs.h" 35 36 /** 37 * DOC: The IP Accelerator 38 * 39 * This driver supports the Qualcomm IP Accelerator (IPA), which is a 40 * networking component found in many Qualcomm SoCs. The IPA is connected 41 * to the application processor (AP), but is also connected (and partially 42 * controlled by) other "execution environments" (EEs), such as a modem. 43 * 44 * The IPA is the conduit between the AP and the modem that carries network 45 * traffic. This driver presents a network interface representing the 46 * connection of the modem to external (e.g. LTE) networks. 47 * 48 * The IPA provides protocol checksum calculation, offloading this work 49 * from the AP. The IPA offers additional functionality, including routing, 50 * filtering, and NAT support, but that more advanced functionality is not 51 * currently supported. Despite that, some resources--including routing 52 * tables and filter tables--are defined in this driver because they must 53 * be initialized even when the advanced hardware features are not used. 54 * 55 * There are two distinct layers that implement the IPA hardware, and this 56 * is reflected in the organization of the driver. The generic software 57 * interface (GSI) is an integral component of the IPA, providing a 58 * well-defined communication layer between the AP subsystem and the IPA 59 * core. The GSI implements a set of "channels" used for communication 60 * between the AP and the IPA. 61 * 62 * The IPA layer uses GSI channels to implement its "endpoints". And while 63 * a GSI channel carries data between the AP and the IPA, a pair of IPA 64 * endpoints is used to carry traffic between two EEs. Specifically, the main 65 * modem network interface is implemented by two pairs of endpoints: a TX 66 * endpoint on the AP coupled with an RX endpoint on the modem; and another 67 * RX endpoint on the AP receiving data from a TX endpoint on the modem. 68 */ 69 70 /* The name of the GSI firmware file relative to /lib/firmware */ 71 #define IPA_FW_PATH_DEFAULT "ipa_fws.mdt" 72 #define IPA_PAS_ID 15 73 74 /* Shift of 19.2 MHz timestamp to achieve lower resolution timestamps */ 75 #define DPL_TIMESTAMP_SHIFT 14 /* ~1.172 kHz, ~853 usec per tick */ 76 #define TAG_TIMESTAMP_SHIFT 14 77 #define NAT_TIMESTAMP_SHIFT 24 /* ~1.144 Hz, ~874 msec per tick */ 78 79 /* Divider for 19.2 MHz crystal oscillator clock to get common timer clock */ 80 #define IPA_XO_CLOCK_DIVIDER 192 /* 1 is subtracted where used */ 81 82 /** 83 * ipa_suspend_handler() - Handle the suspend IPA interrupt 84 * @ipa: IPA pointer 85 * @irq_id: IPA interrupt type (unused) 86 * 87 * If an RX endpoint is in suspend state, and the IPA has a packet 88 * destined for that endpoint, the IPA generates a SUSPEND interrupt 89 * to inform the AP that it should resume the endpoint. If we get 90 * one of these interrupts we just resume everything. 91 */ 92 static void ipa_suspend_handler(struct ipa *ipa, enum ipa_irq_id irq_id) 93 { 94 /* Just report the event, and let system resume handle the rest. 95 * More than one endpoint could signal this; if so, ignore 96 * all but the first. 97 */ 98 if (!test_and_set_bit(IPA_FLAG_RESUMED, ipa->flags)) 99 pm_wakeup_dev_event(&ipa->pdev->dev, 0, true); 100 101 /* Acknowledge/clear the suspend interrupt on all endpoints */ 102 ipa_interrupt_suspend_clear_all(ipa->interrupt); 103 } 104 105 /** 106 * ipa_setup() - Set up IPA hardware 107 * @ipa: IPA pointer 108 * 109 * Perform initialization that requires issuing immediate commands on 110 * the command TX endpoint. If the modem is doing GSI firmware load 111 * and initialization, this function will be called when an SMP2P 112 * interrupt has been signaled by the modem. Otherwise it will be 113 * called from ipa_probe() after GSI firmware has been successfully 114 * loaded, authenticated, and started by Trust Zone. 115 */ 116 int ipa_setup(struct ipa *ipa) 117 { 118 struct ipa_endpoint *exception_endpoint; 119 struct ipa_endpoint *command_endpoint; 120 struct device *dev = &ipa->pdev->dev; 121 int ret; 122 123 ret = gsi_setup(&ipa->gsi); 124 if (ret) 125 return ret; 126 127 ipa_interrupt_add(ipa->interrupt, IPA_IRQ_TX_SUSPEND, 128 ipa_suspend_handler); 129 130 ret = device_init_wakeup(dev, true); 131 if (ret) 132 goto err_interrupt_remove; 133 134 ipa_endpoint_setup(ipa); 135 136 /* We need to use the AP command TX endpoint to perform other 137 * initialization, so we enable first. 138 */ 139 command_endpoint = ipa->name_map[IPA_ENDPOINT_AP_COMMAND_TX]; 140 ret = ipa_endpoint_enable_one(command_endpoint); 141 if (ret) 142 goto err_endpoint_teardown; 143 144 ret = ipa_mem_setup(ipa); /* No matching teardown required */ 145 if (ret) 146 goto err_command_disable; 147 148 ret = ipa_table_setup(ipa); /* No matching teardown required */ 149 if (ret) 150 goto err_command_disable; 151 152 /* Enable the exception handling endpoint, and tell the hardware 153 * to use it by default. 154 */ 155 exception_endpoint = ipa->name_map[IPA_ENDPOINT_AP_LAN_RX]; 156 ret = ipa_endpoint_enable_one(exception_endpoint); 157 if (ret) 158 goto err_command_disable; 159 160 ipa_endpoint_default_route_set(ipa, exception_endpoint->endpoint_id); 161 162 /* We're all set. Now prepare for communication with the modem */ 163 ret = ipa_qmi_setup(ipa); 164 if (ret) 165 goto err_default_route_clear; 166 167 ipa->setup_complete = true; 168 169 dev_info(dev, "IPA driver setup completed successfully\n"); 170 171 return 0; 172 173 err_default_route_clear: 174 ipa_endpoint_default_route_clear(ipa); 175 ipa_endpoint_disable_one(exception_endpoint); 176 err_command_disable: 177 ipa_endpoint_disable_one(command_endpoint); 178 err_endpoint_teardown: 179 ipa_endpoint_teardown(ipa); 180 (void)device_init_wakeup(dev, false); 181 err_interrupt_remove: 182 ipa_interrupt_remove(ipa->interrupt, IPA_IRQ_TX_SUSPEND); 183 gsi_teardown(&ipa->gsi); 184 185 return ret; 186 } 187 188 /** 189 * ipa_teardown() - Inverse of ipa_setup() 190 * @ipa: IPA pointer 191 */ 192 static void ipa_teardown(struct ipa *ipa) 193 { 194 struct ipa_endpoint *exception_endpoint; 195 struct ipa_endpoint *command_endpoint; 196 197 ipa_qmi_teardown(ipa); 198 ipa_endpoint_default_route_clear(ipa); 199 exception_endpoint = ipa->name_map[IPA_ENDPOINT_AP_LAN_RX]; 200 ipa_endpoint_disable_one(exception_endpoint); 201 command_endpoint = ipa->name_map[IPA_ENDPOINT_AP_COMMAND_TX]; 202 ipa_endpoint_disable_one(command_endpoint); 203 ipa_endpoint_teardown(ipa); 204 (void)device_init_wakeup(&ipa->pdev->dev, false); 205 ipa_interrupt_remove(ipa->interrupt, IPA_IRQ_TX_SUSPEND); 206 gsi_teardown(&ipa->gsi); 207 } 208 209 /* Configure bus access behavior for IPA components */ 210 static void ipa_hardware_config_comp(struct ipa *ipa) 211 { 212 u32 val; 213 214 /* Nothing to configure prior to IPA v4.0 */ 215 if (ipa->version < IPA_VERSION_4_0) 216 return; 217 218 val = ioread32(ipa->reg_virt + IPA_REG_COMP_CFG_OFFSET); 219 220 if (ipa->version == IPA_VERSION_4_0) { 221 val &= ~IPA_QMB_SELECT_CONS_EN_FMASK; 222 val &= ~IPA_QMB_SELECT_PROD_EN_FMASK; 223 val &= ~IPA_QMB_SELECT_GLOBAL_EN_FMASK; 224 } else if (ipa->version < IPA_VERSION_4_5) { 225 val |= GSI_MULTI_AXI_MASTERS_DIS_FMASK; 226 } else { 227 /* For IPA v4.5 IPA_FULL_FLUSH_WAIT_RSC_CLOSE_EN is 0 */ 228 } 229 230 val |= GSI_MULTI_INORDER_RD_DIS_FMASK; 231 val |= GSI_MULTI_INORDER_WR_DIS_FMASK; 232 233 iowrite32(val, ipa->reg_virt + IPA_REG_COMP_CFG_OFFSET); 234 } 235 236 /* Configure DDR and (possibly) PCIe max read/write QSB values */ 237 static void 238 ipa_hardware_config_qsb(struct ipa *ipa, const struct ipa_data *data) 239 { 240 const struct ipa_qsb_data *data0; 241 const struct ipa_qsb_data *data1; 242 u32 val; 243 244 /* QMB 0 represents DDR; QMB 1 (if present) represents PCIe */ 245 data0 = &data->qsb_data[IPA_QSB_MASTER_DDR]; 246 if (data->qsb_count > 1) 247 data1 = &data->qsb_data[IPA_QSB_MASTER_PCIE]; 248 249 /* Max outstanding write accesses for QSB masters */ 250 val = u32_encode_bits(data0->max_writes, GEN_QMB_0_MAX_WRITES_FMASK); 251 if (data->qsb_count > 1) 252 val |= u32_encode_bits(data1->max_writes, 253 GEN_QMB_1_MAX_WRITES_FMASK); 254 iowrite32(val, ipa->reg_virt + IPA_REG_QSB_MAX_WRITES_OFFSET); 255 256 /* Max outstanding read accesses for QSB masters */ 257 val = u32_encode_bits(data0->max_reads, GEN_QMB_0_MAX_READS_FMASK); 258 if (ipa->version >= IPA_VERSION_4_0) 259 val |= u32_encode_bits(data0->max_reads_beats, 260 GEN_QMB_0_MAX_READS_BEATS_FMASK); 261 if (data->qsb_count > 1) { 262 val |= u32_encode_bits(data1->max_reads, 263 GEN_QMB_1_MAX_READS_FMASK); 264 if (ipa->version >= IPA_VERSION_4_0) 265 val |= u32_encode_bits(data1->max_reads_beats, 266 GEN_QMB_1_MAX_READS_BEATS_FMASK); 267 } 268 iowrite32(val, ipa->reg_virt + IPA_REG_QSB_MAX_READS_OFFSET); 269 } 270 271 /* The internal inactivity timer clock is used for the aggregation timer */ 272 #define TIMER_FREQUENCY 32000 /* 32 KHz inactivity timer clock */ 273 274 /* Compute the value to use in the COUNTER_CFG register AGGR_GRANULARITY 275 * field to represent the given number of microseconds. The value is one 276 * less than the number of timer ticks in the requested period. 0 is not 277 * a valid granularity value. 278 */ 279 static u32 ipa_aggr_granularity_val(u32 usec) 280 { 281 WARN_ON(!usec); 282 283 return DIV_ROUND_CLOSEST(usec * TIMER_FREQUENCY, USEC_PER_SEC) - 1; 284 } 285 286 /* IPA uses unified Qtime starting at IPA v4.5, implementing various 287 * timestamps and timers independent of the IPA core clock rate. The 288 * Qtimer is based on a 56-bit timestamp incremented at each tick of 289 * a 19.2 MHz SoC crystal oscillator (XO clock). 290 * 291 * For IPA timestamps (tag, NAT, data path logging) a lower resolution 292 * timestamp is achieved by shifting the Qtimer timestamp value right 293 * some number of bits to produce the low-order bits of the coarser 294 * granularity timestamp. 295 * 296 * For timers, a common timer clock is derived from the XO clock using 297 * a divider (we use 192, to produce a 100kHz timer clock). From 298 * this common clock, three "pulse generators" are used to produce 299 * timer ticks at a configurable frequency. IPA timers (such as 300 * those used for aggregation or head-of-line block handling) now 301 * define their period based on one of these pulse generators. 302 */ 303 static void ipa_qtime_config(struct ipa *ipa) 304 { 305 u32 val; 306 307 /* Timer clock divider must be disabled when we change the rate */ 308 iowrite32(0, ipa->reg_virt + IPA_REG_TIMERS_XO_CLK_DIV_CFG_OFFSET); 309 310 /* Set DPL time stamp resolution to use Qtime (instead of 1 msec) */ 311 val = u32_encode_bits(DPL_TIMESTAMP_SHIFT, DPL_TIMESTAMP_LSB_FMASK); 312 val |= u32_encode_bits(1, DPL_TIMESTAMP_SEL_FMASK); 313 /* Configure tag and NAT Qtime timestamp resolution as well */ 314 val |= u32_encode_bits(TAG_TIMESTAMP_SHIFT, TAG_TIMESTAMP_LSB_FMASK); 315 val |= u32_encode_bits(NAT_TIMESTAMP_SHIFT, NAT_TIMESTAMP_LSB_FMASK); 316 iowrite32(val, ipa->reg_virt + IPA_REG_QTIME_TIMESTAMP_CFG_OFFSET); 317 318 /* Set granularity of pulse generators used for other timers */ 319 val = u32_encode_bits(IPA_GRAN_100_US, GRAN_0_FMASK); 320 val |= u32_encode_bits(IPA_GRAN_1_MS, GRAN_1_FMASK); 321 val |= u32_encode_bits(IPA_GRAN_1_MS, GRAN_2_FMASK); 322 iowrite32(val, ipa->reg_virt + IPA_REG_TIMERS_PULSE_GRAN_CFG_OFFSET); 323 324 /* Actual divider is 1 more than value supplied here */ 325 val = u32_encode_bits(IPA_XO_CLOCK_DIVIDER - 1, DIV_VALUE_FMASK); 326 iowrite32(val, ipa->reg_virt + IPA_REG_TIMERS_XO_CLK_DIV_CFG_OFFSET); 327 328 /* Divider value is set; re-enable the common timer clock divider */ 329 val |= u32_encode_bits(1, DIV_ENABLE_FMASK); 330 iowrite32(val, ipa->reg_virt + IPA_REG_TIMERS_XO_CLK_DIV_CFG_OFFSET); 331 } 332 333 static void ipa_idle_indication_cfg(struct ipa *ipa, 334 u32 enter_idle_debounce_thresh, 335 bool const_non_idle_enable) 336 { 337 u32 offset; 338 u32 val; 339 340 val = u32_encode_bits(enter_idle_debounce_thresh, 341 ENTER_IDLE_DEBOUNCE_THRESH_FMASK); 342 if (const_non_idle_enable) 343 val |= CONST_NON_IDLE_ENABLE_FMASK; 344 345 offset = ipa_reg_idle_indication_cfg_offset(ipa->version); 346 iowrite32(val, ipa->reg_virt + offset); 347 } 348 349 /** 350 * ipa_hardware_dcd_config() - Enable dynamic clock division on IPA 351 * @ipa: IPA pointer 352 * 353 * Configures when the IPA signals it is idle to the global clock 354 * controller, which can respond by scalling down the clock to 355 * save power. 356 */ 357 static void ipa_hardware_dcd_config(struct ipa *ipa) 358 { 359 /* Recommended values for IPA 3.5 and later according to IPA HPG */ 360 ipa_idle_indication_cfg(ipa, 256, false); 361 } 362 363 static void ipa_hardware_dcd_deconfig(struct ipa *ipa) 364 { 365 /* Power-on reset values */ 366 ipa_idle_indication_cfg(ipa, 0, true); 367 } 368 369 /** 370 * ipa_hardware_config() - Primitive hardware initialization 371 * @ipa: IPA pointer 372 * @data: IPA configuration data 373 */ 374 static void ipa_hardware_config(struct ipa *ipa, const struct ipa_data *data) 375 { 376 enum ipa_version version = ipa->version; 377 u32 granularity; 378 u32 val; 379 380 /* IPA v4.5+ has no backward compatibility register */ 381 if (version < IPA_VERSION_4_5) { 382 val = data->backward_compat; 383 iowrite32(val, ipa->reg_virt + IPA_REG_BCR_OFFSET); 384 } 385 386 /* Implement some hardware workarounds */ 387 if (version >= IPA_VERSION_4_0 && version < IPA_VERSION_4_5) { 388 /* Disable PA mask to allow HOLB drop */ 389 val = ioread32(ipa->reg_virt + IPA_REG_TX_CFG_OFFSET); 390 val &= ~PA_MASK_EN_FMASK; 391 iowrite32(val, ipa->reg_virt + IPA_REG_TX_CFG_OFFSET); 392 393 /* Enable open global clocks in the CLKON configuration */ 394 val = GLOBAL_FMASK | GLOBAL_2X_CLK_FMASK; 395 } else if (version == IPA_VERSION_3_1) { 396 val = MISC_FMASK; /* Disable MISC clock gating */ 397 } else { 398 val = 0; /* No CLKON configuration needed */ 399 } 400 if (val) 401 iowrite32(val, ipa->reg_virt + IPA_REG_CLKON_CFG_OFFSET); 402 403 ipa_hardware_config_comp(ipa); 404 405 /* Configure system bus limits */ 406 ipa_hardware_config_qsb(ipa, data); 407 408 if (version < IPA_VERSION_4_5) { 409 /* Configure aggregation timer granularity */ 410 granularity = ipa_aggr_granularity_val(IPA_AGGR_GRANULARITY); 411 val = u32_encode_bits(granularity, AGGR_GRANULARITY_FMASK); 412 iowrite32(val, ipa->reg_virt + IPA_REG_COUNTER_CFG_OFFSET); 413 } else { 414 ipa_qtime_config(ipa); 415 } 416 417 /* IPA v4.2 does not support hashed tables, so disable them */ 418 if (version == IPA_VERSION_4_2) { 419 u32 offset = ipa_reg_filt_rout_hash_en_offset(version); 420 421 iowrite32(0, ipa->reg_virt + offset); 422 } 423 424 /* Enable dynamic clock division */ 425 ipa_hardware_dcd_config(ipa); 426 } 427 428 /** 429 * ipa_hardware_deconfig() - Inverse of ipa_hardware_config() 430 * @ipa: IPA pointer 431 * 432 * This restores the power-on reset values (even if they aren't different) 433 */ 434 static void ipa_hardware_deconfig(struct ipa *ipa) 435 { 436 /* Mostly we just leave things as we set them. */ 437 ipa_hardware_dcd_deconfig(ipa); 438 } 439 440 /** 441 * ipa_config() - Configure IPA hardware 442 * @ipa: IPA pointer 443 * @data: IPA configuration data 444 * 445 * Perform initialization requiring IPA clock to be enabled. 446 */ 447 static int ipa_config(struct ipa *ipa, const struct ipa_data *data) 448 { 449 int ret; 450 451 /* Get a clock reference to allow initialization. This reference 452 * is held after initialization completes, and won't get dropped 453 * unless/until a system suspend request arrives. 454 */ 455 ipa_clock_get(ipa); 456 457 ipa_hardware_config(ipa, data); 458 459 ret = ipa_mem_config(ipa); 460 if (ret) 461 goto err_hardware_deconfig; 462 463 ipa->interrupt = ipa_interrupt_config(ipa); 464 if (IS_ERR(ipa->interrupt)) { 465 ret = PTR_ERR(ipa->interrupt); 466 ipa->interrupt = NULL; 467 goto err_mem_deconfig; 468 } 469 470 ipa_uc_config(ipa); 471 472 ret = ipa_endpoint_config(ipa); 473 if (ret) 474 goto err_interrupt_deconfig; 475 476 ipa_table_config(ipa); /* No deconfig required */ 477 478 /* Assign resource limitation to each group; no deconfig required */ 479 ret = ipa_resource_config(ipa, data->resource_data); 480 if (ret) 481 goto err_endpoint_deconfig; 482 483 ret = ipa_modem_config(ipa); 484 if (ret) 485 goto err_endpoint_deconfig; 486 487 return 0; 488 489 err_endpoint_deconfig: 490 ipa_endpoint_deconfig(ipa); 491 err_interrupt_deconfig: 492 ipa_uc_deconfig(ipa); 493 ipa_interrupt_deconfig(ipa->interrupt); 494 ipa->interrupt = NULL; 495 err_mem_deconfig: 496 ipa_mem_deconfig(ipa); 497 err_hardware_deconfig: 498 ipa_hardware_deconfig(ipa); 499 ipa_clock_put(ipa); 500 501 return ret; 502 } 503 504 /** 505 * ipa_deconfig() - Inverse of ipa_config() 506 * @ipa: IPA pointer 507 */ 508 static void ipa_deconfig(struct ipa *ipa) 509 { 510 ipa_modem_deconfig(ipa); 511 ipa_endpoint_deconfig(ipa); 512 ipa_uc_deconfig(ipa); 513 ipa_interrupt_deconfig(ipa->interrupt); 514 ipa->interrupt = NULL; 515 ipa_mem_deconfig(ipa); 516 ipa_hardware_deconfig(ipa); 517 ipa_clock_put(ipa); 518 } 519 520 static int ipa_firmware_load(struct device *dev) 521 { 522 const struct firmware *fw; 523 struct device_node *node; 524 struct resource res; 525 phys_addr_t phys; 526 const char *path; 527 ssize_t size; 528 void *virt; 529 int ret; 530 531 node = of_parse_phandle(dev->of_node, "memory-region", 0); 532 if (!node) { 533 dev_err(dev, "DT error getting \"memory-region\" property\n"); 534 return -EINVAL; 535 } 536 537 ret = of_address_to_resource(node, 0, &res); 538 of_node_put(node); 539 if (ret) { 540 dev_err(dev, "error %d getting \"memory-region\" resource\n", 541 ret); 542 return ret; 543 } 544 545 /* Use name from DTB if specified; use default for *any* error */ 546 ret = of_property_read_string(dev->of_node, "firmware-name", &path); 547 if (ret) { 548 dev_dbg(dev, "error %d getting \"firmware-name\" resource\n", 549 ret); 550 path = IPA_FW_PATH_DEFAULT; 551 } 552 553 ret = request_firmware(&fw, path, dev); 554 if (ret) { 555 dev_err(dev, "error %d requesting \"%s\"\n", ret, path); 556 return ret; 557 } 558 559 phys = res.start; 560 size = (size_t)resource_size(&res); 561 virt = memremap(phys, size, MEMREMAP_WC); 562 if (!virt) { 563 dev_err(dev, "unable to remap firmware memory\n"); 564 ret = -ENOMEM; 565 goto out_release_firmware; 566 } 567 568 ret = qcom_mdt_load(dev, fw, path, IPA_PAS_ID, virt, phys, size, NULL); 569 if (ret) 570 dev_err(dev, "error %d loading \"%s\"\n", ret, path); 571 else if ((ret = qcom_scm_pas_auth_and_reset(IPA_PAS_ID))) 572 dev_err(dev, "error %d authenticating \"%s\"\n", ret, path); 573 574 memunmap(virt); 575 out_release_firmware: 576 release_firmware(fw); 577 578 return ret; 579 } 580 581 static const struct of_device_id ipa_match[] = { 582 { 583 .compatible = "qcom,msm8998-ipa", 584 .data = &ipa_data_v3_1, 585 }, 586 { 587 .compatible = "qcom,sdm845-ipa", 588 .data = &ipa_data_v3_5_1, 589 }, 590 { 591 .compatible = "qcom,sc7180-ipa", 592 .data = &ipa_data_v4_2, 593 }, 594 { 595 .compatible = "qcom,sdx55-ipa", 596 .data = &ipa_data_v4_5, 597 }, 598 { 599 .compatible = "qcom,sm8350-ipa", 600 .data = &ipa_data_v4_9, 601 }, 602 { 603 .compatible = "qcom,sc7280-ipa", 604 .data = &ipa_data_v4_11, 605 }, 606 { }, 607 }; 608 MODULE_DEVICE_TABLE(of, ipa_match); 609 610 /* Check things that can be validated at build time. This just 611 * groups these things BUILD_BUG_ON() calls don't clutter the rest 612 * of the code. 613 * */ 614 static void ipa_validate_build(void) 615 { 616 /* At one time we assumed a 64-bit build, allowing some do_div() 617 * calls to be replaced by simple division or modulo operations. 618 * We currently only perform divide and modulo operations on u32, 619 * u16, or size_t objects, and of those only size_t has any chance 620 * of being a 64-bit value. (It should be guaranteed 32 bits wide 621 * on a 32-bit build, but there is no harm in verifying that.) 622 */ 623 BUILD_BUG_ON(!IS_ENABLED(CONFIG_64BIT) && sizeof(size_t) != 4); 624 625 /* Code assumes the EE ID for the AP is 0 (zeroed structure field) */ 626 BUILD_BUG_ON(GSI_EE_AP != 0); 627 628 /* There's no point if we have no channels or event rings */ 629 BUILD_BUG_ON(!GSI_CHANNEL_COUNT_MAX); 630 BUILD_BUG_ON(!GSI_EVT_RING_COUNT_MAX); 631 632 /* GSI hardware design limits */ 633 BUILD_BUG_ON(GSI_CHANNEL_COUNT_MAX > 32); 634 BUILD_BUG_ON(GSI_EVT_RING_COUNT_MAX > 31); 635 636 /* The number of TREs in a transaction is limited by the channel's 637 * TLV FIFO size. A transaction structure uses 8-bit fields 638 * to represents the number of TREs it has allocated and used. 639 */ 640 BUILD_BUG_ON(GSI_TLV_MAX > U8_MAX); 641 642 /* This is used as a divisor */ 643 BUILD_BUG_ON(!IPA_AGGR_GRANULARITY); 644 645 /* Aggregation granularity value can't be 0, and must fit */ 646 BUILD_BUG_ON(!ipa_aggr_granularity_val(IPA_AGGR_GRANULARITY)); 647 BUILD_BUG_ON(ipa_aggr_granularity_val(IPA_AGGR_GRANULARITY) > 648 field_max(AGGR_GRANULARITY_FMASK)); 649 } 650 651 static bool ipa_version_valid(enum ipa_version version) 652 { 653 switch (version) { 654 case IPA_VERSION_3_0: 655 case IPA_VERSION_3_1: 656 case IPA_VERSION_3_5: 657 case IPA_VERSION_3_5_1: 658 case IPA_VERSION_4_0: 659 case IPA_VERSION_4_1: 660 case IPA_VERSION_4_2: 661 case IPA_VERSION_4_5: 662 case IPA_VERSION_4_7: 663 case IPA_VERSION_4_9: 664 case IPA_VERSION_4_11: 665 return true; 666 667 default: 668 return false; 669 } 670 } 671 672 /** 673 * ipa_probe() - IPA platform driver probe function 674 * @pdev: Platform device pointer 675 * 676 * Return: 0 if successful, or a negative error code (possibly 677 * EPROBE_DEFER) 678 * 679 * This is the main entry point for the IPA driver. Initialization proceeds 680 * in several stages: 681 * - The "init" stage involves activities that can be initialized without 682 * access to the IPA hardware. 683 * - The "config" stage requires the IPA clock to be active so IPA registers 684 * can be accessed, but does not require the use of IPA immediate commands. 685 * - The "setup" stage uses IPA immediate commands, and so requires the GSI 686 * layer to be initialized. 687 * 688 * A Boolean Device Tree "modem-init" property determines whether GSI 689 * initialization will be performed by the AP (Trust Zone) or the modem. 690 * If the AP does GSI initialization, the setup phase is entered after 691 * this has completed successfully. Otherwise the modem initializes 692 * the GSI layer and signals it has finished by sending an SMP2P interrupt 693 * to the AP; this triggers the start if IPA setup. 694 */ 695 static int ipa_probe(struct platform_device *pdev) 696 { 697 struct device *dev = &pdev->dev; 698 const struct ipa_data *data; 699 struct ipa_clock *clock; 700 bool modem_init; 701 struct ipa *ipa; 702 int ret; 703 704 ipa_validate_build(); 705 706 /* Get configuration data early; needed for clock initialization */ 707 data = of_device_get_match_data(dev); 708 if (!data) { 709 dev_err(dev, "matched hardware not supported\n"); 710 return -ENODEV; 711 } 712 713 if (!ipa_version_valid(data->version)) { 714 dev_err(dev, "invalid IPA version\n"); 715 return -EINVAL; 716 } 717 718 /* If we need Trust Zone, make sure it's available */ 719 modem_init = of_property_read_bool(dev->of_node, "modem-init"); 720 if (!modem_init) 721 if (!qcom_scm_is_available()) 722 return -EPROBE_DEFER; 723 724 /* The clock and interconnects might not be ready when we're 725 * probed, so might return -EPROBE_DEFER. 726 */ 727 clock = ipa_clock_init(dev, data->clock_data); 728 if (IS_ERR(clock)) 729 return PTR_ERR(clock); 730 731 /* No more EPROBE_DEFER. Allocate and initialize the IPA structure */ 732 ipa = kzalloc(sizeof(*ipa), GFP_KERNEL); 733 if (!ipa) { 734 ret = -ENOMEM; 735 goto err_clock_exit; 736 } 737 738 ipa->pdev = pdev; 739 dev_set_drvdata(dev, ipa); 740 ipa->clock = clock; 741 ipa->version = data->version; 742 init_completion(&ipa->completion); 743 744 ret = ipa_reg_init(ipa); 745 if (ret) 746 goto err_kfree_ipa; 747 748 ret = ipa_mem_init(ipa, data->mem_data); 749 if (ret) 750 goto err_reg_exit; 751 752 ret = gsi_init(&ipa->gsi, pdev, ipa->version, data->endpoint_count, 753 data->endpoint_data); 754 if (ret) 755 goto err_mem_exit; 756 757 /* Result is a non-zero mask of endpoints that support filtering */ 758 ipa->filter_map = ipa_endpoint_init(ipa, data->endpoint_count, 759 data->endpoint_data); 760 if (!ipa->filter_map) { 761 ret = -EINVAL; 762 goto err_gsi_exit; 763 } 764 765 ret = ipa_table_init(ipa); 766 if (ret) 767 goto err_endpoint_exit; 768 769 ret = ipa_modem_init(ipa, modem_init); 770 if (ret) 771 goto err_table_exit; 772 773 ret = ipa_config(ipa, data); 774 if (ret) 775 goto err_modem_exit; 776 777 dev_info(dev, "IPA driver initialized"); 778 779 /* If the modem is doing early initialization, it will trigger a 780 * call to ipa_setup() call when it has finished. In that case 781 * we're done here. 782 */ 783 if (modem_init) 784 return 0; 785 786 /* Otherwise we need to load the firmware and have Trust Zone validate 787 * and install it. If that succeeds we can proceed with setup. 788 */ 789 ret = ipa_firmware_load(dev); 790 if (ret) 791 goto err_deconfig; 792 793 ret = ipa_setup(ipa); 794 if (ret) 795 goto err_deconfig; 796 797 return 0; 798 799 err_deconfig: 800 ipa_deconfig(ipa); 801 err_modem_exit: 802 ipa_modem_exit(ipa); 803 err_table_exit: 804 ipa_table_exit(ipa); 805 err_endpoint_exit: 806 ipa_endpoint_exit(ipa); 807 err_gsi_exit: 808 gsi_exit(&ipa->gsi); 809 err_mem_exit: 810 ipa_mem_exit(ipa); 811 err_reg_exit: 812 ipa_reg_exit(ipa); 813 err_kfree_ipa: 814 kfree(ipa); 815 err_clock_exit: 816 ipa_clock_exit(clock); 817 818 return ret; 819 } 820 821 static int ipa_remove(struct platform_device *pdev) 822 { 823 struct ipa *ipa = dev_get_drvdata(&pdev->dev); 824 struct ipa_clock *clock = ipa->clock; 825 int ret; 826 827 if (ipa->setup_complete) { 828 ret = ipa_modem_stop(ipa); 829 /* If starting or stopping is in progress, try once more */ 830 if (ret == -EBUSY) { 831 usleep_range(USEC_PER_MSEC, 2 * USEC_PER_MSEC); 832 ret = ipa_modem_stop(ipa); 833 } 834 if (ret) 835 return ret; 836 837 ipa_teardown(ipa); 838 } 839 840 ipa_deconfig(ipa); 841 ipa_modem_exit(ipa); 842 ipa_table_exit(ipa); 843 ipa_endpoint_exit(ipa); 844 gsi_exit(&ipa->gsi); 845 ipa_mem_exit(ipa); 846 ipa_reg_exit(ipa); 847 kfree(ipa); 848 ipa_clock_exit(clock); 849 850 return 0; 851 } 852 853 static void ipa_shutdown(struct platform_device *pdev) 854 { 855 int ret; 856 857 ret = ipa_remove(pdev); 858 if (ret) 859 dev_err(&pdev->dev, "shutdown: remove returned %d\n", ret); 860 } 861 862 /** 863 * ipa_suspend() - Power management system suspend callback 864 * @dev: IPA device structure 865 * 866 * Return: Always returns zero 867 * 868 * Called by the PM framework when a system suspend operation is invoked. 869 * Suspends endpoints and releases the clock reference held to keep 870 * the IPA clock running until this point. 871 */ 872 static int ipa_suspend(struct device *dev) 873 { 874 struct ipa *ipa = dev_get_drvdata(dev); 875 876 /* When a suspended RX endpoint has a packet ready to receive, we 877 * get an IPA SUSPEND interrupt. We trigger a system resume in 878 * that case, but only on the first such interrupt since suspend. 879 */ 880 __clear_bit(IPA_FLAG_RESUMED, ipa->flags); 881 882 ipa_endpoint_suspend(ipa); 883 884 ipa_clock_put(ipa); 885 886 return 0; 887 } 888 889 /** 890 * ipa_resume() - Power management system resume callback 891 * @dev: IPA device structure 892 * 893 * Return: Always returns 0 894 * 895 * Called by the PM framework when a system resume operation is invoked. 896 * Takes an IPA clock reference to keep the clock running until suspend, 897 * and resumes endpoints. 898 */ 899 static int ipa_resume(struct device *dev) 900 { 901 struct ipa *ipa = dev_get_drvdata(dev); 902 903 /* This clock reference will keep the IPA out of suspend 904 * until we get a power management suspend request. 905 */ 906 ipa_clock_get(ipa); 907 908 ipa_endpoint_resume(ipa); 909 910 return 0; 911 } 912 913 static const struct dev_pm_ops ipa_pm_ops = { 914 .suspend = ipa_suspend, 915 .resume = ipa_resume, 916 }; 917 918 static const struct attribute_group *ipa_attribute_groups[] = { 919 &ipa_attribute_group, 920 &ipa_feature_attribute_group, 921 &ipa_modem_attribute_group, 922 NULL, 923 }; 924 925 static struct platform_driver ipa_driver = { 926 .probe = ipa_probe, 927 .remove = ipa_remove, 928 .shutdown = ipa_shutdown, 929 .driver = { 930 .name = "ipa", 931 .pm = &ipa_pm_ops, 932 .of_match_table = ipa_match, 933 .dev_groups = ipa_attribute_groups, 934 }, 935 }; 936 937 module_platform_driver(ipa_driver); 938 939 MODULE_LICENSE("GPL v2"); 940 MODULE_DESCRIPTION("Qualcomm IP Accelerator device driver"); 941