xref: /linux/drivers/net/ipa/ipa_interrupt.c (revision 9112fc0109fc0037ac3b8b633a169e78b4e23ca1)
1 // SPDX-License-Identifier: GPL-2.0
2 
3 /* Copyright (c) 2014-2018, The Linux Foundation. All rights reserved.
4  * Copyright (C) 2018-2022 Linaro Ltd.
5  */
6 
7 /* DOC: IPA Interrupts
8  *
9  * The IPA has an interrupt line distinct from the interrupt used by the GSI
10  * code.  Whereas GSI interrupts are generally related to channel events (like
11  * transfer completions), IPA interrupts are related to other events related
12  * to the IPA.  Some of the IPA interrupts come from a microcontroller
13  * embedded in the IPA.  Each IPA interrupt type can be both masked and
14  * acknowledged independent of the others.
15  *
16  * Two of the IPA interrupts are initiated by the microcontroller.  A third
17  * can be generated to signal the need for a wakeup/resume when an IPA
18  * endpoint has been suspended.  There are other IPA events, but at this
19  * time only these three are supported.
20  */
21 
22 #include <linux/types.h>
23 #include <linux/interrupt.h>
24 #include <linux/pm_runtime.h>
25 #include <linux/pm_wakeirq.h>
26 
27 #include "ipa.h"
28 #include "ipa_reg.h"
29 #include "ipa_endpoint.h"
30 #include "ipa_power.h"
31 #include "ipa_uc.h"
32 #include "ipa_interrupt.h"
33 
34 /**
35  * struct ipa_interrupt - IPA interrupt information
36  * @ipa:		IPA pointer
37  * @irq:		Linux IRQ number used for IPA interrupts
38  * @enabled:		Mask indicating which interrupts are enabled
39  */
40 struct ipa_interrupt {
41 	struct ipa *ipa;
42 	u32 irq;
43 	u32 enabled;
44 };
45 
46 /* Clear the suspend interrupt for all endpoints that signaled it */
47 static void ipa_interrupt_suspend_clear_all(struct ipa_interrupt *interrupt)
48 {
49 	struct ipa *ipa = interrupt->ipa;
50 	u32 unit_count;
51 	u32 unit;
52 
53 	unit_count = DIV_ROUND_UP(ipa->endpoint_count, 32);
54 	for (unit = 0; unit < unit_count; unit++) {
55 		const struct reg *reg;
56 		u32 val;
57 
58 		reg = ipa_reg(ipa, IRQ_SUSPEND_INFO);
59 		val = ioread32(ipa->reg_virt + reg_n_offset(reg, unit));
60 
61 		/* SUSPEND interrupt status isn't cleared on IPA version 3.0 */
62 		if (!val || ipa->version == IPA_VERSION_3_0)
63 			continue;
64 
65 		reg = ipa_reg(ipa, IRQ_SUSPEND_CLR);
66 		iowrite32(val, ipa->reg_virt + reg_n_offset(reg, unit));
67 	}
68 }
69 
70 /* Process a particular interrupt type that has been received */
71 static void ipa_interrupt_process(struct ipa_interrupt *interrupt, u32 irq_id)
72 {
73 	struct ipa *ipa = interrupt->ipa;
74 	const struct reg *reg;
75 	u32 mask = BIT(irq_id);
76 	u32 offset;
77 
78 	reg = ipa_reg(ipa, IPA_IRQ_CLR);
79 	offset = reg_offset(reg);
80 
81 	switch (irq_id) {
82 	case IPA_IRQ_UC_0:
83 	case IPA_IRQ_UC_1:
84 		/* For microcontroller interrupts, clear the interrupt right
85 		 * away, "to avoid clearing unhandled interrupts."
86 		 */
87 		iowrite32(mask, ipa->reg_virt + offset);
88 		ipa_uc_interrupt_handler(ipa, irq_id);
89 		break;
90 
91 	case IPA_IRQ_TX_SUSPEND:
92 		/* Clearing the SUSPEND_TX interrupt also clears the
93 		 * register that tells us which suspended endpoint(s)
94 		 * caused the interrupt, so defer clearing until after
95 		 * the handler has been called.
96 		 */
97 		ipa_interrupt_suspend_clear_all(interrupt);
98 		fallthrough;
99 
100 	default:	/* Silently ignore (and clear) any other condition */
101 		iowrite32(mask, ipa->reg_virt + offset);
102 		break;
103 	}
104 }
105 
106 /* IPA IRQ handler is threaded */
107 static irqreturn_t ipa_isr_thread(int irq, void *dev_id)
108 {
109 	struct ipa_interrupt *interrupt = dev_id;
110 	struct ipa *ipa = interrupt->ipa;
111 	u32 enabled = interrupt->enabled;
112 	const struct reg *reg;
113 	struct device *dev;
114 	u32 pending;
115 	u32 offset;
116 	u32 mask;
117 	int ret;
118 
119 	dev = &ipa->pdev->dev;
120 	ret = pm_runtime_get_sync(dev);
121 	if (WARN_ON(ret < 0))
122 		goto out_power_put;
123 
124 	/* The status register indicates which conditions are present,
125 	 * including conditions whose interrupt is not enabled.  Handle
126 	 * only the enabled ones.
127 	 */
128 	reg = ipa_reg(ipa, IPA_IRQ_STTS);
129 	offset = reg_offset(reg);
130 	pending = ioread32(ipa->reg_virt + offset);
131 	while ((mask = pending & enabled)) {
132 		do {
133 			u32 irq_id = __ffs(mask);
134 
135 			mask ^= BIT(irq_id);
136 
137 			ipa_interrupt_process(interrupt, irq_id);
138 		} while (mask);
139 		pending = ioread32(ipa->reg_virt + offset);
140 	}
141 
142 	/* If any disabled interrupts are pending, clear them */
143 	if (pending) {
144 		dev_dbg(dev, "clearing disabled IPA interrupts 0x%08x\n",
145 			pending);
146 		reg = ipa_reg(ipa, IPA_IRQ_CLR);
147 		iowrite32(pending, ipa->reg_virt + reg_offset(reg));
148 	}
149 out_power_put:
150 	pm_runtime_mark_last_busy(dev);
151 	(void)pm_runtime_put_autosuspend(dev);
152 
153 	return IRQ_HANDLED;
154 }
155 
156 static void ipa_interrupt_enabled_update(struct ipa *ipa)
157 {
158 	const struct reg *reg = ipa_reg(ipa, IPA_IRQ_EN);
159 
160 	iowrite32(ipa->interrupt->enabled, ipa->reg_virt + reg_offset(reg));
161 }
162 
163 /* Enable an IPA interrupt type */
164 void ipa_interrupt_enable(struct ipa *ipa, enum ipa_irq_id ipa_irq)
165 {
166 	/* Update the IPA interrupt mask to enable it */
167 	ipa->interrupt->enabled |= BIT(ipa_irq);
168 	ipa_interrupt_enabled_update(ipa);
169 }
170 
171 /* Disable an IPA interrupt type */
172 void ipa_interrupt_disable(struct ipa *ipa, enum ipa_irq_id ipa_irq)
173 {
174 	/* Update the IPA interrupt mask to disable it */
175 	ipa->interrupt->enabled &= ~BIT(ipa_irq);
176 	ipa_interrupt_enabled_update(ipa);
177 }
178 
179 void ipa_interrupt_irq_disable(struct ipa *ipa)
180 {
181 	disable_irq(ipa->interrupt->irq);
182 }
183 
184 void ipa_interrupt_irq_enable(struct ipa *ipa)
185 {
186 	enable_irq(ipa->interrupt->irq);
187 }
188 
189 /* Common function used to enable/disable TX_SUSPEND for an endpoint */
190 static void ipa_interrupt_suspend_control(struct ipa_interrupt *interrupt,
191 					  u32 endpoint_id, bool enable)
192 {
193 	struct ipa *ipa = interrupt->ipa;
194 	u32 mask = BIT(endpoint_id % 32);
195 	u32 unit = endpoint_id / 32;
196 	const struct reg *reg;
197 	u32 offset;
198 	u32 val;
199 
200 	WARN_ON(!test_bit(endpoint_id, ipa->available));
201 
202 	/* IPA version 3.0 does not support TX_SUSPEND interrupt control */
203 	if (ipa->version == IPA_VERSION_3_0)
204 		return;
205 
206 	reg = ipa_reg(ipa, IRQ_SUSPEND_EN);
207 	offset = reg_n_offset(reg, unit);
208 	val = ioread32(ipa->reg_virt + offset);
209 
210 	if (enable)
211 		val |= mask;
212 	else
213 		val &= ~mask;
214 
215 	iowrite32(val, ipa->reg_virt + offset);
216 }
217 
218 /* Enable TX_SUSPEND for an endpoint */
219 void
220 ipa_interrupt_suspend_enable(struct ipa_interrupt *interrupt, u32 endpoint_id)
221 {
222 	ipa_interrupt_suspend_control(interrupt, endpoint_id, true);
223 }
224 
225 /* Disable TX_SUSPEND for an endpoint */
226 void
227 ipa_interrupt_suspend_disable(struct ipa_interrupt *interrupt, u32 endpoint_id)
228 {
229 	ipa_interrupt_suspend_control(interrupt, endpoint_id, false);
230 }
231 
232 /* Simulate arrival of an IPA TX_SUSPEND interrupt */
233 void ipa_interrupt_simulate_suspend(struct ipa_interrupt *interrupt)
234 {
235 	ipa_interrupt_process(interrupt, IPA_IRQ_TX_SUSPEND);
236 }
237 
238 /* Configure the IPA interrupt framework */
239 struct ipa_interrupt *ipa_interrupt_config(struct ipa *ipa)
240 {
241 	struct device *dev = &ipa->pdev->dev;
242 	struct ipa_interrupt *interrupt;
243 	const struct reg *reg;
244 	unsigned int irq;
245 	int ret;
246 
247 	ret = platform_get_irq_byname(ipa->pdev, "ipa");
248 	if (ret <= 0) {
249 		dev_err(dev, "DT error %d getting \"ipa\" IRQ property\n",
250 			ret);
251 		return ERR_PTR(ret ? : -EINVAL);
252 	}
253 	irq = ret;
254 
255 	interrupt = kzalloc(sizeof(*interrupt), GFP_KERNEL);
256 	if (!interrupt)
257 		return ERR_PTR(-ENOMEM);
258 	interrupt->ipa = ipa;
259 	interrupt->irq = irq;
260 
261 	/* Start with all IPA interrupts disabled */
262 	reg = ipa_reg(ipa, IPA_IRQ_EN);
263 	iowrite32(0, ipa->reg_virt + reg_offset(reg));
264 
265 	ret = request_threaded_irq(irq, NULL, ipa_isr_thread, IRQF_ONESHOT,
266 				   "ipa", interrupt);
267 	if (ret) {
268 		dev_err(dev, "error %d requesting \"ipa\" IRQ\n", ret);
269 		goto err_kfree;
270 	}
271 
272 	ret = dev_pm_set_wake_irq(dev, irq);
273 	if (ret) {
274 		dev_err(dev, "error %d registering \"ipa\" IRQ as wakeirq\n", ret);
275 		goto err_free_irq;
276 	}
277 
278 	return interrupt;
279 
280 err_free_irq:
281 	free_irq(interrupt->irq, interrupt);
282 err_kfree:
283 	kfree(interrupt);
284 
285 	return ERR_PTR(ret);
286 }
287 
288 /* Inverse of ipa_interrupt_config() */
289 void ipa_interrupt_deconfig(struct ipa_interrupt *interrupt)
290 {
291 	struct device *dev = &interrupt->ipa->pdev->dev;
292 
293 	dev_pm_clear_wake_irq(dev);
294 	free_irq(interrupt->irq, interrupt);
295 	kfree(interrupt);
296 }
297