xref: /linux/drivers/net/ipa/ipa_interrupt.c (revision 0d0950a968009fd6e5c2a3763b2c6e81b3805b05)
1 // SPDX-License-Identifier: GPL-2.0
2 
3 /* Copyright (c) 2014-2018, The Linux Foundation. All rights reserved.
4  * Copyright (C) 2018-2022 Linaro Ltd.
5  */
6 
7 /* DOC: IPA Interrupts
8  *
9  * The IPA has an interrupt line distinct from the interrupt used by the GSI
10  * code.  Whereas GSI interrupts are generally related to channel events (like
11  * transfer completions), IPA interrupts are related to other events related
12  * to the IPA.  Some of the IPA interrupts come from a microcontroller
13  * embedded in the IPA.  Each IPA interrupt type can be both masked and
14  * acknowledged independent of the others.
15  *
16  * Two of the IPA interrupts are initiated by the microcontroller.  A third
17  * can be generated to signal the need for a wakeup/resume when an IPA
18  * endpoint has been suspended.  There are other IPA events, but at this
19  * time only these three are supported.
20  */
21 
22 #include <linux/types.h>
23 #include <linux/interrupt.h>
24 #include <linux/pm_runtime.h>
25 
26 #include "ipa.h"
27 #include "ipa_reg.h"
28 #include "ipa_endpoint.h"
29 #include "ipa_power.h"
30 #include "ipa_uc.h"
31 #include "ipa_interrupt.h"
32 
33 /**
34  * struct ipa_interrupt - IPA interrupt information
35  * @ipa:		IPA pointer
36  * @irq:		Linux IRQ number used for IPA interrupts
37  * @enabled:		Mask indicating which interrupts are enabled
38  */
39 struct ipa_interrupt {
40 	struct ipa *ipa;
41 	u32 irq;
42 	u32 enabled;
43 };
44 
45 /* Process a particular interrupt type that has been received */
46 static void ipa_interrupt_process(struct ipa_interrupt *interrupt, u32 irq_id)
47 {
48 	struct ipa *ipa = interrupt->ipa;
49 	const struct ipa_reg *reg;
50 	u32 mask = BIT(irq_id);
51 	u32 offset;
52 
53 	reg = ipa_reg(ipa, IPA_IRQ_CLR);
54 	offset = ipa_reg_offset(reg);
55 
56 	switch (irq_id) {
57 	case IPA_IRQ_UC_0:
58 	case IPA_IRQ_UC_1:
59 		/* For microcontroller interrupts, clear the interrupt right
60 		 * away, "to avoid clearing unhandled interrupts."
61 		 */
62 		iowrite32(mask, ipa->reg_virt + offset);
63 		ipa_uc_interrupt_handler(ipa, irq_id);
64 		break;
65 
66 	case IPA_IRQ_TX_SUSPEND:
67 		/* Clearing the SUSPEND_TX interrupt also clears the
68 		 * register that tells us which suspended endpoint(s)
69 		 * caused the interrupt, so defer clearing until after
70 		 * the handler has been called.
71 		 */
72 		ipa_power_suspend_handler(ipa, irq_id);
73 		fallthrough;
74 
75 	default:	/* Silently ignore (and clear) any other condition */
76 		iowrite32(mask, ipa->reg_virt + offset);
77 		break;
78 	}
79 }
80 
81 /* IPA IRQ handler is threaded */
82 static irqreturn_t ipa_isr_thread(int irq, void *dev_id)
83 {
84 	struct ipa_interrupt *interrupt = dev_id;
85 	struct ipa *ipa = interrupt->ipa;
86 	u32 enabled = interrupt->enabled;
87 	const struct ipa_reg *reg;
88 	struct device *dev;
89 	u32 pending;
90 	u32 offset;
91 	u32 mask;
92 	int ret;
93 
94 	dev = &ipa->pdev->dev;
95 	ret = pm_runtime_get_sync(dev);
96 	if (WARN_ON(ret < 0))
97 		goto out_power_put;
98 
99 	/* The status register indicates which conditions are present,
100 	 * including conditions whose interrupt is not enabled.  Handle
101 	 * only the enabled ones.
102 	 */
103 	reg = ipa_reg(ipa, IPA_IRQ_STTS);
104 	offset = ipa_reg_offset(reg);
105 	pending = ioread32(ipa->reg_virt + offset);
106 	while ((mask = pending & enabled)) {
107 		do {
108 			u32 irq_id = __ffs(mask);
109 
110 			mask ^= BIT(irq_id);
111 
112 			ipa_interrupt_process(interrupt, irq_id);
113 		} while (mask);
114 		pending = ioread32(ipa->reg_virt + offset);
115 	}
116 
117 	/* If any disabled interrupts are pending, clear them */
118 	if (pending) {
119 		dev_dbg(dev, "clearing disabled IPA interrupts 0x%08x\n",
120 			pending);
121 		reg = ipa_reg(ipa, IPA_IRQ_CLR);
122 		offset = ipa_reg_offset(reg);
123 		iowrite32(pending, ipa->reg_virt + offset);
124 	}
125 out_power_put:
126 	pm_runtime_mark_last_busy(dev);
127 	(void)pm_runtime_put_autosuspend(dev);
128 
129 	return IRQ_HANDLED;
130 }
131 
132 static void ipa_interrupt_enabled_update(struct ipa *ipa)
133 {
134 	const struct ipa_reg *reg = ipa_reg(ipa, IPA_IRQ_EN);
135 
136 	iowrite32(ipa->interrupt->enabled, ipa->reg_virt + ipa_reg_offset(reg));
137 }
138 
139 /* Enable an IPA interrupt type */
140 void ipa_interrupt_enable(struct ipa *ipa, enum ipa_irq_id ipa_irq)
141 {
142 	/* Update the IPA interrupt mask to enable it */
143 	ipa->interrupt->enabled |= BIT(ipa_irq);
144 	ipa_interrupt_enabled_update(ipa);
145 }
146 
147 /* Disable an IPA interrupt type */
148 void ipa_interrupt_disable(struct ipa *ipa, enum ipa_irq_id ipa_irq)
149 {
150 	/* Update the IPA interrupt mask to disable it */
151 	ipa->interrupt->enabled &= ~BIT(ipa_irq);
152 	ipa_interrupt_enabled_update(ipa);
153 }
154 
155 /* Common function used to enable/disable TX_SUSPEND for an endpoint */
156 static void ipa_interrupt_suspend_control(struct ipa_interrupt *interrupt,
157 					  u32 endpoint_id, bool enable)
158 {
159 	struct ipa *ipa = interrupt->ipa;
160 	u32 mask = BIT(endpoint_id % 32);
161 	u32 unit = endpoint_id / 32;
162 	const struct ipa_reg *reg;
163 	u32 offset;
164 	u32 val;
165 
166 	WARN_ON(!test_bit(endpoint_id, ipa->available));
167 
168 	/* IPA version 3.0 does not support TX_SUSPEND interrupt control */
169 	if (ipa->version == IPA_VERSION_3_0)
170 		return;
171 
172 	reg = ipa_reg(ipa, IRQ_SUSPEND_EN);
173 	offset = ipa_reg_n_offset(reg, unit);
174 	val = ioread32(ipa->reg_virt + offset);
175 
176 	if (enable)
177 		val |= mask;
178 	else
179 		val &= ~mask;
180 
181 	iowrite32(val, ipa->reg_virt + offset);
182 }
183 
184 /* Enable TX_SUSPEND for an endpoint */
185 void
186 ipa_interrupt_suspend_enable(struct ipa_interrupt *interrupt, u32 endpoint_id)
187 {
188 	ipa_interrupt_suspend_control(interrupt, endpoint_id, true);
189 }
190 
191 /* Disable TX_SUSPEND for an endpoint */
192 void
193 ipa_interrupt_suspend_disable(struct ipa_interrupt *interrupt, u32 endpoint_id)
194 {
195 	ipa_interrupt_suspend_control(interrupt, endpoint_id, false);
196 }
197 
198 /* Clear the suspend interrupt for all endpoints that signaled it */
199 void ipa_interrupt_suspend_clear_all(struct ipa_interrupt *interrupt)
200 {
201 	struct ipa *ipa = interrupt->ipa;
202 	u32 unit_count;
203 	u32 unit;
204 
205 	unit_count = roundup(ipa->endpoint_count, 32);
206 	for (unit = 0; unit < unit_count; unit++) {
207 		const struct ipa_reg *reg;
208 		u32 val;
209 
210 		reg = ipa_reg(ipa, IRQ_SUSPEND_INFO);
211 		val = ioread32(ipa->reg_virt + ipa_reg_n_offset(reg, unit));
212 
213 		/* SUSPEND interrupt status isn't cleared on IPA version 3.0 */
214 		if (ipa->version == IPA_VERSION_3_0)
215 			continue;
216 
217 		reg = ipa_reg(ipa, IRQ_SUSPEND_CLR);
218 		iowrite32(val, ipa->reg_virt + ipa_reg_n_offset(reg, unit));
219 	}
220 }
221 
222 /* Simulate arrival of an IPA TX_SUSPEND interrupt */
223 void ipa_interrupt_simulate_suspend(struct ipa_interrupt *interrupt)
224 {
225 	ipa_interrupt_process(interrupt, IPA_IRQ_TX_SUSPEND);
226 }
227 
228 /* Configure the IPA interrupt framework */
229 struct ipa_interrupt *ipa_interrupt_config(struct ipa *ipa)
230 {
231 	struct device *dev = &ipa->pdev->dev;
232 	struct ipa_interrupt *interrupt;
233 	const struct ipa_reg *reg;
234 	unsigned int irq;
235 	int ret;
236 
237 	ret = platform_get_irq_byname(ipa->pdev, "ipa");
238 	if (ret <= 0) {
239 		dev_err(dev, "DT error %d getting \"ipa\" IRQ property\n",
240 			ret);
241 		return ERR_PTR(ret ? : -EINVAL);
242 	}
243 	irq = ret;
244 
245 	interrupt = kzalloc(sizeof(*interrupt), GFP_KERNEL);
246 	if (!interrupt)
247 		return ERR_PTR(-ENOMEM);
248 	interrupt->ipa = ipa;
249 	interrupt->irq = irq;
250 
251 	/* Start with all IPA interrupts disabled */
252 	reg = ipa_reg(ipa, IPA_IRQ_EN);
253 	iowrite32(0, ipa->reg_virt + ipa_reg_offset(reg));
254 
255 	ret = request_threaded_irq(irq, NULL, ipa_isr_thread, IRQF_ONESHOT,
256 				   "ipa", interrupt);
257 	if (ret) {
258 		dev_err(dev, "error %d requesting \"ipa\" IRQ\n", ret);
259 		goto err_kfree;
260 	}
261 
262 	ret = enable_irq_wake(irq);
263 	if (ret) {
264 		dev_err(dev, "error %d enabling wakeup for \"ipa\" IRQ\n", ret);
265 		goto err_free_irq;
266 	}
267 
268 	return interrupt;
269 
270 err_free_irq:
271 	free_irq(interrupt->irq, interrupt);
272 err_kfree:
273 	kfree(interrupt);
274 
275 	return ERR_PTR(ret);
276 }
277 
278 /* Inverse of ipa_interrupt_config() */
279 void ipa_interrupt_deconfig(struct ipa_interrupt *interrupt)
280 {
281 	struct device *dev = &interrupt->ipa->pdev->dev;
282 	int ret;
283 
284 	ret = disable_irq_wake(interrupt->irq);
285 	if (ret)
286 		dev_err(dev, "error %d disabling \"ipa\" IRQ wakeup\n", ret);
287 	free_irq(interrupt->irq, interrupt);
288 	kfree(interrupt);
289 }
290