1 /* 2 * http://www.cascoda.com/products/ca-821x/ 3 * Copyright (c) 2016, Cascoda, Ltd. 4 * All rights reserved. 5 * 6 * This code is dual-licensed under both GPLv2 and 3-clause BSD. What follows is 7 * the license notice for both respectively. 8 * 9 ******************************************************************************* 10 * 11 * This program is free software; you can redistribute it and/or 12 * modify it under the terms of the GNU General Public License 13 * as published by the Free Software Foundation; either version 2 14 * of the License, or (at your option) any later version. 15 * 16 * This program is distributed in the hope that it will be useful, 17 * but WITHOUT ANY WARRANTY; without even the implied warranty of 18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 19 * GNU General Public License for more details. 20 * 21 ******************************************************************************* 22 * 23 * Redistribution and use in source and binary forms, with or without 24 * modification, are permitted provided that the following conditions are met: 25 * 26 * 1. Redistributions of source code must retain the above copyright notice, 27 * this list of conditions and the following disclaimer. 28 * 29 * 2. Redistributions in binary form must reproduce the above copyright notice, 30 * this list of conditions and the following disclaimer in the documentation 31 * and/or other materials provided with the distribution. 32 * 33 * 3. Neither the name of the copyright holder nor the names of its contributors 34 * may be used to endorse or promote products derived from this software without 35 * specific prior written permission. 36 * 37 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 38 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 39 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 40 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE 41 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 42 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 43 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 44 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 45 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 46 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 47 * POSSIBILITY OF SUCH DAMAGE. 48 */ 49 50 #include <linux/cdev.h> 51 #include <linux/clk-provider.h> 52 #include <linux/debugfs.h> 53 #include <linux/delay.h> 54 #include <linux/gpio/consumer.h> 55 #include <linux/gpio.h> 56 #include <linux/ieee802154.h> 57 #include <linux/io.h> 58 #include <linux/kfifo.h> 59 #include <linux/of.h> 60 #include <linux/of_device.h> 61 #include <linux/of_gpio.h> 62 #include <linux/module.h> 63 #include <linux/mutex.h> 64 #include <linux/poll.h> 65 #include <linux/skbuff.h> 66 #include <linux/slab.h> 67 #include <linux/spi/spi.h> 68 #include <linux/spinlock.h> 69 #include <linux/string.h> 70 #include <linux/workqueue.h> 71 #include <linux/interrupt.h> 72 73 #include <net/ieee802154_netdev.h> 74 #include <net/mac802154.h> 75 76 #define DRIVER_NAME "ca8210" 77 78 /* external clock frequencies */ 79 #define ONE_MHZ 1000000 80 #define TWO_MHZ (2 * ONE_MHZ) 81 #define FOUR_MHZ (4 * ONE_MHZ) 82 #define EIGHT_MHZ (8 * ONE_MHZ) 83 #define SIXTEEN_MHZ (16 * ONE_MHZ) 84 85 /* spi constants */ 86 #define CA8210_SPI_BUF_SIZE 256 87 #define CA8210_SYNC_TIMEOUT 1000 /* Timeout for synchronous commands [ms] */ 88 89 /* test interface constants */ 90 #define CA8210_TEST_INT_FILE_NAME "ca8210_test" 91 #define CA8210_TEST_INT_FIFO_SIZE 256 92 93 /* HWME attribute IDs */ 94 #define HWME_EDTHRESHOLD (0x04) 95 #define HWME_EDVALUE (0x06) 96 #define HWME_SYSCLKOUT (0x0F) 97 #define HWME_LQILIMIT (0x11) 98 99 /* TDME attribute IDs */ 100 #define TDME_CHANNEL (0x00) 101 #define TDME_ATM_CONFIG (0x06) 102 103 #define MAX_HWME_ATTRIBUTE_SIZE 16 104 #define MAX_TDME_ATTRIBUTE_SIZE 2 105 106 /* PHY/MAC PIB Attribute Enumerations */ 107 #define PHY_CURRENT_CHANNEL (0x00) 108 #define PHY_TRANSMIT_POWER (0x02) 109 #define PHY_CCA_MODE (0x03) 110 #define MAC_ASSOCIATION_PERMIT (0x41) 111 #define MAC_AUTO_REQUEST (0x42) 112 #define MAC_BATT_LIFE_EXT (0x43) 113 #define MAC_BATT_LIFE_EXT_PERIODS (0x44) 114 #define MAC_BEACON_PAYLOAD (0x45) 115 #define MAC_BEACON_PAYLOAD_LENGTH (0x46) 116 #define MAC_BEACON_ORDER (0x47) 117 #define MAC_GTS_PERMIT (0x4d) 118 #define MAC_MAX_CSMA_BACKOFFS (0x4e) 119 #define MAC_MIN_BE (0x4f) 120 #define MAC_PAN_ID (0x50) 121 #define MAC_PROMISCUOUS_MODE (0x51) 122 #define MAC_RX_ON_WHEN_IDLE (0x52) 123 #define MAC_SHORT_ADDRESS (0x53) 124 #define MAC_SUPERFRAME_ORDER (0x54) 125 #define MAC_ASSOCIATED_PAN_COORD (0x56) 126 #define MAC_MAX_BE (0x57) 127 #define MAC_MAX_FRAME_RETRIES (0x59) 128 #define MAC_RESPONSE_WAIT_TIME (0x5A) 129 #define MAC_SECURITY_ENABLED (0x5D) 130 131 #define MAC_AUTO_REQUEST_SECURITY_LEVEL (0x78) 132 #define MAC_AUTO_REQUEST_KEY_ID_MODE (0x79) 133 134 #define NS_IEEE_ADDRESS (0xFF) /* Non-standard IEEE address */ 135 136 /* MAC Address Mode Definitions */ 137 #define MAC_MODE_NO_ADDR (0x00) 138 #define MAC_MODE_SHORT_ADDR (0x02) 139 #define MAC_MODE_LONG_ADDR (0x03) 140 141 /* MAC constants */ 142 #define MAX_BEACON_OVERHEAD (75) 143 #define MAX_BEACON_PAYLOAD_LENGTH (IEEE802154_MTU - MAX_BEACON_OVERHEAD) 144 145 #define MAX_ATTRIBUTE_SIZE (122) 146 #define MAX_DATA_SIZE (114) 147 148 #define CA8210_VALID_CHANNELS (0x07FFF800) 149 150 /* MAC workarounds for V1.1 and MPW silicon (V0.x) */ 151 #define CA8210_MAC_WORKAROUNDS (0) 152 #define CA8210_MAC_MPW (0) 153 154 /* memory manipulation macros */ 155 #define LS_BYTE(x) ((u8)((x) & 0xFF)) 156 #define MS_BYTE(x) ((u8)(((x) >> 8) & 0xFF)) 157 158 /* message ID codes in SPI commands */ 159 /* downstream */ 160 #define MCPS_DATA_REQUEST (0x00) 161 #define MLME_ASSOCIATE_REQUEST (0x02) 162 #define MLME_ASSOCIATE_RESPONSE (0x03) 163 #define MLME_DISASSOCIATE_REQUEST (0x04) 164 #define MLME_GET_REQUEST (0x05) 165 #define MLME_ORPHAN_RESPONSE (0x06) 166 #define MLME_RESET_REQUEST (0x07) 167 #define MLME_RX_ENABLE_REQUEST (0x08) 168 #define MLME_SCAN_REQUEST (0x09) 169 #define MLME_SET_REQUEST (0x0A) 170 #define MLME_START_REQUEST (0x0B) 171 #define MLME_POLL_REQUEST (0x0D) 172 #define HWME_SET_REQUEST (0x0E) 173 #define HWME_GET_REQUEST (0x0F) 174 #define TDME_SETSFR_REQUEST (0x11) 175 #define TDME_GETSFR_REQUEST (0x12) 176 #define TDME_SET_REQUEST (0x14) 177 /* upstream */ 178 #define MCPS_DATA_INDICATION (0x00) 179 #define MCPS_DATA_CONFIRM (0x01) 180 #define MLME_RESET_CONFIRM (0x0A) 181 #define MLME_SET_CONFIRM (0x0E) 182 #define MLME_START_CONFIRM (0x0F) 183 #define HWME_SET_CONFIRM (0x12) 184 #define HWME_GET_CONFIRM (0x13) 185 #define HWME_WAKEUP_INDICATION (0x15) 186 #define TDME_SETSFR_CONFIRM (0x17) 187 188 /* SPI command IDs */ 189 /* bit indicating a confirm or indication from slave to master */ 190 #define SPI_S2M (0x20) 191 /* bit indicating a synchronous message */ 192 #define SPI_SYN (0x40) 193 194 /* SPI command definitions */ 195 #define SPI_IDLE (0xFF) 196 #define SPI_NACK (0xF0) 197 198 #define SPI_MCPS_DATA_REQUEST (MCPS_DATA_REQUEST) 199 #define SPI_MCPS_DATA_INDICATION (MCPS_DATA_INDICATION + SPI_S2M) 200 #define SPI_MCPS_DATA_CONFIRM (MCPS_DATA_CONFIRM + SPI_S2M) 201 202 #define SPI_MLME_ASSOCIATE_REQUEST (MLME_ASSOCIATE_REQUEST) 203 #define SPI_MLME_RESET_REQUEST (MLME_RESET_REQUEST + SPI_SYN) 204 #define SPI_MLME_SET_REQUEST (MLME_SET_REQUEST + SPI_SYN) 205 #define SPI_MLME_START_REQUEST (MLME_START_REQUEST + SPI_SYN) 206 #define SPI_MLME_RESET_CONFIRM (MLME_RESET_CONFIRM + SPI_S2M + SPI_SYN) 207 #define SPI_MLME_SET_CONFIRM (MLME_SET_CONFIRM + SPI_S2M + SPI_SYN) 208 #define SPI_MLME_START_CONFIRM (MLME_START_CONFIRM + SPI_S2M + SPI_SYN) 209 210 #define SPI_HWME_SET_REQUEST (HWME_SET_REQUEST + SPI_SYN) 211 #define SPI_HWME_GET_REQUEST (HWME_GET_REQUEST + SPI_SYN) 212 #define SPI_HWME_SET_CONFIRM (HWME_SET_CONFIRM + SPI_S2M + SPI_SYN) 213 #define SPI_HWME_GET_CONFIRM (HWME_GET_CONFIRM + SPI_S2M + SPI_SYN) 214 #define SPI_HWME_WAKEUP_INDICATION (HWME_WAKEUP_INDICATION + SPI_S2M) 215 216 #define SPI_TDME_SETSFR_REQUEST (TDME_SETSFR_REQUEST + SPI_SYN) 217 #define SPI_TDME_SET_REQUEST (TDME_SET_REQUEST + SPI_SYN) 218 #define SPI_TDME_SETSFR_CONFIRM (TDME_SETSFR_CONFIRM + SPI_S2M + SPI_SYN) 219 220 /* TDME SFR addresses */ 221 /* Page 0 */ 222 #define CA8210_SFR_PACFG (0xB1) 223 #define CA8210_SFR_MACCON (0xD8) 224 #define CA8210_SFR_PACFGIB (0xFE) 225 /* Page 1 */ 226 #define CA8210_SFR_LOTXCAL (0xBF) 227 #define CA8210_SFR_PTHRH (0xD1) 228 #define CA8210_SFR_PRECFG (0xD3) 229 #define CA8210_SFR_LNAGX40 (0xE1) 230 #define CA8210_SFR_LNAGX41 (0xE2) 231 #define CA8210_SFR_LNAGX42 (0xE3) 232 #define CA8210_SFR_LNAGX43 (0xE4) 233 #define CA8210_SFR_LNAGX44 (0xE5) 234 #define CA8210_SFR_LNAGX45 (0xE6) 235 #define CA8210_SFR_LNAGX46 (0xE7) 236 #define CA8210_SFR_LNAGX47 (0xE9) 237 238 #define PACFGIB_DEFAULT_CURRENT (0x3F) 239 #define PTHRH_DEFAULT_THRESHOLD (0x5A) 240 #define LNAGX40_DEFAULT_GAIN (0x29) /* 10dB */ 241 #define LNAGX41_DEFAULT_GAIN (0x54) /* 21dB */ 242 #define LNAGX42_DEFAULT_GAIN (0x6C) /* 27dB */ 243 #define LNAGX43_DEFAULT_GAIN (0x7A) /* 30dB */ 244 #define LNAGX44_DEFAULT_GAIN (0x84) /* 33dB */ 245 #define LNAGX45_DEFAULT_GAIN (0x8B) /* 34dB */ 246 #define LNAGX46_DEFAULT_GAIN (0x92) /* 36dB */ 247 #define LNAGX47_DEFAULT_GAIN (0x96) /* 37dB */ 248 249 #define CA8210_IOCTL_HARD_RESET (0x00) 250 251 /* Structs/Enums */ 252 253 /** 254 * struct cas_control - spi transfer structure 255 * @msg: spi_message for each exchange 256 * @transfer: spi_transfer for each exchange 257 * @tx_buf: source array for transmission 258 * @tx_in_buf: array storing bytes received during transmission 259 * @priv: pointer to private data 260 * 261 * This structure stores all the necessary data passed around during a single 262 * spi exchange. 263 */ 264 struct cas_control { 265 struct spi_message msg; 266 struct spi_transfer transfer; 267 268 u8 tx_buf[CA8210_SPI_BUF_SIZE]; 269 u8 tx_in_buf[CA8210_SPI_BUF_SIZE]; 270 271 struct ca8210_priv *priv; 272 }; 273 274 /** 275 * struct ca8210_test - ca8210 test interface structure 276 * @ca8210_dfs_spi_int: pointer to the entry in the debug fs for this device 277 * @up_fifo: fifo for upstream messages 278 * @readq: read wait queue 279 * 280 * This structure stores all the data pertaining to the debug interface 281 */ 282 struct ca8210_test { 283 struct dentry *ca8210_dfs_spi_int; 284 struct kfifo up_fifo; 285 wait_queue_head_t readq; 286 }; 287 288 /** 289 * struct ca8210_priv - ca8210 private data structure 290 * @spi: pointer to the ca8210 spi device object 291 * @hw: pointer to the ca8210 ieee802154_hw object 292 * @hw_registered: true if hw has been registered with ieee802154 293 * @lock: spinlock protecting the private data area 294 * @mlme_workqueue: workqueue for triggering MLME Reset 295 * @irq_workqueue: workqueue for irq processing 296 * @tx_skb: current socket buffer to transmit 297 * @nextmsduhandle: msdu handle to pass to the 15.4 MAC layer for the 298 * next transmission 299 * @clk: external clock provided by the ca8210 300 * @last_dsn: sequence number of last data packet received, for 301 * resend detection 302 * @test: test interface data section for this instance 303 * @async_tx_pending: true if an asynchronous transmission was started and 304 * is not complete 305 * @sync_command_response: pointer to buffer to fill with sync response 306 * @ca8210_is_awake: nonzero if ca8210 is initialised, ready for comms 307 * @sync_down: counts number of downstream synchronous commands 308 * @sync_up: counts number of upstream synchronous commands 309 * @spi_transfer_complete: completion object for a single spi_transfer 310 * @sync_exchange_complete: completion object for a complete synchronous API 311 * exchange 312 * @promiscuous: whether the ca8210 is in promiscuous mode or not 313 * @retries: records how many times the current pending spi 314 * transfer has been retried 315 */ 316 struct ca8210_priv { 317 struct spi_device *spi; 318 struct ieee802154_hw *hw; 319 bool hw_registered; 320 spinlock_t lock; 321 struct workqueue_struct *mlme_workqueue; 322 struct workqueue_struct *irq_workqueue; 323 struct sk_buff *tx_skb; 324 u8 nextmsduhandle; 325 struct clk *clk; 326 int last_dsn; 327 struct ca8210_test test; 328 bool async_tx_pending; 329 u8 *sync_command_response; 330 struct completion ca8210_is_awake; 331 int sync_down, sync_up; 332 struct completion spi_transfer_complete, sync_exchange_complete; 333 bool promiscuous; 334 int retries; 335 }; 336 337 /** 338 * struct work_priv_container - link between a work object and the relevant 339 * device's private data 340 * @work: work object being executed 341 * @priv: device's private data section 342 * 343 */ 344 struct work_priv_container { 345 struct work_struct work; 346 struct ca8210_priv *priv; 347 }; 348 349 /** 350 * struct ca8210_platform_data - ca8210 platform data structure 351 * @extclockenable: true if the external clock is to be enabled 352 * @extclockfreq: frequency of the external clock 353 * @extclockgpio: ca8210 output gpio of the external clock 354 * @gpio_reset: gpio number of ca8210 reset line 355 * @gpio_irq: gpio number of ca8210 interrupt line 356 * @irq_id: identifier for the ca8210 irq 357 * 358 */ 359 struct ca8210_platform_data { 360 bool extclockenable; 361 unsigned int extclockfreq; 362 unsigned int extclockgpio; 363 int gpio_reset; 364 int gpio_irq; 365 int irq_id; 366 }; 367 368 /** 369 * struct fulladdr - full MAC addressing information structure 370 * @mode: address mode (none, short, extended) 371 * @pan_id: 16-bit LE pan id 372 * @address: LE address, variable length as specified by mode 373 * 374 */ 375 struct fulladdr { 376 u8 mode; 377 u8 pan_id[2]; 378 u8 address[8]; 379 }; 380 381 /** 382 * union macaddr: generic MAC address container 383 * @short_address: 16-bit short address 384 * @ieee_address: 64-bit extended address as LE byte array 385 * 386 */ 387 union macaddr { 388 u16 short_address; 389 u8 ieee_address[8]; 390 }; 391 392 /** 393 * struct secspec: security specification for SAP commands 394 * @security_level: 0-7, controls level of authentication & encryption 395 * @key_id_mode: 0-3, specifies how to obtain key 396 * @key_source: extended key retrieval data 397 * @key_index: single-byte key identifier 398 * 399 */ 400 struct secspec { 401 u8 security_level; 402 u8 key_id_mode; 403 u8 key_source[8]; 404 u8 key_index; 405 }; 406 407 /* downlink functions parameter set definitions */ 408 struct mcps_data_request_pset { 409 u8 src_addr_mode; 410 struct fulladdr dst; 411 u8 msdu_length; 412 u8 msdu_handle; 413 u8 tx_options; 414 u8 msdu[MAX_DATA_SIZE]; 415 }; 416 417 struct mlme_set_request_pset { 418 u8 pib_attribute; 419 u8 pib_attribute_index; 420 u8 pib_attribute_length; 421 u8 pib_attribute_value[MAX_ATTRIBUTE_SIZE]; 422 }; 423 424 struct hwme_set_request_pset { 425 u8 hw_attribute; 426 u8 hw_attribute_length; 427 u8 hw_attribute_value[MAX_HWME_ATTRIBUTE_SIZE]; 428 }; 429 430 struct hwme_get_request_pset { 431 u8 hw_attribute; 432 }; 433 434 struct tdme_setsfr_request_pset { 435 u8 sfr_page; 436 u8 sfr_address; 437 u8 sfr_value; 438 }; 439 440 /* uplink functions parameter set definitions */ 441 struct hwme_set_confirm_pset { 442 u8 status; 443 u8 hw_attribute; 444 }; 445 446 struct hwme_get_confirm_pset { 447 u8 status; 448 u8 hw_attribute; 449 u8 hw_attribute_length; 450 u8 hw_attribute_value[MAX_HWME_ATTRIBUTE_SIZE]; 451 }; 452 453 struct tdme_setsfr_confirm_pset { 454 u8 status; 455 u8 sfr_page; 456 u8 sfr_address; 457 }; 458 459 struct mac_message { 460 u8 command_id; 461 u8 length; 462 union { 463 struct mcps_data_request_pset data_req; 464 struct mlme_set_request_pset set_req; 465 struct hwme_set_request_pset hwme_set_req; 466 struct hwme_get_request_pset hwme_get_req; 467 struct tdme_setsfr_request_pset tdme_set_sfr_req; 468 struct hwme_set_confirm_pset hwme_set_cnf; 469 struct hwme_get_confirm_pset hwme_get_cnf; 470 struct tdme_setsfr_confirm_pset tdme_set_sfr_cnf; 471 u8 u8param; 472 u8 status; 473 u8 payload[148]; 474 } pdata; 475 }; 476 477 union pa_cfg_sfr { 478 struct { 479 u8 bias_current_trim : 3; 480 u8 /* reserved */ : 1; 481 u8 buffer_capacitor_trim : 3; 482 u8 boost : 1; 483 }; 484 u8 paib; 485 }; 486 487 struct preamble_cfg_sfr { 488 u8 timeout_symbols : 3; 489 u8 acquisition_symbols : 3; 490 u8 search_symbols : 2; 491 }; 492 493 static int (*cascoda_api_upstream)( 494 const u8 *buf, 495 size_t len, 496 void *device_ref 497 ); 498 499 /** 500 * link_to_linux_err() - Translates an 802.15.4 return code into the closest 501 * linux error 502 * @link_status: 802.15.4 status code 503 * 504 * Return: 0 or Linux error code 505 */ 506 static int link_to_linux_err(int link_status) 507 { 508 if (link_status < 0) { 509 /* status is already a Linux code */ 510 return link_status; 511 } 512 switch (link_status) { 513 case IEEE802154_SUCCESS: 514 case IEEE802154_REALIGNMENT: 515 return 0; 516 case IEEE802154_IMPROPER_KEY_TYPE: 517 return -EKEYREJECTED; 518 case IEEE802154_IMPROPER_SECURITY_LEVEL: 519 case IEEE802154_UNSUPPORTED_LEGACY: 520 case IEEE802154_DENIED: 521 return -EACCES; 522 case IEEE802154_BEACON_LOST: 523 case IEEE802154_NO_ACK: 524 case IEEE802154_NO_BEACON: 525 return -ENETUNREACH; 526 case IEEE802154_CHANNEL_ACCESS_FAILURE: 527 case IEEE802154_TX_ACTIVE: 528 case IEEE802154_SCAN_IN_PROGRESS: 529 return -EBUSY; 530 case IEEE802154_DISABLE_TRX_FAILURE: 531 case IEEE802154_OUT_OF_CAP: 532 return -EAGAIN; 533 case IEEE802154_FRAME_TOO_LONG: 534 return -EMSGSIZE; 535 case IEEE802154_INVALID_GTS: 536 case IEEE802154_PAST_TIME: 537 return -EBADSLT; 538 case IEEE802154_INVALID_HANDLE: 539 return -EBADMSG; 540 case IEEE802154_INVALID_PARAMETER: 541 case IEEE802154_UNSUPPORTED_ATTRIBUTE: 542 case IEEE802154_ON_TIME_TOO_LONG: 543 case IEEE802154_INVALID_INDEX: 544 return -EINVAL; 545 case IEEE802154_NO_DATA: 546 return -ENODATA; 547 case IEEE802154_NO_SHORT_ADDRESS: 548 return -EFAULT; 549 case IEEE802154_PAN_ID_CONFLICT: 550 return -EADDRINUSE; 551 case IEEE802154_TRANSACTION_EXPIRED: 552 return -ETIME; 553 case IEEE802154_TRANSACTION_OVERFLOW: 554 return -ENOBUFS; 555 case IEEE802154_UNAVAILABLE_KEY: 556 return -ENOKEY; 557 case IEEE802154_INVALID_ADDRESS: 558 return -ENXIO; 559 case IEEE802154_TRACKING_OFF: 560 case IEEE802154_SUPERFRAME_OVERLAP: 561 return -EREMOTEIO; 562 case IEEE802154_LIMIT_REACHED: 563 return -EDQUOT; 564 case IEEE802154_READ_ONLY: 565 return -EROFS; 566 default: 567 return -EPROTO; 568 } 569 } 570 571 /** 572 * ca8210_test_int_driver_write() - Writes a message to the test interface to be 573 * read by the userspace 574 * @buf: Buffer containing upstream message 575 * @len: length of message to write 576 * @spi: SPI device of message originator 577 * 578 * Return: 0 or linux error code 579 */ 580 static int ca8210_test_int_driver_write( 581 const u8 *buf, 582 size_t len, 583 void *spi 584 ) 585 { 586 struct ca8210_priv *priv = spi_get_drvdata(spi); 587 struct ca8210_test *test = &priv->test; 588 char *fifo_buffer; 589 int i; 590 591 dev_dbg( 592 &priv->spi->dev, 593 "test_interface: Buffering upstream message:\n" 594 ); 595 for (i = 0; i < len; i++) 596 dev_dbg(&priv->spi->dev, "%#03x\n", buf[i]); 597 598 fifo_buffer = kmemdup(buf, len, GFP_KERNEL); 599 if (!fifo_buffer) 600 return -ENOMEM; 601 kfifo_in(&test->up_fifo, &fifo_buffer, 4); 602 wake_up_interruptible(&priv->test.readq); 603 604 return 0; 605 } 606 607 /* SPI Operation */ 608 609 static int ca8210_net_rx( 610 struct ieee802154_hw *hw, 611 u8 *command, 612 size_t len 613 ); 614 static u8 mlme_reset_request_sync( 615 u8 set_default_pib, 616 void *device_ref 617 ); 618 static int ca8210_spi_transfer( 619 struct spi_device *spi, 620 const u8 *buf, 621 size_t len 622 ); 623 624 /** 625 * ca8210_reset_send() - Hard resets the ca8210 for a given time 626 * @spi: Pointer to target ca8210 spi device 627 * @ms: Milliseconds to hold the reset line low for 628 */ 629 static void ca8210_reset_send(struct spi_device *spi, unsigned int ms) 630 { 631 struct ca8210_platform_data *pdata = spi->dev.platform_data; 632 struct ca8210_priv *priv = spi_get_drvdata(spi); 633 long status; 634 635 gpio_set_value(pdata->gpio_reset, 0); 636 reinit_completion(&priv->ca8210_is_awake); 637 msleep(ms); 638 gpio_set_value(pdata->gpio_reset, 1); 639 priv->promiscuous = false; 640 641 /* Wait until wakeup indication seen */ 642 status = wait_for_completion_interruptible_timeout( 643 &priv->ca8210_is_awake, 644 msecs_to_jiffies(CA8210_SYNC_TIMEOUT) 645 ); 646 if (status == 0) { 647 dev_crit( 648 &spi->dev, 649 "Fatal: No wakeup from ca8210 after reset!\n" 650 ); 651 } 652 653 dev_dbg(&spi->dev, "Reset the device\n"); 654 } 655 656 /** 657 * ca8210_mlme_reset_worker() - Resets the MLME, Called when the MAC OVERFLOW 658 * condition happens. 659 * @work: Pointer to work being executed 660 */ 661 static void ca8210_mlme_reset_worker(struct work_struct *work) 662 { 663 struct work_priv_container *wpc = container_of( 664 work, 665 struct work_priv_container, 666 work 667 ); 668 struct ca8210_priv *priv = wpc->priv; 669 670 mlme_reset_request_sync(0, priv->spi); 671 kfree(wpc); 672 } 673 674 /** 675 * ca8210_rx_done() - Calls various message dispatches responding to a received 676 * command 677 * @cas_ctl: Pointer to the cas_control object for the relevant spi transfer 678 * 679 * Presents a received SAP command from the ca8210 to the Cascoda EVBME, test 680 * interface and network driver. 681 */ 682 static void ca8210_rx_done(struct cas_control *cas_ctl) 683 { 684 u8 *buf; 685 unsigned int len; 686 struct work_priv_container *mlme_reset_wpc; 687 struct ca8210_priv *priv = cas_ctl->priv; 688 689 buf = cas_ctl->tx_in_buf; 690 len = buf[1] + 2; 691 if (len > CA8210_SPI_BUF_SIZE) { 692 dev_crit( 693 &priv->spi->dev, 694 "Received packet len (%u) erroneously long\n", 695 len 696 ); 697 goto finish; 698 } 699 700 if (buf[0] & SPI_SYN) { 701 if (priv->sync_command_response) { 702 memcpy(priv->sync_command_response, buf, len); 703 complete(&priv->sync_exchange_complete); 704 } else { 705 if (cascoda_api_upstream) 706 cascoda_api_upstream(buf, len, priv->spi); 707 priv->sync_up++; 708 } 709 } else { 710 if (cascoda_api_upstream) 711 cascoda_api_upstream(buf, len, priv->spi); 712 } 713 714 ca8210_net_rx(priv->hw, buf, len); 715 if (buf[0] == SPI_MCPS_DATA_CONFIRM) { 716 if (buf[3] == IEEE802154_TRANSACTION_OVERFLOW) { 717 dev_info( 718 &priv->spi->dev, 719 "Waiting for transaction overflow to stabilise...\n"); 720 msleep(2000); 721 dev_info( 722 &priv->spi->dev, 723 "Resetting MAC...\n"); 724 725 mlme_reset_wpc = kmalloc(sizeof(*mlme_reset_wpc), 726 GFP_KERNEL); 727 if (!mlme_reset_wpc) 728 goto finish; 729 INIT_WORK( 730 &mlme_reset_wpc->work, 731 ca8210_mlme_reset_worker 732 ); 733 mlme_reset_wpc->priv = priv; 734 queue_work(priv->mlme_workqueue, &mlme_reset_wpc->work); 735 } 736 } else if (buf[0] == SPI_HWME_WAKEUP_INDICATION) { 737 dev_notice( 738 &priv->spi->dev, 739 "Wakeup indication received, reason:\n" 740 ); 741 switch (buf[2]) { 742 case 0: 743 dev_notice( 744 &priv->spi->dev, 745 "Transceiver woken up from Power Up / System Reset\n" 746 ); 747 break; 748 case 1: 749 dev_notice( 750 &priv->spi->dev, 751 "Watchdog Timer Time-Out\n" 752 ); 753 break; 754 case 2: 755 dev_notice( 756 &priv->spi->dev, 757 "Transceiver woken up from Power-Off by Sleep Timer Time-Out\n"); 758 break; 759 case 3: 760 dev_notice( 761 &priv->spi->dev, 762 "Transceiver woken up from Power-Off by GPIO Activity\n" 763 ); 764 break; 765 case 4: 766 dev_notice( 767 &priv->spi->dev, 768 "Transceiver woken up from Standby by Sleep Timer Time-Out\n" 769 ); 770 break; 771 case 5: 772 dev_notice( 773 &priv->spi->dev, 774 "Transceiver woken up from Standby by GPIO Activity\n" 775 ); 776 break; 777 case 6: 778 dev_notice( 779 &priv->spi->dev, 780 "Sleep-Timer Time-Out in Active Mode\n" 781 ); 782 break; 783 default: 784 dev_warn(&priv->spi->dev, "Wakeup reason unknown\n"); 785 break; 786 } 787 complete(&priv->ca8210_is_awake); 788 } 789 790 finish:; 791 } 792 793 static void ca8210_remove(struct spi_device *spi_device); 794 795 /** 796 * ca8210_spi_transfer_complete() - Called when a single spi transfer has 797 * completed 798 * @context: Pointer to the cas_control object for the finished transfer 799 */ 800 static void ca8210_spi_transfer_complete(void *context) 801 { 802 struct cas_control *cas_ctl = context; 803 struct ca8210_priv *priv = cas_ctl->priv; 804 bool duplex_rx = false; 805 int i; 806 u8 retry_buffer[CA8210_SPI_BUF_SIZE]; 807 808 if ( 809 cas_ctl->tx_in_buf[0] == SPI_NACK || 810 (cas_ctl->tx_in_buf[0] == SPI_IDLE && 811 cas_ctl->tx_in_buf[1] == SPI_NACK) 812 ) { 813 /* ca8210 is busy */ 814 dev_info(&priv->spi->dev, "ca8210 was busy during attempted write\n"); 815 if (cas_ctl->tx_buf[0] == SPI_IDLE) { 816 dev_warn( 817 &priv->spi->dev, 818 "IRQ servicing NACKd, dropping transfer\n" 819 ); 820 kfree(cas_ctl); 821 return; 822 } 823 if (priv->retries > 3) { 824 dev_err(&priv->spi->dev, "too many retries!\n"); 825 kfree(cas_ctl); 826 ca8210_remove(priv->spi); 827 return; 828 } 829 memcpy(retry_buffer, cas_ctl->tx_buf, CA8210_SPI_BUF_SIZE); 830 kfree(cas_ctl); 831 ca8210_spi_transfer( 832 priv->spi, 833 retry_buffer, 834 CA8210_SPI_BUF_SIZE 835 ); 836 priv->retries++; 837 dev_info(&priv->spi->dev, "retried spi write\n"); 838 return; 839 } else if ( 840 cas_ctl->tx_in_buf[0] != SPI_IDLE && 841 cas_ctl->tx_in_buf[0] != SPI_NACK 842 ) { 843 duplex_rx = true; 844 } 845 846 if (duplex_rx) { 847 dev_dbg(&priv->spi->dev, "READ CMD DURING TX\n"); 848 for (i = 0; i < cas_ctl->tx_in_buf[1] + 2; i++) 849 dev_dbg( 850 &priv->spi->dev, 851 "%#03x\n", 852 cas_ctl->tx_in_buf[i] 853 ); 854 ca8210_rx_done(cas_ctl); 855 } 856 complete(&priv->spi_transfer_complete); 857 kfree(cas_ctl); 858 priv->retries = 0; 859 } 860 861 /** 862 * ca8210_spi_transfer() - Initiate duplex spi transfer with ca8210 863 * @spi: Pointer to spi device for transfer 864 * @buf: Octet array to send 865 * @len: length of the buffer being sent 866 * 867 * Return: 0 or linux error code 868 */ 869 static int ca8210_spi_transfer( 870 struct spi_device *spi, 871 const u8 *buf, 872 size_t len 873 ) 874 { 875 int i, status = 0; 876 struct ca8210_priv *priv; 877 struct cas_control *cas_ctl; 878 879 if (!spi) { 880 pr_crit("NULL spi device passed to %s\n", __func__); 881 return -ENODEV; 882 } 883 884 priv = spi_get_drvdata(spi); 885 reinit_completion(&priv->spi_transfer_complete); 886 887 dev_dbg(&spi->dev, "%s called\n", __func__); 888 889 cas_ctl = kzalloc(sizeof(*cas_ctl), GFP_ATOMIC); 890 if (!cas_ctl) 891 return -ENOMEM; 892 893 cas_ctl->priv = priv; 894 memset(cas_ctl->tx_buf, SPI_IDLE, CA8210_SPI_BUF_SIZE); 895 memset(cas_ctl->tx_in_buf, SPI_IDLE, CA8210_SPI_BUF_SIZE); 896 memcpy(cas_ctl->tx_buf, buf, len); 897 898 for (i = 0; i < len; i++) 899 dev_dbg(&spi->dev, "%#03x\n", cas_ctl->tx_buf[i]); 900 901 spi_message_init(&cas_ctl->msg); 902 903 cas_ctl->transfer.tx_nbits = 1; /* 1 MOSI line */ 904 cas_ctl->transfer.rx_nbits = 1; /* 1 MISO line */ 905 cas_ctl->transfer.speed_hz = 0; /* Use device setting */ 906 cas_ctl->transfer.bits_per_word = 0; /* Use device setting */ 907 cas_ctl->transfer.tx_buf = cas_ctl->tx_buf; 908 cas_ctl->transfer.rx_buf = cas_ctl->tx_in_buf; 909 cas_ctl->transfer.delay.value = 0; 910 cas_ctl->transfer.delay.unit = SPI_DELAY_UNIT_USECS; 911 cas_ctl->transfer.cs_change = 0; 912 cas_ctl->transfer.len = sizeof(struct mac_message); 913 cas_ctl->msg.complete = ca8210_spi_transfer_complete; 914 cas_ctl->msg.context = cas_ctl; 915 916 spi_message_add_tail( 917 &cas_ctl->transfer, 918 &cas_ctl->msg 919 ); 920 921 status = spi_async(spi, &cas_ctl->msg); 922 if (status < 0) { 923 dev_crit( 924 &spi->dev, 925 "status %d from spi_sync in write\n", 926 status 927 ); 928 } 929 930 return status; 931 } 932 933 /** 934 * ca8210_spi_exchange() - Exchange API/SAP commands with the radio 935 * @buf: Octet array of command being sent downstream 936 * @len: length of buf 937 * @response: buffer for storing synchronous response 938 * @device_ref: spi_device pointer for ca8210 939 * 940 * Effectively calls ca8210_spi_transfer to write buf[] to the spi, then for 941 * synchronous commands waits for the corresponding response to be read from 942 * the spi before returning. The response is written to the response parameter. 943 * 944 * Return: 0 or linux error code 945 */ 946 static int ca8210_spi_exchange( 947 const u8 *buf, 948 size_t len, 949 u8 *response, 950 void *device_ref 951 ) 952 { 953 int status = 0; 954 struct spi_device *spi = device_ref; 955 struct ca8210_priv *priv = spi->dev.driver_data; 956 long wait_remaining; 957 958 if ((buf[0] & SPI_SYN) && response) { /* if sync wait for confirm */ 959 reinit_completion(&priv->sync_exchange_complete); 960 priv->sync_command_response = response; 961 } 962 963 do { 964 reinit_completion(&priv->spi_transfer_complete); 965 status = ca8210_spi_transfer(priv->spi, buf, len); 966 if (status) { 967 dev_warn( 968 &spi->dev, 969 "spi write failed, returned %d\n", 970 status 971 ); 972 if (status == -EBUSY) 973 continue; 974 if (((buf[0] & SPI_SYN) && response)) 975 complete(&priv->sync_exchange_complete); 976 goto cleanup; 977 } 978 979 wait_remaining = wait_for_completion_interruptible_timeout( 980 &priv->spi_transfer_complete, 981 msecs_to_jiffies(1000) 982 ); 983 if (wait_remaining == -ERESTARTSYS) { 984 status = -ERESTARTSYS; 985 } else if (wait_remaining == 0) { 986 dev_err( 987 &spi->dev, 988 "SPI downstream transfer timed out!\n" 989 ); 990 status = -ETIME; 991 goto cleanup; 992 } 993 } while (status < 0); 994 995 if (!((buf[0] & SPI_SYN) && response)) 996 goto cleanup; 997 998 wait_remaining = wait_for_completion_interruptible_timeout( 999 &priv->sync_exchange_complete, 1000 msecs_to_jiffies(CA8210_SYNC_TIMEOUT) 1001 ); 1002 if (wait_remaining == -ERESTARTSYS) { 1003 status = -ERESTARTSYS; 1004 } else if (wait_remaining == 0) { 1005 dev_err( 1006 &spi->dev, 1007 "Synchronous confirm timeout\n" 1008 ); 1009 status = -ETIME; 1010 } 1011 1012 cleanup: 1013 priv->sync_command_response = NULL; 1014 return status; 1015 } 1016 1017 /** 1018 * ca8210_interrupt_handler() - Called when an irq is received from the ca8210 1019 * @irq: Id of the irq being handled 1020 * @dev_id: Pointer passed by the system, pointing to the ca8210's private data 1021 * 1022 * This function is called when the irq line from the ca8210 is asserted, 1023 * signifying that the ca8210 has a message to send upstream to us. Starts the 1024 * asynchronous spi read. 1025 * 1026 * Return: irq return code 1027 */ 1028 static irqreturn_t ca8210_interrupt_handler(int irq, void *dev_id) 1029 { 1030 struct ca8210_priv *priv = dev_id; 1031 int status; 1032 1033 dev_dbg(&priv->spi->dev, "irq: Interrupt occurred\n"); 1034 do { 1035 status = ca8210_spi_transfer(priv->spi, NULL, 0); 1036 if (status && (status != -EBUSY)) { 1037 dev_warn( 1038 &priv->spi->dev, 1039 "spi read failed, returned %d\n", 1040 status 1041 ); 1042 } 1043 } while (status == -EBUSY); 1044 return IRQ_HANDLED; 1045 } 1046 1047 static int (*cascoda_api_downstream)( 1048 const u8 *buf, 1049 size_t len, 1050 u8 *response, 1051 void *device_ref 1052 ) = ca8210_spi_exchange; 1053 1054 /* Cascoda API / 15.4 SAP Primitives */ 1055 1056 /** 1057 * tdme_setsfr_request_sync() - TDME_SETSFR_request/confirm according to API 1058 * @sfr_page: SFR Page 1059 * @sfr_address: SFR Address 1060 * @sfr_value: SFR Value 1061 * @device_ref: Nondescript pointer to target device 1062 * 1063 * Return: 802.15.4 status code of TDME-SETSFR.confirm 1064 */ 1065 static u8 tdme_setsfr_request_sync( 1066 u8 sfr_page, 1067 u8 sfr_address, 1068 u8 sfr_value, 1069 void *device_ref 1070 ) 1071 { 1072 int ret; 1073 struct mac_message command, response; 1074 struct spi_device *spi = device_ref; 1075 1076 command.command_id = SPI_TDME_SETSFR_REQUEST; 1077 command.length = 3; 1078 command.pdata.tdme_set_sfr_req.sfr_page = sfr_page; 1079 command.pdata.tdme_set_sfr_req.sfr_address = sfr_address; 1080 command.pdata.tdme_set_sfr_req.sfr_value = sfr_value; 1081 response.command_id = SPI_IDLE; 1082 ret = cascoda_api_downstream( 1083 &command.command_id, 1084 command.length + 2, 1085 &response.command_id, 1086 device_ref 1087 ); 1088 if (ret) { 1089 dev_crit(&spi->dev, "cascoda_api_downstream returned %d", ret); 1090 return IEEE802154_SYSTEM_ERROR; 1091 } 1092 1093 if (response.command_id != SPI_TDME_SETSFR_CONFIRM) { 1094 dev_crit( 1095 &spi->dev, 1096 "sync response to SPI_TDME_SETSFR_REQUEST was not SPI_TDME_SETSFR_CONFIRM, it was %d\n", 1097 response.command_id 1098 ); 1099 return IEEE802154_SYSTEM_ERROR; 1100 } 1101 1102 return response.pdata.tdme_set_sfr_cnf.status; 1103 } 1104 1105 /** 1106 * tdme_chipinit() - TDME Chip Register Default Initialisation Macro 1107 * @device_ref: Nondescript pointer to target device 1108 * 1109 * Return: 802.15.4 status code of API calls 1110 */ 1111 static u8 tdme_chipinit(void *device_ref) 1112 { 1113 u8 status = IEEE802154_SUCCESS; 1114 u8 sfr_address; 1115 struct spi_device *spi = device_ref; 1116 struct preamble_cfg_sfr pre_cfg_value = { 1117 .timeout_symbols = 3, 1118 .acquisition_symbols = 3, 1119 .search_symbols = 1, 1120 }; 1121 /* LNA Gain Settings */ 1122 status = tdme_setsfr_request_sync( 1123 1, (sfr_address = CA8210_SFR_LNAGX40), 1124 LNAGX40_DEFAULT_GAIN, device_ref); 1125 if (status) 1126 goto finish; 1127 status = tdme_setsfr_request_sync( 1128 1, (sfr_address = CA8210_SFR_LNAGX41), 1129 LNAGX41_DEFAULT_GAIN, device_ref); 1130 if (status) 1131 goto finish; 1132 status = tdme_setsfr_request_sync( 1133 1, (sfr_address = CA8210_SFR_LNAGX42), 1134 LNAGX42_DEFAULT_GAIN, device_ref); 1135 if (status) 1136 goto finish; 1137 status = tdme_setsfr_request_sync( 1138 1, (sfr_address = CA8210_SFR_LNAGX43), 1139 LNAGX43_DEFAULT_GAIN, device_ref); 1140 if (status) 1141 goto finish; 1142 status = tdme_setsfr_request_sync( 1143 1, (sfr_address = CA8210_SFR_LNAGX44), 1144 LNAGX44_DEFAULT_GAIN, device_ref); 1145 if (status) 1146 goto finish; 1147 status = tdme_setsfr_request_sync( 1148 1, (sfr_address = CA8210_SFR_LNAGX45), 1149 LNAGX45_DEFAULT_GAIN, device_ref); 1150 if (status) 1151 goto finish; 1152 status = tdme_setsfr_request_sync( 1153 1, (sfr_address = CA8210_SFR_LNAGX46), 1154 LNAGX46_DEFAULT_GAIN, device_ref); 1155 if (status) 1156 goto finish; 1157 status = tdme_setsfr_request_sync( 1158 1, (sfr_address = CA8210_SFR_LNAGX47), 1159 LNAGX47_DEFAULT_GAIN, device_ref); 1160 if (status) 1161 goto finish; 1162 /* Preamble Timing Config */ 1163 status = tdme_setsfr_request_sync( 1164 1, (sfr_address = CA8210_SFR_PRECFG), 1165 *((u8 *)&pre_cfg_value), device_ref); 1166 if (status) 1167 goto finish; 1168 /* Preamble Threshold High */ 1169 status = tdme_setsfr_request_sync( 1170 1, (sfr_address = CA8210_SFR_PTHRH), 1171 PTHRH_DEFAULT_THRESHOLD, device_ref); 1172 if (status) 1173 goto finish; 1174 /* Tx Output Power 8 dBm */ 1175 status = tdme_setsfr_request_sync( 1176 0, (sfr_address = CA8210_SFR_PACFGIB), 1177 PACFGIB_DEFAULT_CURRENT, device_ref); 1178 if (status) 1179 goto finish; 1180 1181 finish: 1182 if (status != IEEE802154_SUCCESS) { 1183 dev_err( 1184 &spi->dev, 1185 "failed to set sfr at %#03x, status = %#03x\n", 1186 sfr_address, 1187 status 1188 ); 1189 } 1190 return status; 1191 } 1192 1193 /** 1194 * tdme_channelinit() - TDME Channel Register Default Initialisation Macro (Tx) 1195 * @channel: 802.15.4 channel to initialise chip for 1196 * @device_ref: Nondescript pointer to target device 1197 * 1198 * Return: 802.15.4 status code of API calls 1199 */ 1200 static u8 tdme_channelinit(u8 channel, void *device_ref) 1201 { 1202 /* Transceiver front-end local oscillator tx two-point calibration 1203 * value. Tuned for the hardware. 1204 */ 1205 u8 txcalval; 1206 1207 if (channel >= 25) 1208 txcalval = 0xA7; 1209 else if (channel >= 23) 1210 txcalval = 0xA8; 1211 else if (channel >= 22) 1212 txcalval = 0xA9; 1213 else if (channel >= 20) 1214 txcalval = 0xAA; 1215 else if (channel >= 17) 1216 txcalval = 0xAB; 1217 else if (channel >= 16) 1218 txcalval = 0xAC; 1219 else if (channel >= 14) 1220 txcalval = 0xAD; 1221 else if (channel >= 12) 1222 txcalval = 0xAE; 1223 else 1224 txcalval = 0xAF; 1225 1226 return tdme_setsfr_request_sync( 1227 1, 1228 CA8210_SFR_LOTXCAL, 1229 txcalval, 1230 device_ref 1231 ); /* LO Tx Cal */ 1232 } 1233 1234 /** 1235 * tdme_checkpibattribute() - Checks Attribute Values that are not checked in 1236 * MAC 1237 * @pib_attribute: Attribute Number 1238 * @pib_attribute_length: Attribute length 1239 * @pib_attribute_value: Pointer to Attribute Value 1240 * 1241 * Return: 802.15.4 status code of checks 1242 */ 1243 static u8 tdme_checkpibattribute( 1244 u8 pib_attribute, 1245 u8 pib_attribute_length, 1246 const void *pib_attribute_value 1247 ) 1248 { 1249 u8 status = IEEE802154_SUCCESS; 1250 u8 value; 1251 1252 value = *((u8 *)pib_attribute_value); 1253 1254 switch (pib_attribute) { 1255 /* PHY */ 1256 case PHY_TRANSMIT_POWER: 1257 if (value > 0x3F) 1258 status = IEEE802154_INVALID_PARAMETER; 1259 break; 1260 case PHY_CCA_MODE: 1261 if (value > 0x03) 1262 status = IEEE802154_INVALID_PARAMETER; 1263 break; 1264 /* MAC */ 1265 case MAC_BATT_LIFE_EXT_PERIODS: 1266 if (value < 6 || value > 41) 1267 status = IEEE802154_INVALID_PARAMETER; 1268 break; 1269 case MAC_BEACON_PAYLOAD: 1270 if (pib_attribute_length > MAX_BEACON_PAYLOAD_LENGTH) 1271 status = IEEE802154_INVALID_PARAMETER; 1272 break; 1273 case MAC_BEACON_PAYLOAD_LENGTH: 1274 if (value > MAX_BEACON_PAYLOAD_LENGTH) 1275 status = IEEE802154_INVALID_PARAMETER; 1276 break; 1277 case MAC_BEACON_ORDER: 1278 if (value > 15) 1279 status = IEEE802154_INVALID_PARAMETER; 1280 break; 1281 case MAC_MAX_BE: 1282 if (value < 3 || value > 8) 1283 status = IEEE802154_INVALID_PARAMETER; 1284 break; 1285 case MAC_MAX_CSMA_BACKOFFS: 1286 if (value > 5) 1287 status = IEEE802154_INVALID_PARAMETER; 1288 break; 1289 case MAC_MAX_FRAME_RETRIES: 1290 if (value > 7) 1291 status = IEEE802154_INVALID_PARAMETER; 1292 break; 1293 case MAC_MIN_BE: 1294 if (value > 8) 1295 status = IEEE802154_INVALID_PARAMETER; 1296 break; 1297 case MAC_RESPONSE_WAIT_TIME: 1298 if (value < 2 || value > 64) 1299 status = IEEE802154_INVALID_PARAMETER; 1300 break; 1301 case MAC_SUPERFRAME_ORDER: 1302 if (value > 15) 1303 status = IEEE802154_INVALID_PARAMETER; 1304 break; 1305 /* boolean */ 1306 case MAC_ASSOCIATED_PAN_COORD: 1307 case MAC_ASSOCIATION_PERMIT: 1308 case MAC_AUTO_REQUEST: 1309 case MAC_BATT_LIFE_EXT: 1310 case MAC_GTS_PERMIT: 1311 case MAC_PROMISCUOUS_MODE: 1312 case MAC_RX_ON_WHEN_IDLE: 1313 case MAC_SECURITY_ENABLED: 1314 if (value > 1) 1315 status = IEEE802154_INVALID_PARAMETER; 1316 break; 1317 /* MAC SEC */ 1318 case MAC_AUTO_REQUEST_SECURITY_LEVEL: 1319 if (value > 7) 1320 status = IEEE802154_INVALID_PARAMETER; 1321 break; 1322 case MAC_AUTO_REQUEST_KEY_ID_MODE: 1323 if (value > 3) 1324 status = IEEE802154_INVALID_PARAMETER; 1325 break; 1326 default: 1327 break; 1328 } 1329 1330 return status; 1331 } 1332 1333 /** 1334 * tdme_settxpower() - Sets the tx power for MLME_SET phyTransmitPower 1335 * @txp: Transmit Power 1336 * @device_ref: Nondescript pointer to target device 1337 * 1338 * Normalised to 802.15.4 Definition (6-bit, signed): 1339 * Bit 7-6: not used 1340 * Bit 5-0: tx power (-32 - +31 dB) 1341 * 1342 * Return: 802.15.4 status code of api calls 1343 */ 1344 static u8 tdme_settxpower(u8 txp, void *device_ref) 1345 { 1346 u8 status; 1347 s8 txp_val; 1348 u8 txp_ext; 1349 union pa_cfg_sfr pa_cfg_val; 1350 1351 /* extend from 6 to 8 bit */ 1352 txp_ext = 0x3F & txp; 1353 if (txp_ext & 0x20) 1354 txp_ext += 0xC0; 1355 txp_val = (s8)txp_ext; 1356 1357 if (CA8210_MAC_MPW) { 1358 if (txp_val > 0) { 1359 /* 8 dBm: ptrim = 5, itrim = +3 => +4 dBm */ 1360 pa_cfg_val.bias_current_trim = 3; 1361 pa_cfg_val.buffer_capacitor_trim = 5; 1362 pa_cfg_val.boost = 1; 1363 } else { 1364 /* 0 dBm: ptrim = 7, itrim = +3 => -6 dBm */ 1365 pa_cfg_val.bias_current_trim = 3; 1366 pa_cfg_val.buffer_capacitor_trim = 7; 1367 pa_cfg_val.boost = 0; 1368 } 1369 /* write PACFG */ 1370 status = tdme_setsfr_request_sync( 1371 0, 1372 CA8210_SFR_PACFG, 1373 pa_cfg_val.paib, 1374 device_ref 1375 ); 1376 } else { 1377 /* Look-Up Table for Setting Current and Frequency Trim values 1378 * for desired Output Power 1379 */ 1380 if (txp_val > 8) { 1381 pa_cfg_val.paib = 0x3F; 1382 } else if (txp_val == 8) { 1383 pa_cfg_val.paib = 0x32; 1384 } else if (txp_val == 7) { 1385 pa_cfg_val.paib = 0x22; 1386 } else if (txp_val == 6) { 1387 pa_cfg_val.paib = 0x18; 1388 } else if (txp_val == 5) { 1389 pa_cfg_val.paib = 0x10; 1390 } else if (txp_val == 4) { 1391 pa_cfg_val.paib = 0x0C; 1392 } else if (txp_val == 3) { 1393 pa_cfg_val.paib = 0x08; 1394 } else if (txp_val == 2) { 1395 pa_cfg_val.paib = 0x05; 1396 } else if (txp_val == 1) { 1397 pa_cfg_val.paib = 0x03; 1398 } else if (txp_val == 0) { 1399 pa_cfg_val.paib = 0x01; 1400 } else { /* < 0 */ 1401 pa_cfg_val.paib = 0x00; 1402 } 1403 /* write PACFGIB */ 1404 status = tdme_setsfr_request_sync( 1405 0, 1406 CA8210_SFR_PACFGIB, 1407 pa_cfg_val.paib, 1408 device_ref 1409 ); 1410 } 1411 1412 return status; 1413 } 1414 1415 /** 1416 * mcps_data_request() - mcps_data_request (Send Data) according to API Spec 1417 * @src_addr_mode: Source Addressing Mode 1418 * @dst_address_mode: Destination Addressing Mode 1419 * @dst_pan_id: Destination PAN ID 1420 * @dst_addr: Pointer to Destination Address 1421 * @msdu_length: length of Data 1422 * @msdu: Pointer to Data 1423 * @msdu_handle: Handle of Data 1424 * @tx_options: Tx Options Bit Field 1425 * @security: Pointer to Security Structure or NULL 1426 * @device_ref: Nondescript pointer to target device 1427 * 1428 * Return: 802.15.4 status code of action 1429 */ 1430 static u8 mcps_data_request( 1431 u8 src_addr_mode, 1432 u8 dst_address_mode, 1433 u16 dst_pan_id, 1434 union macaddr *dst_addr, 1435 u8 msdu_length, 1436 u8 *msdu, 1437 u8 msdu_handle, 1438 u8 tx_options, 1439 struct secspec *security, 1440 void *device_ref 1441 ) 1442 { 1443 struct secspec *psec; 1444 struct mac_message command; 1445 1446 command.command_id = SPI_MCPS_DATA_REQUEST; 1447 command.pdata.data_req.src_addr_mode = src_addr_mode; 1448 command.pdata.data_req.dst.mode = dst_address_mode; 1449 if (dst_address_mode != MAC_MODE_NO_ADDR) { 1450 command.pdata.data_req.dst.pan_id[0] = LS_BYTE(dst_pan_id); 1451 command.pdata.data_req.dst.pan_id[1] = MS_BYTE(dst_pan_id); 1452 if (dst_address_mode == MAC_MODE_SHORT_ADDR) { 1453 command.pdata.data_req.dst.address[0] = LS_BYTE( 1454 dst_addr->short_address 1455 ); 1456 command.pdata.data_req.dst.address[1] = MS_BYTE( 1457 dst_addr->short_address 1458 ); 1459 } else { /* MAC_MODE_LONG_ADDR*/ 1460 memcpy( 1461 command.pdata.data_req.dst.address, 1462 dst_addr->ieee_address, 1463 8 1464 ); 1465 } 1466 } 1467 command.pdata.data_req.msdu_length = msdu_length; 1468 command.pdata.data_req.msdu_handle = msdu_handle; 1469 command.pdata.data_req.tx_options = tx_options; 1470 memcpy(command.pdata.data_req.msdu, msdu, msdu_length); 1471 psec = (struct secspec *)(command.pdata.data_req.msdu + msdu_length); 1472 command.length = sizeof(struct mcps_data_request_pset) - 1473 MAX_DATA_SIZE + msdu_length; 1474 if (!security || security->security_level == 0) { 1475 psec->security_level = 0; 1476 command.length += 1; 1477 } else { 1478 *psec = *security; 1479 command.length += sizeof(struct secspec); 1480 } 1481 1482 if (ca8210_spi_transfer(device_ref, &command.command_id, 1483 command.length + 2)) 1484 return IEEE802154_SYSTEM_ERROR; 1485 1486 return IEEE802154_SUCCESS; 1487 } 1488 1489 /** 1490 * mlme_reset_request_sync() - MLME_RESET_request/confirm according to API Spec 1491 * @set_default_pib: Set defaults in PIB 1492 * @device_ref: Nondescript pointer to target device 1493 * 1494 * Return: 802.15.4 status code of MLME-RESET.confirm 1495 */ 1496 static u8 mlme_reset_request_sync( 1497 u8 set_default_pib, 1498 void *device_ref 1499 ) 1500 { 1501 u8 status; 1502 struct mac_message command, response; 1503 struct spi_device *spi = device_ref; 1504 1505 command.command_id = SPI_MLME_RESET_REQUEST; 1506 command.length = 1; 1507 command.pdata.u8param = set_default_pib; 1508 1509 if (cascoda_api_downstream( 1510 &command.command_id, 1511 command.length + 2, 1512 &response.command_id, 1513 device_ref)) { 1514 dev_err(&spi->dev, "cascoda_api_downstream failed\n"); 1515 return IEEE802154_SYSTEM_ERROR; 1516 } 1517 1518 if (response.command_id != SPI_MLME_RESET_CONFIRM) 1519 return IEEE802154_SYSTEM_ERROR; 1520 1521 status = response.pdata.status; 1522 1523 /* reset COORD Bit for Channel Filtering as Coordinator */ 1524 if (CA8210_MAC_WORKAROUNDS && set_default_pib && !status) { 1525 status = tdme_setsfr_request_sync( 1526 0, 1527 CA8210_SFR_MACCON, 1528 0, 1529 device_ref 1530 ); 1531 } 1532 1533 return status; 1534 } 1535 1536 /** 1537 * mlme_set_request_sync() - MLME_SET_request/confirm according to API Spec 1538 * @pib_attribute: Attribute Number 1539 * @pib_attribute_index: Index within Attribute if an Array 1540 * @pib_attribute_length: Attribute length 1541 * @pib_attribute_value: Pointer to Attribute Value 1542 * @device_ref: Nondescript pointer to target device 1543 * 1544 * Return: 802.15.4 status code of MLME-SET.confirm 1545 */ 1546 static u8 mlme_set_request_sync( 1547 u8 pib_attribute, 1548 u8 pib_attribute_index, 1549 u8 pib_attribute_length, 1550 const void *pib_attribute_value, 1551 void *device_ref 1552 ) 1553 { 1554 u8 status; 1555 struct mac_message command, response; 1556 1557 /* pre-check the validity of pib_attribute values that are not checked 1558 * in MAC 1559 */ 1560 if (tdme_checkpibattribute( 1561 pib_attribute, pib_attribute_length, pib_attribute_value)) { 1562 return IEEE802154_INVALID_PARAMETER; 1563 } 1564 1565 if (pib_attribute == PHY_CURRENT_CHANNEL) { 1566 status = tdme_channelinit( 1567 *((u8 *)pib_attribute_value), 1568 device_ref 1569 ); 1570 if (status) 1571 return status; 1572 } 1573 1574 if (pib_attribute == PHY_TRANSMIT_POWER) { 1575 return tdme_settxpower( 1576 *((u8 *)pib_attribute_value), 1577 device_ref 1578 ); 1579 } 1580 1581 command.command_id = SPI_MLME_SET_REQUEST; 1582 command.length = sizeof(struct mlme_set_request_pset) - 1583 MAX_ATTRIBUTE_SIZE + pib_attribute_length; 1584 command.pdata.set_req.pib_attribute = pib_attribute; 1585 command.pdata.set_req.pib_attribute_index = pib_attribute_index; 1586 command.pdata.set_req.pib_attribute_length = pib_attribute_length; 1587 memcpy( 1588 command.pdata.set_req.pib_attribute_value, 1589 pib_attribute_value, 1590 pib_attribute_length 1591 ); 1592 1593 if (cascoda_api_downstream( 1594 &command.command_id, 1595 command.length + 2, 1596 &response.command_id, 1597 device_ref)) { 1598 return IEEE802154_SYSTEM_ERROR; 1599 } 1600 1601 if (response.command_id != SPI_MLME_SET_CONFIRM) 1602 return IEEE802154_SYSTEM_ERROR; 1603 1604 return response.pdata.status; 1605 } 1606 1607 /** 1608 * hwme_set_request_sync() - HWME_SET_request/confirm according to API Spec 1609 * @hw_attribute: Attribute Number 1610 * @hw_attribute_length: Attribute length 1611 * @hw_attribute_value: Pointer to Attribute Value 1612 * @device_ref: Nondescript pointer to target device 1613 * 1614 * Return: 802.15.4 status code of HWME-SET.confirm 1615 */ 1616 static u8 hwme_set_request_sync( 1617 u8 hw_attribute, 1618 u8 hw_attribute_length, 1619 u8 *hw_attribute_value, 1620 void *device_ref 1621 ) 1622 { 1623 struct mac_message command, response; 1624 1625 command.command_id = SPI_HWME_SET_REQUEST; 1626 command.length = 2 + hw_attribute_length; 1627 command.pdata.hwme_set_req.hw_attribute = hw_attribute; 1628 command.pdata.hwme_set_req.hw_attribute_length = hw_attribute_length; 1629 memcpy( 1630 command.pdata.hwme_set_req.hw_attribute_value, 1631 hw_attribute_value, 1632 hw_attribute_length 1633 ); 1634 1635 if (cascoda_api_downstream( 1636 &command.command_id, 1637 command.length + 2, 1638 &response.command_id, 1639 device_ref)) { 1640 return IEEE802154_SYSTEM_ERROR; 1641 } 1642 1643 if (response.command_id != SPI_HWME_SET_CONFIRM) 1644 return IEEE802154_SYSTEM_ERROR; 1645 1646 return response.pdata.hwme_set_cnf.status; 1647 } 1648 1649 /** 1650 * hwme_get_request_sync() - HWME_GET_request/confirm according to API Spec 1651 * @hw_attribute: Attribute Number 1652 * @hw_attribute_length: Attribute length 1653 * @hw_attribute_value: Pointer to Attribute Value 1654 * @device_ref: Nondescript pointer to target device 1655 * 1656 * Return: 802.15.4 status code of HWME-GET.confirm 1657 */ 1658 static u8 hwme_get_request_sync( 1659 u8 hw_attribute, 1660 u8 *hw_attribute_length, 1661 u8 *hw_attribute_value, 1662 void *device_ref 1663 ) 1664 { 1665 struct mac_message command, response; 1666 1667 command.command_id = SPI_HWME_GET_REQUEST; 1668 command.length = 1; 1669 command.pdata.hwme_get_req.hw_attribute = hw_attribute; 1670 1671 if (cascoda_api_downstream( 1672 &command.command_id, 1673 command.length + 2, 1674 &response.command_id, 1675 device_ref)) { 1676 return IEEE802154_SYSTEM_ERROR; 1677 } 1678 1679 if (response.command_id != SPI_HWME_GET_CONFIRM) 1680 return IEEE802154_SYSTEM_ERROR; 1681 1682 if (response.pdata.hwme_get_cnf.status == IEEE802154_SUCCESS) { 1683 *hw_attribute_length = 1684 response.pdata.hwme_get_cnf.hw_attribute_length; 1685 memcpy( 1686 hw_attribute_value, 1687 response.pdata.hwme_get_cnf.hw_attribute_value, 1688 *hw_attribute_length 1689 ); 1690 } 1691 1692 return response.pdata.hwme_get_cnf.status; 1693 } 1694 1695 /* Network driver operation */ 1696 1697 /** 1698 * ca8210_async_xmit_complete() - Called to announce that an asynchronous 1699 * transmission has finished 1700 * @hw: ieee802154_hw of ca8210 that has finished exchange 1701 * @msduhandle: Identifier of transmission that has completed 1702 * @status: Returned 802.15.4 status code of the transmission 1703 * 1704 * Return: 0 or linux error code 1705 */ 1706 static int ca8210_async_xmit_complete( 1707 struct ieee802154_hw *hw, 1708 u8 msduhandle, 1709 u8 status) 1710 { 1711 struct ca8210_priv *priv = hw->priv; 1712 1713 if (priv->nextmsduhandle != msduhandle) { 1714 dev_err( 1715 &priv->spi->dev, 1716 "Unexpected msdu_handle on data confirm, Expected %d, got %d\n", 1717 priv->nextmsduhandle, 1718 msduhandle 1719 ); 1720 return -EIO; 1721 } 1722 1723 priv->async_tx_pending = false; 1724 priv->nextmsduhandle++; 1725 1726 if (status) { 1727 dev_err( 1728 &priv->spi->dev, 1729 "Link transmission unsuccessful, status = %d\n", 1730 status 1731 ); 1732 if (status != IEEE802154_TRANSACTION_OVERFLOW) { 1733 ieee802154_xmit_error(priv->hw, priv->tx_skb, status); 1734 return 0; 1735 } 1736 } 1737 ieee802154_xmit_complete(priv->hw, priv->tx_skb, true); 1738 1739 return 0; 1740 } 1741 1742 /** 1743 * ca8210_skb_rx() - Contructs a properly framed socket buffer from a received 1744 * MCPS_DATA_indication 1745 * @hw: ieee802154_hw that MCPS_DATA_indication was received by 1746 * @len: length of MCPS_DATA_indication 1747 * @data_ind: Octet array of MCPS_DATA_indication 1748 * 1749 * Called by the spi driver whenever a SAP command is received, this function 1750 * will ascertain whether the command is of interest to the network driver and 1751 * take necessary action. 1752 * 1753 * Return: 0 or linux error code 1754 */ 1755 static int ca8210_skb_rx( 1756 struct ieee802154_hw *hw, 1757 size_t len, 1758 u8 *data_ind 1759 ) 1760 { 1761 struct ieee802154_hdr hdr; 1762 int msdulen; 1763 int hlen; 1764 u8 mpdulinkquality = data_ind[23]; 1765 struct sk_buff *skb; 1766 struct ca8210_priv *priv = hw->priv; 1767 1768 /* Allocate mtu size buffer for every rx packet */ 1769 skb = dev_alloc_skb(IEEE802154_MTU + sizeof(hdr)); 1770 if (!skb) 1771 return -ENOMEM; 1772 1773 skb_reserve(skb, sizeof(hdr)); 1774 1775 msdulen = data_ind[22]; /* msdu_length */ 1776 if (msdulen > IEEE802154_MTU) { 1777 dev_err( 1778 &priv->spi->dev, 1779 "received erroneously large msdu length!\n" 1780 ); 1781 kfree_skb(skb); 1782 return -EMSGSIZE; 1783 } 1784 dev_dbg(&priv->spi->dev, "skb buffer length = %d\n", msdulen); 1785 1786 if (priv->promiscuous) 1787 goto copy_payload; 1788 1789 /* Populate hdr */ 1790 hdr.sec.level = data_ind[29 + msdulen]; 1791 dev_dbg(&priv->spi->dev, "security level: %#03x\n", hdr.sec.level); 1792 if (hdr.sec.level > 0) { 1793 hdr.sec.key_id_mode = data_ind[30 + msdulen]; 1794 memcpy(&hdr.sec.extended_src, &data_ind[31 + msdulen], 8); 1795 hdr.sec.key_id = data_ind[39 + msdulen]; 1796 } 1797 hdr.source.mode = data_ind[0]; 1798 dev_dbg(&priv->spi->dev, "srcAddrMode: %#03x\n", hdr.source.mode); 1799 hdr.source.pan_id = *(u16 *)&data_ind[1]; 1800 dev_dbg(&priv->spi->dev, "srcPanId: %#06x\n", hdr.source.pan_id); 1801 memcpy(&hdr.source.extended_addr, &data_ind[3], 8); 1802 hdr.dest.mode = data_ind[11]; 1803 dev_dbg(&priv->spi->dev, "dstAddrMode: %#03x\n", hdr.dest.mode); 1804 hdr.dest.pan_id = *(u16 *)&data_ind[12]; 1805 dev_dbg(&priv->spi->dev, "dstPanId: %#06x\n", hdr.dest.pan_id); 1806 memcpy(&hdr.dest.extended_addr, &data_ind[14], 8); 1807 1808 /* Fill in FC implicitly */ 1809 hdr.fc.type = 1; /* Data frame */ 1810 if (hdr.sec.level) 1811 hdr.fc.security_enabled = 1; 1812 else 1813 hdr.fc.security_enabled = 0; 1814 if (data_ind[1] != data_ind[12] || data_ind[2] != data_ind[13]) 1815 hdr.fc.intra_pan = 1; 1816 else 1817 hdr.fc.intra_pan = 0; 1818 hdr.fc.dest_addr_mode = hdr.dest.mode; 1819 hdr.fc.source_addr_mode = hdr.source.mode; 1820 1821 /* Add hdr to front of buffer */ 1822 hlen = ieee802154_hdr_push(skb, &hdr); 1823 1824 if (hlen < 0) { 1825 dev_crit(&priv->spi->dev, "failed to push mac hdr onto skb!\n"); 1826 kfree_skb(skb); 1827 return hlen; 1828 } 1829 1830 skb_reset_mac_header(skb); 1831 skb->mac_len = hlen; 1832 1833 copy_payload: 1834 /* Add <msdulen> bytes of space to the back of the buffer */ 1835 /* Copy msdu to skb */ 1836 skb_put_data(skb, &data_ind[29], msdulen); 1837 1838 ieee802154_rx_irqsafe(hw, skb, mpdulinkquality); 1839 return 0; 1840 } 1841 1842 /** 1843 * ca8210_net_rx() - Acts upon received SAP commands relevant to the network 1844 * driver 1845 * @hw: ieee802154_hw that command was received by 1846 * @command: Octet array of received command 1847 * @len: length of the received command 1848 * 1849 * Called by the spi driver whenever a SAP command is received, this function 1850 * will ascertain whether the command is of interest to the network driver and 1851 * take necessary action. 1852 * 1853 * Return: 0 or linux error code 1854 */ 1855 static int ca8210_net_rx(struct ieee802154_hw *hw, u8 *command, size_t len) 1856 { 1857 struct ca8210_priv *priv = hw->priv; 1858 unsigned long flags; 1859 u8 status; 1860 1861 dev_dbg(&priv->spi->dev, "%s: CmdID = %d\n", __func__, command[0]); 1862 1863 if (command[0] == SPI_MCPS_DATA_INDICATION) { 1864 /* Received data */ 1865 spin_lock_irqsave(&priv->lock, flags); 1866 if (command[26] == priv->last_dsn) { 1867 dev_dbg( 1868 &priv->spi->dev, 1869 "DSN %d resend received, ignoring...\n", 1870 command[26] 1871 ); 1872 spin_unlock_irqrestore(&priv->lock, flags); 1873 return 0; 1874 } 1875 priv->last_dsn = command[26]; 1876 spin_unlock_irqrestore(&priv->lock, flags); 1877 return ca8210_skb_rx(hw, len - 2, command + 2); 1878 } else if (command[0] == SPI_MCPS_DATA_CONFIRM) { 1879 status = command[3]; 1880 if (priv->async_tx_pending) { 1881 return ca8210_async_xmit_complete( 1882 hw, 1883 command[2], 1884 status 1885 ); 1886 } 1887 } 1888 1889 return 0; 1890 } 1891 1892 /** 1893 * ca8210_skb_tx() - Transmits a given socket buffer using the ca8210 1894 * @skb: Socket buffer to transmit 1895 * @msduhandle: Data identifier to pass to the 802.15.4 MAC 1896 * @priv: Pointer to private data section of target ca8210 1897 * 1898 * Return: 0 or linux error code 1899 */ 1900 static int ca8210_skb_tx( 1901 struct sk_buff *skb, 1902 u8 msduhandle, 1903 struct ca8210_priv *priv 1904 ) 1905 { 1906 struct ieee802154_hdr header = { }; 1907 struct secspec secspec; 1908 int mac_len, status; 1909 1910 dev_dbg(&priv->spi->dev, "%s called\n", __func__); 1911 1912 /* Get addressing info from skb - ieee802154 layer creates a full 1913 * packet 1914 */ 1915 mac_len = ieee802154_hdr_peek_addrs(skb, &header); 1916 if (mac_len < 0) 1917 return mac_len; 1918 1919 secspec.security_level = header.sec.level; 1920 secspec.key_id_mode = header.sec.key_id_mode; 1921 if (secspec.key_id_mode == 2) 1922 memcpy(secspec.key_source, &header.sec.short_src, 4); 1923 else if (secspec.key_id_mode == 3) 1924 memcpy(secspec.key_source, &header.sec.extended_src, 8); 1925 secspec.key_index = header.sec.key_id; 1926 1927 /* Pass to Cascoda API */ 1928 status = mcps_data_request( 1929 header.source.mode, 1930 header.dest.mode, 1931 header.dest.pan_id, 1932 (union macaddr *)&header.dest.extended_addr, 1933 skb->len - mac_len, 1934 &skb->data[mac_len], 1935 msduhandle, 1936 header.fc.ack_request, 1937 &secspec, 1938 priv->spi 1939 ); 1940 return link_to_linux_err(status); 1941 } 1942 1943 /** 1944 * ca8210_start() - Starts the network driver 1945 * @hw: ieee802154_hw of ca8210 being started 1946 * 1947 * Return: 0 or linux error code 1948 */ 1949 static int ca8210_start(struct ieee802154_hw *hw) 1950 { 1951 int status; 1952 u8 rx_on_when_idle; 1953 u8 lqi_threshold = 0; 1954 struct ca8210_priv *priv = hw->priv; 1955 1956 priv->last_dsn = -1; 1957 /* Turn receiver on when idle for now just to test rx */ 1958 rx_on_when_idle = 1; 1959 status = mlme_set_request_sync( 1960 MAC_RX_ON_WHEN_IDLE, 1961 0, 1962 1, 1963 &rx_on_when_idle, 1964 priv->spi 1965 ); 1966 if (status) { 1967 dev_crit( 1968 &priv->spi->dev, 1969 "Setting rx_on_when_idle failed, status = %d\n", 1970 status 1971 ); 1972 return link_to_linux_err(status); 1973 } 1974 status = hwme_set_request_sync( 1975 HWME_LQILIMIT, 1976 1, 1977 &lqi_threshold, 1978 priv->spi 1979 ); 1980 if (status) { 1981 dev_crit( 1982 &priv->spi->dev, 1983 "Setting lqilimit failed, status = %d\n", 1984 status 1985 ); 1986 return link_to_linux_err(status); 1987 } 1988 1989 return 0; 1990 } 1991 1992 /** 1993 * ca8210_stop() - Stops the network driver 1994 * @hw: ieee802154_hw of ca8210 being stopped 1995 * 1996 * Return: 0 or linux error code 1997 */ 1998 static void ca8210_stop(struct ieee802154_hw *hw) 1999 { 2000 } 2001 2002 /** 2003 * ca8210_xmit_async() - Asynchronously transmits a given socket buffer using 2004 * the ca8210 2005 * @hw: ieee802154_hw of ca8210 to transmit from 2006 * @skb: Socket buffer to transmit 2007 * 2008 * Return: 0 or linux error code 2009 */ 2010 static int ca8210_xmit_async(struct ieee802154_hw *hw, struct sk_buff *skb) 2011 { 2012 struct ca8210_priv *priv = hw->priv; 2013 int status; 2014 2015 dev_dbg(&priv->spi->dev, "calling %s\n", __func__); 2016 2017 priv->tx_skb = skb; 2018 priv->async_tx_pending = true; 2019 status = ca8210_skb_tx(skb, priv->nextmsduhandle, priv); 2020 return status; 2021 } 2022 2023 /** 2024 * ca8210_get_ed() - Returns the measured energy on the current channel at this 2025 * instant in time 2026 * @hw: ieee802154_hw of target ca8210 2027 * @level: Measured Energy Detect level 2028 * 2029 * Return: 0 or linux error code 2030 */ 2031 static int ca8210_get_ed(struct ieee802154_hw *hw, u8 *level) 2032 { 2033 u8 lenvar; 2034 struct ca8210_priv *priv = hw->priv; 2035 2036 return link_to_linux_err( 2037 hwme_get_request_sync(HWME_EDVALUE, &lenvar, level, priv->spi) 2038 ); 2039 } 2040 2041 /** 2042 * ca8210_set_channel() - Sets the current operating 802.15.4 channel of the 2043 * ca8210 2044 * @hw: ieee802154_hw of target ca8210 2045 * @page: Channel page to set 2046 * @channel: Channel number to set 2047 * 2048 * Return: 0 or linux error code 2049 */ 2050 static int ca8210_set_channel( 2051 struct ieee802154_hw *hw, 2052 u8 page, 2053 u8 channel 2054 ) 2055 { 2056 u8 status; 2057 struct ca8210_priv *priv = hw->priv; 2058 2059 status = mlme_set_request_sync( 2060 PHY_CURRENT_CHANNEL, 2061 0, 2062 1, 2063 &channel, 2064 priv->spi 2065 ); 2066 if (status) { 2067 dev_err( 2068 &priv->spi->dev, 2069 "error setting channel, MLME-SET.confirm status = %d\n", 2070 status 2071 ); 2072 } 2073 return link_to_linux_err(status); 2074 } 2075 2076 /** 2077 * ca8210_set_hw_addr_filt() - Sets the address filtering parameters of the 2078 * ca8210 2079 * @hw: ieee802154_hw of target ca8210 2080 * @filt: Filtering parameters 2081 * @changed: Bitmap representing which parameters to change 2082 * 2083 * Effectively just sets the actual addressing information identifying this node 2084 * as all filtering is performed by the ca8210 as detailed in the IEEE 802.15.4 2085 * 2006 specification. 2086 * 2087 * Return: 0 or linux error code 2088 */ 2089 static int ca8210_set_hw_addr_filt( 2090 struct ieee802154_hw *hw, 2091 struct ieee802154_hw_addr_filt *filt, 2092 unsigned long changed 2093 ) 2094 { 2095 u8 status = 0; 2096 struct ca8210_priv *priv = hw->priv; 2097 2098 if (changed & IEEE802154_AFILT_PANID_CHANGED) { 2099 status = mlme_set_request_sync( 2100 MAC_PAN_ID, 2101 0, 2102 2, 2103 &filt->pan_id, priv->spi 2104 ); 2105 if (status) { 2106 dev_err( 2107 &priv->spi->dev, 2108 "error setting pan id, MLME-SET.confirm status = %d", 2109 status 2110 ); 2111 return link_to_linux_err(status); 2112 } 2113 } 2114 if (changed & IEEE802154_AFILT_SADDR_CHANGED) { 2115 status = mlme_set_request_sync( 2116 MAC_SHORT_ADDRESS, 2117 0, 2118 2, 2119 &filt->short_addr, priv->spi 2120 ); 2121 if (status) { 2122 dev_err( 2123 &priv->spi->dev, 2124 "error setting short address, MLME-SET.confirm status = %d", 2125 status 2126 ); 2127 return link_to_linux_err(status); 2128 } 2129 } 2130 if (changed & IEEE802154_AFILT_IEEEADDR_CHANGED) { 2131 status = mlme_set_request_sync( 2132 NS_IEEE_ADDRESS, 2133 0, 2134 8, 2135 &filt->ieee_addr, 2136 priv->spi 2137 ); 2138 if (status) { 2139 dev_err( 2140 &priv->spi->dev, 2141 "error setting ieee address, MLME-SET.confirm status = %d", 2142 status 2143 ); 2144 return link_to_linux_err(status); 2145 } 2146 } 2147 /* TODO: Should use MLME_START to set coord bit? */ 2148 return 0; 2149 } 2150 2151 /** 2152 * ca8210_set_tx_power() - Sets the transmit power of the ca8210 2153 * @hw: ieee802154_hw of target ca8210 2154 * @mbm: Transmit power in mBm (dBm*100) 2155 * 2156 * Return: 0 or linux error code 2157 */ 2158 static int ca8210_set_tx_power(struct ieee802154_hw *hw, s32 mbm) 2159 { 2160 struct ca8210_priv *priv = hw->priv; 2161 2162 mbm /= 100; 2163 return link_to_linux_err( 2164 mlme_set_request_sync(PHY_TRANSMIT_POWER, 0, 1, &mbm, priv->spi) 2165 ); 2166 } 2167 2168 /** 2169 * ca8210_set_cca_mode() - Sets the clear channel assessment mode of the ca8210 2170 * @hw: ieee802154_hw of target ca8210 2171 * @cca: CCA mode to set 2172 * 2173 * Return: 0 or linux error code 2174 */ 2175 static int ca8210_set_cca_mode( 2176 struct ieee802154_hw *hw, 2177 const struct wpan_phy_cca *cca 2178 ) 2179 { 2180 u8 status; 2181 u8 cca_mode; 2182 struct ca8210_priv *priv = hw->priv; 2183 2184 cca_mode = cca->mode & 3; 2185 if (cca_mode == 3 && cca->opt == NL802154_CCA_OPT_ENERGY_CARRIER_OR) { 2186 /* cca_mode 0 == CS OR ED, 3 == CS AND ED */ 2187 cca_mode = 0; 2188 } 2189 status = mlme_set_request_sync( 2190 PHY_CCA_MODE, 2191 0, 2192 1, 2193 &cca_mode, 2194 priv->spi 2195 ); 2196 if (status) { 2197 dev_err( 2198 &priv->spi->dev, 2199 "error setting cca mode, MLME-SET.confirm status = %d", 2200 status 2201 ); 2202 } 2203 return link_to_linux_err(status); 2204 } 2205 2206 /** 2207 * ca8210_set_cca_ed_level() - Sets the CCA ED level of the ca8210 2208 * @hw: ieee802154_hw of target ca8210 2209 * @level: ED level to set (in mbm) 2210 * 2211 * Sets the minimum threshold of measured energy above which the ca8210 will 2212 * back off and retry a transmission. 2213 * 2214 * Return: 0 or linux error code 2215 */ 2216 static int ca8210_set_cca_ed_level(struct ieee802154_hw *hw, s32 level) 2217 { 2218 u8 status; 2219 u8 ed_threshold = (level / 100) * 2 + 256; 2220 struct ca8210_priv *priv = hw->priv; 2221 2222 status = hwme_set_request_sync( 2223 HWME_EDTHRESHOLD, 2224 1, 2225 &ed_threshold, 2226 priv->spi 2227 ); 2228 if (status) { 2229 dev_err( 2230 &priv->spi->dev, 2231 "error setting ed threshold, HWME-SET.confirm status = %d", 2232 status 2233 ); 2234 } 2235 return link_to_linux_err(status); 2236 } 2237 2238 /** 2239 * ca8210_set_csma_params() - Sets the CSMA parameters of the ca8210 2240 * @hw: ieee802154_hw of target ca8210 2241 * @min_be: Minimum backoff exponent when backing off a transmission 2242 * @max_be: Maximum backoff exponent when backing off a transmission 2243 * @retries: Number of times to retry after backing off 2244 * 2245 * Return: 0 or linux error code 2246 */ 2247 static int ca8210_set_csma_params( 2248 struct ieee802154_hw *hw, 2249 u8 min_be, 2250 u8 max_be, 2251 u8 retries 2252 ) 2253 { 2254 u8 status; 2255 struct ca8210_priv *priv = hw->priv; 2256 2257 status = mlme_set_request_sync(MAC_MIN_BE, 0, 1, &min_be, priv->spi); 2258 if (status) { 2259 dev_err( 2260 &priv->spi->dev, 2261 "error setting min be, MLME-SET.confirm status = %d", 2262 status 2263 ); 2264 return link_to_linux_err(status); 2265 } 2266 status = mlme_set_request_sync(MAC_MAX_BE, 0, 1, &max_be, priv->spi); 2267 if (status) { 2268 dev_err( 2269 &priv->spi->dev, 2270 "error setting max be, MLME-SET.confirm status = %d", 2271 status 2272 ); 2273 return link_to_linux_err(status); 2274 } 2275 status = mlme_set_request_sync( 2276 MAC_MAX_CSMA_BACKOFFS, 2277 0, 2278 1, 2279 &retries, 2280 priv->spi 2281 ); 2282 if (status) { 2283 dev_err( 2284 &priv->spi->dev, 2285 "error setting max csma backoffs, MLME-SET.confirm status = %d", 2286 status 2287 ); 2288 } 2289 return link_to_linux_err(status); 2290 } 2291 2292 /** 2293 * ca8210_set_frame_retries() - Sets the maximum frame retries of the ca8210 2294 * @hw: ieee802154_hw of target ca8210 2295 * @retries: Number of retries 2296 * 2297 * Sets the number of times to retry a transmission if no acknowledgment was 2298 * received from the other end when one was requested. 2299 * 2300 * Return: 0 or linux error code 2301 */ 2302 static int ca8210_set_frame_retries(struct ieee802154_hw *hw, s8 retries) 2303 { 2304 u8 status; 2305 struct ca8210_priv *priv = hw->priv; 2306 2307 status = mlme_set_request_sync( 2308 MAC_MAX_FRAME_RETRIES, 2309 0, 2310 1, 2311 &retries, 2312 priv->spi 2313 ); 2314 if (status) { 2315 dev_err( 2316 &priv->spi->dev, 2317 "error setting frame retries, MLME-SET.confirm status = %d", 2318 status 2319 ); 2320 } 2321 return link_to_linux_err(status); 2322 } 2323 2324 static int ca8210_set_promiscuous_mode(struct ieee802154_hw *hw, const bool on) 2325 { 2326 u8 status; 2327 struct ca8210_priv *priv = hw->priv; 2328 2329 status = mlme_set_request_sync( 2330 MAC_PROMISCUOUS_MODE, 2331 0, 2332 1, 2333 (const void *)&on, 2334 priv->spi 2335 ); 2336 if (status) { 2337 dev_err( 2338 &priv->spi->dev, 2339 "error setting promiscuous mode, MLME-SET.confirm status = %d", 2340 status 2341 ); 2342 } else { 2343 priv->promiscuous = on; 2344 } 2345 return link_to_linux_err(status); 2346 } 2347 2348 static const struct ieee802154_ops ca8210_phy_ops = { 2349 .start = ca8210_start, 2350 .stop = ca8210_stop, 2351 .xmit_async = ca8210_xmit_async, 2352 .ed = ca8210_get_ed, 2353 .set_channel = ca8210_set_channel, 2354 .set_hw_addr_filt = ca8210_set_hw_addr_filt, 2355 .set_txpower = ca8210_set_tx_power, 2356 .set_cca_mode = ca8210_set_cca_mode, 2357 .set_cca_ed_level = ca8210_set_cca_ed_level, 2358 .set_csma_params = ca8210_set_csma_params, 2359 .set_frame_retries = ca8210_set_frame_retries, 2360 .set_promiscuous_mode = ca8210_set_promiscuous_mode 2361 }; 2362 2363 /* Test/EVBME Interface */ 2364 2365 /** 2366 * ca8210_test_int_open() - Opens the test interface to the userspace 2367 * @inodp: inode representation of file interface 2368 * @filp: file interface 2369 * 2370 * Return: 0 or linux error code 2371 */ 2372 static int ca8210_test_int_open(struct inode *inodp, struct file *filp) 2373 { 2374 struct ca8210_priv *priv = inodp->i_private; 2375 2376 filp->private_data = priv; 2377 return 0; 2378 } 2379 2380 /** 2381 * ca8210_test_check_upstream() - Checks a command received from the upstream 2382 * testing interface for required action 2383 * @buf: Buffer containing command to check 2384 * @device_ref: Nondescript pointer to target device 2385 * 2386 * Return: 0 or linux error code 2387 */ 2388 static int ca8210_test_check_upstream(u8 *buf, void *device_ref) 2389 { 2390 int ret; 2391 u8 response[CA8210_SPI_BUF_SIZE]; 2392 2393 if (buf[0] == SPI_MLME_SET_REQUEST) { 2394 ret = tdme_checkpibattribute(buf[2], buf[4], buf + 5); 2395 if (ret) { 2396 response[0] = SPI_MLME_SET_CONFIRM; 2397 response[1] = 3; 2398 response[2] = IEEE802154_INVALID_PARAMETER; 2399 response[3] = buf[2]; 2400 response[4] = buf[3]; 2401 if (cascoda_api_upstream) 2402 cascoda_api_upstream(response, 5, device_ref); 2403 return ret; 2404 } 2405 } 2406 if (buf[0] == SPI_MLME_ASSOCIATE_REQUEST) { 2407 return tdme_channelinit(buf[2], device_ref); 2408 } else if (buf[0] == SPI_MLME_START_REQUEST) { 2409 return tdme_channelinit(buf[4], device_ref); 2410 } else if ( 2411 (buf[0] == SPI_MLME_SET_REQUEST) && 2412 (buf[2] == PHY_CURRENT_CHANNEL) 2413 ) { 2414 return tdme_channelinit(buf[5], device_ref); 2415 } else if ( 2416 (buf[0] == SPI_TDME_SET_REQUEST) && 2417 (buf[2] == TDME_CHANNEL) 2418 ) { 2419 return tdme_channelinit(buf[4], device_ref); 2420 } else if ( 2421 (CA8210_MAC_WORKAROUNDS) && 2422 (buf[0] == SPI_MLME_RESET_REQUEST) && 2423 (buf[2] == 1) 2424 ) { 2425 /* reset COORD Bit for Channel Filtering as Coordinator */ 2426 return tdme_setsfr_request_sync( 2427 0, 2428 CA8210_SFR_MACCON, 2429 0, 2430 device_ref 2431 ); 2432 } 2433 return 0; 2434 } /* End of EVBMECheckSerialCommand() */ 2435 2436 /** 2437 * ca8210_test_int_user_write() - Called by a process in userspace to send a 2438 * message to the ca8210 drivers 2439 * @filp: file interface 2440 * @in_buf: Buffer containing message to write 2441 * @len: length of message 2442 * @off: file offset 2443 * 2444 * Return: 0 or linux error code 2445 */ 2446 static ssize_t ca8210_test_int_user_write( 2447 struct file *filp, 2448 const char __user *in_buf, 2449 size_t len, 2450 loff_t *off 2451 ) 2452 { 2453 int ret; 2454 struct ca8210_priv *priv = filp->private_data; 2455 u8 command[CA8210_SPI_BUF_SIZE]; 2456 2457 memset(command, SPI_IDLE, 6); 2458 if (len > CA8210_SPI_BUF_SIZE || len < 2) { 2459 dev_warn( 2460 &priv->spi->dev, 2461 "userspace requested erroneous write length (%zu)\n", 2462 len 2463 ); 2464 return -EBADE; 2465 } 2466 2467 ret = copy_from_user(command, in_buf, len); 2468 if (ret) { 2469 dev_err( 2470 &priv->spi->dev, 2471 "%d bytes could not be copied from userspace\n", 2472 ret 2473 ); 2474 return -EIO; 2475 } 2476 if (len != command[1] + 2) { 2477 dev_err( 2478 &priv->spi->dev, 2479 "write len does not match packet length field\n" 2480 ); 2481 return -EBADE; 2482 } 2483 2484 ret = ca8210_test_check_upstream(command, priv->spi); 2485 if (ret == 0) { 2486 ret = ca8210_spi_exchange( 2487 command, 2488 command[1] + 2, 2489 NULL, 2490 priv->spi 2491 ); 2492 if (ret < 0) { 2493 /* effectively 0 bytes were written successfully */ 2494 dev_err( 2495 &priv->spi->dev, 2496 "spi exchange failed\n" 2497 ); 2498 return ret; 2499 } 2500 if (command[0] & SPI_SYN) 2501 priv->sync_down++; 2502 } 2503 2504 return len; 2505 } 2506 2507 /** 2508 * ca8210_test_int_user_read() - Called by a process in userspace to read a 2509 * message from the ca8210 drivers 2510 * @filp: file interface 2511 * @buf: Buffer to write message to 2512 * @len: length of message to read (ignored) 2513 * @offp: file offset 2514 * 2515 * If the O_NONBLOCK flag was set when opening the file then this function will 2516 * not block, i.e. it will return if the fifo is empty. Otherwise the function 2517 * will block, i.e. wait until new data arrives. 2518 * 2519 * Return: number of bytes read 2520 */ 2521 static ssize_t ca8210_test_int_user_read( 2522 struct file *filp, 2523 char __user *buf, 2524 size_t len, 2525 loff_t *offp 2526 ) 2527 { 2528 int i, cmdlen; 2529 struct ca8210_priv *priv = filp->private_data; 2530 unsigned char *fifo_buffer; 2531 unsigned long bytes_not_copied; 2532 2533 if (filp->f_flags & O_NONBLOCK) { 2534 /* Non-blocking mode */ 2535 if (kfifo_is_empty(&priv->test.up_fifo)) 2536 return 0; 2537 } else { 2538 /* Blocking mode */ 2539 wait_event_interruptible( 2540 priv->test.readq, 2541 !kfifo_is_empty(&priv->test.up_fifo) 2542 ); 2543 } 2544 2545 if (kfifo_out(&priv->test.up_fifo, &fifo_buffer, 4) != 4) { 2546 dev_err( 2547 &priv->spi->dev, 2548 "test_interface: Wrong number of elements popped from upstream fifo\n" 2549 ); 2550 return 0; 2551 } 2552 cmdlen = fifo_buffer[1]; 2553 bytes_not_copied = cmdlen + 2; 2554 2555 bytes_not_copied = copy_to_user(buf, fifo_buffer, bytes_not_copied); 2556 if (bytes_not_copied > 0) { 2557 dev_err( 2558 &priv->spi->dev, 2559 "%lu bytes could not be copied to user space!\n", 2560 bytes_not_copied 2561 ); 2562 } 2563 2564 dev_dbg(&priv->spi->dev, "test_interface: Cmd len = %d\n", cmdlen); 2565 2566 dev_dbg(&priv->spi->dev, "test_interface: Read\n"); 2567 for (i = 0; i < cmdlen + 2; i++) 2568 dev_dbg(&priv->spi->dev, "%#03x\n", fifo_buffer[i]); 2569 2570 kfree(fifo_buffer); 2571 2572 return cmdlen + 2; 2573 } 2574 2575 /** 2576 * ca8210_test_int_ioctl() - Called by a process in userspace to enact an 2577 * arbitrary action 2578 * @filp: file interface 2579 * @ioctl_num: which action to enact 2580 * @ioctl_param: arbitrary parameter for the action 2581 * 2582 * Return: status 2583 */ 2584 static long ca8210_test_int_ioctl( 2585 struct file *filp, 2586 unsigned int ioctl_num, 2587 unsigned long ioctl_param 2588 ) 2589 { 2590 struct ca8210_priv *priv = filp->private_data; 2591 2592 switch (ioctl_num) { 2593 case CA8210_IOCTL_HARD_RESET: 2594 ca8210_reset_send(priv->spi, ioctl_param); 2595 break; 2596 default: 2597 break; 2598 } 2599 return 0; 2600 } 2601 2602 /** 2603 * ca8210_test_int_poll() - Called by a process in userspace to determine which 2604 * actions are currently possible for the file 2605 * @filp: file interface 2606 * @ptable: poll table 2607 * 2608 * Return: set of poll return flags 2609 */ 2610 static __poll_t ca8210_test_int_poll( 2611 struct file *filp, 2612 struct poll_table_struct *ptable 2613 ) 2614 { 2615 __poll_t return_flags = 0; 2616 struct ca8210_priv *priv = filp->private_data; 2617 2618 poll_wait(filp, &priv->test.readq, ptable); 2619 if (!kfifo_is_empty(&priv->test.up_fifo)) 2620 return_flags |= (EPOLLIN | EPOLLRDNORM); 2621 if (wait_event_interruptible( 2622 priv->test.readq, 2623 !kfifo_is_empty(&priv->test.up_fifo))) { 2624 return EPOLLERR; 2625 } 2626 return return_flags; 2627 } 2628 2629 static const struct file_operations test_int_fops = { 2630 .read = ca8210_test_int_user_read, 2631 .write = ca8210_test_int_user_write, 2632 .open = ca8210_test_int_open, 2633 .release = NULL, 2634 .unlocked_ioctl = ca8210_test_int_ioctl, 2635 .poll = ca8210_test_int_poll 2636 }; 2637 2638 /* Init/Deinit */ 2639 2640 /** 2641 * ca8210_get_platform_data() - Populate a ca8210_platform_data object 2642 * @spi_device: Pointer to ca8210 spi device object to get data for 2643 * @pdata: Pointer to ca8210_platform_data object to populate 2644 * 2645 * Return: 0 or linux error code 2646 */ 2647 static int ca8210_get_platform_data( 2648 struct spi_device *spi_device, 2649 struct ca8210_platform_data *pdata 2650 ) 2651 { 2652 int ret = 0; 2653 2654 if (!spi_device->dev.of_node) 2655 return -EINVAL; 2656 2657 pdata->extclockenable = of_property_read_bool( 2658 spi_device->dev.of_node, 2659 "extclock-enable" 2660 ); 2661 if (pdata->extclockenable) { 2662 ret = of_property_read_u32( 2663 spi_device->dev.of_node, 2664 "extclock-freq", 2665 &pdata->extclockfreq 2666 ); 2667 if (ret < 0) 2668 return ret; 2669 2670 ret = of_property_read_u32( 2671 spi_device->dev.of_node, 2672 "extclock-gpio", 2673 &pdata->extclockgpio 2674 ); 2675 } 2676 2677 return ret; 2678 } 2679 2680 /** 2681 * ca8210_config_extern_clk() - Configure the external clock provided by the 2682 * ca8210 2683 * @pdata: Pointer to ca8210_platform_data containing clock parameters 2684 * @spi: Pointer to target ca8210 spi device 2685 * @on: True to turn the clock on, false to turn off 2686 * 2687 * The external clock is configured with a frequency and output pin taken from 2688 * the platform data. 2689 * 2690 * Return: 0 or linux error code 2691 */ 2692 static int ca8210_config_extern_clk( 2693 struct ca8210_platform_data *pdata, 2694 struct spi_device *spi, 2695 bool on 2696 ) 2697 { 2698 u8 clkparam[2]; 2699 2700 if (on) { 2701 dev_info(&spi->dev, "Switching external clock on\n"); 2702 switch (pdata->extclockfreq) { 2703 case SIXTEEN_MHZ: 2704 clkparam[0] = 1; 2705 break; 2706 case EIGHT_MHZ: 2707 clkparam[0] = 2; 2708 break; 2709 case FOUR_MHZ: 2710 clkparam[0] = 3; 2711 break; 2712 case TWO_MHZ: 2713 clkparam[0] = 4; 2714 break; 2715 case ONE_MHZ: 2716 clkparam[0] = 5; 2717 break; 2718 default: 2719 dev_crit(&spi->dev, "Invalid extclock-freq\n"); 2720 return -EINVAL; 2721 } 2722 clkparam[1] = pdata->extclockgpio; 2723 } else { 2724 dev_info(&spi->dev, "Switching external clock off\n"); 2725 clkparam[0] = 0; /* off */ 2726 clkparam[1] = 0; 2727 } 2728 return link_to_linux_err( 2729 hwme_set_request_sync(HWME_SYSCLKOUT, 2, clkparam, spi) 2730 ); 2731 } 2732 2733 /** 2734 * ca8210_register_ext_clock() - Register ca8210's external clock with kernel 2735 * @spi: Pointer to target ca8210 spi device 2736 * 2737 * Return: 0 or linux error code 2738 */ 2739 static int ca8210_register_ext_clock(struct spi_device *spi) 2740 { 2741 struct device_node *np = spi->dev.of_node; 2742 struct ca8210_priv *priv = spi_get_drvdata(spi); 2743 struct ca8210_platform_data *pdata = spi->dev.platform_data; 2744 int ret = 0; 2745 2746 if (!np) 2747 return -EFAULT; 2748 2749 priv->clk = clk_register_fixed_rate( 2750 &spi->dev, 2751 np->name, 2752 NULL, 2753 0, 2754 pdata->extclockfreq 2755 ); 2756 2757 if (IS_ERR(priv->clk)) { 2758 dev_crit(&spi->dev, "Failed to register external clk\n"); 2759 return PTR_ERR(priv->clk); 2760 } 2761 ret = of_clk_add_provider(np, of_clk_src_simple_get, priv->clk); 2762 if (ret) { 2763 clk_unregister(priv->clk); 2764 dev_crit( 2765 &spi->dev, 2766 "Failed to register external clock as clock provider\n" 2767 ); 2768 } else { 2769 dev_info(&spi->dev, "External clock set as clock provider\n"); 2770 } 2771 2772 return ret; 2773 } 2774 2775 /** 2776 * ca8210_unregister_ext_clock() - Unregister ca8210's external clock with 2777 * kernel 2778 * @spi: Pointer to target ca8210 spi device 2779 */ 2780 static void ca8210_unregister_ext_clock(struct spi_device *spi) 2781 { 2782 struct ca8210_priv *priv = spi_get_drvdata(spi); 2783 2784 if (!priv->clk) 2785 return 2786 2787 of_clk_del_provider(spi->dev.of_node); 2788 clk_unregister(priv->clk); 2789 dev_info(&spi->dev, "External clock unregistered\n"); 2790 } 2791 2792 /** 2793 * ca8210_reset_init() - Initialise the reset input to the ca8210 2794 * @spi: Pointer to target ca8210 spi device 2795 * 2796 * Return: 0 or linux error code 2797 */ 2798 static int ca8210_reset_init(struct spi_device *spi) 2799 { 2800 int ret; 2801 struct ca8210_platform_data *pdata = spi->dev.platform_data; 2802 2803 pdata->gpio_reset = of_get_named_gpio( 2804 spi->dev.of_node, 2805 "reset-gpio", 2806 0 2807 ); 2808 2809 ret = gpio_direction_output(pdata->gpio_reset, 1); 2810 if (ret < 0) { 2811 dev_crit( 2812 &spi->dev, 2813 "Reset GPIO %d did not set to output mode\n", 2814 pdata->gpio_reset 2815 ); 2816 } 2817 2818 return ret; 2819 } 2820 2821 /** 2822 * ca8210_interrupt_init() - Initialise the irq output from the ca8210 2823 * @spi: Pointer to target ca8210 spi device 2824 * 2825 * Return: 0 or linux error code 2826 */ 2827 static int ca8210_interrupt_init(struct spi_device *spi) 2828 { 2829 int ret; 2830 struct ca8210_platform_data *pdata = spi->dev.platform_data; 2831 2832 pdata->gpio_irq = of_get_named_gpio( 2833 spi->dev.of_node, 2834 "irq-gpio", 2835 0 2836 ); 2837 2838 pdata->irq_id = gpio_to_irq(pdata->gpio_irq); 2839 if (pdata->irq_id < 0) { 2840 dev_crit( 2841 &spi->dev, 2842 "Could not get irq for gpio pin %d\n", 2843 pdata->gpio_irq 2844 ); 2845 gpio_free(pdata->gpio_irq); 2846 return pdata->irq_id; 2847 } 2848 2849 ret = request_irq( 2850 pdata->irq_id, 2851 ca8210_interrupt_handler, 2852 IRQF_TRIGGER_FALLING, 2853 "ca8210-irq", 2854 spi_get_drvdata(spi) 2855 ); 2856 if (ret) { 2857 dev_crit(&spi->dev, "request_irq %d failed\n", pdata->irq_id); 2858 gpio_free(pdata->gpio_irq); 2859 } 2860 2861 return ret; 2862 } 2863 2864 /** 2865 * ca8210_dev_com_init() - Initialise the spi communication component 2866 * @priv: Pointer to private data structure 2867 * 2868 * Return: 0 or linux error code 2869 */ 2870 static int ca8210_dev_com_init(struct ca8210_priv *priv) 2871 { 2872 priv->mlme_workqueue = alloc_ordered_workqueue( 2873 "MLME work queue", 2874 WQ_UNBOUND 2875 ); 2876 if (!priv->mlme_workqueue) { 2877 dev_crit(&priv->spi->dev, "alloc of mlme_workqueue failed!\n"); 2878 return -ENOMEM; 2879 } 2880 2881 priv->irq_workqueue = alloc_ordered_workqueue( 2882 "ca8210 irq worker", 2883 WQ_UNBOUND 2884 ); 2885 if (!priv->irq_workqueue) { 2886 dev_crit(&priv->spi->dev, "alloc of irq_workqueue failed!\n"); 2887 destroy_workqueue(priv->mlme_workqueue); 2888 return -ENOMEM; 2889 } 2890 2891 return 0; 2892 } 2893 2894 /** 2895 * ca8210_dev_com_clear() - Deinitialise the spi communication component 2896 * @priv: Pointer to private data structure 2897 */ 2898 static void ca8210_dev_com_clear(struct ca8210_priv *priv) 2899 { 2900 destroy_workqueue(priv->mlme_workqueue); 2901 destroy_workqueue(priv->irq_workqueue); 2902 } 2903 2904 #define CA8210_MAX_TX_POWERS (9) 2905 static const s32 ca8210_tx_powers[CA8210_MAX_TX_POWERS] = { 2906 800, 700, 600, 500, 400, 300, 200, 100, 0 2907 }; 2908 2909 #define CA8210_MAX_ED_LEVELS (21) 2910 static const s32 ca8210_ed_levels[CA8210_MAX_ED_LEVELS] = { 2911 -10300, -10250, -10200, -10150, -10100, -10050, -10000, -9950, -9900, 2912 -9850, -9800, -9750, -9700, -9650, -9600, -9550, -9500, -9450, -9400, 2913 -9350, -9300 2914 }; 2915 2916 /** 2917 * ca8210_hw_setup() - Populate the ieee802154_hw phy attributes with the 2918 * ca8210's defaults 2919 * @ca8210_hw: Pointer to ieee802154_hw to populate 2920 */ 2921 static void ca8210_hw_setup(struct ieee802154_hw *ca8210_hw) 2922 { 2923 /* Support channels 11-26 */ 2924 ca8210_hw->phy->supported.channels[0] = CA8210_VALID_CHANNELS; 2925 ca8210_hw->phy->supported.tx_powers_size = CA8210_MAX_TX_POWERS; 2926 ca8210_hw->phy->supported.tx_powers = ca8210_tx_powers; 2927 ca8210_hw->phy->supported.cca_ed_levels_size = CA8210_MAX_ED_LEVELS; 2928 ca8210_hw->phy->supported.cca_ed_levels = ca8210_ed_levels; 2929 ca8210_hw->phy->current_channel = 18; 2930 ca8210_hw->phy->current_page = 0; 2931 ca8210_hw->phy->transmit_power = 800; 2932 ca8210_hw->phy->cca.mode = NL802154_CCA_ENERGY_CARRIER; 2933 ca8210_hw->phy->cca.opt = NL802154_CCA_OPT_ENERGY_CARRIER_AND; 2934 ca8210_hw->phy->cca_ed_level = -9800; 2935 ca8210_hw->phy->symbol_duration = 16; 2936 ca8210_hw->phy->lifs_period = 40 * ca8210_hw->phy->symbol_duration; 2937 ca8210_hw->phy->sifs_period = 12 * ca8210_hw->phy->symbol_duration; 2938 ca8210_hw->flags = 2939 IEEE802154_HW_AFILT | 2940 IEEE802154_HW_OMIT_CKSUM | 2941 IEEE802154_HW_FRAME_RETRIES | 2942 IEEE802154_HW_PROMISCUOUS | 2943 IEEE802154_HW_CSMA_PARAMS; 2944 ca8210_hw->phy->flags = 2945 WPAN_PHY_FLAG_TXPOWER | 2946 WPAN_PHY_FLAG_CCA_ED_LEVEL | 2947 WPAN_PHY_FLAG_CCA_MODE | 2948 WPAN_PHY_FLAG_DATAGRAMS_ONLY; 2949 } 2950 2951 /** 2952 * ca8210_test_interface_init() - Initialise the test file interface 2953 * @priv: Pointer to private data structure 2954 * 2955 * Provided as an alternative to the standard linux network interface, the test 2956 * interface exposes a file in the filesystem (ca8210_test) that allows 2957 * 802.15.4 SAP Commands and Cascoda EVBME commands to be sent directly to 2958 * the stack. 2959 * 2960 * Return: 0 or linux error code 2961 */ 2962 static int ca8210_test_interface_init(struct ca8210_priv *priv) 2963 { 2964 struct ca8210_test *test = &priv->test; 2965 char node_name[32]; 2966 2967 snprintf( 2968 node_name, 2969 sizeof(node_name), 2970 "ca8210@%d_%d", 2971 priv->spi->master->bus_num, 2972 spi_get_chipselect(priv->spi, 0) 2973 ); 2974 2975 test->ca8210_dfs_spi_int = debugfs_create_file( 2976 node_name, 2977 0600, /* S_IRUSR | S_IWUSR */ 2978 NULL, 2979 priv, 2980 &test_int_fops 2981 ); 2982 2983 debugfs_create_symlink("ca8210", NULL, node_name); 2984 init_waitqueue_head(&test->readq); 2985 return kfifo_alloc( 2986 &test->up_fifo, 2987 CA8210_TEST_INT_FIFO_SIZE, 2988 GFP_KERNEL 2989 ); 2990 } 2991 2992 /** 2993 * ca8210_test_interface_clear() - Deinitialise the test file interface 2994 * @priv: Pointer to private data structure 2995 */ 2996 static void ca8210_test_interface_clear(struct ca8210_priv *priv) 2997 { 2998 struct ca8210_test *test = &priv->test; 2999 3000 debugfs_remove(test->ca8210_dfs_spi_int); 3001 kfifo_free(&test->up_fifo); 3002 dev_info(&priv->spi->dev, "Test interface removed\n"); 3003 } 3004 3005 /** 3006 * ca8210_remove() - Shut down a ca8210 upon being disconnected 3007 * @spi_device: Pointer to spi device data structure 3008 * 3009 * Return: 0 or linux error code 3010 */ 3011 static void ca8210_remove(struct spi_device *spi_device) 3012 { 3013 struct ca8210_priv *priv; 3014 struct ca8210_platform_data *pdata; 3015 3016 dev_info(&spi_device->dev, "Removing ca8210\n"); 3017 3018 pdata = spi_device->dev.platform_data; 3019 if (pdata) { 3020 if (pdata->extclockenable) { 3021 ca8210_unregister_ext_clock(spi_device); 3022 ca8210_config_extern_clk(pdata, spi_device, 0); 3023 } 3024 free_irq(pdata->irq_id, spi_device->dev.driver_data); 3025 kfree(pdata); 3026 spi_device->dev.platform_data = NULL; 3027 } 3028 /* get spi_device private data */ 3029 priv = spi_get_drvdata(spi_device); 3030 if (priv) { 3031 dev_info( 3032 &spi_device->dev, 3033 "sync_down = %d, sync_up = %d\n", 3034 priv->sync_down, 3035 priv->sync_up 3036 ); 3037 ca8210_dev_com_clear(spi_device->dev.driver_data); 3038 if (priv->hw) { 3039 if (priv->hw_registered) 3040 ieee802154_unregister_hw(priv->hw); 3041 ieee802154_free_hw(priv->hw); 3042 priv->hw = NULL; 3043 dev_info( 3044 &spi_device->dev, 3045 "Unregistered & freed ieee802154_hw.\n" 3046 ); 3047 } 3048 if (IS_ENABLED(CONFIG_IEEE802154_CA8210_DEBUGFS)) 3049 ca8210_test_interface_clear(priv); 3050 } 3051 } 3052 3053 /** 3054 * ca8210_probe() - Set up a connected ca8210 upon being detected by the system 3055 * @spi_device: Pointer to spi device data structure 3056 * 3057 * Return: 0 or linux error code 3058 */ 3059 static int ca8210_probe(struct spi_device *spi_device) 3060 { 3061 struct ca8210_priv *priv; 3062 struct ieee802154_hw *hw; 3063 struct ca8210_platform_data *pdata; 3064 int ret; 3065 3066 dev_info(&spi_device->dev, "Inserting ca8210\n"); 3067 3068 /* allocate ieee802154_hw and private data */ 3069 hw = ieee802154_alloc_hw(sizeof(struct ca8210_priv), &ca8210_phy_ops); 3070 if (!hw) { 3071 dev_crit(&spi_device->dev, "ieee802154_alloc_hw failed\n"); 3072 ret = -ENOMEM; 3073 goto error; 3074 } 3075 3076 priv = hw->priv; 3077 priv->hw = hw; 3078 priv->spi = spi_device; 3079 hw->parent = &spi_device->dev; 3080 spin_lock_init(&priv->lock); 3081 priv->async_tx_pending = false; 3082 priv->hw_registered = false; 3083 priv->sync_up = 0; 3084 priv->sync_down = 0; 3085 priv->promiscuous = false; 3086 priv->retries = 0; 3087 init_completion(&priv->ca8210_is_awake); 3088 init_completion(&priv->spi_transfer_complete); 3089 init_completion(&priv->sync_exchange_complete); 3090 spi_set_drvdata(priv->spi, priv); 3091 if (IS_ENABLED(CONFIG_IEEE802154_CA8210_DEBUGFS)) { 3092 cascoda_api_upstream = ca8210_test_int_driver_write; 3093 ca8210_test_interface_init(priv); 3094 } else { 3095 cascoda_api_upstream = NULL; 3096 } 3097 ca8210_hw_setup(hw); 3098 ieee802154_random_extended_addr(&hw->phy->perm_extended_addr); 3099 3100 pdata = kmalloc(sizeof(*pdata), GFP_KERNEL); 3101 if (!pdata) { 3102 ret = -ENOMEM; 3103 goto error; 3104 } 3105 3106 priv->spi->dev.platform_data = pdata; 3107 ret = ca8210_get_platform_data(priv->spi, pdata); 3108 if (ret) { 3109 dev_crit(&spi_device->dev, "ca8210_get_platform_data failed\n"); 3110 goto error; 3111 } 3112 3113 ret = ca8210_dev_com_init(priv); 3114 if (ret) { 3115 dev_crit(&spi_device->dev, "ca8210_dev_com_init failed\n"); 3116 goto error; 3117 } 3118 ret = ca8210_reset_init(priv->spi); 3119 if (ret) { 3120 dev_crit(&spi_device->dev, "ca8210_reset_init failed\n"); 3121 goto error; 3122 } 3123 3124 ret = ca8210_interrupt_init(priv->spi); 3125 if (ret) { 3126 dev_crit(&spi_device->dev, "ca8210_interrupt_init failed\n"); 3127 goto error; 3128 } 3129 3130 msleep(100); 3131 3132 ca8210_reset_send(priv->spi, 1); 3133 3134 ret = tdme_chipinit(priv->spi); 3135 if (ret) { 3136 dev_crit(&spi_device->dev, "tdme_chipinit failed\n"); 3137 goto error; 3138 } 3139 3140 if (pdata->extclockenable) { 3141 ret = ca8210_config_extern_clk(pdata, priv->spi, 1); 3142 if (ret) { 3143 dev_crit( 3144 &spi_device->dev, 3145 "ca8210_config_extern_clk failed\n" 3146 ); 3147 goto error; 3148 } 3149 ret = ca8210_register_ext_clock(priv->spi); 3150 if (ret) { 3151 dev_crit( 3152 &spi_device->dev, 3153 "ca8210_register_ext_clock failed\n" 3154 ); 3155 goto error; 3156 } 3157 } 3158 3159 ret = ieee802154_register_hw(hw); 3160 if (ret) { 3161 dev_crit(&spi_device->dev, "ieee802154_register_hw failed\n"); 3162 goto error; 3163 } 3164 priv->hw_registered = true; 3165 3166 return 0; 3167 error: 3168 msleep(100); /* wait for pending spi transfers to complete */ 3169 ca8210_remove(spi_device); 3170 return link_to_linux_err(ret); 3171 } 3172 3173 static const struct of_device_id ca8210_of_ids[] = { 3174 {.compatible = "cascoda,ca8210", }, 3175 {}, 3176 }; 3177 MODULE_DEVICE_TABLE(of, ca8210_of_ids); 3178 3179 static struct spi_driver ca8210_spi_driver = { 3180 .driver = { 3181 .name = DRIVER_NAME, 3182 .of_match_table = ca8210_of_ids, 3183 }, 3184 .probe = ca8210_probe, 3185 .remove = ca8210_remove 3186 }; 3187 3188 module_spi_driver(ca8210_spi_driver); 3189 3190 MODULE_AUTHOR("Harry Morris <h.morris@cascoda.com>"); 3191 MODULE_DESCRIPTION("CA-8210 SoftMAC driver"); 3192 MODULE_LICENSE("Dual BSD/GPL"); 3193 MODULE_VERSION("1.0"); 3194