xref: /linux/drivers/net/ieee802154/at86rf230.c (revision fa84cf094ef9667e2b91c104b0a788fd1896f482)
1 /*
2  * AT86RF230/RF231 driver
3  *
4  * Copyright (C) 2009-2012 Siemens AG
5  *
6  * This program is free software; you can redistribute it and/or modify
7  * it under the terms of the GNU General Public License version 2
8  * as published by the Free Software Foundation.
9  *
10  * This program is distributed in the hope that it will be useful,
11  * but WITHOUT ANY WARRANTY; without even the implied warranty of
12  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
13  * GNU General Public License for more details.
14  *
15  * Written by:
16  * Dmitry Eremin-Solenikov <dbaryshkov@gmail.com>
17  * Alexander Smirnov <alex.bluesman.smirnov@gmail.com>
18  * Alexander Aring <aar@pengutronix.de>
19  */
20 #include <linux/kernel.h>
21 #include <linux/module.h>
22 #include <linux/hrtimer.h>
23 #include <linux/jiffies.h>
24 #include <linux/interrupt.h>
25 #include <linux/irq.h>
26 #include <linux/gpio.h>
27 #include <linux/delay.h>
28 #include <linux/spi/spi.h>
29 #include <linux/spi/at86rf230.h>
30 #include <linux/regmap.h>
31 #include <linux/skbuff.h>
32 #include <linux/of_gpio.h>
33 #include <linux/ieee802154.h>
34 #include <linux/debugfs.h>
35 
36 #include <net/mac802154.h>
37 #include <net/cfg802154.h>
38 
39 #include "at86rf230.h"
40 
41 struct at86rf230_local;
42 /* at86rf2xx chip depend data.
43  * All timings are in us.
44  */
45 struct at86rf2xx_chip_data {
46 	u16 t_sleep_cycle;
47 	u16 t_channel_switch;
48 	u16 t_reset_to_off;
49 	u16 t_off_to_aack;
50 	u16 t_off_to_tx_on;
51 	u16 t_off_to_sleep;
52 	u16 t_sleep_to_off;
53 	u16 t_frame;
54 	u16 t_p_ack;
55 	int rssi_base_val;
56 
57 	int (*set_channel)(struct at86rf230_local *, u8, u8);
58 	int (*set_txpower)(struct at86rf230_local *, s32);
59 };
60 
61 #define AT86RF2XX_MAX_BUF		(127 + 3)
62 /* tx retries to access the TX_ON state
63  * if it's above then force change will be started.
64  *
65  * We assume the max_frame_retries (7) value of 802.15.4 here.
66  */
67 #define AT86RF2XX_MAX_TX_RETRIES	7
68 /* We use the recommended 5 minutes timeout to recalibrate */
69 #define AT86RF2XX_CAL_LOOP_TIMEOUT	(5 * 60 * HZ)
70 
71 struct at86rf230_state_change {
72 	struct at86rf230_local *lp;
73 	int irq;
74 
75 	struct hrtimer timer;
76 	struct spi_message msg;
77 	struct spi_transfer trx;
78 	u8 buf[AT86RF2XX_MAX_BUF];
79 
80 	void (*complete)(void *context);
81 	u8 from_state;
82 	u8 to_state;
83 
84 	bool free;
85 };
86 
87 struct at86rf230_trac {
88 	u64 success;
89 	u64 success_data_pending;
90 	u64 success_wait_for_ack;
91 	u64 channel_access_failure;
92 	u64 no_ack;
93 	u64 invalid;
94 };
95 
96 struct at86rf230_local {
97 	struct spi_device *spi;
98 
99 	struct ieee802154_hw *hw;
100 	struct at86rf2xx_chip_data *data;
101 	struct regmap *regmap;
102 	int slp_tr;
103 	bool sleep;
104 
105 	struct completion state_complete;
106 	struct at86rf230_state_change state;
107 
108 	unsigned long cal_timeout;
109 	bool is_tx;
110 	bool is_tx_from_off;
111 	u8 tx_retry;
112 	struct sk_buff *tx_skb;
113 	struct at86rf230_state_change tx;
114 
115 	struct at86rf230_trac trac;
116 };
117 
118 #define AT86RF2XX_NUMREGS 0x3F
119 
120 static void
121 at86rf230_async_state_change(struct at86rf230_local *lp,
122 			     struct at86rf230_state_change *ctx,
123 			     const u8 state, void (*complete)(void *context));
124 
125 static inline void
126 at86rf230_sleep(struct at86rf230_local *lp)
127 {
128 	if (gpio_is_valid(lp->slp_tr)) {
129 		gpio_set_value(lp->slp_tr, 1);
130 		usleep_range(lp->data->t_off_to_sleep,
131 			     lp->data->t_off_to_sleep + 10);
132 		lp->sleep = true;
133 	}
134 }
135 
136 static inline void
137 at86rf230_awake(struct at86rf230_local *lp)
138 {
139 	if (gpio_is_valid(lp->slp_tr)) {
140 		gpio_set_value(lp->slp_tr, 0);
141 		usleep_range(lp->data->t_sleep_to_off,
142 			     lp->data->t_sleep_to_off + 100);
143 		lp->sleep = false;
144 	}
145 }
146 
147 static inline int
148 __at86rf230_write(struct at86rf230_local *lp,
149 		  unsigned int addr, unsigned int data)
150 {
151 	bool sleep = lp->sleep;
152 	int ret;
153 
154 	/* awake for register setting if sleep */
155 	if (sleep)
156 		at86rf230_awake(lp);
157 
158 	ret = regmap_write(lp->regmap, addr, data);
159 
160 	/* sleep again if was sleeping */
161 	if (sleep)
162 		at86rf230_sleep(lp);
163 
164 	return ret;
165 }
166 
167 static inline int
168 __at86rf230_read(struct at86rf230_local *lp,
169 		 unsigned int addr, unsigned int *data)
170 {
171 	bool sleep = lp->sleep;
172 	int ret;
173 
174 	/* awake for register setting if sleep */
175 	if (sleep)
176 		at86rf230_awake(lp);
177 
178 	ret = regmap_read(lp->regmap, addr, data);
179 
180 	/* sleep again if was sleeping */
181 	if (sleep)
182 		at86rf230_sleep(lp);
183 
184 	return ret;
185 }
186 
187 static inline int
188 at86rf230_read_subreg(struct at86rf230_local *lp,
189 		      unsigned int addr, unsigned int mask,
190 		      unsigned int shift, unsigned int *data)
191 {
192 	int rc;
193 
194 	rc = __at86rf230_read(lp, addr, data);
195 	if (!rc)
196 		*data = (*data & mask) >> shift;
197 
198 	return rc;
199 }
200 
201 static inline int
202 at86rf230_write_subreg(struct at86rf230_local *lp,
203 		       unsigned int addr, unsigned int mask,
204 		       unsigned int shift, unsigned int data)
205 {
206 	bool sleep = lp->sleep;
207 	int ret;
208 
209 	/* awake for register setting if sleep */
210 	if (sleep)
211 		at86rf230_awake(lp);
212 
213 	ret = regmap_update_bits(lp->regmap, addr, mask, data << shift);
214 
215 	/* sleep again if was sleeping */
216 	if (sleep)
217 		at86rf230_sleep(lp);
218 
219 	return ret;
220 }
221 
222 static inline void
223 at86rf230_slp_tr_rising_edge(struct at86rf230_local *lp)
224 {
225 	gpio_set_value(lp->slp_tr, 1);
226 	udelay(1);
227 	gpio_set_value(lp->slp_tr, 0);
228 }
229 
230 static bool
231 at86rf230_reg_writeable(struct device *dev, unsigned int reg)
232 {
233 	switch (reg) {
234 	case RG_TRX_STATE:
235 	case RG_TRX_CTRL_0:
236 	case RG_TRX_CTRL_1:
237 	case RG_PHY_TX_PWR:
238 	case RG_PHY_ED_LEVEL:
239 	case RG_PHY_CC_CCA:
240 	case RG_CCA_THRES:
241 	case RG_RX_CTRL:
242 	case RG_SFD_VALUE:
243 	case RG_TRX_CTRL_2:
244 	case RG_ANT_DIV:
245 	case RG_IRQ_MASK:
246 	case RG_VREG_CTRL:
247 	case RG_BATMON:
248 	case RG_XOSC_CTRL:
249 	case RG_RX_SYN:
250 	case RG_XAH_CTRL_1:
251 	case RG_FTN_CTRL:
252 	case RG_PLL_CF:
253 	case RG_PLL_DCU:
254 	case RG_SHORT_ADDR_0:
255 	case RG_SHORT_ADDR_1:
256 	case RG_PAN_ID_0:
257 	case RG_PAN_ID_1:
258 	case RG_IEEE_ADDR_0:
259 	case RG_IEEE_ADDR_1:
260 	case RG_IEEE_ADDR_2:
261 	case RG_IEEE_ADDR_3:
262 	case RG_IEEE_ADDR_4:
263 	case RG_IEEE_ADDR_5:
264 	case RG_IEEE_ADDR_6:
265 	case RG_IEEE_ADDR_7:
266 	case RG_XAH_CTRL_0:
267 	case RG_CSMA_SEED_0:
268 	case RG_CSMA_SEED_1:
269 	case RG_CSMA_BE:
270 		return true;
271 	default:
272 		return false;
273 	}
274 }
275 
276 static bool
277 at86rf230_reg_readable(struct device *dev, unsigned int reg)
278 {
279 	bool rc;
280 
281 	/* all writeable are also readable */
282 	rc = at86rf230_reg_writeable(dev, reg);
283 	if (rc)
284 		return rc;
285 
286 	/* readonly regs */
287 	switch (reg) {
288 	case RG_TRX_STATUS:
289 	case RG_PHY_RSSI:
290 	case RG_IRQ_STATUS:
291 	case RG_PART_NUM:
292 	case RG_VERSION_NUM:
293 	case RG_MAN_ID_1:
294 	case RG_MAN_ID_0:
295 		return true;
296 	default:
297 		return false;
298 	}
299 }
300 
301 static bool
302 at86rf230_reg_volatile(struct device *dev, unsigned int reg)
303 {
304 	/* can be changed during runtime */
305 	switch (reg) {
306 	case RG_TRX_STATUS:
307 	case RG_TRX_STATE:
308 	case RG_PHY_RSSI:
309 	case RG_PHY_ED_LEVEL:
310 	case RG_IRQ_STATUS:
311 	case RG_VREG_CTRL:
312 	case RG_PLL_CF:
313 	case RG_PLL_DCU:
314 		return true;
315 	default:
316 		return false;
317 	}
318 }
319 
320 static bool
321 at86rf230_reg_precious(struct device *dev, unsigned int reg)
322 {
323 	/* don't clear irq line on read */
324 	switch (reg) {
325 	case RG_IRQ_STATUS:
326 		return true;
327 	default:
328 		return false;
329 	}
330 }
331 
332 static const struct regmap_config at86rf230_regmap_spi_config = {
333 	.reg_bits = 8,
334 	.val_bits = 8,
335 	.write_flag_mask = CMD_REG | CMD_WRITE,
336 	.read_flag_mask = CMD_REG,
337 	.cache_type = REGCACHE_RBTREE,
338 	.max_register = AT86RF2XX_NUMREGS,
339 	.writeable_reg = at86rf230_reg_writeable,
340 	.readable_reg = at86rf230_reg_readable,
341 	.volatile_reg = at86rf230_reg_volatile,
342 	.precious_reg = at86rf230_reg_precious,
343 };
344 
345 static void
346 at86rf230_async_error_recover_complete(void *context)
347 {
348 	struct at86rf230_state_change *ctx = context;
349 	struct at86rf230_local *lp = ctx->lp;
350 
351 	if (ctx->free)
352 		kfree(ctx);
353 
354 	ieee802154_wake_queue(lp->hw);
355 }
356 
357 static void
358 at86rf230_async_error_recover(void *context)
359 {
360 	struct at86rf230_state_change *ctx = context;
361 	struct at86rf230_local *lp = ctx->lp;
362 
363 	lp->is_tx = 0;
364 	at86rf230_async_state_change(lp, ctx, STATE_RX_AACK_ON,
365 				     at86rf230_async_error_recover_complete);
366 }
367 
368 static inline void
369 at86rf230_async_error(struct at86rf230_local *lp,
370 		      struct at86rf230_state_change *ctx, int rc)
371 {
372 	dev_err(&lp->spi->dev, "spi_async error %d\n", rc);
373 
374 	at86rf230_async_state_change(lp, ctx, STATE_FORCE_TRX_OFF,
375 				     at86rf230_async_error_recover);
376 }
377 
378 /* Generic function to get some register value in async mode */
379 static void
380 at86rf230_async_read_reg(struct at86rf230_local *lp, u8 reg,
381 			 struct at86rf230_state_change *ctx,
382 			 void (*complete)(void *context))
383 {
384 	int rc;
385 
386 	u8 *tx_buf = ctx->buf;
387 
388 	tx_buf[0] = (reg & CMD_REG_MASK) | CMD_REG;
389 	ctx->msg.complete = complete;
390 	rc = spi_async(lp->spi, &ctx->msg);
391 	if (rc)
392 		at86rf230_async_error(lp, ctx, rc);
393 }
394 
395 static void
396 at86rf230_async_write_reg(struct at86rf230_local *lp, u8 reg, u8 val,
397 			  struct at86rf230_state_change *ctx,
398 			  void (*complete)(void *context))
399 {
400 	int rc;
401 
402 	ctx->buf[0] = (reg & CMD_REG_MASK) | CMD_REG | CMD_WRITE;
403 	ctx->buf[1] = val;
404 	ctx->msg.complete = complete;
405 	rc = spi_async(lp->spi, &ctx->msg);
406 	if (rc)
407 		at86rf230_async_error(lp, ctx, rc);
408 }
409 
410 static void
411 at86rf230_async_state_assert(void *context)
412 {
413 	struct at86rf230_state_change *ctx = context;
414 	struct at86rf230_local *lp = ctx->lp;
415 	const u8 *buf = ctx->buf;
416 	const u8 trx_state = buf[1] & TRX_STATE_MASK;
417 
418 	/* Assert state change */
419 	if (trx_state != ctx->to_state) {
420 		/* Special handling if transceiver state is in
421 		 * STATE_BUSY_RX_AACK and a SHR was detected.
422 		 */
423 		if  (trx_state == STATE_BUSY_RX_AACK) {
424 			/* Undocumented race condition. If we send a state
425 			 * change to STATE_RX_AACK_ON the transceiver could
426 			 * change his state automatically to STATE_BUSY_RX_AACK
427 			 * if a SHR was detected. This is not an error, but we
428 			 * can't assert this.
429 			 */
430 			if (ctx->to_state == STATE_RX_AACK_ON)
431 				goto done;
432 
433 			/* If we change to STATE_TX_ON without forcing and
434 			 * transceiver state is STATE_BUSY_RX_AACK, we wait
435 			 * 'tFrame + tPAck' receiving time. In this time the
436 			 * PDU should be received. If the transceiver is still
437 			 * in STATE_BUSY_RX_AACK, we run a force state change
438 			 * to STATE_TX_ON. This is a timeout handling, if the
439 			 * transceiver stucks in STATE_BUSY_RX_AACK.
440 			 *
441 			 * Additional we do several retries to try to get into
442 			 * TX_ON state without forcing. If the retries are
443 			 * higher or equal than AT86RF2XX_MAX_TX_RETRIES we
444 			 * will do a force change.
445 			 */
446 			if (ctx->to_state == STATE_TX_ON ||
447 			    ctx->to_state == STATE_TRX_OFF) {
448 				u8 state = ctx->to_state;
449 
450 				if (lp->tx_retry >= AT86RF2XX_MAX_TX_RETRIES)
451 					state = STATE_FORCE_TRX_OFF;
452 				lp->tx_retry++;
453 
454 				at86rf230_async_state_change(lp, ctx, state,
455 							     ctx->complete);
456 				return;
457 			}
458 		}
459 
460 		dev_warn(&lp->spi->dev, "unexcept state change from 0x%02x to 0x%02x. Actual state: 0x%02x\n",
461 			 ctx->from_state, ctx->to_state, trx_state);
462 	}
463 
464 done:
465 	if (ctx->complete)
466 		ctx->complete(context);
467 }
468 
469 static enum hrtimer_restart at86rf230_async_state_timer(struct hrtimer *timer)
470 {
471 	struct at86rf230_state_change *ctx =
472 		container_of(timer, struct at86rf230_state_change, timer);
473 	struct at86rf230_local *lp = ctx->lp;
474 
475 	at86rf230_async_read_reg(lp, RG_TRX_STATUS, ctx,
476 				 at86rf230_async_state_assert);
477 
478 	return HRTIMER_NORESTART;
479 }
480 
481 /* Do state change timing delay. */
482 static void
483 at86rf230_async_state_delay(void *context)
484 {
485 	struct at86rf230_state_change *ctx = context;
486 	struct at86rf230_local *lp = ctx->lp;
487 	struct at86rf2xx_chip_data *c = lp->data;
488 	bool force = false;
489 	ktime_t tim;
490 
491 	/* The force state changes are will show as normal states in the
492 	 * state status subregister. We change the to_state to the
493 	 * corresponding one and remember if it was a force change, this
494 	 * differs if we do a state change from STATE_BUSY_RX_AACK.
495 	 */
496 	switch (ctx->to_state) {
497 	case STATE_FORCE_TX_ON:
498 		ctx->to_state = STATE_TX_ON;
499 		force = true;
500 		break;
501 	case STATE_FORCE_TRX_OFF:
502 		ctx->to_state = STATE_TRX_OFF;
503 		force = true;
504 		break;
505 	default:
506 		break;
507 	}
508 
509 	switch (ctx->from_state) {
510 	case STATE_TRX_OFF:
511 		switch (ctx->to_state) {
512 		case STATE_RX_AACK_ON:
513 			tim = c->t_off_to_aack * NSEC_PER_USEC;
514 			/* state change from TRX_OFF to RX_AACK_ON to do a
515 			 * calibration, we need to reset the timeout for the
516 			 * next one.
517 			 */
518 			lp->cal_timeout = jiffies + AT86RF2XX_CAL_LOOP_TIMEOUT;
519 			goto change;
520 		case STATE_TX_ARET_ON:
521 		case STATE_TX_ON:
522 			tim = c->t_off_to_tx_on * NSEC_PER_USEC;
523 			/* state change from TRX_OFF to TX_ON or ARET_ON to do
524 			 * a calibration, we need to reset the timeout for the
525 			 * next one.
526 			 */
527 			lp->cal_timeout = jiffies + AT86RF2XX_CAL_LOOP_TIMEOUT;
528 			goto change;
529 		default:
530 			break;
531 		}
532 		break;
533 	case STATE_BUSY_RX_AACK:
534 		switch (ctx->to_state) {
535 		case STATE_TRX_OFF:
536 		case STATE_TX_ON:
537 			/* Wait for worst case receiving time if we
538 			 * didn't make a force change from BUSY_RX_AACK
539 			 * to TX_ON or TRX_OFF.
540 			 */
541 			if (!force) {
542 				tim = (c->t_frame + c->t_p_ack) * NSEC_PER_USEC;
543 				goto change;
544 			}
545 			break;
546 		default:
547 			break;
548 		}
549 		break;
550 	/* Default value, means RESET state */
551 	case STATE_P_ON:
552 		switch (ctx->to_state) {
553 		case STATE_TRX_OFF:
554 			tim = c->t_reset_to_off * NSEC_PER_USEC;
555 			goto change;
556 		default:
557 			break;
558 		}
559 		break;
560 	default:
561 		break;
562 	}
563 
564 	/* Default delay is 1us in the most cases */
565 	udelay(1);
566 	at86rf230_async_state_timer(&ctx->timer);
567 	return;
568 
569 change:
570 	hrtimer_start(&ctx->timer, tim, HRTIMER_MODE_REL);
571 }
572 
573 static void
574 at86rf230_async_state_change_start(void *context)
575 {
576 	struct at86rf230_state_change *ctx = context;
577 	struct at86rf230_local *lp = ctx->lp;
578 	u8 *buf = ctx->buf;
579 	const u8 trx_state = buf[1] & TRX_STATE_MASK;
580 
581 	/* Check for "possible" STATE_TRANSITION_IN_PROGRESS */
582 	if (trx_state == STATE_TRANSITION_IN_PROGRESS) {
583 		udelay(1);
584 		at86rf230_async_read_reg(lp, RG_TRX_STATUS, ctx,
585 					 at86rf230_async_state_change_start);
586 		return;
587 	}
588 
589 	/* Check if we already are in the state which we change in */
590 	if (trx_state == ctx->to_state) {
591 		if (ctx->complete)
592 			ctx->complete(context);
593 		return;
594 	}
595 
596 	/* Set current state to the context of state change */
597 	ctx->from_state = trx_state;
598 
599 	/* Going into the next step for a state change which do a timing
600 	 * relevant delay.
601 	 */
602 	at86rf230_async_write_reg(lp, RG_TRX_STATE, ctx->to_state, ctx,
603 				  at86rf230_async_state_delay);
604 }
605 
606 static void
607 at86rf230_async_state_change(struct at86rf230_local *lp,
608 			     struct at86rf230_state_change *ctx,
609 			     const u8 state, void (*complete)(void *context))
610 {
611 	/* Initialization for the state change context */
612 	ctx->to_state = state;
613 	ctx->complete = complete;
614 	at86rf230_async_read_reg(lp, RG_TRX_STATUS, ctx,
615 				 at86rf230_async_state_change_start);
616 }
617 
618 static void
619 at86rf230_sync_state_change_complete(void *context)
620 {
621 	struct at86rf230_state_change *ctx = context;
622 	struct at86rf230_local *lp = ctx->lp;
623 
624 	complete(&lp->state_complete);
625 }
626 
627 /* This function do a sync framework above the async state change.
628  * Some callbacks of the IEEE 802.15.4 driver interface need to be
629  * handled synchronously.
630  */
631 static int
632 at86rf230_sync_state_change(struct at86rf230_local *lp, unsigned int state)
633 {
634 	unsigned long rc;
635 
636 	at86rf230_async_state_change(lp, &lp->state, state,
637 				     at86rf230_sync_state_change_complete);
638 
639 	rc = wait_for_completion_timeout(&lp->state_complete,
640 					 msecs_to_jiffies(100));
641 	if (!rc) {
642 		at86rf230_async_error(lp, &lp->state, -ETIMEDOUT);
643 		return -ETIMEDOUT;
644 	}
645 
646 	return 0;
647 }
648 
649 static void
650 at86rf230_tx_complete(void *context)
651 {
652 	struct at86rf230_state_change *ctx = context;
653 	struct at86rf230_local *lp = ctx->lp;
654 
655 	ieee802154_xmit_complete(lp->hw, lp->tx_skb, false);
656 	kfree(ctx);
657 }
658 
659 static void
660 at86rf230_tx_on(void *context)
661 {
662 	struct at86rf230_state_change *ctx = context;
663 	struct at86rf230_local *lp = ctx->lp;
664 
665 	at86rf230_async_state_change(lp, ctx, STATE_RX_AACK_ON,
666 				     at86rf230_tx_complete);
667 }
668 
669 static void
670 at86rf230_tx_trac_check(void *context)
671 {
672 	struct at86rf230_state_change *ctx = context;
673 	struct at86rf230_local *lp = ctx->lp;
674 
675 	if (IS_ENABLED(CONFIG_IEEE802154_AT86RF230_DEBUGFS)) {
676 		u8 trac = TRAC_MASK(ctx->buf[1]);
677 
678 		switch (trac) {
679 		case TRAC_SUCCESS:
680 			lp->trac.success++;
681 			break;
682 		case TRAC_SUCCESS_DATA_PENDING:
683 			lp->trac.success_data_pending++;
684 			break;
685 		case TRAC_CHANNEL_ACCESS_FAILURE:
686 			lp->trac.channel_access_failure++;
687 			break;
688 		case TRAC_NO_ACK:
689 			lp->trac.no_ack++;
690 			break;
691 		case TRAC_INVALID:
692 			lp->trac.invalid++;
693 			break;
694 		default:
695 			WARN_ONCE(1, "received tx trac status %d\n", trac);
696 			break;
697 		}
698 	}
699 
700 	at86rf230_async_state_change(lp, ctx, STATE_TX_ON, at86rf230_tx_on);
701 }
702 
703 static void
704 at86rf230_rx_read_frame_complete(void *context)
705 {
706 	struct at86rf230_state_change *ctx = context;
707 	struct at86rf230_local *lp = ctx->lp;
708 	const u8 *buf = ctx->buf;
709 	struct sk_buff *skb;
710 	u8 len, lqi;
711 
712 	len = buf[1];
713 	if (!ieee802154_is_valid_psdu_len(len)) {
714 		dev_vdbg(&lp->spi->dev, "corrupted frame received\n");
715 		len = IEEE802154_MTU;
716 	}
717 	lqi = buf[2 + len];
718 
719 	skb = dev_alloc_skb(IEEE802154_MTU);
720 	if (!skb) {
721 		dev_vdbg(&lp->spi->dev, "failed to allocate sk_buff\n");
722 		kfree(ctx);
723 		return;
724 	}
725 
726 	skb_put_data(skb, buf + 2, len);
727 	ieee802154_rx_irqsafe(lp->hw, skb, lqi);
728 	kfree(ctx);
729 }
730 
731 static void
732 at86rf230_rx_trac_check(void *context)
733 {
734 	struct at86rf230_state_change *ctx = context;
735 	struct at86rf230_local *lp = ctx->lp;
736 	u8 *buf = ctx->buf;
737 	int rc;
738 
739 	if (IS_ENABLED(CONFIG_IEEE802154_AT86RF230_DEBUGFS)) {
740 		u8 trac = TRAC_MASK(buf[1]);
741 
742 		switch (trac) {
743 		case TRAC_SUCCESS:
744 			lp->trac.success++;
745 			break;
746 		case TRAC_SUCCESS_WAIT_FOR_ACK:
747 			lp->trac.success_wait_for_ack++;
748 			break;
749 		case TRAC_INVALID:
750 			lp->trac.invalid++;
751 			break;
752 		default:
753 			WARN_ONCE(1, "received rx trac status %d\n", trac);
754 			break;
755 		}
756 	}
757 
758 	buf[0] = CMD_FB;
759 	ctx->trx.len = AT86RF2XX_MAX_BUF;
760 	ctx->msg.complete = at86rf230_rx_read_frame_complete;
761 	rc = spi_async(lp->spi, &ctx->msg);
762 	if (rc) {
763 		ctx->trx.len = 2;
764 		at86rf230_async_error(lp, ctx, rc);
765 	}
766 }
767 
768 static void
769 at86rf230_irq_trx_end(void *context)
770 {
771 	struct at86rf230_state_change *ctx = context;
772 	struct at86rf230_local *lp = ctx->lp;
773 
774 	if (lp->is_tx) {
775 		lp->is_tx = 0;
776 		at86rf230_async_read_reg(lp, RG_TRX_STATE, ctx,
777 					 at86rf230_tx_trac_check);
778 	} else {
779 		at86rf230_async_read_reg(lp, RG_TRX_STATE, ctx,
780 					 at86rf230_rx_trac_check);
781 	}
782 }
783 
784 static void
785 at86rf230_irq_status(void *context)
786 {
787 	struct at86rf230_state_change *ctx = context;
788 	struct at86rf230_local *lp = ctx->lp;
789 	const u8 *buf = ctx->buf;
790 	u8 irq = buf[1];
791 
792 	enable_irq(lp->spi->irq);
793 
794 	if (irq & IRQ_TRX_END) {
795 		at86rf230_irq_trx_end(ctx);
796 	} else {
797 		dev_err(&lp->spi->dev, "not supported irq %02x received\n",
798 			irq);
799 		kfree(ctx);
800 	}
801 }
802 
803 static void
804 at86rf230_setup_spi_messages(struct at86rf230_local *lp,
805 			     struct at86rf230_state_change *state)
806 {
807 	state->lp = lp;
808 	state->irq = lp->spi->irq;
809 	spi_message_init(&state->msg);
810 	state->msg.context = state;
811 	state->trx.len = 2;
812 	state->trx.tx_buf = state->buf;
813 	state->trx.rx_buf = state->buf;
814 	spi_message_add_tail(&state->trx, &state->msg);
815 	hrtimer_init(&state->timer, CLOCK_MONOTONIC, HRTIMER_MODE_REL);
816 	state->timer.function = at86rf230_async_state_timer;
817 }
818 
819 static irqreturn_t at86rf230_isr(int irq, void *data)
820 {
821 	struct at86rf230_local *lp = data;
822 	struct at86rf230_state_change *ctx;
823 	int rc;
824 
825 	disable_irq_nosync(irq);
826 
827 	ctx = kzalloc(sizeof(*ctx), GFP_ATOMIC);
828 	if (!ctx) {
829 		enable_irq(irq);
830 		return IRQ_NONE;
831 	}
832 
833 	at86rf230_setup_spi_messages(lp, ctx);
834 	/* tell on error handling to free ctx */
835 	ctx->free = true;
836 
837 	ctx->buf[0] = (RG_IRQ_STATUS & CMD_REG_MASK) | CMD_REG;
838 	ctx->msg.complete = at86rf230_irq_status;
839 	rc = spi_async(lp->spi, &ctx->msg);
840 	if (rc) {
841 		at86rf230_async_error(lp, ctx, rc);
842 		enable_irq(irq);
843 		return IRQ_NONE;
844 	}
845 
846 	return IRQ_HANDLED;
847 }
848 
849 static void
850 at86rf230_write_frame_complete(void *context)
851 {
852 	struct at86rf230_state_change *ctx = context;
853 	struct at86rf230_local *lp = ctx->lp;
854 
855 	ctx->trx.len = 2;
856 
857 	if (gpio_is_valid(lp->slp_tr))
858 		at86rf230_slp_tr_rising_edge(lp);
859 	else
860 		at86rf230_async_write_reg(lp, RG_TRX_STATE, STATE_BUSY_TX, ctx,
861 					  NULL);
862 }
863 
864 static void
865 at86rf230_write_frame(void *context)
866 {
867 	struct at86rf230_state_change *ctx = context;
868 	struct at86rf230_local *lp = ctx->lp;
869 	struct sk_buff *skb = lp->tx_skb;
870 	u8 *buf = ctx->buf;
871 	int rc;
872 
873 	lp->is_tx = 1;
874 
875 	buf[0] = CMD_FB | CMD_WRITE;
876 	buf[1] = skb->len + 2;
877 	memcpy(buf + 2, skb->data, skb->len);
878 	ctx->trx.len = skb->len + 2;
879 	ctx->msg.complete = at86rf230_write_frame_complete;
880 	rc = spi_async(lp->spi, &ctx->msg);
881 	if (rc) {
882 		ctx->trx.len = 2;
883 		at86rf230_async_error(lp, ctx, rc);
884 	}
885 }
886 
887 static void
888 at86rf230_xmit_tx_on(void *context)
889 {
890 	struct at86rf230_state_change *ctx = context;
891 	struct at86rf230_local *lp = ctx->lp;
892 
893 	at86rf230_async_state_change(lp, ctx, STATE_TX_ARET_ON,
894 				     at86rf230_write_frame);
895 }
896 
897 static void
898 at86rf230_xmit_start(void *context)
899 {
900 	struct at86rf230_state_change *ctx = context;
901 	struct at86rf230_local *lp = ctx->lp;
902 
903 	/* check if we change from off state */
904 	if (lp->is_tx_from_off)
905 		at86rf230_async_state_change(lp, ctx, STATE_TX_ARET_ON,
906 					     at86rf230_write_frame);
907 	else
908 		at86rf230_async_state_change(lp, ctx, STATE_TX_ON,
909 					     at86rf230_xmit_tx_on);
910 }
911 
912 static int
913 at86rf230_xmit(struct ieee802154_hw *hw, struct sk_buff *skb)
914 {
915 	struct at86rf230_local *lp = hw->priv;
916 	struct at86rf230_state_change *ctx = &lp->tx;
917 
918 	lp->tx_skb = skb;
919 	lp->tx_retry = 0;
920 
921 	/* After 5 minutes in PLL and the same frequency we run again the
922 	 * calibration loops which is recommended by at86rf2xx datasheets.
923 	 *
924 	 * The calibration is initiate by a state change from TRX_OFF
925 	 * to TX_ON, the lp->cal_timeout should be reinit by state_delay
926 	 * function then to start in the next 5 minutes.
927 	 */
928 	if (time_is_before_jiffies(lp->cal_timeout)) {
929 		lp->is_tx_from_off = true;
930 		at86rf230_async_state_change(lp, ctx, STATE_TRX_OFF,
931 					     at86rf230_xmit_start);
932 	} else {
933 		lp->is_tx_from_off = false;
934 		at86rf230_xmit_start(ctx);
935 	}
936 
937 	return 0;
938 }
939 
940 static int
941 at86rf230_ed(struct ieee802154_hw *hw, u8 *level)
942 {
943 	BUG_ON(!level);
944 	*level = 0xbe;
945 	return 0;
946 }
947 
948 static int
949 at86rf230_start(struct ieee802154_hw *hw)
950 {
951 	struct at86rf230_local *lp = hw->priv;
952 
953 	/* reset trac stats on start */
954 	if (IS_ENABLED(CONFIG_IEEE802154_AT86RF230_DEBUGFS))
955 		memset(&lp->trac, 0, sizeof(struct at86rf230_trac));
956 
957 	at86rf230_awake(lp);
958 	enable_irq(lp->spi->irq);
959 
960 	return at86rf230_sync_state_change(lp, STATE_RX_AACK_ON);
961 }
962 
963 static void
964 at86rf230_stop(struct ieee802154_hw *hw)
965 {
966 	struct at86rf230_local *lp = hw->priv;
967 	u8 csma_seed[2];
968 
969 	at86rf230_sync_state_change(lp, STATE_FORCE_TRX_OFF);
970 
971 	disable_irq(lp->spi->irq);
972 
973 	/* It's recommended to set random new csma_seeds before sleep state.
974 	 * Makes only sense in the stop callback, not doing this inside of
975 	 * at86rf230_sleep, this is also used when we don't transmit afterwards
976 	 * when calling start callback again.
977 	 */
978 	get_random_bytes(csma_seed, ARRAY_SIZE(csma_seed));
979 	at86rf230_write_subreg(lp, SR_CSMA_SEED_0, csma_seed[0]);
980 	at86rf230_write_subreg(lp, SR_CSMA_SEED_1, csma_seed[1]);
981 
982 	at86rf230_sleep(lp);
983 }
984 
985 static int
986 at86rf23x_set_channel(struct at86rf230_local *lp, u8 page, u8 channel)
987 {
988 	return at86rf230_write_subreg(lp, SR_CHANNEL, channel);
989 }
990 
991 #define AT86RF2XX_MAX_ED_LEVELS 0xF
992 static const s32 at86rf233_ed_levels[AT86RF2XX_MAX_ED_LEVELS + 1] = {
993 	-9400, -9200, -9000, -8800, -8600, -8400, -8200, -8000, -7800, -7600,
994 	-7400, -7200, -7000, -6800, -6600, -6400,
995 };
996 
997 static const s32 at86rf231_ed_levels[AT86RF2XX_MAX_ED_LEVELS + 1] = {
998 	-9100, -8900, -8700, -8500, -8300, -8100, -7900, -7700, -7500, -7300,
999 	-7100, -6900, -6700, -6500, -6300, -6100,
1000 };
1001 
1002 static const s32 at86rf212_ed_levels_100[AT86RF2XX_MAX_ED_LEVELS + 1] = {
1003 	-10000, -9800, -9600, -9400, -9200, -9000, -8800, -8600, -8400, -8200,
1004 	-8000, -7800, -7600, -7400, -7200, -7000,
1005 };
1006 
1007 static const s32 at86rf212_ed_levels_98[AT86RF2XX_MAX_ED_LEVELS + 1] = {
1008 	-9800, -9600, -9400, -9200, -9000, -8800, -8600, -8400, -8200, -8000,
1009 	-7800, -7600, -7400, -7200, -7000, -6800,
1010 };
1011 
1012 static inline int
1013 at86rf212_update_cca_ed_level(struct at86rf230_local *lp, int rssi_base_val)
1014 {
1015 	unsigned int cca_ed_thres;
1016 	int rc;
1017 
1018 	rc = at86rf230_read_subreg(lp, SR_CCA_ED_THRES, &cca_ed_thres);
1019 	if (rc < 0)
1020 		return rc;
1021 
1022 	switch (rssi_base_val) {
1023 	case -98:
1024 		lp->hw->phy->supported.cca_ed_levels = at86rf212_ed_levels_98;
1025 		lp->hw->phy->supported.cca_ed_levels_size = ARRAY_SIZE(at86rf212_ed_levels_98);
1026 		lp->hw->phy->cca_ed_level = at86rf212_ed_levels_98[cca_ed_thres];
1027 		break;
1028 	case -100:
1029 		lp->hw->phy->supported.cca_ed_levels = at86rf212_ed_levels_100;
1030 		lp->hw->phy->supported.cca_ed_levels_size = ARRAY_SIZE(at86rf212_ed_levels_100);
1031 		lp->hw->phy->cca_ed_level = at86rf212_ed_levels_100[cca_ed_thres];
1032 		break;
1033 	default:
1034 		WARN_ON(1);
1035 	}
1036 
1037 	return 0;
1038 }
1039 
1040 static int
1041 at86rf212_set_channel(struct at86rf230_local *lp, u8 page, u8 channel)
1042 {
1043 	int rc;
1044 
1045 	if (channel == 0)
1046 		rc = at86rf230_write_subreg(lp, SR_SUB_MODE, 0);
1047 	else
1048 		rc = at86rf230_write_subreg(lp, SR_SUB_MODE, 1);
1049 	if (rc < 0)
1050 		return rc;
1051 
1052 	if (page == 0) {
1053 		rc = at86rf230_write_subreg(lp, SR_BPSK_QPSK, 0);
1054 		lp->data->rssi_base_val = -100;
1055 	} else {
1056 		rc = at86rf230_write_subreg(lp, SR_BPSK_QPSK, 1);
1057 		lp->data->rssi_base_val = -98;
1058 	}
1059 	if (rc < 0)
1060 		return rc;
1061 
1062 	rc = at86rf212_update_cca_ed_level(lp, lp->data->rssi_base_val);
1063 	if (rc < 0)
1064 		return rc;
1065 
1066 	/* This sets the symbol_duration according frequency on the 212.
1067 	 * TODO move this handling while set channel and page in cfg802154.
1068 	 * We can do that, this timings are according 802.15.4 standard.
1069 	 * If we do that in cfg802154, this is a more generic calculation.
1070 	 *
1071 	 * This should also protected from ifs_timer. Means cancel timer and
1072 	 * init with a new value. For now, this is okay.
1073 	 */
1074 	if (channel == 0) {
1075 		if (page == 0) {
1076 			/* SUB:0 and BPSK:0 -> BPSK-20 */
1077 			lp->hw->phy->symbol_duration = 50;
1078 		} else {
1079 			/* SUB:1 and BPSK:0 -> BPSK-40 */
1080 			lp->hw->phy->symbol_duration = 25;
1081 		}
1082 	} else {
1083 		if (page == 0)
1084 			/* SUB:0 and BPSK:1 -> OQPSK-100/200/400 */
1085 			lp->hw->phy->symbol_duration = 40;
1086 		else
1087 			/* SUB:1 and BPSK:1 -> OQPSK-250/500/1000 */
1088 			lp->hw->phy->symbol_duration = 16;
1089 	}
1090 
1091 	lp->hw->phy->lifs_period = IEEE802154_LIFS_PERIOD *
1092 				   lp->hw->phy->symbol_duration;
1093 	lp->hw->phy->sifs_period = IEEE802154_SIFS_PERIOD *
1094 				   lp->hw->phy->symbol_duration;
1095 
1096 	return at86rf230_write_subreg(lp, SR_CHANNEL, channel);
1097 }
1098 
1099 static int
1100 at86rf230_channel(struct ieee802154_hw *hw, u8 page, u8 channel)
1101 {
1102 	struct at86rf230_local *lp = hw->priv;
1103 	int rc;
1104 
1105 	rc = lp->data->set_channel(lp, page, channel);
1106 	/* Wait for PLL */
1107 	usleep_range(lp->data->t_channel_switch,
1108 		     lp->data->t_channel_switch + 10);
1109 
1110 	lp->cal_timeout = jiffies + AT86RF2XX_CAL_LOOP_TIMEOUT;
1111 	return rc;
1112 }
1113 
1114 static int
1115 at86rf230_set_hw_addr_filt(struct ieee802154_hw *hw,
1116 			   struct ieee802154_hw_addr_filt *filt,
1117 			   unsigned long changed)
1118 {
1119 	struct at86rf230_local *lp = hw->priv;
1120 
1121 	if (changed & IEEE802154_AFILT_SADDR_CHANGED) {
1122 		u16 addr = le16_to_cpu(filt->short_addr);
1123 
1124 		dev_vdbg(&lp->spi->dev,
1125 			 "at86rf230_set_hw_addr_filt called for saddr\n");
1126 		__at86rf230_write(lp, RG_SHORT_ADDR_0, addr);
1127 		__at86rf230_write(lp, RG_SHORT_ADDR_1, addr >> 8);
1128 	}
1129 
1130 	if (changed & IEEE802154_AFILT_PANID_CHANGED) {
1131 		u16 pan = le16_to_cpu(filt->pan_id);
1132 
1133 		dev_vdbg(&lp->spi->dev,
1134 			 "at86rf230_set_hw_addr_filt called for pan id\n");
1135 		__at86rf230_write(lp, RG_PAN_ID_0, pan);
1136 		__at86rf230_write(lp, RG_PAN_ID_1, pan >> 8);
1137 	}
1138 
1139 	if (changed & IEEE802154_AFILT_IEEEADDR_CHANGED) {
1140 		u8 i, addr[8];
1141 
1142 		memcpy(addr, &filt->ieee_addr, 8);
1143 		dev_vdbg(&lp->spi->dev,
1144 			 "at86rf230_set_hw_addr_filt called for IEEE addr\n");
1145 		for (i = 0; i < 8; i++)
1146 			__at86rf230_write(lp, RG_IEEE_ADDR_0 + i, addr[i]);
1147 	}
1148 
1149 	if (changed & IEEE802154_AFILT_PANC_CHANGED) {
1150 		dev_vdbg(&lp->spi->dev,
1151 			 "at86rf230_set_hw_addr_filt called for panc change\n");
1152 		if (filt->pan_coord)
1153 			at86rf230_write_subreg(lp, SR_AACK_I_AM_COORD, 1);
1154 		else
1155 			at86rf230_write_subreg(lp, SR_AACK_I_AM_COORD, 0);
1156 	}
1157 
1158 	return 0;
1159 }
1160 
1161 #define AT86RF23X_MAX_TX_POWERS 0xF
1162 static const s32 at86rf233_powers[AT86RF23X_MAX_TX_POWERS + 1] = {
1163 	400, 370, 340, 300, 250, 200, 100, 0, -100, -200, -300, -400, -600,
1164 	-800, -1200, -1700,
1165 };
1166 
1167 static const s32 at86rf231_powers[AT86RF23X_MAX_TX_POWERS + 1] = {
1168 	300, 280, 230, 180, 130, 70, 0, -100, -200, -300, -400, -500, -700,
1169 	-900, -1200, -1700,
1170 };
1171 
1172 #define AT86RF212_MAX_TX_POWERS 0x1F
1173 static const s32 at86rf212_powers[AT86RF212_MAX_TX_POWERS + 1] = {
1174 	500, 400, 300, 200, 100, 0, -100, -200, -300, -400, -500, -600, -700,
1175 	-800, -900, -1000, -1100, -1200, -1300, -1400, -1500, -1600, -1700,
1176 	-1800, -1900, -2000, -2100, -2200, -2300, -2400, -2500, -2600,
1177 };
1178 
1179 static int
1180 at86rf23x_set_txpower(struct at86rf230_local *lp, s32 mbm)
1181 {
1182 	u32 i;
1183 
1184 	for (i = 0; i < lp->hw->phy->supported.tx_powers_size; i++) {
1185 		if (lp->hw->phy->supported.tx_powers[i] == mbm)
1186 			return at86rf230_write_subreg(lp, SR_TX_PWR_23X, i);
1187 	}
1188 
1189 	return -EINVAL;
1190 }
1191 
1192 static int
1193 at86rf212_set_txpower(struct at86rf230_local *lp, s32 mbm)
1194 {
1195 	u32 i;
1196 
1197 	for (i = 0; i < lp->hw->phy->supported.tx_powers_size; i++) {
1198 		if (lp->hw->phy->supported.tx_powers[i] == mbm)
1199 			return at86rf230_write_subreg(lp, SR_TX_PWR_212, i);
1200 	}
1201 
1202 	return -EINVAL;
1203 }
1204 
1205 static int
1206 at86rf230_set_txpower(struct ieee802154_hw *hw, s32 mbm)
1207 {
1208 	struct at86rf230_local *lp = hw->priv;
1209 
1210 	return lp->data->set_txpower(lp, mbm);
1211 }
1212 
1213 static int
1214 at86rf230_set_lbt(struct ieee802154_hw *hw, bool on)
1215 {
1216 	struct at86rf230_local *lp = hw->priv;
1217 
1218 	return at86rf230_write_subreg(lp, SR_CSMA_LBT_MODE, on);
1219 }
1220 
1221 static int
1222 at86rf230_set_cca_mode(struct ieee802154_hw *hw,
1223 		       const struct wpan_phy_cca *cca)
1224 {
1225 	struct at86rf230_local *lp = hw->priv;
1226 	u8 val;
1227 
1228 	/* mapping 802.15.4 to driver spec */
1229 	switch (cca->mode) {
1230 	case NL802154_CCA_ENERGY:
1231 		val = 1;
1232 		break;
1233 	case NL802154_CCA_CARRIER:
1234 		val = 2;
1235 		break;
1236 	case NL802154_CCA_ENERGY_CARRIER:
1237 		switch (cca->opt) {
1238 		case NL802154_CCA_OPT_ENERGY_CARRIER_AND:
1239 			val = 3;
1240 			break;
1241 		case NL802154_CCA_OPT_ENERGY_CARRIER_OR:
1242 			val = 0;
1243 			break;
1244 		default:
1245 			return -EINVAL;
1246 		}
1247 		break;
1248 	default:
1249 		return -EINVAL;
1250 	}
1251 
1252 	return at86rf230_write_subreg(lp, SR_CCA_MODE, val);
1253 }
1254 
1255 
1256 static int
1257 at86rf230_set_cca_ed_level(struct ieee802154_hw *hw, s32 mbm)
1258 {
1259 	struct at86rf230_local *lp = hw->priv;
1260 	u32 i;
1261 
1262 	for (i = 0; i < hw->phy->supported.cca_ed_levels_size; i++) {
1263 		if (hw->phy->supported.cca_ed_levels[i] == mbm)
1264 			return at86rf230_write_subreg(lp, SR_CCA_ED_THRES, i);
1265 	}
1266 
1267 	return -EINVAL;
1268 }
1269 
1270 static int
1271 at86rf230_set_csma_params(struct ieee802154_hw *hw, u8 min_be, u8 max_be,
1272 			  u8 retries)
1273 {
1274 	struct at86rf230_local *lp = hw->priv;
1275 	int rc;
1276 
1277 	rc = at86rf230_write_subreg(lp, SR_MIN_BE, min_be);
1278 	if (rc)
1279 		return rc;
1280 
1281 	rc = at86rf230_write_subreg(lp, SR_MAX_BE, max_be);
1282 	if (rc)
1283 		return rc;
1284 
1285 	return at86rf230_write_subreg(lp, SR_MAX_CSMA_RETRIES, retries);
1286 }
1287 
1288 static int
1289 at86rf230_set_frame_retries(struct ieee802154_hw *hw, s8 retries)
1290 {
1291 	struct at86rf230_local *lp = hw->priv;
1292 
1293 	return at86rf230_write_subreg(lp, SR_MAX_FRAME_RETRIES, retries);
1294 }
1295 
1296 static int
1297 at86rf230_set_promiscuous_mode(struct ieee802154_hw *hw, const bool on)
1298 {
1299 	struct at86rf230_local *lp = hw->priv;
1300 	int rc;
1301 
1302 	if (on) {
1303 		rc = at86rf230_write_subreg(lp, SR_AACK_DIS_ACK, 1);
1304 		if (rc < 0)
1305 			return rc;
1306 
1307 		rc = at86rf230_write_subreg(lp, SR_AACK_PROM_MODE, 1);
1308 		if (rc < 0)
1309 			return rc;
1310 	} else {
1311 		rc = at86rf230_write_subreg(lp, SR_AACK_PROM_MODE, 0);
1312 		if (rc < 0)
1313 			return rc;
1314 
1315 		rc = at86rf230_write_subreg(lp, SR_AACK_DIS_ACK, 0);
1316 		if (rc < 0)
1317 			return rc;
1318 	}
1319 
1320 	return 0;
1321 }
1322 
1323 static const struct ieee802154_ops at86rf230_ops = {
1324 	.owner = THIS_MODULE,
1325 	.xmit_async = at86rf230_xmit,
1326 	.ed = at86rf230_ed,
1327 	.set_channel = at86rf230_channel,
1328 	.start = at86rf230_start,
1329 	.stop = at86rf230_stop,
1330 	.set_hw_addr_filt = at86rf230_set_hw_addr_filt,
1331 	.set_txpower = at86rf230_set_txpower,
1332 	.set_lbt = at86rf230_set_lbt,
1333 	.set_cca_mode = at86rf230_set_cca_mode,
1334 	.set_cca_ed_level = at86rf230_set_cca_ed_level,
1335 	.set_csma_params = at86rf230_set_csma_params,
1336 	.set_frame_retries = at86rf230_set_frame_retries,
1337 	.set_promiscuous_mode = at86rf230_set_promiscuous_mode,
1338 };
1339 
1340 static struct at86rf2xx_chip_data at86rf233_data = {
1341 	.t_sleep_cycle = 330,
1342 	.t_channel_switch = 11,
1343 	.t_reset_to_off = 26,
1344 	.t_off_to_aack = 80,
1345 	.t_off_to_tx_on = 80,
1346 	.t_off_to_sleep = 35,
1347 	.t_sleep_to_off = 1000,
1348 	.t_frame = 4096,
1349 	.t_p_ack = 545,
1350 	.rssi_base_val = -94,
1351 	.set_channel = at86rf23x_set_channel,
1352 	.set_txpower = at86rf23x_set_txpower,
1353 };
1354 
1355 static struct at86rf2xx_chip_data at86rf231_data = {
1356 	.t_sleep_cycle = 330,
1357 	.t_channel_switch = 24,
1358 	.t_reset_to_off = 37,
1359 	.t_off_to_aack = 110,
1360 	.t_off_to_tx_on = 110,
1361 	.t_off_to_sleep = 35,
1362 	.t_sleep_to_off = 1000,
1363 	.t_frame = 4096,
1364 	.t_p_ack = 545,
1365 	.rssi_base_val = -91,
1366 	.set_channel = at86rf23x_set_channel,
1367 	.set_txpower = at86rf23x_set_txpower,
1368 };
1369 
1370 static struct at86rf2xx_chip_data at86rf212_data = {
1371 	.t_sleep_cycle = 330,
1372 	.t_channel_switch = 11,
1373 	.t_reset_to_off = 26,
1374 	.t_off_to_aack = 200,
1375 	.t_off_to_tx_on = 200,
1376 	.t_off_to_sleep = 35,
1377 	.t_sleep_to_off = 1000,
1378 	.t_frame = 4096,
1379 	.t_p_ack = 545,
1380 	.rssi_base_val = -100,
1381 	.set_channel = at86rf212_set_channel,
1382 	.set_txpower = at86rf212_set_txpower,
1383 };
1384 
1385 static int at86rf230_hw_init(struct at86rf230_local *lp, u8 xtal_trim)
1386 {
1387 	int rc, irq_type, irq_pol = IRQ_ACTIVE_HIGH;
1388 	unsigned int dvdd;
1389 	u8 csma_seed[2];
1390 
1391 	rc = at86rf230_sync_state_change(lp, STATE_FORCE_TRX_OFF);
1392 	if (rc)
1393 		return rc;
1394 
1395 	irq_type = irq_get_trigger_type(lp->spi->irq);
1396 	if (irq_type == IRQ_TYPE_EDGE_FALLING ||
1397 	    irq_type == IRQ_TYPE_LEVEL_LOW)
1398 		irq_pol = IRQ_ACTIVE_LOW;
1399 
1400 	rc = at86rf230_write_subreg(lp, SR_IRQ_POLARITY, irq_pol);
1401 	if (rc)
1402 		return rc;
1403 
1404 	rc = at86rf230_write_subreg(lp, SR_RX_SAFE_MODE, 1);
1405 	if (rc)
1406 		return rc;
1407 
1408 	rc = at86rf230_write_subreg(lp, SR_IRQ_MASK, IRQ_TRX_END);
1409 	if (rc)
1410 		return rc;
1411 
1412 	/* reset values differs in at86rf231 and at86rf233 */
1413 	rc = at86rf230_write_subreg(lp, SR_IRQ_MASK_MODE, 0);
1414 	if (rc)
1415 		return rc;
1416 
1417 	get_random_bytes(csma_seed, ARRAY_SIZE(csma_seed));
1418 	rc = at86rf230_write_subreg(lp, SR_CSMA_SEED_0, csma_seed[0]);
1419 	if (rc)
1420 		return rc;
1421 	rc = at86rf230_write_subreg(lp, SR_CSMA_SEED_1, csma_seed[1]);
1422 	if (rc)
1423 		return rc;
1424 
1425 	/* CLKM changes are applied immediately */
1426 	rc = at86rf230_write_subreg(lp, SR_CLKM_SHA_SEL, 0x00);
1427 	if (rc)
1428 		return rc;
1429 
1430 	/* Turn CLKM Off */
1431 	rc = at86rf230_write_subreg(lp, SR_CLKM_CTRL, 0x00);
1432 	if (rc)
1433 		return rc;
1434 	/* Wait the next SLEEP cycle */
1435 	usleep_range(lp->data->t_sleep_cycle,
1436 		     lp->data->t_sleep_cycle + 100);
1437 
1438 	/* xtal_trim value is calculated by:
1439 	 * CL = 0.5 * (CX + CTRIM + CPAR)
1440 	 *
1441 	 * whereas:
1442 	 * CL = capacitor of used crystal
1443 	 * CX = connected capacitors at xtal pins
1444 	 * CPAR = in all at86rf2xx datasheets this is a constant value 3 pF,
1445 	 *	  but this is different on each board setup. You need to fine
1446 	 *	  tuning this value via CTRIM.
1447 	 * CTRIM = variable capacitor setting. Resolution is 0.3 pF range is
1448 	 *	   0 pF upto 4.5 pF.
1449 	 *
1450 	 * Examples:
1451 	 * atben transceiver:
1452 	 *
1453 	 * CL = 8 pF
1454 	 * CX = 12 pF
1455 	 * CPAR = 3 pF (We assume the magic constant from datasheet)
1456 	 * CTRIM = 0.9 pF
1457 	 *
1458 	 * (12+0.9+3)/2 = 7.95 which is nearly at 8 pF
1459 	 *
1460 	 * xtal_trim = 0x3
1461 	 *
1462 	 * openlabs transceiver:
1463 	 *
1464 	 * CL = 16 pF
1465 	 * CX = 22 pF
1466 	 * CPAR = 3 pF (We assume the magic constant from datasheet)
1467 	 * CTRIM = 4.5 pF
1468 	 *
1469 	 * (22+4.5+3)/2 = 14.75 which is the nearest value to 16 pF
1470 	 *
1471 	 * xtal_trim = 0xf
1472 	 */
1473 	rc = at86rf230_write_subreg(lp, SR_XTAL_TRIM, xtal_trim);
1474 	if (rc)
1475 		return rc;
1476 
1477 	rc = at86rf230_read_subreg(lp, SR_DVDD_OK, &dvdd);
1478 	if (rc)
1479 		return rc;
1480 	if (!dvdd) {
1481 		dev_err(&lp->spi->dev, "DVDD error\n");
1482 		return -EINVAL;
1483 	}
1484 
1485 	/* Force setting slotted operation bit to 0. Sometimes the atben
1486 	 * sets this bit and I don't know why. We set this always force
1487 	 * to zero while probing.
1488 	 */
1489 	return at86rf230_write_subreg(lp, SR_SLOTTED_OPERATION, 0);
1490 }
1491 
1492 static int
1493 at86rf230_get_pdata(struct spi_device *spi, int *rstn, int *slp_tr,
1494 		    u8 *xtal_trim)
1495 {
1496 	struct at86rf230_platform_data *pdata = spi->dev.platform_data;
1497 	int ret;
1498 
1499 	if (!IS_ENABLED(CONFIG_OF) || !spi->dev.of_node) {
1500 		if (!pdata)
1501 			return -ENOENT;
1502 
1503 		*rstn = pdata->rstn;
1504 		*slp_tr = pdata->slp_tr;
1505 		*xtal_trim = pdata->xtal_trim;
1506 		return 0;
1507 	}
1508 
1509 	*rstn = of_get_named_gpio(spi->dev.of_node, "reset-gpio", 0);
1510 	*slp_tr = of_get_named_gpio(spi->dev.of_node, "sleep-gpio", 0);
1511 	ret = of_property_read_u8(spi->dev.of_node, "xtal-trim", xtal_trim);
1512 	if (ret < 0 && ret != -EINVAL)
1513 		return ret;
1514 
1515 	return 0;
1516 }
1517 
1518 static int
1519 at86rf230_detect_device(struct at86rf230_local *lp)
1520 {
1521 	unsigned int part, version, val;
1522 	u16 man_id = 0;
1523 	const char *chip;
1524 	int rc;
1525 
1526 	rc = __at86rf230_read(lp, RG_MAN_ID_0, &val);
1527 	if (rc)
1528 		return rc;
1529 	man_id |= val;
1530 
1531 	rc = __at86rf230_read(lp, RG_MAN_ID_1, &val);
1532 	if (rc)
1533 		return rc;
1534 	man_id |= (val << 8);
1535 
1536 	rc = __at86rf230_read(lp, RG_PART_NUM, &part);
1537 	if (rc)
1538 		return rc;
1539 
1540 	rc = __at86rf230_read(lp, RG_VERSION_NUM, &version);
1541 	if (rc)
1542 		return rc;
1543 
1544 	if (man_id != 0x001f) {
1545 		dev_err(&lp->spi->dev, "Non-Atmel dev found (MAN_ID %02x %02x)\n",
1546 			man_id >> 8, man_id & 0xFF);
1547 		return -EINVAL;
1548 	}
1549 
1550 	lp->hw->flags = IEEE802154_HW_TX_OMIT_CKSUM |
1551 			IEEE802154_HW_CSMA_PARAMS |
1552 			IEEE802154_HW_FRAME_RETRIES | IEEE802154_HW_AFILT |
1553 			IEEE802154_HW_PROMISCUOUS;
1554 
1555 	lp->hw->phy->flags = WPAN_PHY_FLAG_TXPOWER |
1556 			     WPAN_PHY_FLAG_CCA_ED_LEVEL |
1557 			     WPAN_PHY_FLAG_CCA_MODE;
1558 
1559 	lp->hw->phy->supported.cca_modes = BIT(NL802154_CCA_ENERGY) |
1560 		BIT(NL802154_CCA_CARRIER) | BIT(NL802154_CCA_ENERGY_CARRIER);
1561 	lp->hw->phy->supported.cca_opts = BIT(NL802154_CCA_OPT_ENERGY_CARRIER_AND) |
1562 		BIT(NL802154_CCA_OPT_ENERGY_CARRIER_OR);
1563 
1564 	lp->hw->phy->cca.mode = NL802154_CCA_ENERGY;
1565 
1566 	switch (part) {
1567 	case 2:
1568 		chip = "at86rf230";
1569 		rc = -ENOTSUPP;
1570 		goto not_supp;
1571 	case 3:
1572 		chip = "at86rf231";
1573 		lp->data = &at86rf231_data;
1574 		lp->hw->phy->supported.channels[0] = 0x7FFF800;
1575 		lp->hw->phy->current_channel = 11;
1576 		lp->hw->phy->symbol_duration = 16;
1577 		lp->hw->phy->supported.tx_powers = at86rf231_powers;
1578 		lp->hw->phy->supported.tx_powers_size = ARRAY_SIZE(at86rf231_powers);
1579 		lp->hw->phy->supported.cca_ed_levels = at86rf231_ed_levels;
1580 		lp->hw->phy->supported.cca_ed_levels_size = ARRAY_SIZE(at86rf231_ed_levels);
1581 		break;
1582 	case 7:
1583 		chip = "at86rf212";
1584 		lp->data = &at86rf212_data;
1585 		lp->hw->flags |= IEEE802154_HW_LBT;
1586 		lp->hw->phy->supported.channels[0] = 0x00007FF;
1587 		lp->hw->phy->supported.channels[2] = 0x00007FF;
1588 		lp->hw->phy->current_channel = 5;
1589 		lp->hw->phy->symbol_duration = 25;
1590 		lp->hw->phy->supported.lbt = NL802154_SUPPORTED_BOOL_BOTH;
1591 		lp->hw->phy->supported.tx_powers = at86rf212_powers;
1592 		lp->hw->phy->supported.tx_powers_size = ARRAY_SIZE(at86rf212_powers);
1593 		lp->hw->phy->supported.cca_ed_levels = at86rf212_ed_levels_100;
1594 		lp->hw->phy->supported.cca_ed_levels_size = ARRAY_SIZE(at86rf212_ed_levels_100);
1595 		break;
1596 	case 11:
1597 		chip = "at86rf233";
1598 		lp->data = &at86rf233_data;
1599 		lp->hw->phy->supported.channels[0] = 0x7FFF800;
1600 		lp->hw->phy->current_channel = 13;
1601 		lp->hw->phy->symbol_duration = 16;
1602 		lp->hw->phy->supported.tx_powers = at86rf233_powers;
1603 		lp->hw->phy->supported.tx_powers_size = ARRAY_SIZE(at86rf233_powers);
1604 		lp->hw->phy->supported.cca_ed_levels = at86rf233_ed_levels;
1605 		lp->hw->phy->supported.cca_ed_levels_size = ARRAY_SIZE(at86rf233_ed_levels);
1606 		break;
1607 	default:
1608 		chip = "unknown";
1609 		rc = -ENOTSUPP;
1610 		goto not_supp;
1611 	}
1612 
1613 	lp->hw->phy->cca_ed_level = lp->hw->phy->supported.cca_ed_levels[7];
1614 	lp->hw->phy->transmit_power = lp->hw->phy->supported.tx_powers[0];
1615 
1616 not_supp:
1617 	dev_info(&lp->spi->dev, "Detected %s chip version %d\n", chip, version);
1618 
1619 	return rc;
1620 }
1621 
1622 #ifdef CONFIG_IEEE802154_AT86RF230_DEBUGFS
1623 static struct dentry *at86rf230_debugfs_root;
1624 
1625 static int at86rf230_stats_show(struct seq_file *file, void *offset)
1626 {
1627 	struct at86rf230_local *lp = file->private;
1628 
1629 	seq_printf(file, "SUCCESS:\t\t%8llu\n", lp->trac.success);
1630 	seq_printf(file, "SUCCESS_DATA_PENDING:\t%8llu\n",
1631 		   lp->trac.success_data_pending);
1632 	seq_printf(file, "SUCCESS_WAIT_FOR_ACK:\t%8llu\n",
1633 		   lp->trac.success_wait_for_ack);
1634 	seq_printf(file, "CHANNEL_ACCESS_FAILURE:\t%8llu\n",
1635 		   lp->trac.channel_access_failure);
1636 	seq_printf(file, "NO_ACK:\t\t\t%8llu\n", lp->trac.no_ack);
1637 	seq_printf(file, "INVALID:\t\t%8llu\n", lp->trac.invalid);
1638 	return 0;
1639 }
1640 
1641 static int at86rf230_stats_open(struct inode *inode, struct file *file)
1642 {
1643 	return single_open(file, at86rf230_stats_show, inode->i_private);
1644 }
1645 
1646 static const struct file_operations at86rf230_stats_fops = {
1647 	.open		= at86rf230_stats_open,
1648 	.read		= seq_read,
1649 	.llseek		= seq_lseek,
1650 	.release	= single_release,
1651 };
1652 
1653 static int at86rf230_debugfs_init(struct at86rf230_local *lp)
1654 {
1655 	char debugfs_dir_name[DNAME_INLINE_LEN + 1] = "at86rf230-";
1656 	struct dentry *stats;
1657 
1658 	strncat(debugfs_dir_name, dev_name(&lp->spi->dev), DNAME_INLINE_LEN);
1659 
1660 	at86rf230_debugfs_root = debugfs_create_dir(debugfs_dir_name, NULL);
1661 	if (!at86rf230_debugfs_root)
1662 		return -ENOMEM;
1663 
1664 	stats = debugfs_create_file("trac_stats", 0444,
1665 				    at86rf230_debugfs_root, lp,
1666 				    &at86rf230_stats_fops);
1667 	if (!stats)
1668 		return -ENOMEM;
1669 
1670 	return 0;
1671 }
1672 
1673 static void at86rf230_debugfs_remove(void)
1674 {
1675 	debugfs_remove_recursive(at86rf230_debugfs_root);
1676 }
1677 #else
1678 static int at86rf230_debugfs_init(struct at86rf230_local *lp) { return 0; }
1679 static void at86rf230_debugfs_remove(void) { }
1680 #endif
1681 
1682 static int at86rf230_probe(struct spi_device *spi)
1683 {
1684 	struct ieee802154_hw *hw;
1685 	struct at86rf230_local *lp;
1686 	unsigned int status;
1687 	int rc, irq_type, rstn, slp_tr;
1688 	u8 xtal_trim = 0;
1689 
1690 	if (!spi->irq) {
1691 		dev_err(&spi->dev, "no IRQ specified\n");
1692 		return -EINVAL;
1693 	}
1694 
1695 	rc = at86rf230_get_pdata(spi, &rstn, &slp_tr, &xtal_trim);
1696 	if (rc < 0) {
1697 		dev_err(&spi->dev, "failed to parse platform_data: %d\n", rc);
1698 		return rc;
1699 	}
1700 
1701 	if (gpio_is_valid(rstn)) {
1702 		rc = devm_gpio_request_one(&spi->dev, rstn,
1703 					   GPIOF_OUT_INIT_HIGH, "rstn");
1704 		if (rc)
1705 			return rc;
1706 	}
1707 
1708 	if (gpio_is_valid(slp_tr)) {
1709 		rc = devm_gpio_request_one(&spi->dev, slp_tr,
1710 					   GPIOF_OUT_INIT_LOW, "slp_tr");
1711 		if (rc)
1712 			return rc;
1713 	}
1714 
1715 	/* Reset */
1716 	if (gpio_is_valid(rstn)) {
1717 		udelay(1);
1718 		gpio_set_value_cansleep(rstn, 0);
1719 		udelay(1);
1720 		gpio_set_value_cansleep(rstn, 1);
1721 		usleep_range(120, 240);
1722 	}
1723 
1724 	hw = ieee802154_alloc_hw(sizeof(*lp), &at86rf230_ops);
1725 	if (!hw)
1726 		return -ENOMEM;
1727 
1728 	lp = hw->priv;
1729 	lp->hw = hw;
1730 	lp->spi = spi;
1731 	lp->slp_tr = slp_tr;
1732 	hw->parent = &spi->dev;
1733 	ieee802154_random_extended_addr(&hw->phy->perm_extended_addr);
1734 
1735 	lp->regmap = devm_regmap_init_spi(spi, &at86rf230_regmap_spi_config);
1736 	if (IS_ERR(lp->regmap)) {
1737 		rc = PTR_ERR(lp->regmap);
1738 		dev_err(&spi->dev, "Failed to allocate register map: %d\n",
1739 			rc);
1740 		goto free_dev;
1741 	}
1742 
1743 	at86rf230_setup_spi_messages(lp, &lp->state);
1744 	at86rf230_setup_spi_messages(lp, &lp->tx);
1745 
1746 	rc = at86rf230_detect_device(lp);
1747 	if (rc < 0)
1748 		goto free_dev;
1749 
1750 	init_completion(&lp->state_complete);
1751 
1752 	spi_set_drvdata(spi, lp);
1753 
1754 	rc = at86rf230_hw_init(lp, xtal_trim);
1755 	if (rc)
1756 		goto free_dev;
1757 
1758 	/* Read irq status register to reset irq line */
1759 	rc = at86rf230_read_subreg(lp, RG_IRQ_STATUS, 0xff, 0, &status);
1760 	if (rc)
1761 		goto free_dev;
1762 
1763 	irq_type = irq_get_trigger_type(spi->irq);
1764 	if (!irq_type)
1765 		irq_type = IRQF_TRIGGER_HIGH;
1766 
1767 	rc = devm_request_irq(&spi->dev, spi->irq, at86rf230_isr,
1768 			      IRQF_SHARED | irq_type, dev_name(&spi->dev), lp);
1769 	if (rc)
1770 		goto free_dev;
1771 
1772 	/* disable_irq by default and wait for starting hardware */
1773 	disable_irq(spi->irq);
1774 
1775 	/* going into sleep by default */
1776 	at86rf230_sleep(lp);
1777 
1778 	rc = at86rf230_debugfs_init(lp);
1779 	if (rc)
1780 		goto free_dev;
1781 
1782 	rc = ieee802154_register_hw(lp->hw);
1783 	if (rc)
1784 		goto free_debugfs;
1785 
1786 	return rc;
1787 
1788 free_debugfs:
1789 	at86rf230_debugfs_remove();
1790 free_dev:
1791 	ieee802154_free_hw(lp->hw);
1792 
1793 	return rc;
1794 }
1795 
1796 static int at86rf230_remove(struct spi_device *spi)
1797 {
1798 	struct at86rf230_local *lp = spi_get_drvdata(spi);
1799 
1800 	/* mask all at86rf230 irq's */
1801 	at86rf230_write_subreg(lp, SR_IRQ_MASK, 0);
1802 	ieee802154_unregister_hw(lp->hw);
1803 	ieee802154_free_hw(lp->hw);
1804 	at86rf230_debugfs_remove();
1805 	dev_dbg(&spi->dev, "unregistered at86rf230\n");
1806 
1807 	return 0;
1808 }
1809 
1810 static const struct of_device_id at86rf230_of_match[] = {
1811 	{ .compatible = "atmel,at86rf230", },
1812 	{ .compatible = "atmel,at86rf231", },
1813 	{ .compatible = "atmel,at86rf233", },
1814 	{ .compatible = "atmel,at86rf212", },
1815 	{ },
1816 };
1817 MODULE_DEVICE_TABLE(of, at86rf230_of_match);
1818 
1819 static const struct spi_device_id at86rf230_device_id[] = {
1820 	{ .name = "at86rf230", },
1821 	{ .name = "at86rf231", },
1822 	{ .name = "at86rf233", },
1823 	{ .name = "at86rf212", },
1824 	{ },
1825 };
1826 MODULE_DEVICE_TABLE(spi, at86rf230_device_id);
1827 
1828 static struct spi_driver at86rf230_driver = {
1829 	.id_table = at86rf230_device_id,
1830 	.driver = {
1831 		.of_match_table = of_match_ptr(at86rf230_of_match),
1832 		.name	= "at86rf230",
1833 	},
1834 	.probe      = at86rf230_probe,
1835 	.remove     = at86rf230_remove,
1836 };
1837 
1838 module_spi_driver(at86rf230_driver);
1839 
1840 MODULE_DESCRIPTION("AT86RF230 Transceiver Driver");
1841 MODULE_LICENSE("GPL v2");
1842