xref: /linux/drivers/net/hamradio/yam.c (revision b454cc6636d254fbf6049b73e9560aee76fb04a3)
1 /*****************************************************************************/
2 
3 /*
4  *    yam.c  -- YAM radio modem driver.
5  *
6  *      Copyright (C) 1998 Frederic Rible F1OAT (frible@teaser.fr)
7  *      Adapted from baycom.c driver written by Thomas Sailer (sailer@ife.ee.ethz.ch)
8  *
9  *      This program is free software; you can redistribute it and/or modify
10  *      it under the terms of the GNU General Public License as published by
11  *      the Free Software Foundation; either version 2 of the License, or
12  *      (at your option) any later version.
13  *
14  *      This program is distributed in the hope that it will be useful,
15  *      but WITHOUT ANY WARRANTY; without even the implied warranty of
16  *      MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
17  *      GNU General Public License for more details.
18  *
19  *      You should have received a copy of the GNU General Public License
20  *      along with this program; if not, write to the Free Software
21  *      Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
22  *
23  *  Please note that the GPL allows you to use the driver, NOT the radio.
24  *  In order to use the radio, you need a license from the communications
25  *  authority of your country.
26  *
27  *
28  *  History:
29  *   0.0 F1OAT 06.06.98  Begin of work with baycom.c source code V 0.3
30  *   0.1 F1OAT 07.06.98  Add timer polling routine for channel arbitration
31  *   0.2 F6FBB 08.06.98  Added delay after FPGA programming
32  *   0.3 F6FBB 29.07.98  Delayed PTT implementation for dupmode=2
33  *   0.4 F6FBB 30.07.98  Added TxTail, Slottime and Persistance
34  *   0.5 F6FBB 01.08.98  Shared IRQs, /proc/net and network statistics
35  *   0.6 F6FBB 25.08.98  Added 1200Bds format
36  *   0.7 F6FBB 12.09.98  Added to the kernel configuration
37  *   0.8 F6FBB 14.10.98  Fixed slottime/persistence timing bug
38  *       OK1ZIA 2.09.01  Fixed "kfree_skb on hard IRQ"
39  *                       using dev_kfree_skb_any(). (important in 2.4 kernel)
40  *
41  */
42 
43 /*****************************************************************************/
44 
45 #include <linux/module.h>
46 #include <linux/types.h>
47 #include <linux/net.h>
48 #include <linux/in.h>
49 #include <linux/if.h>
50 #include <linux/slab.h>
51 #include <linux/errno.h>
52 #include <linux/bitops.h>
53 #include <asm/io.h>
54 #include <asm/system.h>
55 #include <linux/interrupt.h>
56 #include <linux/ioport.h>
57 
58 #include <linux/netdevice.h>
59 #include <linux/if_arp.h>
60 #include <linux/etherdevice.h>
61 #include <linux/skbuff.h>
62 #include <net/ax25.h>
63 
64 #include <linux/kernel.h>
65 #include <linux/proc_fs.h>
66 #include <linux/seq_file.h>
67 
68 #include <asm/uaccess.h>
69 #include <linux/init.h>
70 
71 #include <linux/yam.h>
72 #include "yam9600.h"
73 #include "yam1200.h"
74 
75 /* --------------------------------------------------------------------- */
76 
77 static const char yam_drvname[] = "yam";
78 static char yam_drvinfo[] __initdata = KERN_INFO "YAM driver version 0.8 by F1OAT/F6FBB\n";
79 
80 /* --------------------------------------------------------------------- */
81 
82 #define YAM_9600	1
83 #define YAM_1200	2
84 
85 #define NR_PORTS	4
86 #define YAM_MAGIC	0xF10A7654
87 
88 /* Transmitter states */
89 
90 #define TX_OFF		0
91 #define TX_HEAD		1
92 #define TX_DATA		2
93 #define TX_CRC1		3
94 #define TX_CRC2		4
95 #define TX_TAIL		5
96 
97 #define YAM_MAX_FRAME	1024
98 
99 #define DEFAULT_BITRATE	9600			/* bps */
100 #define DEFAULT_HOLDD	10			/* sec */
101 #define DEFAULT_TXD	300			/* ms */
102 #define DEFAULT_TXTAIL	10			/* ms */
103 #define DEFAULT_SLOT	100			/* ms */
104 #define DEFAULT_PERS	64			/* 0->255 */
105 
106 struct yam_port {
107 	int magic;
108 	int bitrate;
109 	int baudrate;
110 	int iobase;
111 	int irq;
112 	int dupmode;
113 
114 	struct net_device *dev;
115 
116 	/* Stats section */
117 
118 	struct net_device_stats stats;
119 
120 	int nb_rxint;
121 	int nb_mdint;
122 
123 	/* Parameters section */
124 
125 	int txd;				/* tx delay */
126 	int holdd;				/* duplex ptt delay */
127 	int txtail;				/* txtail delay */
128 	int slot;				/* slottime */
129 	int pers;				/* persistence */
130 
131 	/* Tx section */
132 
133 	int tx_state;
134 	int tx_count;
135 	int slotcnt;
136 	unsigned char tx_buf[YAM_MAX_FRAME];
137 	int tx_len;
138 	int tx_crcl, tx_crch;
139 	struct sk_buff_head send_queue;		/* Packets awaiting transmission */
140 
141 	/* Rx section */
142 
143 	int dcd;
144 	unsigned char rx_buf[YAM_MAX_FRAME];
145 	int rx_len;
146 	int rx_crcl, rx_crch;
147 };
148 
149 struct yam_mcs {
150 	unsigned char bits[YAM_FPGA_SIZE];
151 	int bitrate;
152 	struct yam_mcs *next;
153 };
154 
155 static struct net_device *yam_devs[NR_PORTS];
156 
157 static struct yam_mcs *yam_data;
158 
159 static DEFINE_TIMER(yam_timer, NULL, 0, 0);
160 
161 /* --------------------------------------------------------------------- */
162 
163 #define RBR(iobase)	(iobase+0)
164 #define THR(iobase)	(iobase+0)
165 #define IER(iobase)	(iobase+1)
166 #define IIR(iobase)	(iobase+2)
167 #define FCR(iobase)	(iobase+2)
168 #define LCR(iobase)	(iobase+3)
169 #define MCR(iobase)	(iobase+4)
170 #define LSR(iobase)	(iobase+5)
171 #define MSR(iobase)	(iobase+6)
172 #define SCR(iobase)	(iobase+7)
173 #define DLL(iobase)	(iobase+0)
174 #define DLM(iobase)	(iobase+1)
175 
176 #define YAM_EXTENT	8
177 
178 /* Interrupt Identification Register Bit Masks */
179 #define IIR_NOPEND	1
180 #define IIR_MSR		0
181 #define IIR_TX		2
182 #define IIR_RX		4
183 #define IIR_LSR		6
184 #define IIR_TIMEOUT	12			/* Fifo mode only */
185 
186 #define IIR_MASK	0x0F
187 
188 /* Interrupt Enable Register Bit Masks */
189 #define IER_RX		1			/* enable rx interrupt */
190 #define IER_TX		2			/* enable tx interrupt */
191 #define IER_LSR		4			/* enable line status interrupts */
192 #define IER_MSR		8			/* enable modem status interrupts */
193 
194 /* Modem Control Register Bit Masks */
195 #define MCR_DTR		0x01			/* DTR output */
196 #define MCR_RTS		0x02			/* RTS output */
197 #define MCR_OUT1	0x04			/* OUT1 output (not accessible in RS232) */
198 #define MCR_OUT2	0x08			/* Master Interrupt enable (must be set on PCs) */
199 #define MCR_LOOP	0x10			/* Loopback enable */
200 
201 /* Modem Status Register Bit Masks */
202 #define MSR_DCTS	0x01			/* Delta CTS input */
203 #define MSR_DDSR	0x02			/* Delta DSR */
204 #define MSR_DRIN	0x04			/* Delta RI */
205 #define MSR_DDCD	0x08			/* Delta DCD */
206 #define MSR_CTS		0x10			/* CTS input */
207 #define MSR_DSR		0x20			/* DSR input */
208 #define MSR_RING	0x40			/* RI  input */
209 #define MSR_DCD		0x80			/* DCD input */
210 
211 /* line status register bit mask */
212 #define LSR_RXC		0x01
213 #define LSR_OE		0x02
214 #define LSR_PE		0x04
215 #define LSR_FE		0x08
216 #define LSR_BREAK	0x10
217 #define LSR_THRE	0x20
218 #define LSR_TSRE	0x40
219 
220 /* Line Control Register Bit Masks */
221 #define LCR_DLAB	0x80
222 #define LCR_BREAK	0x40
223 #define LCR_PZERO	0x28
224 #define LCR_PEVEN	0x18
225 #define LCR_PODD	0x08
226 #define LCR_STOP1	0x00
227 #define LCR_STOP2	0x04
228 #define LCR_BIT5	0x00
229 #define LCR_BIT6	0x02
230 #define LCR_BIT7	0x01
231 #define LCR_BIT8	0x03
232 
233 /* YAM Modem <-> UART Port mapping */
234 
235 #define TX_RDY		MSR_DCTS		/* transmitter ready to send */
236 #define RX_DCD		MSR_DCD			/* carrier detect */
237 #define RX_FLAG		MSR_RING		/* hdlc flag received */
238 #define FPGA_DONE	MSR_DSR			/* FPGA is configured */
239 #define PTT_ON		(MCR_RTS|MCR_OUT2)	/* activate PTT */
240 #define PTT_OFF		(MCR_DTR|MCR_OUT2)	/* release PTT */
241 
242 #define ENABLE_RXINT	IER_RX			/* enable uart rx interrupt during rx */
243 #define ENABLE_TXINT	IER_MSR			/* enable uart ms interrupt during tx */
244 #define ENABLE_RTXINT	(IER_RX|IER_MSR)	/* full duplex operations */
245 
246 
247 /*************************************************************************
248 * CRC Tables
249 ************************************************************************/
250 
251 static const unsigned char chktabl[256] =
252 {0x00, 0x89, 0x12, 0x9b, 0x24, 0xad, 0x36, 0xbf, 0x48, 0xc1, 0x5a, 0xd3, 0x6c, 0xe5, 0x7e,
253  0xf7, 0x81, 0x08, 0x93, 0x1a, 0xa5, 0x2c, 0xb7, 0x3e, 0xc9, 0x40, 0xdb, 0x52, 0xed, 0x64,
254  0xff, 0x76, 0x02, 0x8b, 0x10, 0x99, 0x26, 0xaf, 0x34, 0xbd, 0x4a, 0xc3, 0x58, 0xd1, 0x6e,
255  0xe7, 0x7c, 0xf5, 0x83, 0x0a, 0x91, 0x18, 0xa7, 0x2e, 0xb5, 0x3c, 0xcb, 0x42, 0xd9, 0x50,
256  0xef, 0x66, 0xfd, 0x74, 0x04, 0x8d, 0x16, 0x9f, 0x20, 0xa9, 0x32, 0xbb, 0x4c, 0xc5, 0x5e,
257  0xd7, 0x68, 0xe1, 0x7a, 0xf3, 0x85, 0x0c, 0x97, 0x1e, 0xa1, 0x28, 0xb3, 0x3a, 0xcd, 0x44,
258  0xdf, 0x56, 0xe9, 0x60, 0xfb, 0x72, 0x06, 0x8f, 0x14, 0x9d, 0x22, 0xab, 0x30, 0xb9, 0x4e,
259  0xc7, 0x5c, 0xd5, 0x6a, 0xe3, 0x78, 0xf1, 0x87, 0x0e, 0x95, 0x1c, 0xa3, 0x2a, 0xb1, 0x38,
260  0xcf, 0x46, 0xdd, 0x54, 0xeb, 0x62, 0xf9, 0x70, 0x08, 0x81, 0x1a, 0x93, 0x2c, 0xa5, 0x3e,
261  0xb7, 0x40, 0xc9, 0x52, 0xdb, 0x64, 0xed, 0x76, 0xff, 0x89, 0x00, 0x9b, 0x12, 0xad, 0x24,
262  0xbf, 0x36, 0xc1, 0x48, 0xd3, 0x5a, 0xe5, 0x6c, 0xf7, 0x7e, 0x0a, 0x83, 0x18, 0x91, 0x2e,
263  0xa7, 0x3c, 0xb5, 0x42, 0xcb, 0x50, 0xd9, 0x66, 0xef, 0x74, 0xfd, 0x8b, 0x02, 0x99, 0x10,
264  0xaf, 0x26, 0xbd, 0x34, 0xc3, 0x4a, 0xd1, 0x58, 0xe7, 0x6e, 0xf5, 0x7c, 0x0c, 0x85, 0x1e,
265  0x97, 0x28, 0xa1, 0x3a, 0xb3, 0x44, 0xcd, 0x56, 0xdf, 0x60, 0xe9, 0x72, 0xfb, 0x8d, 0x04,
266  0x9f, 0x16, 0xa9, 0x20, 0xbb, 0x32, 0xc5, 0x4c, 0xd7, 0x5e, 0xe1, 0x68, 0xf3, 0x7a, 0x0e,
267  0x87, 0x1c, 0x95, 0x2a, 0xa3, 0x38, 0xb1, 0x46, 0xcf, 0x54, 0xdd, 0x62, 0xeb, 0x70, 0xf9,
268  0x8f, 0x06, 0x9d, 0x14, 0xab, 0x22, 0xb9, 0x30, 0xc7, 0x4e, 0xd5, 0x5c, 0xe3, 0x6a, 0xf1,
269  0x78};
270 static const unsigned char chktabh[256] =
271 {0x00, 0x11, 0x23, 0x32, 0x46, 0x57, 0x65, 0x74, 0x8c, 0x9d, 0xaf, 0xbe, 0xca, 0xdb, 0xe9,
272  0xf8, 0x10, 0x01, 0x33, 0x22, 0x56, 0x47, 0x75, 0x64, 0x9c, 0x8d, 0xbf, 0xae, 0xda, 0xcb,
273  0xf9, 0xe8, 0x21, 0x30, 0x02, 0x13, 0x67, 0x76, 0x44, 0x55, 0xad, 0xbc, 0x8e, 0x9f, 0xeb,
274  0xfa, 0xc8, 0xd9, 0x31, 0x20, 0x12, 0x03, 0x77, 0x66, 0x54, 0x45, 0xbd, 0xac, 0x9e, 0x8f,
275  0xfb, 0xea, 0xd8, 0xc9, 0x42, 0x53, 0x61, 0x70, 0x04, 0x15, 0x27, 0x36, 0xce, 0xdf, 0xed,
276  0xfc, 0x88, 0x99, 0xab, 0xba, 0x52, 0x43, 0x71, 0x60, 0x14, 0x05, 0x37, 0x26, 0xde, 0xcf,
277  0xfd, 0xec, 0x98, 0x89, 0xbb, 0xaa, 0x63, 0x72, 0x40, 0x51, 0x25, 0x34, 0x06, 0x17, 0xef,
278  0xfe, 0xcc, 0xdd, 0xa9, 0xb8, 0x8a, 0x9b, 0x73, 0x62, 0x50, 0x41, 0x35, 0x24, 0x16, 0x07,
279  0xff, 0xee, 0xdc, 0xcd, 0xb9, 0xa8, 0x9a, 0x8b, 0x84, 0x95, 0xa7, 0xb6, 0xc2, 0xd3, 0xe1,
280  0xf0, 0x08, 0x19, 0x2b, 0x3a, 0x4e, 0x5f, 0x6d, 0x7c, 0x94, 0x85, 0xb7, 0xa6, 0xd2, 0xc3,
281  0xf1, 0xe0, 0x18, 0x09, 0x3b, 0x2a, 0x5e, 0x4f, 0x7d, 0x6c, 0xa5, 0xb4, 0x86, 0x97, 0xe3,
282  0xf2, 0xc0, 0xd1, 0x29, 0x38, 0x0a, 0x1b, 0x6f, 0x7e, 0x4c, 0x5d, 0xb5, 0xa4, 0x96, 0x87,
283  0xf3, 0xe2, 0xd0, 0xc1, 0x39, 0x28, 0x1a, 0x0b, 0x7f, 0x6e, 0x5c, 0x4d, 0xc6, 0xd7, 0xe5,
284  0xf4, 0x80, 0x91, 0xa3, 0xb2, 0x4a, 0x5b, 0x69, 0x78, 0x0c, 0x1d, 0x2f, 0x3e, 0xd6, 0xc7,
285  0xf5, 0xe4, 0x90, 0x81, 0xb3, 0xa2, 0x5a, 0x4b, 0x79, 0x68, 0x1c, 0x0d, 0x3f, 0x2e, 0xe7,
286  0xf6, 0xc4, 0xd5, 0xa1, 0xb0, 0x82, 0x93, 0x6b, 0x7a, 0x48, 0x59, 0x2d, 0x3c, 0x0e, 0x1f,
287  0xf7, 0xe6, 0xd4, 0xc5, 0xb1, 0xa0, 0x92, 0x83, 0x7b, 0x6a, 0x58, 0x49, 0x3d, 0x2c, 0x1e,
288  0x0f};
289 
290 /*************************************************************************
291 * FPGA functions
292 ************************************************************************/
293 
294 static void delay(int ms)
295 {
296 	unsigned long timeout = jiffies + ((ms * HZ) / 1000);
297 	while (time_before(jiffies, timeout))
298 		cpu_relax();
299 }
300 
301 /*
302  * reset FPGA
303  */
304 
305 static void fpga_reset(int iobase)
306 {
307 	outb(0, IER(iobase));
308 	outb(LCR_DLAB | LCR_BIT5, LCR(iobase));
309 	outb(1, DLL(iobase));
310 	outb(0, DLM(iobase));
311 
312 	outb(LCR_BIT5, LCR(iobase));
313 	inb(LSR(iobase));
314 	inb(MSR(iobase));
315 	/* turn off FPGA supply voltage */
316 	outb(MCR_OUT1 | MCR_OUT2, MCR(iobase));
317 	delay(100);
318 	/* turn on FPGA supply voltage again */
319 	outb(MCR_DTR | MCR_RTS | MCR_OUT1 | MCR_OUT2, MCR(iobase));
320 	delay(100);
321 }
322 
323 /*
324  * send one byte to FPGA
325  */
326 
327 static int fpga_write(int iobase, unsigned char wrd)
328 {
329 	unsigned char bit;
330 	int k;
331 	unsigned long timeout = jiffies + HZ / 10;
332 
333 	for (k = 0; k < 8; k++) {
334 		bit = (wrd & 0x80) ? (MCR_RTS | MCR_DTR) : MCR_DTR;
335 		outb(bit | MCR_OUT1 | MCR_OUT2, MCR(iobase));
336 		wrd <<= 1;
337 		outb(0xfc, THR(iobase));
338 		while ((inb(LSR(iobase)) & LSR_TSRE) == 0)
339 			if (time_after(jiffies, timeout))
340 				return -1;
341 	}
342 
343 	return 0;
344 }
345 
346 static unsigned char *add_mcs(unsigned char *bits, int bitrate)
347 {
348 	struct yam_mcs *p;
349 
350 	/* If it already exists, replace the bit data */
351 	p = yam_data;
352 	while (p) {
353 		if (p->bitrate == bitrate) {
354 			memcpy(p->bits, bits, YAM_FPGA_SIZE);
355 			return p->bits;
356 		}
357 		p = p->next;
358 	}
359 
360 	/* Allocate a new mcs */
361 	if ((p = kmalloc(sizeof(struct yam_mcs), GFP_KERNEL)) == NULL) {
362 		printk(KERN_WARNING "YAM: no memory to allocate mcs\n");
363 		return NULL;
364 	}
365 	memcpy(p->bits, bits, YAM_FPGA_SIZE);
366 	p->bitrate = bitrate;
367 	p->next = yam_data;
368 	yam_data = p;
369 
370 	return p->bits;
371 }
372 
373 static unsigned char *get_mcs(int bitrate)
374 {
375 	struct yam_mcs *p;
376 
377 	p = yam_data;
378 	while (p) {
379 		if (p->bitrate == bitrate)
380 			return p->bits;
381 		p = p->next;
382 	}
383 
384 	/* Load predefined mcs data */
385 	switch (bitrate) {
386 	case 1200:
387 		return add_mcs(bits_1200, bitrate);
388 	default:
389 		return add_mcs(bits_9600, bitrate);
390 	}
391 }
392 
393 /*
394  * download bitstream to FPGA
395  * data is contained in bits[] array in yam1200.h resp. yam9600.h
396  */
397 
398 static int fpga_download(int iobase, int bitrate)
399 {
400 	int i, rc;
401 	unsigned char *pbits;
402 
403 	pbits = get_mcs(bitrate);
404 	if (pbits == NULL)
405 		return -1;
406 
407 	fpga_reset(iobase);
408 	for (i = 0; i < YAM_FPGA_SIZE; i++) {
409 		if (fpga_write(iobase, pbits[i])) {
410 			printk(KERN_ERR "yam: error in write cycle\n");
411 			return -1;			/* write... */
412 		}
413 	}
414 
415 	fpga_write(iobase, 0xFF);
416 	rc = inb(MSR(iobase));		/* check DONE signal */
417 
418 	/* Needed for some hardwares */
419 	delay(50);
420 
421 	return (rc & MSR_DSR) ? 0 : -1;
422 }
423 
424 
425 /************************************************************************
426 * Serial port init
427 ************************************************************************/
428 
429 static void yam_set_uart(struct net_device *dev)
430 {
431 	struct yam_port *yp = netdev_priv(dev);
432 	int divisor = 115200 / yp->baudrate;
433 
434 	outb(0, IER(dev->base_addr));
435 	outb(LCR_DLAB | LCR_BIT8, LCR(dev->base_addr));
436 	outb(divisor, DLL(dev->base_addr));
437 	outb(0, DLM(dev->base_addr));
438 	outb(LCR_BIT8, LCR(dev->base_addr));
439 	outb(PTT_OFF, MCR(dev->base_addr));
440 	outb(0x00, FCR(dev->base_addr));
441 
442 	/* Flush pending irq */
443 
444 	inb(RBR(dev->base_addr));
445 	inb(MSR(dev->base_addr));
446 
447 	/* Enable rx irq */
448 
449 	outb(ENABLE_RTXINT, IER(dev->base_addr));
450 }
451 
452 
453 /* --------------------------------------------------------------------- */
454 
455 enum uart {
456 	c_uart_unknown, c_uart_8250,
457 	c_uart_16450, c_uart_16550, c_uart_16550A
458 };
459 
460 static const char *uart_str[] =
461 {"unknown", "8250", "16450", "16550", "16550A"};
462 
463 static enum uart yam_check_uart(unsigned int iobase)
464 {
465 	unsigned char b1, b2, b3;
466 	enum uart u;
467 	enum uart uart_tab[] =
468 	{c_uart_16450, c_uart_unknown, c_uart_16550, c_uart_16550A};
469 
470 	b1 = inb(MCR(iobase));
471 	outb(b1 | 0x10, MCR(iobase));	/* loopback mode */
472 	b2 = inb(MSR(iobase));
473 	outb(0x1a, MCR(iobase));
474 	b3 = inb(MSR(iobase)) & 0xf0;
475 	outb(b1, MCR(iobase));		/* restore old values */
476 	outb(b2, MSR(iobase));
477 	if (b3 != 0x90)
478 		return c_uart_unknown;
479 	inb(RBR(iobase));
480 	inb(RBR(iobase));
481 	outb(0x01, FCR(iobase));	/* enable FIFOs */
482 	u = uart_tab[(inb(IIR(iobase)) >> 6) & 3];
483 	if (u == c_uart_16450) {
484 		outb(0x5a, SCR(iobase));
485 		b1 = inb(SCR(iobase));
486 		outb(0xa5, SCR(iobase));
487 		b2 = inb(SCR(iobase));
488 		if ((b1 != 0x5a) || (b2 != 0xa5))
489 			u = c_uart_8250;
490 	}
491 	return u;
492 }
493 
494 /******************************************************************************
495 * Rx Section
496 ******************************************************************************/
497 static inline void yam_rx_flag(struct net_device *dev, struct yam_port *yp)
498 {
499 	if (yp->dcd && yp->rx_len >= 3 && yp->rx_len < YAM_MAX_FRAME) {
500 		int pkt_len = yp->rx_len - 2 + 1;	/* -CRC + kiss */
501 		struct sk_buff *skb;
502 
503 		if ((yp->rx_crch & yp->rx_crcl) != 0xFF) {
504 			/* Bad crc */
505 		} else {
506 			if (!(skb = dev_alloc_skb(pkt_len))) {
507 				printk(KERN_WARNING "%s: memory squeeze, dropping packet\n", dev->name);
508 				++yp->stats.rx_dropped;
509 			} else {
510 				unsigned char *cp;
511 				cp = skb_put(skb, pkt_len);
512 				*cp++ = 0;		/* KISS kludge */
513 				memcpy(cp, yp->rx_buf, pkt_len - 1);
514 				skb->protocol = ax25_type_trans(skb, dev);
515 				netif_rx(skb);
516 				dev->last_rx = jiffies;
517 				++yp->stats.rx_packets;
518 			}
519 		}
520 	}
521 	yp->rx_len = 0;
522 	yp->rx_crcl = 0x21;
523 	yp->rx_crch = 0xf3;
524 }
525 
526 static inline void yam_rx_byte(struct net_device *dev, struct yam_port *yp, unsigned char rxb)
527 {
528 	if (yp->rx_len < YAM_MAX_FRAME) {
529 		unsigned char c = yp->rx_crcl;
530 		yp->rx_crcl = (chktabl[c] ^ yp->rx_crch);
531 		yp->rx_crch = (chktabh[c] ^ rxb);
532 		yp->rx_buf[yp->rx_len++] = rxb;
533 	}
534 }
535 
536 /********************************************************************************
537 * TX Section
538 ********************************************************************************/
539 
540 static void ptt_on(struct net_device *dev)
541 {
542 	outb(PTT_ON, MCR(dev->base_addr));
543 }
544 
545 static void ptt_off(struct net_device *dev)
546 {
547 	outb(PTT_OFF, MCR(dev->base_addr));
548 }
549 
550 static int yam_send_packet(struct sk_buff *skb, struct net_device *dev)
551 {
552 	struct yam_port *yp = netdev_priv(dev);
553 
554 	skb_queue_tail(&yp->send_queue, skb);
555 	dev->trans_start = jiffies;
556 	return 0;
557 }
558 
559 static void yam_start_tx(struct net_device *dev, struct yam_port *yp)
560 {
561 	if ((yp->tx_state == TX_TAIL) || (yp->txd == 0))
562 		yp->tx_count = 1;
563 	else
564 		yp->tx_count = (yp->bitrate * yp->txd) / 8000;
565 	yp->tx_state = TX_HEAD;
566 	ptt_on(dev);
567 }
568 
569 static unsigned short random_seed;
570 
571 static inline unsigned short random_num(void)
572 {
573 	random_seed = 28629 * random_seed + 157;
574 	return random_seed;
575 }
576 
577 static void yam_arbitrate(struct net_device *dev)
578 {
579 	struct yam_port *yp = netdev_priv(dev);
580 
581 	if (yp->magic != YAM_MAGIC || yp->tx_state != TX_OFF ||
582 	    skb_queue_empty(&yp->send_queue))
583 		return;
584 	/* tx_state is TX_OFF and there is data to send */
585 
586 	if (yp->dupmode) {
587 		/* Full duplex mode, don't wait */
588 		yam_start_tx(dev, yp);
589 		return;
590 	}
591 	if (yp->dcd) {
592 		/* DCD on, wait slotime ... */
593 		yp->slotcnt = yp->slot / 10;
594 		return;
595 	}
596 	/* Is slottime passed ? */
597 	if ((--yp->slotcnt) > 0)
598 		return;
599 
600 	yp->slotcnt = yp->slot / 10;
601 
602 	/* is random > persist ? */
603 	if ((random_num() % 256) > yp->pers)
604 		return;
605 
606 	yam_start_tx(dev, yp);
607 }
608 
609 static void yam_dotimer(unsigned long dummy)
610 {
611 	int i;
612 
613 	for (i = 0; i < NR_PORTS; i++) {
614 		struct net_device *dev = yam_devs[i];
615 		if (dev && netif_running(dev))
616 			yam_arbitrate(dev);
617 	}
618 	yam_timer.expires = jiffies + HZ / 100;
619 	add_timer(&yam_timer);
620 }
621 
622 static void yam_tx_byte(struct net_device *dev, struct yam_port *yp)
623 {
624 	struct sk_buff *skb;
625 	unsigned char b, temp;
626 
627 	switch (yp->tx_state) {
628 	case TX_OFF:
629 		break;
630 	case TX_HEAD:
631 		if (--yp->tx_count <= 0) {
632 			if (!(skb = skb_dequeue(&yp->send_queue))) {
633 				ptt_off(dev);
634 				yp->tx_state = TX_OFF;
635 				break;
636 			}
637 			yp->tx_state = TX_DATA;
638 			if (skb->data[0] != 0) {
639 /*                              do_kiss_params(s, skb->data, skb->len); */
640 				dev_kfree_skb_any(skb);
641 				break;
642 			}
643 			yp->tx_len = skb->len - 1;	/* strip KISS byte */
644 			if (yp->tx_len >= YAM_MAX_FRAME || yp->tx_len < 2) {
645         			dev_kfree_skb_any(skb);
646 				break;
647 			}
648 			memcpy(yp->tx_buf, skb->data + 1, yp->tx_len);
649 			dev_kfree_skb_any(skb);
650 			yp->tx_count = 0;
651 			yp->tx_crcl = 0x21;
652 			yp->tx_crch = 0xf3;
653 			yp->tx_state = TX_DATA;
654 		}
655 		break;
656 	case TX_DATA:
657 		b = yp->tx_buf[yp->tx_count++];
658 		outb(b, THR(dev->base_addr));
659 		temp = yp->tx_crcl;
660 		yp->tx_crcl = chktabl[temp] ^ yp->tx_crch;
661 		yp->tx_crch = chktabh[temp] ^ b;
662 		if (yp->tx_count >= yp->tx_len) {
663 			yp->tx_state = TX_CRC1;
664 		}
665 		break;
666 	case TX_CRC1:
667 		yp->tx_crch = chktabl[yp->tx_crcl] ^ yp->tx_crch;
668 		yp->tx_crcl = chktabh[yp->tx_crcl] ^ chktabl[yp->tx_crch] ^ 0xff;
669 		outb(yp->tx_crcl, THR(dev->base_addr));
670 		yp->tx_state = TX_CRC2;
671 		break;
672 	case TX_CRC2:
673 		outb(chktabh[yp->tx_crch] ^ 0xFF, THR(dev->base_addr));
674 		if (skb_queue_empty(&yp->send_queue)) {
675 			yp->tx_count = (yp->bitrate * yp->txtail) / 8000;
676 			if (yp->dupmode == 2)
677 				yp->tx_count += (yp->bitrate * yp->holdd) / 8;
678 			if (yp->tx_count == 0)
679 				yp->tx_count = 1;
680 			yp->tx_state = TX_TAIL;
681 		} else {
682 			yp->tx_count = 1;
683 			yp->tx_state = TX_HEAD;
684 		}
685 		++yp->stats.tx_packets;
686 		break;
687 	case TX_TAIL:
688 		if (--yp->tx_count <= 0) {
689 			yp->tx_state = TX_OFF;
690 			ptt_off(dev);
691 		}
692 		break;
693 	}
694 }
695 
696 /***********************************************************************************
697 * ISR routine
698 ************************************************************************************/
699 
700 static irqreturn_t yam_interrupt(int irq, void *dev_id)
701 {
702 	struct net_device *dev;
703 	struct yam_port *yp;
704 	unsigned char iir;
705 	int counter = 100;
706 	int i;
707 	int handled = 0;
708 
709 	for (i = 0; i < NR_PORTS; i++) {
710 		dev = yam_devs[i];
711 		yp = netdev_priv(dev);
712 
713 		if (!netif_running(dev))
714 			continue;
715 
716 		while ((iir = IIR_MASK & inb(IIR(dev->base_addr))) != IIR_NOPEND) {
717 			unsigned char msr = inb(MSR(dev->base_addr));
718 			unsigned char lsr = inb(LSR(dev->base_addr));
719 			unsigned char rxb;
720 
721 			handled = 1;
722 
723 			if (lsr & LSR_OE)
724 				++yp->stats.rx_fifo_errors;
725 
726 			yp->dcd = (msr & RX_DCD) ? 1 : 0;
727 
728 			if (--counter <= 0) {
729 				printk(KERN_ERR "%s: too many irq iir=%d\n",
730 						dev->name, iir);
731 				goto out;
732 			}
733 			if (msr & TX_RDY) {
734 				++yp->nb_mdint;
735 				yam_tx_byte(dev, yp);
736 			}
737 			if (lsr & LSR_RXC) {
738 				++yp->nb_rxint;
739 				rxb = inb(RBR(dev->base_addr));
740 				if (msr & RX_FLAG)
741 					yam_rx_flag(dev, yp);
742 				else
743 					yam_rx_byte(dev, yp, rxb);
744 			}
745 		}
746 	}
747 out:
748 	return IRQ_RETVAL(handled);
749 }
750 
751 #ifdef CONFIG_PROC_FS
752 
753 static void *yam_seq_start(struct seq_file *seq, loff_t *pos)
754 {
755 	return (*pos < NR_PORTS) ? yam_devs[*pos] : NULL;
756 }
757 
758 static void *yam_seq_next(struct seq_file *seq, void *v, loff_t *pos)
759 {
760 	++*pos;
761 	return (*pos < NR_PORTS) ? yam_devs[*pos] : NULL;
762 }
763 
764 static void yam_seq_stop(struct seq_file *seq, void *v)
765 {
766 }
767 
768 static int yam_seq_show(struct seq_file *seq, void *v)
769 {
770 	struct net_device *dev = v;
771 	const struct yam_port *yp = netdev_priv(dev);
772 
773 	seq_printf(seq, "Device %s\n", dev->name);
774 	seq_printf(seq, "  Up       %d\n", netif_running(dev));
775 	seq_printf(seq, "  Speed    %u\n", yp->bitrate);
776 	seq_printf(seq, "  IoBase   0x%x\n", yp->iobase);
777 	seq_printf(seq, "  BaudRate %u\n", yp->baudrate);
778 	seq_printf(seq, "  IRQ      %u\n", yp->irq);
779 	seq_printf(seq, "  TxState  %u\n", yp->tx_state);
780 	seq_printf(seq, "  Duplex   %u\n", yp->dupmode);
781 	seq_printf(seq, "  HoldDly  %u\n", yp->holdd);
782 	seq_printf(seq, "  TxDelay  %u\n", yp->txd);
783 	seq_printf(seq, "  TxTail   %u\n", yp->txtail);
784 	seq_printf(seq, "  SlotTime %u\n", yp->slot);
785 	seq_printf(seq, "  Persist  %u\n", yp->pers);
786 	seq_printf(seq, "  TxFrames %lu\n", yp->stats.tx_packets);
787 	seq_printf(seq, "  RxFrames %lu\n", yp->stats.rx_packets);
788 	seq_printf(seq, "  TxInt    %u\n", yp->nb_mdint);
789 	seq_printf(seq, "  RxInt    %u\n", yp->nb_rxint);
790 	seq_printf(seq, "  RxOver   %lu\n", yp->stats.rx_fifo_errors);
791 	seq_printf(seq, "\n");
792 	return 0;
793 }
794 
795 static struct seq_operations yam_seqops = {
796 	.start = yam_seq_start,
797 	.next = yam_seq_next,
798 	.stop = yam_seq_stop,
799 	.show = yam_seq_show,
800 };
801 
802 static int yam_info_open(struct inode *inode, struct file *file)
803 {
804 	return seq_open(file, &yam_seqops);
805 }
806 
807 static struct file_operations yam_info_fops = {
808 	.owner = THIS_MODULE,
809 	.open = yam_info_open,
810 	.read = seq_read,
811 	.llseek = seq_lseek,
812 	.release = seq_release,
813 };
814 
815 #endif
816 
817 
818 /* --------------------------------------------------------------------- */
819 
820 static struct net_device_stats *yam_get_stats(struct net_device *dev)
821 {
822 	struct yam_port *yp;
823 
824 	if (!dev)
825 		return NULL;
826 
827 	yp = netdev_priv(dev);
828 	if (yp->magic != YAM_MAGIC)
829 		return NULL;
830 
831 	/*
832 	 * Get the current statistics.  This may be called with the
833 	 * card open or closed.
834 	 */
835 	return &yp->stats;
836 }
837 
838 /* --------------------------------------------------------------------- */
839 
840 static int yam_open(struct net_device *dev)
841 {
842 	struct yam_port *yp = netdev_priv(dev);
843 	enum uart u;
844 	int i;
845 	int ret=0;
846 
847 	printk(KERN_INFO "Trying %s at iobase 0x%lx irq %u\n", dev->name, dev->base_addr, dev->irq);
848 
849 	if (!dev || !yp->bitrate)
850 		return -ENXIO;
851 	if (!dev->base_addr || dev->base_addr > 0x1000 - YAM_EXTENT ||
852 		dev->irq < 2 || dev->irq > 15) {
853 		return -ENXIO;
854 	}
855 	if (!request_region(dev->base_addr, YAM_EXTENT, dev->name))
856 	{
857 		printk(KERN_ERR "%s: cannot 0x%lx busy\n", dev->name, dev->base_addr);
858 		return -EACCES;
859 	}
860 	if ((u = yam_check_uart(dev->base_addr)) == c_uart_unknown) {
861 		printk(KERN_ERR "%s: cannot find uart type\n", dev->name);
862 		ret = -EIO;
863 		goto out_release_base;
864 	}
865 	if (fpga_download(dev->base_addr, yp->bitrate)) {
866 		printk(KERN_ERR "%s: cannot init FPGA\n", dev->name);
867 		ret = -EIO;
868 		goto out_release_base;
869 	}
870 	outb(0, IER(dev->base_addr));
871 	if (request_irq(dev->irq, yam_interrupt, IRQF_DISABLED | IRQF_SHARED, dev->name, dev)) {
872 		printk(KERN_ERR "%s: irq %d busy\n", dev->name, dev->irq);
873 		ret = -EBUSY;
874 		goto out_release_base;
875 	}
876 
877 	yam_set_uart(dev);
878 
879 	netif_start_queue(dev);
880 
881 	yp->slotcnt = yp->slot / 10;
882 
883 	/* Reset overruns for all ports - FPGA programming makes overruns */
884 	for (i = 0; i < NR_PORTS; i++) {
885 		struct net_device *dev = yam_devs[i];
886 		struct yam_port *yp = netdev_priv(dev);
887 		inb(LSR(dev->base_addr));
888 		yp->stats.rx_fifo_errors = 0;
889 	}
890 
891 	printk(KERN_INFO "%s at iobase 0x%lx irq %u uart %s\n", dev->name, dev->base_addr, dev->irq,
892 		   uart_str[u]);
893 	return 0;
894 
895 out_release_base:
896 	release_region(dev->base_addr, YAM_EXTENT);
897 	return ret;
898 }
899 
900 /* --------------------------------------------------------------------- */
901 
902 static int yam_close(struct net_device *dev)
903 {
904 	struct sk_buff *skb;
905 	struct yam_port *yp = netdev_priv(dev);
906 
907 	if (!dev)
908 		return -EINVAL;
909 
910 	/*
911 	 * disable interrupts
912 	 */
913 	outb(0, IER(dev->base_addr));
914 	outb(1, MCR(dev->base_addr));
915 	/* Remove IRQ handler if last */
916 	free_irq(dev->irq,dev);
917 	release_region(dev->base_addr, YAM_EXTENT);
918 	netif_stop_queue(dev);
919 	while ((skb = skb_dequeue(&yp->send_queue)))
920 		dev_kfree_skb(skb);
921 
922 	printk(KERN_INFO "%s: close yam at iobase 0x%lx irq %u\n",
923 		   yam_drvname, dev->base_addr, dev->irq);
924 	return 0;
925 }
926 
927 /* --------------------------------------------------------------------- */
928 
929 static int yam_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
930 {
931 	struct yam_port *yp = netdev_priv(dev);
932 	struct yamdrv_ioctl_cfg yi;
933 	struct yamdrv_ioctl_mcs *ym;
934 	int ioctl_cmd;
935 
936 	if (copy_from_user(&ioctl_cmd, ifr->ifr_data, sizeof(int)))
937 		 return -EFAULT;
938 
939 	if (yp->magic != YAM_MAGIC)
940 		return -EINVAL;
941 
942 	if (!capable(CAP_NET_ADMIN))
943 		return -EPERM;
944 
945 	if (cmd != SIOCDEVPRIVATE)
946 		return -EINVAL;
947 
948 	switch (ioctl_cmd) {
949 
950 	case SIOCYAMRESERVED:
951 		return -EINVAL;			/* unused */
952 
953 	case SIOCYAMSMCS:
954 		if (netif_running(dev))
955 			return -EINVAL;		/* Cannot change this parameter when up */
956 		if ((ym = kmalloc(sizeof(struct yamdrv_ioctl_mcs), GFP_KERNEL)) == NULL)
957 			return -ENOBUFS;
958 		ym->bitrate = 9600;
959 		if (copy_from_user(ym, ifr->ifr_data, sizeof(struct yamdrv_ioctl_mcs))) {
960 			kfree(ym);
961 			return -EFAULT;
962 		}
963 		if (ym->bitrate > YAM_MAXBITRATE) {
964 			kfree(ym);
965 			return -EINVAL;
966 		}
967 		add_mcs(ym->bits, ym->bitrate);
968 		kfree(ym);
969 		break;
970 
971 	case SIOCYAMSCFG:
972 		if (!capable(CAP_SYS_RAWIO))
973 			return -EPERM;
974 		if (copy_from_user(&yi, ifr->ifr_data, sizeof(struct yamdrv_ioctl_cfg)))
975 			 return -EFAULT;
976 
977 		if ((yi.cfg.mask & YAM_IOBASE) && netif_running(dev))
978 			return -EINVAL;		/* Cannot change this parameter when up */
979 		if ((yi.cfg.mask & YAM_IRQ) && netif_running(dev))
980 			return -EINVAL;		/* Cannot change this parameter when up */
981 		if ((yi.cfg.mask & YAM_BITRATE) && netif_running(dev))
982 			return -EINVAL;		/* Cannot change this parameter when up */
983 		if ((yi.cfg.mask & YAM_BAUDRATE) && netif_running(dev))
984 			return -EINVAL;		/* Cannot change this parameter when up */
985 
986 		if (yi.cfg.mask & YAM_IOBASE) {
987 			yp->iobase = yi.cfg.iobase;
988 			dev->base_addr = yi.cfg.iobase;
989 		}
990 		if (yi.cfg.mask & YAM_IRQ) {
991 			if (yi.cfg.irq > 15)
992 				return -EINVAL;
993 			yp->irq = yi.cfg.irq;
994 			dev->irq = yi.cfg.irq;
995 		}
996 		if (yi.cfg.mask & YAM_BITRATE) {
997 			if (yi.cfg.bitrate > YAM_MAXBITRATE)
998 				return -EINVAL;
999 			yp->bitrate = yi.cfg.bitrate;
1000 		}
1001 		if (yi.cfg.mask & YAM_BAUDRATE) {
1002 			if (yi.cfg.baudrate > YAM_MAXBAUDRATE)
1003 				return -EINVAL;
1004 			yp->baudrate = yi.cfg.baudrate;
1005 		}
1006 		if (yi.cfg.mask & YAM_MODE) {
1007 			if (yi.cfg.mode > YAM_MAXMODE)
1008 				return -EINVAL;
1009 			yp->dupmode = yi.cfg.mode;
1010 		}
1011 		if (yi.cfg.mask & YAM_HOLDDLY) {
1012 			if (yi.cfg.holddly > YAM_MAXHOLDDLY)
1013 				return -EINVAL;
1014 			yp->holdd = yi.cfg.holddly;
1015 		}
1016 		if (yi.cfg.mask & YAM_TXDELAY) {
1017 			if (yi.cfg.txdelay > YAM_MAXTXDELAY)
1018 				return -EINVAL;
1019 			yp->txd = yi.cfg.txdelay;
1020 		}
1021 		if (yi.cfg.mask & YAM_TXTAIL) {
1022 			if (yi.cfg.txtail > YAM_MAXTXTAIL)
1023 				return -EINVAL;
1024 			yp->txtail = yi.cfg.txtail;
1025 		}
1026 		if (yi.cfg.mask & YAM_PERSIST) {
1027 			if (yi.cfg.persist > YAM_MAXPERSIST)
1028 				return -EINVAL;
1029 			yp->pers = yi.cfg.persist;
1030 		}
1031 		if (yi.cfg.mask & YAM_SLOTTIME) {
1032 			if (yi.cfg.slottime > YAM_MAXSLOTTIME)
1033 				return -EINVAL;
1034 			yp->slot = yi.cfg.slottime;
1035 			yp->slotcnt = yp->slot / 10;
1036 		}
1037 		break;
1038 
1039 	case SIOCYAMGCFG:
1040 		yi.cfg.mask = 0xffffffff;
1041 		yi.cfg.iobase = yp->iobase;
1042 		yi.cfg.irq = yp->irq;
1043 		yi.cfg.bitrate = yp->bitrate;
1044 		yi.cfg.baudrate = yp->baudrate;
1045 		yi.cfg.mode = yp->dupmode;
1046 		yi.cfg.txdelay = yp->txd;
1047 		yi.cfg.holddly = yp->holdd;
1048 		yi.cfg.txtail = yp->txtail;
1049 		yi.cfg.persist = yp->pers;
1050 		yi.cfg.slottime = yp->slot;
1051 		if (copy_to_user(ifr->ifr_data, &yi, sizeof(struct yamdrv_ioctl_cfg)))
1052 			 return -EFAULT;
1053 		break;
1054 
1055 	default:
1056 		return -EINVAL;
1057 
1058 	}
1059 
1060 	return 0;
1061 }
1062 
1063 /* --------------------------------------------------------------------- */
1064 
1065 static int yam_set_mac_address(struct net_device *dev, void *addr)
1066 {
1067 	struct sockaddr *sa = (struct sockaddr *) addr;
1068 
1069 	/* addr is an AX.25 shifted ASCII mac address */
1070 	memcpy(dev->dev_addr, sa->sa_data, dev->addr_len);
1071 	return 0;
1072 }
1073 
1074 /* --------------------------------------------------------------------- */
1075 
1076 static void yam_setup(struct net_device *dev)
1077 {
1078 	struct yam_port *yp = netdev_priv(dev);
1079 
1080 	yp->magic = YAM_MAGIC;
1081 	yp->bitrate = DEFAULT_BITRATE;
1082 	yp->baudrate = DEFAULT_BITRATE * 2;
1083 	yp->iobase = 0;
1084 	yp->irq = 0;
1085 	yp->dupmode = 0;
1086 	yp->holdd = DEFAULT_HOLDD;
1087 	yp->txd = DEFAULT_TXD;
1088 	yp->txtail = DEFAULT_TXTAIL;
1089 	yp->slot = DEFAULT_SLOT;
1090 	yp->pers = DEFAULT_PERS;
1091 	yp->dev = dev;
1092 
1093 	dev->base_addr = yp->iobase;
1094 	dev->irq = yp->irq;
1095 
1096 	dev->open = yam_open;
1097 	dev->stop = yam_close;
1098 	dev->do_ioctl = yam_ioctl;
1099 	dev->hard_start_xmit = yam_send_packet;
1100 	dev->get_stats = yam_get_stats;
1101 
1102 	skb_queue_head_init(&yp->send_queue);
1103 
1104 	dev->hard_header = ax25_hard_header;
1105 	dev->rebuild_header = ax25_rebuild_header;
1106 
1107 	dev->set_mac_address = yam_set_mac_address;
1108 
1109 	dev->type = ARPHRD_AX25;
1110 	dev->hard_header_len = AX25_MAX_HEADER_LEN;
1111 	dev->mtu = AX25_MTU;
1112 	dev->addr_len = AX25_ADDR_LEN;
1113 	memcpy(dev->broadcast, &ax25_bcast, AX25_ADDR_LEN);
1114 	memcpy(dev->dev_addr, &ax25_defaddr, AX25_ADDR_LEN);
1115 }
1116 
1117 static int __init yam_init_driver(void)
1118 {
1119 	struct net_device *dev;
1120 	int i, err;
1121 	char name[IFNAMSIZ];
1122 
1123 	printk(yam_drvinfo);
1124 
1125 	for (i = 0; i < NR_PORTS; i++) {
1126 		sprintf(name, "yam%d", i);
1127 
1128 		dev = alloc_netdev(sizeof(struct yam_port), name,
1129 				   yam_setup);
1130 		if (!dev) {
1131 			printk(KERN_ERR "yam: cannot allocate net device %s\n",
1132 			       dev->name);
1133 			err = -ENOMEM;
1134 			goto error;
1135 		}
1136 
1137 		err = register_netdev(dev);
1138 		if (err) {
1139 			printk(KERN_WARNING "yam: cannot register net device %s\n", dev->name);
1140 			goto error;
1141 		}
1142 		yam_devs[i] = dev;
1143 
1144 	}
1145 
1146 	yam_timer.function = yam_dotimer;
1147 	yam_timer.expires = jiffies + HZ / 100;
1148 	add_timer(&yam_timer);
1149 
1150 	proc_net_fops_create("yam", S_IRUGO, &yam_info_fops);
1151 	return 0;
1152  error:
1153 	while (--i >= 0) {
1154 		unregister_netdev(yam_devs[i]);
1155 		free_netdev(yam_devs[i]);
1156 	}
1157 	return err;
1158 }
1159 
1160 /* --------------------------------------------------------------------- */
1161 
1162 static void __exit yam_cleanup_driver(void)
1163 {
1164 	struct yam_mcs *p;
1165 	int i;
1166 
1167 	del_timer(&yam_timer);
1168 	for (i = 0; i < NR_PORTS; i++) {
1169 		struct net_device *dev = yam_devs[i];
1170 		if (dev) {
1171 			unregister_netdev(dev);
1172 			free_netdev(dev);
1173 		}
1174 	}
1175 
1176 	while (yam_data) {
1177 		p = yam_data;
1178 		yam_data = yam_data->next;
1179 		kfree(p);
1180 	}
1181 
1182 	proc_net_remove("yam");
1183 }
1184 
1185 /* --------------------------------------------------------------------- */
1186 
1187 MODULE_AUTHOR("Frederic Rible F1OAT frible@teaser.fr");
1188 MODULE_DESCRIPTION("Yam amateur radio modem driver");
1189 MODULE_LICENSE("GPL");
1190 
1191 module_init(yam_init_driver);
1192 module_exit(yam_cleanup_driver);
1193 
1194 /* --------------------------------------------------------------------- */
1195 
1196