1 /*****************************************************************************/ 2 3 /* 4 * yam.c -- YAM radio modem driver. 5 * 6 * Copyright (C) 1998 Frederic Rible F1OAT (frible@teaser.fr) 7 * Adapted from baycom.c driver written by Thomas Sailer (sailer@ife.ee.ethz.ch) 8 * 9 * This program is free software; you can redistribute it and/or modify 10 * it under the terms of the GNU General Public License as published by 11 * the Free Software Foundation; either version 2 of the License, or 12 * (at your option) any later version. 13 * 14 * This program is distributed in the hope that it will be useful, 15 * but WITHOUT ANY WARRANTY; without even the implied warranty of 16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 17 * GNU General Public License for more details. 18 * 19 * You should have received a copy of the GNU General Public License 20 * along with this program; if not, write to the Free Software 21 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. 22 * 23 * Please note that the GPL allows you to use the driver, NOT the radio. 24 * In order to use the radio, you need a license from the communications 25 * authority of your country. 26 * 27 * 28 * History: 29 * 0.0 F1OAT 06.06.98 Begin of work with baycom.c source code V 0.3 30 * 0.1 F1OAT 07.06.98 Add timer polling routine for channel arbitration 31 * 0.2 F6FBB 08.06.98 Added delay after FPGA programming 32 * 0.3 F6FBB 29.07.98 Delayed PTT implementation for dupmode=2 33 * 0.4 F6FBB 30.07.98 Added TxTail, Slottime and Persistance 34 * 0.5 F6FBB 01.08.98 Shared IRQs, /proc/net and network statistics 35 * 0.6 F6FBB 25.08.98 Added 1200Bds format 36 * 0.7 F6FBB 12.09.98 Added to the kernel configuration 37 * 0.8 F6FBB 14.10.98 Fixed slottime/persistence timing bug 38 * OK1ZIA 2.09.01 Fixed "kfree_skb on hard IRQ" 39 * using dev_kfree_skb_any(). (important in 2.4 kernel) 40 * 41 */ 42 43 /*****************************************************************************/ 44 45 #include <linux/config.h> 46 #include <linux/module.h> 47 #include <linux/types.h> 48 #include <linux/net.h> 49 #include <linux/in.h> 50 #include <linux/if.h> 51 #include <linux/slab.h> 52 #include <linux/errno.h> 53 #include <linux/bitops.h> 54 #include <asm/io.h> 55 #include <asm/system.h> 56 #include <linux/interrupt.h> 57 #include <linux/ioport.h> 58 59 #include <linux/netdevice.h> 60 #include <linux/if_arp.h> 61 #include <linux/etherdevice.h> 62 #include <linux/skbuff.h> 63 #if defined(CONFIG_AX25) || defined(CONFIG_AX25_MODULE) 64 /* prototypes for ax25_encapsulate and ax25_rebuild_header */ 65 #include <net/ax25.h> 66 #endif /* CONFIG_AX25 || CONFIG_AX25_MODULE */ 67 68 /* make genksyms happy */ 69 #include <linux/ip.h> 70 #include <linux/udp.h> 71 #include <linux/tcp.h> 72 73 #include <linux/kernel.h> 74 #include <linux/proc_fs.h> 75 #include <linux/seq_file.h> 76 77 #include <asm/uaccess.h> 78 #include <linux/init.h> 79 80 #include <linux/yam.h> 81 #include "yam9600.h" 82 #include "yam1200.h" 83 84 /* --------------------------------------------------------------------- */ 85 86 static const char yam_drvname[] = "yam"; 87 static char yam_drvinfo[] __initdata = KERN_INFO "YAM driver version 0.8 by F1OAT/F6FBB\n"; 88 89 /* --------------------------------------------------------------------- */ 90 91 #define YAM_9600 1 92 #define YAM_1200 2 93 94 #define NR_PORTS 4 95 #define YAM_MAGIC 0xF10A7654 96 97 /* Transmitter states */ 98 99 #define TX_OFF 0 100 #define TX_HEAD 1 101 #define TX_DATA 2 102 #define TX_CRC1 3 103 #define TX_CRC2 4 104 #define TX_TAIL 5 105 106 #define YAM_MAX_FRAME 1024 107 108 #define DEFAULT_BITRATE 9600 /* bps */ 109 #define DEFAULT_HOLDD 10 /* sec */ 110 #define DEFAULT_TXD 300 /* ms */ 111 #define DEFAULT_TXTAIL 10 /* ms */ 112 #define DEFAULT_SLOT 100 /* ms */ 113 #define DEFAULT_PERS 64 /* 0->255 */ 114 115 struct yam_port { 116 int magic; 117 int bitrate; 118 int baudrate; 119 int iobase; 120 int irq; 121 int dupmode; 122 123 struct net_device *dev; 124 125 /* Stats section */ 126 127 struct net_device_stats stats; 128 129 int nb_rxint; 130 int nb_mdint; 131 132 /* Parameters section */ 133 134 int txd; /* tx delay */ 135 int holdd; /* duplex ptt delay */ 136 int txtail; /* txtail delay */ 137 int slot; /* slottime */ 138 int pers; /* persistence */ 139 140 /* Tx section */ 141 142 int tx_state; 143 int tx_count; 144 int slotcnt; 145 unsigned char tx_buf[YAM_MAX_FRAME]; 146 int tx_len; 147 int tx_crcl, tx_crch; 148 struct sk_buff_head send_queue; /* Packets awaiting transmission */ 149 150 /* Rx section */ 151 152 int dcd; 153 unsigned char rx_buf[YAM_MAX_FRAME]; 154 int rx_len; 155 int rx_crcl, rx_crch; 156 }; 157 158 struct yam_mcs { 159 unsigned char bits[YAM_FPGA_SIZE]; 160 int bitrate; 161 struct yam_mcs *next; 162 }; 163 164 static struct net_device *yam_devs[NR_PORTS]; 165 166 static struct yam_mcs *yam_data; 167 168 static char ax25_bcast[7] = 169 {'Q' << 1, 'S' << 1, 'T' << 1, ' ' << 1, ' ' << 1, ' ' << 1, '0' << 1}; 170 static char ax25_test[7] = 171 {'L' << 1, 'I' << 1, 'N' << 1, 'U' << 1, 'X' << 1, ' ' << 1, '1' << 1}; 172 173 static struct timer_list yam_timer = TIMER_INITIALIZER(NULL, 0, 0); 174 175 /* --------------------------------------------------------------------- */ 176 177 #define RBR(iobase) (iobase+0) 178 #define THR(iobase) (iobase+0) 179 #define IER(iobase) (iobase+1) 180 #define IIR(iobase) (iobase+2) 181 #define FCR(iobase) (iobase+2) 182 #define LCR(iobase) (iobase+3) 183 #define MCR(iobase) (iobase+4) 184 #define LSR(iobase) (iobase+5) 185 #define MSR(iobase) (iobase+6) 186 #define SCR(iobase) (iobase+7) 187 #define DLL(iobase) (iobase+0) 188 #define DLM(iobase) (iobase+1) 189 190 #define YAM_EXTENT 8 191 192 /* Interrupt Identification Register Bit Masks */ 193 #define IIR_NOPEND 1 194 #define IIR_MSR 0 195 #define IIR_TX 2 196 #define IIR_RX 4 197 #define IIR_LSR 6 198 #define IIR_TIMEOUT 12 /* Fifo mode only */ 199 200 #define IIR_MASK 0x0F 201 202 /* Interrupt Enable Register Bit Masks */ 203 #define IER_RX 1 /* enable rx interrupt */ 204 #define IER_TX 2 /* enable tx interrupt */ 205 #define IER_LSR 4 /* enable line status interrupts */ 206 #define IER_MSR 8 /* enable modem status interrupts */ 207 208 /* Modem Control Register Bit Masks */ 209 #define MCR_DTR 0x01 /* DTR output */ 210 #define MCR_RTS 0x02 /* RTS output */ 211 #define MCR_OUT1 0x04 /* OUT1 output (not accessible in RS232) */ 212 #define MCR_OUT2 0x08 /* Master Interrupt enable (must be set on PCs) */ 213 #define MCR_LOOP 0x10 /* Loopback enable */ 214 215 /* Modem Status Register Bit Masks */ 216 #define MSR_DCTS 0x01 /* Delta CTS input */ 217 #define MSR_DDSR 0x02 /* Delta DSR */ 218 #define MSR_DRIN 0x04 /* Delta RI */ 219 #define MSR_DDCD 0x08 /* Delta DCD */ 220 #define MSR_CTS 0x10 /* CTS input */ 221 #define MSR_DSR 0x20 /* DSR input */ 222 #define MSR_RING 0x40 /* RI input */ 223 #define MSR_DCD 0x80 /* DCD input */ 224 225 /* line status register bit mask */ 226 #define LSR_RXC 0x01 227 #define LSR_OE 0x02 228 #define LSR_PE 0x04 229 #define LSR_FE 0x08 230 #define LSR_BREAK 0x10 231 #define LSR_THRE 0x20 232 #define LSR_TSRE 0x40 233 234 /* Line Control Register Bit Masks */ 235 #define LCR_DLAB 0x80 236 #define LCR_BREAK 0x40 237 #define LCR_PZERO 0x28 238 #define LCR_PEVEN 0x18 239 #define LCR_PODD 0x08 240 #define LCR_STOP1 0x00 241 #define LCR_STOP2 0x04 242 #define LCR_BIT5 0x00 243 #define LCR_BIT6 0x02 244 #define LCR_BIT7 0x01 245 #define LCR_BIT8 0x03 246 247 /* YAM Modem <-> UART Port mapping */ 248 249 #define TX_RDY MSR_DCTS /* transmitter ready to send */ 250 #define RX_DCD MSR_DCD /* carrier detect */ 251 #define RX_FLAG MSR_RING /* hdlc flag received */ 252 #define FPGA_DONE MSR_DSR /* FPGA is configured */ 253 #define PTT_ON (MCR_RTS|MCR_OUT2) /* activate PTT */ 254 #define PTT_OFF (MCR_DTR|MCR_OUT2) /* release PTT */ 255 256 #define ENABLE_RXINT IER_RX /* enable uart rx interrupt during rx */ 257 #define ENABLE_TXINT IER_MSR /* enable uart ms interrupt during tx */ 258 #define ENABLE_RTXINT (IER_RX|IER_MSR) /* full duplex operations */ 259 260 261 /************************************************************************* 262 * CRC Tables 263 ************************************************************************/ 264 265 static const unsigned char chktabl[256] = 266 {0x00, 0x89, 0x12, 0x9b, 0x24, 0xad, 0x36, 0xbf, 0x48, 0xc1, 0x5a, 0xd3, 0x6c, 0xe5, 0x7e, 267 0xf7, 0x81, 0x08, 0x93, 0x1a, 0xa5, 0x2c, 0xb7, 0x3e, 0xc9, 0x40, 0xdb, 0x52, 0xed, 0x64, 268 0xff, 0x76, 0x02, 0x8b, 0x10, 0x99, 0x26, 0xaf, 0x34, 0xbd, 0x4a, 0xc3, 0x58, 0xd1, 0x6e, 269 0xe7, 0x7c, 0xf5, 0x83, 0x0a, 0x91, 0x18, 0xa7, 0x2e, 0xb5, 0x3c, 0xcb, 0x42, 0xd9, 0x50, 270 0xef, 0x66, 0xfd, 0x74, 0x04, 0x8d, 0x16, 0x9f, 0x20, 0xa9, 0x32, 0xbb, 0x4c, 0xc5, 0x5e, 271 0xd7, 0x68, 0xe1, 0x7a, 0xf3, 0x85, 0x0c, 0x97, 0x1e, 0xa1, 0x28, 0xb3, 0x3a, 0xcd, 0x44, 272 0xdf, 0x56, 0xe9, 0x60, 0xfb, 0x72, 0x06, 0x8f, 0x14, 0x9d, 0x22, 0xab, 0x30, 0xb9, 0x4e, 273 0xc7, 0x5c, 0xd5, 0x6a, 0xe3, 0x78, 0xf1, 0x87, 0x0e, 0x95, 0x1c, 0xa3, 0x2a, 0xb1, 0x38, 274 0xcf, 0x46, 0xdd, 0x54, 0xeb, 0x62, 0xf9, 0x70, 0x08, 0x81, 0x1a, 0x93, 0x2c, 0xa5, 0x3e, 275 0xb7, 0x40, 0xc9, 0x52, 0xdb, 0x64, 0xed, 0x76, 0xff, 0x89, 0x00, 0x9b, 0x12, 0xad, 0x24, 276 0xbf, 0x36, 0xc1, 0x48, 0xd3, 0x5a, 0xe5, 0x6c, 0xf7, 0x7e, 0x0a, 0x83, 0x18, 0x91, 0x2e, 277 0xa7, 0x3c, 0xb5, 0x42, 0xcb, 0x50, 0xd9, 0x66, 0xef, 0x74, 0xfd, 0x8b, 0x02, 0x99, 0x10, 278 0xaf, 0x26, 0xbd, 0x34, 0xc3, 0x4a, 0xd1, 0x58, 0xe7, 0x6e, 0xf5, 0x7c, 0x0c, 0x85, 0x1e, 279 0x97, 0x28, 0xa1, 0x3a, 0xb3, 0x44, 0xcd, 0x56, 0xdf, 0x60, 0xe9, 0x72, 0xfb, 0x8d, 0x04, 280 0x9f, 0x16, 0xa9, 0x20, 0xbb, 0x32, 0xc5, 0x4c, 0xd7, 0x5e, 0xe1, 0x68, 0xf3, 0x7a, 0x0e, 281 0x87, 0x1c, 0x95, 0x2a, 0xa3, 0x38, 0xb1, 0x46, 0xcf, 0x54, 0xdd, 0x62, 0xeb, 0x70, 0xf9, 282 0x8f, 0x06, 0x9d, 0x14, 0xab, 0x22, 0xb9, 0x30, 0xc7, 0x4e, 0xd5, 0x5c, 0xe3, 0x6a, 0xf1, 283 0x78}; 284 static const unsigned char chktabh[256] = 285 {0x00, 0x11, 0x23, 0x32, 0x46, 0x57, 0x65, 0x74, 0x8c, 0x9d, 0xaf, 0xbe, 0xca, 0xdb, 0xe9, 286 0xf8, 0x10, 0x01, 0x33, 0x22, 0x56, 0x47, 0x75, 0x64, 0x9c, 0x8d, 0xbf, 0xae, 0xda, 0xcb, 287 0xf9, 0xe8, 0x21, 0x30, 0x02, 0x13, 0x67, 0x76, 0x44, 0x55, 0xad, 0xbc, 0x8e, 0x9f, 0xeb, 288 0xfa, 0xc8, 0xd9, 0x31, 0x20, 0x12, 0x03, 0x77, 0x66, 0x54, 0x45, 0xbd, 0xac, 0x9e, 0x8f, 289 0xfb, 0xea, 0xd8, 0xc9, 0x42, 0x53, 0x61, 0x70, 0x04, 0x15, 0x27, 0x36, 0xce, 0xdf, 0xed, 290 0xfc, 0x88, 0x99, 0xab, 0xba, 0x52, 0x43, 0x71, 0x60, 0x14, 0x05, 0x37, 0x26, 0xde, 0xcf, 291 0xfd, 0xec, 0x98, 0x89, 0xbb, 0xaa, 0x63, 0x72, 0x40, 0x51, 0x25, 0x34, 0x06, 0x17, 0xef, 292 0xfe, 0xcc, 0xdd, 0xa9, 0xb8, 0x8a, 0x9b, 0x73, 0x62, 0x50, 0x41, 0x35, 0x24, 0x16, 0x07, 293 0xff, 0xee, 0xdc, 0xcd, 0xb9, 0xa8, 0x9a, 0x8b, 0x84, 0x95, 0xa7, 0xb6, 0xc2, 0xd3, 0xe1, 294 0xf0, 0x08, 0x19, 0x2b, 0x3a, 0x4e, 0x5f, 0x6d, 0x7c, 0x94, 0x85, 0xb7, 0xa6, 0xd2, 0xc3, 295 0xf1, 0xe0, 0x18, 0x09, 0x3b, 0x2a, 0x5e, 0x4f, 0x7d, 0x6c, 0xa5, 0xb4, 0x86, 0x97, 0xe3, 296 0xf2, 0xc0, 0xd1, 0x29, 0x38, 0x0a, 0x1b, 0x6f, 0x7e, 0x4c, 0x5d, 0xb5, 0xa4, 0x96, 0x87, 297 0xf3, 0xe2, 0xd0, 0xc1, 0x39, 0x28, 0x1a, 0x0b, 0x7f, 0x6e, 0x5c, 0x4d, 0xc6, 0xd7, 0xe5, 298 0xf4, 0x80, 0x91, 0xa3, 0xb2, 0x4a, 0x5b, 0x69, 0x78, 0x0c, 0x1d, 0x2f, 0x3e, 0xd6, 0xc7, 299 0xf5, 0xe4, 0x90, 0x81, 0xb3, 0xa2, 0x5a, 0x4b, 0x79, 0x68, 0x1c, 0x0d, 0x3f, 0x2e, 0xe7, 300 0xf6, 0xc4, 0xd5, 0xa1, 0xb0, 0x82, 0x93, 0x6b, 0x7a, 0x48, 0x59, 0x2d, 0x3c, 0x0e, 0x1f, 301 0xf7, 0xe6, 0xd4, 0xc5, 0xb1, 0xa0, 0x92, 0x83, 0x7b, 0x6a, 0x58, 0x49, 0x3d, 0x2c, 0x1e, 302 0x0f}; 303 304 /************************************************************************* 305 * FPGA functions 306 ************************************************************************/ 307 308 static void delay(int ms) 309 { 310 unsigned long timeout = jiffies + ((ms * HZ) / 1000); 311 while (time_before(jiffies, timeout)) 312 cpu_relax(); 313 } 314 315 /* 316 * reset FPGA 317 */ 318 319 static void fpga_reset(int iobase) 320 { 321 outb(0, IER(iobase)); 322 outb(LCR_DLAB | LCR_BIT5, LCR(iobase)); 323 outb(1, DLL(iobase)); 324 outb(0, DLM(iobase)); 325 326 outb(LCR_BIT5, LCR(iobase)); 327 inb(LSR(iobase)); 328 inb(MSR(iobase)); 329 /* turn off FPGA supply voltage */ 330 outb(MCR_OUT1 | MCR_OUT2, MCR(iobase)); 331 delay(100); 332 /* turn on FPGA supply voltage again */ 333 outb(MCR_DTR | MCR_RTS | MCR_OUT1 | MCR_OUT2, MCR(iobase)); 334 delay(100); 335 } 336 337 /* 338 * send one byte to FPGA 339 */ 340 341 static int fpga_write(int iobase, unsigned char wrd) 342 { 343 unsigned char bit; 344 int k; 345 unsigned long timeout = jiffies + HZ / 10; 346 347 for (k = 0; k < 8; k++) { 348 bit = (wrd & 0x80) ? (MCR_RTS | MCR_DTR) : MCR_DTR; 349 outb(bit | MCR_OUT1 | MCR_OUT2, MCR(iobase)); 350 wrd <<= 1; 351 outb(0xfc, THR(iobase)); 352 while ((inb(LSR(iobase)) & LSR_TSRE) == 0) 353 if (time_after(jiffies, timeout)) 354 return -1; 355 } 356 357 return 0; 358 } 359 360 static unsigned char *add_mcs(unsigned char *bits, int bitrate) 361 { 362 struct yam_mcs *p; 363 364 /* If it already exists, replace the bit data */ 365 p = yam_data; 366 while (p) { 367 if (p->bitrate == bitrate) { 368 memcpy(p->bits, bits, YAM_FPGA_SIZE); 369 return p->bits; 370 } 371 p = p->next; 372 } 373 374 /* Allocate a new mcs */ 375 if ((p = kmalloc(sizeof(struct yam_mcs), GFP_KERNEL)) == NULL) { 376 printk(KERN_WARNING "YAM: no memory to allocate mcs\n"); 377 return NULL; 378 } 379 memcpy(p->bits, bits, YAM_FPGA_SIZE); 380 p->bitrate = bitrate; 381 p->next = yam_data; 382 yam_data = p; 383 384 return p->bits; 385 } 386 387 static unsigned char *get_mcs(int bitrate) 388 { 389 struct yam_mcs *p; 390 391 p = yam_data; 392 while (p) { 393 if (p->bitrate == bitrate) 394 return p->bits; 395 p = p->next; 396 } 397 398 /* Load predefined mcs data */ 399 switch (bitrate) { 400 case 1200: 401 return add_mcs(bits_1200, bitrate); 402 default: 403 return add_mcs(bits_9600, bitrate); 404 } 405 } 406 407 /* 408 * download bitstream to FPGA 409 * data is contained in bits[] array in yam1200.h resp. yam9600.h 410 */ 411 412 static int fpga_download(int iobase, int bitrate) 413 { 414 int i, rc; 415 unsigned char *pbits; 416 417 pbits = get_mcs(bitrate); 418 if (pbits == NULL) 419 return -1; 420 421 fpga_reset(iobase); 422 for (i = 0; i < YAM_FPGA_SIZE; i++) { 423 if (fpga_write(iobase, pbits[i])) { 424 printk(KERN_ERR "yam: error in write cycle\n"); 425 return -1; /* write... */ 426 } 427 } 428 429 fpga_write(iobase, 0xFF); 430 rc = inb(MSR(iobase)); /* check DONE signal */ 431 432 /* Needed for some hardwares */ 433 delay(50); 434 435 return (rc & MSR_DSR) ? 0 : -1; 436 } 437 438 439 /************************************************************************ 440 * Serial port init 441 ************************************************************************/ 442 443 static void yam_set_uart(struct net_device *dev) 444 { 445 struct yam_port *yp = netdev_priv(dev); 446 int divisor = 115200 / yp->baudrate; 447 448 outb(0, IER(dev->base_addr)); 449 outb(LCR_DLAB | LCR_BIT8, LCR(dev->base_addr)); 450 outb(divisor, DLL(dev->base_addr)); 451 outb(0, DLM(dev->base_addr)); 452 outb(LCR_BIT8, LCR(dev->base_addr)); 453 outb(PTT_OFF, MCR(dev->base_addr)); 454 outb(0x00, FCR(dev->base_addr)); 455 456 /* Flush pending irq */ 457 458 inb(RBR(dev->base_addr)); 459 inb(MSR(dev->base_addr)); 460 461 /* Enable rx irq */ 462 463 outb(ENABLE_RTXINT, IER(dev->base_addr)); 464 } 465 466 467 /* --------------------------------------------------------------------- */ 468 469 enum uart { 470 c_uart_unknown, c_uart_8250, 471 c_uart_16450, c_uart_16550, c_uart_16550A 472 }; 473 474 static const char *uart_str[] = 475 {"unknown", "8250", "16450", "16550", "16550A"}; 476 477 static enum uart yam_check_uart(unsigned int iobase) 478 { 479 unsigned char b1, b2, b3; 480 enum uart u; 481 enum uart uart_tab[] = 482 {c_uart_16450, c_uart_unknown, c_uart_16550, c_uart_16550A}; 483 484 b1 = inb(MCR(iobase)); 485 outb(b1 | 0x10, MCR(iobase)); /* loopback mode */ 486 b2 = inb(MSR(iobase)); 487 outb(0x1a, MCR(iobase)); 488 b3 = inb(MSR(iobase)) & 0xf0; 489 outb(b1, MCR(iobase)); /* restore old values */ 490 outb(b2, MSR(iobase)); 491 if (b3 != 0x90) 492 return c_uart_unknown; 493 inb(RBR(iobase)); 494 inb(RBR(iobase)); 495 outb(0x01, FCR(iobase)); /* enable FIFOs */ 496 u = uart_tab[(inb(IIR(iobase)) >> 6) & 3]; 497 if (u == c_uart_16450) { 498 outb(0x5a, SCR(iobase)); 499 b1 = inb(SCR(iobase)); 500 outb(0xa5, SCR(iobase)); 501 b2 = inb(SCR(iobase)); 502 if ((b1 != 0x5a) || (b2 != 0xa5)) 503 u = c_uart_8250; 504 } 505 return u; 506 } 507 508 /****************************************************************************** 509 * Rx Section 510 ******************************************************************************/ 511 static inline void yam_rx_flag(struct net_device *dev, struct yam_port *yp) 512 { 513 if (yp->dcd && yp->rx_len >= 3 && yp->rx_len < YAM_MAX_FRAME) { 514 int pkt_len = yp->rx_len - 2 + 1; /* -CRC + kiss */ 515 struct sk_buff *skb; 516 517 if ((yp->rx_crch & yp->rx_crcl) != 0xFF) { 518 /* Bad crc */ 519 } else { 520 if (!(skb = dev_alloc_skb(pkt_len))) { 521 printk(KERN_WARNING "%s: memory squeeze, dropping packet\n", dev->name); 522 ++yp->stats.rx_dropped; 523 } else { 524 unsigned char *cp; 525 cp = skb_put(skb, pkt_len); 526 *cp++ = 0; /* KISS kludge */ 527 memcpy(cp, yp->rx_buf, pkt_len - 1); 528 skb->protocol = ax25_type_trans(skb, dev); 529 netif_rx(skb); 530 dev->last_rx = jiffies; 531 ++yp->stats.rx_packets; 532 } 533 } 534 } 535 yp->rx_len = 0; 536 yp->rx_crcl = 0x21; 537 yp->rx_crch = 0xf3; 538 } 539 540 static inline void yam_rx_byte(struct net_device *dev, struct yam_port *yp, unsigned char rxb) 541 { 542 if (yp->rx_len < YAM_MAX_FRAME) { 543 unsigned char c = yp->rx_crcl; 544 yp->rx_crcl = (chktabl[c] ^ yp->rx_crch); 545 yp->rx_crch = (chktabh[c] ^ rxb); 546 yp->rx_buf[yp->rx_len++] = rxb; 547 } 548 } 549 550 /******************************************************************************** 551 * TX Section 552 ********************************************************************************/ 553 554 static void ptt_on(struct net_device *dev) 555 { 556 outb(PTT_ON, MCR(dev->base_addr)); 557 } 558 559 static void ptt_off(struct net_device *dev) 560 { 561 outb(PTT_OFF, MCR(dev->base_addr)); 562 } 563 564 static int yam_send_packet(struct sk_buff *skb, struct net_device *dev) 565 { 566 struct yam_port *yp = netdev_priv(dev); 567 568 skb_queue_tail(&yp->send_queue, skb); 569 dev->trans_start = jiffies; 570 return 0; 571 } 572 573 static void yam_start_tx(struct net_device *dev, struct yam_port *yp) 574 { 575 if ((yp->tx_state == TX_TAIL) || (yp->txd == 0)) 576 yp->tx_count = 1; 577 else 578 yp->tx_count = (yp->bitrate * yp->txd) / 8000; 579 yp->tx_state = TX_HEAD; 580 ptt_on(dev); 581 } 582 583 static unsigned short random_seed; 584 585 static inline unsigned short random_num(void) 586 { 587 random_seed = 28629 * random_seed + 157; 588 return random_seed; 589 } 590 591 static void yam_arbitrate(struct net_device *dev) 592 { 593 struct yam_port *yp = netdev_priv(dev); 594 595 if (yp->magic != YAM_MAGIC || yp->tx_state != TX_OFF || 596 skb_queue_empty(&yp->send_queue)) 597 return; 598 /* tx_state is TX_OFF and there is data to send */ 599 600 if (yp->dupmode) { 601 /* Full duplex mode, don't wait */ 602 yam_start_tx(dev, yp); 603 return; 604 } 605 if (yp->dcd) { 606 /* DCD on, wait slotime ... */ 607 yp->slotcnt = yp->slot / 10; 608 return; 609 } 610 /* Is slottime passed ? */ 611 if ((--yp->slotcnt) > 0) 612 return; 613 614 yp->slotcnt = yp->slot / 10; 615 616 /* is random > persist ? */ 617 if ((random_num() % 256) > yp->pers) 618 return; 619 620 yam_start_tx(dev, yp); 621 } 622 623 static void yam_dotimer(unsigned long dummy) 624 { 625 int i; 626 627 for (i = 0; i < NR_PORTS; i++) { 628 struct net_device *dev = yam_devs[i]; 629 if (dev && netif_running(dev)) 630 yam_arbitrate(dev); 631 } 632 yam_timer.expires = jiffies + HZ / 100; 633 add_timer(&yam_timer); 634 } 635 636 static void yam_tx_byte(struct net_device *dev, struct yam_port *yp) 637 { 638 struct sk_buff *skb; 639 unsigned char b, temp; 640 641 switch (yp->tx_state) { 642 case TX_OFF: 643 break; 644 case TX_HEAD: 645 if (--yp->tx_count <= 0) { 646 if (!(skb = skb_dequeue(&yp->send_queue))) { 647 ptt_off(dev); 648 yp->tx_state = TX_OFF; 649 break; 650 } 651 yp->tx_state = TX_DATA; 652 if (skb->data[0] != 0) { 653 /* do_kiss_params(s, skb->data, skb->len); */ 654 dev_kfree_skb_any(skb); 655 break; 656 } 657 yp->tx_len = skb->len - 1; /* strip KISS byte */ 658 if (yp->tx_len >= YAM_MAX_FRAME || yp->tx_len < 2) { 659 dev_kfree_skb_any(skb); 660 break; 661 } 662 memcpy(yp->tx_buf, skb->data + 1, yp->tx_len); 663 dev_kfree_skb_any(skb); 664 yp->tx_count = 0; 665 yp->tx_crcl = 0x21; 666 yp->tx_crch = 0xf3; 667 yp->tx_state = TX_DATA; 668 } 669 break; 670 case TX_DATA: 671 b = yp->tx_buf[yp->tx_count++]; 672 outb(b, THR(dev->base_addr)); 673 temp = yp->tx_crcl; 674 yp->tx_crcl = chktabl[temp] ^ yp->tx_crch; 675 yp->tx_crch = chktabh[temp] ^ b; 676 if (yp->tx_count >= yp->tx_len) { 677 yp->tx_state = TX_CRC1; 678 } 679 break; 680 case TX_CRC1: 681 yp->tx_crch = chktabl[yp->tx_crcl] ^ yp->tx_crch; 682 yp->tx_crcl = chktabh[yp->tx_crcl] ^ chktabl[yp->tx_crch] ^ 0xff; 683 outb(yp->tx_crcl, THR(dev->base_addr)); 684 yp->tx_state = TX_CRC2; 685 break; 686 case TX_CRC2: 687 outb(chktabh[yp->tx_crch] ^ 0xFF, THR(dev->base_addr)); 688 if (skb_queue_empty(&yp->send_queue)) { 689 yp->tx_count = (yp->bitrate * yp->txtail) / 8000; 690 if (yp->dupmode == 2) 691 yp->tx_count += (yp->bitrate * yp->holdd) / 8; 692 if (yp->tx_count == 0) 693 yp->tx_count = 1; 694 yp->tx_state = TX_TAIL; 695 } else { 696 yp->tx_count = 1; 697 yp->tx_state = TX_HEAD; 698 } 699 ++yp->stats.tx_packets; 700 break; 701 case TX_TAIL: 702 if (--yp->tx_count <= 0) { 703 yp->tx_state = TX_OFF; 704 ptt_off(dev); 705 } 706 break; 707 } 708 } 709 710 /*********************************************************************************** 711 * ISR routine 712 ************************************************************************************/ 713 714 static irqreturn_t yam_interrupt(int irq, void *dev_id, struct pt_regs *regs) 715 { 716 struct net_device *dev; 717 struct yam_port *yp; 718 unsigned char iir; 719 int counter = 100; 720 int i; 721 int handled = 0; 722 723 for (i = 0; i < NR_PORTS; i++) { 724 dev = yam_devs[i]; 725 yp = netdev_priv(dev); 726 727 if (!netif_running(dev)) 728 continue; 729 730 while ((iir = IIR_MASK & inb(IIR(dev->base_addr))) != IIR_NOPEND) { 731 unsigned char msr = inb(MSR(dev->base_addr)); 732 unsigned char lsr = inb(LSR(dev->base_addr)); 733 unsigned char rxb; 734 735 handled = 1; 736 737 if (lsr & LSR_OE) 738 ++yp->stats.rx_fifo_errors; 739 740 yp->dcd = (msr & RX_DCD) ? 1 : 0; 741 742 if (--counter <= 0) { 743 printk(KERN_ERR "%s: too many irq iir=%d\n", 744 dev->name, iir); 745 goto out; 746 } 747 if (msr & TX_RDY) { 748 ++yp->nb_mdint; 749 yam_tx_byte(dev, yp); 750 } 751 if (lsr & LSR_RXC) { 752 ++yp->nb_rxint; 753 rxb = inb(RBR(dev->base_addr)); 754 if (msr & RX_FLAG) 755 yam_rx_flag(dev, yp); 756 else 757 yam_rx_byte(dev, yp, rxb); 758 } 759 } 760 } 761 out: 762 return IRQ_RETVAL(handled); 763 } 764 765 #ifdef CONFIG_PROC_FS 766 767 static void *yam_seq_start(struct seq_file *seq, loff_t *pos) 768 { 769 return (*pos < NR_PORTS) ? yam_devs[*pos] : NULL; 770 } 771 772 static void *yam_seq_next(struct seq_file *seq, void *v, loff_t *pos) 773 { 774 ++*pos; 775 return (*pos < NR_PORTS) ? yam_devs[*pos] : NULL; 776 } 777 778 static void yam_seq_stop(struct seq_file *seq, void *v) 779 { 780 } 781 782 static int yam_seq_show(struct seq_file *seq, void *v) 783 { 784 struct net_device *dev = v; 785 const struct yam_port *yp = netdev_priv(dev); 786 787 seq_printf(seq, "Device %s\n", dev->name); 788 seq_printf(seq, " Up %d\n", netif_running(dev)); 789 seq_printf(seq, " Speed %u\n", yp->bitrate); 790 seq_printf(seq, " IoBase 0x%x\n", yp->iobase); 791 seq_printf(seq, " BaudRate %u\n", yp->baudrate); 792 seq_printf(seq, " IRQ %u\n", yp->irq); 793 seq_printf(seq, " TxState %u\n", yp->tx_state); 794 seq_printf(seq, " Duplex %u\n", yp->dupmode); 795 seq_printf(seq, " HoldDly %u\n", yp->holdd); 796 seq_printf(seq, " TxDelay %u\n", yp->txd); 797 seq_printf(seq, " TxTail %u\n", yp->txtail); 798 seq_printf(seq, " SlotTime %u\n", yp->slot); 799 seq_printf(seq, " Persist %u\n", yp->pers); 800 seq_printf(seq, " TxFrames %lu\n", yp->stats.tx_packets); 801 seq_printf(seq, " RxFrames %lu\n", yp->stats.rx_packets); 802 seq_printf(seq, " TxInt %u\n", yp->nb_mdint); 803 seq_printf(seq, " RxInt %u\n", yp->nb_rxint); 804 seq_printf(seq, " RxOver %lu\n", yp->stats.rx_fifo_errors); 805 seq_printf(seq, "\n"); 806 return 0; 807 } 808 809 static struct seq_operations yam_seqops = { 810 .start = yam_seq_start, 811 .next = yam_seq_next, 812 .stop = yam_seq_stop, 813 .show = yam_seq_show, 814 }; 815 816 static int yam_info_open(struct inode *inode, struct file *file) 817 { 818 return seq_open(file, &yam_seqops); 819 } 820 821 static struct file_operations yam_info_fops = { 822 .owner = THIS_MODULE, 823 .open = yam_info_open, 824 .read = seq_read, 825 .llseek = seq_lseek, 826 .release = seq_release, 827 }; 828 829 #endif 830 831 832 /* --------------------------------------------------------------------- */ 833 834 static struct net_device_stats *yam_get_stats(struct net_device *dev) 835 { 836 struct yam_port *yp; 837 838 if (!dev) 839 return NULL; 840 841 yp = netdev_priv(dev); 842 if (yp->magic != YAM_MAGIC) 843 return NULL; 844 845 /* 846 * Get the current statistics. This may be called with the 847 * card open or closed. 848 */ 849 return &yp->stats; 850 } 851 852 /* --------------------------------------------------------------------- */ 853 854 static int yam_open(struct net_device *dev) 855 { 856 struct yam_port *yp = netdev_priv(dev); 857 enum uart u; 858 int i; 859 int ret=0; 860 861 printk(KERN_INFO "Trying %s at iobase 0x%lx irq %u\n", dev->name, dev->base_addr, dev->irq); 862 863 if (!dev || !yp->bitrate) 864 return -ENXIO; 865 if (!dev->base_addr || dev->base_addr > 0x1000 - YAM_EXTENT || 866 dev->irq < 2 || dev->irq > 15) { 867 return -ENXIO; 868 } 869 if (!request_region(dev->base_addr, YAM_EXTENT, dev->name)) 870 { 871 printk(KERN_ERR "%s: cannot 0x%lx busy\n", dev->name, dev->base_addr); 872 return -EACCES; 873 } 874 if ((u = yam_check_uart(dev->base_addr)) == c_uart_unknown) { 875 printk(KERN_ERR "%s: cannot find uart type\n", dev->name); 876 ret = -EIO; 877 goto out_release_base; 878 } 879 if (fpga_download(dev->base_addr, yp->bitrate)) { 880 printk(KERN_ERR "%s: cannot init FPGA\n", dev->name); 881 ret = -EIO; 882 goto out_release_base; 883 } 884 outb(0, IER(dev->base_addr)); 885 if (request_irq(dev->irq, yam_interrupt, SA_INTERRUPT | SA_SHIRQ, dev->name, dev)) { 886 printk(KERN_ERR "%s: irq %d busy\n", dev->name, dev->irq); 887 ret = -EBUSY; 888 goto out_release_base; 889 } 890 891 yam_set_uart(dev); 892 893 netif_start_queue(dev); 894 895 yp->slotcnt = yp->slot / 10; 896 897 /* Reset overruns for all ports - FPGA programming makes overruns */ 898 for (i = 0; i < NR_PORTS; i++) { 899 struct net_device *dev = yam_devs[i]; 900 struct yam_port *yp = netdev_priv(dev); 901 inb(LSR(dev->base_addr)); 902 yp->stats.rx_fifo_errors = 0; 903 } 904 905 printk(KERN_INFO "%s at iobase 0x%lx irq %u uart %s\n", dev->name, dev->base_addr, dev->irq, 906 uart_str[u]); 907 return 0; 908 909 out_release_base: 910 release_region(dev->base_addr, YAM_EXTENT); 911 return ret; 912 } 913 914 /* --------------------------------------------------------------------- */ 915 916 static int yam_close(struct net_device *dev) 917 { 918 struct sk_buff *skb; 919 struct yam_port *yp = netdev_priv(dev); 920 921 if (!dev) 922 return -EINVAL; 923 924 /* 925 * disable interrupts 926 */ 927 outb(0, IER(dev->base_addr)); 928 outb(1, MCR(dev->base_addr)); 929 /* Remove IRQ handler if last */ 930 free_irq(dev->irq,dev); 931 release_region(dev->base_addr, YAM_EXTENT); 932 netif_stop_queue(dev); 933 while ((skb = skb_dequeue(&yp->send_queue))) 934 dev_kfree_skb(skb); 935 936 printk(KERN_INFO "%s: close yam at iobase 0x%lx irq %u\n", 937 yam_drvname, dev->base_addr, dev->irq); 938 return 0; 939 } 940 941 /* --------------------------------------------------------------------- */ 942 943 static int yam_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd) 944 { 945 struct yam_port *yp = netdev_priv(dev); 946 struct yamdrv_ioctl_cfg yi; 947 struct yamdrv_ioctl_mcs *ym; 948 int ioctl_cmd; 949 950 if (copy_from_user(&ioctl_cmd, ifr->ifr_data, sizeof(int))) 951 return -EFAULT; 952 953 if (yp->magic != YAM_MAGIC) 954 return -EINVAL; 955 956 if (!capable(CAP_NET_ADMIN)) 957 return -EPERM; 958 959 if (cmd != SIOCDEVPRIVATE) 960 return -EINVAL; 961 962 switch (ioctl_cmd) { 963 964 case SIOCYAMRESERVED: 965 return -EINVAL; /* unused */ 966 967 case SIOCYAMSMCS: 968 if (netif_running(dev)) 969 return -EINVAL; /* Cannot change this parameter when up */ 970 if ((ym = kmalloc(sizeof(struct yamdrv_ioctl_mcs), GFP_KERNEL)) == NULL) 971 return -ENOBUFS; 972 ym->bitrate = 9600; 973 if (copy_from_user(ym, ifr->ifr_data, sizeof(struct yamdrv_ioctl_mcs))) { 974 kfree(ym); 975 return -EFAULT; 976 } 977 if (ym->bitrate > YAM_MAXBITRATE) { 978 kfree(ym); 979 return -EINVAL; 980 } 981 add_mcs(ym->bits, ym->bitrate); 982 kfree(ym); 983 break; 984 985 case SIOCYAMSCFG: 986 if (!capable(CAP_SYS_RAWIO)) 987 return -EPERM; 988 if (copy_from_user(&yi, ifr->ifr_data, sizeof(struct yamdrv_ioctl_cfg))) 989 return -EFAULT; 990 991 if ((yi.cfg.mask & YAM_IOBASE) && netif_running(dev)) 992 return -EINVAL; /* Cannot change this parameter when up */ 993 if ((yi.cfg.mask & YAM_IRQ) && netif_running(dev)) 994 return -EINVAL; /* Cannot change this parameter when up */ 995 if ((yi.cfg.mask & YAM_BITRATE) && netif_running(dev)) 996 return -EINVAL; /* Cannot change this parameter when up */ 997 if ((yi.cfg.mask & YAM_BAUDRATE) && netif_running(dev)) 998 return -EINVAL; /* Cannot change this parameter when up */ 999 1000 if (yi.cfg.mask & YAM_IOBASE) { 1001 yp->iobase = yi.cfg.iobase; 1002 dev->base_addr = yi.cfg.iobase; 1003 } 1004 if (yi.cfg.mask & YAM_IRQ) { 1005 if (yi.cfg.irq > 15) 1006 return -EINVAL; 1007 yp->irq = yi.cfg.irq; 1008 dev->irq = yi.cfg.irq; 1009 } 1010 if (yi.cfg.mask & YAM_BITRATE) { 1011 if (yi.cfg.bitrate > YAM_MAXBITRATE) 1012 return -EINVAL; 1013 yp->bitrate = yi.cfg.bitrate; 1014 } 1015 if (yi.cfg.mask & YAM_BAUDRATE) { 1016 if (yi.cfg.baudrate > YAM_MAXBAUDRATE) 1017 return -EINVAL; 1018 yp->baudrate = yi.cfg.baudrate; 1019 } 1020 if (yi.cfg.mask & YAM_MODE) { 1021 if (yi.cfg.mode > YAM_MAXMODE) 1022 return -EINVAL; 1023 yp->dupmode = yi.cfg.mode; 1024 } 1025 if (yi.cfg.mask & YAM_HOLDDLY) { 1026 if (yi.cfg.holddly > YAM_MAXHOLDDLY) 1027 return -EINVAL; 1028 yp->holdd = yi.cfg.holddly; 1029 } 1030 if (yi.cfg.mask & YAM_TXDELAY) { 1031 if (yi.cfg.txdelay > YAM_MAXTXDELAY) 1032 return -EINVAL; 1033 yp->txd = yi.cfg.txdelay; 1034 } 1035 if (yi.cfg.mask & YAM_TXTAIL) { 1036 if (yi.cfg.txtail > YAM_MAXTXTAIL) 1037 return -EINVAL; 1038 yp->txtail = yi.cfg.txtail; 1039 } 1040 if (yi.cfg.mask & YAM_PERSIST) { 1041 if (yi.cfg.persist > YAM_MAXPERSIST) 1042 return -EINVAL; 1043 yp->pers = yi.cfg.persist; 1044 } 1045 if (yi.cfg.mask & YAM_SLOTTIME) { 1046 if (yi.cfg.slottime > YAM_MAXSLOTTIME) 1047 return -EINVAL; 1048 yp->slot = yi.cfg.slottime; 1049 yp->slotcnt = yp->slot / 10; 1050 } 1051 break; 1052 1053 case SIOCYAMGCFG: 1054 yi.cfg.mask = 0xffffffff; 1055 yi.cfg.iobase = yp->iobase; 1056 yi.cfg.irq = yp->irq; 1057 yi.cfg.bitrate = yp->bitrate; 1058 yi.cfg.baudrate = yp->baudrate; 1059 yi.cfg.mode = yp->dupmode; 1060 yi.cfg.txdelay = yp->txd; 1061 yi.cfg.holddly = yp->holdd; 1062 yi.cfg.txtail = yp->txtail; 1063 yi.cfg.persist = yp->pers; 1064 yi.cfg.slottime = yp->slot; 1065 if (copy_to_user(ifr->ifr_data, &yi, sizeof(struct yamdrv_ioctl_cfg))) 1066 return -EFAULT; 1067 break; 1068 1069 default: 1070 return -EINVAL; 1071 1072 } 1073 1074 return 0; 1075 } 1076 1077 /* --------------------------------------------------------------------- */ 1078 1079 static int yam_set_mac_address(struct net_device *dev, void *addr) 1080 { 1081 struct sockaddr *sa = (struct sockaddr *) addr; 1082 1083 /* addr is an AX.25 shifted ASCII mac address */ 1084 memcpy(dev->dev_addr, sa->sa_data, dev->addr_len); 1085 return 0; 1086 } 1087 1088 /* --------------------------------------------------------------------- */ 1089 1090 static void yam_setup(struct net_device *dev) 1091 { 1092 struct yam_port *yp = netdev_priv(dev); 1093 1094 yp->magic = YAM_MAGIC; 1095 yp->bitrate = DEFAULT_BITRATE; 1096 yp->baudrate = DEFAULT_BITRATE * 2; 1097 yp->iobase = 0; 1098 yp->irq = 0; 1099 yp->dupmode = 0; 1100 yp->holdd = DEFAULT_HOLDD; 1101 yp->txd = DEFAULT_TXD; 1102 yp->txtail = DEFAULT_TXTAIL; 1103 yp->slot = DEFAULT_SLOT; 1104 yp->pers = DEFAULT_PERS; 1105 yp->dev = dev; 1106 1107 dev->base_addr = yp->iobase; 1108 dev->irq = yp->irq; 1109 SET_MODULE_OWNER(dev); 1110 1111 dev->open = yam_open; 1112 dev->stop = yam_close; 1113 dev->do_ioctl = yam_ioctl; 1114 dev->hard_start_xmit = yam_send_packet; 1115 dev->get_stats = yam_get_stats; 1116 1117 skb_queue_head_init(&yp->send_queue); 1118 1119 #if defined(CONFIG_AX25) || defined(CONFIG_AX25_MODULE) 1120 dev->hard_header = ax25_encapsulate; 1121 dev->rebuild_header = ax25_rebuild_header; 1122 #else /* CONFIG_AX25 || CONFIG_AX25_MODULE */ 1123 dev->hard_header = NULL; 1124 dev->rebuild_header = NULL; 1125 #endif /* CONFIG_AX25 || CONFIG_AX25_MODULE */ 1126 1127 dev->set_mac_address = yam_set_mac_address; 1128 1129 dev->type = ARPHRD_AX25; /* AF_AX25 device */ 1130 dev->hard_header_len = 73; /* We do digipeaters now */ 1131 dev->mtu = 256; /* AX25 is the default */ 1132 dev->addr_len = 7; /* sizeof an ax.25 address */ 1133 memcpy(dev->broadcast, ax25_bcast, 7); 1134 memcpy(dev->dev_addr, ax25_test, 7); 1135 1136 } 1137 1138 static int __init yam_init_driver(void) 1139 { 1140 struct net_device *dev; 1141 int i, err; 1142 char name[IFNAMSIZ]; 1143 1144 printk(yam_drvinfo); 1145 1146 for (i = 0; i < NR_PORTS; i++) { 1147 sprintf(name, "yam%d", i); 1148 1149 dev = alloc_netdev(sizeof(struct yam_port), name, 1150 yam_setup); 1151 if (!dev) { 1152 printk(KERN_ERR "yam: cannot allocate net device %s\n", 1153 dev->name); 1154 err = -ENOMEM; 1155 goto error; 1156 } 1157 1158 err = register_netdev(dev); 1159 if (err) { 1160 printk(KERN_WARNING "yam: cannot register net device %s\n", dev->name); 1161 goto error; 1162 } 1163 yam_devs[i] = dev; 1164 1165 } 1166 1167 yam_timer.function = yam_dotimer; 1168 yam_timer.expires = jiffies + HZ / 100; 1169 add_timer(&yam_timer); 1170 1171 proc_net_fops_create("yam", S_IRUGO, &yam_info_fops); 1172 return 0; 1173 error: 1174 while (--i >= 0) { 1175 unregister_netdev(yam_devs[i]); 1176 free_netdev(yam_devs[i]); 1177 } 1178 return err; 1179 } 1180 1181 /* --------------------------------------------------------------------- */ 1182 1183 static void __exit yam_cleanup_driver(void) 1184 { 1185 struct yam_mcs *p; 1186 int i; 1187 1188 del_timer(&yam_timer); 1189 for (i = 0; i < NR_PORTS; i++) { 1190 struct net_device *dev = yam_devs[i]; 1191 if (dev) { 1192 unregister_netdev(dev); 1193 free_netdev(dev); 1194 } 1195 } 1196 1197 while (yam_data) { 1198 p = yam_data; 1199 yam_data = yam_data->next; 1200 kfree(p); 1201 } 1202 1203 proc_net_remove("yam"); 1204 } 1205 1206 /* --------------------------------------------------------------------- */ 1207 1208 MODULE_AUTHOR("Frederic Rible F1OAT frible@teaser.fr"); 1209 MODULE_DESCRIPTION("Yam amateur radio modem driver"); 1210 MODULE_LICENSE("GPL"); 1211 1212 module_init(yam_init_driver); 1213 module_exit(yam_cleanup_driver); 1214 1215 /* --------------------------------------------------------------------- */ 1216 1217