1 // SPDX-License-Identifier: GPL-2.0-or-later 2 /* 3 * PTP 1588 clock using the IXP46X 4 * 5 * Copyright (C) 2010 OMICRON electronics GmbH 6 */ 7 #include <linux/device.h> 8 #include <linux/err.h> 9 #include <linux/gpio.h> 10 #include <linux/init.h> 11 #include <linux/interrupt.h> 12 #include <linux/io.h> 13 #include <linux/irq.h> 14 #include <linux/kernel.h> 15 #include <linux/module.h> 16 17 #include <linux/ptp_clock_kernel.h> 18 19 #include "ixp46x_ts.h" 20 21 #define DRIVER "ptp_ixp46x" 22 #define N_EXT_TS 2 23 #define MASTER_GPIO 8 24 #define MASTER_IRQ 25 25 #define SLAVE_GPIO 7 26 #define SLAVE_IRQ 24 27 28 struct ixp_clock { 29 struct ixp46x_ts_regs *regs; 30 struct ptp_clock *ptp_clock; 31 struct ptp_clock_info caps; 32 int exts0_enabled; 33 int exts1_enabled; 34 }; 35 36 DEFINE_SPINLOCK(register_lock); 37 38 /* 39 * Register access functions 40 */ 41 42 static u64 ixp_systime_read(struct ixp46x_ts_regs *regs) 43 { 44 u64 ns; 45 u32 lo, hi; 46 47 lo = __raw_readl(®s->systime_lo); 48 hi = __raw_readl(®s->systime_hi); 49 50 ns = ((u64) hi) << 32; 51 ns |= lo; 52 ns <<= TICKS_NS_SHIFT; 53 54 return ns; 55 } 56 57 static void ixp_systime_write(struct ixp46x_ts_regs *regs, u64 ns) 58 { 59 u32 hi, lo; 60 61 ns >>= TICKS_NS_SHIFT; 62 hi = ns >> 32; 63 lo = ns & 0xffffffff; 64 65 __raw_writel(lo, ®s->systime_lo); 66 __raw_writel(hi, ®s->systime_hi); 67 } 68 69 /* 70 * Interrupt service routine 71 */ 72 73 static irqreturn_t isr(int irq, void *priv) 74 { 75 struct ixp_clock *ixp_clock = priv; 76 struct ixp46x_ts_regs *regs = ixp_clock->regs; 77 struct ptp_clock_event event; 78 u32 ack = 0, lo, hi, val; 79 80 val = __raw_readl(®s->event); 81 82 if (val & TSER_SNS) { 83 ack |= TSER_SNS; 84 if (ixp_clock->exts0_enabled) { 85 hi = __raw_readl(®s->asms_hi); 86 lo = __raw_readl(®s->asms_lo); 87 event.type = PTP_CLOCK_EXTTS; 88 event.index = 0; 89 event.timestamp = ((u64) hi) << 32; 90 event.timestamp |= lo; 91 event.timestamp <<= TICKS_NS_SHIFT; 92 ptp_clock_event(ixp_clock->ptp_clock, &event); 93 } 94 } 95 96 if (val & TSER_SNM) { 97 ack |= TSER_SNM; 98 if (ixp_clock->exts1_enabled) { 99 hi = __raw_readl(®s->amms_hi); 100 lo = __raw_readl(®s->amms_lo); 101 event.type = PTP_CLOCK_EXTTS; 102 event.index = 1; 103 event.timestamp = ((u64) hi) << 32; 104 event.timestamp |= lo; 105 event.timestamp <<= TICKS_NS_SHIFT; 106 ptp_clock_event(ixp_clock->ptp_clock, &event); 107 } 108 } 109 110 if (val & TTIPEND) 111 ack |= TTIPEND; /* this bit seems to be always set */ 112 113 if (ack) { 114 __raw_writel(ack, ®s->event); 115 return IRQ_HANDLED; 116 } else 117 return IRQ_NONE; 118 } 119 120 /* 121 * PTP clock operations 122 */ 123 124 static int ptp_ixp_adjfreq(struct ptp_clock_info *ptp, s32 ppb) 125 { 126 u64 adj; 127 u32 diff, addend; 128 int neg_adj = 0; 129 struct ixp_clock *ixp_clock = container_of(ptp, struct ixp_clock, caps); 130 struct ixp46x_ts_regs *regs = ixp_clock->regs; 131 132 if (ppb < 0) { 133 neg_adj = 1; 134 ppb = -ppb; 135 } 136 addend = DEFAULT_ADDEND; 137 adj = addend; 138 adj *= ppb; 139 diff = div_u64(adj, 1000000000ULL); 140 141 addend = neg_adj ? addend - diff : addend + diff; 142 143 __raw_writel(addend, ®s->addend); 144 145 return 0; 146 } 147 148 static int ptp_ixp_adjtime(struct ptp_clock_info *ptp, s64 delta) 149 { 150 s64 now; 151 unsigned long flags; 152 struct ixp_clock *ixp_clock = container_of(ptp, struct ixp_clock, caps); 153 struct ixp46x_ts_regs *regs = ixp_clock->regs; 154 155 spin_lock_irqsave(®ister_lock, flags); 156 157 now = ixp_systime_read(regs); 158 now += delta; 159 ixp_systime_write(regs, now); 160 161 spin_unlock_irqrestore(®ister_lock, flags); 162 163 return 0; 164 } 165 166 static int ptp_ixp_gettime(struct ptp_clock_info *ptp, struct timespec64 *ts) 167 { 168 u64 ns; 169 unsigned long flags; 170 struct ixp_clock *ixp_clock = container_of(ptp, struct ixp_clock, caps); 171 struct ixp46x_ts_regs *regs = ixp_clock->regs; 172 173 spin_lock_irqsave(®ister_lock, flags); 174 175 ns = ixp_systime_read(regs); 176 177 spin_unlock_irqrestore(®ister_lock, flags); 178 179 *ts = ns_to_timespec64(ns); 180 return 0; 181 } 182 183 static int ptp_ixp_settime(struct ptp_clock_info *ptp, 184 const struct timespec64 *ts) 185 { 186 u64 ns; 187 unsigned long flags; 188 struct ixp_clock *ixp_clock = container_of(ptp, struct ixp_clock, caps); 189 struct ixp46x_ts_regs *regs = ixp_clock->regs; 190 191 ns = timespec64_to_ns(ts); 192 193 spin_lock_irqsave(®ister_lock, flags); 194 195 ixp_systime_write(regs, ns); 196 197 spin_unlock_irqrestore(®ister_lock, flags); 198 199 return 0; 200 } 201 202 static int ptp_ixp_enable(struct ptp_clock_info *ptp, 203 struct ptp_clock_request *rq, int on) 204 { 205 struct ixp_clock *ixp_clock = container_of(ptp, struct ixp_clock, caps); 206 207 switch (rq->type) { 208 case PTP_CLK_REQ_EXTTS: 209 switch (rq->extts.index) { 210 case 0: 211 ixp_clock->exts0_enabled = on ? 1 : 0; 212 break; 213 case 1: 214 ixp_clock->exts1_enabled = on ? 1 : 0; 215 break; 216 default: 217 return -EINVAL; 218 } 219 return 0; 220 default: 221 break; 222 } 223 224 return -EOPNOTSUPP; 225 } 226 227 static const struct ptp_clock_info ptp_ixp_caps = { 228 .owner = THIS_MODULE, 229 .name = "IXP46X timer", 230 .max_adj = 66666655, 231 .n_ext_ts = N_EXT_TS, 232 .n_pins = 0, 233 .pps = 0, 234 .adjfreq = ptp_ixp_adjfreq, 235 .adjtime = ptp_ixp_adjtime, 236 .gettime64 = ptp_ixp_gettime, 237 .settime64 = ptp_ixp_settime, 238 .enable = ptp_ixp_enable, 239 }; 240 241 /* module operations */ 242 243 static struct ixp_clock ixp_clock; 244 245 static int setup_interrupt(int gpio) 246 { 247 int irq; 248 int err; 249 250 err = gpio_request(gpio, "ixp4-ptp"); 251 if (err) 252 return err; 253 254 err = gpio_direction_input(gpio); 255 if (err) 256 return err; 257 258 irq = gpio_to_irq(gpio); 259 if (irq < 0) 260 return irq; 261 262 err = irq_set_irq_type(irq, IRQF_TRIGGER_FALLING); 263 if (err) { 264 pr_err("cannot set trigger type for irq %d\n", irq); 265 return err; 266 } 267 268 err = request_irq(irq, isr, 0, DRIVER, &ixp_clock); 269 if (err) { 270 pr_err("request_irq failed for irq %d\n", irq); 271 return err; 272 } 273 274 return irq; 275 } 276 277 static void __exit ptp_ixp_exit(void) 278 { 279 free_irq(MASTER_IRQ, &ixp_clock); 280 free_irq(SLAVE_IRQ, &ixp_clock); 281 ixp46x_phc_index = -1; 282 ptp_clock_unregister(ixp_clock.ptp_clock); 283 } 284 285 static int __init ptp_ixp_init(void) 286 { 287 if (!cpu_is_ixp46x()) 288 return -ENODEV; 289 290 ixp_clock.regs = 291 (struct ixp46x_ts_regs __iomem *) IXP4XX_TIMESYNC_BASE_VIRT; 292 293 ixp_clock.caps = ptp_ixp_caps; 294 295 ixp_clock.ptp_clock = ptp_clock_register(&ixp_clock.caps, NULL); 296 297 if (IS_ERR(ixp_clock.ptp_clock)) 298 return PTR_ERR(ixp_clock.ptp_clock); 299 300 ixp46x_phc_index = ptp_clock_index(ixp_clock.ptp_clock); 301 302 __raw_writel(DEFAULT_ADDEND, &ixp_clock.regs->addend); 303 __raw_writel(1, &ixp_clock.regs->trgt_lo); 304 __raw_writel(0, &ixp_clock.regs->trgt_hi); 305 __raw_writel(TTIPEND, &ixp_clock.regs->event); 306 307 if (MASTER_IRQ != setup_interrupt(MASTER_GPIO)) { 308 pr_err("failed to setup gpio %d as irq\n", MASTER_GPIO); 309 goto no_master; 310 } 311 if (SLAVE_IRQ != setup_interrupt(SLAVE_GPIO)) { 312 pr_err("failed to setup gpio %d as irq\n", SLAVE_GPIO); 313 goto no_slave; 314 } 315 316 return 0; 317 no_slave: 318 free_irq(MASTER_IRQ, &ixp_clock); 319 no_master: 320 ptp_clock_unregister(ixp_clock.ptp_clock); 321 return -ENODEV; 322 } 323 324 module_init(ptp_ixp_init); 325 module_exit(ptp_ixp_exit); 326 327 MODULE_AUTHOR("Richard Cochran <richardcochran@gmail.com>"); 328 MODULE_DESCRIPTION("PTP clock using the IXP46X timer"); 329 MODULE_LICENSE("GPL"); 330