1 /* [xirc2ps_cs.c wk 03.11.99] (1.40 1999/11/18 00:06:03) 2 * Xircom CreditCard Ethernet Adapter IIps driver 3 * Xircom Realport 10/100 (RE-100) driver 4 * 5 * This driver supports various Xircom CreditCard Ethernet adapters 6 * including the CE2, CE IIps, RE-10, CEM28, CEM33, CE33, CEM56, 7 * CE3-100, CE3B, RE-100, REM10BT, and REM56G-100. 8 * 9 * 2000-09-24 <psheer@icon.co.za> The Xircom CE3B-100 may not 10 * autodetect the media properly. In this case use the 11 * if_port=1 (for 10BaseT) or if_port=4 (for 100BaseT) options 12 * to force the media type. 13 * 14 * Written originally by Werner Koch based on David Hinds' skeleton of the 15 * PCMCIA driver. 16 * 17 * Copyright (c) 1997,1998 Werner Koch (dd9jn) 18 * 19 * This driver is free software; you can redistribute it and/or modify 20 * it under the terms of the GNU General Public License as published by 21 * the Free Software Foundation; either version 2 of the License, or 22 * (at your option) any later version. 23 * 24 * It is distributed in the hope that it will be useful, 25 * but WITHOUT ANY WARRANTY; without even the implied warranty of 26 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 27 * GNU General Public License for more details. 28 * 29 * You should have received a copy of the GNU General Public License 30 * along with this program; if not, see <http://www.gnu.org/licenses/>. 31 * 32 * 33 * ALTERNATIVELY, this driver may be distributed under the terms of 34 * the following license, in which case the provisions of this license 35 * are required INSTEAD OF the GNU General Public License. (This clause 36 * is necessary due to a potential bad interaction between the GPL and 37 * the restrictions contained in a BSD-style copyright.) 38 * 39 * Redistribution and use in source and binary forms, with or without 40 * modification, are permitted provided that the following conditions 41 * are met: 42 * 1. Redistributions of source code must retain the above copyright 43 * notice, and the entire permission notice in its entirety, 44 * including the disclaimer of warranties. 45 * 2. Redistributions in binary form must reproduce the above copyright 46 * notice, this list of conditions and the following disclaimer in the 47 * documentation and/or other materials provided with the distribution. 48 * 3. The name of the author may not be used to endorse or promote 49 * products derived from this software without specific prior 50 * written permission. 51 * 52 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED 53 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 54 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 55 * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, 56 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 57 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 58 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 59 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 60 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 61 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED 62 * OF THE POSSIBILITY OF SUCH DAMAGE. 63 */ 64 65 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt 66 67 #include <linux/module.h> 68 #include <linux/kernel.h> 69 #include <linux/init.h> 70 #include <linux/ptrace.h> 71 #include <linux/slab.h> 72 #include <linux/string.h> 73 #include <linux/timer.h> 74 #include <linux/interrupt.h> 75 #include <linux/in.h> 76 #include <linux/delay.h> 77 #include <linux/ethtool.h> 78 #include <linux/netdevice.h> 79 #include <linux/etherdevice.h> 80 #include <linux/skbuff.h> 81 #include <linux/if_arp.h> 82 #include <linux/ioport.h> 83 #include <linux/bitops.h> 84 #include <linux/mii.h> 85 86 #include <pcmcia/cistpl.h> 87 #include <pcmcia/cisreg.h> 88 #include <pcmcia/ciscode.h> 89 90 #include <asm/io.h> 91 #include <asm/uaccess.h> 92 93 #ifndef MANFID_COMPAQ 94 #define MANFID_COMPAQ 0x0138 95 #define MANFID_COMPAQ2 0x0183 /* is this correct? */ 96 #endif 97 98 #include <pcmcia/ds.h> 99 100 /* Time in jiffies before concluding Tx hung */ 101 #define TX_TIMEOUT ((400*HZ)/1000) 102 103 /**************** 104 * Some constants used to access the hardware 105 */ 106 107 /* Register offsets and value constans */ 108 #define XIRCREG_CR 0 /* Command register (wr) */ 109 enum xirc_cr { 110 TransmitPacket = 0x01, 111 SoftReset = 0x02, 112 EnableIntr = 0x04, 113 ForceIntr = 0x08, 114 ClearTxFIFO = 0x10, 115 ClearRxOvrun = 0x20, 116 RestartTx = 0x40 117 }; 118 #define XIRCREG_ESR 0 /* Ethernet status register (rd) */ 119 enum xirc_esr { 120 FullPktRcvd = 0x01, /* full packet in receive buffer */ 121 PktRejected = 0x04, /* a packet has been rejected */ 122 TxPktPend = 0x08, /* TX Packet Pending */ 123 IncorPolarity = 0x10, 124 MediaSelect = 0x20 /* set if TP, clear if AUI */ 125 }; 126 #define XIRCREG_PR 1 /* Page Register select */ 127 #define XIRCREG_EDP 4 /* Ethernet Data Port Register */ 128 #define XIRCREG_ISR 6 /* Ethernet Interrupt Status Register */ 129 enum xirc_isr { 130 TxBufOvr = 0x01, /* TX Buffer Overflow */ 131 PktTxed = 0x02, /* Packet Transmitted */ 132 MACIntr = 0x04, /* MAC Interrupt occurred */ 133 TxResGrant = 0x08, /* Tx Reservation Granted */ 134 RxFullPkt = 0x20, /* Rx Full Packet */ 135 RxPktRej = 0x40, /* Rx Packet Rejected */ 136 ForcedIntr= 0x80 /* Forced Interrupt */ 137 }; 138 #define XIRCREG1_IMR0 12 /* Ethernet Interrupt Mask Register (on page 1)*/ 139 #define XIRCREG1_IMR1 13 140 #define XIRCREG0_TSO 8 /* Transmit Space Open Register (on page 0)*/ 141 #define XIRCREG0_TRS 10 /* Transmit reservation Size Register (page 0)*/ 142 #define XIRCREG0_DO 12 /* Data Offset Register (page 0) (wr) */ 143 #define XIRCREG0_RSR 12 /* Receive Status Register (page 0) (rd) */ 144 enum xirc_rsr { 145 PhyPkt = 0x01, /* set:physical packet, clear: multicast packet */ 146 BrdcstPkt = 0x02, /* set if it is a broadcast packet */ 147 PktTooLong = 0x04, /* set if packet length > 1518 */ 148 AlignErr = 0x10, /* incorrect CRC and last octet not complete */ 149 CRCErr = 0x20, /* incorrect CRC and last octet is complete */ 150 PktRxOk = 0x80 /* received ok */ 151 }; 152 #define XIRCREG0_PTR 13 /* packets transmitted register (rd) */ 153 #define XIRCREG0_RBC 14 /* receive byte count regsister (rd) */ 154 #define XIRCREG1_ECR 14 /* ethernet configurationn register */ 155 enum xirc_ecr { 156 FullDuplex = 0x04, /* enable full duplex mode */ 157 LongTPMode = 0x08, /* adjust for longer lengths of TP cable */ 158 DisablePolCor = 0x10,/* disable auto polarity correction */ 159 DisableLinkPulse = 0x20, /* disable link pulse generation */ 160 DisableAutoTx = 0x40, /* disable auto-transmit */ 161 }; 162 #define XIRCREG2_RBS 8 /* receive buffer start register */ 163 #define XIRCREG2_LED 10 /* LED Configuration register */ 164 /* values for the leds: Bits 2-0 for led 1 165 * 0 disabled Bits 5-3 for led 2 166 * 1 collision 167 * 2 noncollision 168 * 3 link_detected 169 * 4 incor_polarity 170 * 5 jabber 171 * 6 auto_assertion 172 * 7 rx_tx_activity 173 */ 174 #define XIRCREG2_MSR 12 /* Mohawk specific register */ 175 176 #define XIRCREG4_GPR0 8 /* General Purpose Register 0 */ 177 #define XIRCREG4_GPR1 9 /* General Purpose Register 1 */ 178 #define XIRCREG2_GPR2 13 /* General Purpose Register 2 (page2!)*/ 179 #define XIRCREG4_BOV 10 /* Bonding Version Register */ 180 #define XIRCREG4_LMA 12 /* Local Memory Address Register */ 181 #define XIRCREG4_LMD 14 /* Local Memory Data Port */ 182 /* MAC register can only by accessed with 8 bit operations */ 183 #define XIRCREG40_CMD0 8 /* Command Register (wr) */ 184 enum xirc_cmd { /* Commands */ 185 Transmit = 0x01, 186 EnableRecv = 0x04, 187 DisableRecv = 0x08, 188 Abort = 0x10, 189 Online = 0x20, 190 IntrAck = 0x40, 191 Offline = 0x80 192 }; 193 #define XIRCREG5_RHSA0 10 /* Rx Host Start Address */ 194 #define XIRCREG40_RXST0 9 /* Receive Status Register */ 195 #define XIRCREG40_TXST0 11 /* Transmit Status Register 0 */ 196 #define XIRCREG40_TXST1 12 /* Transmit Status Register 10 */ 197 #define XIRCREG40_RMASK0 13 /* Receive Mask Register */ 198 #define XIRCREG40_TMASK0 14 /* Transmit Mask Register 0 */ 199 #define XIRCREG40_TMASK1 15 /* Transmit Mask Register 0 */ 200 #define XIRCREG42_SWC0 8 /* Software Configuration 0 */ 201 #define XIRCREG42_SWC1 9 /* Software Configuration 1 */ 202 #define XIRCREG42_BOC 10 /* Back-Off Configuration */ 203 #define XIRCREG44_TDR0 8 /* Time Domain Reflectometry 0 */ 204 #define XIRCREG44_TDR1 9 /* Time Domain Reflectometry 1 */ 205 #define XIRCREG44_RXBC_LO 10 /* Rx Byte Count 0 (rd) */ 206 #define XIRCREG44_RXBC_HI 11 /* Rx Byte Count 1 (rd) */ 207 #define XIRCREG45_REV 15 /* Revision Register (rd) */ 208 #define XIRCREG50_IA 8 /* Individual Address (8-13) */ 209 210 static const char *if_names[] = { "Auto", "10BaseT", "10Base2", "AUI", "100BaseT" }; 211 212 /* card types */ 213 #define XIR_UNKNOWN 0 /* unknown: not supported */ 214 #define XIR_CE 1 /* (prodid 1) different hardware: not supported */ 215 #define XIR_CE2 2 /* (prodid 2) */ 216 #define XIR_CE3 3 /* (prodid 3) */ 217 #define XIR_CEM 4 /* (prodid 1) different hardware: not supported */ 218 #define XIR_CEM2 5 /* (prodid 2) */ 219 #define XIR_CEM3 6 /* (prodid 3) */ 220 #define XIR_CEM33 7 /* (prodid 4) */ 221 #define XIR_CEM56M 8 /* (prodid 5) */ 222 #define XIR_CEM56 9 /* (prodid 6) */ 223 #define XIR_CM28 10 /* (prodid 3) modem only: not supported here */ 224 #define XIR_CM33 11 /* (prodid 4) modem only: not supported here */ 225 #define XIR_CM56 12 /* (prodid 5) modem only: not supported here */ 226 #define XIR_CG 13 /* (prodid 1) GSM modem only: not supported */ 227 #define XIR_CBE 14 /* (prodid 1) cardbus ethernet: not supported */ 228 /*====================================================================*/ 229 230 /* Module parameters */ 231 232 MODULE_DESCRIPTION("Xircom PCMCIA ethernet driver"); 233 MODULE_LICENSE("Dual MPL/GPL"); 234 235 #define INT_MODULE_PARM(n, v) static int n = v; module_param(n, int, 0) 236 237 INT_MODULE_PARM(if_port, 0); 238 INT_MODULE_PARM(full_duplex, 0); 239 INT_MODULE_PARM(do_sound, 1); 240 INT_MODULE_PARM(lockup_hack, 0); /* anti lockup hack */ 241 242 /*====================================================================*/ 243 244 /* We do not process more than these number of bytes during one 245 * interrupt. (Of course we receive complete packets, so this is not 246 * an exact value). 247 * Something between 2000..22000; first value gives best interrupt latency, 248 * the second enables the usage of the complete on-chip buffer. We use the 249 * high value as the initial value. 250 */ 251 static unsigned maxrx_bytes = 22000; 252 253 /* MII management prototypes */ 254 static void mii_idle(unsigned int ioaddr); 255 static void mii_putbit(unsigned int ioaddr, unsigned data); 256 static int mii_getbit(unsigned int ioaddr); 257 static void mii_wbits(unsigned int ioaddr, unsigned data, int len); 258 static unsigned mii_rd(unsigned int ioaddr, u_char phyaddr, u_char phyreg); 259 static void mii_wr(unsigned int ioaddr, u_char phyaddr, u_char phyreg, 260 unsigned data, int len); 261 262 static int has_ce2_string(struct pcmcia_device * link); 263 static int xirc2ps_config(struct pcmcia_device * link); 264 static void xirc2ps_release(struct pcmcia_device * link); 265 static void xirc2ps_detach(struct pcmcia_device *p_dev); 266 267 static irqreturn_t xirc2ps_interrupt(int irq, void *dev_id); 268 269 struct local_info { 270 struct net_device *dev; 271 struct pcmcia_device *p_dev; 272 273 int card_type; 274 int probe_port; 275 int silicon; /* silicon revision. 0=old CE2, 1=Scipper, 4=Mohawk */ 276 int mohawk; /* a CE3 type card */ 277 int dingo; /* a CEM56 type card */ 278 int new_mii; /* has full 10baseT/100baseT MII */ 279 int modem; /* is a multi function card (i.e with a modem) */ 280 void __iomem *dingo_ccr; /* only used for CEM56 cards */ 281 unsigned last_ptr_value; /* last packets transmitted value */ 282 const char *manf_str; 283 struct work_struct tx_timeout_task; 284 }; 285 286 /**************** 287 * Some more prototypes 288 */ 289 static netdev_tx_t do_start_xmit(struct sk_buff *skb, 290 struct net_device *dev); 291 static void xirc_tx_timeout(struct net_device *dev); 292 static void xirc2ps_tx_timeout_task(struct work_struct *work); 293 static void set_addresses(struct net_device *dev); 294 static void set_multicast_list(struct net_device *dev); 295 static int set_card_type(struct pcmcia_device *link); 296 static int do_config(struct net_device *dev, struct ifmap *map); 297 static int do_open(struct net_device *dev); 298 static int do_ioctl(struct net_device *dev, struct ifreq *rq, int cmd); 299 static const struct ethtool_ops netdev_ethtool_ops; 300 static void hardreset(struct net_device *dev); 301 static void do_reset(struct net_device *dev, int full); 302 static int init_mii(struct net_device *dev); 303 static void do_powerdown(struct net_device *dev); 304 static int do_stop(struct net_device *dev); 305 306 /*=============== Helper functions =========================*/ 307 #define SelectPage(pgnr) outb((pgnr), ioaddr + XIRCREG_PR) 308 #define GetByte(reg) ((unsigned)inb(ioaddr + (reg))) 309 #define GetWord(reg) ((unsigned)inw(ioaddr + (reg))) 310 #define PutByte(reg,value) outb((value), ioaddr+(reg)) 311 #define PutWord(reg,value) outw((value), ioaddr+(reg)) 312 313 /*====== Functions used for debugging =================================*/ 314 #if 0 /* reading regs may change system status */ 315 static void 316 PrintRegisters(struct net_device *dev) 317 { 318 unsigned int ioaddr = dev->base_addr; 319 320 if (pc_debug > 1) { 321 int i, page; 322 323 printk(KERN_DEBUG pr_fmt("Register common: ")); 324 for (i = 0; i < 8; i++) 325 pr_cont(" %2.2x", GetByte(i)); 326 pr_cont("\n"); 327 for (page = 0; page <= 8; page++) { 328 printk(KERN_DEBUG pr_fmt("Register page %2x: "), page); 329 SelectPage(page); 330 for (i = 8; i < 16; i++) 331 pr_cont(" %2.2x", GetByte(i)); 332 pr_cont("\n"); 333 } 334 for (page=0x40 ; page <= 0x5f; page++) { 335 if (page == 0x43 || (page >= 0x46 && page <= 0x4f) || 336 (page >= 0x51 && page <=0x5e)) 337 continue; 338 printk(KERN_DEBUG pr_fmt("Register page %2x: "), page); 339 SelectPage(page); 340 for (i = 8; i < 16; i++) 341 pr_cont(" %2.2x", GetByte(i)); 342 pr_cont("\n"); 343 } 344 } 345 } 346 #endif /* 0 */ 347 348 /*============== MII Management functions ===============*/ 349 350 /**************** 351 * Turn around for read 352 */ 353 static void 354 mii_idle(unsigned int ioaddr) 355 { 356 PutByte(XIRCREG2_GPR2, 0x04|0); /* drive MDCK low */ 357 udelay(1); 358 PutByte(XIRCREG2_GPR2, 0x04|1); /* and drive MDCK high */ 359 udelay(1); 360 } 361 362 /**************** 363 * Write a bit to MDI/O 364 */ 365 static void 366 mii_putbit(unsigned int ioaddr, unsigned data) 367 { 368 #if 1 369 if (data) { 370 PutByte(XIRCREG2_GPR2, 0x0c|2|0); /* set MDIO */ 371 udelay(1); 372 PutByte(XIRCREG2_GPR2, 0x0c|2|1); /* and drive MDCK high */ 373 udelay(1); 374 } else { 375 PutByte(XIRCREG2_GPR2, 0x0c|0|0); /* clear MDIO */ 376 udelay(1); 377 PutByte(XIRCREG2_GPR2, 0x0c|0|1); /* and drive MDCK high */ 378 udelay(1); 379 } 380 #else 381 if (data) { 382 PutWord(XIRCREG2_GPR2-1, 0x0e0e); 383 udelay(1); 384 PutWord(XIRCREG2_GPR2-1, 0x0f0f); 385 udelay(1); 386 } else { 387 PutWord(XIRCREG2_GPR2-1, 0x0c0c); 388 udelay(1); 389 PutWord(XIRCREG2_GPR2-1, 0x0d0d); 390 udelay(1); 391 } 392 #endif 393 } 394 395 /**************** 396 * Get a bit from MDI/O 397 */ 398 static int 399 mii_getbit(unsigned int ioaddr) 400 { 401 unsigned d; 402 403 PutByte(XIRCREG2_GPR2, 4|0); /* drive MDCK low */ 404 udelay(1); 405 d = GetByte(XIRCREG2_GPR2); /* read MDIO */ 406 PutByte(XIRCREG2_GPR2, 4|1); /* drive MDCK high again */ 407 udelay(1); 408 return d & 0x20; /* read MDIO */ 409 } 410 411 static void 412 mii_wbits(unsigned int ioaddr, unsigned data, int len) 413 { 414 unsigned m = 1 << (len-1); 415 for (; m; m >>= 1) 416 mii_putbit(ioaddr, data & m); 417 } 418 419 static unsigned 420 mii_rd(unsigned int ioaddr, u_char phyaddr, u_char phyreg) 421 { 422 int i; 423 unsigned data=0, m; 424 425 SelectPage(2); 426 for (i=0; i < 32; i++) /* 32 bit preamble */ 427 mii_putbit(ioaddr, 1); 428 mii_wbits(ioaddr, 0x06, 4); /* Start and opcode for read */ 429 mii_wbits(ioaddr, phyaddr, 5); /* PHY address to be accessed */ 430 mii_wbits(ioaddr, phyreg, 5); /* PHY register to read */ 431 mii_idle(ioaddr); /* turn around */ 432 mii_getbit(ioaddr); 433 434 for (m = 1<<15; m; m >>= 1) 435 if (mii_getbit(ioaddr)) 436 data |= m; 437 mii_idle(ioaddr); 438 return data; 439 } 440 441 static void 442 mii_wr(unsigned int ioaddr, u_char phyaddr, u_char phyreg, unsigned data, 443 int len) 444 { 445 int i; 446 447 SelectPage(2); 448 for (i=0; i < 32; i++) /* 32 bit preamble */ 449 mii_putbit(ioaddr, 1); 450 mii_wbits(ioaddr, 0x05, 4); /* Start and opcode for write */ 451 mii_wbits(ioaddr, phyaddr, 5); /* PHY address to be accessed */ 452 mii_wbits(ioaddr, phyreg, 5); /* PHY Register to write */ 453 mii_putbit(ioaddr, 1); /* turn around */ 454 mii_putbit(ioaddr, 0); 455 mii_wbits(ioaddr, data, len); /* And write the data */ 456 mii_idle(ioaddr); 457 } 458 459 /*============= Main bulk of functions =========================*/ 460 461 static const struct net_device_ops netdev_ops = { 462 .ndo_open = do_open, 463 .ndo_stop = do_stop, 464 .ndo_start_xmit = do_start_xmit, 465 .ndo_tx_timeout = xirc_tx_timeout, 466 .ndo_set_config = do_config, 467 .ndo_do_ioctl = do_ioctl, 468 .ndo_set_rx_mode = set_multicast_list, 469 .ndo_change_mtu = eth_change_mtu, 470 .ndo_set_mac_address = eth_mac_addr, 471 .ndo_validate_addr = eth_validate_addr, 472 }; 473 474 static int 475 xirc2ps_probe(struct pcmcia_device *link) 476 { 477 struct net_device *dev; 478 struct local_info *local; 479 480 dev_dbg(&link->dev, "attach()\n"); 481 482 /* Allocate the device structure */ 483 dev = alloc_etherdev(sizeof(struct local_info)); 484 if (!dev) 485 return -ENOMEM; 486 local = netdev_priv(dev); 487 local->dev = dev; 488 local->p_dev = link; 489 link->priv = dev; 490 491 /* General socket configuration */ 492 link->config_index = 1; 493 494 /* Fill in card specific entries */ 495 dev->netdev_ops = &netdev_ops; 496 dev->ethtool_ops = &netdev_ethtool_ops; 497 dev->watchdog_timeo = TX_TIMEOUT; 498 INIT_WORK(&local->tx_timeout_task, xirc2ps_tx_timeout_task); 499 500 return xirc2ps_config(link); 501 } /* xirc2ps_attach */ 502 503 static void 504 xirc2ps_detach(struct pcmcia_device *link) 505 { 506 struct net_device *dev = link->priv; 507 508 dev_dbg(&link->dev, "detach\n"); 509 510 unregister_netdev(dev); 511 512 xirc2ps_release(link); 513 514 free_netdev(dev); 515 } /* xirc2ps_detach */ 516 517 /**************** 518 * Detect the type of the card. s is the buffer with the data of tuple 0x20 519 * Returns: 0 := not supported 520 * mediaid=11 and prodid=47 521 * Media-Id bits: 522 * Ethernet 0x01 523 * Tokenring 0x02 524 * Arcnet 0x04 525 * Wireless 0x08 526 * Modem 0x10 527 * GSM only 0x20 528 * Prod-Id bits: 529 * Pocket 0x10 530 * External 0x20 531 * Creditcard 0x40 532 * Cardbus 0x80 533 * 534 */ 535 static int 536 set_card_type(struct pcmcia_device *link) 537 { 538 struct net_device *dev = link->priv; 539 struct local_info *local = netdev_priv(dev); 540 u8 *buf; 541 unsigned int cisrev, mediaid, prodid; 542 size_t len; 543 544 len = pcmcia_get_tuple(link, CISTPL_MANFID, &buf); 545 if (len < 5) { 546 dev_err(&link->dev, "invalid CIS -- sorry\n"); 547 return 0; 548 } 549 550 cisrev = buf[2]; 551 mediaid = buf[3]; 552 prodid = buf[4]; 553 554 dev_dbg(&link->dev, "cisrev=%02x mediaid=%02x prodid=%02x\n", 555 cisrev, mediaid, prodid); 556 557 local->mohawk = 0; 558 local->dingo = 0; 559 local->modem = 0; 560 local->card_type = XIR_UNKNOWN; 561 if (!(prodid & 0x40)) { 562 pr_notice("Oops: Not a creditcard\n"); 563 return 0; 564 } 565 if (!(mediaid & 0x01)) { 566 pr_notice("Not an Ethernet card\n"); 567 return 0; 568 } 569 if (mediaid & 0x10) { 570 local->modem = 1; 571 switch(prodid & 15) { 572 case 1: local->card_type = XIR_CEM ; break; 573 case 2: local->card_type = XIR_CEM2 ; break; 574 case 3: local->card_type = XIR_CEM3 ; break; 575 case 4: local->card_type = XIR_CEM33 ; break; 576 case 5: local->card_type = XIR_CEM56M; 577 local->mohawk = 1; 578 break; 579 case 6: 580 case 7: /* 7 is the RealPort 10/56 */ 581 local->card_type = XIR_CEM56 ; 582 local->mohawk = 1; 583 local->dingo = 1; 584 break; 585 } 586 } else { 587 switch(prodid & 15) { 588 case 1: local->card_type = has_ce2_string(link)? XIR_CE2 : XIR_CE ; 589 break; 590 case 2: local->card_type = XIR_CE2; break; 591 case 3: local->card_type = XIR_CE3; 592 local->mohawk = 1; 593 break; 594 } 595 } 596 if (local->card_type == XIR_CE || local->card_type == XIR_CEM) { 597 pr_notice("Sorry, this is an old CE card\n"); 598 return 0; 599 } 600 if (local->card_type == XIR_UNKNOWN) 601 pr_notice("unknown card (mediaid=%02x prodid=%02x)\n", mediaid, prodid); 602 603 return 1; 604 } 605 606 /**************** 607 * There are some CE2 cards out which claim to be a CE card. 608 * This function looks for a "CE2" in the 3rd version field. 609 * Returns: true if this is a CE2 610 */ 611 static int 612 has_ce2_string(struct pcmcia_device * p_dev) 613 { 614 if (p_dev->prod_id[2] && strstr(p_dev->prod_id[2], "CE2")) 615 return 1; 616 return 0; 617 } 618 619 static int 620 xirc2ps_config_modem(struct pcmcia_device *p_dev, void *priv_data) 621 { 622 unsigned int ioaddr; 623 624 if ((p_dev->resource[0]->start & 0xf) == 8) 625 return -ENODEV; 626 627 p_dev->resource[0]->end = 16; 628 p_dev->resource[1]->end = 8; 629 p_dev->resource[0]->flags &= ~IO_DATA_PATH_WIDTH; 630 p_dev->resource[0]->flags |= IO_DATA_PATH_WIDTH_16; 631 p_dev->resource[1]->flags &= ~IO_DATA_PATH_WIDTH; 632 p_dev->resource[1]->flags |= IO_DATA_PATH_WIDTH_8; 633 p_dev->io_lines = 10; 634 635 p_dev->resource[1]->start = p_dev->resource[0]->start; 636 for (ioaddr = 0x300; ioaddr < 0x400; ioaddr += 0x10) { 637 p_dev->resource[0]->start = ioaddr; 638 if (!pcmcia_request_io(p_dev)) 639 return 0; 640 } 641 return -ENODEV; 642 } 643 644 static int 645 xirc2ps_config_check(struct pcmcia_device *p_dev, void *priv_data) 646 { 647 int *pass = priv_data; 648 resource_size_t tmp = p_dev->resource[1]->start; 649 650 tmp += (*pass ? (p_dev->config_index & 0x20 ? -24 : 8) 651 : (p_dev->config_index & 0x20 ? 8 : -24)); 652 653 if ((p_dev->resource[0]->start & 0xf) == 8) 654 return -ENODEV; 655 656 p_dev->resource[0]->end = 18; 657 p_dev->resource[1]->end = 8; 658 p_dev->resource[0]->flags &= ~IO_DATA_PATH_WIDTH; 659 p_dev->resource[0]->flags |= IO_DATA_PATH_WIDTH_16; 660 p_dev->resource[1]->flags &= ~IO_DATA_PATH_WIDTH; 661 p_dev->resource[1]->flags |= IO_DATA_PATH_WIDTH_8; 662 p_dev->io_lines = 10; 663 664 p_dev->resource[1]->start = p_dev->resource[0]->start; 665 p_dev->resource[0]->start = tmp; 666 return pcmcia_request_io(p_dev); 667 } 668 669 670 static int pcmcia_get_mac_ce(struct pcmcia_device *p_dev, 671 tuple_t *tuple, 672 void *priv) 673 { 674 struct net_device *dev = priv; 675 int i; 676 677 if (tuple->TupleDataLen != 13) 678 return -EINVAL; 679 if ((tuple->TupleData[0] != 2) || (tuple->TupleData[1] != 1) || 680 (tuple->TupleData[2] != 6)) 681 return -EINVAL; 682 /* another try (James Lehmer's CE2 version 4.1)*/ 683 for (i = 2; i < 6; i++) 684 dev->dev_addr[i] = tuple->TupleData[i+2]; 685 return 0; 686 }; 687 688 689 static int 690 xirc2ps_config(struct pcmcia_device * link) 691 { 692 struct net_device *dev = link->priv; 693 struct local_info *local = netdev_priv(dev); 694 unsigned int ioaddr; 695 int err; 696 u8 *buf; 697 size_t len; 698 699 local->dingo_ccr = NULL; 700 701 dev_dbg(&link->dev, "config\n"); 702 703 /* Is this a valid card */ 704 if (link->has_manf_id == 0) { 705 pr_notice("manfid not found in CIS\n"); 706 goto failure; 707 } 708 709 switch (link->manf_id) { 710 case MANFID_XIRCOM: 711 local->manf_str = "Xircom"; 712 break; 713 case MANFID_ACCTON: 714 local->manf_str = "Accton"; 715 break; 716 case MANFID_COMPAQ: 717 case MANFID_COMPAQ2: 718 local->manf_str = "Compaq"; 719 break; 720 case MANFID_INTEL: 721 local->manf_str = "Intel"; 722 break; 723 case MANFID_TOSHIBA: 724 local->manf_str = "Toshiba"; 725 break; 726 default: 727 pr_notice("Unknown Card Manufacturer ID: 0x%04x\n", 728 (unsigned)link->manf_id); 729 goto failure; 730 } 731 dev_dbg(&link->dev, "found %s card\n", local->manf_str); 732 733 if (!set_card_type(link)) { 734 pr_notice("this card is not supported\n"); 735 goto failure; 736 } 737 738 /* get the ethernet address from the CIS */ 739 err = pcmcia_get_mac_from_cis(link, dev); 740 741 /* not found: try to get the node-id from tuple 0x89 */ 742 if (err) { 743 len = pcmcia_get_tuple(link, 0x89, &buf); 744 /* data layout looks like tuple 0x22 */ 745 if (buf && len == 8) { 746 if (*buf == CISTPL_FUNCE_LAN_NODE_ID) { 747 int i; 748 for (i = 2; i < 6; i++) 749 dev->dev_addr[i] = buf[i+2]; 750 } else 751 err = -1; 752 } 753 kfree(buf); 754 } 755 756 if (err) 757 err = pcmcia_loop_tuple(link, CISTPL_FUNCE, pcmcia_get_mac_ce, dev); 758 759 if (err) { 760 pr_notice("node-id not found in CIS\n"); 761 goto failure; 762 } 763 764 if (local->modem) { 765 int pass; 766 link->config_flags |= CONF_AUTO_SET_IO; 767 768 if (local->dingo) { 769 /* Take the Modem IO port from the CIS and scan for a free 770 * Ethernet port */ 771 if (!pcmcia_loop_config(link, xirc2ps_config_modem, NULL)) 772 goto port_found; 773 } else { 774 /* We do 2 passes here: The first one uses the regular mapping and 775 * the second tries again, thereby considering that the 32 ports are 776 * mirrored every 32 bytes. Actually we use a mirrored port for 777 * the Mako if (on the first pass) the COR bit 5 is set. 778 */ 779 for (pass=0; pass < 2; pass++) 780 if (!pcmcia_loop_config(link, xirc2ps_config_check, 781 &pass)) 782 goto port_found; 783 /* if special option: 784 * try to configure as Ethernet only. 785 * .... */ 786 } 787 pr_notice("no ports available\n"); 788 } else { 789 link->io_lines = 10; 790 link->resource[0]->end = 16; 791 link->resource[0]->flags |= IO_DATA_PATH_WIDTH_16; 792 for (ioaddr = 0x300; ioaddr < 0x400; ioaddr += 0x10) { 793 link->resource[0]->start = ioaddr; 794 if (!(err = pcmcia_request_io(link))) 795 goto port_found; 796 } 797 link->resource[0]->start = 0; /* let CS decide */ 798 if ((err = pcmcia_request_io(link))) 799 goto config_error; 800 } 801 port_found: 802 if (err) 803 goto config_error; 804 805 /**************** 806 * Now allocate an interrupt line. Note that this does not 807 * actually assign a handler to the interrupt. 808 */ 809 if ((err=pcmcia_request_irq(link, xirc2ps_interrupt))) 810 goto config_error; 811 812 link->config_flags |= CONF_ENABLE_IRQ; 813 if (do_sound) 814 link->config_flags |= CONF_ENABLE_SPKR; 815 816 if ((err = pcmcia_enable_device(link))) 817 goto config_error; 818 819 if (local->dingo) { 820 /* Reset the modem's BAR to the correct value 821 * This is necessary because in the RequestConfiguration call, 822 * the base address of the ethernet port (BasePort1) is written 823 * to the BAR registers of the modem. 824 */ 825 err = pcmcia_write_config_byte(link, CISREG_IOBASE_0, (u8) 826 link->resource[1]->start & 0xff); 827 if (err) 828 goto config_error; 829 830 err = pcmcia_write_config_byte(link, CISREG_IOBASE_1, 831 (link->resource[1]->start >> 8) & 0xff); 832 if (err) 833 goto config_error; 834 835 /* There is no config entry for the Ethernet part which 836 * is at 0x0800. So we allocate a window into the attribute 837 * memory and write direct to the CIS registers 838 */ 839 link->resource[2]->flags = WIN_DATA_WIDTH_8 | WIN_MEMORY_TYPE_AM | 840 WIN_ENABLE; 841 link->resource[2]->start = link->resource[2]->end = 0; 842 if ((err = pcmcia_request_window(link, link->resource[2], 0))) 843 goto config_error; 844 845 local->dingo_ccr = ioremap(link->resource[2]->start, 0x1000) + 0x0800; 846 if ((err = pcmcia_map_mem_page(link, link->resource[2], 0))) 847 goto config_error; 848 849 /* Setup the CCRs; there are no infos in the CIS about the Ethernet 850 * part. 851 */ 852 writeb(0x47, local->dingo_ccr + CISREG_COR); 853 ioaddr = link->resource[0]->start; 854 writeb(ioaddr & 0xff , local->dingo_ccr + CISREG_IOBASE_0); 855 writeb((ioaddr >> 8)&0xff , local->dingo_ccr + CISREG_IOBASE_1); 856 857 #if 0 858 { 859 u_char tmp; 860 pr_info("ECOR:"); 861 for (i=0; i < 7; i++) { 862 tmp = readb(local->dingo_ccr + i*2); 863 pr_cont(" %02x", tmp); 864 } 865 pr_cont("\n"); 866 pr_info("DCOR:"); 867 for (i=0; i < 4; i++) { 868 tmp = readb(local->dingo_ccr + 0x20 + i*2); 869 pr_cont(" %02x", tmp); 870 } 871 pr_cont("\n"); 872 pr_info("SCOR:"); 873 for (i=0; i < 10; i++) { 874 tmp = readb(local->dingo_ccr + 0x40 + i*2); 875 pr_cont(" %02x", tmp); 876 } 877 pr_cont("\n"); 878 } 879 #endif 880 881 writeb(0x01, local->dingo_ccr + 0x20); 882 writeb(0x0c, local->dingo_ccr + 0x22); 883 writeb(0x00, local->dingo_ccr + 0x24); 884 writeb(0x00, local->dingo_ccr + 0x26); 885 writeb(0x00, local->dingo_ccr + 0x28); 886 } 887 888 /* The if_port symbol can be set when the module is loaded */ 889 local->probe_port=0; 890 if (!if_port) { 891 local->probe_port = dev->if_port = 1; 892 } else if ((if_port >= 1 && if_port <= 2) || 893 (local->mohawk && if_port==4)) 894 dev->if_port = if_port; 895 else 896 pr_notice("invalid if_port requested\n"); 897 898 /* we can now register the device with the net subsystem */ 899 dev->irq = link->irq; 900 dev->base_addr = link->resource[0]->start; 901 902 if (local->dingo) 903 do_reset(dev, 1); /* a kludge to make the cem56 work */ 904 905 SET_NETDEV_DEV(dev, &link->dev); 906 907 if ((err=register_netdev(dev))) { 908 pr_notice("register_netdev() failed\n"); 909 goto config_error; 910 } 911 912 /* give some infos about the hardware */ 913 netdev_info(dev, "%s: port %#3lx, irq %d, hwaddr %pM\n", 914 local->manf_str, (u_long)dev->base_addr, (int)dev->irq, 915 dev->dev_addr); 916 917 return 0; 918 919 config_error: 920 xirc2ps_release(link); 921 return -ENODEV; 922 923 failure: 924 return -ENODEV; 925 } /* xirc2ps_config */ 926 927 static void 928 xirc2ps_release(struct pcmcia_device *link) 929 { 930 dev_dbg(&link->dev, "release\n"); 931 932 if (link->resource[2]->end) { 933 struct net_device *dev = link->priv; 934 struct local_info *local = netdev_priv(dev); 935 if (local->dingo) 936 iounmap(local->dingo_ccr - 0x0800); 937 } 938 pcmcia_disable_device(link); 939 } /* xirc2ps_release */ 940 941 /*====================================================================*/ 942 943 944 static int xirc2ps_suspend(struct pcmcia_device *link) 945 { 946 struct net_device *dev = link->priv; 947 948 if (link->open) { 949 netif_device_detach(dev); 950 do_powerdown(dev); 951 } 952 953 return 0; 954 } 955 956 static int xirc2ps_resume(struct pcmcia_device *link) 957 { 958 struct net_device *dev = link->priv; 959 960 if (link->open) { 961 do_reset(dev,1); 962 netif_device_attach(dev); 963 } 964 965 return 0; 966 } 967 968 969 /*====================================================================*/ 970 971 /**************** 972 * This is the Interrupt service route. 973 */ 974 static irqreturn_t 975 xirc2ps_interrupt(int irq, void *dev_id) 976 { 977 struct net_device *dev = (struct net_device *)dev_id; 978 struct local_info *lp = netdev_priv(dev); 979 unsigned int ioaddr; 980 u_char saved_page; 981 unsigned bytes_rcvd; 982 unsigned int_status, eth_status, rx_status, tx_status; 983 unsigned rsr, pktlen; 984 ulong start_ticks = jiffies; /* fixme: jiffies rollover every 497 days 985 * is this something to worry about? 986 * -- on a laptop? 987 */ 988 989 if (!netif_device_present(dev)) 990 return IRQ_HANDLED; 991 992 ioaddr = dev->base_addr; 993 if (lp->mohawk) { /* must disable the interrupt */ 994 PutByte(XIRCREG_CR, 0); 995 } 996 997 pr_debug("%s: interrupt %d at %#x.\n", dev->name, irq, ioaddr); 998 999 saved_page = GetByte(XIRCREG_PR); 1000 /* Read the ISR to see whats the cause for the interrupt. 1001 * This also clears the interrupt flags on CE2 cards 1002 */ 1003 int_status = GetByte(XIRCREG_ISR); 1004 bytes_rcvd = 0; 1005 loop_entry: 1006 if (int_status == 0xff) { /* card may be ejected */ 1007 pr_debug("%s: interrupt %d for dead card\n", dev->name, irq); 1008 goto leave; 1009 } 1010 eth_status = GetByte(XIRCREG_ESR); 1011 1012 SelectPage(0x40); 1013 rx_status = GetByte(XIRCREG40_RXST0); 1014 PutByte(XIRCREG40_RXST0, (~rx_status & 0xff)); 1015 tx_status = GetByte(XIRCREG40_TXST0); 1016 tx_status |= GetByte(XIRCREG40_TXST1) << 8; 1017 PutByte(XIRCREG40_TXST0, 0); 1018 PutByte(XIRCREG40_TXST1, 0); 1019 1020 pr_debug("%s: ISR=%#2.2x ESR=%#2.2x RSR=%#2.2x TSR=%#4.4x\n", 1021 dev->name, int_status, eth_status, rx_status, tx_status); 1022 1023 /***** receive section ******/ 1024 SelectPage(0); 1025 while (eth_status & FullPktRcvd) { 1026 rsr = GetByte(XIRCREG0_RSR); 1027 if (bytes_rcvd > maxrx_bytes && (rsr & PktRxOk)) { 1028 /* too many bytes received during this int, drop the rest of the 1029 * packets */ 1030 dev->stats.rx_dropped++; 1031 pr_debug("%s: RX drop, too much done\n", dev->name); 1032 } else if (rsr & PktRxOk) { 1033 struct sk_buff *skb; 1034 1035 pktlen = GetWord(XIRCREG0_RBC); 1036 bytes_rcvd += pktlen; 1037 1038 pr_debug("rsr=%#02x packet_length=%u\n", rsr, pktlen); 1039 1040 /* 1 extra so we can use insw */ 1041 skb = netdev_alloc_skb(dev, pktlen + 3); 1042 if (!skb) { 1043 dev->stats.rx_dropped++; 1044 } else { /* okay get the packet */ 1045 skb_reserve(skb, 2); 1046 if (lp->silicon == 0 ) { /* work around a hardware bug */ 1047 unsigned rhsa; /* receive start address */ 1048 1049 SelectPage(5); 1050 rhsa = GetWord(XIRCREG5_RHSA0); 1051 SelectPage(0); 1052 rhsa += 3; /* skip control infos */ 1053 if (rhsa >= 0x8000) 1054 rhsa = 0; 1055 if (rhsa + pktlen > 0x8000) { 1056 unsigned i; 1057 u_char *buf = skb_put(skb, pktlen); 1058 for (i=0; i < pktlen ; i++, rhsa++) { 1059 buf[i] = GetByte(XIRCREG_EDP); 1060 if (rhsa == 0x8000) { 1061 rhsa = 0; 1062 i--; 1063 } 1064 } 1065 } else { 1066 insw(ioaddr+XIRCREG_EDP, 1067 skb_put(skb, pktlen), (pktlen+1)>>1); 1068 } 1069 } 1070 #if 0 1071 else if (lp->mohawk) { 1072 /* To use this 32 bit access we should use 1073 * a manual optimized loop 1074 * Also the words are swapped, we can get more 1075 * performance by using 32 bit access and swapping 1076 * the words in a register. Will need this for cardbus 1077 * 1078 * Note: don't forget to change the ALLOC_SKB to .. +3 1079 */ 1080 unsigned i; 1081 u_long *p = skb_put(skb, pktlen); 1082 register u_long a; 1083 unsigned int edpreg = ioaddr+XIRCREG_EDP-2; 1084 for (i=0; i < len ; i += 4, p++) { 1085 a = inl(edpreg); 1086 __asm__("rorl $16,%0\n\t" 1087 :"=q" (a) 1088 : "0" (a)); 1089 *p = a; 1090 } 1091 } 1092 #endif 1093 else { 1094 insw(ioaddr+XIRCREG_EDP, skb_put(skb, pktlen), 1095 (pktlen+1)>>1); 1096 } 1097 skb->protocol = eth_type_trans(skb, dev); 1098 netif_rx(skb); 1099 dev->stats.rx_packets++; 1100 dev->stats.rx_bytes += pktlen; 1101 if (!(rsr & PhyPkt)) 1102 dev->stats.multicast++; 1103 } 1104 } else { /* bad packet */ 1105 pr_debug("rsr=%#02x\n", rsr); 1106 } 1107 if (rsr & PktTooLong) { 1108 dev->stats.rx_frame_errors++; 1109 pr_debug("%s: Packet too long\n", dev->name); 1110 } 1111 if (rsr & CRCErr) { 1112 dev->stats.rx_crc_errors++; 1113 pr_debug("%s: CRC error\n", dev->name); 1114 } 1115 if (rsr & AlignErr) { 1116 dev->stats.rx_fifo_errors++; /* okay ? */ 1117 pr_debug("%s: Alignment error\n", dev->name); 1118 } 1119 1120 /* clear the received/dropped/error packet */ 1121 PutWord(XIRCREG0_DO, 0x8000); /* issue cmd: skip_rx_packet */ 1122 1123 /* get the new ethernet status */ 1124 eth_status = GetByte(XIRCREG_ESR); 1125 } 1126 if (rx_status & 0x10) { /* Receive overrun */ 1127 dev->stats.rx_over_errors++; 1128 PutByte(XIRCREG_CR, ClearRxOvrun); 1129 pr_debug("receive overrun cleared\n"); 1130 } 1131 1132 /***** transmit section ******/ 1133 if (int_status & PktTxed) { 1134 unsigned n, nn; 1135 1136 n = lp->last_ptr_value; 1137 nn = GetByte(XIRCREG0_PTR); 1138 lp->last_ptr_value = nn; 1139 if (nn < n) /* rollover */ 1140 dev->stats.tx_packets += 256 - n; 1141 else if (n == nn) { /* happens sometimes - don't know why */ 1142 pr_debug("PTR not changed?\n"); 1143 } else 1144 dev->stats.tx_packets += lp->last_ptr_value - n; 1145 netif_wake_queue(dev); 1146 } 1147 if (tx_status & 0x0002) { /* Execessive collissions */ 1148 pr_debug("tx restarted due to execssive collissions\n"); 1149 PutByte(XIRCREG_CR, RestartTx); /* restart transmitter process */ 1150 } 1151 if (tx_status & 0x0040) 1152 dev->stats.tx_aborted_errors++; 1153 1154 /* recalculate our work chunk so that we limit the duration of this 1155 * ISR to about 1/10 of a second. 1156 * Calculate only if we received a reasonable amount of bytes. 1157 */ 1158 if (bytes_rcvd > 1000) { 1159 u_long duration = jiffies - start_ticks; 1160 1161 if (duration >= HZ/10) { /* if more than about 1/10 second */ 1162 maxrx_bytes = (bytes_rcvd * (HZ/10)) / duration; 1163 if (maxrx_bytes < 2000) 1164 maxrx_bytes = 2000; 1165 else if (maxrx_bytes > 22000) 1166 maxrx_bytes = 22000; 1167 pr_debug("set maxrx=%u (rcvd=%u ticks=%lu)\n", 1168 maxrx_bytes, bytes_rcvd, duration); 1169 } else if (!duration && maxrx_bytes < 22000) { 1170 /* now much faster */ 1171 maxrx_bytes += 2000; 1172 if (maxrx_bytes > 22000) 1173 maxrx_bytes = 22000; 1174 pr_debug("set maxrx=%u\n", maxrx_bytes); 1175 } 1176 } 1177 1178 leave: 1179 if (lockup_hack) { 1180 if (int_status != 0xff && (int_status = GetByte(XIRCREG_ISR)) != 0) 1181 goto loop_entry; 1182 } 1183 SelectPage(saved_page); 1184 PutByte(XIRCREG_CR, EnableIntr); /* re-enable interrupts */ 1185 /* Instead of dropping packets during a receive, we could 1186 * force an interrupt with this command: 1187 * PutByte(XIRCREG_CR, EnableIntr|ForceIntr); 1188 */ 1189 return IRQ_HANDLED; 1190 } /* xirc2ps_interrupt */ 1191 1192 /*====================================================================*/ 1193 1194 static void 1195 xirc2ps_tx_timeout_task(struct work_struct *work) 1196 { 1197 struct local_info *local = 1198 container_of(work, struct local_info, tx_timeout_task); 1199 struct net_device *dev = local->dev; 1200 /* reset the card */ 1201 do_reset(dev,1); 1202 dev->trans_start = jiffies; /* prevent tx timeout */ 1203 netif_wake_queue(dev); 1204 } 1205 1206 static void 1207 xirc_tx_timeout(struct net_device *dev) 1208 { 1209 struct local_info *lp = netdev_priv(dev); 1210 dev->stats.tx_errors++; 1211 netdev_notice(dev, "transmit timed out\n"); 1212 schedule_work(&lp->tx_timeout_task); 1213 } 1214 1215 static netdev_tx_t 1216 do_start_xmit(struct sk_buff *skb, struct net_device *dev) 1217 { 1218 struct local_info *lp = netdev_priv(dev); 1219 unsigned int ioaddr = dev->base_addr; 1220 int okay; 1221 unsigned freespace; 1222 unsigned pktlen = skb->len; 1223 1224 pr_debug("do_start_xmit(skb=%p, dev=%p) len=%u\n", 1225 skb, dev, pktlen); 1226 1227 1228 /* adjust the packet length to min. required 1229 * and hope that the buffer is large enough 1230 * to provide some random data. 1231 * fixme: For Mohawk we can change this by sending 1232 * a larger packetlen than we actually have; the chip will 1233 * pad this in his buffer with random bytes 1234 */ 1235 if (pktlen < ETH_ZLEN) 1236 { 1237 if (skb_padto(skb, ETH_ZLEN)) 1238 return NETDEV_TX_OK; 1239 pktlen = ETH_ZLEN; 1240 } 1241 1242 netif_stop_queue(dev); 1243 SelectPage(0); 1244 PutWord(XIRCREG0_TRS, (u_short)pktlen+2); 1245 freespace = GetWord(XIRCREG0_TSO); 1246 okay = freespace & 0x8000; 1247 freespace &= 0x7fff; 1248 /* TRS doesn't work - (indeed it is eliminated with sil-rev 1) */ 1249 okay = pktlen +2 < freespace; 1250 pr_debug("%s: avail. tx space=%u%s\n", 1251 dev->name, freespace, okay ? " (okay)":" (not enough)"); 1252 if (!okay) { /* not enough space */ 1253 return NETDEV_TX_BUSY; /* upper layer may decide to requeue this packet */ 1254 } 1255 /* send the packet */ 1256 PutWord(XIRCREG_EDP, (u_short)pktlen); 1257 outsw(ioaddr+XIRCREG_EDP, skb->data, pktlen>>1); 1258 if (pktlen & 1) 1259 PutByte(XIRCREG_EDP, skb->data[pktlen-1]); 1260 1261 if (lp->mohawk) 1262 PutByte(XIRCREG_CR, TransmitPacket|EnableIntr); 1263 1264 dev_kfree_skb (skb); 1265 dev->stats.tx_bytes += pktlen; 1266 netif_start_queue(dev); 1267 return NETDEV_TX_OK; 1268 } 1269 1270 struct set_address_info { 1271 int reg_nr; 1272 int page_nr; 1273 int mohawk; 1274 unsigned int ioaddr; 1275 }; 1276 1277 static void set_address(struct set_address_info *sa_info, char *addr) 1278 { 1279 unsigned int ioaddr = sa_info->ioaddr; 1280 int i; 1281 1282 for (i = 0; i < 6; i++) { 1283 if (sa_info->reg_nr > 15) { 1284 sa_info->reg_nr = 8; 1285 sa_info->page_nr++; 1286 SelectPage(sa_info->page_nr); 1287 } 1288 if (sa_info->mohawk) 1289 PutByte(sa_info->reg_nr++, addr[5 - i]); 1290 else 1291 PutByte(sa_info->reg_nr++, addr[i]); 1292 } 1293 } 1294 1295 /**************** 1296 * Set all addresses: This first one is the individual address, 1297 * the next 9 addresses are taken from the multicast list and 1298 * the rest is filled with the individual address. 1299 */ 1300 static void set_addresses(struct net_device *dev) 1301 { 1302 unsigned int ioaddr = dev->base_addr; 1303 struct local_info *lp = netdev_priv(dev); 1304 struct netdev_hw_addr *ha; 1305 struct set_address_info sa_info; 1306 int i; 1307 1308 /* 1309 * Setup the info structure so that by first set_address call it will do 1310 * SelectPage with the right page number. Hence these ones here. 1311 */ 1312 sa_info.reg_nr = 15 + 1; 1313 sa_info.page_nr = 0x50 - 1; 1314 sa_info.mohawk = lp->mohawk; 1315 sa_info.ioaddr = ioaddr; 1316 1317 set_address(&sa_info, dev->dev_addr); 1318 i = 0; 1319 netdev_for_each_mc_addr(ha, dev) { 1320 if (i++ == 9) 1321 break; 1322 set_address(&sa_info, ha->addr); 1323 } 1324 while (i++ < 9) 1325 set_address(&sa_info, dev->dev_addr); 1326 SelectPage(0); 1327 } 1328 1329 /**************** 1330 * Set or clear the multicast filter for this adaptor. 1331 * We can filter up to 9 addresses, if more are requested we set 1332 * multicast promiscuous mode. 1333 */ 1334 1335 static void 1336 set_multicast_list(struct net_device *dev) 1337 { 1338 unsigned int ioaddr = dev->base_addr; 1339 unsigned value; 1340 1341 SelectPage(0x42); 1342 value = GetByte(XIRCREG42_SWC1) & 0xC0; 1343 1344 if (dev->flags & IFF_PROMISC) { /* snoop */ 1345 PutByte(XIRCREG42_SWC1, value | 0x06); /* set MPE and PME */ 1346 } else if (netdev_mc_count(dev) > 9 || (dev->flags & IFF_ALLMULTI)) { 1347 PutByte(XIRCREG42_SWC1, value | 0x02); /* set MPE */ 1348 } else if (!netdev_mc_empty(dev)) { 1349 /* the chip can filter 9 addresses perfectly */ 1350 PutByte(XIRCREG42_SWC1, value | 0x01); 1351 SelectPage(0x40); 1352 PutByte(XIRCREG40_CMD0, Offline); 1353 set_addresses(dev); 1354 SelectPage(0x40); 1355 PutByte(XIRCREG40_CMD0, EnableRecv | Online); 1356 } else { /* standard usage */ 1357 PutByte(XIRCREG42_SWC1, value | 0x00); 1358 } 1359 SelectPage(0); 1360 } 1361 1362 static int 1363 do_config(struct net_device *dev, struct ifmap *map) 1364 { 1365 struct local_info *local = netdev_priv(dev); 1366 1367 pr_debug("do_config(%p)\n", dev); 1368 if (map->port != 255 && map->port != dev->if_port) { 1369 if (map->port > 4) 1370 return -EINVAL; 1371 if (!map->port) { 1372 local->probe_port = 1; 1373 dev->if_port = 1; 1374 } else { 1375 local->probe_port = 0; 1376 dev->if_port = map->port; 1377 } 1378 netdev_info(dev, "switching to %s port\n", if_names[dev->if_port]); 1379 do_reset(dev,1); /* not the fine way :-) */ 1380 } 1381 return 0; 1382 } 1383 1384 /**************** 1385 * Open the driver 1386 */ 1387 static int 1388 do_open(struct net_device *dev) 1389 { 1390 struct local_info *lp = netdev_priv(dev); 1391 struct pcmcia_device *link = lp->p_dev; 1392 1393 dev_dbg(&link->dev, "do_open(%p)\n", dev); 1394 1395 /* Check that the PCMCIA card is still here. */ 1396 /* Physical device present signature. */ 1397 if (!pcmcia_dev_present(link)) 1398 return -ENODEV; 1399 1400 /* okay */ 1401 link->open++; 1402 1403 netif_start_queue(dev); 1404 do_reset(dev,1); 1405 1406 return 0; 1407 } 1408 1409 static void netdev_get_drvinfo(struct net_device *dev, 1410 struct ethtool_drvinfo *info) 1411 { 1412 strlcpy(info->driver, "xirc2ps_cs", sizeof(info->driver)); 1413 snprintf(info->bus_info, sizeof(info->bus_info), "PCMCIA 0x%lx", 1414 dev->base_addr); 1415 } 1416 1417 static const struct ethtool_ops netdev_ethtool_ops = { 1418 .get_drvinfo = netdev_get_drvinfo, 1419 }; 1420 1421 static int 1422 do_ioctl(struct net_device *dev, struct ifreq *rq, int cmd) 1423 { 1424 struct local_info *local = netdev_priv(dev); 1425 unsigned int ioaddr = dev->base_addr; 1426 struct mii_ioctl_data *data = if_mii(rq); 1427 1428 pr_debug("%s: ioctl(%-.6s, %#04x) %04x %04x %04x %04x\n", 1429 dev->name, rq->ifr_ifrn.ifrn_name, cmd, 1430 data->phy_id, data->reg_num, data->val_in, data->val_out); 1431 1432 if (!local->mohawk) 1433 return -EOPNOTSUPP; 1434 1435 switch(cmd) { 1436 case SIOCGMIIPHY: /* Get the address of the PHY in use. */ 1437 data->phy_id = 0; /* we have only this address */ 1438 /* fall through */ 1439 case SIOCGMIIREG: /* Read the specified MII register. */ 1440 data->val_out = mii_rd(ioaddr, data->phy_id & 0x1f, 1441 data->reg_num & 0x1f); 1442 break; 1443 case SIOCSMIIREG: /* Write the specified MII register */ 1444 mii_wr(ioaddr, data->phy_id & 0x1f, data->reg_num & 0x1f, data->val_in, 1445 16); 1446 break; 1447 default: 1448 return -EOPNOTSUPP; 1449 } 1450 return 0; 1451 } 1452 1453 static void 1454 hardreset(struct net_device *dev) 1455 { 1456 struct local_info *local = netdev_priv(dev); 1457 unsigned int ioaddr = dev->base_addr; 1458 1459 SelectPage(4); 1460 udelay(1); 1461 PutByte(XIRCREG4_GPR1, 0); /* clear bit 0: power down */ 1462 msleep(40); /* wait 40 msec */ 1463 if (local->mohawk) 1464 PutByte(XIRCREG4_GPR1, 1); /* set bit 0: power up */ 1465 else 1466 PutByte(XIRCREG4_GPR1, 1 | 4); /* set bit 0: power up, bit 2: AIC */ 1467 msleep(20); /* wait 20 msec */ 1468 } 1469 1470 static void 1471 do_reset(struct net_device *dev, int full) 1472 { 1473 struct local_info *local = netdev_priv(dev); 1474 unsigned int ioaddr = dev->base_addr; 1475 unsigned value; 1476 1477 pr_debug("%s: do_reset(%p,%d)\n", dev? dev->name:"eth?", dev, full); 1478 1479 hardreset(dev); 1480 PutByte(XIRCREG_CR, SoftReset); /* set */ 1481 msleep(20); /* wait 20 msec */ 1482 PutByte(XIRCREG_CR, 0); /* clear */ 1483 msleep(40); /* wait 40 msec */ 1484 if (local->mohawk) { 1485 SelectPage(4); 1486 /* set pin GP1 and GP2 to output (0x0c) 1487 * set GP1 to low to power up the ML6692 (0x00) 1488 * set GP2 to high to power up the 10Mhz chip (0x02) 1489 */ 1490 PutByte(XIRCREG4_GPR0, 0x0e); 1491 } 1492 1493 /* give the circuits some time to power up */ 1494 msleep(500); /* about 500ms */ 1495 1496 local->last_ptr_value = 0; 1497 local->silicon = local->mohawk ? (GetByte(XIRCREG4_BOV) & 0x70) >> 4 1498 : (GetByte(XIRCREG4_BOV) & 0x30) >> 4; 1499 1500 if (local->probe_port) { 1501 if (!local->mohawk) { 1502 SelectPage(4); 1503 PutByte(XIRCREG4_GPR0, 4); 1504 local->probe_port = 0; 1505 } 1506 } else if (dev->if_port == 2) { /* enable 10Base2 */ 1507 SelectPage(0x42); 1508 PutByte(XIRCREG42_SWC1, 0xC0); 1509 } else { /* enable 10BaseT */ 1510 SelectPage(0x42); 1511 PutByte(XIRCREG42_SWC1, 0x80); 1512 } 1513 msleep(40); /* wait 40 msec to let it complete */ 1514 1515 #if 0 1516 { 1517 SelectPage(0); 1518 value = GetByte(XIRCREG_ESR); /* read the ESR */ 1519 pr_debug("%s: ESR is: %#02x\n", dev->name, value); 1520 } 1521 #endif 1522 1523 /* setup the ECR */ 1524 SelectPage(1); 1525 PutByte(XIRCREG1_IMR0, 0xff); /* allow all ints */ 1526 PutByte(XIRCREG1_IMR1, 1 ); /* and Set TxUnderrunDetect */ 1527 value = GetByte(XIRCREG1_ECR); 1528 #if 0 1529 if (local->mohawk) 1530 value |= DisableLinkPulse; 1531 PutByte(XIRCREG1_ECR, value); 1532 #endif 1533 pr_debug("%s: ECR is: %#02x\n", dev->name, value); 1534 1535 SelectPage(0x42); 1536 PutByte(XIRCREG42_SWC0, 0x20); /* disable source insertion */ 1537 1538 if (local->silicon != 1) { 1539 /* set the local memory dividing line. 1540 * The comments in the sample code say that this is only 1541 * settable with the scipper version 2 which is revision 0. 1542 * Always for CE3 cards 1543 */ 1544 SelectPage(2); 1545 PutWord(XIRCREG2_RBS, 0x2000); 1546 } 1547 1548 if (full) 1549 set_addresses(dev); 1550 1551 /* Hardware workaround: 1552 * The receive byte pointer after reset is off by 1 so we need 1553 * to move the offset pointer back to 0. 1554 */ 1555 SelectPage(0); 1556 PutWord(XIRCREG0_DO, 0x2000); /* change offset command, off=0 */ 1557 1558 /* setup MAC IMRs and clear status registers */ 1559 SelectPage(0x40); /* Bit 7 ... bit 0 */ 1560 PutByte(XIRCREG40_RMASK0, 0xff); /* ROK, RAB, rsv, RO, CRC, AE, PTL, MP */ 1561 PutByte(XIRCREG40_TMASK0, 0xff); /* TOK, TAB, SQE, LL, TU, JAB, EXC, CRS */ 1562 PutByte(XIRCREG40_TMASK1, 0xb0); /* rsv, rsv, PTD, EXT, rsv,rsv,rsv, rsv*/ 1563 PutByte(XIRCREG40_RXST0, 0x00); /* ROK, RAB, REN, RO, CRC, AE, PTL, MP */ 1564 PutByte(XIRCREG40_TXST0, 0x00); /* TOK, TAB, SQE, LL, TU, JAB, EXC, CRS */ 1565 PutByte(XIRCREG40_TXST1, 0x00); /* TEN, rsv, PTD, EXT, retry_counter:4 */ 1566 1567 if (full && local->mohawk && init_mii(dev)) { 1568 if (dev->if_port == 4 || local->dingo || local->new_mii) { 1569 netdev_info(dev, "MII selected\n"); 1570 SelectPage(2); 1571 PutByte(XIRCREG2_MSR, GetByte(XIRCREG2_MSR) | 0x08); 1572 msleep(20); 1573 } else { 1574 netdev_info(dev, "MII detected; using 10mbs\n"); 1575 SelectPage(0x42); 1576 if (dev->if_port == 2) /* enable 10Base2 */ 1577 PutByte(XIRCREG42_SWC1, 0xC0); 1578 else /* enable 10BaseT */ 1579 PutByte(XIRCREG42_SWC1, 0x80); 1580 msleep(40); /* wait 40 msec to let it complete */ 1581 } 1582 if (full_duplex) 1583 PutByte(XIRCREG1_ECR, GetByte(XIRCREG1_ECR | FullDuplex)); 1584 } else { /* No MII */ 1585 SelectPage(0); 1586 value = GetByte(XIRCREG_ESR); /* read the ESR */ 1587 dev->if_port = (value & MediaSelect) ? 1 : 2; 1588 } 1589 1590 /* configure the LEDs */ 1591 SelectPage(2); 1592 if (dev->if_port == 1 || dev->if_port == 4) /* TP: Link and Activity */ 1593 PutByte(XIRCREG2_LED, 0x3b); 1594 else /* Coax: Not-Collision and Activity */ 1595 PutByte(XIRCREG2_LED, 0x3a); 1596 1597 if (local->dingo) 1598 PutByte(0x0b, 0x04); /* 100 Mbit LED */ 1599 1600 /* enable receiver and put the mac online */ 1601 if (full) { 1602 set_multicast_list(dev); 1603 SelectPage(0x40); 1604 PutByte(XIRCREG40_CMD0, EnableRecv | Online); 1605 } 1606 1607 /* setup Ethernet IMR and enable interrupts */ 1608 SelectPage(1); 1609 PutByte(XIRCREG1_IMR0, 0xff); 1610 udelay(1); 1611 SelectPage(0); 1612 PutByte(XIRCREG_CR, EnableIntr); 1613 if (local->modem && !local->dingo) { /* do some magic */ 1614 if (!(GetByte(0x10) & 0x01)) 1615 PutByte(0x10, 0x11); /* unmask master-int bit */ 1616 } 1617 1618 if (full) 1619 netdev_info(dev, "media %s, silicon revision %d\n", 1620 if_names[dev->if_port], local->silicon); 1621 /* We should switch back to page 0 to avoid a bug in revision 0 1622 * where regs with offset below 8 can't be read after an access 1623 * to the MAC registers */ 1624 SelectPage(0); 1625 } 1626 1627 /**************** 1628 * Initialize the Media-Independent-Interface 1629 * Returns: True if we have a good MII 1630 */ 1631 static int 1632 init_mii(struct net_device *dev) 1633 { 1634 struct local_info *local = netdev_priv(dev); 1635 unsigned int ioaddr = dev->base_addr; 1636 unsigned control, status, linkpartner; 1637 int i; 1638 1639 if (if_port == 4 || if_port == 1) { /* force 100BaseT or 10BaseT */ 1640 dev->if_port = if_port; 1641 local->probe_port = 0; 1642 return 1; 1643 } 1644 1645 status = mii_rd(ioaddr, 0, 1); 1646 if ((status & 0xff00) != 0x7800) 1647 return 0; /* No MII */ 1648 1649 local->new_mii = (mii_rd(ioaddr, 0, 2) != 0xffff); 1650 1651 if (local->probe_port) 1652 control = 0x1000; /* auto neg */ 1653 else if (dev->if_port == 4) 1654 control = 0x2000; /* no auto neg, 100mbs mode */ 1655 else 1656 control = 0x0000; /* no auto neg, 10mbs mode */ 1657 mii_wr(ioaddr, 0, 0, control, 16); 1658 udelay(100); 1659 control = mii_rd(ioaddr, 0, 0); 1660 1661 if (control & 0x0400) { 1662 netdev_notice(dev, "can't take PHY out of isolation mode\n"); 1663 local->probe_port = 0; 1664 return 0; 1665 } 1666 1667 if (local->probe_port) { 1668 /* according to the DP83840A specs the auto negotiation process 1669 * may take up to 3.5 sec, so we use this also for our ML6692 1670 * Fixme: Better to use a timer here! 1671 */ 1672 for (i=0; i < 35; i++) { 1673 msleep(100); /* wait 100 msec */ 1674 status = mii_rd(ioaddr, 0, 1); 1675 if ((status & 0x0020) && (status & 0x0004)) 1676 break; 1677 } 1678 1679 if (!(status & 0x0020)) { 1680 netdev_info(dev, "autonegotiation failed; using 10mbs\n"); 1681 if (!local->new_mii) { 1682 control = 0x0000; 1683 mii_wr(ioaddr, 0, 0, control, 16); 1684 udelay(100); 1685 SelectPage(0); 1686 dev->if_port = (GetByte(XIRCREG_ESR) & MediaSelect) ? 1 : 2; 1687 } 1688 } else { 1689 linkpartner = mii_rd(ioaddr, 0, 5); 1690 netdev_info(dev, "MII link partner: %04x\n", linkpartner); 1691 if (linkpartner & 0x0080) { 1692 dev->if_port = 4; 1693 } else 1694 dev->if_port = 1; 1695 } 1696 } 1697 1698 return 1; 1699 } 1700 1701 static void 1702 do_powerdown(struct net_device *dev) 1703 { 1704 1705 unsigned int ioaddr = dev->base_addr; 1706 1707 pr_debug("do_powerdown(%p)\n", dev); 1708 1709 SelectPage(4); 1710 PutByte(XIRCREG4_GPR1, 0); /* clear bit 0: power down */ 1711 SelectPage(0); 1712 } 1713 1714 static int 1715 do_stop(struct net_device *dev) 1716 { 1717 unsigned int ioaddr = dev->base_addr; 1718 struct local_info *lp = netdev_priv(dev); 1719 struct pcmcia_device *link = lp->p_dev; 1720 1721 dev_dbg(&link->dev, "do_stop(%p)\n", dev); 1722 1723 if (!link) 1724 return -ENODEV; 1725 1726 netif_stop_queue(dev); 1727 1728 SelectPage(0); 1729 PutByte(XIRCREG_CR, 0); /* disable interrupts */ 1730 SelectPage(0x01); 1731 PutByte(XIRCREG1_IMR0, 0x00); /* forbid all ints */ 1732 SelectPage(4); 1733 PutByte(XIRCREG4_GPR1, 0); /* clear bit 0: power down */ 1734 SelectPage(0); 1735 1736 link->open--; 1737 return 0; 1738 } 1739 1740 static const struct pcmcia_device_id xirc2ps_ids[] = { 1741 PCMCIA_PFC_DEVICE_MANF_CARD(0, 0x0089, 0x110a), 1742 PCMCIA_PFC_DEVICE_MANF_CARD(0, 0x0138, 0x110a), 1743 PCMCIA_PFC_DEVICE_PROD_ID13(0, "Xircom", "CEM28", 0x2e3ee845, 0x0ea978ea), 1744 PCMCIA_PFC_DEVICE_PROD_ID13(0, "Xircom", "CEM33", 0x2e3ee845, 0x80609023), 1745 PCMCIA_PFC_DEVICE_PROD_ID13(0, "Xircom", "CEM56", 0x2e3ee845, 0xa650c32a), 1746 PCMCIA_PFC_DEVICE_PROD_ID13(0, "Xircom", "REM10", 0x2e3ee845, 0x76df1d29), 1747 PCMCIA_PFC_DEVICE_PROD_ID13(0, "Xircom", "XEM5600", 0x2e3ee845, 0xf1403719), 1748 PCMCIA_PFC_DEVICE_PROD_ID12(0, "Xircom", "CreditCard Ethernet+Modem II", 0x2e3ee845, 0xeca401bf), 1749 PCMCIA_DEVICE_MANF_CARD(0x01bf, 0x010a), 1750 PCMCIA_DEVICE_PROD_ID13("Toshiba Information Systems", "TPCENET", 0x1b3b94fe, 0xf381c1a2), 1751 PCMCIA_DEVICE_PROD_ID13("Xircom", "CE3-10/100", 0x2e3ee845, 0x0ec0ac37), 1752 PCMCIA_DEVICE_PROD_ID13("Xircom", "PS-CE2-10", 0x2e3ee845, 0x947d9073), 1753 PCMCIA_DEVICE_PROD_ID13("Xircom", "R2E-100BTX", 0x2e3ee845, 0x2464a6e3), 1754 PCMCIA_DEVICE_PROD_ID13("Xircom", "RE-10", 0x2e3ee845, 0x3e08d609), 1755 PCMCIA_DEVICE_PROD_ID13("Xircom", "XE2000", 0x2e3ee845, 0xf7188e46), 1756 PCMCIA_DEVICE_PROD_ID12("Compaq", "Ethernet LAN Card", 0x54f7c49c, 0x9fd2f0a2), 1757 PCMCIA_DEVICE_PROD_ID12("Compaq", "Netelligent 10/100 PC Card", 0x54f7c49c, 0xefe96769), 1758 PCMCIA_DEVICE_PROD_ID12("Intel", "EtherExpress(TM) PRO/100 PC Card Mobile Adapter16", 0x816cc815, 0x174397db), 1759 PCMCIA_DEVICE_PROD_ID12("Toshiba", "10/100 Ethernet PC Card", 0x44a09d9c, 0xb44deecf), 1760 /* also matches CFE-10 cards! */ 1761 /* PCMCIA_DEVICE_MANF_CARD(0x0105, 0x010a), */ 1762 PCMCIA_DEVICE_NULL, 1763 }; 1764 MODULE_DEVICE_TABLE(pcmcia, xirc2ps_ids); 1765 1766 1767 static struct pcmcia_driver xirc2ps_cs_driver = { 1768 .owner = THIS_MODULE, 1769 .name = "xirc2ps_cs", 1770 .probe = xirc2ps_probe, 1771 .remove = xirc2ps_detach, 1772 .id_table = xirc2ps_ids, 1773 .suspend = xirc2ps_suspend, 1774 .resume = xirc2ps_resume, 1775 }; 1776 module_pcmcia_driver(xirc2ps_cs_driver); 1777 1778 #ifndef MODULE 1779 static int __init setup_xirc2ps_cs(char *str) 1780 { 1781 /* if_port, full_duplex, do_sound, lockup_hack 1782 */ 1783 int ints[10] = { -1 }; 1784 1785 str = get_options(str, 9, ints); 1786 1787 #define MAYBE_SET(X,Y) if (ints[0] >= Y && ints[Y] != -1) { X = ints[Y]; } 1788 MAYBE_SET(if_port, 3); 1789 MAYBE_SET(full_duplex, 4); 1790 MAYBE_SET(do_sound, 5); 1791 MAYBE_SET(lockup_hack, 6); 1792 #undef MAYBE_SET 1793 1794 return 1; 1795 } 1796 1797 __setup("xirc2ps_cs=", setup_xirc2ps_cs); 1798 #endif 1799