xref: /linux/drivers/net/ethernet/tundra/tsi108_eth.c (revision e5c86679d5e864947a52fb31e45a425dea3e7fa9)
1 /*******************************************************************************
2 
3   Copyright(c) 2006 Tundra Semiconductor Corporation.
4 
5   This program is free software; you can redistribute it and/or modify it
6   under the terms of the GNU General Public License as published by the Free
7   Software Foundation; either version 2 of the License, or (at your option)
8   any later version.
9 
10   This program is distributed in the hope that it will be useful, but WITHOUT
11   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12   FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
13   more details.
14 
15   You should have received a copy of the GNU General Public License along with
16   this program; if not, write to the Free Software Foundation, Inc., 59
17   Temple Place - Suite 330, Boston, MA  02111-1307, USA.
18 
19 *******************************************************************************/
20 
21 /* This driver is based on the driver code originally developed
22  * for the Intel IOC80314 (ForestLake) Gigabit Ethernet by
23  * scott.wood@timesys.com  * Copyright (C) 2003 TimeSys Corporation
24  *
25  * Currently changes from original version are:
26  * - porting to Tsi108-based platform and kernel 2.6 (kong.lai@tundra.com)
27  * - modifications to handle two ports independently and support for
28  *   additional PHY devices (alexandre.bounine@tundra.com)
29  * - Get hardware information from platform device. (tie-fei.zang@freescale.com)
30  *
31  */
32 
33 #include <linux/module.h>
34 #include <linux/types.h>
35 #include <linux/interrupt.h>
36 #include <linux/net.h>
37 #include <linux/netdevice.h>
38 #include <linux/etherdevice.h>
39 #include <linux/ethtool.h>
40 #include <linux/skbuff.h>
41 #include <linux/spinlock.h>
42 #include <linux/delay.h>
43 #include <linux/crc32.h>
44 #include <linux/mii.h>
45 #include <linux/device.h>
46 #include <linux/pci.h>
47 #include <linux/rtnetlink.h>
48 #include <linux/timer.h>
49 #include <linux/platform_device.h>
50 #include <linux/gfp.h>
51 
52 #include <asm/io.h>
53 #include <asm/tsi108.h>
54 
55 #include "tsi108_eth.h"
56 
57 #define MII_READ_DELAY 10000	/* max link wait time in msec */
58 
59 #define TSI108_RXRING_LEN     256
60 
61 /* NOTE: The driver currently does not support receiving packets
62  * larger than the buffer size, so don't decrease this (unless you
63  * want to add such support).
64  */
65 #define TSI108_RXBUF_SIZE     1536
66 
67 #define TSI108_TXRING_LEN     256
68 
69 #define TSI108_TX_INT_FREQ    64
70 
71 /* Check the phy status every half a second. */
72 #define CHECK_PHY_INTERVAL (HZ/2)
73 
74 static int tsi108_init_one(struct platform_device *pdev);
75 static int tsi108_ether_remove(struct platform_device *pdev);
76 
77 struct tsi108_prv_data {
78 	void  __iomem *regs;	/* Base of normal regs */
79 	void  __iomem *phyregs;	/* Base of register bank used for PHY access */
80 
81 	struct net_device *dev;
82 	struct napi_struct napi;
83 
84 	unsigned int phy;		/* Index of PHY for this interface */
85 	unsigned int irq_num;
86 	unsigned int id;
87 	unsigned int phy_type;
88 
89 	struct timer_list timer;/* Timer that triggers the check phy function */
90 	unsigned int rxtail;	/* Next entry in rxring to read */
91 	unsigned int rxhead;	/* Next entry in rxring to give a new buffer */
92 	unsigned int rxfree;	/* Number of free, allocated RX buffers */
93 
94 	unsigned int rxpending;	/* Non-zero if there are still descriptors
95 				 * to be processed from a previous descriptor
96 				 * interrupt condition that has been cleared */
97 
98 	unsigned int txtail;	/* Next TX descriptor to check status on */
99 	unsigned int txhead;	/* Next TX descriptor to use */
100 
101 	/* Number of free TX descriptors.  This could be calculated from
102 	 * rxhead and rxtail if one descriptor were left unused to disambiguate
103 	 * full and empty conditions, but it's simpler to just keep track
104 	 * explicitly. */
105 
106 	unsigned int txfree;
107 
108 	unsigned int phy_ok;		/* The PHY is currently powered on. */
109 
110 	/* PHY status (duplex is 1 for half, 2 for full,
111 	 * so that the default 0 indicates that neither has
112 	 * yet been configured). */
113 
114 	unsigned int link_up;
115 	unsigned int speed;
116 	unsigned int duplex;
117 
118 	tx_desc *txring;
119 	rx_desc *rxring;
120 	struct sk_buff *txskbs[TSI108_TXRING_LEN];
121 	struct sk_buff *rxskbs[TSI108_RXRING_LEN];
122 
123 	dma_addr_t txdma, rxdma;
124 
125 	/* txlock nests in misclock and phy_lock */
126 
127 	spinlock_t txlock, misclock;
128 
129 	/* stats is used to hold the upper bits of each hardware counter,
130 	 * and tmpstats is used to hold the full values for returning
131 	 * to the caller of get_stats().  They must be separate in case
132 	 * an overflow interrupt occurs before the stats are consumed.
133 	 */
134 
135 	struct net_device_stats stats;
136 	struct net_device_stats tmpstats;
137 
138 	/* These stats are kept separate in hardware, thus require individual
139 	 * fields for handling carry.  They are combined in get_stats.
140 	 */
141 
142 	unsigned long rx_fcs;	/* Add to rx_frame_errors */
143 	unsigned long rx_short_fcs;	/* Add to rx_frame_errors */
144 	unsigned long rx_long_fcs;	/* Add to rx_frame_errors */
145 	unsigned long rx_underruns;	/* Add to rx_length_errors */
146 	unsigned long rx_overruns;	/* Add to rx_length_errors */
147 
148 	unsigned long tx_coll_abort;	/* Add to tx_aborted_errors/collisions */
149 	unsigned long tx_pause_drop;	/* Add to tx_aborted_errors */
150 
151 	unsigned long mc_hash[16];
152 	u32 msg_enable;			/* debug message level */
153 	struct mii_if_info mii_if;
154 	unsigned int init_media;
155 };
156 
157 /* Structure for a device driver */
158 
159 static struct platform_driver tsi_eth_driver = {
160 	.probe = tsi108_init_one,
161 	.remove = tsi108_ether_remove,
162 	.driver	= {
163 		.name = "tsi-ethernet",
164 	},
165 };
166 
167 static void tsi108_timed_checker(unsigned long dev_ptr);
168 
169 #ifdef DEBUG
170 static void dump_eth_one(struct net_device *dev)
171 {
172 	struct tsi108_prv_data *data = netdev_priv(dev);
173 
174 	printk("Dumping %s...\n", dev->name);
175 	printk("intstat %x intmask %x phy_ok %d"
176 	       " link %d speed %d duplex %d\n",
177 	       TSI_READ(TSI108_EC_INTSTAT),
178 	       TSI_READ(TSI108_EC_INTMASK), data->phy_ok,
179 	       data->link_up, data->speed, data->duplex);
180 
181 	printk("TX: head %d, tail %d, free %d, stat %x, estat %x, err %x\n",
182 	       data->txhead, data->txtail, data->txfree,
183 	       TSI_READ(TSI108_EC_TXSTAT),
184 	       TSI_READ(TSI108_EC_TXESTAT),
185 	       TSI_READ(TSI108_EC_TXERR));
186 
187 	printk("RX: head %d, tail %d, free %d, stat %x,"
188 	       " estat %x, err %x, pending %d\n\n",
189 	       data->rxhead, data->rxtail, data->rxfree,
190 	       TSI_READ(TSI108_EC_RXSTAT),
191 	       TSI_READ(TSI108_EC_RXESTAT),
192 	       TSI_READ(TSI108_EC_RXERR), data->rxpending);
193 }
194 #endif
195 
196 /* Synchronization is needed between the thread and up/down events.
197  * Note that the PHY is accessed through the same registers for both
198  * interfaces, so this can't be made interface-specific.
199  */
200 
201 static DEFINE_SPINLOCK(phy_lock);
202 
203 static int tsi108_read_mii(struct tsi108_prv_data *data, int reg)
204 {
205 	unsigned i;
206 
207 	TSI_WRITE_PHY(TSI108_MAC_MII_ADDR,
208 				(data->phy << TSI108_MAC_MII_ADDR_PHY) |
209 				(reg << TSI108_MAC_MII_ADDR_REG));
210 	TSI_WRITE_PHY(TSI108_MAC_MII_CMD, 0);
211 	TSI_WRITE_PHY(TSI108_MAC_MII_CMD, TSI108_MAC_MII_CMD_READ);
212 	for (i = 0; i < 100; i++) {
213 		if (!(TSI_READ_PHY(TSI108_MAC_MII_IND) &
214 		      (TSI108_MAC_MII_IND_NOTVALID | TSI108_MAC_MII_IND_BUSY)))
215 			break;
216 		udelay(10);
217 	}
218 
219 	if (i == 100)
220 		return 0xffff;
221 	else
222 		return TSI_READ_PHY(TSI108_MAC_MII_DATAIN);
223 }
224 
225 static void tsi108_write_mii(struct tsi108_prv_data *data,
226 				int reg, u16 val)
227 {
228 	unsigned i = 100;
229 	TSI_WRITE_PHY(TSI108_MAC_MII_ADDR,
230 				(data->phy << TSI108_MAC_MII_ADDR_PHY) |
231 				(reg << TSI108_MAC_MII_ADDR_REG));
232 	TSI_WRITE_PHY(TSI108_MAC_MII_DATAOUT, val);
233 	while (i--) {
234 		if(!(TSI_READ_PHY(TSI108_MAC_MII_IND) &
235 			TSI108_MAC_MII_IND_BUSY))
236 			break;
237 		udelay(10);
238 	}
239 }
240 
241 static int tsi108_mdio_read(struct net_device *dev, int addr, int reg)
242 {
243 	struct tsi108_prv_data *data = netdev_priv(dev);
244 	return tsi108_read_mii(data, reg);
245 }
246 
247 static void tsi108_mdio_write(struct net_device *dev, int addr, int reg, int val)
248 {
249 	struct tsi108_prv_data *data = netdev_priv(dev);
250 	tsi108_write_mii(data, reg, val);
251 }
252 
253 static inline void tsi108_write_tbi(struct tsi108_prv_data *data,
254 					int reg, u16 val)
255 {
256 	unsigned i = 1000;
257 	TSI_WRITE(TSI108_MAC_MII_ADDR,
258 			     (0x1e << TSI108_MAC_MII_ADDR_PHY)
259 			     | (reg << TSI108_MAC_MII_ADDR_REG));
260 	TSI_WRITE(TSI108_MAC_MII_DATAOUT, val);
261 	while(i--) {
262 		if(!(TSI_READ(TSI108_MAC_MII_IND) & TSI108_MAC_MII_IND_BUSY))
263 			return;
264 		udelay(10);
265 	}
266 	printk(KERN_ERR "%s function time out\n", __func__);
267 }
268 
269 static int mii_speed(struct mii_if_info *mii)
270 {
271 	int advert, lpa, val, media;
272 	int lpa2 = 0;
273 	int speed;
274 
275 	if (!mii_link_ok(mii))
276 		return 0;
277 
278 	val = (*mii->mdio_read) (mii->dev, mii->phy_id, MII_BMSR);
279 	if ((val & BMSR_ANEGCOMPLETE) == 0)
280 		return 0;
281 
282 	advert = (*mii->mdio_read) (mii->dev, mii->phy_id, MII_ADVERTISE);
283 	lpa = (*mii->mdio_read) (mii->dev, mii->phy_id, MII_LPA);
284 	media = mii_nway_result(advert & lpa);
285 
286 	if (mii->supports_gmii)
287 		lpa2 = mii->mdio_read(mii->dev, mii->phy_id, MII_STAT1000);
288 
289 	speed = lpa2 & (LPA_1000FULL | LPA_1000HALF) ? 1000 :
290 			(media & (ADVERTISE_100FULL | ADVERTISE_100HALF) ? 100 : 10);
291 	return speed;
292 }
293 
294 static void tsi108_check_phy(struct net_device *dev)
295 {
296 	struct tsi108_prv_data *data = netdev_priv(dev);
297 	u32 mac_cfg2_reg, portctrl_reg;
298 	u32 duplex;
299 	u32 speed;
300 	unsigned long flags;
301 
302 	spin_lock_irqsave(&phy_lock, flags);
303 
304 	if (!data->phy_ok)
305 		goto out;
306 
307 	duplex = mii_check_media(&data->mii_if, netif_msg_link(data), data->init_media);
308 	data->init_media = 0;
309 
310 	if (netif_carrier_ok(dev)) {
311 
312 		speed = mii_speed(&data->mii_if);
313 
314 		if ((speed != data->speed) || duplex) {
315 
316 			mac_cfg2_reg = TSI_READ(TSI108_MAC_CFG2);
317 			portctrl_reg = TSI_READ(TSI108_EC_PORTCTRL);
318 
319 			mac_cfg2_reg &= ~TSI108_MAC_CFG2_IFACE_MASK;
320 
321 			if (speed == 1000) {
322 				mac_cfg2_reg |= TSI108_MAC_CFG2_GIG;
323 				portctrl_reg &= ~TSI108_EC_PORTCTRL_NOGIG;
324 			} else {
325 				mac_cfg2_reg |= TSI108_MAC_CFG2_NOGIG;
326 				portctrl_reg |= TSI108_EC_PORTCTRL_NOGIG;
327 			}
328 
329 			data->speed = speed;
330 
331 			if (data->mii_if.full_duplex) {
332 				mac_cfg2_reg |= TSI108_MAC_CFG2_FULLDUPLEX;
333 				portctrl_reg &= ~TSI108_EC_PORTCTRL_HALFDUPLEX;
334 				data->duplex = 2;
335 			} else {
336 				mac_cfg2_reg &= ~TSI108_MAC_CFG2_FULLDUPLEX;
337 				portctrl_reg |= TSI108_EC_PORTCTRL_HALFDUPLEX;
338 				data->duplex = 1;
339 			}
340 
341 			TSI_WRITE(TSI108_MAC_CFG2, mac_cfg2_reg);
342 			TSI_WRITE(TSI108_EC_PORTCTRL, portctrl_reg);
343 		}
344 
345 		if (data->link_up == 0) {
346 			/* The manual says it can take 3-4 usecs for the speed change
347 			 * to take effect.
348 			 */
349 			udelay(5);
350 
351 			spin_lock(&data->txlock);
352 			if (is_valid_ether_addr(dev->dev_addr) && data->txfree)
353 				netif_wake_queue(dev);
354 
355 			data->link_up = 1;
356 			spin_unlock(&data->txlock);
357 		}
358 	} else {
359 		if (data->link_up == 1) {
360 			netif_stop_queue(dev);
361 			data->link_up = 0;
362 			printk(KERN_NOTICE "%s : link is down\n", dev->name);
363 		}
364 
365 		goto out;
366 	}
367 
368 
369 out:
370 	spin_unlock_irqrestore(&phy_lock, flags);
371 }
372 
373 static inline void
374 tsi108_stat_carry_one(int carry, int carry_bit, int carry_shift,
375 		      unsigned long *upper)
376 {
377 	if (carry & carry_bit)
378 		*upper += carry_shift;
379 }
380 
381 static void tsi108_stat_carry(struct net_device *dev)
382 {
383 	struct tsi108_prv_data *data = netdev_priv(dev);
384 	u32 carry1, carry2;
385 
386 	spin_lock_irq(&data->misclock);
387 
388 	carry1 = TSI_READ(TSI108_STAT_CARRY1);
389 	carry2 = TSI_READ(TSI108_STAT_CARRY2);
390 
391 	TSI_WRITE(TSI108_STAT_CARRY1, carry1);
392 	TSI_WRITE(TSI108_STAT_CARRY2, carry2);
393 
394 	tsi108_stat_carry_one(carry1, TSI108_STAT_CARRY1_RXBYTES,
395 			      TSI108_STAT_RXBYTES_CARRY, &data->stats.rx_bytes);
396 
397 	tsi108_stat_carry_one(carry1, TSI108_STAT_CARRY1_RXPKTS,
398 			      TSI108_STAT_RXPKTS_CARRY,
399 			      &data->stats.rx_packets);
400 
401 	tsi108_stat_carry_one(carry1, TSI108_STAT_CARRY1_RXFCS,
402 			      TSI108_STAT_RXFCS_CARRY, &data->rx_fcs);
403 
404 	tsi108_stat_carry_one(carry1, TSI108_STAT_CARRY1_RXMCAST,
405 			      TSI108_STAT_RXMCAST_CARRY,
406 			      &data->stats.multicast);
407 
408 	tsi108_stat_carry_one(carry1, TSI108_STAT_CARRY1_RXALIGN,
409 			      TSI108_STAT_RXALIGN_CARRY,
410 			      &data->stats.rx_frame_errors);
411 
412 	tsi108_stat_carry_one(carry1, TSI108_STAT_CARRY1_RXLENGTH,
413 			      TSI108_STAT_RXLENGTH_CARRY,
414 			      &data->stats.rx_length_errors);
415 
416 	tsi108_stat_carry_one(carry1, TSI108_STAT_CARRY1_RXRUNT,
417 			      TSI108_STAT_RXRUNT_CARRY, &data->rx_underruns);
418 
419 	tsi108_stat_carry_one(carry1, TSI108_STAT_CARRY1_RXJUMBO,
420 			      TSI108_STAT_RXJUMBO_CARRY, &data->rx_overruns);
421 
422 	tsi108_stat_carry_one(carry1, TSI108_STAT_CARRY1_RXFRAG,
423 			      TSI108_STAT_RXFRAG_CARRY, &data->rx_short_fcs);
424 
425 	tsi108_stat_carry_one(carry1, TSI108_STAT_CARRY1_RXJABBER,
426 			      TSI108_STAT_RXJABBER_CARRY, &data->rx_long_fcs);
427 
428 	tsi108_stat_carry_one(carry1, TSI108_STAT_CARRY1_RXDROP,
429 			      TSI108_STAT_RXDROP_CARRY,
430 			      &data->stats.rx_missed_errors);
431 
432 	tsi108_stat_carry_one(carry2, TSI108_STAT_CARRY2_TXBYTES,
433 			      TSI108_STAT_TXBYTES_CARRY, &data->stats.tx_bytes);
434 
435 	tsi108_stat_carry_one(carry2, TSI108_STAT_CARRY2_TXPKTS,
436 			      TSI108_STAT_TXPKTS_CARRY,
437 			      &data->stats.tx_packets);
438 
439 	tsi108_stat_carry_one(carry2, TSI108_STAT_CARRY2_TXEXDEF,
440 			      TSI108_STAT_TXEXDEF_CARRY,
441 			      &data->stats.tx_aborted_errors);
442 
443 	tsi108_stat_carry_one(carry2, TSI108_STAT_CARRY2_TXEXCOL,
444 			      TSI108_STAT_TXEXCOL_CARRY, &data->tx_coll_abort);
445 
446 	tsi108_stat_carry_one(carry2, TSI108_STAT_CARRY2_TXTCOL,
447 			      TSI108_STAT_TXTCOL_CARRY,
448 			      &data->stats.collisions);
449 
450 	tsi108_stat_carry_one(carry2, TSI108_STAT_CARRY2_TXPAUSE,
451 			      TSI108_STAT_TXPAUSEDROP_CARRY,
452 			      &data->tx_pause_drop);
453 
454 	spin_unlock_irq(&data->misclock);
455 }
456 
457 /* Read a stat counter atomically with respect to carries.
458  * data->misclock must be held.
459  */
460 static inline unsigned long
461 tsi108_read_stat(struct tsi108_prv_data * data, int reg, int carry_bit,
462 		 int carry_shift, unsigned long *upper)
463 {
464 	int carryreg;
465 	unsigned long val;
466 
467 	if (reg < 0xb0)
468 		carryreg = TSI108_STAT_CARRY1;
469 	else
470 		carryreg = TSI108_STAT_CARRY2;
471 
472       again:
473 	val = TSI_READ(reg) | *upper;
474 
475 	/* Check to see if it overflowed, but the interrupt hasn't
476 	 * been serviced yet.  If so, handle the carry here, and
477 	 * try again.
478 	 */
479 
480 	if (unlikely(TSI_READ(carryreg) & carry_bit)) {
481 		*upper += carry_shift;
482 		TSI_WRITE(carryreg, carry_bit);
483 		goto again;
484 	}
485 
486 	return val;
487 }
488 
489 static struct net_device_stats *tsi108_get_stats(struct net_device *dev)
490 {
491 	unsigned long excol;
492 
493 	struct tsi108_prv_data *data = netdev_priv(dev);
494 	spin_lock_irq(&data->misclock);
495 
496 	data->tmpstats.rx_packets =
497 	    tsi108_read_stat(data, TSI108_STAT_RXPKTS,
498 			     TSI108_STAT_CARRY1_RXPKTS,
499 			     TSI108_STAT_RXPKTS_CARRY, &data->stats.rx_packets);
500 
501 	data->tmpstats.tx_packets =
502 	    tsi108_read_stat(data, TSI108_STAT_TXPKTS,
503 			     TSI108_STAT_CARRY2_TXPKTS,
504 			     TSI108_STAT_TXPKTS_CARRY, &data->stats.tx_packets);
505 
506 	data->tmpstats.rx_bytes =
507 	    tsi108_read_stat(data, TSI108_STAT_RXBYTES,
508 			     TSI108_STAT_CARRY1_RXBYTES,
509 			     TSI108_STAT_RXBYTES_CARRY, &data->stats.rx_bytes);
510 
511 	data->tmpstats.tx_bytes =
512 	    tsi108_read_stat(data, TSI108_STAT_TXBYTES,
513 			     TSI108_STAT_CARRY2_TXBYTES,
514 			     TSI108_STAT_TXBYTES_CARRY, &data->stats.tx_bytes);
515 
516 	data->tmpstats.multicast =
517 	    tsi108_read_stat(data, TSI108_STAT_RXMCAST,
518 			     TSI108_STAT_CARRY1_RXMCAST,
519 			     TSI108_STAT_RXMCAST_CARRY, &data->stats.multicast);
520 
521 	excol = tsi108_read_stat(data, TSI108_STAT_TXEXCOL,
522 				 TSI108_STAT_CARRY2_TXEXCOL,
523 				 TSI108_STAT_TXEXCOL_CARRY,
524 				 &data->tx_coll_abort);
525 
526 	data->tmpstats.collisions =
527 	    tsi108_read_stat(data, TSI108_STAT_TXTCOL,
528 			     TSI108_STAT_CARRY2_TXTCOL,
529 			     TSI108_STAT_TXTCOL_CARRY, &data->stats.collisions);
530 
531 	data->tmpstats.collisions += excol;
532 
533 	data->tmpstats.rx_length_errors =
534 	    tsi108_read_stat(data, TSI108_STAT_RXLENGTH,
535 			     TSI108_STAT_CARRY1_RXLENGTH,
536 			     TSI108_STAT_RXLENGTH_CARRY,
537 			     &data->stats.rx_length_errors);
538 
539 	data->tmpstats.rx_length_errors +=
540 	    tsi108_read_stat(data, TSI108_STAT_RXRUNT,
541 			     TSI108_STAT_CARRY1_RXRUNT,
542 			     TSI108_STAT_RXRUNT_CARRY, &data->rx_underruns);
543 
544 	data->tmpstats.rx_length_errors +=
545 	    tsi108_read_stat(data, TSI108_STAT_RXJUMBO,
546 			     TSI108_STAT_CARRY1_RXJUMBO,
547 			     TSI108_STAT_RXJUMBO_CARRY, &data->rx_overruns);
548 
549 	data->tmpstats.rx_frame_errors =
550 	    tsi108_read_stat(data, TSI108_STAT_RXALIGN,
551 			     TSI108_STAT_CARRY1_RXALIGN,
552 			     TSI108_STAT_RXALIGN_CARRY,
553 			     &data->stats.rx_frame_errors);
554 
555 	data->tmpstats.rx_frame_errors +=
556 	    tsi108_read_stat(data, TSI108_STAT_RXFCS,
557 			     TSI108_STAT_CARRY1_RXFCS, TSI108_STAT_RXFCS_CARRY,
558 			     &data->rx_fcs);
559 
560 	data->tmpstats.rx_frame_errors +=
561 	    tsi108_read_stat(data, TSI108_STAT_RXFRAG,
562 			     TSI108_STAT_CARRY1_RXFRAG,
563 			     TSI108_STAT_RXFRAG_CARRY, &data->rx_short_fcs);
564 
565 	data->tmpstats.rx_missed_errors =
566 	    tsi108_read_stat(data, TSI108_STAT_RXDROP,
567 			     TSI108_STAT_CARRY1_RXDROP,
568 			     TSI108_STAT_RXDROP_CARRY,
569 			     &data->stats.rx_missed_errors);
570 
571 	/* These three are maintained by software. */
572 	data->tmpstats.rx_fifo_errors = data->stats.rx_fifo_errors;
573 	data->tmpstats.rx_crc_errors = data->stats.rx_crc_errors;
574 
575 	data->tmpstats.tx_aborted_errors =
576 	    tsi108_read_stat(data, TSI108_STAT_TXEXDEF,
577 			     TSI108_STAT_CARRY2_TXEXDEF,
578 			     TSI108_STAT_TXEXDEF_CARRY,
579 			     &data->stats.tx_aborted_errors);
580 
581 	data->tmpstats.tx_aborted_errors +=
582 	    tsi108_read_stat(data, TSI108_STAT_TXPAUSEDROP,
583 			     TSI108_STAT_CARRY2_TXPAUSE,
584 			     TSI108_STAT_TXPAUSEDROP_CARRY,
585 			     &data->tx_pause_drop);
586 
587 	data->tmpstats.tx_aborted_errors += excol;
588 
589 	data->tmpstats.tx_errors = data->tmpstats.tx_aborted_errors;
590 	data->tmpstats.rx_errors = data->tmpstats.rx_length_errors +
591 	    data->tmpstats.rx_crc_errors +
592 	    data->tmpstats.rx_frame_errors +
593 	    data->tmpstats.rx_fifo_errors + data->tmpstats.rx_missed_errors;
594 
595 	spin_unlock_irq(&data->misclock);
596 	return &data->tmpstats;
597 }
598 
599 static void tsi108_restart_rx(struct tsi108_prv_data * data, struct net_device *dev)
600 {
601 	TSI_WRITE(TSI108_EC_RXQ_PTRHIGH,
602 			     TSI108_EC_RXQ_PTRHIGH_VALID);
603 
604 	TSI_WRITE(TSI108_EC_RXCTRL, TSI108_EC_RXCTRL_GO
605 			     | TSI108_EC_RXCTRL_QUEUE0);
606 }
607 
608 static void tsi108_restart_tx(struct tsi108_prv_data * data)
609 {
610 	TSI_WRITE(TSI108_EC_TXQ_PTRHIGH,
611 			     TSI108_EC_TXQ_PTRHIGH_VALID);
612 
613 	TSI_WRITE(TSI108_EC_TXCTRL, TSI108_EC_TXCTRL_IDLEINT |
614 			     TSI108_EC_TXCTRL_GO | TSI108_EC_TXCTRL_QUEUE0);
615 }
616 
617 /* txlock must be held by caller, with IRQs disabled, and
618  * with permission to re-enable them when the lock is dropped.
619  */
620 static void tsi108_complete_tx(struct net_device *dev)
621 {
622 	struct tsi108_prv_data *data = netdev_priv(dev);
623 	int tx;
624 	struct sk_buff *skb;
625 	int release = 0;
626 
627 	while (!data->txfree || data->txhead != data->txtail) {
628 		tx = data->txtail;
629 
630 		if (data->txring[tx].misc & TSI108_TX_OWN)
631 			break;
632 
633 		skb = data->txskbs[tx];
634 
635 		if (!(data->txring[tx].misc & TSI108_TX_OK))
636 			printk("%s: bad tx packet, misc %x\n",
637 			       dev->name, data->txring[tx].misc);
638 
639 		data->txtail = (data->txtail + 1) % TSI108_TXRING_LEN;
640 		data->txfree++;
641 
642 		if (data->txring[tx].misc & TSI108_TX_EOF) {
643 			dev_kfree_skb_any(skb);
644 			release++;
645 		}
646 	}
647 
648 	if (release) {
649 		if (is_valid_ether_addr(dev->dev_addr) && data->link_up)
650 			netif_wake_queue(dev);
651 	}
652 }
653 
654 static int tsi108_send_packet(struct sk_buff * skb, struct net_device *dev)
655 {
656 	struct tsi108_prv_data *data = netdev_priv(dev);
657 	int frags = skb_shinfo(skb)->nr_frags + 1;
658 	int i;
659 
660 	if (!data->phy_ok && net_ratelimit())
661 		printk(KERN_ERR "%s: Transmit while PHY is down!\n", dev->name);
662 
663 	if (!data->link_up) {
664 		printk(KERN_ERR "%s: Transmit while link is down!\n",
665 		       dev->name);
666 		netif_stop_queue(dev);
667 		return NETDEV_TX_BUSY;
668 	}
669 
670 	if (data->txfree < MAX_SKB_FRAGS + 1) {
671 		netif_stop_queue(dev);
672 
673 		if (net_ratelimit())
674 			printk(KERN_ERR "%s: Transmit with full tx ring!\n",
675 			       dev->name);
676 		return NETDEV_TX_BUSY;
677 	}
678 
679 	if (data->txfree - frags < MAX_SKB_FRAGS + 1) {
680 		netif_stop_queue(dev);
681 	}
682 
683 	spin_lock_irq(&data->txlock);
684 
685 	for (i = 0; i < frags; i++) {
686 		int misc = 0;
687 		int tx = data->txhead;
688 
689 		/* This is done to mark every TSI108_TX_INT_FREQ tx buffers with
690 		 * the interrupt bit.  TX descriptor-complete interrupts are
691 		 * enabled when the queue fills up, and masked when there is
692 		 * still free space.  This way, when saturating the outbound
693 		 * link, the tx interrupts are kept to a reasonable level.
694 		 * When the queue is not full, reclamation of skbs still occurs
695 		 * as new packets are transmitted, or on a queue-empty
696 		 * interrupt.
697 		 */
698 
699 		if ((tx % TSI108_TX_INT_FREQ == 0) &&
700 		    ((TSI108_TXRING_LEN - data->txfree) >= TSI108_TX_INT_FREQ))
701 			misc = TSI108_TX_INT;
702 
703 		data->txskbs[tx] = skb;
704 
705 		if (i == 0) {
706 			data->txring[tx].buf0 = dma_map_single(NULL, skb->data,
707 					skb_headlen(skb), DMA_TO_DEVICE);
708 			data->txring[tx].len = skb_headlen(skb);
709 			misc |= TSI108_TX_SOF;
710 		} else {
711 			const skb_frag_t *frag = &skb_shinfo(skb)->frags[i - 1];
712 
713 			data->txring[tx].buf0 = skb_frag_dma_map(NULL, frag,
714 								 0,
715 								 skb_frag_size(frag),
716 								 DMA_TO_DEVICE);
717 			data->txring[tx].len = skb_frag_size(frag);
718 		}
719 
720 		if (i == frags - 1)
721 			misc |= TSI108_TX_EOF;
722 
723 		if (netif_msg_pktdata(data)) {
724 			int i;
725 			printk("%s: Tx Frame contents (%d)\n", dev->name,
726 			       skb->len);
727 			for (i = 0; i < skb->len; i++)
728 				printk(" %2.2x", skb->data[i]);
729 			printk(".\n");
730 		}
731 		data->txring[tx].misc = misc | TSI108_TX_OWN;
732 
733 		data->txhead = (data->txhead + 1) % TSI108_TXRING_LEN;
734 		data->txfree--;
735 	}
736 
737 	tsi108_complete_tx(dev);
738 
739 	/* This must be done after the check for completed tx descriptors,
740 	 * so that the tail pointer is correct.
741 	 */
742 
743 	if (!(TSI_READ(TSI108_EC_TXSTAT) & TSI108_EC_TXSTAT_QUEUE0))
744 		tsi108_restart_tx(data);
745 
746 	spin_unlock_irq(&data->txlock);
747 	return NETDEV_TX_OK;
748 }
749 
750 static int tsi108_complete_rx(struct net_device *dev, int budget)
751 {
752 	struct tsi108_prv_data *data = netdev_priv(dev);
753 	int done = 0;
754 
755 	while (data->rxfree && done != budget) {
756 		int rx = data->rxtail;
757 		struct sk_buff *skb;
758 
759 		if (data->rxring[rx].misc & TSI108_RX_OWN)
760 			break;
761 
762 		skb = data->rxskbs[rx];
763 		data->rxtail = (data->rxtail + 1) % TSI108_RXRING_LEN;
764 		data->rxfree--;
765 		done++;
766 
767 		if (data->rxring[rx].misc & TSI108_RX_BAD) {
768 			spin_lock_irq(&data->misclock);
769 
770 			if (data->rxring[rx].misc & TSI108_RX_CRC)
771 				data->stats.rx_crc_errors++;
772 			if (data->rxring[rx].misc & TSI108_RX_OVER)
773 				data->stats.rx_fifo_errors++;
774 
775 			spin_unlock_irq(&data->misclock);
776 
777 			dev_kfree_skb_any(skb);
778 			continue;
779 		}
780 		if (netif_msg_pktdata(data)) {
781 			int i;
782 			printk("%s: Rx Frame contents (%d)\n",
783 			       dev->name, data->rxring[rx].len);
784 			for (i = 0; i < data->rxring[rx].len; i++)
785 				printk(" %2.2x", skb->data[i]);
786 			printk(".\n");
787 		}
788 
789 		skb_put(skb, data->rxring[rx].len);
790 		skb->protocol = eth_type_trans(skb, dev);
791 		netif_receive_skb(skb);
792 	}
793 
794 	return done;
795 }
796 
797 static int tsi108_refill_rx(struct net_device *dev, int budget)
798 {
799 	struct tsi108_prv_data *data = netdev_priv(dev);
800 	int done = 0;
801 
802 	while (data->rxfree != TSI108_RXRING_LEN && done != budget) {
803 		int rx = data->rxhead;
804 		struct sk_buff *skb;
805 
806 		skb = netdev_alloc_skb_ip_align(dev, TSI108_RXBUF_SIZE);
807 		data->rxskbs[rx] = skb;
808 		if (!skb)
809 			break;
810 
811 		data->rxring[rx].buf0 = dma_map_single(NULL, skb->data,
812 							TSI108_RX_SKB_SIZE,
813 							DMA_FROM_DEVICE);
814 
815 		/* Sometimes the hardware sets blen to zero after packet
816 		 * reception, even though the manual says that it's only ever
817 		 * modified by the driver.
818 		 */
819 
820 		data->rxring[rx].blen = TSI108_RX_SKB_SIZE;
821 		data->rxring[rx].misc = TSI108_RX_OWN | TSI108_RX_INT;
822 
823 		data->rxhead = (data->rxhead + 1) % TSI108_RXRING_LEN;
824 		data->rxfree++;
825 		done++;
826 	}
827 
828 	if (done != 0 && !(TSI_READ(TSI108_EC_RXSTAT) &
829 			   TSI108_EC_RXSTAT_QUEUE0))
830 		tsi108_restart_rx(data, dev);
831 
832 	return done;
833 }
834 
835 static int tsi108_poll(struct napi_struct *napi, int budget)
836 {
837 	struct tsi108_prv_data *data = container_of(napi, struct tsi108_prv_data, napi);
838 	struct net_device *dev = data->dev;
839 	u32 estat = TSI_READ(TSI108_EC_RXESTAT);
840 	u32 intstat = TSI_READ(TSI108_EC_INTSTAT);
841 	int num_received = 0, num_filled = 0;
842 
843 	intstat &= TSI108_INT_RXQUEUE0 | TSI108_INT_RXTHRESH |
844 	    TSI108_INT_RXOVERRUN | TSI108_INT_RXERROR | TSI108_INT_RXWAIT;
845 
846 	TSI_WRITE(TSI108_EC_RXESTAT, estat);
847 	TSI_WRITE(TSI108_EC_INTSTAT, intstat);
848 
849 	if (data->rxpending || (estat & TSI108_EC_RXESTAT_Q0_DESCINT))
850 		num_received = tsi108_complete_rx(dev, budget);
851 
852 	/* This should normally fill no more slots than the number of
853 	 * packets received in tsi108_complete_rx().  The exception
854 	 * is when we previously ran out of memory for RX SKBs.  In that
855 	 * case, it's helpful to obey the budget, not only so that the
856 	 * CPU isn't hogged, but so that memory (which may still be low)
857 	 * is not hogged by one device.
858 	 *
859 	 * A work unit is considered to be two SKBs to allow us to catch
860 	 * up when the ring has shrunk due to out-of-memory but we're
861 	 * still removing the full budget's worth of packets each time.
862 	 */
863 
864 	if (data->rxfree < TSI108_RXRING_LEN)
865 		num_filled = tsi108_refill_rx(dev, budget * 2);
866 
867 	if (intstat & TSI108_INT_RXERROR) {
868 		u32 err = TSI_READ(TSI108_EC_RXERR);
869 		TSI_WRITE(TSI108_EC_RXERR, err);
870 
871 		if (err) {
872 			if (net_ratelimit())
873 				printk(KERN_DEBUG "%s: RX error %x\n",
874 				       dev->name, err);
875 
876 			if (!(TSI_READ(TSI108_EC_RXSTAT) &
877 			      TSI108_EC_RXSTAT_QUEUE0))
878 				tsi108_restart_rx(data, dev);
879 		}
880 	}
881 
882 	if (intstat & TSI108_INT_RXOVERRUN) {
883 		spin_lock_irq(&data->misclock);
884 		data->stats.rx_fifo_errors++;
885 		spin_unlock_irq(&data->misclock);
886 	}
887 
888 	if (num_received < budget) {
889 		data->rxpending = 0;
890 		napi_complete_done(napi, num_received);
891 
892 		TSI_WRITE(TSI108_EC_INTMASK,
893 				     TSI_READ(TSI108_EC_INTMASK)
894 				     & ~(TSI108_INT_RXQUEUE0
895 					 | TSI108_INT_RXTHRESH |
896 					 TSI108_INT_RXOVERRUN |
897 					 TSI108_INT_RXERROR |
898 					 TSI108_INT_RXWAIT));
899 	} else {
900 		data->rxpending = 1;
901 	}
902 
903 	return num_received;
904 }
905 
906 static void tsi108_rx_int(struct net_device *dev)
907 {
908 	struct tsi108_prv_data *data = netdev_priv(dev);
909 
910 	/* A race could cause dev to already be scheduled, so it's not an
911 	 * error if that happens (and interrupts shouldn't be re-masked,
912 	 * because that can cause harmful races, if poll has already
913 	 * unmasked them but not cleared LINK_STATE_SCHED).
914 	 *
915 	 * This can happen if this code races with tsi108_poll(), which masks
916 	 * the interrupts after tsi108_irq_one() read the mask, but before
917 	 * napi_schedule is called.  It could also happen due to calls
918 	 * from tsi108_check_rxring().
919 	 */
920 
921 	if (napi_schedule_prep(&data->napi)) {
922 		/* Mask, rather than ack, the receive interrupts.  The ack
923 		 * will happen in tsi108_poll().
924 		 */
925 
926 		TSI_WRITE(TSI108_EC_INTMASK,
927 				     TSI_READ(TSI108_EC_INTMASK) |
928 				     TSI108_INT_RXQUEUE0
929 				     | TSI108_INT_RXTHRESH |
930 				     TSI108_INT_RXOVERRUN | TSI108_INT_RXERROR |
931 				     TSI108_INT_RXWAIT);
932 		__napi_schedule(&data->napi);
933 	} else {
934 		if (!netif_running(dev)) {
935 			/* This can happen if an interrupt occurs while the
936 			 * interface is being brought down, as the START
937 			 * bit is cleared before the stop function is called.
938 			 *
939 			 * In this case, the interrupts must be masked, or
940 			 * they will continue indefinitely.
941 			 *
942 			 * There's a race here if the interface is brought down
943 			 * and then up in rapid succession, as the device could
944 			 * be made running after the above check and before
945 			 * the masking below.  This will only happen if the IRQ
946 			 * thread has a lower priority than the task brining
947 			 * up the interface.  Fixing this race would likely
948 			 * require changes in generic code.
949 			 */
950 
951 			TSI_WRITE(TSI108_EC_INTMASK,
952 					     TSI_READ
953 					     (TSI108_EC_INTMASK) |
954 					     TSI108_INT_RXQUEUE0 |
955 					     TSI108_INT_RXTHRESH |
956 					     TSI108_INT_RXOVERRUN |
957 					     TSI108_INT_RXERROR |
958 					     TSI108_INT_RXWAIT);
959 		}
960 	}
961 }
962 
963 /* If the RX ring has run out of memory, try periodically
964  * to allocate some more, as otherwise poll would never
965  * get called (apart from the initial end-of-queue condition).
966  *
967  * This is called once per second (by default) from the thread.
968  */
969 
970 static void tsi108_check_rxring(struct net_device *dev)
971 {
972 	struct tsi108_prv_data *data = netdev_priv(dev);
973 
974 	/* A poll is scheduled, as opposed to caling tsi108_refill_rx
975 	 * directly, so as to keep the receive path single-threaded
976 	 * (and thus not needing a lock).
977 	 */
978 
979 	if (netif_running(dev) && data->rxfree < TSI108_RXRING_LEN / 4)
980 		tsi108_rx_int(dev);
981 }
982 
983 static void tsi108_tx_int(struct net_device *dev)
984 {
985 	struct tsi108_prv_data *data = netdev_priv(dev);
986 	u32 estat = TSI_READ(TSI108_EC_TXESTAT);
987 
988 	TSI_WRITE(TSI108_EC_TXESTAT, estat);
989 	TSI_WRITE(TSI108_EC_INTSTAT, TSI108_INT_TXQUEUE0 |
990 			     TSI108_INT_TXIDLE | TSI108_INT_TXERROR);
991 	if (estat & TSI108_EC_TXESTAT_Q0_ERR) {
992 		u32 err = TSI_READ(TSI108_EC_TXERR);
993 		TSI_WRITE(TSI108_EC_TXERR, err);
994 
995 		if (err && net_ratelimit())
996 			printk(KERN_ERR "%s: TX error %x\n", dev->name, err);
997 	}
998 
999 	if (estat & (TSI108_EC_TXESTAT_Q0_DESCINT | TSI108_EC_TXESTAT_Q0_EOQ)) {
1000 		spin_lock(&data->txlock);
1001 		tsi108_complete_tx(dev);
1002 		spin_unlock(&data->txlock);
1003 	}
1004 }
1005 
1006 
1007 static irqreturn_t tsi108_irq(int irq, void *dev_id)
1008 {
1009 	struct net_device *dev = dev_id;
1010 	struct tsi108_prv_data *data = netdev_priv(dev);
1011 	u32 stat = TSI_READ(TSI108_EC_INTSTAT);
1012 
1013 	if (!(stat & TSI108_INT_ANY))
1014 		return IRQ_NONE;	/* Not our interrupt */
1015 
1016 	stat &= ~TSI_READ(TSI108_EC_INTMASK);
1017 
1018 	if (stat & (TSI108_INT_TXQUEUE0 | TSI108_INT_TXIDLE |
1019 		    TSI108_INT_TXERROR))
1020 		tsi108_tx_int(dev);
1021 	if (stat & (TSI108_INT_RXQUEUE0 | TSI108_INT_RXTHRESH |
1022 		    TSI108_INT_RXWAIT | TSI108_INT_RXOVERRUN |
1023 		    TSI108_INT_RXERROR))
1024 		tsi108_rx_int(dev);
1025 
1026 	if (stat & TSI108_INT_SFN) {
1027 		if (net_ratelimit())
1028 			printk(KERN_DEBUG "%s: SFN error\n", dev->name);
1029 		TSI_WRITE(TSI108_EC_INTSTAT, TSI108_INT_SFN);
1030 	}
1031 
1032 	if (stat & TSI108_INT_STATCARRY) {
1033 		tsi108_stat_carry(dev);
1034 		TSI_WRITE(TSI108_EC_INTSTAT, TSI108_INT_STATCARRY);
1035 	}
1036 
1037 	return IRQ_HANDLED;
1038 }
1039 
1040 static void tsi108_stop_ethernet(struct net_device *dev)
1041 {
1042 	struct tsi108_prv_data *data = netdev_priv(dev);
1043 	int i = 1000;
1044 	/* Disable all TX and RX queues ... */
1045 	TSI_WRITE(TSI108_EC_TXCTRL, 0);
1046 	TSI_WRITE(TSI108_EC_RXCTRL, 0);
1047 
1048 	/* ...and wait for them to become idle */
1049 	while(i--) {
1050 		if(!(TSI_READ(TSI108_EC_TXSTAT) & TSI108_EC_TXSTAT_ACTIVE))
1051 			break;
1052 		udelay(10);
1053 	}
1054 	i = 1000;
1055 	while(i--){
1056 		if(!(TSI_READ(TSI108_EC_RXSTAT) & TSI108_EC_RXSTAT_ACTIVE))
1057 			return;
1058 		udelay(10);
1059 	}
1060 	printk(KERN_ERR "%s function time out\n", __func__);
1061 }
1062 
1063 static void tsi108_reset_ether(struct tsi108_prv_data * data)
1064 {
1065 	TSI_WRITE(TSI108_MAC_CFG1, TSI108_MAC_CFG1_SOFTRST);
1066 	udelay(100);
1067 	TSI_WRITE(TSI108_MAC_CFG1, 0);
1068 
1069 	TSI_WRITE(TSI108_EC_PORTCTRL, TSI108_EC_PORTCTRL_STATRST);
1070 	udelay(100);
1071 	TSI_WRITE(TSI108_EC_PORTCTRL,
1072 			     TSI_READ(TSI108_EC_PORTCTRL) &
1073 			     ~TSI108_EC_PORTCTRL_STATRST);
1074 
1075 	TSI_WRITE(TSI108_EC_TXCFG, TSI108_EC_TXCFG_RST);
1076 	udelay(100);
1077 	TSI_WRITE(TSI108_EC_TXCFG,
1078 			     TSI_READ(TSI108_EC_TXCFG) &
1079 			     ~TSI108_EC_TXCFG_RST);
1080 
1081 	TSI_WRITE(TSI108_EC_RXCFG, TSI108_EC_RXCFG_RST);
1082 	udelay(100);
1083 	TSI_WRITE(TSI108_EC_RXCFG,
1084 			     TSI_READ(TSI108_EC_RXCFG) &
1085 			     ~TSI108_EC_RXCFG_RST);
1086 
1087 	TSI_WRITE(TSI108_MAC_MII_MGMT_CFG,
1088 			     TSI_READ(TSI108_MAC_MII_MGMT_CFG) |
1089 			     TSI108_MAC_MII_MGMT_RST);
1090 	udelay(100);
1091 	TSI_WRITE(TSI108_MAC_MII_MGMT_CFG,
1092 			     (TSI_READ(TSI108_MAC_MII_MGMT_CFG) &
1093 			     ~(TSI108_MAC_MII_MGMT_RST |
1094 			       TSI108_MAC_MII_MGMT_CLK)) | 0x07);
1095 }
1096 
1097 static int tsi108_get_mac(struct net_device *dev)
1098 {
1099 	struct tsi108_prv_data *data = netdev_priv(dev);
1100 	u32 word1 = TSI_READ(TSI108_MAC_ADDR1);
1101 	u32 word2 = TSI_READ(TSI108_MAC_ADDR2);
1102 
1103 	/* Note that the octets are reversed from what the manual says,
1104 	 * producing an even weirder ordering...
1105 	 */
1106 	if (word2 == 0 && word1 == 0) {
1107 		dev->dev_addr[0] = 0x00;
1108 		dev->dev_addr[1] = 0x06;
1109 		dev->dev_addr[2] = 0xd2;
1110 		dev->dev_addr[3] = 0x00;
1111 		dev->dev_addr[4] = 0x00;
1112 		if (0x8 == data->phy)
1113 			dev->dev_addr[5] = 0x01;
1114 		else
1115 			dev->dev_addr[5] = 0x02;
1116 
1117 		word2 = (dev->dev_addr[0] << 16) | (dev->dev_addr[1] << 24);
1118 
1119 		word1 = (dev->dev_addr[2] << 0) | (dev->dev_addr[3] << 8) |
1120 		    (dev->dev_addr[4] << 16) | (dev->dev_addr[5] << 24);
1121 
1122 		TSI_WRITE(TSI108_MAC_ADDR1, word1);
1123 		TSI_WRITE(TSI108_MAC_ADDR2, word2);
1124 	} else {
1125 		dev->dev_addr[0] = (word2 >> 16) & 0xff;
1126 		dev->dev_addr[1] = (word2 >> 24) & 0xff;
1127 		dev->dev_addr[2] = (word1 >> 0) & 0xff;
1128 		dev->dev_addr[3] = (word1 >> 8) & 0xff;
1129 		dev->dev_addr[4] = (word1 >> 16) & 0xff;
1130 		dev->dev_addr[5] = (word1 >> 24) & 0xff;
1131 	}
1132 
1133 	if (!is_valid_ether_addr(dev->dev_addr)) {
1134 		printk(KERN_ERR
1135 		       "%s: Invalid MAC address. word1: %08x, word2: %08x\n",
1136 		       dev->name, word1, word2);
1137 		return -EINVAL;
1138 	}
1139 
1140 	return 0;
1141 }
1142 
1143 static int tsi108_set_mac(struct net_device *dev, void *addr)
1144 {
1145 	struct tsi108_prv_data *data = netdev_priv(dev);
1146 	u32 word1, word2;
1147 	int i;
1148 
1149 	if (!is_valid_ether_addr(addr))
1150 		return -EADDRNOTAVAIL;
1151 
1152 	for (i = 0; i < 6; i++)
1153 		/* +2 is for the offset of the HW addr type */
1154 		dev->dev_addr[i] = ((unsigned char *)addr)[i + 2];
1155 
1156 	word2 = (dev->dev_addr[0] << 16) | (dev->dev_addr[1] << 24);
1157 
1158 	word1 = (dev->dev_addr[2] << 0) | (dev->dev_addr[3] << 8) |
1159 	    (dev->dev_addr[4] << 16) | (dev->dev_addr[5] << 24);
1160 
1161 	spin_lock_irq(&data->misclock);
1162 	TSI_WRITE(TSI108_MAC_ADDR1, word1);
1163 	TSI_WRITE(TSI108_MAC_ADDR2, word2);
1164 	spin_lock(&data->txlock);
1165 
1166 	if (data->txfree && data->link_up)
1167 		netif_wake_queue(dev);
1168 
1169 	spin_unlock(&data->txlock);
1170 	spin_unlock_irq(&data->misclock);
1171 	return 0;
1172 }
1173 
1174 /* Protected by dev->xmit_lock. */
1175 static void tsi108_set_rx_mode(struct net_device *dev)
1176 {
1177 	struct tsi108_prv_data *data = netdev_priv(dev);
1178 	u32 rxcfg = TSI_READ(TSI108_EC_RXCFG);
1179 
1180 	if (dev->flags & IFF_PROMISC) {
1181 		rxcfg &= ~(TSI108_EC_RXCFG_UC_HASH | TSI108_EC_RXCFG_MC_HASH);
1182 		rxcfg |= TSI108_EC_RXCFG_UFE | TSI108_EC_RXCFG_MFE;
1183 		goto out;
1184 	}
1185 
1186 	rxcfg &= ~(TSI108_EC_RXCFG_UFE | TSI108_EC_RXCFG_MFE);
1187 
1188 	if (dev->flags & IFF_ALLMULTI || !netdev_mc_empty(dev)) {
1189 		int i;
1190 		struct netdev_hw_addr *ha;
1191 		rxcfg |= TSI108_EC_RXCFG_MFE | TSI108_EC_RXCFG_MC_HASH;
1192 
1193 		memset(data->mc_hash, 0, sizeof(data->mc_hash));
1194 
1195 		netdev_for_each_mc_addr(ha, dev) {
1196 			u32 hash, crc;
1197 
1198 			crc = ether_crc(6, ha->addr);
1199 			hash = crc >> 23;
1200 			__set_bit(hash, &data->mc_hash[0]);
1201 		}
1202 
1203 		TSI_WRITE(TSI108_EC_HASHADDR,
1204 				     TSI108_EC_HASHADDR_AUTOINC |
1205 				     TSI108_EC_HASHADDR_MCAST);
1206 
1207 		for (i = 0; i < 16; i++) {
1208 			/* The manual says that the hardware may drop
1209 			 * back-to-back writes to the data register.
1210 			 */
1211 			udelay(1);
1212 			TSI_WRITE(TSI108_EC_HASHDATA,
1213 					     data->mc_hash[i]);
1214 		}
1215 	}
1216 
1217       out:
1218 	TSI_WRITE(TSI108_EC_RXCFG, rxcfg);
1219 }
1220 
1221 static void tsi108_init_phy(struct net_device *dev)
1222 {
1223 	struct tsi108_prv_data *data = netdev_priv(dev);
1224 	u32 i = 0;
1225 	u16 phyval = 0;
1226 	unsigned long flags;
1227 
1228 	spin_lock_irqsave(&phy_lock, flags);
1229 
1230 	tsi108_write_mii(data, MII_BMCR, BMCR_RESET);
1231 	while (--i) {
1232 		if(!(tsi108_read_mii(data, MII_BMCR) & BMCR_RESET))
1233 			break;
1234 		udelay(10);
1235 	}
1236 	if (i == 0)
1237 		printk(KERN_ERR "%s function time out\n", __func__);
1238 
1239 	if (data->phy_type == TSI108_PHY_BCM54XX) {
1240 		tsi108_write_mii(data, 0x09, 0x0300);
1241 		tsi108_write_mii(data, 0x10, 0x1020);
1242 		tsi108_write_mii(data, 0x1c, 0x8c00);
1243 	}
1244 
1245 	tsi108_write_mii(data,
1246 			 MII_BMCR,
1247 			 BMCR_ANENABLE | BMCR_ANRESTART);
1248 	while (tsi108_read_mii(data, MII_BMCR) & BMCR_ANRESTART)
1249 		cpu_relax();
1250 
1251 	/* Set G/MII mode and receive clock select in TBI control #2.  The
1252 	 * second port won't work if this isn't done, even though we don't
1253 	 * use TBI mode.
1254 	 */
1255 
1256 	tsi108_write_tbi(data, 0x11, 0x30);
1257 
1258 	/* FIXME: It seems to take more than 2 back-to-back reads to the
1259 	 * PHY_STAT register before the link up status bit is set.
1260 	 */
1261 
1262 	data->link_up = 0;
1263 
1264 	while (!((phyval = tsi108_read_mii(data, MII_BMSR)) &
1265 		 BMSR_LSTATUS)) {
1266 		if (i++ > (MII_READ_DELAY / 10)) {
1267 			break;
1268 		}
1269 		spin_unlock_irqrestore(&phy_lock, flags);
1270 		msleep(10);
1271 		spin_lock_irqsave(&phy_lock, flags);
1272 	}
1273 
1274 	data->mii_if.supports_gmii = mii_check_gmii_support(&data->mii_if);
1275 	printk(KERN_DEBUG "PHY_STAT reg contains %08x\n", phyval);
1276 	data->phy_ok = 1;
1277 	data->init_media = 1;
1278 	spin_unlock_irqrestore(&phy_lock, flags);
1279 }
1280 
1281 static void tsi108_kill_phy(struct net_device *dev)
1282 {
1283 	struct tsi108_prv_data *data = netdev_priv(dev);
1284 	unsigned long flags;
1285 
1286 	spin_lock_irqsave(&phy_lock, flags);
1287 	tsi108_write_mii(data, MII_BMCR, BMCR_PDOWN);
1288 	data->phy_ok = 0;
1289 	spin_unlock_irqrestore(&phy_lock, flags);
1290 }
1291 
1292 static int tsi108_open(struct net_device *dev)
1293 {
1294 	int i;
1295 	struct tsi108_prv_data *data = netdev_priv(dev);
1296 	unsigned int rxring_size = TSI108_RXRING_LEN * sizeof(rx_desc);
1297 	unsigned int txring_size = TSI108_TXRING_LEN * sizeof(tx_desc);
1298 
1299 	i = request_irq(data->irq_num, tsi108_irq, 0, dev->name, dev);
1300 	if (i != 0) {
1301 		printk(KERN_ERR "tsi108_eth%d: Could not allocate IRQ%d.\n",
1302 		       data->id, data->irq_num);
1303 		return i;
1304 	} else {
1305 		dev->irq = data->irq_num;
1306 		printk(KERN_NOTICE
1307 		       "tsi108_open : Port %d Assigned IRQ %d to %s\n",
1308 		       data->id, dev->irq, dev->name);
1309 	}
1310 
1311 	data->rxring = dma_zalloc_coherent(NULL, rxring_size, &data->rxdma,
1312 					   GFP_KERNEL);
1313 	if (!data->rxring)
1314 		return -ENOMEM;
1315 
1316 	data->txring = dma_zalloc_coherent(NULL, txring_size, &data->txdma,
1317 					   GFP_KERNEL);
1318 	if (!data->txring) {
1319 		pci_free_consistent(NULL, rxring_size, data->rxring,
1320 				    data->rxdma);
1321 		return -ENOMEM;
1322 	}
1323 
1324 	for (i = 0; i < TSI108_RXRING_LEN; i++) {
1325 		data->rxring[i].next0 = data->rxdma + (i + 1) * sizeof(rx_desc);
1326 		data->rxring[i].blen = TSI108_RXBUF_SIZE;
1327 		data->rxring[i].vlan = 0;
1328 	}
1329 
1330 	data->rxring[TSI108_RXRING_LEN - 1].next0 = data->rxdma;
1331 
1332 	data->rxtail = 0;
1333 	data->rxhead = 0;
1334 
1335 	for (i = 0; i < TSI108_RXRING_LEN; i++) {
1336 		struct sk_buff *skb;
1337 
1338 		skb = netdev_alloc_skb_ip_align(dev, TSI108_RXBUF_SIZE);
1339 		if (!skb) {
1340 			/* Bah.  No memory for now, but maybe we'll get
1341 			 * some more later.
1342 			 * For now, we'll live with the smaller ring.
1343 			 */
1344 			printk(KERN_WARNING
1345 			       "%s: Could only allocate %d receive skb(s).\n",
1346 			       dev->name, i);
1347 			data->rxhead = i;
1348 			break;
1349 		}
1350 
1351 		data->rxskbs[i] = skb;
1352 		data->rxring[i].buf0 = virt_to_phys(data->rxskbs[i]->data);
1353 		data->rxring[i].misc = TSI108_RX_OWN | TSI108_RX_INT;
1354 	}
1355 
1356 	data->rxfree = i;
1357 	TSI_WRITE(TSI108_EC_RXQ_PTRLOW, data->rxdma);
1358 
1359 	for (i = 0; i < TSI108_TXRING_LEN; i++) {
1360 		data->txring[i].next0 = data->txdma + (i + 1) * sizeof(tx_desc);
1361 		data->txring[i].misc = 0;
1362 	}
1363 
1364 	data->txring[TSI108_TXRING_LEN - 1].next0 = data->txdma;
1365 	data->txtail = 0;
1366 	data->txhead = 0;
1367 	data->txfree = TSI108_TXRING_LEN;
1368 	TSI_WRITE(TSI108_EC_TXQ_PTRLOW, data->txdma);
1369 	tsi108_init_phy(dev);
1370 
1371 	napi_enable(&data->napi);
1372 
1373 	setup_timer(&data->timer, tsi108_timed_checker, (unsigned long)dev);
1374 	mod_timer(&data->timer, jiffies + 1);
1375 
1376 	tsi108_restart_rx(data, dev);
1377 
1378 	TSI_WRITE(TSI108_EC_INTSTAT, ~0);
1379 
1380 	TSI_WRITE(TSI108_EC_INTMASK,
1381 			     ~(TSI108_INT_TXQUEUE0 | TSI108_INT_RXERROR |
1382 			       TSI108_INT_RXTHRESH | TSI108_INT_RXQUEUE0 |
1383 			       TSI108_INT_RXOVERRUN | TSI108_INT_RXWAIT |
1384 			       TSI108_INT_SFN | TSI108_INT_STATCARRY));
1385 
1386 	TSI_WRITE(TSI108_MAC_CFG1,
1387 			     TSI108_MAC_CFG1_RXEN | TSI108_MAC_CFG1_TXEN);
1388 	netif_start_queue(dev);
1389 	return 0;
1390 }
1391 
1392 static int tsi108_close(struct net_device *dev)
1393 {
1394 	struct tsi108_prv_data *data = netdev_priv(dev);
1395 
1396 	netif_stop_queue(dev);
1397 	napi_disable(&data->napi);
1398 
1399 	del_timer_sync(&data->timer);
1400 
1401 	tsi108_stop_ethernet(dev);
1402 	tsi108_kill_phy(dev);
1403 	TSI_WRITE(TSI108_EC_INTMASK, ~0);
1404 	TSI_WRITE(TSI108_MAC_CFG1, 0);
1405 
1406 	/* Check for any pending TX packets, and drop them. */
1407 
1408 	while (!data->txfree || data->txhead != data->txtail) {
1409 		int tx = data->txtail;
1410 		struct sk_buff *skb;
1411 		skb = data->txskbs[tx];
1412 		data->txtail = (data->txtail + 1) % TSI108_TXRING_LEN;
1413 		data->txfree++;
1414 		dev_kfree_skb(skb);
1415 	}
1416 
1417 	free_irq(data->irq_num, dev);
1418 
1419 	/* Discard the RX ring. */
1420 
1421 	while (data->rxfree) {
1422 		int rx = data->rxtail;
1423 		struct sk_buff *skb;
1424 
1425 		skb = data->rxskbs[rx];
1426 		data->rxtail = (data->rxtail + 1) % TSI108_RXRING_LEN;
1427 		data->rxfree--;
1428 		dev_kfree_skb(skb);
1429 	}
1430 
1431 	dma_free_coherent(0,
1432 			    TSI108_RXRING_LEN * sizeof(rx_desc),
1433 			    data->rxring, data->rxdma);
1434 	dma_free_coherent(0,
1435 			    TSI108_TXRING_LEN * sizeof(tx_desc),
1436 			    data->txring, data->txdma);
1437 
1438 	return 0;
1439 }
1440 
1441 static void tsi108_init_mac(struct net_device *dev)
1442 {
1443 	struct tsi108_prv_data *data = netdev_priv(dev);
1444 
1445 	TSI_WRITE(TSI108_MAC_CFG2, TSI108_MAC_CFG2_DFLT_PREAMBLE |
1446 			     TSI108_MAC_CFG2_PADCRC);
1447 
1448 	TSI_WRITE(TSI108_EC_TXTHRESH,
1449 			     (192 << TSI108_EC_TXTHRESH_STARTFILL) |
1450 			     (192 << TSI108_EC_TXTHRESH_STOPFILL));
1451 
1452 	TSI_WRITE(TSI108_STAT_CARRYMASK1,
1453 			     ~(TSI108_STAT_CARRY1_RXBYTES |
1454 			       TSI108_STAT_CARRY1_RXPKTS |
1455 			       TSI108_STAT_CARRY1_RXFCS |
1456 			       TSI108_STAT_CARRY1_RXMCAST |
1457 			       TSI108_STAT_CARRY1_RXALIGN |
1458 			       TSI108_STAT_CARRY1_RXLENGTH |
1459 			       TSI108_STAT_CARRY1_RXRUNT |
1460 			       TSI108_STAT_CARRY1_RXJUMBO |
1461 			       TSI108_STAT_CARRY1_RXFRAG |
1462 			       TSI108_STAT_CARRY1_RXJABBER |
1463 			       TSI108_STAT_CARRY1_RXDROP));
1464 
1465 	TSI_WRITE(TSI108_STAT_CARRYMASK2,
1466 			     ~(TSI108_STAT_CARRY2_TXBYTES |
1467 			       TSI108_STAT_CARRY2_TXPKTS |
1468 			       TSI108_STAT_CARRY2_TXEXDEF |
1469 			       TSI108_STAT_CARRY2_TXEXCOL |
1470 			       TSI108_STAT_CARRY2_TXTCOL |
1471 			       TSI108_STAT_CARRY2_TXPAUSE));
1472 
1473 	TSI_WRITE(TSI108_EC_PORTCTRL, TSI108_EC_PORTCTRL_STATEN);
1474 	TSI_WRITE(TSI108_MAC_CFG1, 0);
1475 
1476 	TSI_WRITE(TSI108_EC_RXCFG,
1477 			     TSI108_EC_RXCFG_SE | TSI108_EC_RXCFG_BFE);
1478 
1479 	TSI_WRITE(TSI108_EC_TXQ_CFG, TSI108_EC_TXQ_CFG_DESC_INT |
1480 			     TSI108_EC_TXQ_CFG_EOQ_OWN_INT |
1481 			     TSI108_EC_TXQ_CFG_WSWP | (TSI108_PBM_PORT <<
1482 						TSI108_EC_TXQ_CFG_SFNPORT));
1483 
1484 	TSI_WRITE(TSI108_EC_RXQ_CFG, TSI108_EC_RXQ_CFG_DESC_INT |
1485 			     TSI108_EC_RXQ_CFG_EOQ_OWN_INT |
1486 			     TSI108_EC_RXQ_CFG_WSWP | (TSI108_PBM_PORT <<
1487 						TSI108_EC_RXQ_CFG_SFNPORT));
1488 
1489 	TSI_WRITE(TSI108_EC_TXQ_BUFCFG,
1490 			     TSI108_EC_TXQ_BUFCFG_BURST256 |
1491 			     TSI108_EC_TXQ_BUFCFG_BSWP | (TSI108_PBM_PORT <<
1492 						TSI108_EC_TXQ_BUFCFG_SFNPORT));
1493 
1494 	TSI_WRITE(TSI108_EC_RXQ_BUFCFG,
1495 			     TSI108_EC_RXQ_BUFCFG_BURST256 |
1496 			     TSI108_EC_RXQ_BUFCFG_BSWP | (TSI108_PBM_PORT <<
1497 						TSI108_EC_RXQ_BUFCFG_SFNPORT));
1498 
1499 	TSI_WRITE(TSI108_EC_INTMASK, ~0);
1500 }
1501 
1502 static int tsi108_get_settings(struct net_device *dev, struct ethtool_cmd *cmd)
1503 {
1504 	struct tsi108_prv_data *data = netdev_priv(dev);
1505 	unsigned long flags;
1506 	int rc;
1507 
1508 	spin_lock_irqsave(&data->txlock, flags);
1509 	rc = mii_ethtool_gset(&data->mii_if, cmd);
1510 	spin_unlock_irqrestore(&data->txlock, flags);
1511 
1512 	return rc;
1513 }
1514 
1515 static int tsi108_set_settings(struct net_device *dev, struct ethtool_cmd *cmd)
1516 {
1517 	struct tsi108_prv_data *data = netdev_priv(dev);
1518 	unsigned long flags;
1519 	int rc;
1520 
1521 	spin_lock_irqsave(&data->txlock, flags);
1522 	rc = mii_ethtool_sset(&data->mii_if, cmd);
1523 	spin_unlock_irqrestore(&data->txlock, flags);
1524 
1525 	return rc;
1526 }
1527 
1528 static int tsi108_do_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
1529 {
1530 	struct tsi108_prv_data *data = netdev_priv(dev);
1531 	if (!netif_running(dev))
1532 		return -EINVAL;
1533 	return generic_mii_ioctl(&data->mii_if, if_mii(rq), cmd, NULL);
1534 }
1535 
1536 static const struct ethtool_ops tsi108_ethtool_ops = {
1537 	.get_link 	= ethtool_op_get_link,
1538 	.get_settings	= tsi108_get_settings,
1539 	.set_settings	= tsi108_set_settings,
1540 };
1541 
1542 static const struct net_device_ops tsi108_netdev_ops = {
1543 	.ndo_open		= tsi108_open,
1544 	.ndo_stop		= tsi108_close,
1545 	.ndo_start_xmit		= tsi108_send_packet,
1546 	.ndo_set_rx_mode	= tsi108_set_rx_mode,
1547 	.ndo_get_stats		= tsi108_get_stats,
1548 	.ndo_do_ioctl		= tsi108_do_ioctl,
1549 	.ndo_set_mac_address	= tsi108_set_mac,
1550 	.ndo_validate_addr	= eth_validate_addr,
1551 };
1552 
1553 static int
1554 tsi108_init_one(struct platform_device *pdev)
1555 {
1556 	struct net_device *dev = NULL;
1557 	struct tsi108_prv_data *data = NULL;
1558 	hw_info *einfo;
1559 	int err = 0;
1560 
1561 	einfo = dev_get_platdata(&pdev->dev);
1562 
1563 	if (NULL == einfo) {
1564 		printk(KERN_ERR "tsi-eth %d: Missing additional data!\n",
1565 		       pdev->id);
1566 		return -ENODEV;
1567 	}
1568 
1569 	/* Create an ethernet device instance */
1570 
1571 	dev = alloc_etherdev(sizeof(struct tsi108_prv_data));
1572 	if (!dev)
1573 		return -ENOMEM;
1574 
1575 	printk("tsi108_eth%d: probe...\n", pdev->id);
1576 	data = netdev_priv(dev);
1577 	data->dev = dev;
1578 
1579 	pr_debug("tsi108_eth%d:regs:phyresgs:phy:irq_num=0x%x:0x%x:0x%x:0x%x\n",
1580 			pdev->id, einfo->regs, einfo->phyregs,
1581 			einfo->phy, einfo->irq_num);
1582 
1583 	data->regs = ioremap(einfo->regs, 0x400);
1584 	if (NULL == data->regs) {
1585 		err = -ENOMEM;
1586 		goto regs_fail;
1587 	}
1588 
1589 	data->phyregs = ioremap(einfo->phyregs, 0x400);
1590 	if (NULL == data->phyregs) {
1591 		err = -ENOMEM;
1592 		goto phyregs_fail;
1593 	}
1594 /* MII setup */
1595 	data->mii_if.dev = dev;
1596 	data->mii_if.mdio_read = tsi108_mdio_read;
1597 	data->mii_if.mdio_write = tsi108_mdio_write;
1598 	data->mii_if.phy_id = einfo->phy;
1599 	data->mii_if.phy_id_mask = 0x1f;
1600 	data->mii_if.reg_num_mask = 0x1f;
1601 
1602 	data->phy = einfo->phy;
1603 	data->phy_type = einfo->phy_type;
1604 	data->irq_num = einfo->irq_num;
1605 	data->id = pdev->id;
1606 	netif_napi_add(dev, &data->napi, tsi108_poll, 64);
1607 	dev->netdev_ops = &tsi108_netdev_ops;
1608 	dev->ethtool_ops = &tsi108_ethtool_ops;
1609 
1610 	/* Apparently, the Linux networking code won't use scatter-gather
1611 	 * if the hardware doesn't do checksums.  However, it's faster
1612 	 * to checksum in place and use SG, as (among other reasons)
1613 	 * the cache won't be dirtied (which then has to be flushed
1614 	 * before DMA).  The checksumming is done by the driver (via
1615 	 * a new function skb_csum_dev() in net/core/skbuff.c).
1616 	 */
1617 
1618 	dev->features = NETIF_F_HIGHDMA;
1619 
1620 	spin_lock_init(&data->txlock);
1621 	spin_lock_init(&data->misclock);
1622 
1623 	tsi108_reset_ether(data);
1624 	tsi108_kill_phy(dev);
1625 
1626 	if ((err = tsi108_get_mac(dev)) != 0) {
1627 		printk(KERN_ERR "%s: Invalid MAC address.  Please correct.\n",
1628 		       dev->name);
1629 		goto register_fail;
1630 	}
1631 
1632 	tsi108_init_mac(dev);
1633 	err = register_netdev(dev);
1634 	if (err) {
1635 		printk(KERN_ERR "%s: Cannot register net device, aborting.\n",
1636 				dev->name);
1637 		goto register_fail;
1638 	}
1639 
1640 	platform_set_drvdata(pdev, dev);
1641 	printk(KERN_INFO "%s: Tsi108 Gigabit Ethernet, MAC: %pM\n",
1642 	       dev->name, dev->dev_addr);
1643 #ifdef DEBUG
1644 	data->msg_enable = DEBUG;
1645 	dump_eth_one(dev);
1646 #endif
1647 
1648 	return 0;
1649 
1650 register_fail:
1651 	iounmap(data->phyregs);
1652 
1653 phyregs_fail:
1654 	iounmap(data->regs);
1655 
1656 regs_fail:
1657 	free_netdev(dev);
1658 	return err;
1659 }
1660 
1661 /* There's no way to either get interrupts from the PHY when
1662  * something changes, or to have the Tsi108 automatically communicate
1663  * with the PHY to reconfigure itself.
1664  *
1665  * Thus, we have to do it using a timer.
1666  */
1667 
1668 static void tsi108_timed_checker(unsigned long dev_ptr)
1669 {
1670 	struct net_device *dev = (struct net_device *)dev_ptr;
1671 	struct tsi108_prv_data *data = netdev_priv(dev);
1672 
1673 	tsi108_check_phy(dev);
1674 	tsi108_check_rxring(dev);
1675 	mod_timer(&data->timer, jiffies + CHECK_PHY_INTERVAL);
1676 }
1677 
1678 static int tsi108_ether_remove(struct platform_device *pdev)
1679 {
1680 	struct net_device *dev = platform_get_drvdata(pdev);
1681 	struct tsi108_prv_data *priv = netdev_priv(dev);
1682 
1683 	unregister_netdev(dev);
1684 	tsi108_stop_ethernet(dev);
1685 	iounmap(priv->regs);
1686 	iounmap(priv->phyregs);
1687 	free_netdev(dev);
1688 
1689 	return 0;
1690 }
1691 module_platform_driver(tsi_eth_driver);
1692 
1693 MODULE_AUTHOR("Tundra Semiconductor Corporation");
1694 MODULE_DESCRIPTION("Tsi108 Gigabit Ethernet driver");
1695 MODULE_LICENSE("GPL");
1696 MODULE_ALIAS("platform:tsi-ethernet");
1697