1 /******************************************************************************* 2 3 Copyright(c) 2006 Tundra Semiconductor Corporation. 4 5 This program is free software; you can redistribute it and/or modify it 6 under the terms of the GNU General Public License as published by the Free 7 Software Foundation; either version 2 of the License, or (at your option) 8 any later version. 9 10 This program is distributed in the hope that it will be useful, but WITHOUT 11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 13 more details. 14 15 You should have received a copy of the GNU General Public License along with 16 this program; if not, write to the Free Software Foundation, Inc., 59 17 Temple Place - Suite 330, Boston, MA 02111-1307, USA. 18 19 *******************************************************************************/ 20 21 /* This driver is based on the driver code originally developed 22 * for the Intel IOC80314 (ForestLake) Gigabit Ethernet by 23 * scott.wood@timesys.com * Copyright (C) 2003 TimeSys Corporation 24 * 25 * Currently changes from original version are: 26 * - porting to Tsi108-based platform and kernel 2.6 (kong.lai@tundra.com) 27 * - modifications to handle two ports independently and support for 28 * additional PHY devices (alexandre.bounine@tundra.com) 29 * - Get hardware information from platform device. (tie-fei.zang@freescale.com) 30 * 31 */ 32 33 #include <linux/module.h> 34 #include <linux/types.h> 35 #include <linux/interrupt.h> 36 #include <linux/net.h> 37 #include <linux/netdevice.h> 38 #include <linux/etherdevice.h> 39 #include <linux/ethtool.h> 40 #include <linux/skbuff.h> 41 #include <linux/spinlock.h> 42 #include <linux/delay.h> 43 #include <linux/crc32.h> 44 #include <linux/mii.h> 45 #include <linux/device.h> 46 #include <linux/pci.h> 47 #include <linux/rtnetlink.h> 48 #include <linux/timer.h> 49 #include <linux/platform_device.h> 50 #include <linux/gfp.h> 51 52 #include <asm/io.h> 53 #include <asm/tsi108.h> 54 55 #include "tsi108_eth.h" 56 57 #define MII_READ_DELAY 10000 /* max link wait time in msec */ 58 59 #define TSI108_RXRING_LEN 256 60 61 /* NOTE: The driver currently does not support receiving packets 62 * larger than the buffer size, so don't decrease this (unless you 63 * want to add such support). 64 */ 65 #define TSI108_RXBUF_SIZE 1536 66 67 #define TSI108_TXRING_LEN 256 68 69 #define TSI108_TX_INT_FREQ 64 70 71 /* Check the phy status every half a second. */ 72 #define CHECK_PHY_INTERVAL (HZ/2) 73 74 static int tsi108_init_one(struct platform_device *pdev); 75 static int tsi108_ether_remove(struct platform_device *pdev); 76 77 struct tsi108_prv_data { 78 void __iomem *regs; /* Base of normal regs */ 79 void __iomem *phyregs; /* Base of register bank used for PHY access */ 80 81 struct net_device *dev; 82 struct napi_struct napi; 83 84 unsigned int phy; /* Index of PHY for this interface */ 85 unsigned int irq_num; 86 unsigned int id; 87 unsigned int phy_type; 88 89 struct timer_list timer;/* Timer that triggers the check phy function */ 90 unsigned int rxtail; /* Next entry in rxring to read */ 91 unsigned int rxhead; /* Next entry in rxring to give a new buffer */ 92 unsigned int rxfree; /* Number of free, allocated RX buffers */ 93 94 unsigned int rxpending; /* Non-zero if there are still descriptors 95 * to be processed from a previous descriptor 96 * interrupt condition that has been cleared */ 97 98 unsigned int txtail; /* Next TX descriptor to check status on */ 99 unsigned int txhead; /* Next TX descriptor to use */ 100 101 /* Number of free TX descriptors. This could be calculated from 102 * rxhead and rxtail if one descriptor were left unused to disambiguate 103 * full and empty conditions, but it's simpler to just keep track 104 * explicitly. */ 105 106 unsigned int txfree; 107 108 unsigned int phy_ok; /* The PHY is currently powered on. */ 109 110 /* PHY status (duplex is 1 for half, 2 for full, 111 * so that the default 0 indicates that neither has 112 * yet been configured). */ 113 114 unsigned int link_up; 115 unsigned int speed; 116 unsigned int duplex; 117 118 tx_desc *txring; 119 rx_desc *rxring; 120 struct sk_buff *txskbs[TSI108_TXRING_LEN]; 121 struct sk_buff *rxskbs[TSI108_RXRING_LEN]; 122 123 dma_addr_t txdma, rxdma; 124 125 /* txlock nests in misclock and phy_lock */ 126 127 spinlock_t txlock, misclock; 128 129 /* stats is used to hold the upper bits of each hardware counter, 130 * and tmpstats is used to hold the full values for returning 131 * to the caller of get_stats(). They must be separate in case 132 * an overflow interrupt occurs before the stats are consumed. 133 */ 134 135 struct net_device_stats stats; 136 struct net_device_stats tmpstats; 137 138 /* These stats are kept separate in hardware, thus require individual 139 * fields for handling carry. They are combined in get_stats. 140 */ 141 142 unsigned long rx_fcs; /* Add to rx_frame_errors */ 143 unsigned long rx_short_fcs; /* Add to rx_frame_errors */ 144 unsigned long rx_long_fcs; /* Add to rx_frame_errors */ 145 unsigned long rx_underruns; /* Add to rx_length_errors */ 146 unsigned long rx_overruns; /* Add to rx_length_errors */ 147 148 unsigned long tx_coll_abort; /* Add to tx_aborted_errors/collisions */ 149 unsigned long tx_pause_drop; /* Add to tx_aborted_errors */ 150 151 unsigned long mc_hash[16]; 152 u32 msg_enable; /* debug message level */ 153 struct mii_if_info mii_if; 154 unsigned int init_media; 155 156 struct platform_device *pdev; 157 }; 158 159 /* Structure for a device driver */ 160 161 static struct platform_driver tsi_eth_driver = { 162 .probe = tsi108_init_one, 163 .remove = tsi108_ether_remove, 164 .driver = { 165 .name = "tsi-ethernet", 166 }, 167 }; 168 169 static void tsi108_timed_checker(struct timer_list *t); 170 171 #ifdef DEBUG 172 static void dump_eth_one(struct net_device *dev) 173 { 174 struct tsi108_prv_data *data = netdev_priv(dev); 175 176 printk("Dumping %s...\n", dev->name); 177 printk("intstat %x intmask %x phy_ok %d" 178 " link %d speed %d duplex %d\n", 179 TSI_READ(TSI108_EC_INTSTAT), 180 TSI_READ(TSI108_EC_INTMASK), data->phy_ok, 181 data->link_up, data->speed, data->duplex); 182 183 printk("TX: head %d, tail %d, free %d, stat %x, estat %x, err %x\n", 184 data->txhead, data->txtail, data->txfree, 185 TSI_READ(TSI108_EC_TXSTAT), 186 TSI_READ(TSI108_EC_TXESTAT), 187 TSI_READ(TSI108_EC_TXERR)); 188 189 printk("RX: head %d, tail %d, free %d, stat %x," 190 " estat %x, err %x, pending %d\n\n", 191 data->rxhead, data->rxtail, data->rxfree, 192 TSI_READ(TSI108_EC_RXSTAT), 193 TSI_READ(TSI108_EC_RXESTAT), 194 TSI_READ(TSI108_EC_RXERR), data->rxpending); 195 } 196 #endif 197 198 /* Synchronization is needed between the thread and up/down events. 199 * Note that the PHY is accessed through the same registers for both 200 * interfaces, so this can't be made interface-specific. 201 */ 202 203 static DEFINE_SPINLOCK(phy_lock); 204 205 static int tsi108_read_mii(struct tsi108_prv_data *data, int reg) 206 { 207 unsigned i; 208 209 TSI_WRITE_PHY(TSI108_MAC_MII_ADDR, 210 (data->phy << TSI108_MAC_MII_ADDR_PHY) | 211 (reg << TSI108_MAC_MII_ADDR_REG)); 212 TSI_WRITE_PHY(TSI108_MAC_MII_CMD, 0); 213 TSI_WRITE_PHY(TSI108_MAC_MII_CMD, TSI108_MAC_MII_CMD_READ); 214 for (i = 0; i < 100; i++) { 215 if (!(TSI_READ_PHY(TSI108_MAC_MII_IND) & 216 (TSI108_MAC_MII_IND_NOTVALID | TSI108_MAC_MII_IND_BUSY))) 217 break; 218 udelay(10); 219 } 220 221 if (i == 100) 222 return 0xffff; 223 else 224 return TSI_READ_PHY(TSI108_MAC_MII_DATAIN); 225 } 226 227 static void tsi108_write_mii(struct tsi108_prv_data *data, 228 int reg, u16 val) 229 { 230 unsigned i = 100; 231 TSI_WRITE_PHY(TSI108_MAC_MII_ADDR, 232 (data->phy << TSI108_MAC_MII_ADDR_PHY) | 233 (reg << TSI108_MAC_MII_ADDR_REG)); 234 TSI_WRITE_PHY(TSI108_MAC_MII_DATAOUT, val); 235 while (i--) { 236 if(!(TSI_READ_PHY(TSI108_MAC_MII_IND) & 237 TSI108_MAC_MII_IND_BUSY)) 238 break; 239 udelay(10); 240 } 241 } 242 243 static int tsi108_mdio_read(struct net_device *dev, int addr, int reg) 244 { 245 struct tsi108_prv_data *data = netdev_priv(dev); 246 return tsi108_read_mii(data, reg); 247 } 248 249 static void tsi108_mdio_write(struct net_device *dev, int addr, int reg, int val) 250 { 251 struct tsi108_prv_data *data = netdev_priv(dev); 252 tsi108_write_mii(data, reg, val); 253 } 254 255 static inline void tsi108_write_tbi(struct tsi108_prv_data *data, 256 int reg, u16 val) 257 { 258 unsigned i = 1000; 259 TSI_WRITE(TSI108_MAC_MII_ADDR, 260 (0x1e << TSI108_MAC_MII_ADDR_PHY) 261 | (reg << TSI108_MAC_MII_ADDR_REG)); 262 TSI_WRITE(TSI108_MAC_MII_DATAOUT, val); 263 while(i--) { 264 if(!(TSI_READ(TSI108_MAC_MII_IND) & TSI108_MAC_MII_IND_BUSY)) 265 return; 266 udelay(10); 267 } 268 printk(KERN_ERR "%s function time out\n", __func__); 269 } 270 271 static int mii_speed(struct mii_if_info *mii) 272 { 273 int advert, lpa, val, media; 274 int lpa2 = 0; 275 int speed; 276 277 if (!mii_link_ok(mii)) 278 return 0; 279 280 val = (*mii->mdio_read) (mii->dev, mii->phy_id, MII_BMSR); 281 if ((val & BMSR_ANEGCOMPLETE) == 0) 282 return 0; 283 284 advert = (*mii->mdio_read) (mii->dev, mii->phy_id, MII_ADVERTISE); 285 lpa = (*mii->mdio_read) (mii->dev, mii->phy_id, MII_LPA); 286 media = mii_nway_result(advert & lpa); 287 288 if (mii->supports_gmii) 289 lpa2 = mii->mdio_read(mii->dev, mii->phy_id, MII_STAT1000); 290 291 speed = lpa2 & (LPA_1000FULL | LPA_1000HALF) ? 1000 : 292 (media & (ADVERTISE_100FULL | ADVERTISE_100HALF) ? 100 : 10); 293 return speed; 294 } 295 296 static void tsi108_check_phy(struct net_device *dev) 297 { 298 struct tsi108_prv_data *data = netdev_priv(dev); 299 u32 mac_cfg2_reg, portctrl_reg; 300 u32 duplex; 301 u32 speed; 302 unsigned long flags; 303 304 spin_lock_irqsave(&phy_lock, flags); 305 306 if (!data->phy_ok) 307 goto out; 308 309 duplex = mii_check_media(&data->mii_if, netif_msg_link(data), data->init_media); 310 data->init_media = 0; 311 312 if (netif_carrier_ok(dev)) { 313 314 speed = mii_speed(&data->mii_if); 315 316 if ((speed != data->speed) || duplex) { 317 318 mac_cfg2_reg = TSI_READ(TSI108_MAC_CFG2); 319 portctrl_reg = TSI_READ(TSI108_EC_PORTCTRL); 320 321 mac_cfg2_reg &= ~TSI108_MAC_CFG2_IFACE_MASK; 322 323 if (speed == 1000) { 324 mac_cfg2_reg |= TSI108_MAC_CFG2_GIG; 325 portctrl_reg &= ~TSI108_EC_PORTCTRL_NOGIG; 326 } else { 327 mac_cfg2_reg |= TSI108_MAC_CFG2_NOGIG; 328 portctrl_reg |= TSI108_EC_PORTCTRL_NOGIG; 329 } 330 331 data->speed = speed; 332 333 if (data->mii_if.full_duplex) { 334 mac_cfg2_reg |= TSI108_MAC_CFG2_FULLDUPLEX; 335 portctrl_reg &= ~TSI108_EC_PORTCTRL_HALFDUPLEX; 336 data->duplex = 2; 337 } else { 338 mac_cfg2_reg &= ~TSI108_MAC_CFG2_FULLDUPLEX; 339 portctrl_reg |= TSI108_EC_PORTCTRL_HALFDUPLEX; 340 data->duplex = 1; 341 } 342 343 TSI_WRITE(TSI108_MAC_CFG2, mac_cfg2_reg); 344 TSI_WRITE(TSI108_EC_PORTCTRL, portctrl_reg); 345 } 346 347 if (data->link_up == 0) { 348 /* The manual says it can take 3-4 usecs for the speed change 349 * to take effect. 350 */ 351 udelay(5); 352 353 spin_lock(&data->txlock); 354 if (is_valid_ether_addr(dev->dev_addr) && data->txfree) 355 netif_wake_queue(dev); 356 357 data->link_up = 1; 358 spin_unlock(&data->txlock); 359 } 360 } else { 361 if (data->link_up == 1) { 362 netif_stop_queue(dev); 363 data->link_up = 0; 364 printk(KERN_NOTICE "%s : link is down\n", dev->name); 365 } 366 367 goto out; 368 } 369 370 371 out: 372 spin_unlock_irqrestore(&phy_lock, flags); 373 } 374 375 static inline void 376 tsi108_stat_carry_one(int carry, int carry_bit, int carry_shift, 377 unsigned long *upper) 378 { 379 if (carry & carry_bit) 380 *upper += carry_shift; 381 } 382 383 static void tsi108_stat_carry(struct net_device *dev) 384 { 385 struct tsi108_prv_data *data = netdev_priv(dev); 386 u32 carry1, carry2; 387 388 spin_lock_irq(&data->misclock); 389 390 carry1 = TSI_READ(TSI108_STAT_CARRY1); 391 carry2 = TSI_READ(TSI108_STAT_CARRY2); 392 393 TSI_WRITE(TSI108_STAT_CARRY1, carry1); 394 TSI_WRITE(TSI108_STAT_CARRY2, carry2); 395 396 tsi108_stat_carry_one(carry1, TSI108_STAT_CARRY1_RXBYTES, 397 TSI108_STAT_RXBYTES_CARRY, &data->stats.rx_bytes); 398 399 tsi108_stat_carry_one(carry1, TSI108_STAT_CARRY1_RXPKTS, 400 TSI108_STAT_RXPKTS_CARRY, 401 &data->stats.rx_packets); 402 403 tsi108_stat_carry_one(carry1, TSI108_STAT_CARRY1_RXFCS, 404 TSI108_STAT_RXFCS_CARRY, &data->rx_fcs); 405 406 tsi108_stat_carry_one(carry1, TSI108_STAT_CARRY1_RXMCAST, 407 TSI108_STAT_RXMCAST_CARRY, 408 &data->stats.multicast); 409 410 tsi108_stat_carry_one(carry1, TSI108_STAT_CARRY1_RXALIGN, 411 TSI108_STAT_RXALIGN_CARRY, 412 &data->stats.rx_frame_errors); 413 414 tsi108_stat_carry_one(carry1, TSI108_STAT_CARRY1_RXLENGTH, 415 TSI108_STAT_RXLENGTH_CARRY, 416 &data->stats.rx_length_errors); 417 418 tsi108_stat_carry_one(carry1, TSI108_STAT_CARRY1_RXRUNT, 419 TSI108_STAT_RXRUNT_CARRY, &data->rx_underruns); 420 421 tsi108_stat_carry_one(carry1, TSI108_STAT_CARRY1_RXJUMBO, 422 TSI108_STAT_RXJUMBO_CARRY, &data->rx_overruns); 423 424 tsi108_stat_carry_one(carry1, TSI108_STAT_CARRY1_RXFRAG, 425 TSI108_STAT_RXFRAG_CARRY, &data->rx_short_fcs); 426 427 tsi108_stat_carry_one(carry1, TSI108_STAT_CARRY1_RXJABBER, 428 TSI108_STAT_RXJABBER_CARRY, &data->rx_long_fcs); 429 430 tsi108_stat_carry_one(carry1, TSI108_STAT_CARRY1_RXDROP, 431 TSI108_STAT_RXDROP_CARRY, 432 &data->stats.rx_missed_errors); 433 434 tsi108_stat_carry_one(carry2, TSI108_STAT_CARRY2_TXBYTES, 435 TSI108_STAT_TXBYTES_CARRY, &data->stats.tx_bytes); 436 437 tsi108_stat_carry_one(carry2, TSI108_STAT_CARRY2_TXPKTS, 438 TSI108_STAT_TXPKTS_CARRY, 439 &data->stats.tx_packets); 440 441 tsi108_stat_carry_one(carry2, TSI108_STAT_CARRY2_TXEXDEF, 442 TSI108_STAT_TXEXDEF_CARRY, 443 &data->stats.tx_aborted_errors); 444 445 tsi108_stat_carry_one(carry2, TSI108_STAT_CARRY2_TXEXCOL, 446 TSI108_STAT_TXEXCOL_CARRY, &data->tx_coll_abort); 447 448 tsi108_stat_carry_one(carry2, TSI108_STAT_CARRY2_TXTCOL, 449 TSI108_STAT_TXTCOL_CARRY, 450 &data->stats.collisions); 451 452 tsi108_stat_carry_one(carry2, TSI108_STAT_CARRY2_TXPAUSE, 453 TSI108_STAT_TXPAUSEDROP_CARRY, 454 &data->tx_pause_drop); 455 456 spin_unlock_irq(&data->misclock); 457 } 458 459 /* Read a stat counter atomically with respect to carries. 460 * data->misclock must be held. 461 */ 462 static inline unsigned long 463 tsi108_read_stat(struct tsi108_prv_data * data, int reg, int carry_bit, 464 int carry_shift, unsigned long *upper) 465 { 466 int carryreg; 467 unsigned long val; 468 469 if (reg < 0xb0) 470 carryreg = TSI108_STAT_CARRY1; 471 else 472 carryreg = TSI108_STAT_CARRY2; 473 474 again: 475 val = TSI_READ(reg) | *upper; 476 477 /* Check to see if it overflowed, but the interrupt hasn't 478 * been serviced yet. If so, handle the carry here, and 479 * try again. 480 */ 481 482 if (unlikely(TSI_READ(carryreg) & carry_bit)) { 483 *upper += carry_shift; 484 TSI_WRITE(carryreg, carry_bit); 485 goto again; 486 } 487 488 return val; 489 } 490 491 static struct net_device_stats *tsi108_get_stats(struct net_device *dev) 492 { 493 unsigned long excol; 494 495 struct tsi108_prv_data *data = netdev_priv(dev); 496 spin_lock_irq(&data->misclock); 497 498 data->tmpstats.rx_packets = 499 tsi108_read_stat(data, TSI108_STAT_RXPKTS, 500 TSI108_STAT_CARRY1_RXPKTS, 501 TSI108_STAT_RXPKTS_CARRY, &data->stats.rx_packets); 502 503 data->tmpstats.tx_packets = 504 tsi108_read_stat(data, TSI108_STAT_TXPKTS, 505 TSI108_STAT_CARRY2_TXPKTS, 506 TSI108_STAT_TXPKTS_CARRY, &data->stats.tx_packets); 507 508 data->tmpstats.rx_bytes = 509 tsi108_read_stat(data, TSI108_STAT_RXBYTES, 510 TSI108_STAT_CARRY1_RXBYTES, 511 TSI108_STAT_RXBYTES_CARRY, &data->stats.rx_bytes); 512 513 data->tmpstats.tx_bytes = 514 tsi108_read_stat(data, TSI108_STAT_TXBYTES, 515 TSI108_STAT_CARRY2_TXBYTES, 516 TSI108_STAT_TXBYTES_CARRY, &data->stats.tx_bytes); 517 518 data->tmpstats.multicast = 519 tsi108_read_stat(data, TSI108_STAT_RXMCAST, 520 TSI108_STAT_CARRY1_RXMCAST, 521 TSI108_STAT_RXMCAST_CARRY, &data->stats.multicast); 522 523 excol = tsi108_read_stat(data, TSI108_STAT_TXEXCOL, 524 TSI108_STAT_CARRY2_TXEXCOL, 525 TSI108_STAT_TXEXCOL_CARRY, 526 &data->tx_coll_abort); 527 528 data->tmpstats.collisions = 529 tsi108_read_stat(data, TSI108_STAT_TXTCOL, 530 TSI108_STAT_CARRY2_TXTCOL, 531 TSI108_STAT_TXTCOL_CARRY, &data->stats.collisions); 532 533 data->tmpstats.collisions += excol; 534 535 data->tmpstats.rx_length_errors = 536 tsi108_read_stat(data, TSI108_STAT_RXLENGTH, 537 TSI108_STAT_CARRY1_RXLENGTH, 538 TSI108_STAT_RXLENGTH_CARRY, 539 &data->stats.rx_length_errors); 540 541 data->tmpstats.rx_length_errors += 542 tsi108_read_stat(data, TSI108_STAT_RXRUNT, 543 TSI108_STAT_CARRY1_RXRUNT, 544 TSI108_STAT_RXRUNT_CARRY, &data->rx_underruns); 545 546 data->tmpstats.rx_length_errors += 547 tsi108_read_stat(data, TSI108_STAT_RXJUMBO, 548 TSI108_STAT_CARRY1_RXJUMBO, 549 TSI108_STAT_RXJUMBO_CARRY, &data->rx_overruns); 550 551 data->tmpstats.rx_frame_errors = 552 tsi108_read_stat(data, TSI108_STAT_RXALIGN, 553 TSI108_STAT_CARRY1_RXALIGN, 554 TSI108_STAT_RXALIGN_CARRY, 555 &data->stats.rx_frame_errors); 556 557 data->tmpstats.rx_frame_errors += 558 tsi108_read_stat(data, TSI108_STAT_RXFCS, 559 TSI108_STAT_CARRY1_RXFCS, TSI108_STAT_RXFCS_CARRY, 560 &data->rx_fcs); 561 562 data->tmpstats.rx_frame_errors += 563 tsi108_read_stat(data, TSI108_STAT_RXFRAG, 564 TSI108_STAT_CARRY1_RXFRAG, 565 TSI108_STAT_RXFRAG_CARRY, &data->rx_short_fcs); 566 567 data->tmpstats.rx_missed_errors = 568 tsi108_read_stat(data, TSI108_STAT_RXDROP, 569 TSI108_STAT_CARRY1_RXDROP, 570 TSI108_STAT_RXDROP_CARRY, 571 &data->stats.rx_missed_errors); 572 573 /* These three are maintained by software. */ 574 data->tmpstats.rx_fifo_errors = data->stats.rx_fifo_errors; 575 data->tmpstats.rx_crc_errors = data->stats.rx_crc_errors; 576 577 data->tmpstats.tx_aborted_errors = 578 tsi108_read_stat(data, TSI108_STAT_TXEXDEF, 579 TSI108_STAT_CARRY2_TXEXDEF, 580 TSI108_STAT_TXEXDEF_CARRY, 581 &data->stats.tx_aborted_errors); 582 583 data->tmpstats.tx_aborted_errors += 584 tsi108_read_stat(data, TSI108_STAT_TXPAUSEDROP, 585 TSI108_STAT_CARRY2_TXPAUSE, 586 TSI108_STAT_TXPAUSEDROP_CARRY, 587 &data->tx_pause_drop); 588 589 data->tmpstats.tx_aborted_errors += excol; 590 591 data->tmpstats.tx_errors = data->tmpstats.tx_aborted_errors; 592 data->tmpstats.rx_errors = data->tmpstats.rx_length_errors + 593 data->tmpstats.rx_crc_errors + 594 data->tmpstats.rx_frame_errors + 595 data->tmpstats.rx_fifo_errors + data->tmpstats.rx_missed_errors; 596 597 spin_unlock_irq(&data->misclock); 598 return &data->tmpstats; 599 } 600 601 static void tsi108_restart_rx(struct tsi108_prv_data * data, struct net_device *dev) 602 { 603 TSI_WRITE(TSI108_EC_RXQ_PTRHIGH, 604 TSI108_EC_RXQ_PTRHIGH_VALID); 605 606 TSI_WRITE(TSI108_EC_RXCTRL, TSI108_EC_RXCTRL_GO 607 | TSI108_EC_RXCTRL_QUEUE0); 608 } 609 610 static void tsi108_restart_tx(struct tsi108_prv_data * data) 611 { 612 TSI_WRITE(TSI108_EC_TXQ_PTRHIGH, 613 TSI108_EC_TXQ_PTRHIGH_VALID); 614 615 TSI_WRITE(TSI108_EC_TXCTRL, TSI108_EC_TXCTRL_IDLEINT | 616 TSI108_EC_TXCTRL_GO | TSI108_EC_TXCTRL_QUEUE0); 617 } 618 619 /* txlock must be held by caller, with IRQs disabled, and 620 * with permission to re-enable them when the lock is dropped. 621 */ 622 static void tsi108_complete_tx(struct net_device *dev) 623 { 624 struct tsi108_prv_data *data = netdev_priv(dev); 625 int tx; 626 struct sk_buff *skb; 627 int release = 0; 628 629 while (!data->txfree || data->txhead != data->txtail) { 630 tx = data->txtail; 631 632 if (data->txring[tx].misc & TSI108_TX_OWN) 633 break; 634 635 skb = data->txskbs[tx]; 636 637 if (!(data->txring[tx].misc & TSI108_TX_OK)) 638 printk("%s: bad tx packet, misc %x\n", 639 dev->name, data->txring[tx].misc); 640 641 data->txtail = (data->txtail + 1) % TSI108_TXRING_LEN; 642 data->txfree++; 643 644 if (data->txring[tx].misc & TSI108_TX_EOF) { 645 dev_kfree_skb_any(skb); 646 release++; 647 } 648 } 649 650 if (release) { 651 if (is_valid_ether_addr(dev->dev_addr) && data->link_up) 652 netif_wake_queue(dev); 653 } 654 } 655 656 static int tsi108_send_packet(struct sk_buff * skb, struct net_device *dev) 657 { 658 struct tsi108_prv_data *data = netdev_priv(dev); 659 int frags = skb_shinfo(skb)->nr_frags + 1; 660 int i; 661 662 if (!data->phy_ok && net_ratelimit()) 663 printk(KERN_ERR "%s: Transmit while PHY is down!\n", dev->name); 664 665 if (!data->link_up) { 666 printk(KERN_ERR "%s: Transmit while link is down!\n", 667 dev->name); 668 netif_stop_queue(dev); 669 return NETDEV_TX_BUSY; 670 } 671 672 if (data->txfree < MAX_SKB_FRAGS + 1) { 673 netif_stop_queue(dev); 674 675 if (net_ratelimit()) 676 printk(KERN_ERR "%s: Transmit with full tx ring!\n", 677 dev->name); 678 return NETDEV_TX_BUSY; 679 } 680 681 if (data->txfree - frags < MAX_SKB_FRAGS + 1) { 682 netif_stop_queue(dev); 683 } 684 685 spin_lock_irq(&data->txlock); 686 687 for (i = 0; i < frags; i++) { 688 int misc = 0; 689 int tx = data->txhead; 690 691 /* This is done to mark every TSI108_TX_INT_FREQ tx buffers with 692 * the interrupt bit. TX descriptor-complete interrupts are 693 * enabled when the queue fills up, and masked when there is 694 * still free space. This way, when saturating the outbound 695 * link, the tx interrupts are kept to a reasonable level. 696 * When the queue is not full, reclamation of skbs still occurs 697 * as new packets are transmitted, or on a queue-empty 698 * interrupt. 699 */ 700 701 if ((tx % TSI108_TX_INT_FREQ == 0) && 702 ((TSI108_TXRING_LEN - data->txfree) >= TSI108_TX_INT_FREQ)) 703 misc = TSI108_TX_INT; 704 705 data->txskbs[tx] = skb; 706 707 if (i == 0) { 708 data->txring[tx].buf0 = dma_map_single(&data->pdev->dev, 709 skb->data, skb_headlen(skb), 710 DMA_TO_DEVICE); 711 data->txring[tx].len = skb_headlen(skb); 712 misc |= TSI108_TX_SOF; 713 } else { 714 const skb_frag_t *frag = &skb_shinfo(skb)->frags[i - 1]; 715 716 data->txring[tx].buf0 = 717 skb_frag_dma_map(&data->pdev->dev, frag, 718 0, skb_frag_size(frag), 719 DMA_TO_DEVICE); 720 data->txring[tx].len = skb_frag_size(frag); 721 } 722 723 if (i == frags - 1) 724 misc |= TSI108_TX_EOF; 725 726 if (netif_msg_pktdata(data)) { 727 int i; 728 printk("%s: Tx Frame contents (%d)\n", dev->name, 729 skb->len); 730 for (i = 0; i < skb->len; i++) 731 printk(" %2.2x", skb->data[i]); 732 printk(".\n"); 733 } 734 data->txring[tx].misc = misc | TSI108_TX_OWN; 735 736 data->txhead = (data->txhead + 1) % TSI108_TXRING_LEN; 737 data->txfree--; 738 } 739 740 tsi108_complete_tx(dev); 741 742 /* This must be done after the check for completed tx descriptors, 743 * so that the tail pointer is correct. 744 */ 745 746 if (!(TSI_READ(TSI108_EC_TXSTAT) & TSI108_EC_TXSTAT_QUEUE0)) 747 tsi108_restart_tx(data); 748 749 spin_unlock_irq(&data->txlock); 750 return NETDEV_TX_OK; 751 } 752 753 static int tsi108_complete_rx(struct net_device *dev, int budget) 754 { 755 struct tsi108_prv_data *data = netdev_priv(dev); 756 int done = 0; 757 758 while (data->rxfree && done != budget) { 759 int rx = data->rxtail; 760 struct sk_buff *skb; 761 762 if (data->rxring[rx].misc & TSI108_RX_OWN) 763 break; 764 765 skb = data->rxskbs[rx]; 766 data->rxtail = (data->rxtail + 1) % TSI108_RXRING_LEN; 767 data->rxfree--; 768 done++; 769 770 if (data->rxring[rx].misc & TSI108_RX_BAD) { 771 spin_lock_irq(&data->misclock); 772 773 if (data->rxring[rx].misc & TSI108_RX_CRC) 774 data->stats.rx_crc_errors++; 775 if (data->rxring[rx].misc & TSI108_RX_OVER) 776 data->stats.rx_fifo_errors++; 777 778 spin_unlock_irq(&data->misclock); 779 780 dev_kfree_skb_any(skb); 781 continue; 782 } 783 if (netif_msg_pktdata(data)) { 784 int i; 785 printk("%s: Rx Frame contents (%d)\n", 786 dev->name, data->rxring[rx].len); 787 for (i = 0; i < data->rxring[rx].len; i++) 788 printk(" %2.2x", skb->data[i]); 789 printk(".\n"); 790 } 791 792 skb_put(skb, data->rxring[rx].len); 793 skb->protocol = eth_type_trans(skb, dev); 794 netif_receive_skb(skb); 795 } 796 797 return done; 798 } 799 800 static int tsi108_refill_rx(struct net_device *dev, int budget) 801 { 802 struct tsi108_prv_data *data = netdev_priv(dev); 803 int done = 0; 804 805 while (data->rxfree != TSI108_RXRING_LEN && done != budget) { 806 int rx = data->rxhead; 807 struct sk_buff *skb; 808 809 skb = netdev_alloc_skb_ip_align(dev, TSI108_RXBUF_SIZE); 810 data->rxskbs[rx] = skb; 811 if (!skb) 812 break; 813 814 data->rxring[rx].buf0 = dma_map_single(&data->pdev->dev, 815 skb->data, TSI108_RX_SKB_SIZE, 816 DMA_FROM_DEVICE); 817 818 /* Sometimes the hardware sets blen to zero after packet 819 * reception, even though the manual says that it's only ever 820 * modified by the driver. 821 */ 822 823 data->rxring[rx].blen = TSI108_RX_SKB_SIZE; 824 data->rxring[rx].misc = TSI108_RX_OWN | TSI108_RX_INT; 825 826 data->rxhead = (data->rxhead + 1) % TSI108_RXRING_LEN; 827 data->rxfree++; 828 done++; 829 } 830 831 if (done != 0 && !(TSI_READ(TSI108_EC_RXSTAT) & 832 TSI108_EC_RXSTAT_QUEUE0)) 833 tsi108_restart_rx(data, dev); 834 835 return done; 836 } 837 838 static int tsi108_poll(struct napi_struct *napi, int budget) 839 { 840 struct tsi108_prv_data *data = container_of(napi, struct tsi108_prv_data, napi); 841 struct net_device *dev = data->dev; 842 u32 estat = TSI_READ(TSI108_EC_RXESTAT); 843 u32 intstat = TSI_READ(TSI108_EC_INTSTAT); 844 int num_received = 0, num_filled = 0; 845 846 intstat &= TSI108_INT_RXQUEUE0 | TSI108_INT_RXTHRESH | 847 TSI108_INT_RXOVERRUN | TSI108_INT_RXERROR | TSI108_INT_RXWAIT; 848 849 TSI_WRITE(TSI108_EC_RXESTAT, estat); 850 TSI_WRITE(TSI108_EC_INTSTAT, intstat); 851 852 if (data->rxpending || (estat & TSI108_EC_RXESTAT_Q0_DESCINT)) 853 num_received = tsi108_complete_rx(dev, budget); 854 855 /* This should normally fill no more slots than the number of 856 * packets received in tsi108_complete_rx(). The exception 857 * is when we previously ran out of memory for RX SKBs. In that 858 * case, it's helpful to obey the budget, not only so that the 859 * CPU isn't hogged, but so that memory (which may still be low) 860 * is not hogged by one device. 861 * 862 * A work unit is considered to be two SKBs to allow us to catch 863 * up when the ring has shrunk due to out-of-memory but we're 864 * still removing the full budget's worth of packets each time. 865 */ 866 867 if (data->rxfree < TSI108_RXRING_LEN) 868 num_filled = tsi108_refill_rx(dev, budget * 2); 869 870 if (intstat & TSI108_INT_RXERROR) { 871 u32 err = TSI_READ(TSI108_EC_RXERR); 872 TSI_WRITE(TSI108_EC_RXERR, err); 873 874 if (err) { 875 if (net_ratelimit()) 876 printk(KERN_DEBUG "%s: RX error %x\n", 877 dev->name, err); 878 879 if (!(TSI_READ(TSI108_EC_RXSTAT) & 880 TSI108_EC_RXSTAT_QUEUE0)) 881 tsi108_restart_rx(data, dev); 882 } 883 } 884 885 if (intstat & TSI108_INT_RXOVERRUN) { 886 spin_lock_irq(&data->misclock); 887 data->stats.rx_fifo_errors++; 888 spin_unlock_irq(&data->misclock); 889 } 890 891 if (num_received < budget) { 892 data->rxpending = 0; 893 napi_complete_done(napi, num_received); 894 895 TSI_WRITE(TSI108_EC_INTMASK, 896 TSI_READ(TSI108_EC_INTMASK) 897 & ~(TSI108_INT_RXQUEUE0 898 | TSI108_INT_RXTHRESH | 899 TSI108_INT_RXOVERRUN | 900 TSI108_INT_RXERROR | 901 TSI108_INT_RXWAIT)); 902 } else { 903 data->rxpending = 1; 904 } 905 906 return num_received; 907 } 908 909 static void tsi108_rx_int(struct net_device *dev) 910 { 911 struct tsi108_prv_data *data = netdev_priv(dev); 912 913 /* A race could cause dev to already be scheduled, so it's not an 914 * error if that happens (and interrupts shouldn't be re-masked, 915 * because that can cause harmful races, if poll has already 916 * unmasked them but not cleared LINK_STATE_SCHED). 917 * 918 * This can happen if this code races with tsi108_poll(), which masks 919 * the interrupts after tsi108_irq_one() read the mask, but before 920 * napi_schedule is called. It could also happen due to calls 921 * from tsi108_check_rxring(). 922 */ 923 924 if (napi_schedule_prep(&data->napi)) { 925 /* Mask, rather than ack, the receive interrupts. The ack 926 * will happen in tsi108_poll(). 927 */ 928 929 TSI_WRITE(TSI108_EC_INTMASK, 930 TSI_READ(TSI108_EC_INTMASK) | 931 TSI108_INT_RXQUEUE0 932 | TSI108_INT_RXTHRESH | 933 TSI108_INT_RXOVERRUN | TSI108_INT_RXERROR | 934 TSI108_INT_RXWAIT); 935 __napi_schedule(&data->napi); 936 } else { 937 if (!netif_running(dev)) { 938 /* This can happen if an interrupt occurs while the 939 * interface is being brought down, as the START 940 * bit is cleared before the stop function is called. 941 * 942 * In this case, the interrupts must be masked, or 943 * they will continue indefinitely. 944 * 945 * There's a race here if the interface is brought down 946 * and then up in rapid succession, as the device could 947 * be made running after the above check and before 948 * the masking below. This will only happen if the IRQ 949 * thread has a lower priority than the task brining 950 * up the interface. Fixing this race would likely 951 * require changes in generic code. 952 */ 953 954 TSI_WRITE(TSI108_EC_INTMASK, 955 TSI_READ 956 (TSI108_EC_INTMASK) | 957 TSI108_INT_RXQUEUE0 | 958 TSI108_INT_RXTHRESH | 959 TSI108_INT_RXOVERRUN | 960 TSI108_INT_RXERROR | 961 TSI108_INT_RXWAIT); 962 } 963 } 964 } 965 966 /* If the RX ring has run out of memory, try periodically 967 * to allocate some more, as otherwise poll would never 968 * get called (apart from the initial end-of-queue condition). 969 * 970 * This is called once per second (by default) from the thread. 971 */ 972 973 static void tsi108_check_rxring(struct net_device *dev) 974 { 975 struct tsi108_prv_data *data = netdev_priv(dev); 976 977 /* A poll is scheduled, as opposed to caling tsi108_refill_rx 978 * directly, so as to keep the receive path single-threaded 979 * (and thus not needing a lock). 980 */ 981 982 if (netif_running(dev) && data->rxfree < TSI108_RXRING_LEN / 4) 983 tsi108_rx_int(dev); 984 } 985 986 static void tsi108_tx_int(struct net_device *dev) 987 { 988 struct tsi108_prv_data *data = netdev_priv(dev); 989 u32 estat = TSI_READ(TSI108_EC_TXESTAT); 990 991 TSI_WRITE(TSI108_EC_TXESTAT, estat); 992 TSI_WRITE(TSI108_EC_INTSTAT, TSI108_INT_TXQUEUE0 | 993 TSI108_INT_TXIDLE | TSI108_INT_TXERROR); 994 if (estat & TSI108_EC_TXESTAT_Q0_ERR) { 995 u32 err = TSI_READ(TSI108_EC_TXERR); 996 TSI_WRITE(TSI108_EC_TXERR, err); 997 998 if (err && net_ratelimit()) 999 printk(KERN_ERR "%s: TX error %x\n", dev->name, err); 1000 } 1001 1002 if (estat & (TSI108_EC_TXESTAT_Q0_DESCINT | TSI108_EC_TXESTAT_Q0_EOQ)) { 1003 spin_lock(&data->txlock); 1004 tsi108_complete_tx(dev); 1005 spin_unlock(&data->txlock); 1006 } 1007 } 1008 1009 1010 static irqreturn_t tsi108_irq(int irq, void *dev_id) 1011 { 1012 struct net_device *dev = dev_id; 1013 struct tsi108_prv_data *data = netdev_priv(dev); 1014 u32 stat = TSI_READ(TSI108_EC_INTSTAT); 1015 1016 if (!(stat & TSI108_INT_ANY)) 1017 return IRQ_NONE; /* Not our interrupt */ 1018 1019 stat &= ~TSI_READ(TSI108_EC_INTMASK); 1020 1021 if (stat & (TSI108_INT_TXQUEUE0 | TSI108_INT_TXIDLE | 1022 TSI108_INT_TXERROR)) 1023 tsi108_tx_int(dev); 1024 if (stat & (TSI108_INT_RXQUEUE0 | TSI108_INT_RXTHRESH | 1025 TSI108_INT_RXWAIT | TSI108_INT_RXOVERRUN | 1026 TSI108_INT_RXERROR)) 1027 tsi108_rx_int(dev); 1028 1029 if (stat & TSI108_INT_SFN) { 1030 if (net_ratelimit()) 1031 printk(KERN_DEBUG "%s: SFN error\n", dev->name); 1032 TSI_WRITE(TSI108_EC_INTSTAT, TSI108_INT_SFN); 1033 } 1034 1035 if (stat & TSI108_INT_STATCARRY) { 1036 tsi108_stat_carry(dev); 1037 TSI_WRITE(TSI108_EC_INTSTAT, TSI108_INT_STATCARRY); 1038 } 1039 1040 return IRQ_HANDLED; 1041 } 1042 1043 static void tsi108_stop_ethernet(struct net_device *dev) 1044 { 1045 struct tsi108_prv_data *data = netdev_priv(dev); 1046 int i = 1000; 1047 /* Disable all TX and RX queues ... */ 1048 TSI_WRITE(TSI108_EC_TXCTRL, 0); 1049 TSI_WRITE(TSI108_EC_RXCTRL, 0); 1050 1051 /* ...and wait for them to become idle */ 1052 while(i--) { 1053 if(!(TSI_READ(TSI108_EC_TXSTAT) & TSI108_EC_TXSTAT_ACTIVE)) 1054 break; 1055 udelay(10); 1056 } 1057 i = 1000; 1058 while(i--){ 1059 if(!(TSI_READ(TSI108_EC_RXSTAT) & TSI108_EC_RXSTAT_ACTIVE)) 1060 return; 1061 udelay(10); 1062 } 1063 printk(KERN_ERR "%s function time out\n", __func__); 1064 } 1065 1066 static void tsi108_reset_ether(struct tsi108_prv_data * data) 1067 { 1068 TSI_WRITE(TSI108_MAC_CFG1, TSI108_MAC_CFG1_SOFTRST); 1069 udelay(100); 1070 TSI_WRITE(TSI108_MAC_CFG1, 0); 1071 1072 TSI_WRITE(TSI108_EC_PORTCTRL, TSI108_EC_PORTCTRL_STATRST); 1073 udelay(100); 1074 TSI_WRITE(TSI108_EC_PORTCTRL, 1075 TSI_READ(TSI108_EC_PORTCTRL) & 1076 ~TSI108_EC_PORTCTRL_STATRST); 1077 1078 TSI_WRITE(TSI108_EC_TXCFG, TSI108_EC_TXCFG_RST); 1079 udelay(100); 1080 TSI_WRITE(TSI108_EC_TXCFG, 1081 TSI_READ(TSI108_EC_TXCFG) & 1082 ~TSI108_EC_TXCFG_RST); 1083 1084 TSI_WRITE(TSI108_EC_RXCFG, TSI108_EC_RXCFG_RST); 1085 udelay(100); 1086 TSI_WRITE(TSI108_EC_RXCFG, 1087 TSI_READ(TSI108_EC_RXCFG) & 1088 ~TSI108_EC_RXCFG_RST); 1089 1090 TSI_WRITE(TSI108_MAC_MII_MGMT_CFG, 1091 TSI_READ(TSI108_MAC_MII_MGMT_CFG) | 1092 TSI108_MAC_MII_MGMT_RST); 1093 udelay(100); 1094 TSI_WRITE(TSI108_MAC_MII_MGMT_CFG, 1095 (TSI_READ(TSI108_MAC_MII_MGMT_CFG) & 1096 ~(TSI108_MAC_MII_MGMT_RST | 1097 TSI108_MAC_MII_MGMT_CLK)) | 0x07); 1098 } 1099 1100 static int tsi108_get_mac(struct net_device *dev) 1101 { 1102 struct tsi108_prv_data *data = netdev_priv(dev); 1103 u32 word1 = TSI_READ(TSI108_MAC_ADDR1); 1104 u32 word2 = TSI_READ(TSI108_MAC_ADDR2); 1105 1106 /* Note that the octets are reversed from what the manual says, 1107 * producing an even weirder ordering... 1108 */ 1109 if (word2 == 0 && word1 == 0) { 1110 dev->dev_addr[0] = 0x00; 1111 dev->dev_addr[1] = 0x06; 1112 dev->dev_addr[2] = 0xd2; 1113 dev->dev_addr[3] = 0x00; 1114 dev->dev_addr[4] = 0x00; 1115 if (0x8 == data->phy) 1116 dev->dev_addr[5] = 0x01; 1117 else 1118 dev->dev_addr[5] = 0x02; 1119 1120 word2 = (dev->dev_addr[0] << 16) | (dev->dev_addr[1] << 24); 1121 1122 word1 = (dev->dev_addr[2] << 0) | (dev->dev_addr[3] << 8) | 1123 (dev->dev_addr[4] << 16) | (dev->dev_addr[5] << 24); 1124 1125 TSI_WRITE(TSI108_MAC_ADDR1, word1); 1126 TSI_WRITE(TSI108_MAC_ADDR2, word2); 1127 } else { 1128 dev->dev_addr[0] = (word2 >> 16) & 0xff; 1129 dev->dev_addr[1] = (word2 >> 24) & 0xff; 1130 dev->dev_addr[2] = (word1 >> 0) & 0xff; 1131 dev->dev_addr[3] = (word1 >> 8) & 0xff; 1132 dev->dev_addr[4] = (word1 >> 16) & 0xff; 1133 dev->dev_addr[5] = (word1 >> 24) & 0xff; 1134 } 1135 1136 if (!is_valid_ether_addr(dev->dev_addr)) { 1137 printk(KERN_ERR 1138 "%s: Invalid MAC address. word1: %08x, word2: %08x\n", 1139 dev->name, word1, word2); 1140 return -EINVAL; 1141 } 1142 1143 return 0; 1144 } 1145 1146 static int tsi108_set_mac(struct net_device *dev, void *addr) 1147 { 1148 struct tsi108_prv_data *data = netdev_priv(dev); 1149 u32 word1, word2; 1150 int i; 1151 1152 if (!is_valid_ether_addr(addr)) 1153 return -EADDRNOTAVAIL; 1154 1155 for (i = 0; i < 6; i++) 1156 /* +2 is for the offset of the HW addr type */ 1157 dev->dev_addr[i] = ((unsigned char *)addr)[i + 2]; 1158 1159 word2 = (dev->dev_addr[0] << 16) | (dev->dev_addr[1] << 24); 1160 1161 word1 = (dev->dev_addr[2] << 0) | (dev->dev_addr[3] << 8) | 1162 (dev->dev_addr[4] << 16) | (dev->dev_addr[5] << 24); 1163 1164 spin_lock_irq(&data->misclock); 1165 TSI_WRITE(TSI108_MAC_ADDR1, word1); 1166 TSI_WRITE(TSI108_MAC_ADDR2, word2); 1167 spin_lock(&data->txlock); 1168 1169 if (data->txfree && data->link_up) 1170 netif_wake_queue(dev); 1171 1172 spin_unlock(&data->txlock); 1173 spin_unlock_irq(&data->misclock); 1174 return 0; 1175 } 1176 1177 /* Protected by dev->xmit_lock. */ 1178 static void tsi108_set_rx_mode(struct net_device *dev) 1179 { 1180 struct tsi108_prv_data *data = netdev_priv(dev); 1181 u32 rxcfg = TSI_READ(TSI108_EC_RXCFG); 1182 1183 if (dev->flags & IFF_PROMISC) { 1184 rxcfg &= ~(TSI108_EC_RXCFG_UC_HASH | TSI108_EC_RXCFG_MC_HASH); 1185 rxcfg |= TSI108_EC_RXCFG_UFE | TSI108_EC_RXCFG_MFE; 1186 goto out; 1187 } 1188 1189 rxcfg &= ~(TSI108_EC_RXCFG_UFE | TSI108_EC_RXCFG_MFE); 1190 1191 if (dev->flags & IFF_ALLMULTI || !netdev_mc_empty(dev)) { 1192 int i; 1193 struct netdev_hw_addr *ha; 1194 rxcfg |= TSI108_EC_RXCFG_MFE | TSI108_EC_RXCFG_MC_HASH; 1195 1196 memset(data->mc_hash, 0, sizeof(data->mc_hash)); 1197 1198 netdev_for_each_mc_addr(ha, dev) { 1199 u32 hash, crc; 1200 1201 crc = ether_crc(6, ha->addr); 1202 hash = crc >> 23; 1203 __set_bit(hash, &data->mc_hash[0]); 1204 } 1205 1206 TSI_WRITE(TSI108_EC_HASHADDR, 1207 TSI108_EC_HASHADDR_AUTOINC | 1208 TSI108_EC_HASHADDR_MCAST); 1209 1210 for (i = 0; i < 16; i++) { 1211 /* The manual says that the hardware may drop 1212 * back-to-back writes to the data register. 1213 */ 1214 udelay(1); 1215 TSI_WRITE(TSI108_EC_HASHDATA, 1216 data->mc_hash[i]); 1217 } 1218 } 1219 1220 out: 1221 TSI_WRITE(TSI108_EC_RXCFG, rxcfg); 1222 } 1223 1224 static void tsi108_init_phy(struct net_device *dev) 1225 { 1226 struct tsi108_prv_data *data = netdev_priv(dev); 1227 u32 i = 0; 1228 u16 phyval = 0; 1229 unsigned long flags; 1230 1231 spin_lock_irqsave(&phy_lock, flags); 1232 1233 tsi108_write_mii(data, MII_BMCR, BMCR_RESET); 1234 while (--i) { 1235 if(!(tsi108_read_mii(data, MII_BMCR) & BMCR_RESET)) 1236 break; 1237 udelay(10); 1238 } 1239 if (i == 0) 1240 printk(KERN_ERR "%s function time out\n", __func__); 1241 1242 if (data->phy_type == TSI108_PHY_BCM54XX) { 1243 tsi108_write_mii(data, 0x09, 0x0300); 1244 tsi108_write_mii(data, 0x10, 0x1020); 1245 tsi108_write_mii(data, 0x1c, 0x8c00); 1246 } 1247 1248 tsi108_write_mii(data, 1249 MII_BMCR, 1250 BMCR_ANENABLE | BMCR_ANRESTART); 1251 while (tsi108_read_mii(data, MII_BMCR) & BMCR_ANRESTART) 1252 cpu_relax(); 1253 1254 /* Set G/MII mode and receive clock select in TBI control #2. The 1255 * second port won't work if this isn't done, even though we don't 1256 * use TBI mode. 1257 */ 1258 1259 tsi108_write_tbi(data, 0x11, 0x30); 1260 1261 /* FIXME: It seems to take more than 2 back-to-back reads to the 1262 * PHY_STAT register before the link up status bit is set. 1263 */ 1264 1265 data->link_up = 0; 1266 1267 while (!((phyval = tsi108_read_mii(data, MII_BMSR)) & 1268 BMSR_LSTATUS)) { 1269 if (i++ > (MII_READ_DELAY / 10)) { 1270 break; 1271 } 1272 spin_unlock_irqrestore(&phy_lock, flags); 1273 msleep(10); 1274 spin_lock_irqsave(&phy_lock, flags); 1275 } 1276 1277 data->mii_if.supports_gmii = mii_check_gmii_support(&data->mii_if); 1278 printk(KERN_DEBUG "PHY_STAT reg contains %08x\n", phyval); 1279 data->phy_ok = 1; 1280 data->init_media = 1; 1281 spin_unlock_irqrestore(&phy_lock, flags); 1282 } 1283 1284 static void tsi108_kill_phy(struct net_device *dev) 1285 { 1286 struct tsi108_prv_data *data = netdev_priv(dev); 1287 unsigned long flags; 1288 1289 spin_lock_irqsave(&phy_lock, flags); 1290 tsi108_write_mii(data, MII_BMCR, BMCR_PDOWN); 1291 data->phy_ok = 0; 1292 spin_unlock_irqrestore(&phy_lock, flags); 1293 } 1294 1295 static int tsi108_open(struct net_device *dev) 1296 { 1297 int i; 1298 struct tsi108_prv_data *data = netdev_priv(dev); 1299 unsigned int rxring_size = TSI108_RXRING_LEN * sizeof(rx_desc); 1300 unsigned int txring_size = TSI108_TXRING_LEN * sizeof(tx_desc); 1301 1302 i = request_irq(data->irq_num, tsi108_irq, 0, dev->name, dev); 1303 if (i != 0) { 1304 printk(KERN_ERR "tsi108_eth%d: Could not allocate IRQ%d.\n", 1305 data->id, data->irq_num); 1306 return i; 1307 } else { 1308 dev->irq = data->irq_num; 1309 printk(KERN_NOTICE 1310 "tsi108_open : Port %d Assigned IRQ %d to %s\n", 1311 data->id, dev->irq, dev->name); 1312 } 1313 1314 data->rxring = dma_zalloc_coherent(&data->pdev->dev, rxring_size, 1315 &data->rxdma, GFP_KERNEL); 1316 if (!data->rxring) 1317 return -ENOMEM; 1318 1319 data->txring = dma_zalloc_coherent(&data->pdev->dev, txring_size, 1320 &data->txdma, GFP_KERNEL); 1321 if (!data->txring) { 1322 dma_free_coherent(&data->pdev->dev, rxring_size, data->rxring, 1323 data->rxdma); 1324 return -ENOMEM; 1325 } 1326 1327 for (i = 0; i < TSI108_RXRING_LEN; i++) { 1328 data->rxring[i].next0 = data->rxdma + (i + 1) * sizeof(rx_desc); 1329 data->rxring[i].blen = TSI108_RXBUF_SIZE; 1330 data->rxring[i].vlan = 0; 1331 } 1332 1333 data->rxring[TSI108_RXRING_LEN - 1].next0 = data->rxdma; 1334 1335 data->rxtail = 0; 1336 data->rxhead = 0; 1337 1338 for (i = 0; i < TSI108_RXRING_LEN; i++) { 1339 struct sk_buff *skb; 1340 1341 skb = netdev_alloc_skb_ip_align(dev, TSI108_RXBUF_SIZE); 1342 if (!skb) { 1343 /* Bah. No memory for now, but maybe we'll get 1344 * some more later. 1345 * For now, we'll live with the smaller ring. 1346 */ 1347 printk(KERN_WARNING 1348 "%s: Could only allocate %d receive skb(s).\n", 1349 dev->name, i); 1350 data->rxhead = i; 1351 break; 1352 } 1353 1354 data->rxskbs[i] = skb; 1355 data->rxring[i].buf0 = virt_to_phys(data->rxskbs[i]->data); 1356 data->rxring[i].misc = TSI108_RX_OWN | TSI108_RX_INT; 1357 } 1358 1359 data->rxfree = i; 1360 TSI_WRITE(TSI108_EC_RXQ_PTRLOW, data->rxdma); 1361 1362 for (i = 0; i < TSI108_TXRING_LEN; i++) { 1363 data->txring[i].next0 = data->txdma + (i + 1) * sizeof(tx_desc); 1364 data->txring[i].misc = 0; 1365 } 1366 1367 data->txring[TSI108_TXRING_LEN - 1].next0 = data->txdma; 1368 data->txtail = 0; 1369 data->txhead = 0; 1370 data->txfree = TSI108_TXRING_LEN; 1371 TSI_WRITE(TSI108_EC_TXQ_PTRLOW, data->txdma); 1372 tsi108_init_phy(dev); 1373 1374 napi_enable(&data->napi); 1375 1376 timer_setup(&data->timer, tsi108_timed_checker, 0); 1377 mod_timer(&data->timer, jiffies + 1); 1378 1379 tsi108_restart_rx(data, dev); 1380 1381 TSI_WRITE(TSI108_EC_INTSTAT, ~0); 1382 1383 TSI_WRITE(TSI108_EC_INTMASK, 1384 ~(TSI108_INT_TXQUEUE0 | TSI108_INT_RXERROR | 1385 TSI108_INT_RXTHRESH | TSI108_INT_RXQUEUE0 | 1386 TSI108_INT_RXOVERRUN | TSI108_INT_RXWAIT | 1387 TSI108_INT_SFN | TSI108_INT_STATCARRY)); 1388 1389 TSI_WRITE(TSI108_MAC_CFG1, 1390 TSI108_MAC_CFG1_RXEN | TSI108_MAC_CFG1_TXEN); 1391 netif_start_queue(dev); 1392 return 0; 1393 } 1394 1395 static int tsi108_close(struct net_device *dev) 1396 { 1397 struct tsi108_prv_data *data = netdev_priv(dev); 1398 1399 netif_stop_queue(dev); 1400 napi_disable(&data->napi); 1401 1402 del_timer_sync(&data->timer); 1403 1404 tsi108_stop_ethernet(dev); 1405 tsi108_kill_phy(dev); 1406 TSI_WRITE(TSI108_EC_INTMASK, ~0); 1407 TSI_WRITE(TSI108_MAC_CFG1, 0); 1408 1409 /* Check for any pending TX packets, and drop them. */ 1410 1411 while (!data->txfree || data->txhead != data->txtail) { 1412 int tx = data->txtail; 1413 struct sk_buff *skb; 1414 skb = data->txskbs[tx]; 1415 data->txtail = (data->txtail + 1) % TSI108_TXRING_LEN; 1416 data->txfree++; 1417 dev_kfree_skb(skb); 1418 } 1419 1420 free_irq(data->irq_num, dev); 1421 1422 /* Discard the RX ring. */ 1423 1424 while (data->rxfree) { 1425 int rx = data->rxtail; 1426 struct sk_buff *skb; 1427 1428 skb = data->rxskbs[rx]; 1429 data->rxtail = (data->rxtail + 1) % TSI108_RXRING_LEN; 1430 data->rxfree--; 1431 dev_kfree_skb(skb); 1432 } 1433 1434 dma_free_coherent(&data->pdev->dev, 1435 TSI108_RXRING_LEN * sizeof(rx_desc), 1436 data->rxring, data->rxdma); 1437 dma_free_coherent(&data->pdev->dev, 1438 TSI108_TXRING_LEN * sizeof(tx_desc), 1439 data->txring, data->txdma); 1440 1441 return 0; 1442 } 1443 1444 static void tsi108_init_mac(struct net_device *dev) 1445 { 1446 struct tsi108_prv_data *data = netdev_priv(dev); 1447 1448 TSI_WRITE(TSI108_MAC_CFG2, TSI108_MAC_CFG2_DFLT_PREAMBLE | 1449 TSI108_MAC_CFG2_PADCRC); 1450 1451 TSI_WRITE(TSI108_EC_TXTHRESH, 1452 (192 << TSI108_EC_TXTHRESH_STARTFILL) | 1453 (192 << TSI108_EC_TXTHRESH_STOPFILL)); 1454 1455 TSI_WRITE(TSI108_STAT_CARRYMASK1, 1456 ~(TSI108_STAT_CARRY1_RXBYTES | 1457 TSI108_STAT_CARRY1_RXPKTS | 1458 TSI108_STAT_CARRY1_RXFCS | 1459 TSI108_STAT_CARRY1_RXMCAST | 1460 TSI108_STAT_CARRY1_RXALIGN | 1461 TSI108_STAT_CARRY1_RXLENGTH | 1462 TSI108_STAT_CARRY1_RXRUNT | 1463 TSI108_STAT_CARRY1_RXJUMBO | 1464 TSI108_STAT_CARRY1_RXFRAG | 1465 TSI108_STAT_CARRY1_RXJABBER | 1466 TSI108_STAT_CARRY1_RXDROP)); 1467 1468 TSI_WRITE(TSI108_STAT_CARRYMASK2, 1469 ~(TSI108_STAT_CARRY2_TXBYTES | 1470 TSI108_STAT_CARRY2_TXPKTS | 1471 TSI108_STAT_CARRY2_TXEXDEF | 1472 TSI108_STAT_CARRY2_TXEXCOL | 1473 TSI108_STAT_CARRY2_TXTCOL | 1474 TSI108_STAT_CARRY2_TXPAUSE)); 1475 1476 TSI_WRITE(TSI108_EC_PORTCTRL, TSI108_EC_PORTCTRL_STATEN); 1477 TSI_WRITE(TSI108_MAC_CFG1, 0); 1478 1479 TSI_WRITE(TSI108_EC_RXCFG, 1480 TSI108_EC_RXCFG_SE | TSI108_EC_RXCFG_BFE); 1481 1482 TSI_WRITE(TSI108_EC_TXQ_CFG, TSI108_EC_TXQ_CFG_DESC_INT | 1483 TSI108_EC_TXQ_CFG_EOQ_OWN_INT | 1484 TSI108_EC_TXQ_CFG_WSWP | (TSI108_PBM_PORT << 1485 TSI108_EC_TXQ_CFG_SFNPORT)); 1486 1487 TSI_WRITE(TSI108_EC_RXQ_CFG, TSI108_EC_RXQ_CFG_DESC_INT | 1488 TSI108_EC_RXQ_CFG_EOQ_OWN_INT | 1489 TSI108_EC_RXQ_CFG_WSWP | (TSI108_PBM_PORT << 1490 TSI108_EC_RXQ_CFG_SFNPORT)); 1491 1492 TSI_WRITE(TSI108_EC_TXQ_BUFCFG, 1493 TSI108_EC_TXQ_BUFCFG_BURST256 | 1494 TSI108_EC_TXQ_BUFCFG_BSWP | (TSI108_PBM_PORT << 1495 TSI108_EC_TXQ_BUFCFG_SFNPORT)); 1496 1497 TSI_WRITE(TSI108_EC_RXQ_BUFCFG, 1498 TSI108_EC_RXQ_BUFCFG_BURST256 | 1499 TSI108_EC_RXQ_BUFCFG_BSWP | (TSI108_PBM_PORT << 1500 TSI108_EC_RXQ_BUFCFG_SFNPORT)); 1501 1502 TSI_WRITE(TSI108_EC_INTMASK, ~0); 1503 } 1504 1505 static int tsi108_get_link_ksettings(struct net_device *dev, 1506 struct ethtool_link_ksettings *cmd) 1507 { 1508 struct tsi108_prv_data *data = netdev_priv(dev); 1509 unsigned long flags; 1510 1511 spin_lock_irqsave(&data->txlock, flags); 1512 mii_ethtool_get_link_ksettings(&data->mii_if, cmd); 1513 spin_unlock_irqrestore(&data->txlock, flags); 1514 1515 return 0; 1516 } 1517 1518 static int tsi108_set_link_ksettings(struct net_device *dev, 1519 const struct ethtool_link_ksettings *cmd) 1520 { 1521 struct tsi108_prv_data *data = netdev_priv(dev); 1522 unsigned long flags; 1523 int rc; 1524 1525 spin_lock_irqsave(&data->txlock, flags); 1526 rc = mii_ethtool_set_link_ksettings(&data->mii_if, cmd); 1527 spin_unlock_irqrestore(&data->txlock, flags); 1528 1529 return rc; 1530 } 1531 1532 static int tsi108_do_ioctl(struct net_device *dev, struct ifreq *rq, int cmd) 1533 { 1534 struct tsi108_prv_data *data = netdev_priv(dev); 1535 if (!netif_running(dev)) 1536 return -EINVAL; 1537 return generic_mii_ioctl(&data->mii_if, if_mii(rq), cmd, NULL); 1538 } 1539 1540 static const struct ethtool_ops tsi108_ethtool_ops = { 1541 .get_link = ethtool_op_get_link, 1542 .get_link_ksettings = tsi108_get_link_ksettings, 1543 .set_link_ksettings = tsi108_set_link_ksettings, 1544 }; 1545 1546 static const struct net_device_ops tsi108_netdev_ops = { 1547 .ndo_open = tsi108_open, 1548 .ndo_stop = tsi108_close, 1549 .ndo_start_xmit = tsi108_send_packet, 1550 .ndo_set_rx_mode = tsi108_set_rx_mode, 1551 .ndo_get_stats = tsi108_get_stats, 1552 .ndo_do_ioctl = tsi108_do_ioctl, 1553 .ndo_set_mac_address = tsi108_set_mac, 1554 .ndo_validate_addr = eth_validate_addr, 1555 }; 1556 1557 static int 1558 tsi108_init_one(struct platform_device *pdev) 1559 { 1560 struct net_device *dev = NULL; 1561 struct tsi108_prv_data *data = NULL; 1562 hw_info *einfo; 1563 int err = 0; 1564 1565 einfo = dev_get_platdata(&pdev->dev); 1566 1567 if (NULL == einfo) { 1568 printk(KERN_ERR "tsi-eth %d: Missing additional data!\n", 1569 pdev->id); 1570 return -ENODEV; 1571 } 1572 1573 /* Create an ethernet device instance */ 1574 1575 dev = alloc_etherdev(sizeof(struct tsi108_prv_data)); 1576 if (!dev) 1577 return -ENOMEM; 1578 1579 printk("tsi108_eth%d: probe...\n", pdev->id); 1580 data = netdev_priv(dev); 1581 data->dev = dev; 1582 data->pdev = pdev; 1583 1584 pr_debug("tsi108_eth%d:regs:phyresgs:phy:irq_num=0x%x:0x%x:0x%x:0x%x\n", 1585 pdev->id, einfo->regs, einfo->phyregs, 1586 einfo->phy, einfo->irq_num); 1587 1588 data->regs = ioremap(einfo->regs, 0x400); 1589 if (NULL == data->regs) { 1590 err = -ENOMEM; 1591 goto regs_fail; 1592 } 1593 1594 data->phyregs = ioremap(einfo->phyregs, 0x400); 1595 if (NULL == data->phyregs) { 1596 err = -ENOMEM; 1597 goto phyregs_fail; 1598 } 1599 /* MII setup */ 1600 data->mii_if.dev = dev; 1601 data->mii_if.mdio_read = tsi108_mdio_read; 1602 data->mii_if.mdio_write = tsi108_mdio_write; 1603 data->mii_if.phy_id = einfo->phy; 1604 data->mii_if.phy_id_mask = 0x1f; 1605 data->mii_if.reg_num_mask = 0x1f; 1606 1607 data->phy = einfo->phy; 1608 data->phy_type = einfo->phy_type; 1609 data->irq_num = einfo->irq_num; 1610 data->id = pdev->id; 1611 netif_napi_add(dev, &data->napi, tsi108_poll, 64); 1612 dev->netdev_ops = &tsi108_netdev_ops; 1613 dev->ethtool_ops = &tsi108_ethtool_ops; 1614 1615 /* Apparently, the Linux networking code won't use scatter-gather 1616 * if the hardware doesn't do checksums. However, it's faster 1617 * to checksum in place and use SG, as (among other reasons) 1618 * the cache won't be dirtied (which then has to be flushed 1619 * before DMA). The checksumming is done by the driver (via 1620 * a new function skb_csum_dev() in net/core/skbuff.c). 1621 */ 1622 1623 dev->features = NETIF_F_HIGHDMA; 1624 1625 spin_lock_init(&data->txlock); 1626 spin_lock_init(&data->misclock); 1627 1628 tsi108_reset_ether(data); 1629 tsi108_kill_phy(dev); 1630 1631 if ((err = tsi108_get_mac(dev)) != 0) { 1632 printk(KERN_ERR "%s: Invalid MAC address. Please correct.\n", 1633 dev->name); 1634 goto register_fail; 1635 } 1636 1637 tsi108_init_mac(dev); 1638 err = register_netdev(dev); 1639 if (err) { 1640 printk(KERN_ERR "%s: Cannot register net device, aborting.\n", 1641 dev->name); 1642 goto register_fail; 1643 } 1644 1645 platform_set_drvdata(pdev, dev); 1646 printk(KERN_INFO "%s: Tsi108 Gigabit Ethernet, MAC: %pM\n", 1647 dev->name, dev->dev_addr); 1648 #ifdef DEBUG 1649 data->msg_enable = DEBUG; 1650 dump_eth_one(dev); 1651 #endif 1652 1653 return 0; 1654 1655 register_fail: 1656 iounmap(data->phyregs); 1657 1658 phyregs_fail: 1659 iounmap(data->regs); 1660 1661 regs_fail: 1662 free_netdev(dev); 1663 return err; 1664 } 1665 1666 /* There's no way to either get interrupts from the PHY when 1667 * something changes, or to have the Tsi108 automatically communicate 1668 * with the PHY to reconfigure itself. 1669 * 1670 * Thus, we have to do it using a timer. 1671 */ 1672 1673 static void tsi108_timed_checker(struct timer_list *t) 1674 { 1675 struct tsi108_prv_data *data = from_timer(data, t, timer); 1676 struct net_device *dev = data->dev; 1677 1678 tsi108_check_phy(dev); 1679 tsi108_check_rxring(dev); 1680 mod_timer(&data->timer, jiffies + CHECK_PHY_INTERVAL); 1681 } 1682 1683 static int tsi108_ether_remove(struct platform_device *pdev) 1684 { 1685 struct net_device *dev = platform_get_drvdata(pdev); 1686 struct tsi108_prv_data *priv = netdev_priv(dev); 1687 1688 unregister_netdev(dev); 1689 tsi108_stop_ethernet(dev); 1690 iounmap(priv->regs); 1691 iounmap(priv->phyregs); 1692 free_netdev(dev); 1693 1694 return 0; 1695 } 1696 module_platform_driver(tsi_eth_driver); 1697 1698 MODULE_AUTHOR("Tundra Semiconductor Corporation"); 1699 MODULE_DESCRIPTION("Tsi108 Gigabit Ethernet driver"); 1700 MODULE_LICENSE("GPL"); 1701 MODULE_ALIAS("platform:tsi-ethernet"); 1702