xref: /linux/drivers/net/ethernet/ti/icssg/icssg_prueth.h (revision bfb4a6c721517a11b277e8841f8a7a64b1b14b72)
1 /* SPDX-License-Identifier: GPL-2.0 */
2 /* Texas Instruments ICSSG Ethernet driver
3  *
4  * Copyright (C) 2018-2022 Texas Instruments Incorporated - https://www.ti.com/
5  *
6  */
7 
8 #ifndef __NET_TI_ICSSG_PRUETH_H
9 #define __NET_TI_ICSSG_PRUETH_H
10 
11 #include <linux/bpf.h>
12 #include <linux/bpf_trace.h>
13 #include <linux/etherdevice.h>
14 #include <linux/genalloc.h>
15 #include <linux/if_vlan.h>
16 #include <linux/if_hsr.h>
17 #include <linux/interrupt.h>
18 #include <linux/kernel.h>
19 #include <linux/mfd/syscon.h>
20 #include <linux/module.h>
21 #include <linux/mutex.h>
22 #include <linux/net_tstamp.h>
23 #include <linux/of.h>
24 #include <linux/of_irq.h>
25 #include <linux/of_mdio.h>
26 #include <linux/of_net.h>
27 #include <linux/of_platform.h>
28 #include <linux/phy.h>
29 #include <linux/remoteproc/pruss.h>
30 #include <linux/pruss_driver.h>
31 #include <linux/ptp_clock_kernel.h>
32 #include <linux/remoteproc.h>
33 
34 #include <linux/dma-mapping.h>
35 #include <linux/dma/ti-cppi5.h>
36 #include <linux/dma/k3-udma-glue.h>
37 
38 #include <net/devlink.h>
39 #include <net/xdp.h>
40 #include <net/page_pool/helpers.h>
41 
42 #include "icssg_config.h"
43 #include "icss_iep.h"
44 #include "icssg_switch_map.h"
45 
46 #define PRUETH_MAX_MTU          (2000 - ETH_HLEN - ETH_FCS_LEN)
47 #define PRUETH_MIN_PKT_SIZE     (VLAN_ETH_ZLEN)
48 #define PRUETH_MAX_PKT_SIZE     (PRUETH_MAX_MTU + ETH_HLEN + ETH_FCS_LEN)
49 
50 #define ICSS_SLICE0	0
51 #define ICSS_SLICE1	1
52 
53 #define ICSS_FW_PRU	0
54 #define ICSS_FW_RTU	1
55 
56 #define ICSSG_MAX_RFLOWS	8	/* per slice */
57 
58 #define ICSSG_NUM_PA_STATS	32
59 #define ICSSG_NUM_MIIG_STATS	60
60 /* Number of ICSSG related stats */
61 #define ICSSG_NUM_STATS (ICSSG_NUM_MIIG_STATS + ICSSG_NUM_PA_STATS)
62 #define ICSSG_NUM_STANDARD_STATS 31
63 #define ICSSG_NUM_ETHTOOL_STATS (ICSSG_NUM_STATS - ICSSG_NUM_STANDARD_STATS)
64 
65 #define IEP_DEFAULT_CYCLE_TIME_NS	1000000	/* 1 ms */
66 
67 #define PRUETH_UNDIRECTED_PKT_DST_TAG	0
68 #define PRUETH_UNDIRECTED_PKT_TAG_INS	BIT(30)
69 
70 /* Firmware status codes */
71 #define ICSS_HS_FW_READY 0x55555555
72 #define ICSS_HS_FW_DEAD 0xDEAD0000	/* lower 16 bits contain error code */
73 
74 /* Firmware command codes */
75 #define ICSS_HS_CMD_BUSY 0x40000000
76 #define ICSS_HS_CMD_DONE 0x80000000
77 #define ICSS_HS_CMD_CANCEL 0x10000000
78 
79 /* Firmware commands */
80 #define ICSS_CMD_SPAD 0x20
81 #define ICSS_CMD_RXTX 0x10
82 #define ICSS_CMD_ADD_FDB 0x1
83 #define ICSS_CMD_DEL_FDB 0x2
84 #define ICSS_CMD_SET_RUN 0x4
85 #define ICSS_CMD_GET_FDB_SLOT 0x5
86 #define ICSS_CMD_ENABLE_VLAN 0x5
87 #define ICSS_CMD_DISABLE_VLAN 0x6
88 #define ICSS_CMD_ADD_FILTER 0x7
89 #define ICSS_CMD_ADD_MAC 0x8
90 
91 /* VLAN Filtering Related MACROs */
92 #define PRUETH_DFLT_VLAN_HSR	1
93 #define PRUETH_DFLT_VLAN_SW	1
94 #define PRUETH_DFLT_VLAN_MAC	0
95 #define MAX_VLAN_ID		256
96 
97 /* In switch mode there are 3 real ports i.e. 3 mac addrs.
98  * however Linux sees only the host side port. The other 2 ports
99  * are the switch ports.
100  * In emac mode there are 2 real ports i.e. 2 mac addrs.
101  * Linux sees both the ports.
102  */
103 enum prueth_port {
104 	PRUETH_PORT_HOST = 0,	/* host side port */
105 	PRUETH_PORT_MII0,	/* physical port RG/SG MII 0 */
106 	PRUETH_PORT_MII1,	/* physical port RG/SG MII 1 */
107 	PRUETH_PORT_INVALID,	/* Invalid prueth port */
108 };
109 
110 enum prueth_mac {
111 	PRUETH_MAC0 = 0,
112 	PRUETH_MAC1,
113 	PRUETH_NUM_MACS,
114 	PRUETH_MAC_INVALID,
115 };
116 
117 struct prueth_tx_chn {
118 	struct device *dma_dev;
119 	struct napi_struct napi_tx;
120 	struct k3_cppi_desc_pool *desc_pool;
121 	struct k3_udma_glue_tx_channel *tx_chn;
122 	struct prueth_emac *emac;
123 	u32 id;
124 	u32 descs_num;
125 	unsigned int irq;
126 	char name[32];
127 	struct hrtimer tx_hrtimer;
128 	unsigned long tx_pace_timeout_ns;
129 };
130 
131 struct prueth_rx_chn {
132 	struct device *dev;
133 	struct device *dma_dev;
134 	struct k3_cppi_desc_pool *desc_pool;
135 	struct k3_udma_glue_rx_channel *rx_chn;
136 	u32 descs_num;
137 	unsigned int irq[ICSSG_MAX_RFLOWS];	/* separate irq per flow */
138 	char name[32];
139 	struct page_pool *pg_pool;
140 	struct xdp_rxq_info xdp_rxq;
141 };
142 
143 enum prueth_swdata_type {
144 	PRUETH_SWDATA_INVALID = 0,
145 	PRUETH_SWDATA_SKB,
146 	PRUETH_SWDATA_PAGE,
147 	PRUETH_SWDATA_CMD,
148 	PRUETH_SWDATA_XDPF,
149 };
150 
151 struct prueth_swdata {
152 	enum prueth_swdata_type type;
153 	union prueth_data {
154 		struct sk_buff *skb;
155 		struct page *page;
156 		u32 cmd;
157 		struct xdp_frame *xdpf;
158 	} data;
159 };
160 
161 /* There are 4 Tx DMA channels, but the highest priority is CH3 (thread 3)
162  * and lower three are lower priority channels or threads.
163  */
164 #define PRUETH_MAX_TX_QUEUES	4
165 
166 #define PRUETH_MAX_TX_TS_REQUESTS	50 /* Max simultaneous TX_TS requests */
167 
168 /* XDP BPF state */
169 #define ICSSG_XDP_PASS           0
170 #define ICSSG_XDP_CONSUMED       BIT(0)
171 #define ICSSG_XDP_TX             BIT(1)
172 #define ICSSG_XDP_REDIR          BIT(2)
173 
174 /* Minimum coalesce time in usecs for both Tx and Rx */
175 #define ICSSG_MIN_COALESCE_USECS 20
176 
177 /* data for each emac port */
178 struct prueth_emac {
179 	bool is_sr1;
180 	struct prueth *prueth;
181 	struct net_device *ndev;
182 	u8 mac_addr[6];
183 	struct napi_struct napi_rx;
184 	u32 msg_enable;
185 
186 	int link;
187 	int speed;
188 	int duplex;
189 
190 	const char *phy_id;
191 	struct device_node *phy_node;
192 	phy_interface_t phy_if;
193 	enum prueth_port port_id;
194 	struct icss_iep *iep;
195 	unsigned int rx_ts_enabled : 1;
196 	unsigned int tx_ts_enabled : 1;
197 	unsigned int half_duplex : 1;
198 
199 	/* DMA related */
200 	struct prueth_tx_chn tx_chns[PRUETH_MAX_TX_QUEUES];
201 	struct completion tdown_complete;
202 	atomic_t tdown_cnt;
203 	struct prueth_rx_chn rx_chns;
204 	int rx_flow_id_base;
205 	int tx_ch_num;
206 
207 	/* SR1.0 Management channel */
208 	struct prueth_rx_chn rx_mgm_chn;
209 	int rx_mgm_flow_id_base;
210 
211 	spinlock_t lock;	/* serialize access */
212 
213 	/* TX HW Timestamping */
214 	/* TX TS cookie will be index to the tx_ts_skb array */
215 	struct sk_buff *tx_ts_skb[PRUETH_MAX_TX_TS_REQUESTS];
216 	atomic_t tx_ts_pending;
217 	int tx_ts_irq;
218 
219 	u8 cmd_seq;
220 	/* shutdown related */
221 	__le32 cmd_data[4];
222 	struct completion cmd_complete;
223 	/* Mutex to serialize access to firmware command interface */
224 	struct mutex cmd_lock;
225 	struct work_struct rx_mode_work;
226 	struct workqueue_struct	*cmd_wq;
227 
228 	struct pruss_mem_region dram;
229 
230 	bool offload_fwd_mark;
231 	int port_vlan;
232 
233 	struct delayed_work stats_work;
234 	u64 stats[ICSSG_NUM_MIIG_STATS];
235 	u64 pa_stats[ICSSG_NUM_PA_STATS];
236 
237 	/* RX IRQ Coalescing Related */
238 	struct hrtimer rx_hrtimer;
239 	unsigned long rx_pace_timeout_ns;
240 
241 	struct netdev_hw_addr_list vlan_mcast_list[MAX_VLAN_ID];
242 	struct bpf_prog *xdp_prog;
243 	struct xdp_attachment_info xdpi;
244 };
245 
246 /* The buf includes headroom compatible with both skb and xdpf */
247 #define PRUETH_HEADROOM_NA (max(XDP_PACKET_HEADROOM, NET_SKB_PAD) + NET_IP_ALIGN)
248 #define PRUETH_HEADROOM  ALIGN(PRUETH_HEADROOM_NA, sizeof(long))
249 
250 /**
251  * struct prueth_pdata - PRUeth platform data
252  * @fdqring_mode: Free desc queue mode
253  * @quirk_10m_link_issue: 10M link detect errata
254  * @switch_mode: switch firmware support
255  */
256 struct prueth_pdata {
257 	enum k3_ring_mode fdqring_mode;
258 	u32	quirk_10m_link_issue:1;
259 	u32	switch_mode:1;
260 };
261 
262 struct icssg_firmwares {
263 	const char *pru;
264 	const char *rtu;
265 	const char *txpru;
266 };
267 
268 /**
269  * struct prueth - PRUeth structure
270  * @dev: device
271  * @pruss: pruss handle
272  * @pru: rproc instances of PRUs
273  * @rtu: rproc instances of RTUs
274  * @txpru: rproc instances of TX_PRUs
275  * @shram: PRUSS shared RAM region
276  * @sram_pool: MSMC RAM pool for buffers
277  * @msmcram: MSMC RAM region
278  * @eth_node: DT node for the port
279  * @emac: private EMAC data structure
280  * @registered_netdevs: list of registered netdevs
281  * @miig_rt: regmap to mii_g_rt block
282  * @mii_rt: regmap to mii_rt block
283  * @pa_stats: regmap to pa_stats block
284  * @pru_id: ID for each of the PRUs
285  * @pdev: pointer to ICSSG platform device
286  * @pdata: pointer to platform data for ICSSG driver
287  * @icssg_hwcmdseq: seq counter or HWQ messages
288  * @emacs_initialized: num of EMACs/ext ports that are up/running
289  * @iep0: pointer to IEP0 device
290  * @iep1: pointer to IEP1 device
291  * @vlan_tbl: VLAN-FID table pointer
292  * @hw_bridge_dev: pointer to HW bridge net device
293  * @hsr_dev: pointer to the HSR net device
294  * @hsr_prp_version: enum to store the protocol version of hsr master
295  * @br_members: bitmask of bridge member ports
296  * @hsr_members: bitmask of hsr member ports
297  * @prueth_netdevice_nb: netdevice notifier block
298  * @prueth_switchdev_nb: switchdev notifier block
299  * @prueth_switchdev_bl_nb: switchdev blocking notifier block
300  * @is_switch_mode: flag to indicate if device is in Switch mode
301  * @is_hsr_offload_mode: flag to indicate if device is in hsr offload mode
302  * @is_switchmode_supported: indicates platform support for switch mode
303  * @switch_id: ID for mapping switch ports to bridge
304  * @default_vlan: Default VLAN for host
305  * @icssg_emac_firmwares: Firmware names for EMAC mode, indexed per MAC
306  * @icssg_switch_firmwares: Firmware names for SWITCH mode, indexed per MAC
307  * @icssg_hsr_firmwares: Firmware names for HSR mode, indexed per MAC
308  * @icssg_prp_firmwares: Firmware names for PRP mode, indexed per MAC
309  */
310 struct prueth {
311 	struct device *dev;
312 	struct pruss *pruss;
313 	struct rproc *pru[PRUSS_NUM_PRUS];
314 	struct rproc *rtu[PRUSS_NUM_PRUS];
315 	struct rproc *txpru[PRUSS_NUM_PRUS];
316 	struct pruss_mem_region shram;
317 	struct gen_pool *sram_pool;
318 	struct pruss_mem_region msmcram;
319 
320 	struct device_node *eth_node[PRUETH_NUM_MACS];
321 	struct prueth_emac *emac[PRUETH_NUM_MACS];
322 	struct net_device *registered_netdevs[PRUETH_NUM_MACS];
323 	struct regmap *miig_rt;
324 	struct regmap *mii_rt;
325 	struct regmap *pa_stats;
326 
327 	enum pruss_pru_id pru_id[PRUSS_NUM_PRUS];
328 	struct platform_device *pdev;
329 	struct prueth_pdata pdata;
330 	u8 icssg_hwcmdseq;
331 	int emacs_initialized;
332 	struct icss_iep *iep0;
333 	struct icss_iep *iep1;
334 	struct prueth_vlan_tbl *vlan_tbl;
335 
336 	struct net_device *hw_bridge_dev;
337 	struct net_device *hsr_dev;
338 	enum hsr_version hsr_prp_version;
339 	u8 br_members;
340 	u8 hsr_members;
341 	struct notifier_block prueth_netdevice_nb;
342 	struct notifier_block prueth_switchdev_nb;
343 	struct notifier_block prueth_switchdev_bl_nb;
344 	bool is_switch_mode;
345 	bool is_hsr_offload_mode;
346 	bool is_switchmode_supported;
347 	unsigned char switch_id[MAX_PHYS_ITEM_ID_LEN];
348 	int default_vlan;
349 	/** @vtbl_lock: Lock for vtbl in shared memory */
350 	spinlock_t vtbl_lock;
351 	/** @stats_lock: Lock for reading icssg stats */
352 	spinlock_t stats_lock;
353 	struct icssg_firmwares icssg_emac_firmwares[PRUETH_NUM_MACS];
354 	struct icssg_firmwares icssg_switch_firmwares[PRUETH_NUM_MACS];
355 	struct icssg_firmwares icssg_hsr_firmwares[PRUETH_NUM_MACS];
356 	struct icssg_firmwares icssg_prp_firmwares[PRUETH_NUM_MACS];
357 };
358 
359 struct emac_tx_ts_response {
360 	u32 reserved[2];
361 	u32 cookie;
362 	u32 lo_ts;
363 	u32 hi_ts;
364 };
365 
366 struct emac_tx_ts_response_sr1 {
367 	__le32 lo_ts;
368 	__le32 hi_ts;
369 	__le32 reserved;
370 	__le32 cookie;
371 };
372 
373 /* get PRUSS SLICE number from prueth_emac */
374 static inline int prueth_emac_slice(struct prueth_emac *emac)
375 {
376 	switch (emac->port_id) {
377 	case PRUETH_PORT_MII0:
378 		return ICSS_SLICE0;
379 	case PRUETH_PORT_MII1:
380 		return ICSS_SLICE1;
381 	default:
382 		return -EINVAL;
383 	}
384 }
385 
386 extern const struct ethtool_ops icssg_ethtool_ops;
387 extern const struct dev_pm_ops prueth_dev_pm_ops;
388 
389 static inline u64 icssg_read_time(const void __iomem *addr)
390 {
391 	u32 low, high;
392 
393 	do {
394 		high = readl(addr + 4);
395 		low = readl(addr);
396 	} while (high != readl(addr + 4));
397 
398 	return low + ((u64)high << 32);
399 }
400 
401 /* Classifier helpers */
402 void icssg_class_set_mac_addr(struct regmap *miig_rt, int slice, u8 *mac);
403 void icssg_class_set_host_mac_addr(struct regmap *miig_rt, const u8 *mac);
404 void icssg_class_disable(struct regmap *miig_rt, int slice);
405 void icssg_class_default(struct regmap *miig_rt, int slice, bool allmulti,
406 			 bool is_sr1);
407 void icssg_class_promiscuous_sr1(struct regmap *miig_rt, int slice);
408 void icssg_class_add_mcast_sr1(struct regmap *miig_rt, int slice,
409 			       struct net_device *ndev);
410 void icssg_ft1_set_mac_addr(struct regmap *miig_rt, int slice, u8 *mac_addr);
411 
412 /* config helpers */
413 void icssg_config_ipg(struct prueth_emac *emac);
414 int icssg_config(struct prueth *prueth, struct prueth_emac *emac,
415 		 int slice);
416 int icssg_set_port_state(struct prueth_emac *emac,
417 			 enum icssg_port_state_cmd state);
418 void icssg_config_set_speed(struct prueth_emac *emac);
419 void icssg_config_half_duplex(struct prueth_emac *emac);
420 void icssg_init_emac_mode(struct prueth *prueth);
421 void icssg_init_fw_offload_mode(struct prueth *prueth);
422 
423 /* Buffer queue helpers */
424 int icssg_queue_pop(struct prueth *prueth, u8 queue);
425 void icssg_queue_push(struct prueth *prueth, int queue, u16 addr);
426 u32 icssg_queue_level(struct prueth *prueth, int queue);
427 
428 int icssg_send_fdb_msg(struct prueth_emac *emac, struct mgmt_cmd *cmd,
429 		       struct mgmt_cmd_rsp *rsp);
430 int icssg_fdb_add_del(struct prueth_emac *emac,  const unsigned char *addr,
431 		      u8 vid, u8 fid_c2, bool add);
432 int icssg_fdb_lookup(struct prueth_emac *emac, const unsigned char *addr,
433 		     u8 vid);
434 void icssg_vtbl_modify(struct prueth_emac *emac, u8 vid, u8 port_mask,
435 		       u8 untag_mask, bool add);
436 u16 icssg_get_pvid(struct prueth_emac *emac);
437 void icssg_set_pvid(struct prueth *prueth, u8 vid, u8 port);
438 int emac_fdb_flow_id_updated(struct prueth_emac *emac);
439 #define prueth_napi_to_tx_chn(pnapi) \
440 	container_of(pnapi, struct prueth_tx_chn, napi_tx)
441 
442 void icssg_stats_work_handler(struct work_struct *work);
443 void emac_update_hardware_stats(struct prueth_emac *emac);
444 int emac_get_stat_by_name(struct prueth_emac *emac, char *stat_name);
445 
446 /* Common functions */
447 void prueth_cleanup_rx_chns(struct prueth_emac *emac,
448 			    struct prueth_rx_chn *rx_chn,
449 			    int max_rflows);
450 void prueth_cleanup_tx_chns(struct prueth_emac *emac);
451 void prueth_ndev_del_tx_napi(struct prueth_emac *emac, int num);
452 void prueth_xmit_free(struct prueth_tx_chn *tx_chn,
453 		      struct cppi5_host_desc_t *desc);
454 int emac_tx_complete_packets(struct prueth_emac *emac, int chn,
455 			     int budget, bool *tdown);
456 int prueth_ndev_add_tx_napi(struct prueth_emac *emac);
457 int prueth_init_tx_chns(struct prueth_emac *emac);
458 int prueth_init_rx_chns(struct prueth_emac *emac,
459 			struct prueth_rx_chn *rx_chn,
460 			char *name, u32 max_rflows,
461 			u32 max_desc_num);
462 int prueth_dma_rx_push_mapped(struct prueth_emac *emac,
463 			      struct prueth_rx_chn *rx_chn,
464 			      struct page *page, u32 buf_len);
465 unsigned int prueth_rxbuf_total_len(unsigned int len);
466 void emac_rx_timestamp(struct prueth_emac *emac,
467 		       struct sk_buff *skb, u32 *psdata);
468 enum netdev_tx icssg_ndo_start_xmit(struct sk_buff *skb, struct net_device *ndev);
469 irqreturn_t prueth_rx_irq(int irq, void *dev_id);
470 void prueth_cleanup_tx_ts(struct prueth_emac *emac);
471 int icssg_napi_rx_poll(struct napi_struct *napi_rx, int budget);
472 int prueth_prepare_rx_chan(struct prueth_emac *emac,
473 			   struct prueth_rx_chn *chn,
474 			   int buf_size);
475 void prueth_reset_tx_chan(struct prueth_emac *emac, int ch_num,
476 			  bool free_skb);
477 void prueth_reset_rx_chan(struct prueth_rx_chn *chn,
478 			  int num_flows, bool disable);
479 void icssg_ndo_tx_timeout(struct net_device *ndev, unsigned int txqueue);
480 int icssg_ndo_ioctl(struct net_device *ndev, struct ifreq *ifr, int cmd);
481 void icssg_ndo_get_stats64(struct net_device *ndev,
482 			   struct rtnl_link_stats64 *stats);
483 int icssg_ndo_get_phys_port_name(struct net_device *ndev, char *name,
484 				 size_t len);
485 int prueth_node_port(struct device_node *eth_node);
486 int prueth_node_mac(struct device_node *eth_node);
487 void prueth_netdev_exit(struct prueth *prueth,
488 			struct device_node *eth_node);
489 int prueth_get_cores(struct prueth *prueth, int slice, bool is_sr1);
490 void prueth_put_cores(struct prueth *prueth, int slice);
491 
492 /* Revision specific helper */
493 u64 icssg_ts_to_ns(u32 hi_sw, u32 hi, u32 lo, u32 cycle_time_ns);
494 u32 emac_xmit_xdp_frame(struct prueth_emac *emac,
495 			struct xdp_frame *xdpf,
496 			struct page *page,
497 			unsigned int q_idx);
498 
499 #endif /* __NET_TI_ICSSG_PRUETH_H */
500