1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /* Texas Instruments ICSSG Ethernet driver 3 * 4 * Copyright (C) 2018-2022 Texas Instruments Incorporated - https://www.ti.com/ 5 * 6 */ 7 8 #ifndef __NET_TI_ICSSG_PRUETH_H 9 #define __NET_TI_ICSSG_PRUETH_H 10 11 #include <linux/etherdevice.h> 12 #include <linux/genalloc.h> 13 #include <linux/if_vlan.h> 14 #include <linux/interrupt.h> 15 #include <linux/kernel.h> 16 #include <linux/mfd/syscon.h> 17 #include <linux/module.h> 18 #include <linux/mutex.h> 19 #include <linux/net_tstamp.h> 20 #include <linux/of.h> 21 #include <linux/of_irq.h> 22 #include <linux/of_mdio.h> 23 #include <linux/of_net.h> 24 #include <linux/of_platform.h> 25 #include <linux/phy.h> 26 #include <linux/remoteproc/pruss.h> 27 #include <linux/pruss_driver.h> 28 #include <linux/ptp_clock_kernel.h> 29 #include <linux/remoteproc.h> 30 31 #include <linux/dma-mapping.h> 32 #include <linux/dma/ti-cppi5.h> 33 #include <linux/dma/k3-udma-glue.h> 34 35 #include <net/devlink.h> 36 37 #include "icssg_config.h" 38 #include "icss_iep.h" 39 #include "icssg_switch_map.h" 40 41 #define PRUETH_MAX_MTU (2000 - ETH_HLEN - ETH_FCS_LEN) 42 #define PRUETH_MIN_PKT_SIZE (VLAN_ETH_ZLEN) 43 #define PRUETH_MAX_PKT_SIZE (PRUETH_MAX_MTU + ETH_HLEN + ETH_FCS_LEN) 44 45 #define ICSS_SLICE0 0 46 #define ICSS_SLICE1 1 47 48 #define ICSS_FW_PRU 0 49 #define ICSS_FW_RTU 1 50 51 #define ICSSG_MAX_RFLOWS 8 /* per slice */ 52 53 #define ICSSG_NUM_PA_STATS 4 54 #define ICSSG_NUM_MIIG_STATS 60 55 /* Number of ICSSG related stats */ 56 #define ICSSG_NUM_STATS (ICSSG_NUM_MIIG_STATS + ICSSG_NUM_PA_STATS) 57 #define ICSSG_NUM_STANDARD_STATS 31 58 #define ICSSG_NUM_ETHTOOL_STATS (ICSSG_NUM_STATS - ICSSG_NUM_STANDARD_STATS) 59 60 #define IEP_DEFAULT_CYCLE_TIME_NS 1000000 /* 1 ms */ 61 62 /* Firmware status codes */ 63 #define ICSS_HS_FW_READY 0x55555555 64 #define ICSS_HS_FW_DEAD 0xDEAD0000 /* lower 16 bits contain error code */ 65 66 /* Firmware command codes */ 67 #define ICSS_HS_CMD_BUSY 0x40000000 68 #define ICSS_HS_CMD_DONE 0x80000000 69 #define ICSS_HS_CMD_CANCEL 0x10000000 70 71 /* Firmware commands */ 72 #define ICSS_CMD_SPAD 0x20 73 #define ICSS_CMD_RXTX 0x10 74 #define ICSS_CMD_ADD_FDB 0x1 75 #define ICSS_CMD_DEL_FDB 0x2 76 #define ICSS_CMD_SET_RUN 0x4 77 #define ICSS_CMD_GET_FDB_SLOT 0x5 78 #define ICSS_CMD_ENABLE_VLAN 0x5 79 #define ICSS_CMD_DISABLE_VLAN 0x6 80 #define ICSS_CMD_ADD_FILTER 0x7 81 #define ICSS_CMD_ADD_MAC 0x8 82 83 /* In switch mode there are 3 real ports i.e. 3 mac addrs. 84 * however Linux sees only the host side port. The other 2 ports 85 * are the switch ports. 86 * In emac mode there are 2 real ports i.e. 2 mac addrs. 87 * Linux sees both the ports. 88 */ 89 enum prueth_port { 90 PRUETH_PORT_HOST = 0, /* host side port */ 91 PRUETH_PORT_MII0, /* physical port RG/SG MII 0 */ 92 PRUETH_PORT_MII1, /* physical port RG/SG MII 1 */ 93 PRUETH_PORT_INVALID, /* Invalid prueth port */ 94 }; 95 96 enum prueth_mac { 97 PRUETH_MAC0 = 0, 98 PRUETH_MAC1, 99 PRUETH_NUM_MACS, 100 PRUETH_MAC_INVALID, 101 }; 102 103 struct prueth_tx_chn { 104 struct device *dma_dev; 105 struct napi_struct napi_tx; 106 struct k3_cppi_desc_pool *desc_pool; 107 struct k3_udma_glue_tx_channel *tx_chn; 108 struct prueth_emac *emac; 109 u32 id; 110 u32 descs_num; 111 unsigned int irq; 112 char name[32]; 113 struct hrtimer tx_hrtimer; 114 unsigned long tx_pace_timeout_ns; 115 }; 116 117 struct prueth_rx_chn { 118 struct device *dev; 119 struct device *dma_dev; 120 struct k3_cppi_desc_pool *desc_pool; 121 struct k3_udma_glue_rx_channel *rx_chn; 122 u32 descs_num; 123 unsigned int irq[ICSSG_MAX_RFLOWS]; /* separate irq per flow */ 124 char name[32]; 125 }; 126 127 /* There are 4 Tx DMA channels, but the highest priority is CH3 (thread 3) 128 * and lower three are lower priority channels or threads. 129 */ 130 #define PRUETH_MAX_TX_QUEUES 4 131 132 #define PRUETH_MAX_TX_TS_REQUESTS 50 /* Max simultaneous TX_TS requests */ 133 134 /* Minimum coalesce time in usecs for both Tx and Rx */ 135 #define ICSSG_MIN_COALESCE_USECS 20 136 137 /* data for each emac port */ 138 struct prueth_emac { 139 bool is_sr1; 140 bool fw_running; 141 struct prueth *prueth; 142 struct net_device *ndev; 143 u8 mac_addr[6]; 144 struct napi_struct napi_rx; 145 u32 msg_enable; 146 147 int link; 148 int speed; 149 int duplex; 150 151 const char *phy_id; 152 struct device_node *phy_node; 153 phy_interface_t phy_if; 154 enum prueth_port port_id; 155 struct icss_iep *iep; 156 unsigned int rx_ts_enabled : 1; 157 unsigned int tx_ts_enabled : 1; 158 unsigned int half_duplex : 1; 159 160 /* DMA related */ 161 struct prueth_tx_chn tx_chns[PRUETH_MAX_TX_QUEUES]; 162 struct completion tdown_complete; 163 atomic_t tdown_cnt; 164 struct prueth_rx_chn rx_chns; 165 int rx_flow_id_base; 166 int tx_ch_num; 167 168 /* SR1.0 Management channel */ 169 struct prueth_rx_chn rx_mgm_chn; 170 int rx_mgm_flow_id_base; 171 172 spinlock_t lock; /* serialize access */ 173 174 /* TX HW Timestamping */ 175 /* TX TS cookie will be index to the tx_ts_skb array */ 176 struct sk_buff *tx_ts_skb[PRUETH_MAX_TX_TS_REQUESTS]; 177 atomic_t tx_ts_pending; 178 int tx_ts_irq; 179 180 u8 cmd_seq; 181 /* shutdown related */ 182 __le32 cmd_data[4]; 183 struct completion cmd_complete; 184 /* Mutex to serialize access to firmware command interface */ 185 struct mutex cmd_lock; 186 struct work_struct rx_mode_work; 187 struct workqueue_struct *cmd_wq; 188 189 struct pruss_mem_region dram; 190 191 bool offload_fwd_mark; 192 int port_vlan; 193 194 struct delayed_work stats_work; 195 u64 stats[ICSSG_NUM_MIIG_STATS]; 196 u64 pa_stats[ICSSG_NUM_PA_STATS]; 197 198 /* RX IRQ Coalescing Related */ 199 struct hrtimer rx_hrtimer; 200 unsigned long rx_pace_timeout_ns; 201 }; 202 203 /** 204 * struct prueth_pdata - PRUeth platform data 205 * @fdqring_mode: Free desc queue mode 206 * @quirk_10m_link_issue: 10M link detect errata 207 * @switch_mode: switch firmware support 208 */ 209 struct prueth_pdata { 210 enum k3_ring_mode fdqring_mode; 211 u32 quirk_10m_link_issue:1; 212 u32 switch_mode:1; 213 }; 214 215 struct icssg_firmwares { 216 char *pru; 217 char *rtu; 218 char *txpru; 219 }; 220 221 /** 222 * struct prueth - PRUeth structure 223 * @dev: device 224 * @pruss: pruss handle 225 * @pru: rproc instances of PRUs 226 * @rtu: rproc instances of RTUs 227 * @txpru: rproc instances of TX_PRUs 228 * @shram: PRUSS shared RAM region 229 * @sram_pool: MSMC RAM pool for buffers 230 * @msmcram: MSMC RAM region 231 * @eth_node: DT node for the port 232 * @emac: private EMAC data structure 233 * @registered_netdevs: list of registered netdevs 234 * @miig_rt: regmap to mii_g_rt block 235 * @mii_rt: regmap to mii_rt block 236 * @pa_stats: regmap to pa_stats block 237 * @pru_id: ID for each of the PRUs 238 * @pdev: pointer to ICSSG platform device 239 * @pdata: pointer to platform data for ICSSG driver 240 * @icssg_hwcmdseq: seq counter or HWQ messages 241 * @emacs_initialized: num of EMACs/ext ports that are up/running 242 * @iep0: pointer to IEP0 device 243 * @iep1: pointer to IEP1 device 244 * @vlan_tbl: VLAN-FID table pointer 245 * @hw_bridge_dev: pointer to HW bridge net device 246 * @hsr_dev: pointer to the HSR net device 247 * @br_members: bitmask of bridge member ports 248 * @hsr_members: bitmask of hsr member ports 249 * @prueth_netdevice_nb: netdevice notifier block 250 * @prueth_switchdev_nb: switchdev notifier block 251 * @prueth_switchdev_bl_nb: switchdev blocking notifier block 252 * @is_switch_mode: flag to indicate if device is in Switch mode 253 * @is_hsr_offload_mode: flag to indicate if device is in hsr offload mode 254 * @is_switchmode_supported: indicates platform support for switch mode 255 * @switch_id: ID for mapping switch ports to bridge 256 * @default_vlan: Default VLAN for host 257 */ 258 struct prueth { 259 struct device *dev; 260 struct pruss *pruss; 261 struct rproc *pru[PRUSS_NUM_PRUS]; 262 struct rproc *rtu[PRUSS_NUM_PRUS]; 263 struct rproc *txpru[PRUSS_NUM_PRUS]; 264 struct pruss_mem_region shram; 265 struct gen_pool *sram_pool; 266 struct pruss_mem_region msmcram; 267 268 struct device_node *eth_node[PRUETH_NUM_MACS]; 269 struct prueth_emac *emac[PRUETH_NUM_MACS]; 270 struct net_device *registered_netdevs[PRUETH_NUM_MACS]; 271 struct regmap *miig_rt; 272 struct regmap *mii_rt; 273 struct regmap *pa_stats; 274 275 enum pruss_pru_id pru_id[PRUSS_NUM_PRUS]; 276 struct platform_device *pdev; 277 struct prueth_pdata pdata; 278 u8 icssg_hwcmdseq; 279 int emacs_initialized; 280 struct icss_iep *iep0; 281 struct icss_iep *iep1; 282 struct prueth_vlan_tbl *vlan_tbl; 283 284 struct net_device *hw_bridge_dev; 285 struct net_device *hsr_dev; 286 u8 br_members; 287 u8 hsr_members; 288 struct notifier_block prueth_netdevice_nb; 289 struct notifier_block prueth_switchdev_nb; 290 struct notifier_block prueth_switchdev_bl_nb; 291 bool is_switch_mode; 292 bool is_hsr_offload_mode; 293 bool is_switchmode_supported; 294 unsigned char switch_id[MAX_PHYS_ITEM_ID_LEN]; 295 int default_vlan; 296 }; 297 298 struct emac_tx_ts_response { 299 u32 reserved[2]; 300 u32 cookie; 301 u32 lo_ts; 302 u32 hi_ts; 303 }; 304 305 struct emac_tx_ts_response_sr1 { 306 __le32 lo_ts; 307 __le32 hi_ts; 308 __le32 reserved; 309 __le32 cookie; 310 }; 311 312 /* get PRUSS SLICE number from prueth_emac */ 313 static inline int prueth_emac_slice(struct prueth_emac *emac) 314 { 315 switch (emac->port_id) { 316 case PRUETH_PORT_MII0: 317 return ICSS_SLICE0; 318 case PRUETH_PORT_MII1: 319 return ICSS_SLICE1; 320 default: 321 return -EINVAL; 322 } 323 } 324 325 extern const struct ethtool_ops icssg_ethtool_ops; 326 extern const struct dev_pm_ops prueth_dev_pm_ops; 327 328 /* Classifier helpers */ 329 void icssg_class_set_mac_addr(struct regmap *miig_rt, int slice, u8 *mac); 330 void icssg_class_set_host_mac_addr(struct regmap *miig_rt, const u8 *mac); 331 void icssg_class_disable(struct regmap *miig_rt, int slice); 332 void icssg_class_default(struct regmap *miig_rt, int slice, bool allmulti, 333 bool is_sr1); 334 void icssg_class_promiscuous_sr1(struct regmap *miig_rt, int slice); 335 void icssg_class_add_mcast_sr1(struct regmap *miig_rt, int slice, 336 struct net_device *ndev); 337 void icssg_ft1_set_mac_addr(struct regmap *miig_rt, int slice, u8 *mac_addr); 338 339 /* config helpers */ 340 void icssg_config_ipg(struct prueth_emac *emac); 341 int icssg_config(struct prueth *prueth, struct prueth_emac *emac, 342 int slice); 343 int icssg_set_port_state(struct prueth_emac *emac, 344 enum icssg_port_state_cmd state); 345 void icssg_config_set_speed(struct prueth_emac *emac); 346 void icssg_config_half_duplex(struct prueth_emac *emac); 347 348 /* Buffer queue helpers */ 349 int icssg_queue_pop(struct prueth *prueth, u8 queue); 350 void icssg_queue_push(struct prueth *prueth, int queue, u16 addr); 351 u32 icssg_queue_level(struct prueth *prueth, int queue); 352 353 int icssg_send_fdb_msg(struct prueth_emac *emac, struct mgmt_cmd *cmd, 354 struct mgmt_cmd_rsp *rsp); 355 int icssg_fdb_add_del(struct prueth_emac *emac, const unsigned char *addr, 356 u8 vid, u8 fid_c2, bool add); 357 int icssg_fdb_lookup(struct prueth_emac *emac, const unsigned char *addr, 358 u8 vid); 359 void icssg_vtbl_modify(struct prueth_emac *emac, u8 vid, u8 port_mask, 360 u8 untag_mask, bool add); 361 u16 icssg_get_pvid(struct prueth_emac *emac); 362 void icssg_set_pvid(struct prueth *prueth, u8 vid, u8 port); 363 #define prueth_napi_to_tx_chn(pnapi) \ 364 container_of(pnapi, struct prueth_tx_chn, napi_tx) 365 366 void icssg_stats_work_handler(struct work_struct *work); 367 void emac_update_hardware_stats(struct prueth_emac *emac); 368 int emac_get_stat_by_name(struct prueth_emac *emac, char *stat_name); 369 370 /* Common functions */ 371 void prueth_cleanup_rx_chns(struct prueth_emac *emac, 372 struct prueth_rx_chn *rx_chn, 373 int max_rflows); 374 void prueth_cleanup_tx_chns(struct prueth_emac *emac); 375 void prueth_ndev_del_tx_napi(struct prueth_emac *emac, int num); 376 void prueth_xmit_free(struct prueth_tx_chn *tx_chn, 377 struct cppi5_host_desc_t *desc); 378 int emac_tx_complete_packets(struct prueth_emac *emac, int chn, 379 int budget, bool *tdown); 380 int prueth_ndev_add_tx_napi(struct prueth_emac *emac); 381 int prueth_init_tx_chns(struct prueth_emac *emac); 382 int prueth_init_rx_chns(struct prueth_emac *emac, 383 struct prueth_rx_chn *rx_chn, 384 char *name, u32 max_rflows, 385 u32 max_desc_num); 386 int prueth_dma_rx_push(struct prueth_emac *emac, 387 struct sk_buff *skb, 388 struct prueth_rx_chn *rx_chn); 389 void emac_rx_timestamp(struct prueth_emac *emac, 390 struct sk_buff *skb, u32 *psdata); 391 enum netdev_tx icssg_ndo_start_xmit(struct sk_buff *skb, struct net_device *ndev); 392 irqreturn_t prueth_rx_irq(int irq, void *dev_id); 393 void prueth_emac_stop(struct prueth_emac *emac); 394 void prueth_cleanup_tx_ts(struct prueth_emac *emac); 395 int icssg_napi_rx_poll(struct napi_struct *napi_rx, int budget); 396 int prueth_prepare_rx_chan(struct prueth_emac *emac, 397 struct prueth_rx_chn *chn, 398 int buf_size); 399 void prueth_reset_tx_chan(struct prueth_emac *emac, int ch_num, 400 bool free_skb); 401 void prueth_reset_rx_chan(struct prueth_rx_chn *chn, 402 int num_flows, bool disable); 403 void icssg_ndo_tx_timeout(struct net_device *ndev, unsigned int txqueue); 404 int icssg_ndo_ioctl(struct net_device *ndev, struct ifreq *ifr, int cmd); 405 void icssg_ndo_get_stats64(struct net_device *ndev, 406 struct rtnl_link_stats64 *stats); 407 int icssg_ndo_get_phys_port_name(struct net_device *ndev, char *name, 408 size_t len); 409 int prueth_node_port(struct device_node *eth_node); 410 int prueth_node_mac(struct device_node *eth_node); 411 void prueth_netdev_exit(struct prueth *prueth, 412 struct device_node *eth_node); 413 int prueth_get_cores(struct prueth *prueth, int slice, bool is_sr1); 414 void prueth_put_cores(struct prueth *prueth, int slice); 415 416 /* Revision specific helper */ 417 u64 icssg_ts_to_ns(u32 hi_sw, u32 hi, u32 lo, u32 cycle_time_ns); 418 419 #endif /* __NET_TI_ICSSG_PRUETH_H */ 420