1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /* Texas Instruments ICSSG Ethernet driver 3 * 4 * Copyright (C) 2018-2022 Texas Instruments Incorporated - https://www.ti.com/ 5 * 6 */ 7 8 #ifndef __NET_TI_ICSSG_PRUETH_H 9 #define __NET_TI_ICSSG_PRUETH_H 10 11 #include <linux/etherdevice.h> 12 #include <linux/genalloc.h> 13 #include <linux/if_vlan.h> 14 #include <linux/interrupt.h> 15 #include <linux/kernel.h> 16 #include <linux/mfd/syscon.h> 17 #include <linux/module.h> 18 #include <linux/mutex.h> 19 #include <linux/net_tstamp.h> 20 #include <linux/of.h> 21 #include <linux/of_irq.h> 22 #include <linux/of_mdio.h> 23 #include <linux/of_net.h> 24 #include <linux/of_platform.h> 25 #include <linux/phy.h> 26 #include <linux/remoteproc/pruss.h> 27 #include <linux/pruss_driver.h> 28 #include <linux/ptp_clock_kernel.h> 29 #include <linux/remoteproc.h> 30 31 #include <linux/dma-mapping.h> 32 #include <linux/dma/ti-cppi5.h> 33 #include <linux/dma/k3-udma-glue.h> 34 35 #include <net/devlink.h> 36 37 #include "icssg_config.h" 38 #include "icss_iep.h" 39 #include "icssg_switch_map.h" 40 41 #define PRUETH_MAX_MTU (2000 - ETH_HLEN - ETH_FCS_LEN) 42 #define PRUETH_MIN_PKT_SIZE (VLAN_ETH_ZLEN) 43 #define PRUETH_MAX_PKT_SIZE (PRUETH_MAX_MTU + ETH_HLEN + ETH_FCS_LEN) 44 45 #define ICSS_SLICE0 0 46 #define ICSS_SLICE1 1 47 48 #define ICSS_FW_PRU 0 49 #define ICSS_FW_RTU 1 50 51 #define ICSSG_MAX_RFLOWS 8 /* per slice */ 52 53 #define ICSSG_NUM_PA_STATS 4 54 #define ICSSG_NUM_MIIG_STATS 60 55 /* Number of ICSSG related stats */ 56 #define ICSSG_NUM_STATS (ICSSG_NUM_MIIG_STATS + ICSSG_NUM_PA_STATS) 57 #define ICSSG_NUM_STANDARD_STATS 31 58 #define ICSSG_NUM_ETHTOOL_STATS (ICSSG_NUM_STATS - ICSSG_NUM_STANDARD_STATS) 59 60 #define IEP_DEFAULT_CYCLE_TIME_NS 1000000 /* 1 ms */ 61 62 #define PRUETH_UNDIRECTED_PKT_DST_TAG 0 63 #define PRUETH_UNDIRECTED_PKT_TAG_INS BIT(30) 64 65 /* Firmware status codes */ 66 #define ICSS_HS_FW_READY 0x55555555 67 #define ICSS_HS_FW_DEAD 0xDEAD0000 /* lower 16 bits contain error code */ 68 69 /* Firmware command codes */ 70 #define ICSS_HS_CMD_BUSY 0x40000000 71 #define ICSS_HS_CMD_DONE 0x80000000 72 #define ICSS_HS_CMD_CANCEL 0x10000000 73 74 /* Firmware commands */ 75 #define ICSS_CMD_SPAD 0x20 76 #define ICSS_CMD_RXTX 0x10 77 #define ICSS_CMD_ADD_FDB 0x1 78 #define ICSS_CMD_DEL_FDB 0x2 79 #define ICSS_CMD_SET_RUN 0x4 80 #define ICSS_CMD_GET_FDB_SLOT 0x5 81 #define ICSS_CMD_ENABLE_VLAN 0x5 82 #define ICSS_CMD_DISABLE_VLAN 0x6 83 #define ICSS_CMD_ADD_FILTER 0x7 84 #define ICSS_CMD_ADD_MAC 0x8 85 86 /* VLAN Filtering Related MACROs */ 87 #define PRUETH_DFLT_VLAN_HSR 1 88 #define PRUETH_DFLT_VLAN_SW 1 89 #define PRUETH_DFLT_VLAN_MAC 0 90 #define MAX_VLAN_ID 256 91 92 /* In switch mode there are 3 real ports i.e. 3 mac addrs. 93 * however Linux sees only the host side port. The other 2 ports 94 * are the switch ports. 95 * In emac mode there are 2 real ports i.e. 2 mac addrs. 96 * Linux sees both the ports. 97 */ 98 enum prueth_port { 99 PRUETH_PORT_HOST = 0, /* host side port */ 100 PRUETH_PORT_MII0, /* physical port RG/SG MII 0 */ 101 PRUETH_PORT_MII1, /* physical port RG/SG MII 1 */ 102 PRUETH_PORT_INVALID, /* Invalid prueth port */ 103 }; 104 105 enum prueth_mac { 106 PRUETH_MAC0 = 0, 107 PRUETH_MAC1, 108 PRUETH_NUM_MACS, 109 PRUETH_MAC_INVALID, 110 }; 111 112 struct prueth_tx_chn { 113 struct device *dma_dev; 114 struct napi_struct napi_tx; 115 struct k3_cppi_desc_pool *desc_pool; 116 struct k3_udma_glue_tx_channel *tx_chn; 117 struct prueth_emac *emac; 118 u32 id; 119 u32 descs_num; 120 unsigned int irq; 121 char name[32]; 122 struct hrtimer tx_hrtimer; 123 unsigned long tx_pace_timeout_ns; 124 }; 125 126 struct prueth_rx_chn { 127 struct device *dev; 128 struct device *dma_dev; 129 struct k3_cppi_desc_pool *desc_pool; 130 struct k3_udma_glue_rx_channel *rx_chn; 131 u32 descs_num; 132 unsigned int irq[ICSSG_MAX_RFLOWS]; /* separate irq per flow */ 133 char name[32]; 134 }; 135 136 /* There are 4 Tx DMA channels, but the highest priority is CH3 (thread 3) 137 * and lower three are lower priority channels or threads. 138 */ 139 #define PRUETH_MAX_TX_QUEUES 4 140 141 #define PRUETH_MAX_TX_TS_REQUESTS 50 /* Max simultaneous TX_TS requests */ 142 143 /* Minimum coalesce time in usecs for both Tx and Rx */ 144 #define ICSSG_MIN_COALESCE_USECS 20 145 146 /* data for each emac port */ 147 struct prueth_emac { 148 bool is_sr1; 149 struct prueth *prueth; 150 struct net_device *ndev; 151 u8 mac_addr[6]; 152 struct napi_struct napi_rx; 153 u32 msg_enable; 154 155 int link; 156 int speed; 157 int duplex; 158 159 const char *phy_id; 160 struct device_node *phy_node; 161 phy_interface_t phy_if; 162 enum prueth_port port_id; 163 struct icss_iep *iep; 164 unsigned int rx_ts_enabled : 1; 165 unsigned int tx_ts_enabled : 1; 166 unsigned int half_duplex : 1; 167 168 /* DMA related */ 169 struct prueth_tx_chn tx_chns[PRUETH_MAX_TX_QUEUES]; 170 struct completion tdown_complete; 171 atomic_t tdown_cnt; 172 struct prueth_rx_chn rx_chns; 173 int rx_flow_id_base; 174 int tx_ch_num; 175 176 /* SR1.0 Management channel */ 177 struct prueth_rx_chn rx_mgm_chn; 178 int rx_mgm_flow_id_base; 179 180 spinlock_t lock; /* serialize access */ 181 182 /* TX HW Timestamping */ 183 /* TX TS cookie will be index to the tx_ts_skb array */ 184 struct sk_buff *tx_ts_skb[PRUETH_MAX_TX_TS_REQUESTS]; 185 atomic_t tx_ts_pending; 186 int tx_ts_irq; 187 188 u8 cmd_seq; 189 /* shutdown related */ 190 __le32 cmd_data[4]; 191 struct completion cmd_complete; 192 /* Mutex to serialize access to firmware command interface */ 193 struct mutex cmd_lock; 194 struct work_struct rx_mode_work; 195 struct workqueue_struct *cmd_wq; 196 197 struct pruss_mem_region dram; 198 199 bool offload_fwd_mark; 200 int port_vlan; 201 202 struct delayed_work stats_work; 203 u64 stats[ICSSG_NUM_MIIG_STATS]; 204 u64 pa_stats[ICSSG_NUM_PA_STATS]; 205 206 /* RX IRQ Coalescing Related */ 207 struct hrtimer rx_hrtimer; 208 unsigned long rx_pace_timeout_ns; 209 210 struct netdev_hw_addr_list vlan_mcast_list[MAX_VLAN_ID]; 211 }; 212 213 /** 214 * struct prueth_pdata - PRUeth platform data 215 * @fdqring_mode: Free desc queue mode 216 * @quirk_10m_link_issue: 10M link detect errata 217 * @switch_mode: switch firmware support 218 */ 219 struct prueth_pdata { 220 enum k3_ring_mode fdqring_mode; 221 u32 quirk_10m_link_issue:1; 222 u32 switch_mode:1; 223 }; 224 225 struct icssg_firmwares { 226 char *pru; 227 char *rtu; 228 char *txpru; 229 }; 230 231 /** 232 * struct prueth - PRUeth structure 233 * @dev: device 234 * @pruss: pruss handle 235 * @pru: rproc instances of PRUs 236 * @rtu: rproc instances of RTUs 237 * @txpru: rproc instances of TX_PRUs 238 * @shram: PRUSS shared RAM region 239 * @sram_pool: MSMC RAM pool for buffers 240 * @msmcram: MSMC RAM region 241 * @eth_node: DT node for the port 242 * @emac: private EMAC data structure 243 * @registered_netdevs: list of registered netdevs 244 * @miig_rt: regmap to mii_g_rt block 245 * @mii_rt: regmap to mii_rt block 246 * @pa_stats: regmap to pa_stats block 247 * @pru_id: ID for each of the PRUs 248 * @pdev: pointer to ICSSG platform device 249 * @pdata: pointer to platform data for ICSSG driver 250 * @icssg_hwcmdseq: seq counter or HWQ messages 251 * @emacs_initialized: num of EMACs/ext ports that are up/running 252 * @iep0: pointer to IEP0 device 253 * @iep1: pointer to IEP1 device 254 * @vlan_tbl: VLAN-FID table pointer 255 * @hw_bridge_dev: pointer to HW bridge net device 256 * @hsr_dev: pointer to the HSR net device 257 * @br_members: bitmask of bridge member ports 258 * @hsr_members: bitmask of hsr member ports 259 * @prueth_netdevice_nb: netdevice notifier block 260 * @prueth_switchdev_nb: switchdev notifier block 261 * @prueth_switchdev_bl_nb: switchdev blocking notifier block 262 * @is_switch_mode: flag to indicate if device is in Switch mode 263 * @is_hsr_offload_mode: flag to indicate if device is in hsr offload mode 264 * @is_switchmode_supported: indicates platform support for switch mode 265 * @switch_id: ID for mapping switch ports to bridge 266 * @default_vlan: Default VLAN for host 267 */ 268 struct prueth { 269 struct device *dev; 270 struct pruss *pruss; 271 struct rproc *pru[PRUSS_NUM_PRUS]; 272 struct rproc *rtu[PRUSS_NUM_PRUS]; 273 struct rproc *txpru[PRUSS_NUM_PRUS]; 274 struct pruss_mem_region shram; 275 struct gen_pool *sram_pool; 276 struct pruss_mem_region msmcram; 277 278 struct device_node *eth_node[PRUETH_NUM_MACS]; 279 struct prueth_emac *emac[PRUETH_NUM_MACS]; 280 struct net_device *registered_netdevs[PRUETH_NUM_MACS]; 281 struct regmap *miig_rt; 282 struct regmap *mii_rt; 283 struct regmap *pa_stats; 284 285 enum pruss_pru_id pru_id[PRUSS_NUM_PRUS]; 286 struct platform_device *pdev; 287 struct prueth_pdata pdata; 288 u8 icssg_hwcmdseq; 289 int emacs_initialized; 290 struct icss_iep *iep0; 291 struct icss_iep *iep1; 292 struct prueth_vlan_tbl *vlan_tbl; 293 294 struct net_device *hw_bridge_dev; 295 struct net_device *hsr_dev; 296 u8 br_members; 297 u8 hsr_members; 298 struct notifier_block prueth_netdevice_nb; 299 struct notifier_block prueth_switchdev_nb; 300 struct notifier_block prueth_switchdev_bl_nb; 301 bool is_switch_mode; 302 bool is_hsr_offload_mode; 303 bool is_switchmode_supported; 304 unsigned char switch_id[MAX_PHYS_ITEM_ID_LEN]; 305 int default_vlan; 306 /** @vtbl_lock: Lock for vtbl in shared memory */ 307 spinlock_t vtbl_lock; 308 }; 309 310 struct emac_tx_ts_response { 311 u32 reserved[2]; 312 u32 cookie; 313 u32 lo_ts; 314 u32 hi_ts; 315 }; 316 317 struct emac_tx_ts_response_sr1 { 318 __le32 lo_ts; 319 __le32 hi_ts; 320 __le32 reserved; 321 __le32 cookie; 322 }; 323 324 /* get PRUSS SLICE number from prueth_emac */ 325 static inline int prueth_emac_slice(struct prueth_emac *emac) 326 { 327 switch (emac->port_id) { 328 case PRUETH_PORT_MII0: 329 return ICSS_SLICE0; 330 case PRUETH_PORT_MII1: 331 return ICSS_SLICE1; 332 default: 333 return -EINVAL; 334 } 335 } 336 337 extern const struct ethtool_ops icssg_ethtool_ops; 338 extern const struct dev_pm_ops prueth_dev_pm_ops; 339 340 static inline u64 icssg_read_time(const void __iomem *addr) 341 { 342 u32 low, high; 343 344 do { 345 high = readl(addr + 4); 346 low = readl(addr); 347 } while (high != readl(addr + 4)); 348 349 return low + ((u64)high << 32); 350 } 351 352 /* Classifier helpers */ 353 void icssg_class_set_mac_addr(struct regmap *miig_rt, int slice, u8 *mac); 354 void icssg_class_set_host_mac_addr(struct regmap *miig_rt, const u8 *mac); 355 void icssg_class_disable(struct regmap *miig_rt, int slice); 356 void icssg_class_default(struct regmap *miig_rt, int slice, bool allmulti, 357 bool is_sr1); 358 void icssg_class_promiscuous_sr1(struct regmap *miig_rt, int slice); 359 void icssg_class_add_mcast_sr1(struct regmap *miig_rt, int slice, 360 struct net_device *ndev); 361 void icssg_ft1_set_mac_addr(struct regmap *miig_rt, int slice, u8 *mac_addr); 362 363 /* config helpers */ 364 void icssg_config_ipg(struct prueth_emac *emac); 365 int icssg_config(struct prueth *prueth, struct prueth_emac *emac, 366 int slice); 367 int icssg_set_port_state(struct prueth_emac *emac, 368 enum icssg_port_state_cmd state); 369 void icssg_config_set_speed(struct prueth_emac *emac); 370 void icssg_config_half_duplex(struct prueth_emac *emac); 371 void icssg_init_emac_mode(struct prueth *prueth); 372 void icssg_init_fw_offload_mode(struct prueth *prueth); 373 374 /* Buffer queue helpers */ 375 int icssg_queue_pop(struct prueth *prueth, u8 queue); 376 void icssg_queue_push(struct prueth *prueth, int queue, u16 addr); 377 u32 icssg_queue_level(struct prueth *prueth, int queue); 378 379 int icssg_send_fdb_msg(struct prueth_emac *emac, struct mgmt_cmd *cmd, 380 struct mgmt_cmd_rsp *rsp); 381 int icssg_fdb_add_del(struct prueth_emac *emac, const unsigned char *addr, 382 u8 vid, u8 fid_c2, bool add); 383 int icssg_fdb_lookup(struct prueth_emac *emac, const unsigned char *addr, 384 u8 vid); 385 void icssg_vtbl_modify(struct prueth_emac *emac, u8 vid, u8 port_mask, 386 u8 untag_mask, bool add); 387 u16 icssg_get_pvid(struct prueth_emac *emac); 388 void icssg_set_pvid(struct prueth *prueth, u8 vid, u8 port); 389 int emac_fdb_flow_id_updated(struct prueth_emac *emac); 390 #define prueth_napi_to_tx_chn(pnapi) \ 391 container_of(pnapi, struct prueth_tx_chn, napi_tx) 392 393 void icssg_stats_work_handler(struct work_struct *work); 394 void emac_update_hardware_stats(struct prueth_emac *emac); 395 int emac_get_stat_by_name(struct prueth_emac *emac, char *stat_name); 396 397 /* Common functions */ 398 void prueth_cleanup_rx_chns(struct prueth_emac *emac, 399 struct prueth_rx_chn *rx_chn, 400 int max_rflows); 401 void prueth_cleanup_tx_chns(struct prueth_emac *emac); 402 void prueth_ndev_del_tx_napi(struct prueth_emac *emac, int num); 403 void prueth_xmit_free(struct prueth_tx_chn *tx_chn, 404 struct cppi5_host_desc_t *desc); 405 int emac_tx_complete_packets(struct prueth_emac *emac, int chn, 406 int budget, bool *tdown); 407 int prueth_ndev_add_tx_napi(struct prueth_emac *emac); 408 int prueth_init_tx_chns(struct prueth_emac *emac); 409 int prueth_init_rx_chns(struct prueth_emac *emac, 410 struct prueth_rx_chn *rx_chn, 411 char *name, u32 max_rflows, 412 u32 max_desc_num); 413 int prueth_dma_rx_push(struct prueth_emac *emac, 414 struct sk_buff *skb, 415 struct prueth_rx_chn *rx_chn); 416 void emac_rx_timestamp(struct prueth_emac *emac, 417 struct sk_buff *skb, u32 *psdata); 418 enum netdev_tx icssg_ndo_start_xmit(struct sk_buff *skb, struct net_device *ndev); 419 irqreturn_t prueth_rx_irq(int irq, void *dev_id); 420 void prueth_cleanup_tx_ts(struct prueth_emac *emac); 421 int icssg_napi_rx_poll(struct napi_struct *napi_rx, int budget); 422 int prueth_prepare_rx_chan(struct prueth_emac *emac, 423 struct prueth_rx_chn *chn, 424 int buf_size); 425 void prueth_reset_tx_chan(struct prueth_emac *emac, int ch_num, 426 bool free_skb); 427 void prueth_reset_rx_chan(struct prueth_rx_chn *chn, 428 int num_flows, bool disable); 429 void icssg_ndo_tx_timeout(struct net_device *ndev, unsigned int txqueue); 430 int icssg_ndo_ioctl(struct net_device *ndev, struct ifreq *ifr, int cmd); 431 void icssg_ndo_get_stats64(struct net_device *ndev, 432 struct rtnl_link_stats64 *stats); 433 int icssg_ndo_get_phys_port_name(struct net_device *ndev, char *name, 434 size_t len); 435 int prueth_node_port(struct device_node *eth_node); 436 int prueth_node_mac(struct device_node *eth_node); 437 void prueth_netdev_exit(struct prueth *prueth, 438 struct device_node *eth_node); 439 int prueth_get_cores(struct prueth *prueth, int slice, bool is_sr1); 440 void prueth_put_cores(struct prueth *prueth, int slice); 441 442 /* Revision specific helper */ 443 u64 icssg_ts_to_ns(u32 hi_sw, u32 hi, u32 lo, u32 cycle_time_ns); 444 445 #endif /* __NET_TI_ICSSG_PRUETH_H */ 446