1 // SPDX-License-Identifier: GPL-2.0 2 3 /* Texas Instruments ICSSG Ethernet Driver 4 * 5 * Copyright (C) 2018-2022 Texas Instruments Incorporated - https://www.ti.com/ 6 * 7 */ 8 9 #include <linux/bitops.h> 10 #include <linux/clk.h> 11 #include <linux/delay.h> 12 #include <linux/dma-mapping.h> 13 #include <linux/dma/ti-cppi5.h> 14 #include <linux/etherdevice.h> 15 #include <linux/genalloc.h> 16 #include <linux/if_vlan.h> 17 #include <linux/interrupt.h> 18 #include <linux/kernel.h> 19 #include <linux/mfd/syscon.h> 20 #include <linux/module.h> 21 #include <linux/of.h> 22 #include <linux/of_mdio.h> 23 #include <linux/of_net.h> 24 #include <linux/platform_device.h> 25 #include <linux/phy.h> 26 #include <linux/property.h> 27 #include <linux/remoteproc/pruss.h> 28 #include <linux/regmap.h> 29 #include <linux/remoteproc.h> 30 #include <net/switchdev.h> 31 32 #include "icssg_prueth.h" 33 #include "icssg_mii_rt.h" 34 #include "icssg_switchdev.h" 35 #include "../k3-cppi-desc-pool.h" 36 37 #define PRUETH_MODULE_DESCRIPTION "PRUSS ICSSG Ethernet driver" 38 39 #define DEFAULT_VID 1 40 #define DEFAULT_PORT_MASK 1 41 #define DEFAULT_UNTAG_MASK 1 42 43 /* CTRLMMR_ICSSG_RGMII_CTRL register bits */ 44 #define ICSSG_CTRL_RGMII_ID_MODE BIT(24) 45 46 static int emac_get_tx_ts(struct prueth_emac *emac, 47 struct emac_tx_ts_response *rsp) 48 { 49 struct prueth *prueth = emac->prueth; 50 int slice = prueth_emac_slice(emac); 51 int addr; 52 53 addr = icssg_queue_pop(prueth, slice == 0 ? 54 ICSSG_TS_POP_SLICE0 : ICSSG_TS_POP_SLICE1); 55 if (addr < 0) 56 return addr; 57 58 memcpy_fromio(rsp, prueth->shram.va + addr, sizeof(*rsp)); 59 /* return buffer back for to pool */ 60 icssg_queue_push(prueth, slice == 0 ? 61 ICSSG_TS_PUSH_SLICE0 : ICSSG_TS_PUSH_SLICE1, addr); 62 63 return 0; 64 } 65 66 static void tx_ts_work(struct prueth_emac *emac) 67 { 68 struct skb_shared_hwtstamps ssh; 69 struct emac_tx_ts_response tsr; 70 struct sk_buff *skb; 71 int ret = 0; 72 u32 hi_sw; 73 u64 ns; 74 75 /* There may be more than one pending requests */ 76 while (1) { 77 ret = emac_get_tx_ts(emac, &tsr); 78 if (ret) /* nothing more */ 79 break; 80 81 if (tsr.cookie >= PRUETH_MAX_TX_TS_REQUESTS || 82 !emac->tx_ts_skb[tsr.cookie]) { 83 netdev_err(emac->ndev, "Invalid TX TS cookie 0x%x\n", 84 tsr.cookie); 85 break; 86 } 87 88 skb = emac->tx_ts_skb[tsr.cookie]; 89 emac->tx_ts_skb[tsr.cookie] = NULL; /* free slot */ 90 if (!skb) { 91 netdev_err(emac->ndev, "Driver Bug! got NULL skb\n"); 92 break; 93 } 94 95 hi_sw = readl(emac->prueth->shram.va + 96 TIMESYNC_FW_WC_COUNT_HI_SW_OFFSET_OFFSET); 97 ns = icssg_ts_to_ns(hi_sw, tsr.hi_ts, tsr.lo_ts, 98 IEP_DEFAULT_CYCLE_TIME_NS); 99 100 memset(&ssh, 0, sizeof(ssh)); 101 ssh.hwtstamp = ns_to_ktime(ns); 102 103 skb_tstamp_tx(skb, &ssh); 104 dev_consume_skb_any(skb); 105 106 if (atomic_dec_and_test(&emac->tx_ts_pending)) /* no more? */ 107 break; 108 } 109 } 110 111 static irqreturn_t prueth_tx_ts_irq(int irq, void *dev_id) 112 { 113 struct prueth_emac *emac = dev_id; 114 115 /* currently only TX timestamp is being returned */ 116 tx_ts_work(emac); 117 118 return IRQ_HANDLED; 119 } 120 121 static struct icssg_firmwares icssg_switch_firmwares[] = { 122 { 123 .pru = "ti-pruss/am65x-sr2-pru0-prusw-fw.elf", 124 .rtu = "ti-pruss/am65x-sr2-rtu0-prusw-fw.elf", 125 .txpru = "ti-pruss/am65x-sr2-txpru0-prusw-fw.elf", 126 }, 127 { 128 .pru = "ti-pruss/am65x-sr2-pru1-prusw-fw.elf", 129 .rtu = "ti-pruss/am65x-sr2-rtu1-prusw-fw.elf", 130 .txpru = "ti-pruss/am65x-sr2-txpru1-prusw-fw.elf", 131 } 132 }; 133 134 static struct icssg_firmwares icssg_emac_firmwares[] = { 135 { 136 .pru = "ti-pruss/am65x-sr2-pru0-prueth-fw.elf", 137 .rtu = "ti-pruss/am65x-sr2-rtu0-prueth-fw.elf", 138 .txpru = "ti-pruss/am65x-sr2-txpru0-prueth-fw.elf", 139 }, 140 { 141 .pru = "ti-pruss/am65x-sr2-pru1-prueth-fw.elf", 142 .rtu = "ti-pruss/am65x-sr2-rtu1-prueth-fw.elf", 143 .txpru = "ti-pruss/am65x-sr2-txpru1-prueth-fw.elf", 144 } 145 }; 146 147 static int prueth_emac_start(struct prueth *prueth, struct prueth_emac *emac) 148 { 149 struct icssg_firmwares *firmwares; 150 struct device *dev = prueth->dev; 151 int slice, ret; 152 153 if (prueth->is_switch_mode) 154 firmwares = icssg_switch_firmwares; 155 else 156 firmwares = icssg_emac_firmwares; 157 158 slice = prueth_emac_slice(emac); 159 if (slice < 0) { 160 netdev_err(emac->ndev, "invalid port\n"); 161 return -EINVAL; 162 } 163 164 ret = icssg_config(prueth, emac, slice); 165 if (ret) 166 return ret; 167 168 ret = rproc_set_firmware(prueth->pru[slice], firmwares[slice].pru); 169 ret = rproc_boot(prueth->pru[slice]); 170 if (ret) { 171 dev_err(dev, "failed to boot PRU%d: %d\n", slice, ret); 172 return -EINVAL; 173 } 174 175 ret = rproc_set_firmware(prueth->rtu[slice], firmwares[slice].rtu); 176 ret = rproc_boot(prueth->rtu[slice]); 177 if (ret) { 178 dev_err(dev, "failed to boot RTU%d: %d\n", slice, ret); 179 goto halt_pru; 180 } 181 182 ret = rproc_set_firmware(prueth->txpru[slice], firmwares[slice].txpru); 183 ret = rproc_boot(prueth->txpru[slice]); 184 if (ret) { 185 dev_err(dev, "failed to boot TX_PRU%d: %d\n", slice, ret); 186 goto halt_rtu; 187 } 188 189 emac->fw_running = 1; 190 return 0; 191 192 halt_rtu: 193 rproc_shutdown(prueth->rtu[slice]); 194 195 halt_pru: 196 rproc_shutdown(prueth->pru[slice]); 197 198 return ret; 199 } 200 201 /* called back by PHY layer if there is change in link state of hw port*/ 202 static void emac_adjust_link(struct net_device *ndev) 203 { 204 struct prueth_emac *emac = netdev_priv(ndev); 205 struct phy_device *phydev = ndev->phydev; 206 struct prueth *prueth = emac->prueth; 207 bool new_state = false; 208 unsigned long flags; 209 210 if (phydev->link) { 211 /* check the mode of operation - full/half duplex */ 212 if (phydev->duplex != emac->duplex) { 213 new_state = true; 214 emac->duplex = phydev->duplex; 215 } 216 if (phydev->speed != emac->speed) { 217 new_state = true; 218 emac->speed = phydev->speed; 219 } 220 if (!emac->link) { 221 new_state = true; 222 emac->link = 1; 223 } 224 } else if (emac->link) { 225 new_state = true; 226 emac->link = 0; 227 228 /* f/w should support 100 & 1000 */ 229 emac->speed = SPEED_1000; 230 231 /* half duplex may not be supported by f/w */ 232 emac->duplex = DUPLEX_FULL; 233 } 234 235 if (new_state) { 236 phy_print_status(phydev); 237 238 /* update RGMII and MII configuration based on PHY negotiated 239 * values 240 */ 241 if (emac->link) { 242 if (emac->duplex == DUPLEX_HALF) 243 icssg_config_half_duplex(emac); 244 /* Set the RGMII cfg for gig en and full duplex */ 245 icssg_update_rgmii_cfg(prueth->miig_rt, emac); 246 247 /* update the Tx IPG based on 100M/1G speed */ 248 spin_lock_irqsave(&emac->lock, flags); 249 icssg_config_ipg(emac); 250 spin_unlock_irqrestore(&emac->lock, flags); 251 icssg_config_set_speed(emac); 252 icssg_set_port_state(emac, ICSSG_EMAC_PORT_FORWARD); 253 254 } else { 255 icssg_set_port_state(emac, ICSSG_EMAC_PORT_DISABLE); 256 } 257 } 258 259 if (emac->link) { 260 /* reactivate the transmit queue */ 261 netif_tx_wake_all_queues(ndev); 262 } else { 263 netif_tx_stop_all_queues(ndev); 264 prueth_cleanup_tx_ts(emac); 265 } 266 } 267 268 static enum hrtimer_restart emac_rx_timer_callback(struct hrtimer *timer) 269 { 270 struct prueth_emac *emac = 271 container_of(timer, struct prueth_emac, rx_hrtimer); 272 int rx_flow = PRUETH_RX_FLOW_DATA; 273 274 enable_irq(emac->rx_chns.irq[rx_flow]); 275 return HRTIMER_NORESTART; 276 } 277 278 static int emac_phy_connect(struct prueth_emac *emac) 279 { 280 struct prueth *prueth = emac->prueth; 281 struct net_device *ndev = emac->ndev; 282 /* connect PHY */ 283 ndev->phydev = of_phy_connect(emac->ndev, emac->phy_node, 284 &emac_adjust_link, 0, 285 emac->phy_if); 286 if (!ndev->phydev) { 287 dev_err(prueth->dev, "couldn't connect to phy %s\n", 288 emac->phy_node->full_name); 289 return -ENODEV; 290 } 291 292 if (!emac->half_duplex) { 293 dev_dbg(prueth->dev, "half duplex mode is not supported\n"); 294 phy_remove_link_mode(ndev->phydev, ETHTOOL_LINK_MODE_10baseT_Half_BIT); 295 phy_remove_link_mode(ndev->phydev, ETHTOOL_LINK_MODE_100baseT_Half_BIT); 296 } 297 298 /* remove unsupported modes */ 299 phy_remove_link_mode(ndev->phydev, ETHTOOL_LINK_MODE_1000baseT_Half_BIT); 300 phy_remove_link_mode(ndev->phydev, ETHTOOL_LINK_MODE_Pause_BIT); 301 phy_remove_link_mode(ndev->phydev, ETHTOOL_LINK_MODE_Asym_Pause_BIT); 302 303 if (emac->phy_if == PHY_INTERFACE_MODE_MII) 304 phy_set_max_speed(ndev->phydev, SPEED_100); 305 306 return 0; 307 } 308 309 static u64 prueth_iep_gettime(void *clockops_data, struct ptp_system_timestamp *sts) 310 { 311 u32 hi_rollover_count, hi_rollover_count_r; 312 struct prueth_emac *emac = clockops_data; 313 struct prueth *prueth = emac->prueth; 314 void __iomem *fw_hi_r_count_addr; 315 void __iomem *fw_count_hi_addr; 316 u32 iepcount_hi, iepcount_hi_r; 317 unsigned long flags; 318 u32 iepcount_lo; 319 u64 ts = 0; 320 321 fw_count_hi_addr = prueth->shram.va + TIMESYNC_FW_WC_COUNT_HI_SW_OFFSET_OFFSET; 322 fw_hi_r_count_addr = prueth->shram.va + TIMESYNC_FW_WC_HI_ROLLOVER_COUNT_OFFSET; 323 324 local_irq_save(flags); 325 do { 326 iepcount_hi = icss_iep_get_count_hi(emac->iep); 327 iepcount_hi += readl(fw_count_hi_addr); 328 hi_rollover_count = readl(fw_hi_r_count_addr); 329 ptp_read_system_prets(sts); 330 iepcount_lo = icss_iep_get_count_low(emac->iep); 331 ptp_read_system_postts(sts); 332 333 iepcount_hi_r = icss_iep_get_count_hi(emac->iep); 334 iepcount_hi_r += readl(fw_count_hi_addr); 335 hi_rollover_count_r = readl(fw_hi_r_count_addr); 336 } while ((iepcount_hi_r != iepcount_hi) || 337 (hi_rollover_count != hi_rollover_count_r)); 338 local_irq_restore(flags); 339 340 ts = ((u64)hi_rollover_count) << 23 | iepcount_hi; 341 ts = ts * (u64)IEP_DEFAULT_CYCLE_TIME_NS + iepcount_lo; 342 343 return ts; 344 } 345 346 static void prueth_iep_settime(void *clockops_data, u64 ns) 347 { 348 struct icssg_setclock_desc __iomem *sc_descp; 349 struct prueth_emac *emac = clockops_data; 350 struct icssg_setclock_desc sc_desc; 351 u64 cyclecount; 352 u32 cycletime; 353 int timeout; 354 355 if (!emac->fw_running) 356 return; 357 358 sc_descp = emac->prueth->shram.va + TIMESYNC_FW_WC_SETCLOCK_DESC_OFFSET; 359 360 cycletime = IEP_DEFAULT_CYCLE_TIME_NS; 361 cyclecount = ns / cycletime; 362 363 memset(&sc_desc, 0, sizeof(sc_desc)); 364 sc_desc.margin = cycletime - 1000; 365 sc_desc.cyclecounter0_set = cyclecount & GENMASK(31, 0); 366 sc_desc.cyclecounter1_set = (cyclecount & GENMASK(63, 32)) >> 32; 367 sc_desc.iepcount_set = ns % cycletime; 368 sc_desc.CMP0_current = cycletime - 4; //Count from 0 to (cycle time)-4 369 370 memcpy_toio(sc_descp, &sc_desc, sizeof(sc_desc)); 371 372 writeb(1, &sc_descp->request); 373 374 timeout = 5; /* fw should take 2-3 ms */ 375 while (timeout--) { 376 if (readb(&sc_descp->acknowledgment)) 377 return; 378 379 usleep_range(500, 1000); 380 } 381 382 dev_err(emac->prueth->dev, "settime timeout\n"); 383 } 384 385 static int prueth_perout_enable(void *clockops_data, 386 struct ptp_perout_request *req, int on, 387 u64 *cmp) 388 { 389 struct prueth_emac *emac = clockops_data; 390 u32 reduction_factor = 0, offset = 0; 391 struct timespec64 ts; 392 u64 ns_period; 393 394 if (!on) 395 return 0; 396 397 /* Any firmware specific stuff for PPS/PEROUT handling */ 398 ts.tv_sec = req->period.sec; 399 ts.tv_nsec = req->period.nsec; 400 ns_period = timespec64_to_ns(&ts); 401 402 /* f/w doesn't support period less than cycle time */ 403 if (ns_period < IEP_DEFAULT_CYCLE_TIME_NS) 404 return -ENXIO; 405 406 reduction_factor = ns_period / IEP_DEFAULT_CYCLE_TIME_NS; 407 offset = ns_period % IEP_DEFAULT_CYCLE_TIME_NS; 408 409 /* f/w requires at least 1uS within a cycle so CMP 410 * can trigger after SYNC is enabled 411 */ 412 if (offset < 5 * NSEC_PER_USEC) 413 offset = 5 * NSEC_PER_USEC; 414 415 /* if offset is close to cycle time then we will miss 416 * the CMP event for last tick when IEP rolls over. 417 * In normal mode, IEP tick is 4ns. 418 * In slow compensation it could be 0ns or 8ns at 419 * every slow compensation cycle. 420 */ 421 if (offset > IEP_DEFAULT_CYCLE_TIME_NS - 8) 422 offset = IEP_DEFAULT_CYCLE_TIME_NS - 8; 423 424 /* we're in shadow mode so need to set upper 32-bits */ 425 *cmp = (u64)offset << 32; 426 427 writel(reduction_factor, emac->prueth->shram.va + 428 TIMESYNC_FW_WC_SYNCOUT_REDUCTION_FACTOR_OFFSET); 429 430 writel(0, emac->prueth->shram.va + 431 TIMESYNC_FW_WC_SYNCOUT_START_TIME_CYCLECOUNT_OFFSET); 432 433 return 0; 434 } 435 436 const struct icss_iep_clockops prueth_iep_clockops = { 437 .settime = prueth_iep_settime, 438 .gettime = prueth_iep_gettime, 439 .perout_enable = prueth_perout_enable, 440 }; 441 442 static int icssg_prueth_add_mcast(struct net_device *ndev, const u8 *addr) 443 { 444 struct prueth_emac *emac = netdev_priv(ndev); 445 int port_mask = BIT(emac->port_id); 446 447 port_mask |= icssg_fdb_lookup(emac, addr, 0); 448 icssg_fdb_add_del(emac, addr, 0, port_mask, true); 449 icssg_vtbl_modify(emac, 0, port_mask, port_mask, true); 450 451 return 0; 452 } 453 454 static int icssg_prueth_del_mcast(struct net_device *ndev, const u8 *addr) 455 { 456 struct prueth_emac *emac = netdev_priv(ndev); 457 int port_mask = BIT(emac->port_id); 458 int other_port_mask; 459 460 other_port_mask = port_mask ^ icssg_fdb_lookup(emac, addr, 0); 461 462 icssg_fdb_add_del(emac, addr, 0, port_mask, false); 463 icssg_vtbl_modify(emac, 0, port_mask, port_mask, false); 464 465 if (other_port_mask) { 466 icssg_fdb_add_del(emac, addr, 0, other_port_mask, true); 467 icssg_vtbl_modify(emac, 0, other_port_mask, other_port_mask, true); 468 } 469 470 return 0; 471 } 472 473 /** 474 * emac_ndo_open - EMAC device open 475 * @ndev: network adapter device 476 * 477 * Called when system wants to start the interface. 478 * 479 * Return: 0 for a successful open, or appropriate error code 480 */ 481 static int emac_ndo_open(struct net_device *ndev) 482 { 483 struct prueth_emac *emac = netdev_priv(ndev); 484 int ret, i, num_data_chn = emac->tx_ch_num; 485 struct prueth *prueth = emac->prueth; 486 int slice = prueth_emac_slice(emac); 487 struct device *dev = prueth->dev; 488 int max_rx_flows; 489 int rx_flow; 490 491 /* clear SMEM and MSMC settings for all slices */ 492 if (!prueth->emacs_initialized) { 493 memset_io(prueth->msmcram.va, 0, prueth->msmcram.size); 494 memset_io(prueth->shram.va, 0, ICSSG_CONFIG_OFFSET_SLICE1 * PRUETH_NUM_MACS); 495 } 496 497 /* set h/w MAC as user might have re-configured */ 498 ether_addr_copy(emac->mac_addr, ndev->dev_addr); 499 500 icssg_class_set_mac_addr(prueth->miig_rt, slice, emac->mac_addr); 501 icssg_class_default(prueth->miig_rt, slice, 0, false); 502 icssg_ft1_set_mac_addr(prueth->miig_rt, slice, emac->mac_addr); 503 504 /* Notify the stack of the actual queue counts. */ 505 ret = netif_set_real_num_tx_queues(ndev, num_data_chn); 506 if (ret) { 507 dev_err(dev, "cannot set real number of tx queues\n"); 508 return ret; 509 } 510 511 init_completion(&emac->cmd_complete); 512 ret = prueth_init_tx_chns(emac); 513 if (ret) { 514 dev_err(dev, "failed to init tx channel: %d\n", ret); 515 return ret; 516 } 517 518 max_rx_flows = PRUETH_MAX_RX_FLOWS; 519 ret = prueth_init_rx_chns(emac, &emac->rx_chns, "rx", 520 max_rx_flows, PRUETH_MAX_RX_DESC); 521 if (ret) { 522 dev_err(dev, "failed to init rx channel: %d\n", ret); 523 goto cleanup_tx; 524 } 525 526 ret = prueth_ndev_add_tx_napi(emac); 527 if (ret) 528 goto cleanup_rx; 529 530 /* we use only the highest priority flow for now i.e. @irq[3] */ 531 rx_flow = PRUETH_RX_FLOW_DATA; 532 ret = request_irq(emac->rx_chns.irq[rx_flow], prueth_rx_irq, 533 IRQF_TRIGGER_HIGH, dev_name(dev), emac); 534 if (ret) { 535 dev_err(dev, "unable to request RX IRQ\n"); 536 goto cleanup_napi; 537 } 538 539 /* reset and start PRU firmware */ 540 ret = prueth_emac_start(prueth, emac); 541 if (ret) 542 goto free_rx_irq; 543 544 icssg_mii_update_mtu(prueth->mii_rt, slice, ndev->max_mtu); 545 546 if (!prueth->emacs_initialized) { 547 ret = icss_iep_init(emac->iep, &prueth_iep_clockops, 548 emac, IEP_DEFAULT_CYCLE_TIME_NS); 549 } 550 551 ret = request_threaded_irq(emac->tx_ts_irq, NULL, prueth_tx_ts_irq, 552 IRQF_ONESHOT, dev_name(dev), emac); 553 if (ret) 554 goto stop; 555 556 /* Prepare RX */ 557 ret = prueth_prepare_rx_chan(emac, &emac->rx_chns, PRUETH_MAX_PKT_SIZE); 558 if (ret) 559 goto free_tx_ts_irq; 560 561 ret = k3_udma_glue_enable_rx_chn(emac->rx_chns.rx_chn); 562 if (ret) 563 goto reset_rx_chn; 564 565 for (i = 0; i < emac->tx_ch_num; i++) { 566 ret = k3_udma_glue_enable_tx_chn(emac->tx_chns[i].tx_chn); 567 if (ret) 568 goto reset_tx_chan; 569 } 570 571 /* Enable NAPI in Tx and Rx direction */ 572 for (i = 0; i < emac->tx_ch_num; i++) 573 napi_enable(&emac->tx_chns[i].napi_tx); 574 napi_enable(&emac->napi_rx); 575 576 /* start PHY */ 577 phy_start(ndev->phydev); 578 579 prueth->emacs_initialized++; 580 581 queue_work(system_long_wq, &emac->stats_work.work); 582 583 return 0; 584 585 reset_tx_chan: 586 /* Since interface is not yet up, there is wouldn't be 587 * any SKB for completion. So set false to free_skb 588 */ 589 prueth_reset_tx_chan(emac, i, false); 590 reset_rx_chn: 591 prueth_reset_rx_chan(&emac->rx_chns, max_rx_flows, false); 592 free_tx_ts_irq: 593 free_irq(emac->tx_ts_irq, emac); 594 stop: 595 prueth_emac_stop(emac); 596 free_rx_irq: 597 free_irq(emac->rx_chns.irq[rx_flow], emac); 598 cleanup_napi: 599 prueth_ndev_del_tx_napi(emac, emac->tx_ch_num); 600 cleanup_rx: 601 prueth_cleanup_rx_chns(emac, &emac->rx_chns, max_rx_flows); 602 cleanup_tx: 603 prueth_cleanup_tx_chns(emac); 604 605 return ret; 606 } 607 608 /** 609 * emac_ndo_stop - EMAC device stop 610 * @ndev: network adapter device 611 * 612 * Called when system wants to stop or down the interface. 613 * 614 * Return: Always 0 (Success) 615 */ 616 static int emac_ndo_stop(struct net_device *ndev) 617 { 618 struct prueth_emac *emac = netdev_priv(ndev); 619 struct prueth *prueth = emac->prueth; 620 int rx_flow = PRUETH_RX_FLOW_DATA; 621 int max_rx_flows; 622 int ret, i; 623 624 /* inform the upper layers. */ 625 netif_tx_stop_all_queues(ndev); 626 627 /* block packets from wire */ 628 if (ndev->phydev) 629 phy_stop(ndev->phydev); 630 631 icssg_class_disable(prueth->miig_rt, prueth_emac_slice(emac)); 632 633 __dev_mc_unsync(ndev, icssg_prueth_del_mcast); 634 635 atomic_set(&emac->tdown_cnt, emac->tx_ch_num); 636 /* ensure new tdown_cnt value is visible */ 637 smp_mb__after_atomic(); 638 /* tear down and disable UDMA channels */ 639 reinit_completion(&emac->tdown_complete); 640 for (i = 0; i < emac->tx_ch_num; i++) 641 k3_udma_glue_tdown_tx_chn(emac->tx_chns[i].tx_chn, false); 642 643 ret = wait_for_completion_timeout(&emac->tdown_complete, 644 msecs_to_jiffies(1000)); 645 if (!ret) 646 netdev_err(ndev, "tx teardown timeout\n"); 647 648 prueth_reset_tx_chan(emac, emac->tx_ch_num, true); 649 for (i = 0; i < emac->tx_ch_num; i++) { 650 napi_disable(&emac->tx_chns[i].napi_tx); 651 hrtimer_cancel(&emac->tx_chns[i].tx_hrtimer); 652 } 653 654 max_rx_flows = PRUETH_MAX_RX_FLOWS; 655 k3_udma_glue_tdown_rx_chn(emac->rx_chns.rx_chn, true); 656 657 prueth_reset_rx_chan(&emac->rx_chns, max_rx_flows, true); 658 659 napi_disable(&emac->napi_rx); 660 hrtimer_cancel(&emac->rx_hrtimer); 661 662 cancel_work_sync(&emac->rx_mode_work); 663 664 /* Destroying the queued work in ndo_stop() */ 665 cancel_delayed_work_sync(&emac->stats_work); 666 667 if (prueth->emacs_initialized == 1) 668 icss_iep_exit(emac->iep); 669 670 /* stop PRUs */ 671 prueth_emac_stop(emac); 672 673 free_irq(emac->tx_ts_irq, emac); 674 675 free_irq(emac->rx_chns.irq[rx_flow], emac); 676 prueth_ndev_del_tx_napi(emac, emac->tx_ch_num); 677 678 prueth_cleanup_rx_chns(emac, &emac->rx_chns, max_rx_flows); 679 prueth_cleanup_tx_chns(emac); 680 681 prueth->emacs_initialized--; 682 683 return 0; 684 } 685 686 static void emac_ndo_set_rx_mode_work(struct work_struct *work) 687 { 688 struct prueth_emac *emac = container_of(work, struct prueth_emac, rx_mode_work); 689 struct net_device *ndev = emac->ndev; 690 bool promisc, allmulti; 691 692 if (!netif_running(ndev)) 693 return; 694 695 promisc = ndev->flags & IFF_PROMISC; 696 allmulti = ndev->flags & IFF_ALLMULTI; 697 icssg_set_port_state(emac, ICSSG_EMAC_PORT_UC_FLOODING_DISABLE); 698 icssg_set_port_state(emac, ICSSG_EMAC_PORT_MC_FLOODING_DISABLE); 699 700 if (promisc) { 701 icssg_set_port_state(emac, ICSSG_EMAC_PORT_UC_FLOODING_ENABLE); 702 icssg_set_port_state(emac, ICSSG_EMAC_PORT_MC_FLOODING_ENABLE); 703 return; 704 } 705 706 if (allmulti) { 707 icssg_set_port_state(emac, ICSSG_EMAC_PORT_MC_FLOODING_ENABLE); 708 return; 709 } 710 711 __dev_mc_sync(ndev, icssg_prueth_add_mcast, icssg_prueth_del_mcast); 712 } 713 714 /** 715 * emac_ndo_set_rx_mode - EMAC set receive mode function 716 * @ndev: The EMAC network adapter 717 * 718 * Called when system wants to set the receive mode of the device. 719 * 720 */ 721 static void emac_ndo_set_rx_mode(struct net_device *ndev) 722 { 723 struct prueth_emac *emac = netdev_priv(ndev); 724 725 queue_work(emac->cmd_wq, &emac->rx_mode_work); 726 } 727 728 static const struct net_device_ops emac_netdev_ops = { 729 .ndo_open = emac_ndo_open, 730 .ndo_stop = emac_ndo_stop, 731 .ndo_start_xmit = icssg_ndo_start_xmit, 732 .ndo_set_mac_address = eth_mac_addr, 733 .ndo_validate_addr = eth_validate_addr, 734 .ndo_tx_timeout = icssg_ndo_tx_timeout, 735 .ndo_set_rx_mode = emac_ndo_set_rx_mode, 736 .ndo_eth_ioctl = icssg_ndo_ioctl, 737 .ndo_get_stats64 = icssg_ndo_get_stats64, 738 .ndo_get_phys_port_name = icssg_ndo_get_phys_port_name, 739 }; 740 741 static int prueth_netdev_init(struct prueth *prueth, 742 struct device_node *eth_node) 743 { 744 int ret, num_tx_chn = PRUETH_MAX_TX_QUEUES; 745 struct prueth_emac *emac; 746 struct net_device *ndev; 747 enum prueth_port port; 748 const char *irq_name; 749 enum prueth_mac mac; 750 751 port = prueth_node_port(eth_node); 752 if (port == PRUETH_PORT_INVALID) 753 return -EINVAL; 754 755 mac = prueth_node_mac(eth_node); 756 if (mac == PRUETH_MAC_INVALID) 757 return -EINVAL; 758 759 ndev = alloc_etherdev_mq(sizeof(*emac), num_tx_chn); 760 if (!ndev) 761 return -ENOMEM; 762 763 emac = netdev_priv(ndev); 764 emac->prueth = prueth; 765 emac->ndev = ndev; 766 emac->port_id = port; 767 emac->cmd_wq = create_singlethread_workqueue("icssg_cmd_wq"); 768 if (!emac->cmd_wq) { 769 ret = -ENOMEM; 770 goto free_ndev; 771 } 772 INIT_WORK(&emac->rx_mode_work, emac_ndo_set_rx_mode_work); 773 774 INIT_DELAYED_WORK(&emac->stats_work, icssg_stats_work_handler); 775 776 ret = pruss_request_mem_region(prueth->pruss, 777 port == PRUETH_PORT_MII0 ? 778 PRUSS_MEM_DRAM0 : PRUSS_MEM_DRAM1, 779 &emac->dram); 780 if (ret) { 781 dev_err(prueth->dev, "unable to get DRAM: %d\n", ret); 782 ret = -ENOMEM; 783 goto free_wq; 784 } 785 786 emac->tx_ch_num = 1; 787 788 irq_name = "tx_ts0"; 789 if (emac->port_id == PRUETH_PORT_MII1) 790 irq_name = "tx_ts1"; 791 emac->tx_ts_irq = platform_get_irq_byname_optional(prueth->pdev, irq_name); 792 if (emac->tx_ts_irq < 0) { 793 ret = dev_err_probe(prueth->dev, emac->tx_ts_irq, "could not get tx_ts_irq\n"); 794 goto free; 795 } 796 797 SET_NETDEV_DEV(ndev, prueth->dev); 798 spin_lock_init(&emac->lock); 799 mutex_init(&emac->cmd_lock); 800 801 emac->phy_node = of_parse_phandle(eth_node, "phy-handle", 0); 802 if (!emac->phy_node && !of_phy_is_fixed_link(eth_node)) { 803 dev_err(prueth->dev, "couldn't find phy-handle\n"); 804 ret = -ENODEV; 805 goto free; 806 } else if (of_phy_is_fixed_link(eth_node)) { 807 ret = of_phy_register_fixed_link(eth_node); 808 if (ret) { 809 ret = dev_err_probe(prueth->dev, ret, 810 "failed to register fixed-link phy\n"); 811 goto free; 812 } 813 814 emac->phy_node = eth_node; 815 } 816 817 ret = of_get_phy_mode(eth_node, &emac->phy_if); 818 if (ret) { 819 dev_err(prueth->dev, "could not get phy-mode property\n"); 820 goto free; 821 } 822 823 if (emac->phy_if != PHY_INTERFACE_MODE_MII && 824 !phy_interface_mode_is_rgmii(emac->phy_if)) { 825 dev_err(prueth->dev, "PHY mode unsupported %s\n", phy_modes(emac->phy_if)); 826 ret = -EINVAL; 827 goto free; 828 } 829 830 /* AM65 SR2.0 has TX Internal delay always enabled by hardware 831 * and it is not possible to disable TX Internal delay. The below 832 * switch case block describes how we handle different phy modes 833 * based on hardware restriction. 834 */ 835 switch (emac->phy_if) { 836 case PHY_INTERFACE_MODE_RGMII_ID: 837 emac->phy_if = PHY_INTERFACE_MODE_RGMII_RXID; 838 break; 839 case PHY_INTERFACE_MODE_RGMII_TXID: 840 emac->phy_if = PHY_INTERFACE_MODE_RGMII; 841 break; 842 case PHY_INTERFACE_MODE_RGMII: 843 case PHY_INTERFACE_MODE_RGMII_RXID: 844 dev_err(prueth->dev, "RGMII mode without TX delay is not supported"); 845 ret = -EINVAL; 846 goto free; 847 default: 848 break; 849 } 850 851 /* get mac address from DT and set private and netdev addr */ 852 ret = of_get_ethdev_address(eth_node, ndev); 853 if (!is_valid_ether_addr(ndev->dev_addr)) { 854 eth_hw_addr_random(ndev); 855 dev_warn(prueth->dev, "port %d: using random MAC addr: %pM\n", 856 port, ndev->dev_addr); 857 } 858 ether_addr_copy(emac->mac_addr, ndev->dev_addr); 859 860 ndev->min_mtu = PRUETH_MIN_PKT_SIZE; 861 ndev->max_mtu = PRUETH_MAX_MTU; 862 ndev->netdev_ops = &emac_netdev_ops; 863 ndev->ethtool_ops = &icssg_ethtool_ops; 864 ndev->hw_features = NETIF_F_SG; 865 ndev->features = ndev->hw_features; 866 867 netif_napi_add(ndev, &emac->napi_rx, icssg_napi_rx_poll); 868 hrtimer_init(&emac->rx_hrtimer, CLOCK_MONOTONIC, 869 HRTIMER_MODE_REL_PINNED); 870 emac->rx_hrtimer.function = &emac_rx_timer_callback; 871 prueth->emac[mac] = emac; 872 873 return 0; 874 875 free: 876 pruss_release_mem_region(prueth->pruss, &emac->dram); 877 free_wq: 878 destroy_workqueue(emac->cmd_wq); 879 free_ndev: 880 emac->ndev = NULL; 881 prueth->emac[mac] = NULL; 882 free_netdev(ndev); 883 884 return ret; 885 } 886 887 bool prueth_dev_check(const struct net_device *ndev) 888 { 889 if (ndev->netdev_ops == &emac_netdev_ops && netif_running(ndev)) { 890 struct prueth_emac *emac = netdev_priv(ndev); 891 892 return emac->prueth->is_switch_mode; 893 } 894 895 return false; 896 } 897 898 static void prueth_offload_fwd_mark_update(struct prueth *prueth) 899 { 900 int set_val = 0; 901 int i; 902 903 if (prueth->br_members == (BIT(PRUETH_PORT_MII0) | BIT(PRUETH_PORT_MII1))) 904 set_val = 1; 905 906 dev_dbg(prueth->dev, "set offload_fwd_mark %d\n", set_val); 907 908 for (i = PRUETH_MAC0; i < PRUETH_NUM_MACS; i++) { 909 struct prueth_emac *emac = prueth->emac[i]; 910 911 if (!emac || !emac->ndev) 912 continue; 913 914 emac->offload_fwd_mark = set_val; 915 } 916 } 917 918 static void prueth_emac_restart(struct prueth *prueth) 919 { 920 struct prueth_emac *emac0 = prueth->emac[PRUETH_MAC0]; 921 struct prueth_emac *emac1 = prueth->emac[PRUETH_MAC1]; 922 923 /* Detach the net_device for both PRUeth ports*/ 924 if (netif_running(emac0->ndev)) 925 netif_device_detach(emac0->ndev); 926 if (netif_running(emac1->ndev)) 927 netif_device_detach(emac1->ndev); 928 929 /* Disable both PRUeth ports */ 930 icssg_set_port_state(emac0, ICSSG_EMAC_PORT_DISABLE); 931 icssg_set_port_state(emac1, ICSSG_EMAC_PORT_DISABLE); 932 933 /* Stop both pru cores for both PRUeth ports*/ 934 prueth_emac_stop(emac0); 935 prueth->emacs_initialized--; 936 prueth_emac_stop(emac1); 937 prueth->emacs_initialized--; 938 939 /* Start both pru cores for both PRUeth ports */ 940 prueth_emac_start(prueth, emac0); 941 prueth->emacs_initialized++; 942 prueth_emac_start(prueth, emac1); 943 prueth->emacs_initialized++; 944 945 /* Enable forwarding for both PRUeth ports */ 946 icssg_set_port_state(emac0, ICSSG_EMAC_PORT_FORWARD); 947 icssg_set_port_state(emac1, ICSSG_EMAC_PORT_FORWARD); 948 949 /* Attache net_device for both PRUeth ports */ 950 netif_device_attach(emac0->ndev); 951 netif_device_attach(emac1->ndev); 952 } 953 954 static void icssg_enable_switch_mode(struct prueth *prueth) 955 { 956 struct prueth_emac *emac; 957 int mac; 958 959 prueth_emac_restart(prueth); 960 961 for (mac = PRUETH_MAC0; mac < PRUETH_NUM_MACS; mac++) { 962 emac = prueth->emac[mac]; 963 if (netif_running(emac->ndev)) { 964 icssg_fdb_add_del(emac, eth_stp_addr, prueth->default_vlan, 965 ICSSG_FDB_ENTRY_P0_MEMBERSHIP | 966 ICSSG_FDB_ENTRY_P1_MEMBERSHIP | 967 ICSSG_FDB_ENTRY_P2_MEMBERSHIP | 968 ICSSG_FDB_ENTRY_BLOCK, 969 true); 970 icssg_vtbl_modify(emac, emac->port_vlan | DEFAULT_VID, 971 BIT(emac->port_id) | DEFAULT_PORT_MASK, 972 BIT(emac->port_id) | DEFAULT_UNTAG_MASK, 973 true); 974 icssg_set_pvid(prueth, emac->port_vlan, emac->port_id); 975 icssg_set_port_state(emac, ICSSG_EMAC_PORT_VLAN_AWARE_ENABLE); 976 } 977 } 978 } 979 980 static int prueth_netdevice_port_link(struct net_device *ndev, 981 struct net_device *br_ndev, 982 struct netlink_ext_ack *extack) 983 { 984 struct prueth_emac *emac = netdev_priv(ndev); 985 struct prueth *prueth = emac->prueth; 986 int err; 987 988 if (!prueth->br_members) { 989 prueth->hw_bridge_dev = br_ndev; 990 } else { 991 /* This is adding the port to a second bridge, this is 992 * unsupported 993 */ 994 if (prueth->hw_bridge_dev != br_ndev) 995 return -EOPNOTSUPP; 996 } 997 998 err = switchdev_bridge_port_offload(br_ndev, ndev, emac, 999 &prueth->prueth_switchdev_nb, 1000 &prueth->prueth_switchdev_bl_nb, 1001 false, extack); 1002 if (err) 1003 return err; 1004 1005 prueth->br_members |= BIT(emac->port_id); 1006 1007 if (!prueth->is_switch_mode) { 1008 if (prueth->br_members & BIT(PRUETH_PORT_MII0) && 1009 prueth->br_members & BIT(PRUETH_PORT_MII1)) { 1010 prueth->is_switch_mode = true; 1011 prueth->default_vlan = 1; 1012 emac->port_vlan = prueth->default_vlan; 1013 icssg_enable_switch_mode(prueth); 1014 } 1015 } 1016 1017 prueth_offload_fwd_mark_update(prueth); 1018 1019 return NOTIFY_DONE; 1020 } 1021 1022 static void prueth_netdevice_port_unlink(struct net_device *ndev) 1023 { 1024 struct prueth_emac *emac = netdev_priv(ndev); 1025 struct prueth *prueth = emac->prueth; 1026 1027 prueth->br_members &= ~BIT(emac->port_id); 1028 1029 if (prueth->is_switch_mode) { 1030 prueth->is_switch_mode = false; 1031 emac->port_vlan = 0; 1032 prueth_emac_restart(prueth); 1033 } 1034 1035 prueth_offload_fwd_mark_update(prueth); 1036 1037 if (!prueth->br_members) 1038 prueth->hw_bridge_dev = NULL; 1039 } 1040 1041 /* netdev notifier */ 1042 static int prueth_netdevice_event(struct notifier_block *unused, 1043 unsigned long event, void *ptr) 1044 { 1045 struct netlink_ext_ack *extack = netdev_notifier_info_to_extack(ptr); 1046 struct net_device *ndev = netdev_notifier_info_to_dev(ptr); 1047 struct netdev_notifier_changeupper_info *info; 1048 int ret = NOTIFY_DONE; 1049 1050 if (ndev->netdev_ops != &emac_netdev_ops) 1051 return NOTIFY_DONE; 1052 1053 switch (event) { 1054 case NETDEV_CHANGEUPPER: 1055 info = ptr; 1056 1057 if (netif_is_bridge_master(info->upper_dev)) { 1058 if (info->linking) 1059 ret = prueth_netdevice_port_link(ndev, info->upper_dev, extack); 1060 else 1061 prueth_netdevice_port_unlink(ndev); 1062 } 1063 break; 1064 default: 1065 return NOTIFY_DONE; 1066 } 1067 1068 return notifier_from_errno(ret); 1069 } 1070 1071 static int prueth_register_notifiers(struct prueth *prueth) 1072 { 1073 int ret = 0; 1074 1075 prueth->prueth_netdevice_nb.notifier_call = &prueth_netdevice_event; 1076 ret = register_netdevice_notifier(&prueth->prueth_netdevice_nb); 1077 if (ret) { 1078 dev_err(prueth->dev, "can't register netdevice notifier\n"); 1079 return ret; 1080 } 1081 1082 ret = prueth_switchdev_register_notifiers(prueth); 1083 if (ret) 1084 unregister_netdevice_notifier(&prueth->prueth_netdevice_nb); 1085 1086 return ret; 1087 } 1088 1089 static void prueth_unregister_notifiers(struct prueth *prueth) 1090 { 1091 prueth_switchdev_unregister_notifiers(prueth); 1092 unregister_netdevice_notifier(&prueth->prueth_netdevice_nb); 1093 } 1094 1095 static int prueth_probe(struct platform_device *pdev) 1096 { 1097 struct device_node *eth_node, *eth_ports_node; 1098 struct device_node *eth0_node = NULL; 1099 struct device_node *eth1_node = NULL; 1100 struct genpool_data_align gp_data = { 1101 .align = SZ_64K, 1102 }; 1103 struct device *dev = &pdev->dev; 1104 struct device_node *np; 1105 struct prueth *prueth; 1106 struct pruss *pruss; 1107 u32 msmc_ram_size; 1108 int i, ret; 1109 1110 np = dev->of_node; 1111 1112 prueth = devm_kzalloc(dev, sizeof(*prueth), GFP_KERNEL); 1113 if (!prueth) 1114 return -ENOMEM; 1115 1116 dev_set_drvdata(dev, prueth); 1117 prueth->pdev = pdev; 1118 prueth->pdata = *(const struct prueth_pdata *)device_get_match_data(dev); 1119 1120 prueth->dev = dev; 1121 eth_ports_node = of_get_child_by_name(np, "ethernet-ports"); 1122 if (!eth_ports_node) 1123 return -ENOENT; 1124 1125 for_each_child_of_node(eth_ports_node, eth_node) { 1126 u32 reg; 1127 1128 if (strcmp(eth_node->name, "port")) 1129 continue; 1130 ret = of_property_read_u32(eth_node, "reg", ®); 1131 if (ret < 0) { 1132 dev_err(dev, "%pOF error reading port_id %d\n", 1133 eth_node, ret); 1134 } 1135 1136 of_node_get(eth_node); 1137 1138 if (reg == 0) { 1139 eth0_node = eth_node; 1140 if (!of_device_is_available(eth0_node)) { 1141 of_node_put(eth0_node); 1142 eth0_node = NULL; 1143 } 1144 } else if (reg == 1) { 1145 eth1_node = eth_node; 1146 if (!of_device_is_available(eth1_node)) { 1147 of_node_put(eth1_node); 1148 eth1_node = NULL; 1149 } 1150 } else { 1151 dev_err(dev, "port reg should be 0 or 1\n"); 1152 } 1153 } 1154 1155 of_node_put(eth_ports_node); 1156 1157 /* At least one node must be present and available else we fail */ 1158 if (!eth0_node && !eth1_node) { 1159 dev_err(dev, "neither port0 nor port1 node available\n"); 1160 return -ENODEV; 1161 } 1162 1163 if (eth0_node == eth1_node) { 1164 dev_err(dev, "port0 and port1 can't have same reg\n"); 1165 of_node_put(eth0_node); 1166 return -ENODEV; 1167 } 1168 1169 prueth->eth_node[PRUETH_MAC0] = eth0_node; 1170 prueth->eth_node[PRUETH_MAC1] = eth1_node; 1171 1172 prueth->miig_rt = syscon_regmap_lookup_by_phandle(np, "ti,mii-g-rt"); 1173 if (IS_ERR(prueth->miig_rt)) { 1174 dev_err(dev, "couldn't get ti,mii-g-rt syscon regmap\n"); 1175 return -ENODEV; 1176 } 1177 1178 prueth->mii_rt = syscon_regmap_lookup_by_phandle(np, "ti,mii-rt"); 1179 if (IS_ERR(prueth->mii_rt)) { 1180 dev_err(dev, "couldn't get ti,mii-rt syscon regmap\n"); 1181 return -ENODEV; 1182 } 1183 1184 if (eth0_node) { 1185 ret = prueth_get_cores(prueth, ICSS_SLICE0, false); 1186 if (ret) 1187 goto put_cores; 1188 } 1189 1190 if (eth1_node) { 1191 ret = prueth_get_cores(prueth, ICSS_SLICE1, false); 1192 if (ret) 1193 goto put_cores; 1194 } 1195 1196 pruss = pruss_get(eth0_node ? 1197 prueth->pru[ICSS_SLICE0] : prueth->pru[ICSS_SLICE1]); 1198 if (IS_ERR(pruss)) { 1199 ret = PTR_ERR(pruss); 1200 dev_err(dev, "unable to get pruss handle\n"); 1201 goto put_cores; 1202 } 1203 1204 prueth->pruss = pruss; 1205 1206 ret = pruss_request_mem_region(pruss, PRUSS_MEM_SHRD_RAM2, 1207 &prueth->shram); 1208 if (ret) { 1209 dev_err(dev, "unable to get PRUSS SHRD RAM2: %d\n", ret); 1210 goto put_pruss; 1211 } 1212 1213 prueth->sram_pool = of_gen_pool_get(np, "sram", 0); 1214 if (!prueth->sram_pool) { 1215 dev_err(dev, "unable to get SRAM pool\n"); 1216 ret = -ENODEV; 1217 1218 goto put_mem; 1219 } 1220 1221 msmc_ram_size = MSMC_RAM_SIZE; 1222 prueth->is_switchmode_supported = prueth->pdata.switch_mode; 1223 if (prueth->is_switchmode_supported) 1224 msmc_ram_size = MSMC_RAM_SIZE_SWITCH_MODE; 1225 1226 /* NOTE: FW bug needs buffer base to be 64KB aligned */ 1227 prueth->msmcram.va = 1228 (void __iomem *)gen_pool_alloc_algo(prueth->sram_pool, 1229 msmc_ram_size, 1230 gen_pool_first_fit_align, 1231 &gp_data); 1232 1233 if (!prueth->msmcram.va) { 1234 ret = -ENOMEM; 1235 dev_err(dev, "unable to allocate MSMC resource\n"); 1236 goto put_mem; 1237 } 1238 prueth->msmcram.pa = gen_pool_virt_to_phys(prueth->sram_pool, 1239 (unsigned long)prueth->msmcram.va); 1240 prueth->msmcram.size = msmc_ram_size; 1241 memset_io(prueth->msmcram.va, 0, msmc_ram_size); 1242 dev_dbg(dev, "sram: pa %llx va %p size %zx\n", prueth->msmcram.pa, 1243 prueth->msmcram.va, prueth->msmcram.size); 1244 1245 prueth->iep0 = icss_iep_get_idx(np, 0); 1246 if (IS_ERR(prueth->iep0)) { 1247 ret = dev_err_probe(dev, PTR_ERR(prueth->iep0), "iep0 get failed\n"); 1248 prueth->iep0 = NULL; 1249 goto free_pool; 1250 } 1251 1252 prueth->iep1 = icss_iep_get_idx(np, 1); 1253 if (IS_ERR(prueth->iep1)) { 1254 ret = dev_err_probe(dev, PTR_ERR(prueth->iep1), "iep1 get failed\n"); 1255 goto put_iep0; 1256 } 1257 1258 if (prueth->pdata.quirk_10m_link_issue) { 1259 /* Enable IEP1 for FW in 64bit mode as W/A for 10M FD link detect issue under TX 1260 * traffic. 1261 */ 1262 icss_iep_init_fw(prueth->iep1); 1263 } 1264 1265 /* setup netdev interfaces */ 1266 if (eth0_node) { 1267 ret = prueth_netdev_init(prueth, eth0_node); 1268 if (ret) { 1269 dev_err_probe(dev, ret, "netdev init %s failed\n", 1270 eth0_node->name); 1271 goto exit_iep; 1272 } 1273 1274 if (of_find_property(eth0_node, "ti,half-duplex-capable", NULL)) 1275 prueth->emac[PRUETH_MAC0]->half_duplex = 1; 1276 1277 prueth->emac[PRUETH_MAC0]->iep = prueth->iep0; 1278 } 1279 1280 if (eth1_node) { 1281 ret = prueth_netdev_init(prueth, eth1_node); 1282 if (ret) { 1283 dev_err_probe(dev, ret, "netdev init %s failed\n", 1284 eth1_node->name); 1285 goto netdev_exit; 1286 } 1287 1288 if (of_find_property(eth1_node, "ti,half-duplex-capable", NULL)) 1289 prueth->emac[PRUETH_MAC1]->half_duplex = 1; 1290 1291 prueth->emac[PRUETH_MAC1]->iep = prueth->iep0; 1292 } 1293 1294 /* register the network devices */ 1295 if (eth0_node) { 1296 ret = register_netdev(prueth->emac[PRUETH_MAC0]->ndev); 1297 if (ret) { 1298 dev_err(dev, "can't register netdev for port MII0"); 1299 goto netdev_exit; 1300 } 1301 1302 prueth->registered_netdevs[PRUETH_MAC0] = prueth->emac[PRUETH_MAC0]->ndev; 1303 1304 ret = emac_phy_connect(prueth->emac[PRUETH_MAC0]); 1305 if (ret) { 1306 dev_err(dev, 1307 "can't connect to MII0 PHY, error -%d", ret); 1308 goto netdev_unregister; 1309 } 1310 phy_attached_info(prueth->emac[PRUETH_MAC0]->ndev->phydev); 1311 } 1312 1313 if (eth1_node) { 1314 ret = register_netdev(prueth->emac[PRUETH_MAC1]->ndev); 1315 if (ret) { 1316 dev_err(dev, "can't register netdev for port MII1"); 1317 goto netdev_unregister; 1318 } 1319 1320 prueth->registered_netdevs[PRUETH_MAC1] = prueth->emac[PRUETH_MAC1]->ndev; 1321 ret = emac_phy_connect(prueth->emac[PRUETH_MAC1]); 1322 if (ret) { 1323 dev_err(dev, 1324 "can't connect to MII1 PHY, error %d", ret); 1325 goto netdev_unregister; 1326 } 1327 phy_attached_info(prueth->emac[PRUETH_MAC1]->ndev->phydev); 1328 } 1329 1330 if (prueth->is_switchmode_supported) { 1331 ret = prueth_register_notifiers(prueth); 1332 if (ret) 1333 goto netdev_unregister; 1334 1335 sprintf(prueth->switch_id, "%s", dev_name(dev)); 1336 } 1337 1338 dev_info(dev, "TI PRU ethernet driver initialized: %s EMAC mode\n", 1339 (!eth0_node || !eth1_node) ? "single" : "dual"); 1340 1341 if (eth1_node) 1342 of_node_put(eth1_node); 1343 if (eth0_node) 1344 of_node_put(eth0_node); 1345 return 0; 1346 1347 netdev_unregister: 1348 for (i = 0; i < PRUETH_NUM_MACS; i++) { 1349 if (!prueth->registered_netdevs[i]) 1350 continue; 1351 if (prueth->emac[i]->ndev->phydev) { 1352 phy_disconnect(prueth->emac[i]->ndev->phydev); 1353 prueth->emac[i]->ndev->phydev = NULL; 1354 } 1355 unregister_netdev(prueth->registered_netdevs[i]); 1356 } 1357 1358 netdev_exit: 1359 for (i = 0; i < PRUETH_NUM_MACS; i++) { 1360 eth_node = prueth->eth_node[i]; 1361 if (!eth_node) 1362 continue; 1363 1364 prueth_netdev_exit(prueth, eth_node); 1365 } 1366 1367 exit_iep: 1368 if (prueth->pdata.quirk_10m_link_issue) 1369 icss_iep_exit_fw(prueth->iep1); 1370 icss_iep_put(prueth->iep1); 1371 1372 put_iep0: 1373 icss_iep_put(prueth->iep0); 1374 prueth->iep0 = NULL; 1375 prueth->iep1 = NULL; 1376 1377 free_pool: 1378 gen_pool_free(prueth->sram_pool, 1379 (unsigned long)prueth->msmcram.va, msmc_ram_size); 1380 1381 put_mem: 1382 pruss_release_mem_region(prueth->pruss, &prueth->shram); 1383 1384 put_pruss: 1385 pruss_put(prueth->pruss); 1386 1387 put_cores: 1388 if (eth1_node) { 1389 prueth_put_cores(prueth, ICSS_SLICE1); 1390 of_node_put(eth1_node); 1391 } 1392 1393 if (eth0_node) { 1394 prueth_put_cores(prueth, ICSS_SLICE0); 1395 of_node_put(eth0_node); 1396 } 1397 1398 return ret; 1399 } 1400 1401 static void prueth_remove(struct platform_device *pdev) 1402 { 1403 struct prueth *prueth = platform_get_drvdata(pdev); 1404 struct device_node *eth_node; 1405 int i; 1406 1407 prueth_unregister_notifiers(prueth); 1408 1409 for (i = 0; i < PRUETH_NUM_MACS; i++) { 1410 if (!prueth->registered_netdevs[i]) 1411 continue; 1412 phy_stop(prueth->emac[i]->ndev->phydev); 1413 phy_disconnect(prueth->emac[i]->ndev->phydev); 1414 prueth->emac[i]->ndev->phydev = NULL; 1415 unregister_netdev(prueth->registered_netdevs[i]); 1416 } 1417 1418 for (i = 0; i < PRUETH_NUM_MACS; i++) { 1419 eth_node = prueth->eth_node[i]; 1420 if (!eth_node) 1421 continue; 1422 1423 prueth_netdev_exit(prueth, eth_node); 1424 } 1425 1426 if (prueth->pdata.quirk_10m_link_issue) 1427 icss_iep_exit_fw(prueth->iep1); 1428 1429 icss_iep_put(prueth->iep1); 1430 icss_iep_put(prueth->iep0); 1431 1432 gen_pool_free(prueth->sram_pool, 1433 (unsigned long)prueth->msmcram.va, 1434 MSMC_RAM_SIZE); 1435 1436 pruss_release_mem_region(prueth->pruss, &prueth->shram); 1437 1438 pruss_put(prueth->pruss); 1439 1440 if (prueth->eth_node[PRUETH_MAC1]) 1441 prueth_put_cores(prueth, ICSS_SLICE1); 1442 1443 if (prueth->eth_node[PRUETH_MAC0]) 1444 prueth_put_cores(prueth, ICSS_SLICE0); 1445 } 1446 1447 static const struct prueth_pdata am654_icssg_pdata = { 1448 .fdqring_mode = K3_RINGACC_RING_MODE_MESSAGE, 1449 .quirk_10m_link_issue = 1, 1450 .switch_mode = 1, 1451 }; 1452 1453 static const struct prueth_pdata am64x_icssg_pdata = { 1454 .fdqring_mode = K3_RINGACC_RING_MODE_RING, 1455 .switch_mode = 1, 1456 }; 1457 1458 static const struct of_device_id prueth_dt_match[] = { 1459 { .compatible = "ti,am654-icssg-prueth", .data = &am654_icssg_pdata }, 1460 { .compatible = "ti,am642-icssg-prueth", .data = &am64x_icssg_pdata }, 1461 { /* sentinel */ } 1462 }; 1463 MODULE_DEVICE_TABLE(of, prueth_dt_match); 1464 1465 static struct platform_driver prueth_driver = { 1466 .probe = prueth_probe, 1467 .remove_new = prueth_remove, 1468 .driver = { 1469 .name = "icssg-prueth", 1470 .of_match_table = prueth_dt_match, 1471 .pm = &prueth_dev_pm_ops, 1472 }, 1473 }; 1474 module_platform_driver(prueth_driver); 1475 1476 MODULE_AUTHOR("Roger Quadros <rogerq@ti.com>"); 1477 MODULE_AUTHOR("Md Danish Anwar <danishanwar@ti.com>"); 1478 MODULE_DESCRIPTION("PRUSS ICSSG Ethernet Driver"); 1479 MODULE_LICENSE("GPL"); 1480