1 // SPDX-License-Identifier: GPL-2.0 2 3 /* Texas Instruments ICSSG Ethernet Driver 4 * 5 * Copyright (C) 2018-2022 Texas Instruments Incorporated - https://www.ti.com/ 6 * 7 */ 8 9 #include <linux/bitops.h> 10 #include <linux/clk.h> 11 #include <linux/delay.h> 12 #include <linux/dma-mapping.h> 13 #include <linux/dma/ti-cppi5.h> 14 #include <linux/etherdevice.h> 15 #include <linux/genalloc.h> 16 #include <linux/if_vlan.h> 17 #include <linux/interrupt.h> 18 #include <linux/kernel.h> 19 #include <linux/mfd/syscon.h> 20 #include <linux/module.h> 21 #include <linux/of.h> 22 #include <linux/of_mdio.h> 23 #include <linux/of_net.h> 24 #include <linux/platform_device.h> 25 #include <linux/phy.h> 26 #include <linux/property.h> 27 #include <linux/remoteproc/pruss.h> 28 #include <linux/regmap.h> 29 #include <linux/remoteproc.h> 30 31 #include "icssg_prueth.h" 32 #include "icssg_mii_rt.h" 33 #include "../k3-cppi-desc-pool.h" 34 35 #define PRUETH_MODULE_DESCRIPTION "PRUSS ICSSG Ethernet driver" 36 37 /* CTRLMMR_ICSSG_RGMII_CTRL register bits */ 38 #define ICSSG_CTRL_RGMII_ID_MODE BIT(24) 39 40 static int emac_get_tx_ts(struct prueth_emac *emac, 41 struct emac_tx_ts_response *rsp) 42 { 43 struct prueth *prueth = emac->prueth; 44 int slice = prueth_emac_slice(emac); 45 int addr; 46 47 addr = icssg_queue_pop(prueth, slice == 0 ? 48 ICSSG_TS_POP_SLICE0 : ICSSG_TS_POP_SLICE1); 49 if (addr < 0) 50 return addr; 51 52 memcpy_fromio(rsp, prueth->shram.va + addr, sizeof(*rsp)); 53 /* return buffer back for to pool */ 54 icssg_queue_push(prueth, slice == 0 ? 55 ICSSG_TS_PUSH_SLICE0 : ICSSG_TS_PUSH_SLICE1, addr); 56 57 return 0; 58 } 59 60 static void tx_ts_work(struct prueth_emac *emac) 61 { 62 struct skb_shared_hwtstamps ssh; 63 struct emac_tx_ts_response tsr; 64 struct sk_buff *skb; 65 int ret = 0; 66 u32 hi_sw; 67 u64 ns; 68 69 /* There may be more than one pending requests */ 70 while (1) { 71 ret = emac_get_tx_ts(emac, &tsr); 72 if (ret) /* nothing more */ 73 break; 74 75 if (tsr.cookie >= PRUETH_MAX_TX_TS_REQUESTS || 76 !emac->tx_ts_skb[tsr.cookie]) { 77 netdev_err(emac->ndev, "Invalid TX TS cookie 0x%x\n", 78 tsr.cookie); 79 break; 80 } 81 82 skb = emac->tx_ts_skb[tsr.cookie]; 83 emac->tx_ts_skb[tsr.cookie] = NULL; /* free slot */ 84 if (!skb) { 85 netdev_err(emac->ndev, "Driver Bug! got NULL skb\n"); 86 break; 87 } 88 89 hi_sw = readl(emac->prueth->shram.va + 90 TIMESYNC_FW_WC_COUNT_HI_SW_OFFSET_OFFSET); 91 ns = icssg_ts_to_ns(hi_sw, tsr.hi_ts, tsr.lo_ts, 92 IEP_DEFAULT_CYCLE_TIME_NS); 93 94 memset(&ssh, 0, sizeof(ssh)); 95 ssh.hwtstamp = ns_to_ktime(ns); 96 97 skb_tstamp_tx(skb, &ssh); 98 dev_consume_skb_any(skb); 99 100 if (atomic_dec_and_test(&emac->tx_ts_pending)) /* no more? */ 101 break; 102 } 103 } 104 105 static irqreturn_t prueth_tx_ts_irq(int irq, void *dev_id) 106 { 107 struct prueth_emac *emac = dev_id; 108 109 /* currently only TX timestamp is being returned */ 110 tx_ts_work(emac); 111 112 return IRQ_HANDLED; 113 } 114 115 static struct icssg_firmwares icssg_emac_firmwares[] = { 116 { 117 .pru = "ti-pruss/am65x-sr2-pru0-prueth-fw.elf", 118 .rtu = "ti-pruss/am65x-sr2-rtu0-prueth-fw.elf", 119 .txpru = "ti-pruss/am65x-sr2-txpru0-prueth-fw.elf", 120 }, 121 { 122 .pru = "ti-pruss/am65x-sr2-pru1-prueth-fw.elf", 123 .rtu = "ti-pruss/am65x-sr2-rtu1-prueth-fw.elf", 124 .txpru = "ti-pruss/am65x-sr2-txpru1-prueth-fw.elf", 125 } 126 }; 127 128 static int prueth_emac_start(struct prueth *prueth, struct prueth_emac *emac) 129 { 130 struct icssg_firmwares *firmwares; 131 struct device *dev = prueth->dev; 132 int slice, ret; 133 134 firmwares = icssg_emac_firmwares; 135 136 slice = prueth_emac_slice(emac); 137 if (slice < 0) { 138 netdev_err(emac->ndev, "invalid port\n"); 139 return -EINVAL; 140 } 141 142 ret = icssg_config(prueth, emac, slice); 143 if (ret) 144 return ret; 145 146 ret = rproc_set_firmware(prueth->pru[slice], firmwares[slice].pru); 147 ret = rproc_boot(prueth->pru[slice]); 148 if (ret) { 149 dev_err(dev, "failed to boot PRU%d: %d\n", slice, ret); 150 return -EINVAL; 151 } 152 153 ret = rproc_set_firmware(prueth->rtu[slice], firmwares[slice].rtu); 154 ret = rproc_boot(prueth->rtu[slice]); 155 if (ret) { 156 dev_err(dev, "failed to boot RTU%d: %d\n", slice, ret); 157 goto halt_pru; 158 } 159 160 ret = rproc_set_firmware(prueth->txpru[slice], firmwares[slice].txpru); 161 ret = rproc_boot(prueth->txpru[slice]); 162 if (ret) { 163 dev_err(dev, "failed to boot TX_PRU%d: %d\n", slice, ret); 164 goto halt_rtu; 165 } 166 167 emac->fw_running = 1; 168 return 0; 169 170 halt_rtu: 171 rproc_shutdown(prueth->rtu[slice]); 172 173 halt_pru: 174 rproc_shutdown(prueth->pru[slice]); 175 176 return ret; 177 } 178 179 /* called back by PHY layer if there is change in link state of hw port*/ 180 static void emac_adjust_link(struct net_device *ndev) 181 { 182 struct prueth_emac *emac = netdev_priv(ndev); 183 struct phy_device *phydev = ndev->phydev; 184 struct prueth *prueth = emac->prueth; 185 bool new_state = false; 186 unsigned long flags; 187 188 if (phydev->link) { 189 /* check the mode of operation - full/half duplex */ 190 if (phydev->duplex != emac->duplex) { 191 new_state = true; 192 emac->duplex = phydev->duplex; 193 } 194 if (phydev->speed != emac->speed) { 195 new_state = true; 196 emac->speed = phydev->speed; 197 } 198 if (!emac->link) { 199 new_state = true; 200 emac->link = 1; 201 } 202 } else if (emac->link) { 203 new_state = true; 204 emac->link = 0; 205 206 /* f/w should support 100 & 1000 */ 207 emac->speed = SPEED_1000; 208 209 /* half duplex may not be supported by f/w */ 210 emac->duplex = DUPLEX_FULL; 211 } 212 213 if (new_state) { 214 phy_print_status(phydev); 215 216 /* update RGMII and MII configuration based on PHY negotiated 217 * values 218 */ 219 if (emac->link) { 220 if (emac->duplex == DUPLEX_HALF) 221 icssg_config_half_duplex(emac); 222 /* Set the RGMII cfg for gig en and full duplex */ 223 icssg_update_rgmii_cfg(prueth->miig_rt, emac); 224 225 /* update the Tx IPG based on 100M/1G speed */ 226 spin_lock_irqsave(&emac->lock, flags); 227 icssg_config_ipg(emac); 228 spin_unlock_irqrestore(&emac->lock, flags); 229 icssg_config_set_speed(emac); 230 emac_set_port_state(emac, ICSSG_EMAC_PORT_FORWARD); 231 232 } else { 233 emac_set_port_state(emac, ICSSG_EMAC_PORT_DISABLE); 234 } 235 } 236 237 if (emac->link) { 238 /* reactivate the transmit queue */ 239 netif_tx_wake_all_queues(ndev); 240 } else { 241 netif_tx_stop_all_queues(ndev); 242 prueth_cleanup_tx_ts(emac); 243 } 244 } 245 246 static enum hrtimer_restart emac_rx_timer_callback(struct hrtimer *timer) 247 { 248 struct prueth_emac *emac = 249 container_of(timer, struct prueth_emac, rx_hrtimer); 250 int rx_flow = PRUETH_RX_FLOW_DATA; 251 252 enable_irq(emac->rx_chns.irq[rx_flow]); 253 return HRTIMER_NORESTART; 254 } 255 256 static int emac_phy_connect(struct prueth_emac *emac) 257 { 258 struct prueth *prueth = emac->prueth; 259 struct net_device *ndev = emac->ndev; 260 /* connect PHY */ 261 ndev->phydev = of_phy_connect(emac->ndev, emac->phy_node, 262 &emac_adjust_link, 0, 263 emac->phy_if); 264 if (!ndev->phydev) { 265 dev_err(prueth->dev, "couldn't connect to phy %s\n", 266 emac->phy_node->full_name); 267 return -ENODEV; 268 } 269 270 if (!emac->half_duplex) { 271 dev_dbg(prueth->dev, "half duplex mode is not supported\n"); 272 phy_remove_link_mode(ndev->phydev, ETHTOOL_LINK_MODE_10baseT_Half_BIT); 273 phy_remove_link_mode(ndev->phydev, ETHTOOL_LINK_MODE_100baseT_Half_BIT); 274 } 275 276 /* remove unsupported modes */ 277 phy_remove_link_mode(ndev->phydev, ETHTOOL_LINK_MODE_1000baseT_Half_BIT); 278 phy_remove_link_mode(ndev->phydev, ETHTOOL_LINK_MODE_Pause_BIT); 279 phy_remove_link_mode(ndev->phydev, ETHTOOL_LINK_MODE_Asym_Pause_BIT); 280 281 if (emac->phy_if == PHY_INTERFACE_MODE_MII) 282 phy_set_max_speed(ndev->phydev, SPEED_100); 283 284 return 0; 285 } 286 287 static u64 prueth_iep_gettime(void *clockops_data, struct ptp_system_timestamp *sts) 288 { 289 u32 hi_rollover_count, hi_rollover_count_r; 290 struct prueth_emac *emac = clockops_data; 291 struct prueth *prueth = emac->prueth; 292 void __iomem *fw_hi_r_count_addr; 293 void __iomem *fw_count_hi_addr; 294 u32 iepcount_hi, iepcount_hi_r; 295 unsigned long flags; 296 u32 iepcount_lo; 297 u64 ts = 0; 298 299 fw_count_hi_addr = prueth->shram.va + TIMESYNC_FW_WC_COUNT_HI_SW_OFFSET_OFFSET; 300 fw_hi_r_count_addr = prueth->shram.va + TIMESYNC_FW_WC_HI_ROLLOVER_COUNT_OFFSET; 301 302 local_irq_save(flags); 303 do { 304 iepcount_hi = icss_iep_get_count_hi(emac->iep); 305 iepcount_hi += readl(fw_count_hi_addr); 306 hi_rollover_count = readl(fw_hi_r_count_addr); 307 ptp_read_system_prets(sts); 308 iepcount_lo = icss_iep_get_count_low(emac->iep); 309 ptp_read_system_postts(sts); 310 311 iepcount_hi_r = icss_iep_get_count_hi(emac->iep); 312 iepcount_hi_r += readl(fw_count_hi_addr); 313 hi_rollover_count_r = readl(fw_hi_r_count_addr); 314 } while ((iepcount_hi_r != iepcount_hi) || 315 (hi_rollover_count != hi_rollover_count_r)); 316 local_irq_restore(flags); 317 318 ts = ((u64)hi_rollover_count) << 23 | iepcount_hi; 319 ts = ts * (u64)IEP_DEFAULT_CYCLE_TIME_NS + iepcount_lo; 320 321 return ts; 322 } 323 324 static void prueth_iep_settime(void *clockops_data, u64 ns) 325 { 326 struct icssg_setclock_desc __iomem *sc_descp; 327 struct prueth_emac *emac = clockops_data; 328 struct icssg_setclock_desc sc_desc; 329 u64 cyclecount; 330 u32 cycletime; 331 int timeout; 332 333 if (!emac->fw_running) 334 return; 335 336 sc_descp = emac->prueth->shram.va + TIMESYNC_FW_WC_SETCLOCK_DESC_OFFSET; 337 338 cycletime = IEP_DEFAULT_CYCLE_TIME_NS; 339 cyclecount = ns / cycletime; 340 341 memset(&sc_desc, 0, sizeof(sc_desc)); 342 sc_desc.margin = cycletime - 1000; 343 sc_desc.cyclecounter0_set = cyclecount & GENMASK(31, 0); 344 sc_desc.cyclecounter1_set = (cyclecount & GENMASK(63, 32)) >> 32; 345 sc_desc.iepcount_set = ns % cycletime; 346 sc_desc.CMP0_current = cycletime - 4; //Count from 0 to (cycle time)-4 347 348 memcpy_toio(sc_descp, &sc_desc, sizeof(sc_desc)); 349 350 writeb(1, &sc_descp->request); 351 352 timeout = 5; /* fw should take 2-3 ms */ 353 while (timeout--) { 354 if (readb(&sc_descp->acknowledgment)) 355 return; 356 357 usleep_range(500, 1000); 358 } 359 360 dev_err(emac->prueth->dev, "settime timeout\n"); 361 } 362 363 static int prueth_perout_enable(void *clockops_data, 364 struct ptp_perout_request *req, int on, 365 u64 *cmp) 366 { 367 struct prueth_emac *emac = clockops_data; 368 u32 reduction_factor = 0, offset = 0; 369 struct timespec64 ts; 370 u64 ns_period; 371 372 if (!on) 373 return 0; 374 375 /* Any firmware specific stuff for PPS/PEROUT handling */ 376 ts.tv_sec = req->period.sec; 377 ts.tv_nsec = req->period.nsec; 378 ns_period = timespec64_to_ns(&ts); 379 380 /* f/w doesn't support period less than cycle time */ 381 if (ns_period < IEP_DEFAULT_CYCLE_TIME_NS) 382 return -ENXIO; 383 384 reduction_factor = ns_period / IEP_DEFAULT_CYCLE_TIME_NS; 385 offset = ns_period % IEP_DEFAULT_CYCLE_TIME_NS; 386 387 /* f/w requires at least 1uS within a cycle so CMP 388 * can trigger after SYNC is enabled 389 */ 390 if (offset < 5 * NSEC_PER_USEC) 391 offset = 5 * NSEC_PER_USEC; 392 393 /* if offset is close to cycle time then we will miss 394 * the CMP event for last tick when IEP rolls over. 395 * In normal mode, IEP tick is 4ns. 396 * In slow compensation it could be 0ns or 8ns at 397 * every slow compensation cycle. 398 */ 399 if (offset > IEP_DEFAULT_CYCLE_TIME_NS - 8) 400 offset = IEP_DEFAULT_CYCLE_TIME_NS - 8; 401 402 /* we're in shadow mode so need to set upper 32-bits */ 403 *cmp = (u64)offset << 32; 404 405 writel(reduction_factor, emac->prueth->shram.va + 406 TIMESYNC_FW_WC_SYNCOUT_REDUCTION_FACTOR_OFFSET); 407 408 writel(0, emac->prueth->shram.va + 409 TIMESYNC_FW_WC_SYNCOUT_START_TIME_CYCLECOUNT_OFFSET); 410 411 return 0; 412 } 413 414 const struct icss_iep_clockops prueth_iep_clockops = { 415 .settime = prueth_iep_settime, 416 .gettime = prueth_iep_gettime, 417 .perout_enable = prueth_perout_enable, 418 }; 419 420 /** 421 * emac_ndo_open - EMAC device open 422 * @ndev: network adapter device 423 * 424 * Called when system wants to start the interface. 425 * 426 * Return: 0 for a successful open, or appropriate error code 427 */ 428 static int emac_ndo_open(struct net_device *ndev) 429 { 430 struct prueth_emac *emac = netdev_priv(ndev); 431 int ret, i, num_data_chn = emac->tx_ch_num; 432 struct prueth *prueth = emac->prueth; 433 int slice = prueth_emac_slice(emac); 434 struct device *dev = prueth->dev; 435 int max_rx_flows; 436 int rx_flow; 437 438 /* clear SMEM and MSMC settings for all slices */ 439 if (!prueth->emacs_initialized) { 440 memset_io(prueth->msmcram.va, 0, prueth->msmcram.size); 441 memset_io(prueth->shram.va, 0, ICSSG_CONFIG_OFFSET_SLICE1 * PRUETH_NUM_MACS); 442 } 443 444 /* set h/w MAC as user might have re-configured */ 445 ether_addr_copy(emac->mac_addr, ndev->dev_addr); 446 447 icssg_class_set_mac_addr(prueth->miig_rt, slice, emac->mac_addr); 448 icssg_ft1_set_mac_addr(prueth->miig_rt, slice, emac->mac_addr); 449 450 icssg_class_default(prueth->miig_rt, slice, 0, false); 451 452 /* Notify the stack of the actual queue counts. */ 453 ret = netif_set_real_num_tx_queues(ndev, num_data_chn); 454 if (ret) { 455 dev_err(dev, "cannot set real number of tx queues\n"); 456 return ret; 457 } 458 459 init_completion(&emac->cmd_complete); 460 ret = prueth_init_tx_chns(emac); 461 if (ret) { 462 dev_err(dev, "failed to init tx channel: %d\n", ret); 463 return ret; 464 } 465 466 max_rx_flows = PRUETH_MAX_RX_FLOWS; 467 ret = prueth_init_rx_chns(emac, &emac->rx_chns, "rx", 468 max_rx_flows, PRUETH_MAX_RX_DESC); 469 if (ret) { 470 dev_err(dev, "failed to init rx channel: %d\n", ret); 471 goto cleanup_tx; 472 } 473 474 ret = prueth_ndev_add_tx_napi(emac); 475 if (ret) 476 goto cleanup_rx; 477 478 /* we use only the highest priority flow for now i.e. @irq[3] */ 479 rx_flow = PRUETH_RX_FLOW_DATA; 480 ret = request_irq(emac->rx_chns.irq[rx_flow], prueth_rx_irq, 481 IRQF_TRIGGER_HIGH, dev_name(dev), emac); 482 if (ret) { 483 dev_err(dev, "unable to request RX IRQ\n"); 484 goto cleanup_napi; 485 } 486 487 /* reset and start PRU firmware */ 488 ret = prueth_emac_start(prueth, emac); 489 if (ret) 490 goto free_rx_irq; 491 492 icssg_mii_update_mtu(prueth->mii_rt, slice, ndev->max_mtu); 493 494 if (!prueth->emacs_initialized) { 495 ret = icss_iep_init(emac->iep, &prueth_iep_clockops, 496 emac, IEP_DEFAULT_CYCLE_TIME_NS); 497 } 498 499 ret = request_threaded_irq(emac->tx_ts_irq, NULL, prueth_tx_ts_irq, 500 IRQF_ONESHOT, dev_name(dev), emac); 501 if (ret) 502 goto stop; 503 504 /* Prepare RX */ 505 ret = prueth_prepare_rx_chan(emac, &emac->rx_chns, PRUETH_MAX_PKT_SIZE); 506 if (ret) 507 goto free_tx_ts_irq; 508 509 ret = k3_udma_glue_enable_rx_chn(emac->rx_chns.rx_chn); 510 if (ret) 511 goto reset_rx_chn; 512 513 for (i = 0; i < emac->tx_ch_num; i++) { 514 ret = k3_udma_glue_enable_tx_chn(emac->tx_chns[i].tx_chn); 515 if (ret) 516 goto reset_tx_chan; 517 } 518 519 /* Enable NAPI in Tx and Rx direction */ 520 for (i = 0; i < emac->tx_ch_num; i++) 521 napi_enable(&emac->tx_chns[i].napi_tx); 522 napi_enable(&emac->napi_rx); 523 524 /* start PHY */ 525 phy_start(ndev->phydev); 526 527 prueth->emacs_initialized++; 528 529 queue_work(system_long_wq, &emac->stats_work.work); 530 531 return 0; 532 533 reset_tx_chan: 534 /* Since interface is not yet up, there is wouldn't be 535 * any SKB for completion. So set false to free_skb 536 */ 537 prueth_reset_tx_chan(emac, i, false); 538 reset_rx_chn: 539 prueth_reset_rx_chan(&emac->rx_chns, max_rx_flows, false); 540 free_tx_ts_irq: 541 free_irq(emac->tx_ts_irq, emac); 542 stop: 543 prueth_emac_stop(emac); 544 free_rx_irq: 545 free_irq(emac->rx_chns.irq[rx_flow], emac); 546 cleanup_napi: 547 prueth_ndev_del_tx_napi(emac, emac->tx_ch_num); 548 cleanup_rx: 549 prueth_cleanup_rx_chns(emac, &emac->rx_chns, max_rx_flows); 550 cleanup_tx: 551 prueth_cleanup_tx_chns(emac); 552 553 return ret; 554 } 555 556 /** 557 * emac_ndo_stop - EMAC device stop 558 * @ndev: network adapter device 559 * 560 * Called when system wants to stop or down the interface. 561 * 562 * Return: Always 0 (Success) 563 */ 564 static int emac_ndo_stop(struct net_device *ndev) 565 { 566 struct prueth_emac *emac = netdev_priv(ndev); 567 struct prueth *prueth = emac->prueth; 568 int rx_flow = PRUETH_RX_FLOW_DATA; 569 int max_rx_flows; 570 int ret, i; 571 572 /* inform the upper layers. */ 573 netif_tx_stop_all_queues(ndev); 574 575 /* block packets from wire */ 576 if (ndev->phydev) 577 phy_stop(ndev->phydev); 578 579 icssg_class_disable(prueth->miig_rt, prueth_emac_slice(emac)); 580 581 atomic_set(&emac->tdown_cnt, emac->tx_ch_num); 582 /* ensure new tdown_cnt value is visible */ 583 smp_mb__after_atomic(); 584 /* tear down and disable UDMA channels */ 585 reinit_completion(&emac->tdown_complete); 586 for (i = 0; i < emac->tx_ch_num; i++) 587 k3_udma_glue_tdown_tx_chn(emac->tx_chns[i].tx_chn, false); 588 589 ret = wait_for_completion_timeout(&emac->tdown_complete, 590 msecs_to_jiffies(1000)); 591 if (!ret) 592 netdev_err(ndev, "tx teardown timeout\n"); 593 594 prueth_reset_tx_chan(emac, emac->tx_ch_num, true); 595 for (i = 0; i < emac->tx_ch_num; i++) { 596 napi_disable(&emac->tx_chns[i].napi_tx); 597 hrtimer_cancel(&emac->tx_chns[i].tx_hrtimer); 598 } 599 600 max_rx_flows = PRUETH_MAX_RX_FLOWS; 601 k3_udma_glue_tdown_rx_chn(emac->rx_chns.rx_chn, true); 602 603 prueth_reset_rx_chan(&emac->rx_chns, max_rx_flows, true); 604 605 napi_disable(&emac->napi_rx); 606 hrtimer_cancel(&emac->rx_hrtimer); 607 608 cancel_work_sync(&emac->rx_mode_work); 609 610 /* Destroying the queued work in ndo_stop() */ 611 cancel_delayed_work_sync(&emac->stats_work); 612 613 if (prueth->emacs_initialized == 1) 614 icss_iep_exit(emac->iep); 615 616 /* stop PRUs */ 617 prueth_emac_stop(emac); 618 619 free_irq(emac->tx_ts_irq, emac); 620 621 free_irq(emac->rx_chns.irq[rx_flow], emac); 622 prueth_ndev_del_tx_napi(emac, emac->tx_ch_num); 623 624 prueth_cleanup_rx_chns(emac, &emac->rx_chns, max_rx_flows); 625 prueth_cleanup_tx_chns(emac); 626 627 prueth->emacs_initialized--; 628 629 return 0; 630 } 631 632 static void emac_ndo_set_rx_mode_work(struct work_struct *work) 633 { 634 struct prueth_emac *emac = container_of(work, struct prueth_emac, rx_mode_work); 635 struct net_device *ndev = emac->ndev; 636 bool promisc, allmulti; 637 638 if (!netif_running(ndev)) 639 return; 640 641 promisc = ndev->flags & IFF_PROMISC; 642 allmulti = ndev->flags & IFF_ALLMULTI; 643 emac_set_port_state(emac, ICSSG_EMAC_PORT_UC_FLOODING_DISABLE); 644 emac_set_port_state(emac, ICSSG_EMAC_PORT_MC_FLOODING_DISABLE); 645 646 if (promisc) { 647 emac_set_port_state(emac, ICSSG_EMAC_PORT_UC_FLOODING_ENABLE); 648 emac_set_port_state(emac, ICSSG_EMAC_PORT_MC_FLOODING_ENABLE); 649 return; 650 } 651 652 if (allmulti) { 653 emac_set_port_state(emac, ICSSG_EMAC_PORT_MC_FLOODING_ENABLE); 654 return; 655 } 656 657 if (!netdev_mc_empty(ndev)) { 658 emac_set_port_state(emac, ICSSG_EMAC_PORT_MC_FLOODING_ENABLE); 659 return; 660 } 661 } 662 663 /** 664 * emac_ndo_set_rx_mode - EMAC set receive mode function 665 * @ndev: The EMAC network adapter 666 * 667 * Called when system wants to set the receive mode of the device. 668 * 669 */ 670 static void emac_ndo_set_rx_mode(struct net_device *ndev) 671 { 672 struct prueth_emac *emac = netdev_priv(ndev); 673 674 queue_work(emac->cmd_wq, &emac->rx_mode_work); 675 } 676 677 static const struct net_device_ops emac_netdev_ops = { 678 .ndo_open = emac_ndo_open, 679 .ndo_stop = emac_ndo_stop, 680 .ndo_start_xmit = emac_ndo_start_xmit, 681 .ndo_set_mac_address = eth_mac_addr, 682 .ndo_validate_addr = eth_validate_addr, 683 .ndo_tx_timeout = emac_ndo_tx_timeout, 684 .ndo_set_rx_mode = emac_ndo_set_rx_mode, 685 .ndo_eth_ioctl = emac_ndo_ioctl, 686 .ndo_get_stats64 = emac_ndo_get_stats64, 687 .ndo_get_phys_port_name = emac_ndo_get_phys_port_name, 688 }; 689 690 static int prueth_netdev_init(struct prueth *prueth, 691 struct device_node *eth_node) 692 { 693 int ret, num_tx_chn = PRUETH_MAX_TX_QUEUES; 694 struct prueth_emac *emac; 695 struct net_device *ndev; 696 enum prueth_port port; 697 const char *irq_name; 698 enum prueth_mac mac; 699 700 port = prueth_node_port(eth_node); 701 if (port == PRUETH_PORT_INVALID) 702 return -EINVAL; 703 704 mac = prueth_node_mac(eth_node); 705 if (mac == PRUETH_MAC_INVALID) 706 return -EINVAL; 707 708 ndev = alloc_etherdev_mq(sizeof(*emac), num_tx_chn); 709 if (!ndev) 710 return -ENOMEM; 711 712 emac = netdev_priv(ndev); 713 emac->prueth = prueth; 714 emac->ndev = ndev; 715 emac->port_id = port; 716 emac->cmd_wq = create_singlethread_workqueue("icssg_cmd_wq"); 717 if (!emac->cmd_wq) { 718 ret = -ENOMEM; 719 goto free_ndev; 720 } 721 INIT_WORK(&emac->rx_mode_work, emac_ndo_set_rx_mode_work); 722 723 INIT_DELAYED_WORK(&emac->stats_work, emac_stats_work_handler); 724 725 ret = pruss_request_mem_region(prueth->pruss, 726 port == PRUETH_PORT_MII0 ? 727 PRUSS_MEM_DRAM0 : PRUSS_MEM_DRAM1, 728 &emac->dram); 729 if (ret) { 730 dev_err(prueth->dev, "unable to get DRAM: %d\n", ret); 731 ret = -ENOMEM; 732 goto free_wq; 733 } 734 735 emac->tx_ch_num = 1; 736 737 irq_name = "tx_ts0"; 738 if (emac->port_id == PRUETH_PORT_MII1) 739 irq_name = "tx_ts1"; 740 emac->tx_ts_irq = platform_get_irq_byname_optional(prueth->pdev, irq_name); 741 if (emac->tx_ts_irq < 0) { 742 ret = dev_err_probe(prueth->dev, emac->tx_ts_irq, "could not get tx_ts_irq\n"); 743 goto free; 744 } 745 746 SET_NETDEV_DEV(ndev, prueth->dev); 747 spin_lock_init(&emac->lock); 748 mutex_init(&emac->cmd_lock); 749 750 emac->phy_node = of_parse_phandle(eth_node, "phy-handle", 0); 751 if (!emac->phy_node && !of_phy_is_fixed_link(eth_node)) { 752 dev_err(prueth->dev, "couldn't find phy-handle\n"); 753 ret = -ENODEV; 754 goto free; 755 } else if (of_phy_is_fixed_link(eth_node)) { 756 ret = of_phy_register_fixed_link(eth_node); 757 if (ret) { 758 ret = dev_err_probe(prueth->dev, ret, 759 "failed to register fixed-link phy\n"); 760 goto free; 761 } 762 763 emac->phy_node = eth_node; 764 } 765 766 ret = of_get_phy_mode(eth_node, &emac->phy_if); 767 if (ret) { 768 dev_err(prueth->dev, "could not get phy-mode property\n"); 769 goto free; 770 } 771 772 if (emac->phy_if != PHY_INTERFACE_MODE_MII && 773 !phy_interface_mode_is_rgmii(emac->phy_if)) { 774 dev_err(prueth->dev, "PHY mode unsupported %s\n", phy_modes(emac->phy_if)); 775 ret = -EINVAL; 776 goto free; 777 } 778 779 /* AM65 SR2.0 has TX Internal delay always enabled by hardware 780 * and it is not possible to disable TX Internal delay. The below 781 * switch case block describes how we handle different phy modes 782 * based on hardware restriction. 783 */ 784 switch (emac->phy_if) { 785 case PHY_INTERFACE_MODE_RGMII_ID: 786 emac->phy_if = PHY_INTERFACE_MODE_RGMII_RXID; 787 break; 788 case PHY_INTERFACE_MODE_RGMII_TXID: 789 emac->phy_if = PHY_INTERFACE_MODE_RGMII; 790 break; 791 case PHY_INTERFACE_MODE_RGMII: 792 case PHY_INTERFACE_MODE_RGMII_RXID: 793 dev_err(prueth->dev, "RGMII mode without TX delay is not supported"); 794 ret = -EINVAL; 795 goto free; 796 default: 797 break; 798 } 799 800 /* get mac address from DT and set private and netdev addr */ 801 ret = of_get_ethdev_address(eth_node, ndev); 802 if (!is_valid_ether_addr(ndev->dev_addr)) { 803 eth_hw_addr_random(ndev); 804 dev_warn(prueth->dev, "port %d: using random MAC addr: %pM\n", 805 port, ndev->dev_addr); 806 } 807 ether_addr_copy(emac->mac_addr, ndev->dev_addr); 808 809 ndev->min_mtu = PRUETH_MIN_PKT_SIZE; 810 ndev->max_mtu = PRUETH_MAX_MTU; 811 ndev->netdev_ops = &emac_netdev_ops; 812 ndev->ethtool_ops = &icssg_ethtool_ops; 813 ndev->hw_features = NETIF_F_SG; 814 ndev->features = ndev->hw_features; 815 816 netif_napi_add(ndev, &emac->napi_rx, emac_napi_rx_poll); 817 hrtimer_init(&emac->rx_hrtimer, CLOCK_MONOTONIC, 818 HRTIMER_MODE_REL_PINNED); 819 emac->rx_hrtimer.function = &emac_rx_timer_callback; 820 prueth->emac[mac] = emac; 821 822 return 0; 823 824 free: 825 pruss_release_mem_region(prueth->pruss, &emac->dram); 826 free_wq: 827 destroy_workqueue(emac->cmd_wq); 828 free_ndev: 829 emac->ndev = NULL; 830 prueth->emac[mac] = NULL; 831 free_netdev(ndev); 832 833 return ret; 834 } 835 836 static int prueth_probe(struct platform_device *pdev) 837 { 838 struct device_node *eth_node, *eth_ports_node; 839 struct device_node *eth0_node = NULL; 840 struct device_node *eth1_node = NULL; 841 struct genpool_data_align gp_data = { 842 .align = SZ_64K, 843 }; 844 struct device *dev = &pdev->dev; 845 struct device_node *np; 846 struct prueth *prueth; 847 struct pruss *pruss; 848 u32 msmc_ram_size; 849 int i, ret; 850 851 np = dev->of_node; 852 853 prueth = devm_kzalloc(dev, sizeof(*prueth), GFP_KERNEL); 854 if (!prueth) 855 return -ENOMEM; 856 857 dev_set_drvdata(dev, prueth); 858 prueth->pdev = pdev; 859 prueth->pdata = *(const struct prueth_pdata *)device_get_match_data(dev); 860 861 prueth->dev = dev; 862 eth_ports_node = of_get_child_by_name(np, "ethernet-ports"); 863 if (!eth_ports_node) 864 return -ENOENT; 865 866 for_each_child_of_node(eth_ports_node, eth_node) { 867 u32 reg; 868 869 if (strcmp(eth_node->name, "port")) 870 continue; 871 ret = of_property_read_u32(eth_node, "reg", ®); 872 if (ret < 0) { 873 dev_err(dev, "%pOF error reading port_id %d\n", 874 eth_node, ret); 875 } 876 877 of_node_get(eth_node); 878 879 if (reg == 0) { 880 eth0_node = eth_node; 881 if (!of_device_is_available(eth0_node)) { 882 of_node_put(eth0_node); 883 eth0_node = NULL; 884 } 885 } else if (reg == 1) { 886 eth1_node = eth_node; 887 if (!of_device_is_available(eth1_node)) { 888 of_node_put(eth1_node); 889 eth1_node = NULL; 890 } 891 } else { 892 dev_err(dev, "port reg should be 0 or 1\n"); 893 } 894 } 895 896 of_node_put(eth_ports_node); 897 898 /* At least one node must be present and available else we fail */ 899 if (!eth0_node && !eth1_node) { 900 dev_err(dev, "neither port0 nor port1 node available\n"); 901 return -ENODEV; 902 } 903 904 if (eth0_node == eth1_node) { 905 dev_err(dev, "port0 and port1 can't have same reg\n"); 906 of_node_put(eth0_node); 907 return -ENODEV; 908 } 909 910 prueth->eth_node[PRUETH_MAC0] = eth0_node; 911 prueth->eth_node[PRUETH_MAC1] = eth1_node; 912 913 prueth->miig_rt = syscon_regmap_lookup_by_phandle(np, "ti,mii-g-rt"); 914 if (IS_ERR(prueth->miig_rt)) { 915 dev_err(dev, "couldn't get ti,mii-g-rt syscon regmap\n"); 916 return -ENODEV; 917 } 918 919 prueth->mii_rt = syscon_regmap_lookup_by_phandle(np, "ti,mii-rt"); 920 if (IS_ERR(prueth->mii_rt)) { 921 dev_err(dev, "couldn't get ti,mii-rt syscon regmap\n"); 922 return -ENODEV; 923 } 924 925 if (eth0_node) { 926 ret = prueth_get_cores(prueth, ICSS_SLICE0, false); 927 if (ret) 928 goto put_cores; 929 } 930 931 if (eth1_node) { 932 ret = prueth_get_cores(prueth, ICSS_SLICE1, false); 933 if (ret) 934 goto put_cores; 935 } 936 937 pruss = pruss_get(eth0_node ? 938 prueth->pru[ICSS_SLICE0] : prueth->pru[ICSS_SLICE1]); 939 if (IS_ERR(pruss)) { 940 ret = PTR_ERR(pruss); 941 dev_err(dev, "unable to get pruss handle\n"); 942 goto put_cores; 943 } 944 945 prueth->pruss = pruss; 946 947 ret = pruss_request_mem_region(pruss, PRUSS_MEM_SHRD_RAM2, 948 &prueth->shram); 949 if (ret) { 950 dev_err(dev, "unable to get PRUSS SHRD RAM2: %d\n", ret); 951 goto put_pruss; 952 } 953 954 prueth->sram_pool = of_gen_pool_get(np, "sram", 0); 955 if (!prueth->sram_pool) { 956 dev_err(dev, "unable to get SRAM pool\n"); 957 ret = -ENODEV; 958 959 goto put_mem; 960 } 961 962 msmc_ram_size = MSMC_RAM_SIZE; 963 964 /* NOTE: FW bug needs buffer base to be 64KB aligned */ 965 prueth->msmcram.va = 966 (void __iomem *)gen_pool_alloc_algo(prueth->sram_pool, 967 msmc_ram_size, 968 gen_pool_first_fit_align, 969 &gp_data); 970 971 if (!prueth->msmcram.va) { 972 ret = -ENOMEM; 973 dev_err(dev, "unable to allocate MSMC resource\n"); 974 goto put_mem; 975 } 976 prueth->msmcram.pa = gen_pool_virt_to_phys(prueth->sram_pool, 977 (unsigned long)prueth->msmcram.va); 978 prueth->msmcram.size = msmc_ram_size; 979 memset_io(prueth->msmcram.va, 0, msmc_ram_size); 980 dev_dbg(dev, "sram: pa %llx va %p size %zx\n", prueth->msmcram.pa, 981 prueth->msmcram.va, prueth->msmcram.size); 982 983 prueth->iep0 = icss_iep_get_idx(np, 0); 984 if (IS_ERR(prueth->iep0)) { 985 ret = dev_err_probe(dev, PTR_ERR(prueth->iep0), "iep0 get failed\n"); 986 prueth->iep0 = NULL; 987 goto free_pool; 988 } 989 990 prueth->iep1 = icss_iep_get_idx(np, 1); 991 if (IS_ERR(prueth->iep1)) { 992 ret = dev_err_probe(dev, PTR_ERR(prueth->iep1), "iep1 get failed\n"); 993 goto put_iep0; 994 } 995 996 if (prueth->pdata.quirk_10m_link_issue) { 997 /* Enable IEP1 for FW in 64bit mode as W/A for 10M FD link detect issue under TX 998 * traffic. 999 */ 1000 icss_iep_init_fw(prueth->iep1); 1001 } 1002 1003 /* setup netdev interfaces */ 1004 if (eth0_node) { 1005 ret = prueth_netdev_init(prueth, eth0_node); 1006 if (ret) { 1007 dev_err_probe(dev, ret, "netdev init %s failed\n", 1008 eth0_node->name); 1009 goto exit_iep; 1010 } 1011 1012 if (of_find_property(eth0_node, "ti,half-duplex-capable", NULL)) 1013 prueth->emac[PRUETH_MAC0]->half_duplex = 1; 1014 1015 prueth->emac[PRUETH_MAC0]->iep = prueth->iep0; 1016 } 1017 1018 if (eth1_node) { 1019 ret = prueth_netdev_init(prueth, eth1_node); 1020 if (ret) { 1021 dev_err_probe(dev, ret, "netdev init %s failed\n", 1022 eth1_node->name); 1023 goto netdev_exit; 1024 } 1025 1026 if (of_find_property(eth1_node, "ti,half-duplex-capable", NULL)) 1027 prueth->emac[PRUETH_MAC1]->half_duplex = 1; 1028 1029 prueth->emac[PRUETH_MAC1]->iep = prueth->iep0; 1030 } 1031 1032 /* register the network devices */ 1033 if (eth0_node) { 1034 ret = register_netdev(prueth->emac[PRUETH_MAC0]->ndev); 1035 if (ret) { 1036 dev_err(dev, "can't register netdev for port MII0"); 1037 goto netdev_exit; 1038 } 1039 1040 prueth->registered_netdevs[PRUETH_MAC0] = prueth->emac[PRUETH_MAC0]->ndev; 1041 1042 ret = emac_phy_connect(prueth->emac[PRUETH_MAC0]); 1043 if (ret) { 1044 dev_err(dev, 1045 "can't connect to MII0 PHY, error -%d", ret); 1046 goto netdev_unregister; 1047 } 1048 phy_attached_info(prueth->emac[PRUETH_MAC0]->ndev->phydev); 1049 } 1050 1051 if (eth1_node) { 1052 ret = register_netdev(prueth->emac[PRUETH_MAC1]->ndev); 1053 if (ret) { 1054 dev_err(dev, "can't register netdev for port MII1"); 1055 goto netdev_unregister; 1056 } 1057 1058 prueth->registered_netdevs[PRUETH_MAC1] = prueth->emac[PRUETH_MAC1]->ndev; 1059 ret = emac_phy_connect(prueth->emac[PRUETH_MAC1]); 1060 if (ret) { 1061 dev_err(dev, 1062 "can't connect to MII1 PHY, error %d", ret); 1063 goto netdev_unregister; 1064 } 1065 phy_attached_info(prueth->emac[PRUETH_MAC1]->ndev->phydev); 1066 } 1067 1068 dev_info(dev, "TI PRU ethernet driver initialized: %s EMAC mode\n", 1069 (!eth0_node || !eth1_node) ? "single" : "dual"); 1070 1071 if (eth1_node) 1072 of_node_put(eth1_node); 1073 if (eth0_node) 1074 of_node_put(eth0_node); 1075 return 0; 1076 1077 netdev_unregister: 1078 for (i = 0; i < PRUETH_NUM_MACS; i++) { 1079 if (!prueth->registered_netdevs[i]) 1080 continue; 1081 if (prueth->emac[i]->ndev->phydev) { 1082 phy_disconnect(prueth->emac[i]->ndev->phydev); 1083 prueth->emac[i]->ndev->phydev = NULL; 1084 } 1085 unregister_netdev(prueth->registered_netdevs[i]); 1086 } 1087 1088 netdev_exit: 1089 for (i = 0; i < PRUETH_NUM_MACS; i++) { 1090 eth_node = prueth->eth_node[i]; 1091 if (!eth_node) 1092 continue; 1093 1094 prueth_netdev_exit(prueth, eth_node); 1095 } 1096 1097 exit_iep: 1098 if (prueth->pdata.quirk_10m_link_issue) 1099 icss_iep_exit_fw(prueth->iep1); 1100 icss_iep_put(prueth->iep1); 1101 1102 put_iep0: 1103 icss_iep_put(prueth->iep0); 1104 prueth->iep0 = NULL; 1105 prueth->iep1 = NULL; 1106 1107 free_pool: 1108 gen_pool_free(prueth->sram_pool, 1109 (unsigned long)prueth->msmcram.va, msmc_ram_size); 1110 1111 put_mem: 1112 pruss_release_mem_region(prueth->pruss, &prueth->shram); 1113 1114 put_pruss: 1115 pruss_put(prueth->pruss); 1116 1117 put_cores: 1118 if (eth1_node) { 1119 prueth_put_cores(prueth, ICSS_SLICE1); 1120 of_node_put(eth1_node); 1121 } 1122 1123 if (eth0_node) { 1124 prueth_put_cores(prueth, ICSS_SLICE0); 1125 of_node_put(eth0_node); 1126 } 1127 1128 return ret; 1129 } 1130 1131 static void prueth_remove(struct platform_device *pdev) 1132 { 1133 struct prueth *prueth = platform_get_drvdata(pdev); 1134 struct device_node *eth_node; 1135 int i; 1136 1137 for (i = 0; i < PRUETH_NUM_MACS; i++) { 1138 if (!prueth->registered_netdevs[i]) 1139 continue; 1140 phy_stop(prueth->emac[i]->ndev->phydev); 1141 phy_disconnect(prueth->emac[i]->ndev->phydev); 1142 prueth->emac[i]->ndev->phydev = NULL; 1143 unregister_netdev(prueth->registered_netdevs[i]); 1144 } 1145 1146 for (i = 0; i < PRUETH_NUM_MACS; i++) { 1147 eth_node = prueth->eth_node[i]; 1148 if (!eth_node) 1149 continue; 1150 1151 prueth_netdev_exit(prueth, eth_node); 1152 } 1153 1154 if (prueth->pdata.quirk_10m_link_issue) 1155 icss_iep_exit_fw(prueth->iep1); 1156 1157 icss_iep_put(prueth->iep1); 1158 icss_iep_put(prueth->iep0); 1159 1160 gen_pool_free(prueth->sram_pool, 1161 (unsigned long)prueth->msmcram.va, 1162 MSMC_RAM_SIZE); 1163 1164 pruss_release_mem_region(prueth->pruss, &prueth->shram); 1165 1166 pruss_put(prueth->pruss); 1167 1168 if (prueth->eth_node[PRUETH_MAC1]) 1169 prueth_put_cores(prueth, ICSS_SLICE1); 1170 1171 if (prueth->eth_node[PRUETH_MAC0]) 1172 prueth_put_cores(prueth, ICSS_SLICE0); 1173 } 1174 1175 static const struct prueth_pdata am654_icssg_pdata = { 1176 .fdqring_mode = K3_RINGACC_RING_MODE_MESSAGE, 1177 .quirk_10m_link_issue = 1, 1178 }; 1179 1180 static const struct prueth_pdata am64x_icssg_pdata = { 1181 .fdqring_mode = K3_RINGACC_RING_MODE_RING, 1182 }; 1183 1184 static const struct of_device_id prueth_dt_match[] = { 1185 { .compatible = "ti,am654-icssg-prueth", .data = &am654_icssg_pdata }, 1186 { .compatible = "ti,am642-icssg-prueth", .data = &am64x_icssg_pdata }, 1187 { /* sentinel */ } 1188 }; 1189 MODULE_DEVICE_TABLE(of, prueth_dt_match); 1190 1191 static struct platform_driver prueth_driver = { 1192 .probe = prueth_probe, 1193 .remove_new = prueth_remove, 1194 .driver = { 1195 .name = "icssg-prueth", 1196 .of_match_table = prueth_dt_match, 1197 .pm = &prueth_dev_pm_ops, 1198 }, 1199 }; 1200 module_platform_driver(prueth_driver); 1201 1202 MODULE_AUTHOR("Roger Quadros <rogerq@ti.com>"); 1203 MODULE_AUTHOR("Md Danish Anwar <danishanwar@ti.com>"); 1204 MODULE_DESCRIPTION("PRUSS ICSSG Ethernet Driver"); 1205 MODULE_LICENSE("GPL"); 1206