1 // SPDX-License-Identifier: GPL-2.0 2 3 /* Texas Instruments ICSSG Ethernet Driver 4 * 5 * Copyright (C) 2018-2022 Texas Instruments Incorporated - https://www.ti.com/ 6 * 7 */ 8 9 #include <linux/bitops.h> 10 #include <linux/clk.h> 11 #include <linux/delay.h> 12 #include <linux/dma-mapping.h> 13 #include <linux/dma/ti-cppi5.h> 14 #include <linux/etherdevice.h> 15 #include <linux/genalloc.h> 16 #include <linux/if_vlan.h> 17 #include <linux/interrupt.h> 18 #include <linux/kernel.h> 19 #include <linux/mfd/syscon.h> 20 #include <linux/module.h> 21 #include <linux/of.h> 22 #include <linux/of_mdio.h> 23 #include <linux/of_net.h> 24 #include <linux/platform_device.h> 25 #include <linux/phy.h> 26 #include <linux/property.h> 27 #include <linux/remoteproc/pruss.h> 28 #include <linux/regmap.h> 29 #include <linux/remoteproc.h> 30 #include <net/switchdev.h> 31 32 #include "icssg_prueth.h" 33 #include "icssg_mii_rt.h" 34 #include "icssg_switchdev.h" 35 #include "../k3-cppi-desc-pool.h" 36 37 #define PRUETH_MODULE_DESCRIPTION "PRUSS ICSSG Ethernet driver" 38 39 #define DEFAULT_VID 1 40 #define DEFAULT_PORT_MASK 1 41 #define DEFAULT_UNTAG_MASK 1 42 43 /* CTRLMMR_ICSSG_RGMII_CTRL register bits */ 44 #define ICSSG_CTRL_RGMII_ID_MODE BIT(24) 45 46 static int emac_get_tx_ts(struct prueth_emac *emac, 47 struct emac_tx_ts_response *rsp) 48 { 49 struct prueth *prueth = emac->prueth; 50 int slice = prueth_emac_slice(emac); 51 int addr; 52 53 addr = icssg_queue_pop(prueth, slice == 0 ? 54 ICSSG_TS_POP_SLICE0 : ICSSG_TS_POP_SLICE1); 55 if (addr < 0) 56 return addr; 57 58 memcpy_fromio(rsp, prueth->shram.va + addr, sizeof(*rsp)); 59 /* return buffer back for to pool */ 60 icssg_queue_push(prueth, slice == 0 ? 61 ICSSG_TS_PUSH_SLICE0 : ICSSG_TS_PUSH_SLICE1, addr); 62 63 return 0; 64 } 65 66 static void tx_ts_work(struct prueth_emac *emac) 67 { 68 struct skb_shared_hwtstamps ssh; 69 struct emac_tx_ts_response tsr; 70 struct sk_buff *skb; 71 int ret = 0; 72 u32 hi_sw; 73 u64 ns; 74 75 /* There may be more than one pending requests */ 76 while (1) { 77 ret = emac_get_tx_ts(emac, &tsr); 78 if (ret) /* nothing more */ 79 break; 80 81 if (tsr.cookie >= PRUETH_MAX_TX_TS_REQUESTS || 82 !emac->tx_ts_skb[tsr.cookie]) { 83 netdev_err(emac->ndev, "Invalid TX TS cookie 0x%x\n", 84 tsr.cookie); 85 break; 86 } 87 88 skb = emac->tx_ts_skb[tsr.cookie]; 89 emac->tx_ts_skb[tsr.cookie] = NULL; /* free slot */ 90 if (!skb) { 91 netdev_err(emac->ndev, "Driver Bug! got NULL skb\n"); 92 break; 93 } 94 95 hi_sw = readl(emac->prueth->shram.va + 96 TIMESYNC_FW_WC_COUNT_HI_SW_OFFSET_OFFSET); 97 ns = icssg_ts_to_ns(hi_sw, tsr.hi_ts, tsr.lo_ts, 98 IEP_DEFAULT_CYCLE_TIME_NS); 99 100 memset(&ssh, 0, sizeof(ssh)); 101 ssh.hwtstamp = ns_to_ktime(ns); 102 103 skb_tstamp_tx(skb, &ssh); 104 dev_consume_skb_any(skb); 105 106 if (atomic_dec_and_test(&emac->tx_ts_pending)) /* no more? */ 107 break; 108 } 109 } 110 111 static irqreturn_t prueth_tx_ts_irq(int irq, void *dev_id) 112 { 113 struct prueth_emac *emac = dev_id; 114 115 /* currently only TX timestamp is being returned */ 116 tx_ts_work(emac); 117 118 return IRQ_HANDLED; 119 } 120 121 static struct icssg_firmwares icssg_switch_firmwares[] = { 122 { 123 .pru = "ti-pruss/am65x-sr2-pru0-prusw-fw.elf", 124 .rtu = "ti-pruss/am65x-sr2-rtu0-prusw-fw.elf", 125 .txpru = "ti-pruss/am65x-sr2-txpru0-prusw-fw.elf", 126 }, 127 { 128 .pru = "ti-pruss/am65x-sr2-pru1-prusw-fw.elf", 129 .rtu = "ti-pruss/am65x-sr2-rtu1-prusw-fw.elf", 130 .txpru = "ti-pruss/am65x-sr2-txpru1-prusw-fw.elf", 131 } 132 }; 133 134 static struct icssg_firmwares icssg_emac_firmwares[] = { 135 { 136 .pru = "ti-pruss/am65x-sr2-pru0-prueth-fw.elf", 137 .rtu = "ti-pruss/am65x-sr2-rtu0-prueth-fw.elf", 138 .txpru = "ti-pruss/am65x-sr2-txpru0-prueth-fw.elf", 139 }, 140 { 141 .pru = "ti-pruss/am65x-sr2-pru1-prueth-fw.elf", 142 .rtu = "ti-pruss/am65x-sr2-rtu1-prueth-fw.elf", 143 .txpru = "ti-pruss/am65x-sr2-txpru1-prueth-fw.elf", 144 } 145 }; 146 147 static int prueth_emac_start(struct prueth *prueth, struct prueth_emac *emac) 148 { 149 struct icssg_firmwares *firmwares; 150 struct device *dev = prueth->dev; 151 int slice, ret; 152 153 if (prueth->is_switch_mode) 154 firmwares = icssg_switch_firmwares; 155 else 156 firmwares = icssg_emac_firmwares; 157 158 slice = prueth_emac_slice(emac); 159 if (slice < 0) { 160 netdev_err(emac->ndev, "invalid port\n"); 161 return -EINVAL; 162 } 163 164 ret = icssg_config(prueth, emac, slice); 165 if (ret) 166 return ret; 167 168 ret = rproc_set_firmware(prueth->pru[slice], firmwares[slice].pru); 169 ret = rproc_boot(prueth->pru[slice]); 170 if (ret) { 171 dev_err(dev, "failed to boot PRU%d: %d\n", slice, ret); 172 return -EINVAL; 173 } 174 175 ret = rproc_set_firmware(prueth->rtu[slice], firmwares[slice].rtu); 176 ret = rproc_boot(prueth->rtu[slice]); 177 if (ret) { 178 dev_err(dev, "failed to boot RTU%d: %d\n", slice, ret); 179 goto halt_pru; 180 } 181 182 ret = rproc_set_firmware(prueth->txpru[slice], firmwares[slice].txpru); 183 ret = rproc_boot(prueth->txpru[slice]); 184 if (ret) { 185 dev_err(dev, "failed to boot TX_PRU%d: %d\n", slice, ret); 186 goto halt_rtu; 187 } 188 189 emac->fw_running = 1; 190 return 0; 191 192 halt_rtu: 193 rproc_shutdown(prueth->rtu[slice]); 194 195 halt_pru: 196 rproc_shutdown(prueth->pru[slice]); 197 198 return ret; 199 } 200 201 /* called back by PHY layer if there is change in link state of hw port*/ 202 static void emac_adjust_link(struct net_device *ndev) 203 { 204 struct prueth_emac *emac = netdev_priv(ndev); 205 struct phy_device *phydev = ndev->phydev; 206 struct prueth *prueth = emac->prueth; 207 bool new_state = false; 208 unsigned long flags; 209 210 if (phydev->link) { 211 /* check the mode of operation - full/half duplex */ 212 if (phydev->duplex != emac->duplex) { 213 new_state = true; 214 emac->duplex = phydev->duplex; 215 } 216 if (phydev->speed != emac->speed) { 217 new_state = true; 218 emac->speed = phydev->speed; 219 } 220 if (!emac->link) { 221 new_state = true; 222 emac->link = 1; 223 } 224 } else if (emac->link) { 225 new_state = true; 226 emac->link = 0; 227 228 /* f/w should support 100 & 1000 */ 229 emac->speed = SPEED_1000; 230 231 /* half duplex may not be supported by f/w */ 232 emac->duplex = DUPLEX_FULL; 233 } 234 235 if (new_state) { 236 phy_print_status(phydev); 237 238 /* update RGMII and MII configuration based on PHY negotiated 239 * values 240 */ 241 if (emac->link) { 242 if (emac->duplex == DUPLEX_HALF) 243 icssg_config_half_duplex(emac); 244 /* Set the RGMII cfg for gig en and full duplex */ 245 icssg_update_rgmii_cfg(prueth->miig_rt, emac); 246 247 /* update the Tx IPG based on 100M/1G speed */ 248 spin_lock_irqsave(&emac->lock, flags); 249 icssg_config_ipg(emac); 250 spin_unlock_irqrestore(&emac->lock, flags); 251 icssg_config_set_speed(emac); 252 icssg_set_port_state(emac, ICSSG_EMAC_PORT_FORWARD); 253 254 } else { 255 icssg_set_port_state(emac, ICSSG_EMAC_PORT_DISABLE); 256 } 257 } 258 259 if (emac->link) { 260 /* reactivate the transmit queue */ 261 netif_tx_wake_all_queues(ndev); 262 } else { 263 netif_tx_stop_all_queues(ndev); 264 prueth_cleanup_tx_ts(emac); 265 } 266 } 267 268 static enum hrtimer_restart emac_rx_timer_callback(struct hrtimer *timer) 269 { 270 struct prueth_emac *emac = 271 container_of(timer, struct prueth_emac, rx_hrtimer); 272 int rx_flow = PRUETH_RX_FLOW_DATA; 273 274 enable_irq(emac->rx_chns.irq[rx_flow]); 275 return HRTIMER_NORESTART; 276 } 277 278 static int emac_phy_connect(struct prueth_emac *emac) 279 { 280 struct prueth *prueth = emac->prueth; 281 struct net_device *ndev = emac->ndev; 282 /* connect PHY */ 283 ndev->phydev = of_phy_connect(emac->ndev, emac->phy_node, 284 &emac_adjust_link, 0, 285 emac->phy_if); 286 if (!ndev->phydev) { 287 dev_err(prueth->dev, "couldn't connect to phy %s\n", 288 emac->phy_node->full_name); 289 return -ENODEV; 290 } 291 292 if (!emac->half_duplex) { 293 dev_dbg(prueth->dev, "half duplex mode is not supported\n"); 294 phy_remove_link_mode(ndev->phydev, ETHTOOL_LINK_MODE_10baseT_Half_BIT); 295 phy_remove_link_mode(ndev->phydev, ETHTOOL_LINK_MODE_100baseT_Half_BIT); 296 } 297 298 /* remove unsupported modes */ 299 phy_remove_link_mode(ndev->phydev, ETHTOOL_LINK_MODE_1000baseT_Half_BIT); 300 phy_remove_link_mode(ndev->phydev, ETHTOOL_LINK_MODE_Pause_BIT); 301 phy_remove_link_mode(ndev->phydev, ETHTOOL_LINK_MODE_Asym_Pause_BIT); 302 303 if (emac->phy_if == PHY_INTERFACE_MODE_MII) 304 phy_set_max_speed(ndev->phydev, SPEED_100); 305 306 return 0; 307 } 308 309 static u64 prueth_iep_gettime(void *clockops_data, struct ptp_system_timestamp *sts) 310 { 311 u32 hi_rollover_count, hi_rollover_count_r; 312 struct prueth_emac *emac = clockops_data; 313 struct prueth *prueth = emac->prueth; 314 void __iomem *fw_hi_r_count_addr; 315 void __iomem *fw_count_hi_addr; 316 u32 iepcount_hi, iepcount_hi_r; 317 unsigned long flags; 318 u32 iepcount_lo; 319 u64 ts = 0; 320 321 fw_count_hi_addr = prueth->shram.va + TIMESYNC_FW_WC_COUNT_HI_SW_OFFSET_OFFSET; 322 fw_hi_r_count_addr = prueth->shram.va + TIMESYNC_FW_WC_HI_ROLLOVER_COUNT_OFFSET; 323 324 local_irq_save(flags); 325 do { 326 iepcount_hi = icss_iep_get_count_hi(emac->iep); 327 iepcount_hi += readl(fw_count_hi_addr); 328 hi_rollover_count = readl(fw_hi_r_count_addr); 329 ptp_read_system_prets(sts); 330 iepcount_lo = icss_iep_get_count_low(emac->iep); 331 ptp_read_system_postts(sts); 332 333 iepcount_hi_r = icss_iep_get_count_hi(emac->iep); 334 iepcount_hi_r += readl(fw_count_hi_addr); 335 hi_rollover_count_r = readl(fw_hi_r_count_addr); 336 } while ((iepcount_hi_r != iepcount_hi) || 337 (hi_rollover_count != hi_rollover_count_r)); 338 local_irq_restore(flags); 339 340 ts = ((u64)hi_rollover_count) << 23 | iepcount_hi; 341 ts = ts * (u64)IEP_DEFAULT_CYCLE_TIME_NS + iepcount_lo; 342 343 return ts; 344 } 345 346 static void prueth_iep_settime(void *clockops_data, u64 ns) 347 { 348 struct icssg_setclock_desc __iomem *sc_descp; 349 struct prueth_emac *emac = clockops_data; 350 struct icssg_setclock_desc sc_desc; 351 u64 cyclecount; 352 u32 cycletime; 353 int timeout; 354 355 if (!emac->fw_running) 356 return; 357 358 sc_descp = emac->prueth->shram.va + TIMESYNC_FW_WC_SETCLOCK_DESC_OFFSET; 359 360 cycletime = IEP_DEFAULT_CYCLE_TIME_NS; 361 cyclecount = ns / cycletime; 362 363 memset(&sc_desc, 0, sizeof(sc_desc)); 364 sc_desc.margin = cycletime - 1000; 365 sc_desc.cyclecounter0_set = cyclecount & GENMASK(31, 0); 366 sc_desc.cyclecounter1_set = (cyclecount & GENMASK(63, 32)) >> 32; 367 sc_desc.iepcount_set = ns % cycletime; 368 /* Count from 0 to (cycle time) - emac->iep->def_inc */ 369 sc_desc.CMP0_current = cycletime - emac->iep->def_inc; 370 371 memcpy_toio(sc_descp, &sc_desc, sizeof(sc_desc)); 372 373 writeb(1, &sc_descp->request); 374 375 timeout = 5; /* fw should take 2-3 ms */ 376 while (timeout--) { 377 if (readb(&sc_descp->acknowledgment)) 378 return; 379 380 usleep_range(500, 1000); 381 } 382 383 dev_err(emac->prueth->dev, "settime timeout\n"); 384 } 385 386 static int prueth_perout_enable(void *clockops_data, 387 struct ptp_perout_request *req, int on, 388 u64 *cmp) 389 { 390 struct prueth_emac *emac = clockops_data; 391 u32 reduction_factor = 0, offset = 0; 392 struct timespec64 ts; 393 u64 ns_period; 394 395 if (!on) 396 return 0; 397 398 /* Any firmware specific stuff for PPS/PEROUT handling */ 399 ts.tv_sec = req->period.sec; 400 ts.tv_nsec = req->period.nsec; 401 ns_period = timespec64_to_ns(&ts); 402 403 /* f/w doesn't support period less than cycle time */ 404 if (ns_period < IEP_DEFAULT_CYCLE_TIME_NS) 405 return -ENXIO; 406 407 reduction_factor = ns_period / IEP_DEFAULT_CYCLE_TIME_NS; 408 offset = ns_period % IEP_DEFAULT_CYCLE_TIME_NS; 409 410 /* f/w requires at least 1uS within a cycle so CMP 411 * can trigger after SYNC is enabled 412 */ 413 if (offset < 5 * NSEC_PER_USEC) 414 offset = 5 * NSEC_PER_USEC; 415 416 /* if offset is close to cycle time then we will miss 417 * the CMP event for last tick when IEP rolls over. 418 * In normal mode, IEP tick is 4ns. 419 * In slow compensation it could be 0ns or 8ns at 420 * every slow compensation cycle. 421 */ 422 if (offset > IEP_DEFAULT_CYCLE_TIME_NS - 8) 423 offset = IEP_DEFAULT_CYCLE_TIME_NS - 8; 424 425 /* we're in shadow mode so need to set upper 32-bits */ 426 *cmp = (u64)offset << 32; 427 428 writel(reduction_factor, emac->prueth->shram.va + 429 TIMESYNC_FW_WC_SYNCOUT_REDUCTION_FACTOR_OFFSET); 430 431 writel(0, emac->prueth->shram.va + 432 TIMESYNC_FW_WC_SYNCOUT_START_TIME_CYCLECOUNT_OFFSET); 433 434 return 0; 435 } 436 437 const struct icss_iep_clockops prueth_iep_clockops = { 438 .settime = prueth_iep_settime, 439 .gettime = prueth_iep_gettime, 440 .perout_enable = prueth_perout_enable, 441 }; 442 443 static int icssg_prueth_add_mcast(struct net_device *ndev, const u8 *addr) 444 { 445 struct prueth_emac *emac = netdev_priv(ndev); 446 int port_mask = BIT(emac->port_id); 447 448 port_mask |= icssg_fdb_lookup(emac, addr, 0); 449 icssg_fdb_add_del(emac, addr, 0, port_mask, true); 450 icssg_vtbl_modify(emac, 0, port_mask, port_mask, true); 451 452 return 0; 453 } 454 455 static int icssg_prueth_del_mcast(struct net_device *ndev, const u8 *addr) 456 { 457 struct prueth_emac *emac = netdev_priv(ndev); 458 int port_mask = BIT(emac->port_id); 459 int other_port_mask; 460 461 other_port_mask = port_mask ^ icssg_fdb_lookup(emac, addr, 0); 462 463 icssg_fdb_add_del(emac, addr, 0, port_mask, false); 464 icssg_vtbl_modify(emac, 0, port_mask, port_mask, false); 465 466 if (other_port_mask) { 467 icssg_fdb_add_del(emac, addr, 0, other_port_mask, true); 468 icssg_vtbl_modify(emac, 0, other_port_mask, other_port_mask, true); 469 } 470 471 return 0; 472 } 473 474 /** 475 * emac_ndo_open - EMAC device open 476 * @ndev: network adapter device 477 * 478 * Called when system wants to start the interface. 479 * 480 * Return: 0 for a successful open, or appropriate error code 481 */ 482 static int emac_ndo_open(struct net_device *ndev) 483 { 484 struct prueth_emac *emac = netdev_priv(ndev); 485 int ret, i, num_data_chn = emac->tx_ch_num; 486 struct prueth *prueth = emac->prueth; 487 int slice = prueth_emac_slice(emac); 488 struct device *dev = prueth->dev; 489 int max_rx_flows; 490 int rx_flow; 491 492 /* clear SMEM and MSMC settings for all slices */ 493 if (!prueth->emacs_initialized) { 494 memset_io(prueth->msmcram.va, 0, prueth->msmcram.size); 495 memset_io(prueth->shram.va, 0, ICSSG_CONFIG_OFFSET_SLICE1 * PRUETH_NUM_MACS); 496 } 497 498 /* set h/w MAC as user might have re-configured */ 499 ether_addr_copy(emac->mac_addr, ndev->dev_addr); 500 501 icssg_class_set_mac_addr(prueth->miig_rt, slice, emac->mac_addr); 502 icssg_class_default(prueth->miig_rt, slice, 0, false); 503 icssg_ft1_set_mac_addr(prueth->miig_rt, slice, emac->mac_addr); 504 505 /* Notify the stack of the actual queue counts. */ 506 ret = netif_set_real_num_tx_queues(ndev, num_data_chn); 507 if (ret) { 508 dev_err(dev, "cannot set real number of tx queues\n"); 509 return ret; 510 } 511 512 init_completion(&emac->cmd_complete); 513 ret = prueth_init_tx_chns(emac); 514 if (ret) { 515 dev_err(dev, "failed to init tx channel: %d\n", ret); 516 return ret; 517 } 518 519 max_rx_flows = PRUETH_MAX_RX_FLOWS; 520 ret = prueth_init_rx_chns(emac, &emac->rx_chns, "rx", 521 max_rx_flows, PRUETH_MAX_RX_DESC); 522 if (ret) { 523 dev_err(dev, "failed to init rx channel: %d\n", ret); 524 goto cleanup_tx; 525 } 526 527 ret = prueth_ndev_add_tx_napi(emac); 528 if (ret) 529 goto cleanup_rx; 530 531 /* we use only the highest priority flow for now i.e. @irq[3] */ 532 rx_flow = PRUETH_RX_FLOW_DATA; 533 ret = request_irq(emac->rx_chns.irq[rx_flow], prueth_rx_irq, 534 IRQF_TRIGGER_HIGH, dev_name(dev), emac); 535 if (ret) { 536 dev_err(dev, "unable to request RX IRQ\n"); 537 goto cleanup_napi; 538 } 539 540 /* reset and start PRU firmware */ 541 ret = prueth_emac_start(prueth, emac); 542 if (ret) 543 goto free_rx_irq; 544 545 icssg_mii_update_mtu(prueth->mii_rt, slice, ndev->max_mtu); 546 547 if (!prueth->emacs_initialized) { 548 ret = icss_iep_init(emac->iep, &prueth_iep_clockops, 549 emac, IEP_DEFAULT_CYCLE_TIME_NS); 550 } 551 552 ret = request_threaded_irq(emac->tx_ts_irq, NULL, prueth_tx_ts_irq, 553 IRQF_ONESHOT, dev_name(dev), emac); 554 if (ret) 555 goto stop; 556 557 /* Prepare RX */ 558 ret = prueth_prepare_rx_chan(emac, &emac->rx_chns, PRUETH_MAX_PKT_SIZE); 559 if (ret) 560 goto free_tx_ts_irq; 561 562 ret = k3_udma_glue_enable_rx_chn(emac->rx_chns.rx_chn); 563 if (ret) 564 goto reset_rx_chn; 565 566 for (i = 0; i < emac->tx_ch_num; i++) { 567 ret = k3_udma_glue_enable_tx_chn(emac->tx_chns[i].tx_chn); 568 if (ret) 569 goto reset_tx_chan; 570 } 571 572 /* Enable NAPI in Tx and Rx direction */ 573 for (i = 0; i < emac->tx_ch_num; i++) 574 napi_enable(&emac->tx_chns[i].napi_tx); 575 napi_enable(&emac->napi_rx); 576 577 /* start PHY */ 578 phy_start(ndev->phydev); 579 580 prueth->emacs_initialized++; 581 582 queue_work(system_long_wq, &emac->stats_work.work); 583 584 return 0; 585 586 reset_tx_chan: 587 /* Since interface is not yet up, there is wouldn't be 588 * any SKB for completion. So set false to free_skb 589 */ 590 prueth_reset_tx_chan(emac, i, false); 591 reset_rx_chn: 592 prueth_reset_rx_chan(&emac->rx_chns, max_rx_flows, false); 593 free_tx_ts_irq: 594 free_irq(emac->tx_ts_irq, emac); 595 stop: 596 prueth_emac_stop(emac); 597 free_rx_irq: 598 free_irq(emac->rx_chns.irq[rx_flow], emac); 599 cleanup_napi: 600 prueth_ndev_del_tx_napi(emac, emac->tx_ch_num); 601 cleanup_rx: 602 prueth_cleanup_rx_chns(emac, &emac->rx_chns, max_rx_flows); 603 cleanup_tx: 604 prueth_cleanup_tx_chns(emac); 605 606 return ret; 607 } 608 609 /** 610 * emac_ndo_stop - EMAC device stop 611 * @ndev: network adapter device 612 * 613 * Called when system wants to stop or down the interface. 614 * 615 * Return: Always 0 (Success) 616 */ 617 static int emac_ndo_stop(struct net_device *ndev) 618 { 619 struct prueth_emac *emac = netdev_priv(ndev); 620 struct prueth *prueth = emac->prueth; 621 int rx_flow = PRUETH_RX_FLOW_DATA; 622 int max_rx_flows; 623 int ret, i; 624 625 /* inform the upper layers. */ 626 netif_tx_stop_all_queues(ndev); 627 628 /* block packets from wire */ 629 if (ndev->phydev) 630 phy_stop(ndev->phydev); 631 632 icssg_class_disable(prueth->miig_rt, prueth_emac_slice(emac)); 633 634 __dev_mc_unsync(ndev, icssg_prueth_del_mcast); 635 636 atomic_set(&emac->tdown_cnt, emac->tx_ch_num); 637 /* ensure new tdown_cnt value is visible */ 638 smp_mb__after_atomic(); 639 /* tear down and disable UDMA channels */ 640 reinit_completion(&emac->tdown_complete); 641 for (i = 0; i < emac->tx_ch_num; i++) 642 k3_udma_glue_tdown_tx_chn(emac->tx_chns[i].tx_chn, false); 643 644 ret = wait_for_completion_timeout(&emac->tdown_complete, 645 msecs_to_jiffies(1000)); 646 if (!ret) 647 netdev_err(ndev, "tx teardown timeout\n"); 648 649 prueth_reset_tx_chan(emac, emac->tx_ch_num, true); 650 for (i = 0; i < emac->tx_ch_num; i++) { 651 napi_disable(&emac->tx_chns[i].napi_tx); 652 hrtimer_cancel(&emac->tx_chns[i].tx_hrtimer); 653 } 654 655 max_rx_flows = PRUETH_MAX_RX_FLOWS; 656 k3_udma_glue_tdown_rx_chn(emac->rx_chns.rx_chn, true); 657 658 prueth_reset_rx_chan(&emac->rx_chns, max_rx_flows, true); 659 660 napi_disable(&emac->napi_rx); 661 hrtimer_cancel(&emac->rx_hrtimer); 662 663 cancel_work_sync(&emac->rx_mode_work); 664 665 /* Destroying the queued work in ndo_stop() */ 666 cancel_delayed_work_sync(&emac->stats_work); 667 668 if (prueth->emacs_initialized == 1) 669 icss_iep_exit(emac->iep); 670 671 /* stop PRUs */ 672 prueth_emac_stop(emac); 673 674 free_irq(emac->tx_ts_irq, emac); 675 676 free_irq(emac->rx_chns.irq[rx_flow], emac); 677 prueth_ndev_del_tx_napi(emac, emac->tx_ch_num); 678 679 prueth_cleanup_rx_chns(emac, &emac->rx_chns, max_rx_flows); 680 prueth_cleanup_tx_chns(emac); 681 682 prueth->emacs_initialized--; 683 684 return 0; 685 } 686 687 static void emac_ndo_set_rx_mode_work(struct work_struct *work) 688 { 689 struct prueth_emac *emac = container_of(work, struct prueth_emac, rx_mode_work); 690 struct net_device *ndev = emac->ndev; 691 bool promisc, allmulti; 692 693 if (!netif_running(ndev)) 694 return; 695 696 promisc = ndev->flags & IFF_PROMISC; 697 allmulti = ndev->flags & IFF_ALLMULTI; 698 icssg_set_port_state(emac, ICSSG_EMAC_PORT_UC_FLOODING_DISABLE); 699 icssg_set_port_state(emac, ICSSG_EMAC_PORT_MC_FLOODING_DISABLE); 700 701 if (promisc) { 702 icssg_set_port_state(emac, ICSSG_EMAC_PORT_UC_FLOODING_ENABLE); 703 icssg_set_port_state(emac, ICSSG_EMAC_PORT_MC_FLOODING_ENABLE); 704 return; 705 } 706 707 if (allmulti) { 708 icssg_set_port_state(emac, ICSSG_EMAC_PORT_MC_FLOODING_ENABLE); 709 return; 710 } 711 712 __dev_mc_sync(ndev, icssg_prueth_add_mcast, icssg_prueth_del_mcast); 713 } 714 715 /** 716 * emac_ndo_set_rx_mode - EMAC set receive mode function 717 * @ndev: The EMAC network adapter 718 * 719 * Called when system wants to set the receive mode of the device. 720 * 721 */ 722 static void emac_ndo_set_rx_mode(struct net_device *ndev) 723 { 724 struct prueth_emac *emac = netdev_priv(ndev); 725 726 queue_work(emac->cmd_wq, &emac->rx_mode_work); 727 } 728 729 static const struct net_device_ops emac_netdev_ops = { 730 .ndo_open = emac_ndo_open, 731 .ndo_stop = emac_ndo_stop, 732 .ndo_start_xmit = icssg_ndo_start_xmit, 733 .ndo_set_mac_address = eth_mac_addr, 734 .ndo_validate_addr = eth_validate_addr, 735 .ndo_tx_timeout = icssg_ndo_tx_timeout, 736 .ndo_set_rx_mode = emac_ndo_set_rx_mode, 737 .ndo_eth_ioctl = icssg_ndo_ioctl, 738 .ndo_get_stats64 = icssg_ndo_get_stats64, 739 .ndo_get_phys_port_name = icssg_ndo_get_phys_port_name, 740 }; 741 742 static int prueth_netdev_init(struct prueth *prueth, 743 struct device_node *eth_node) 744 { 745 int ret, num_tx_chn = PRUETH_MAX_TX_QUEUES; 746 struct prueth_emac *emac; 747 struct net_device *ndev; 748 enum prueth_port port; 749 const char *irq_name; 750 enum prueth_mac mac; 751 752 port = prueth_node_port(eth_node); 753 if (port == PRUETH_PORT_INVALID) 754 return -EINVAL; 755 756 mac = prueth_node_mac(eth_node); 757 if (mac == PRUETH_MAC_INVALID) 758 return -EINVAL; 759 760 ndev = alloc_etherdev_mq(sizeof(*emac), num_tx_chn); 761 if (!ndev) 762 return -ENOMEM; 763 764 emac = netdev_priv(ndev); 765 emac->prueth = prueth; 766 emac->ndev = ndev; 767 emac->port_id = port; 768 emac->cmd_wq = create_singlethread_workqueue("icssg_cmd_wq"); 769 if (!emac->cmd_wq) { 770 ret = -ENOMEM; 771 goto free_ndev; 772 } 773 INIT_WORK(&emac->rx_mode_work, emac_ndo_set_rx_mode_work); 774 775 INIT_DELAYED_WORK(&emac->stats_work, icssg_stats_work_handler); 776 777 ret = pruss_request_mem_region(prueth->pruss, 778 port == PRUETH_PORT_MII0 ? 779 PRUSS_MEM_DRAM0 : PRUSS_MEM_DRAM1, 780 &emac->dram); 781 if (ret) { 782 dev_err(prueth->dev, "unable to get DRAM: %d\n", ret); 783 ret = -ENOMEM; 784 goto free_wq; 785 } 786 787 emac->tx_ch_num = 1; 788 789 irq_name = "tx_ts0"; 790 if (emac->port_id == PRUETH_PORT_MII1) 791 irq_name = "tx_ts1"; 792 emac->tx_ts_irq = platform_get_irq_byname_optional(prueth->pdev, irq_name); 793 if (emac->tx_ts_irq < 0) { 794 ret = dev_err_probe(prueth->dev, emac->tx_ts_irq, "could not get tx_ts_irq\n"); 795 goto free; 796 } 797 798 SET_NETDEV_DEV(ndev, prueth->dev); 799 spin_lock_init(&emac->lock); 800 mutex_init(&emac->cmd_lock); 801 802 emac->phy_node = of_parse_phandle(eth_node, "phy-handle", 0); 803 if (!emac->phy_node && !of_phy_is_fixed_link(eth_node)) { 804 dev_err(prueth->dev, "couldn't find phy-handle\n"); 805 ret = -ENODEV; 806 goto free; 807 } else if (of_phy_is_fixed_link(eth_node)) { 808 ret = of_phy_register_fixed_link(eth_node); 809 if (ret) { 810 ret = dev_err_probe(prueth->dev, ret, 811 "failed to register fixed-link phy\n"); 812 goto free; 813 } 814 815 emac->phy_node = eth_node; 816 } 817 818 ret = of_get_phy_mode(eth_node, &emac->phy_if); 819 if (ret) { 820 dev_err(prueth->dev, "could not get phy-mode property\n"); 821 goto free; 822 } 823 824 if (emac->phy_if != PHY_INTERFACE_MODE_MII && 825 !phy_interface_mode_is_rgmii(emac->phy_if)) { 826 dev_err(prueth->dev, "PHY mode unsupported %s\n", phy_modes(emac->phy_if)); 827 ret = -EINVAL; 828 goto free; 829 } 830 831 /* AM65 SR2.0 has TX Internal delay always enabled by hardware 832 * and it is not possible to disable TX Internal delay. The below 833 * switch case block describes how we handle different phy modes 834 * based on hardware restriction. 835 */ 836 switch (emac->phy_if) { 837 case PHY_INTERFACE_MODE_RGMII_ID: 838 emac->phy_if = PHY_INTERFACE_MODE_RGMII_RXID; 839 break; 840 case PHY_INTERFACE_MODE_RGMII_TXID: 841 emac->phy_if = PHY_INTERFACE_MODE_RGMII; 842 break; 843 case PHY_INTERFACE_MODE_RGMII: 844 case PHY_INTERFACE_MODE_RGMII_RXID: 845 dev_err(prueth->dev, "RGMII mode without TX delay is not supported"); 846 ret = -EINVAL; 847 goto free; 848 default: 849 break; 850 } 851 852 /* get mac address from DT and set private and netdev addr */ 853 ret = of_get_ethdev_address(eth_node, ndev); 854 if (!is_valid_ether_addr(ndev->dev_addr)) { 855 eth_hw_addr_random(ndev); 856 dev_warn(prueth->dev, "port %d: using random MAC addr: %pM\n", 857 port, ndev->dev_addr); 858 } 859 ether_addr_copy(emac->mac_addr, ndev->dev_addr); 860 861 ndev->dev.of_node = eth_node; 862 ndev->min_mtu = PRUETH_MIN_PKT_SIZE; 863 ndev->max_mtu = PRUETH_MAX_MTU; 864 ndev->netdev_ops = &emac_netdev_ops; 865 ndev->ethtool_ops = &icssg_ethtool_ops; 866 ndev->hw_features = NETIF_F_SG; 867 ndev->features = ndev->hw_features; 868 869 netif_napi_add(ndev, &emac->napi_rx, icssg_napi_rx_poll); 870 hrtimer_init(&emac->rx_hrtimer, CLOCK_MONOTONIC, 871 HRTIMER_MODE_REL_PINNED); 872 emac->rx_hrtimer.function = &emac_rx_timer_callback; 873 prueth->emac[mac] = emac; 874 875 return 0; 876 877 free: 878 pruss_release_mem_region(prueth->pruss, &emac->dram); 879 free_wq: 880 destroy_workqueue(emac->cmd_wq); 881 free_ndev: 882 emac->ndev = NULL; 883 prueth->emac[mac] = NULL; 884 free_netdev(ndev); 885 886 return ret; 887 } 888 889 bool prueth_dev_check(const struct net_device *ndev) 890 { 891 if (ndev->netdev_ops == &emac_netdev_ops && netif_running(ndev)) { 892 struct prueth_emac *emac = netdev_priv(ndev); 893 894 return emac->prueth->is_switch_mode; 895 } 896 897 return false; 898 } 899 900 static void prueth_offload_fwd_mark_update(struct prueth *prueth) 901 { 902 int set_val = 0; 903 int i; 904 905 if (prueth->br_members == (BIT(PRUETH_PORT_MII0) | BIT(PRUETH_PORT_MII1))) 906 set_val = 1; 907 908 dev_dbg(prueth->dev, "set offload_fwd_mark %d\n", set_val); 909 910 for (i = PRUETH_MAC0; i < PRUETH_NUM_MACS; i++) { 911 struct prueth_emac *emac = prueth->emac[i]; 912 913 if (!emac || !emac->ndev) 914 continue; 915 916 emac->offload_fwd_mark = set_val; 917 } 918 } 919 920 static void prueth_emac_restart(struct prueth *prueth) 921 { 922 struct prueth_emac *emac0 = prueth->emac[PRUETH_MAC0]; 923 struct prueth_emac *emac1 = prueth->emac[PRUETH_MAC1]; 924 925 /* Detach the net_device for both PRUeth ports*/ 926 if (netif_running(emac0->ndev)) 927 netif_device_detach(emac0->ndev); 928 if (netif_running(emac1->ndev)) 929 netif_device_detach(emac1->ndev); 930 931 /* Disable both PRUeth ports */ 932 icssg_set_port_state(emac0, ICSSG_EMAC_PORT_DISABLE); 933 icssg_set_port_state(emac1, ICSSG_EMAC_PORT_DISABLE); 934 935 /* Stop both pru cores for both PRUeth ports*/ 936 prueth_emac_stop(emac0); 937 prueth->emacs_initialized--; 938 prueth_emac_stop(emac1); 939 prueth->emacs_initialized--; 940 941 /* Start both pru cores for both PRUeth ports */ 942 prueth_emac_start(prueth, emac0); 943 prueth->emacs_initialized++; 944 prueth_emac_start(prueth, emac1); 945 prueth->emacs_initialized++; 946 947 /* Enable forwarding for both PRUeth ports */ 948 icssg_set_port_state(emac0, ICSSG_EMAC_PORT_FORWARD); 949 icssg_set_port_state(emac1, ICSSG_EMAC_PORT_FORWARD); 950 951 /* Attache net_device for both PRUeth ports */ 952 netif_device_attach(emac0->ndev); 953 netif_device_attach(emac1->ndev); 954 } 955 956 static void icssg_enable_switch_mode(struct prueth *prueth) 957 { 958 struct prueth_emac *emac; 959 int mac; 960 961 prueth_emac_restart(prueth); 962 963 for (mac = PRUETH_MAC0; mac < PRUETH_NUM_MACS; mac++) { 964 emac = prueth->emac[mac]; 965 if (netif_running(emac->ndev)) { 966 icssg_fdb_add_del(emac, eth_stp_addr, prueth->default_vlan, 967 ICSSG_FDB_ENTRY_P0_MEMBERSHIP | 968 ICSSG_FDB_ENTRY_P1_MEMBERSHIP | 969 ICSSG_FDB_ENTRY_P2_MEMBERSHIP | 970 ICSSG_FDB_ENTRY_BLOCK, 971 true); 972 icssg_vtbl_modify(emac, emac->port_vlan | DEFAULT_VID, 973 BIT(emac->port_id) | DEFAULT_PORT_MASK, 974 BIT(emac->port_id) | DEFAULT_UNTAG_MASK, 975 true); 976 icssg_set_pvid(prueth, emac->port_vlan, emac->port_id); 977 icssg_set_port_state(emac, ICSSG_EMAC_PORT_VLAN_AWARE_ENABLE); 978 } 979 } 980 } 981 982 static int prueth_netdevice_port_link(struct net_device *ndev, 983 struct net_device *br_ndev, 984 struct netlink_ext_ack *extack) 985 { 986 struct prueth_emac *emac = netdev_priv(ndev); 987 struct prueth *prueth = emac->prueth; 988 int err; 989 990 if (!prueth->br_members) { 991 prueth->hw_bridge_dev = br_ndev; 992 } else { 993 /* This is adding the port to a second bridge, this is 994 * unsupported 995 */ 996 if (prueth->hw_bridge_dev != br_ndev) 997 return -EOPNOTSUPP; 998 } 999 1000 err = switchdev_bridge_port_offload(br_ndev, ndev, emac, 1001 &prueth->prueth_switchdev_nb, 1002 &prueth->prueth_switchdev_bl_nb, 1003 false, extack); 1004 if (err) 1005 return err; 1006 1007 prueth->br_members |= BIT(emac->port_id); 1008 1009 if (!prueth->is_switch_mode) { 1010 if (prueth->br_members & BIT(PRUETH_PORT_MII0) && 1011 prueth->br_members & BIT(PRUETH_PORT_MII1)) { 1012 prueth->is_switch_mode = true; 1013 prueth->default_vlan = 1; 1014 emac->port_vlan = prueth->default_vlan; 1015 icssg_enable_switch_mode(prueth); 1016 } 1017 } 1018 1019 prueth_offload_fwd_mark_update(prueth); 1020 1021 return NOTIFY_DONE; 1022 } 1023 1024 static void prueth_netdevice_port_unlink(struct net_device *ndev) 1025 { 1026 struct prueth_emac *emac = netdev_priv(ndev); 1027 struct prueth *prueth = emac->prueth; 1028 1029 prueth->br_members &= ~BIT(emac->port_id); 1030 1031 if (prueth->is_switch_mode) { 1032 prueth->is_switch_mode = false; 1033 emac->port_vlan = 0; 1034 prueth_emac_restart(prueth); 1035 } 1036 1037 prueth_offload_fwd_mark_update(prueth); 1038 1039 if (!prueth->br_members) 1040 prueth->hw_bridge_dev = NULL; 1041 } 1042 1043 /* netdev notifier */ 1044 static int prueth_netdevice_event(struct notifier_block *unused, 1045 unsigned long event, void *ptr) 1046 { 1047 struct netlink_ext_ack *extack = netdev_notifier_info_to_extack(ptr); 1048 struct net_device *ndev = netdev_notifier_info_to_dev(ptr); 1049 struct netdev_notifier_changeupper_info *info; 1050 int ret = NOTIFY_DONE; 1051 1052 if (ndev->netdev_ops != &emac_netdev_ops) 1053 return NOTIFY_DONE; 1054 1055 switch (event) { 1056 case NETDEV_CHANGEUPPER: 1057 info = ptr; 1058 1059 if (netif_is_bridge_master(info->upper_dev)) { 1060 if (info->linking) 1061 ret = prueth_netdevice_port_link(ndev, info->upper_dev, extack); 1062 else 1063 prueth_netdevice_port_unlink(ndev); 1064 } 1065 break; 1066 default: 1067 return NOTIFY_DONE; 1068 } 1069 1070 return notifier_from_errno(ret); 1071 } 1072 1073 static int prueth_register_notifiers(struct prueth *prueth) 1074 { 1075 int ret = 0; 1076 1077 prueth->prueth_netdevice_nb.notifier_call = &prueth_netdevice_event; 1078 ret = register_netdevice_notifier(&prueth->prueth_netdevice_nb); 1079 if (ret) { 1080 dev_err(prueth->dev, "can't register netdevice notifier\n"); 1081 return ret; 1082 } 1083 1084 ret = prueth_switchdev_register_notifiers(prueth); 1085 if (ret) 1086 unregister_netdevice_notifier(&prueth->prueth_netdevice_nb); 1087 1088 return ret; 1089 } 1090 1091 static void prueth_unregister_notifiers(struct prueth *prueth) 1092 { 1093 prueth_switchdev_unregister_notifiers(prueth); 1094 unregister_netdevice_notifier(&prueth->prueth_netdevice_nb); 1095 } 1096 1097 static int prueth_probe(struct platform_device *pdev) 1098 { 1099 struct device_node *eth_node, *eth_ports_node; 1100 struct device_node *eth0_node = NULL; 1101 struct device_node *eth1_node = NULL; 1102 struct genpool_data_align gp_data = { 1103 .align = SZ_64K, 1104 }; 1105 struct device *dev = &pdev->dev; 1106 struct device_node *np; 1107 struct prueth *prueth; 1108 struct pruss *pruss; 1109 u32 msmc_ram_size; 1110 int i, ret; 1111 1112 np = dev->of_node; 1113 1114 prueth = devm_kzalloc(dev, sizeof(*prueth), GFP_KERNEL); 1115 if (!prueth) 1116 return -ENOMEM; 1117 1118 dev_set_drvdata(dev, prueth); 1119 prueth->pdev = pdev; 1120 prueth->pdata = *(const struct prueth_pdata *)device_get_match_data(dev); 1121 1122 prueth->dev = dev; 1123 eth_ports_node = of_get_child_by_name(np, "ethernet-ports"); 1124 if (!eth_ports_node) 1125 return -ENOENT; 1126 1127 for_each_child_of_node(eth_ports_node, eth_node) { 1128 u32 reg; 1129 1130 if (strcmp(eth_node->name, "port")) 1131 continue; 1132 ret = of_property_read_u32(eth_node, "reg", ®); 1133 if (ret < 0) { 1134 dev_err(dev, "%pOF error reading port_id %d\n", 1135 eth_node, ret); 1136 } 1137 1138 of_node_get(eth_node); 1139 1140 if (reg == 0) { 1141 eth0_node = eth_node; 1142 if (!of_device_is_available(eth0_node)) { 1143 of_node_put(eth0_node); 1144 eth0_node = NULL; 1145 } 1146 } else if (reg == 1) { 1147 eth1_node = eth_node; 1148 if (!of_device_is_available(eth1_node)) { 1149 of_node_put(eth1_node); 1150 eth1_node = NULL; 1151 } 1152 } else { 1153 dev_err(dev, "port reg should be 0 or 1\n"); 1154 } 1155 } 1156 1157 of_node_put(eth_ports_node); 1158 1159 /* At least one node must be present and available else we fail */ 1160 if (!eth0_node && !eth1_node) { 1161 dev_err(dev, "neither port0 nor port1 node available\n"); 1162 return -ENODEV; 1163 } 1164 1165 if (eth0_node == eth1_node) { 1166 dev_err(dev, "port0 and port1 can't have same reg\n"); 1167 of_node_put(eth0_node); 1168 return -ENODEV; 1169 } 1170 1171 prueth->eth_node[PRUETH_MAC0] = eth0_node; 1172 prueth->eth_node[PRUETH_MAC1] = eth1_node; 1173 1174 prueth->miig_rt = syscon_regmap_lookup_by_phandle(np, "ti,mii-g-rt"); 1175 if (IS_ERR(prueth->miig_rt)) { 1176 dev_err(dev, "couldn't get ti,mii-g-rt syscon regmap\n"); 1177 return -ENODEV; 1178 } 1179 1180 prueth->mii_rt = syscon_regmap_lookup_by_phandle(np, "ti,mii-rt"); 1181 if (IS_ERR(prueth->mii_rt)) { 1182 dev_err(dev, "couldn't get ti,mii-rt syscon regmap\n"); 1183 return -ENODEV; 1184 } 1185 1186 prueth->pa_stats = syscon_regmap_lookup_by_phandle(np, "ti,pa-stats"); 1187 if (IS_ERR(prueth->pa_stats)) { 1188 dev_err(dev, "couldn't get ti,pa-stats syscon regmap\n"); 1189 prueth->pa_stats = NULL; 1190 } 1191 1192 if (eth0_node) { 1193 ret = prueth_get_cores(prueth, ICSS_SLICE0, false); 1194 if (ret) 1195 goto put_cores; 1196 } 1197 1198 if (eth1_node) { 1199 ret = prueth_get_cores(prueth, ICSS_SLICE1, false); 1200 if (ret) 1201 goto put_cores; 1202 } 1203 1204 pruss = pruss_get(eth0_node ? 1205 prueth->pru[ICSS_SLICE0] : prueth->pru[ICSS_SLICE1]); 1206 if (IS_ERR(pruss)) { 1207 ret = PTR_ERR(pruss); 1208 dev_err(dev, "unable to get pruss handle\n"); 1209 goto put_cores; 1210 } 1211 1212 prueth->pruss = pruss; 1213 1214 ret = pruss_request_mem_region(pruss, PRUSS_MEM_SHRD_RAM2, 1215 &prueth->shram); 1216 if (ret) { 1217 dev_err(dev, "unable to get PRUSS SHRD RAM2: %d\n", ret); 1218 goto put_pruss; 1219 } 1220 1221 prueth->sram_pool = of_gen_pool_get(np, "sram", 0); 1222 if (!prueth->sram_pool) { 1223 dev_err(dev, "unable to get SRAM pool\n"); 1224 ret = -ENODEV; 1225 1226 goto put_mem; 1227 } 1228 1229 msmc_ram_size = MSMC_RAM_SIZE; 1230 prueth->is_switchmode_supported = prueth->pdata.switch_mode; 1231 if (prueth->is_switchmode_supported) 1232 msmc_ram_size = MSMC_RAM_SIZE_SWITCH_MODE; 1233 1234 /* NOTE: FW bug needs buffer base to be 64KB aligned */ 1235 prueth->msmcram.va = 1236 (void __iomem *)gen_pool_alloc_algo(prueth->sram_pool, 1237 msmc_ram_size, 1238 gen_pool_first_fit_align, 1239 &gp_data); 1240 1241 if (!prueth->msmcram.va) { 1242 ret = -ENOMEM; 1243 dev_err(dev, "unable to allocate MSMC resource\n"); 1244 goto put_mem; 1245 } 1246 prueth->msmcram.pa = gen_pool_virt_to_phys(prueth->sram_pool, 1247 (unsigned long)prueth->msmcram.va); 1248 prueth->msmcram.size = msmc_ram_size; 1249 memset_io(prueth->msmcram.va, 0, msmc_ram_size); 1250 dev_dbg(dev, "sram: pa %llx va %p size %zx\n", prueth->msmcram.pa, 1251 prueth->msmcram.va, prueth->msmcram.size); 1252 1253 prueth->iep0 = icss_iep_get_idx(np, 0); 1254 if (IS_ERR(prueth->iep0)) { 1255 ret = dev_err_probe(dev, PTR_ERR(prueth->iep0), "iep0 get failed\n"); 1256 prueth->iep0 = NULL; 1257 goto free_pool; 1258 } 1259 1260 prueth->iep1 = icss_iep_get_idx(np, 1); 1261 if (IS_ERR(prueth->iep1)) { 1262 ret = dev_err_probe(dev, PTR_ERR(prueth->iep1), "iep1 get failed\n"); 1263 goto put_iep0; 1264 } 1265 1266 if (prueth->pdata.quirk_10m_link_issue) { 1267 /* Enable IEP1 for FW in 64bit mode as W/A for 10M FD link detect issue under TX 1268 * traffic. 1269 */ 1270 icss_iep_init_fw(prueth->iep1); 1271 } 1272 1273 /* setup netdev interfaces */ 1274 if (eth0_node) { 1275 ret = prueth_netdev_init(prueth, eth0_node); 1276 if (ret) { 1277 dev_err_probe(dev, ret, "netdev init %s failed\n", 1278 eth0_node->name); 1279 goto exit_iep; 1280 } 1281 1282 prueth->emac[PRUETH_MAC0]->half_duplex = 1283 of_property_read_bool(eth0_node, "ti,half-duplex-capable"); 1284 1285 prueth->emac[PRUETH_MAC0]->iep = prueth->iep0; 1286 } 1287 1288 if (eth1_node) { 1289 ret = prueth_netdev_init(prueth, eth1_node); 1290 if (ret) { 1291 dev_err_probe(dev, ret, "netdev init %s failed\n", 1292 eth1_node->name); 1293 goto netdev_exit; 1294 } 1295 1296 prueth->emac[PRUETH_MAC1]->half_duplex = 1297 of_property_read_bool(eth1_node, "ti,half-duplex-capable"); 1298 1299 prueth->emac[PRUETH_MAC1]->iep = prueth->iep0; 1300 } 1301 1302 /* register the network devices */ 1303 if (eth0_node) { 1304 ret = register_netdev(prueth->emac[PRUETH_MAC0]->ndev); 1305 if (ret) { 1306 dev_err(dev, "can't register netdev for port MII0"); 1307 goto netdev_exit; 1308 } 1309 1310 prueth->registered_netdevs[PRUETH_MAC0] = prueth->emac[PRUETH_MAC0]->ndev; 1311 1312 ret = emac_phy_connect(prueth->emac[PRUETH_MAC0]); 1313 if (ret) { 1314 dev_err(dev, 1315 "can't connect to MII0 PHY, error -%d", ret); 1316 goto netdev_unregister; 1317 } 1318 phy_attached_info(prueth->emac[PRUETH_MAC0]->ndev->phydev); 1319 } 1320 1321 if (eth1_node) { 1322 ret = register_netdev(prueth->emac[PRUETH_MAC1]->ndev); 1323 if (ret) { 1324 dev_err(dev, "can't register netdev for port MII1"); 1325 goto netdev_unregister; 1326 } 1327 1328 prueth->registered_netdevs[PRUETH_MAC1] = prueth->emac[PRUETH_MAC1]->ndev; 1329 ret = emac_phy_connect(prueth->emac[PRUETH_MAC1]); 1330 if (ret) { 1331 dev_err(dev, 1332 "can't connect to MII1 PHY, error %d", ret); 1333 goto netdev_unregister; 1334 } 1335 phy_attached_info(prueth->emac[PRUETH_MAC1]->ndev->phydev); 1336 } 1337 1338 if (prueth->is_switchmode_supported) { 1339 ret = prueth_register_notifiers(prueth); 1340 if (ret) 1341 goto netdev_unregister; 1342 1343 sprintf(prueth->switch_id, "%s", dev_name(dev)); 1344 } 1345 1346 dev_info(dev, "TI PRU ethernet driver initialized: %s EMAC mode\n", 1347 (!eth0_node || !eth1_node) ? "single" : "dual"); 1348 1349 if (eth1_node) 1350 of_node_put(eth1_node); 1351 if (eth0_node) 1352 of_node_put(eth0_node); 1353 return 0; 1354 1355 netdev_unregister: 1356 for (i = 0; i < PRUETH_NUM_MACS; i++) { 1357 if (!prueth->registered_netdevs[i]) 1358 continue; 1359 if (prueth->emac[i]->ndev->phydev) { 1360 phy_disconnect(prueth->emac[i]->ndev->phydev); 1361 prueth->emac[i]->ndev->phydev = NULL; 1362 } 1363 unregister_netdev(prueth->registered_netdevs[i]); 1364 } 1365 1366 netdev_exit: 1367 for (i = 0; i < PRUETH_NUM_MACS; i++) { 1368 eth_node = prueth->eth_node[i]; 1369 if (!eth_node) 1370 continue; 1371 1372 prueth_netdev_exit(prueth, eth_node); 1373 } 1374 1375 exit_iep: 1376 if (prueth->pdata.quirk_10m_link_issue) 1377 icss_iep_exit_fw(prueth->iep1); 1378 icss_iep_put(prueth->iep1); 1379 1380 put_iep0: 1381 icss_iep_put(prueth->iep0); 1382 prueth->iep0 = NULL; 1383 prueth->iep1 = NULL; 1384 1385 free_pool: 1386 gen_pool_free(prueth->sram_pool, 1387 (unsigned long)prueth->msmcram.va, msmc_ram_size); 1388 1389 put_mem: 1390 pruss_release_mem_region(prueth->pruss, &prueth->shram); 1391 1392 put_pruss: 1393 pruss_put(prueth->pruss); 1394 1395 put_cores: 1396 if (eth1_node) { 1397 prueth_put_cores(prueth, ICSS_SLICE1); 1398 of_node_put(eth1_node); 1399 } 1400 1401 if (eth0_node) { 1402 prueth_put_cores(prueth, ICSS_SLICE0); 1403 of_node_put(eth0_node); 1404 } 1405 1406 return ret; 1407 } 1408 1409 static void prueth_remove(struct platform_device *pdev) 1410 { 1411 struct prueth *prueth = platform_get_drvdata(pdev); 1412 struct device_node *eth_node; 1413 int i; 1414 1415 prueth_unregister_notifiers(prueth); 1416 1417 for (i = 0; i < PRUETH_NUM_MACS; i++) { 1418 if (!prueth->registered_netdevs[i]) 1419 continue; 1420 phy_stop(prueth->emac[i]->ndev->phydev); 1421 phy_disconnect(prueth->emac[i]->ndev->phydev); 1422 prueth->emac[i]->ndev->phydev = NULL; 1423 unregister_netdev(prueth->registered_netdevs[i]); 1424 } 1425 1426 for (i = 0; i < PRUETH_NUM_MACS; i++) { 1427 eth_node = prueth->eth_node[i]; 1428 if (!eth_node) 1429 continue; 1430 1431 prueth_netdev_exit(prueth, eth_node); 1432 } 1433 1434 if (prueth->pdata.quirk_10m_link_issue) 1435 icss_iep_exit_fw(prueth->iep1); 1436 1437 icss_iep_put(prueth->iep1); 1438 icss_iep_put(prueth->iep0); 1439 1440 gen_pool_free(prueth->sram_pool, 1441 (unsigned long)prueth->msmcram.va, 1442 MSMC_RAM_SIZE); 1443 1444 pruss_release_mem_region(prueth->pruss, &prueth->shram); 1445 1446 pruss_put(prueth->pruss); 1447 1448 if (prueth->eth_node[PRUETH_MAC1]) 1449 prueth_put_cores(prueth, ICSS_SLICE1); 1450 1451 if (prueth->eth_node[PRUETH_MAC0]) 1452 prueth_put_cores(prueth, ICSS_SLICE0); 1453 } 1454 1455 static const struct prueth_pdata am654_icssg_pdata = { 1456 .fdqring_mode = K3_RINGACC_RING_MODE_MESSAGE, 1457 .quirk_10m_link_issue = 1, 1458 .switch_mode = 1, 1459 }; 1460 1461 static const struct prueth_pdata am64x_icssg_pdata = { 1462 .fdqring_mode = K3_RINGACC_RING_MODE_RING, 1463 .quirk_10m_link_issue = 1, 1464 .switch_mode = 1, 1465 }; 1466 1467 static const struct of_device_id prueth_dt_match[] = { 1468 { .compatible = "ti,am654-icssg-prueth", .data = &am654_icssg_pdata }, 1469 { .compatible = "ti,am642-icssg-prueth", .data = &am64x_icssg_pdata }, 1470 { /* sentinel */ } 1471 }; 1472 MODULE_DEVICE_TABLE(of, prueth_dt_match); 1473 1474 static struct platform_driver prueth_driver = { 1475 .probe = prueth_probe, 1476 .remove_new = prueth_remove, 1477 .driver = { 1478 .name = "icssg-prueth", 1479 .of_match_table = prueth_dt_match, 1480 .pm = &prueth_dev_pm_ops, 1481 }, 1482 }; 1483 module_platform_driver(prueth_driver); 1484 1485 MODULE_AUTHOR("Roger Quadros <rogerq@ti.com>"); 1486 MODULE_AUTHOR("Md Danish Anwar <danishanwar@ti.com>"); 1487 MODULE_DESCRIPTION("PRUSS ICSSG Ethernet Driver"); 1488 MODULE_LICENSE("GPL"); 1489