1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /* 3 * Texas Instruments N-Port Ethernet Switch Address Lookup Engine APIs 4 * 5 * Copyright (C) 2012 Texas Instruments 6 * 7 */ 8 #ifndef __TI_CPSW_ALE_H__ 9 #define __TI_CPSW_ALE_H__ 10 11 struct reg_fields; 12 13 struct cpsw_ale_params { 14 struct device *dev; 15 void __iomem *ale_regs; 16 unsigned long ale_ageout; /* in secs */ 17 unsigned long ale_entries; 18 unsigned long num_policers; 19 unsigned long ale_ports; 20 /* NU Switch has specific handling as number of bits in ALE entries 21 * are different than other versions of ALE. Also there are specific 22 * registers for unknown vlan specific fields. So use nu_switch_ale 23 * to identify this hardware. 24 */ 25 bool nu_switch_ale; 26 const struct reg_field *reg_fields; 27 const char *dev_id; 28 unsigned long bus_freq; 29 }; 30 31 struct ale_entry_fld; 32 struct regmap; 33 34 enum ale_fields { 35 MINOR_VER, 36 MAJOR_VER, 37 ALE_ENTRIES, 38 ALE_POLICERS, 39 POL_PORT_MEN, 40 POL_TRUNK_ID, 41 POL_PORT_NUM, 42 POL_PRI_MEN, 43 POL_PRI_VAL, 44 POL_OUI_MEN, 45 POL_OUI_INDEX, 46 POL_DST_MEN, 47 POL_DST_INDEX, 48 POL_SRC_MEN, 49 POL_SRC_INDEX, 50 POL_OVLAN_MEN, 51 POL_OVLAN_INDEX, 52 POL_IVLAN_MEN, 53 POL_IVLAN_INDEX, 54 POL_ETHERTYPE_MEN, 55 POL_ETHERTYPE_INDEX, 56 POL_IPSRC_MEN, 57 POL_IPSRC_INDEX, 58 POL_IPDST_MEN, 59 POL_IPDST_INDEX, 60 POL_EN, 61 POL_RED_DROP_EN, 62 POL_YELLOW_DROP_EN, 63 POL_YELLOW_THRESH, 64 POL_POL_MATCH_MODE, 65 POL_PRIORITY_THREAD_EN, 66 POL_MAC_ONLY_DEF_DIS, 67 POL_TEST_CLR, 68 POL_TEST_CLR_RED, 69 POL_TEST_CLR_YELLOW, 70 POL_TEST_CLR_SELECTED, 71 POL_TEST_ENTRY, 72 POL_STATUS_HIT, 73 POL_STATUS_HIT_RED, 74 POL_STATUS_HIT_YELLOW, 75 ALE_DEFAULT_THREAD_EN, 76 ALE_DEFAULT_THREAD_VAL, 77 ALE_THREAD_CLASS_INDEX, 78 ALE_THREAD_ENABLE, 79 ALE_THREAD_VALUE, 80 /* terminator */ 81 ALE_FIELDS_MAX, 82 }; 83 84 struct cpsw_ale { 85 struct cpsw_ale_params params; 86 struct timer_list timer; 87 struct regmap *regmap; 88 struct regmap_field *fields[ALE_FIELDS_MAX]; 89 unsigned long ageout; 90 u32 version; 91 u32 features; 92 /* These bits are different on NetCP NU Switch ALE */ 93 u32 port_mask_bits; 94 u32 port_num_bits; 95 u32 vlan_field_bits; 96 unsigned long *p0_untag_vid_mask; 97 const struct ale_entry_fld *vlan_entry_tbl; 98 }; 99 100 enum cpsw_ale_control { 101 /* global */ 102 ALE_ENABLE, 103 ALE_CLEAR, 104 ALE_AGEOUT, 105 ALE_P0_UNI_FLOOD, 106 ALE_VLAN_NOLEARN, 107 ALE_NO_PORT_VLAN, 108 ALE_OUI_DENY, 109 ALE_BYPASS, 110 ALE_RATE_LIMIT_TX, 111 ALE_VLAN_AWARE, 112 ALE_AUTH_ENABLE, 113 ALE_RATE_LIMIT, 114 /* port controls */ 115 ALE_PORT_STATE, 116 ALE_PORT_DROP_UNTAGGED, 117 ALE_PORT_DROP_UNKNOWN_VLAN, 118 ALE_PORT_NOLEARN, 119 ALE_PORT_NO_SA_UPDATE, 120 ALE_PORT_UNKNOWN_VLAN_MEMBER, 121 ALE_PORT_UNKNOWN_MCAST_FLOOD, 122 ALE_PORT_UNKNOWN_REG_MCAST_FLOOD, 123 ALE_PORT_UNTAGGED_EGRESS, 124 ALE_PORT_MACONLY, 125 ALE_PORT_MACONLY_CAF, 126 ALE_PORT_BCAST_LIMIT, 127 ALE_PORT_MCAST_LIMIT, 128 ALE_DEFAULT_THREAD_ID, 129 ALE_DEFAULT_THREAD_ENABLE, 130 ALE_NUM_CONTROLS, 131 }; 132 133 enum cpsw_ale_port_state { 134 ALE_PORT_STATE_DISABLE = 0x00, 135 ALE_PORT_STATE_BLOCK = 0x01, 136 ALE_PORT_STATE_LEARN = 0x02, 137 ALE_PORT_STATE_FORWARD = 0x03, 138 }; 139 140 /* ALE unicast entry flags - passed into cpsw_ale_add_ucast() */ 141 #define ALE_SECURE BIT(0) 142 #define ALE_BLOCKED BIT(1) 143 #define ALE_SUPER BIT(2) 144 #define ALE_VLAN BIT(3) 145 146 #define ALE_PORT_HOST BIT(0) 147 #define ALE_PORT_1 BIT(1) 148 #define ALE_PORT_2 BIT(2) 149 150 #define ALE_MCAST_FWD 0 151 #define ALE_MCAST_BLOCK_LEARN_FWD 1 152 #define ALE_MCAST_FWD_LEARN 2 153 #define ALE_MCAST_FWD_2 3 154 155 #define ALE_ENTRY_BITS 68 156 #define ALE_ENTRY_WORDS DIV_ROUND_UP(ALE_ENTRY_BITS, 32) 157 158 struct cpsw_ale *cpsw_ale_create(struct cpsw_ale_params *params); 159 160 void cpsw_ale_start(struct cpsw_ale *ale); 161 void cpsw_ale_stop(struct cpsw_ale *ale); 162 163 int cpsw_ale_flush_multicast(struct cpsw_ale *ale, int port_mask, int vid); 164 int cpsw_ale_add_ucast(struct cpsw_ale *ale, const u8 *addr, int port, 165 int flags, u16 vid); 166 int cpsw_ale_del_ucast(struct cpsw_ale *ale, const u8 *addr, int port, 167 int flags, u16 vid); 168 int cpsw_ale_add_mcast(struct cpsw_ale *ale, const u8 *addr, int port_mask, 169 int flags, u16 vid, int mcast_state); 170 int cpsw_ale_del_mcast(struct cpsw_ale *ale, const u8 *addr, int port_mask, 171 int flags, u16 vid); 172 int cpsw_ale_add_vlan(struct cpsw_ale *ale, u16 vid, int port, int untag, 173 int reg_mcast, int unreg_mcast); 174 int cpsw_ale_del_vlan(struct cpsw_ale *ale, u16 vid, int port); 175 void cpsw_ale_set_allmulti(struct cpsw_ale *ale, int allmulti, int port); 176 int cpsw_ale_rx_ratelimit_bc(struct cpsw_ale *ale, int port, unsigned int ratelimit_pps); 177 int cpsw_ale_rx_ratelimit_mc(struct cpsw_ale *ale, int port, unsigned int ratelimit_pps); 178 179 int cpsw_ale_control_get(struct cpsw_ale *ale, int port, int control); 180 int cpsw_ale_control_set(struct cpsw_ale *ale, int port, 181 int control, int value); 182 void cpsw_ale_dump(struct cpsw_ale *ale, u32 *data); 183 void cpsw_ale_restore(struct cpsw_ale *ale, u32 *data); 184 u32 cpsw_ale_get_num_entries(struct cpsw_ale *ale); 185 186 static inline int cpsw_ale_get_vlan_p0_untag(struct cpsw_ale *ale, u16 vid) 187 { 188 return test_bit(vid, ale->p0_untag_vid_mask); 189 } 190 191 int cpsw_ale_vlan_add_modify(struct cpsw_ale *ale, u16 vid, int port_mask, 192 int untag_mask, int reg_mcast, int unreg_mcast); 193 int cpsw_ale_vlan_del_modify(struct cpsw_ale *ale, u16 vid, int port_mask); 194 void cpsw_ale_set_unreg_mcast(struct cpsw_ale *ale, int unreg_mcast_mask, 195 bool add); 196 void cpsw_ale_classifier_setup_default(struct cpsw_ale *ale, int num_rx_ch); 197 198 #endif 199