1 /* 2 * Texas Instruments Ethernet Switch Driver 3 * 4 * Copyright (C) 2012 Texas Instruments 5 * 6 * This program is free software; you can redistribute it and/or 7 * modify it under the terms of the GNU General Public License as 8 * published by the Free Software Foundation version 2. 9 * 10 * This program is distributed "as is" WITHOUT ANY WARRANTY of any 11 * kind, whether express or implied; without even the implied warranty 12 * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 13 * GNU General Public License for more details. 14 */ 15 16 #include <linux/kernel.h> 17 #include <linux/io.h> 18 #include <linux/clk.h> 19 #include <linux/timer.h> 20 #include <linux/module.h> 21 #include <linux/platform_device.h> 22 #include <linux/irqreturn.h> 23 #include <linux/interrupt.h> 24 #include <linux/if_ether.h> 25 #include <linux/etherdevice.h> 26 #include <linux/netdevice.h> 27 #include <linux/phy.h> 28 #include <linux/workqueue.h> 29 #include <linux/delay.h> 30 #include <linux/pm_runtime.h> 31 32 #include <linux/platform_data/cpsw.h> 33 34 #include "cpsw_ale.h" 35 #include "davinci_cpdma.h" 36 37 #define CPSW_DEBUG (NETIF_MSG_HW | NETIF_MSG_WOL | \ 38 NETIF_MSG_DRV | NETIF_MSG_LINK | \ 39 NETIF_MSG_IFUP | NETIF_MSG_INTR | \ 40 NETIF_MSG_PROBE | NETIF_MSG_TIMER | \ 41 NETIF_MSG_IFDOWN | NETIF_MSG_RX_ERR | \ 42 NETIF_MSG_TX_ERR | NETIF_MSG_TX_DONE | \ 43 NETIF_MSG_PKTDATA | NETIF_MSG_TX_QUEUED | \ 44 NETIF_MSG_RX_STATUS) 45 46 #define cpsw_info(priv, type, format, ...) \ 47 do { \ 48 if (netif_msg_##type(priv) && net_ratelimit()) \ 49 dev_info(priv->dev, format, ## __VA_ARGS__); \ 50 } while (0) 51 52 #define cpsw_err(priv, type, format, ...) \ 53 do { \ 54 if (netif_msg_##type(priv) && net_ratelimit()) \ 55 dev_err(priv->dev, format, ## __VA_ARGS__); \ 56 } while (0) 57 58 #define cpsw_dbg(priv, type, format, ...) \ 59 do { \ 60 if (netif_msg_##type(priv) && net_ratelimit()) \ 61 dev_dbg(priv->dev, format, ## __VA_ARGS__); \ 62 } while (0) 63 64 #define cpsw_notice(priv, type, format, ...) \ 65 do { \ 66 if (netif_msg_##type(priv) && net_ratelimit()) \ 67 dev_notice(priv->dev, format, ## __VA_ARGS__); \ 68 } while (0) 69 70 #define CPSW_MAJOR_VERSION(reg) (reg >> 8 & 0x7) 71 #define CPSW_MINOR_VERSION(reg) (reg & 0xff) 72 #define CPSW_RTL_VERSION(reg) ((reg >> 11) & 0x1f) 73 74 #define CPDMA_RXTHRESH 0x0c0 75 #define CPDMA_RXFREE 0x0e0 76 #define CPDMA_TXHDP 0x00 77 #define CPDMA_RXHDP 0x20 78 #define CPDMA_TXCP 0x40 79 #define CPDMA_RXCP 0x60 80 81 #define cpsw_dma_regs(base, offset) \ 82 (void __iomem *)((base) + (offset)) 83 #define cpsw_dma_rxthresh(base, offset) \ 84 (void __iomem *)((base) + (offset) + CPDMA_RXTHRESH) 85 #define cpsw_dma_rxfree(base, offset) \ 86 (void __iomem *)((base) + (offset) + CPDMA_RXFREE) 87 #define cpsw_dma_txhdp(base, offset) \ 88 (void __iomem *)((base) + (offset) + CPDMA_TXHDP) 89 #define cpsw_dma_rxhdp(base, offset) \ 90 (void __iomem *)((base) + (offset) + CPDMA_RXHDP) 91 #define cpsw_dma_txcp(base, offset) \ 92 (void __iomem *)((base) + (offset) + CPDMA_TXCP) 93 #define cpsw_dma_rxcp(base, offset) \ 94 (void __iomem *)((base) + (offset) + CPDMA_RXCP) 95 96 #define CPSW_POLL_WEIGHT 64 97 #define CPSW_MIN_PACKET_SIZE 60 98 #define CPSW_MAX_PACKET_SIZE (1500 + 14 + 4 + 4) 99 100 #define RX_PRIORITY_MAPPING 0x76543210 101 #define TX_PRIORITY_MAPPING 0x33221100 102 #define CPDMA_TX_PRIORITY_MAP 0x76543210 103 104 #define cpsw_enable_irq(priv) \ 105 do { \ 106 u32 i; \ 107 for (i = 0; i < priv->num_irqs; i++) \ 108 enable_irq(priv->irqs_table[i]); \ 109 } while (0); 110 #define cpsw_disable_irq(priv) \ 111 do { \ 112 u32 i; \ 113 for (i = 0; i < priv->num_irqs; i++) \ 114 disable_irq_nosync(priv->irqs_table[i]); \ 115 } while (0); 116 117 static int debug_level; 118 module_param(debug_level, int, 0); 119 MODULE_PARM_DESC(debug_level, "cpsw debug level (NETIF_MSG bits)"); 120 121 static int ale_ageout = 10; 122 module_param(ale_ageout, int, 0); 123 MODULE_PARM_DESC(ale_ageout, "cpsw ale ageout interval (seconds)"); 124 125 static int rx_packet_max = CPSW_MAX_PACKET_SIZE; 126 module_param(rx_packet_max, int, 0); 127 MODULE_PARM_DESC(rx_packet_max, "maximum receive packet size (bytes)"); 128 129 struct cpsw_ss_regs { 130 u32 id_ver; 131 u32 soft_reset; 132 u32 control; 133 u32 int_control; 134 u32 rx_thresh_en; 135 u32 rx_en; 136 u32 tx_en; 137 u32 misc_en; 138 }; 139 140 struct cpsw_regs { 141 u32 id_ver; 142 u32 control; 143 u32 soft_reset; 144 u32 stat_port_en; 145 u32 ptype; 146 }; 147 148 struct cpsw_slave_regs { 149 u32 max_blks; 150 u32 blk_cnt; 151 u32 flow_thresh; 152 u32 port_vlan; 153 u32 tx_pri_map; 154 u32 ts_ctl; 155 u32 ts_seq_ltype; 156 u32 ts_vlan; 157 u32 sa_lo; 158 u32 sa_hi; 159 }; 160 161 struct cpsw_host_regs { 162 u32 max_blks; 163 u32 blk_cnt; 164 u32 flow_thresh; 165 u32 port_vlan; 166 u32 tx_pri_map; 167 u32 cpdma_tx_pri_map; 168 u32 cpdma_rx_chan_map; 169 }; 170 171 struct cpsw_sliver_regs { 172 u32 id_ver; 173 u32 mac_control; 174 u32 mac_status; 175 u32 soft_reset; 176 u32 rx_maxlen; 177 u32 __reserved_0; 178 u32 rx_pause; 179 u32 tx_pause; 180 u32 __reserved_1; 181 u32 rx_pri_map; 182 }; 183 184 struct cpsw_slave { 185 struct cpsw_slave_regs __iomem *regs; 186 struct cpsw_sliver_regs __iomem *sliver; 187 int slave_num; 188 u32 mac_control; 189 struct cpsw_slave_data *data; 190 struct phy_device *phy; 191 }; 192 193 struct cpsw_priv { 194 spinlock_t lock; 195 struct platform_device *pdev; 196 struct net_device *ndev; 197 struct resource *cpsw_res; 198 struct resource *cpsw_ss_res; 199 struct napi_struct napi; 200 struct device *dev; 201 struct cpsw_platform_data data; 202 struct cpsw_regs __iomem *regs; 203 struct cpsw_ss_regs __iomem *ss_regs; 204 struct cpsw_host_regs __iomem *host_port_regs; 205 u32 msg_enable; 206 struct net_device_stats stats; 207 int rx_packet_max; 208 int host_port; 209 struct clk *clk; 210 u8 mac_addr[ETH_ALEN]; 211 struct cpsw_slave *slaves; 212 struct cpdma_ctlr *dma; 213 struct cpdma_chan *txch, *rxch; 214 struct cpsw_ale *ale; 215 /* snapshot of IRQ numbers */ 216 u32 irqs_table[4]; 217 u32 num_irqs; 218 }; 219 220 #define napi_to_priv(napi) container_of(napi, struct cpsw_priv, napi) 221 #define for_each_slave(priv, func, arg...) \ 222 do { \ 223 int idx; \ 224 for (idx = 0; idx < (priv)->data.slaves; idx++) \ 225 (func)((priv)->slaves + idx, ##arg); \ 226 } while (0) 227 228 static void cpsw_intr_enable(struct cpsw_priv *priv) 229 { 230 __raw_writel(0xFF, &priv->ss_regs->tx_en); 231 __raw_writel(0xFF, &priv->ss_regs->rx_en); 232 233 cpdma_ctlr_int_ctrl(priv->dma, true); 234 return; 235 } 236 237 static void cpsw_intr_disable(struct cpsw_priv *priv) 238 { 239 __raw_writel(0, &priv->ss_regs->tx_en); 240 __raw_writel(0, &priv->ss_regs->rx_en); 241 242 cpdma_ctlr_int_ctrl(priv->dma, false); 243 return; 244 } 245 246 void cpsw_tx_handler(void *token, int len, int status) 247 { 248 struct sk_buff *skb = token; 249 struct net_device *ndev = skb->dev; 250 struct cpsw_priv *priv = netdev_priv(ndev); 251 252 if (unlikely(netif_queue_stopped(ndev))) 253 netif_start_queue(ndev); 254 priv->stats.tx_packets++; 255 priv->stats.tx_bytes += len; 256 dev_kfree_skb_any(skb); 257 } 258 259 void cpsw_rx_handler(void *token, int len, int status) 260 { 261 struct sk_buff *skb = token; 262 struct net_device *ndev = skb->dev; 263 struct cpsw_priv *priv = netdev_priv(ndev); 264 int ret = 0; 265 266 /* free and bail if we are shutting down */ 267 if (unlikely(!netif_running(ndev)) || 268 unlikely(!netif_carrier_ok(ndev))) { 269 dev_kfree_skb_any(skb); 270 return; 271 } 272 if (likely(status >= 0)) { 273 skb_put(skb, len); 274 skb->protocol = eth_type_trans(skb, ndev); 275 netif_receive_skb(skb); 276 priv->stats.rx_bytes += len; 277 priv->stats.rx_packets++; 278 skb = NULL; 279 } 280 281 if (unlikely(!netif_running(ndev))) { 282 if (skb) 283 dev_kfree_skb_any(skb); 284 return; 285 } 286 287 if (likely(!skb)) { 288 skb = netdev_alloc_skb_ip_align(ndev, priv->rx_packet_max); 289 if (WARN_ON(!skb)) 290 return; 291 292 ret = cpdma_chan_submit(priv->rxch, skb, skb->data, 293 skb_tailroom(skb), GFP_KERNEL); 294 } 295 WARN_ON(ret < 0); 296 } 297 298 static irqreturn_t cpsw_interrupt(int irq, void *dev_id) 299 { 300 struct cpsw_priv *priv = dev_id; 301 302 if (likely(netif_running(priv->ndev))) { 303 cpsw_intr_disable(priv); 304 cpsw_disable_irq(priv); 305 napi_schedule(&priv->napi); 306 } 307 return IRQ_HANDLED; 308 } 309 310 static inline int cpsw_get_slave_port(struct cpsw_priv *priv, u32 slave_num) 311 { 312 if (priv->host_port == 0) 313 return slave_num + 1; 314 else 315 return slave_num; 316 } 317 318 static int cpsw_poll(struct napi_struct *napi, int budget) 319 { 320 struct cpsw_priv *priv = napi_to_priv(napi); 321 int num_tx, num_rx; 322 323 num_tx = cpdma_chan_process(priv->txch, 128); 324 num_rx = cpdma_chan_process(priv->rxch, budget); 325 326 if (num_rx || num_tx) 327 cpsw_dbg(priv, intr, "poll %d rx, %d tx pkts\n", 328 num_rx, num_tx); 329 330 if (num_rx < budget) { 331 napi_complete(napi); 332 cpsw_intr_enable(priv); 333 cpdma_ctlr_eoi(priv->dma); 334 cpsw_enable_irq(priv); 335 } 336 337 return num_rx; 338 } 339 340 static inline void soft_reset(const char *module, void __iomem *reg) 341 { 342 unsigned long timeout = jiffies + HZ; 343 344 __raw_writel(1, reg); 345 do { 346 cpu_relax(); 347 } while ((__raw_readl(reg) & 1) && time_after(timeout, jiffies)); 348 349 WARN(__raw_readl(reg) & 1, "failed to soft-reset %s\n", module); 350 } 351 352 #define mac_hi(mac) (((mac)[0] << 0) | ((mac)[1] << 8) | \ 353 ((mac)[2] << 16) | ((mac)[3] << 24)) 354 #define mac_lo(mac) (((mac)[4] << 0) | ((mac)[5] << 8)) 355 356 static void cpsw_set_slave_mac(struct cpsw_slave *slave, 357 struct cpsw_priv *priv) 358 { 359 __raw_writel(mac_hi(priv->mac_addr), &slave->regs->sa_hi); 360 __raw_writel(mac_lo(priv->mac_addr), &slave->regs->sa_lo); 361 } 362 363 static void _cpsw_adjust_link(struct cpsw_slave *slave, 364 struct cpsw_priv *priv, bool *link) 365 { 366 struct phy_device *phy = slave->phy; 367 u32 mac_control = 0; 368 u32 slave_port; 369 370 if (!phy) 371 return; 372 373 slave_port = cpsw_get_slave_port(priv, slave->slave_num); 374 375 if (phy->link) { 376 mac_control = priv->data.mac_control; 377 378 /* enable forwarding */ 379 cpsw_ale_control_set(priv->ale, slave_port, 380 ALE_PORT_STATE, ALE_PORT_STATE_FORWARD); 381 382 if (phy->speed == 1000) 383 mac_control |= BIT(7); /* GIGABITEN */ 384 if (phy->duplex) 385 mac_control |= BIT(0); /* FULLDUPLEXEN */ 386 *link = true; 387 } else { 388 mac_control = 0; 389 /* disable forwarding */ 390 cpsw_ale_control_set(priv->ale, slave_port, 391 ALE_PORT_STATE, ALE_PORT_STATE_DISABLE); 392 } 393 394 if (mac_control != slave->mac_control) { 395 phy_print_status(phy); 396 __raw_writel(mac_control, &slave->sliver->mac_control); 397 } 398 399 slave->mac_control = mac_control; 400 } 401 402 static void cpsw_adjust_link(struct net_device *ndev) 403 { 404 struct cpsw_priv *priv = netdev_priv(ndev); 405 bool link = false; 406 407 for_each_slave(priv, _cpsw_adjust_link, priv, &link); 408 409 if (link) { 410 netif_carrier_on(ndev); 411 if (netif_running(ndev)) 412 netif_wake_queue(ndev); 413 } else { 414 netif_carrier_off(ndev); 415 netif_stop_queue(ndev); 416 } 417 } 418 419 static inline int __show_stat(char *buf, int maxlen, const char *name, u32 val) 420 { 421 static char *leader = "........................................"; 422 423 if (!val) 424 return 0; 425 else 426 return snprintf(buf, maxlen, "%s %s %10d\n", name, 427 leader + strlen(name), val); 428 } 429 430 static void cpsw_slave_open(struct cpsw_slave *slave, struct cpsw_priv *priv) 431 { 432 char name[32]; 433 u32 slave_port; 434 435 sprintf(name, "slave-%d", slave->slave_num); 436 437 soft_reset(name, &slave->sliver->soft_reset); 438 439 /* setup priority mapping */ 440 __raw_writel(RX_PRIORITY_MAPPING, &slave->sliver->rx_pri_map); 441 __raw_writel(TX_PRIORITY_MAPPING, &slave->regs->tx_pri_map); 442 443 /* setup max packet size, and mac address */ 444 __raw_writel(priv->rx_packet_max, &slave->sliver->rx_maxlen); 445 cpsw_set_slave_mac(slave, priv); 446 447 slave->mac_control = 0; /* no link yet */ 448 449 slave_port = cpsw_get_slave_port(priv, slave->slave_num); 450 451 cpsw_ale_add_mcast(priv->ale, priv->ndev->broadcast, 452 1 << slave_port, 0, ALE_MCAST_FWD_2); 453 454 slave->phy = phy_connect(priv->ndev, slave->data->phy_id, 455 &cpsw_adjust_link, 0, slave->data->phy_if); 456 if (IS_ERR(slave->phy)) { 457 dev_err(priv->dev, "phy %s not found on slave %d\n", 458 slave->data->phy_id, slave->slave_num); 459 slave->phy = NULL; 460 } else { 461 dev_info(priv->dev, "phy found : id is : 0x%x\n", 462 slave->phy->phy_id); 463 phy_start(slave->phy); 464 } 465 } 466 467 static void cpsw_init_host_port(struct cpsw_priv *priv) 468 { 469 /* soft reset the controller and initialize ale */ 470 soft_reset("cpsw", &priv->regs->soft_reset); 471 cpsw_ale_start(priv->ale); 472 473 /* switch to vlan unaware mode */ 474 cpsw_ale_control_set(priv->ale, 0, ALE_VLAN_AWARE, 0); 475 476 /* setup host port priority mapping */ 477 __raw_writel(CPDMA_TX_PRIORITY_MAP, 478 &priv->host_port_regs->cpdma_tx_pri_map); 479 __raw_writel(0, &priv->host_port_regs->cpdma_rx_chan_map); 480 481 cpsw_ale_control_set(priv->ale, priv->host_port, 482 ALE_PORT_STATE, ALE_PORT_STATE_FORWARD); 483 484 cpsw_ale_add_ucast(priv->ale, priv->mac_addr, priv->host_port, 0); 485 cpsw_ale_add_mcast(priv->ale, priv->ndev->broadcast, 486 1 << priv->host_port, 0, ALE_MCAST_FWD_2); 487 } 488 489 static int cpsw_ndo_open(struct net_device *ndev) 490 { 491 struct cpsw_priv *priv = netdev_priv(ndev); 492 int i, ret; 493 u32 reg; 494 495 cpsw_intr_disable(priv); 496 netif_carrier_off(ndev); 497 498 pm_runtime_get_sync(&priv->pdev->dev); 499 500 reg = __raw_readl(&priv->regs->id_ver); 501 502 dev_info(priv->dev, "initializing cpsw version %d.%d (%d)\n", 503 CPSW_MAJOR_VERSION(reg), CPSW_MINOR_VERSION(reg), 504 CPSW_RTL_VERSION(reg)); 505 506 /* initialize host and slave ports */ 507 cpsw_init_host_port(priv); 508 for_each_slave(priv, cpsw_slave_open, priv); 509 510 /* setup tx dma to fixed prio and zero offset */ 511 cpdma_control_set(priv->dma, CPDMA_TX_PRIO_FIXED, 1); 512 cpdma_control_set(priv->dma, CPDMA_RX_BUFFER_OFFSET, 0); 513 514 /* disable priority elevation and enable statistics on all ports */ 515 __raw_writel(0, &priv->regs->ptype); 516 517 /* enable statistics collection only on the host port */ 518 __raw_writel(0x7, &priv->regs->stat_port_en); 519 520 if (WARN_ON(!priv->data.rx_descs)) 521 priv->data.rx_descs = 128; 522 523 for (i = 0; i < priv->data.rx_descs; i++) { 524 struct sk_buff *skb; 525 526 ret = -ENOMEM; 527 skb = netdev_alloc_skb_ip_align(priv->ndev, 528 priv->rx_packet_max); 529 if (!skb) 530 break; 531 ret = cpdma_chan_submit(priv->rxch, skb, skb->data, 532 skb_tailroom(skb), GFP_KERNEL); 533 if (WARN_ON(ret < 0)) 534 break; 535 } 536 /* continue even if we didn't manage to submit all receive descs */ 537 cpsw_info(priv, ifup, "submitted %d rx descriptors\n", i); 538 539 cpdma_ctlr_start(priv->dma); 540 cpsw_intr_enable(priv); 541 napi_enable(&priv->napi); 542 cpdma_ctlr_eoi(priv->dma); 543 544 return 0; 545 } 546 547 static void cpsw_slave_stop(struct cpsw_slave *slave, struct cpsw_priv *priv) 548 { 549 if (!slave->phy) 550 return; 551 phy_stop(slave->phy); 552 phy_disconnect(slave->phy); 553 slave->phy = NULL; 554 } 555 556 static int cpsw_ndo_stop(struct net_device *ndev) 557 { 558 struct cpsw_priv *priv = netdev_priv(ndev); 559 560 cpsw_info(priv, ifdown, "shutting down cpsw device\n"); 561 cpsw_intr_disable(priv); 562 cpdma_ctlr_int_ctrl(priv->dma, false); 563 cpdma_ctlr_stop(priv->dma); 564 netif_stop_queue(priv->ndev); 565 napi_disable(&priv->napi); 566 netif_carrier_off(priv->ndev); 567 cpsw_ale_stop(priv->ale); 568 for_each_slave(priv, cpsw_slave_stop, priv); 569 pm_runtime_put_sync(&priv->pdev->dev); 570 return 0; 571 } 572 573 static netdev_tx_t cpsw_ndo_start_xmit(struct sk_buff *skb, 574 struct net_device *ndev) 575 { 576 struct cpsw_priv *priv = netdev_priv(ndev); 577 int ret; 578 579 ndev->trans_start = jiffies; 580 581 if (skb_padto(skb, CPSW_MIN_PACKET_SIZE)) { 582 cpsw_err(priv, tx_err, "packet pad failed\n"); 583 priv->stats.tx_dropped++; 584 return NETDEV_TX_OK; 585 } 586 587 ret = cpdma_chan_submit(priv->txch, skb, skb->data, 588 skb->len, GFP_KERNEL); 589 if (unlikely(ret != 0)) { 590 cpsw_err(priv, tx_err, "desc submit failed\n"); 591 goto fail; 592 } 593 594 return NETDEV_TX_OK; 595 fail: 596 priv->stats.tx_dropped++; 597 netif_stop_queue(ndev); 598 return NETDEV_TX_BUSY; 599 } 600 601 static void cpsw_ndo_change_rx_flags(struct net_device *ndev, int flags) 602 { 603 /* 604 * The switch cannot operate in promiscuous mode without substantial 605 * headache. For promiscuous mode to work, we would need to put the 606 * ALE in bypass mode and route all traffic to the host port. 607 * Subsequently, the host will need to operate as a "bridge", learn, 608 * and flood as needed. For now, we simply complain here and 609 * do nothing about it :-) 610 */ 611 if ((flags & IFF_PROMISC) && (ndev->flags & IFF_PROMISC)) 612 dev_err(&ndev->dev, "promiscuity ignored!\n"); 613 614 /* 615 * The switch cannot filter multicast traffic unless it is configured 616 * in "VLAN Aware" mode. Unfortunately, VLAN awareness requires a 617 * whole bunch of additional logic that this driver does not implement 618 * at present. 619 */ 620 if ((flags & IFF_ALLMULTI) && !(ndev->flags & IFF_ALLMULTI)) 621 dev_err(&ndev->dev, "multicast traffic cannot be filtered!\n"); 622 } 623 624 static void cpsw_ndo_tx_timeout(struct net_device *ndev) 625 { 626 struct cpsw_priv *priv = netdev_priv(ndev); 627 628 cpsw_err(priv, tx_err, "transmit timeout, restarting dma\n"); 629 priv->stats.tx_errors++; 630 cpsw_intr_disable(priv); 631 cpdma_ctlr_int_ctrl(priv->dma, false); 632 cpdma_chan_stop(priv->txch); 633 cpdma_chan_start(priv->txch); 634 cpdma_ctlr_int_ctrl(priv->dma, true); 635 cpsw_intr_enable(priv); 636 cpdma_ctlr_eoi(priv->dma); 637 } 638 639 static struct net_device_stats *cpsw_ndo_get_stats(struct net_device *ndev) 640 { 641 struct cpsw_priv *priv = netdev_priv(ndev); 642 return &priv->stats; 643 } 644 645 #ifdef CONFIG_NET_POLL_CONTROLLER 646 static void cpsw_ndo_poll_controller(struct net_device *ndev) 647 { 648 struct cpsw_priv *priv = netdev_priv(ndev); 649 650 cpsw_intr_disable(priv); 651 cpdma_ctlr_int_ctrl(priv->dma, false); 652 cpsw_interrupt(ndev->irq, priv); 653 cpdma_ctlr_int_ctrl(priv->dma, true); 654 cpsw_intr_enable(priv); 655 cpdma_ctlr_eoi(priv->dma); 656 } 657 #endif 658 659 static const struct net_device_ops cpsw_netdev_ops = { 660 .ndo_open = cpsw_ndo_open, 661 .ndo_stop = cpsw_ndo_stop, 662 .ndo_start_xmit = cpsw_ndo_start_xmit, 663 .ndo_change_rx_flags = cpsw_ndo_change_rx_flags, 664 .ndo_validate_addr = eth_validate_addr, 665 .ndo_change_mtu = eth_change_mtu, 666 .ndo_tx_timeout = cpsw_ndo_tx_timeout, 667 .ndo_get_stats = cpsw_ndo_get_stats, 668 #ifdef CONFIG_NET_POLL_CONTROLLER 669 .ndo_poll_controller = cpsw_ndo_poll_controller, 670 #endif 671 }; 672 673 static void cpsw_get_drvinfo(struct net_device *ndev, 674 struct ethtool_drvinfo *info) 675 { 676 struct cpsw_priv *priv = netdev_priv(ndev); 677 strcpy(info->driver, "TI CPSW Driver v1.0"); 678 strcpy(info->version, "1.0"); 679 strcpy(info->bus_info, priv->pdev->name); 680 } 681 682 static u32 cpsw_get_msglevel(struct net_device *ndev) 683 { 684 struct cpsw_priv *priv = netdev_priv(ndev); 685 return priv->msg_enable; 686 } 687 688 static void cpsw_set_msglevel(struct net_device *ndev, u32 value) 689 { 690 struct cpsw_priv *priv = netdev_priv(ndev); 691 priv->msg_enable = value; 692 } 693 694 static const struct ethtool_ops cpsw_ethtool_ops = { 695 .get_drvinfo = cpsw_get_drvinfo, 696 .get_msglevel = cpsw_get_msglevel, 697 .set_msglevel = cpsw_set_msglevel, 698 .get_link = ethtool_op_get_link, 699 }; 700 701 static void cpsw_slave_init(struct cpsw_slave *slave, struct cpsw_priv *priv) 702 { 703 void __iomem *regs = priv->regs; 704 int slave_num = slave->slave_num; 705 struct cpsw_slave_data *data = priv->data.slave_data + slave_num; 706 707 slave->data = data; 708 slave->regs = regs + data->slave_reg_ofs; 709 slave->sliver = regs + data->sliver_reg_ofs; 710 } 711 712 static int __devinit cpsw_probe(struct platform_device *pdev) 713 { 714 struct cpsw_platform_data *data = pdev->dev.platform_data; 715 struct net_device *ndev; 716 struct cpsw_priv *priv; 717 struct cpdma_params dma_params; 718 struct cpsw_ale_params ale_params; 719 void __iomem *regs; 720 struct resource *res; 721 int ret = 0, i, k = 0; 722 723 if (!data) { 724 pr_err("platform data missing\n"); 725 return -ENODEV; 726 } 727 728 ndev = alloc_etherdev(sizeof(struct cpsw_priv)); 729 if (!ndev) { 730 pr_err("error allocating net_device\n"); 731 return -ENOMEM; 732 } 733 734 platform_set_drvdata(pdev, ndev); 735 priv = netdev_priv(ndev); 736 spin_lock_init(&priv->lock); 737 priv->data = *data; 738 priv->pdev = pdev; 739 priv->ndev = ndev; 740 priv->dev = &ndev->dev; 741 priv->msg_enable = netif_msg_init(debug_level, CPSW_DEBUG); 742 priv->rx_packet_max = max(rx_packet_max, 128); 743 744 if (is_valid_ether_addr(data->slave_data[0].mac_addr)) { 745 memcpy(priv->mac_addr, data->slave_data[0].mac_addr, ETH_ALEN); 746 pr_info("Detected MACID = %pM", priv->mac_addr); 747 } else { 748 eth_random_addr(priv->mac_addr); 749 pr_info("Random MACID = %pM", priv->mac_addr); 750 } 751 752 memcpy(ndev->dev_addr, priv->mac_addr, ETH_ALEN); 753 754 priv->slaves = kzalloc(sizeof(struct cpsw_slave) * data->slaves, 755 GFP_KERNEL); 756 if (!priv->slaves) { 757 ret = -EBUSY; 758 goto clean_ndev_ret; 759 } 760 for (i = 0; i < data->slaves; i++) 761 priv->slaves[i].slave_num = i; 762 763 pm_runtime_enable(&pdev->dev); 764 priv->clk = clk_get(&pdev->dev, "fck"); 765 if (IS_ERR(priv->clk)) { 766 dev_err(&pdev->dev, "fck is not found\n"); 767 ret = -ENODEV; 768 goto clean_slave_ret; 769 } 770 771 priv->cpsw_res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 772 if (!priv->cpsw_res) { 773 dev_err(priv->dev, "error getting i/o resource\n"); 774 ret = -ENOENT; 775 goto clean_clk_ret; 776 } 777 778 if (!request_mem_region(priv->cpsw_res->start, 779 resource_size(priv->cpsw_res), ndev->name)) { 780 dev_err(priv->dev, "failed request i/o region\n"); 781 ret = -ENXIO; 782 goto clean_clk_ret; 783 } 784 785 regs = ioremap(priv->cpsw_res->start, resource_size(priv->cpsw_res)); 786 if (!regs) { 787 dev_err(priv->dev, "unable to map i/o region\n"); 788 goto clean_cpsw_iores_ret; 789 } 790 priv->regs = regs; 791 priv->host_port = data->host_port_num; 792 priv->host_port_regs = regs + data->host_port_reg_ofs; 793 794 priv->cpsw_ss_res = platform_get_resource(pdev, IORESOURCE_MEM, 1); 795 if (!priv->cpsw_ss_res) { 796 dev_err(priv->dev, "error getting i/o resource\n"); 797 ret = -ENOENT; 798 goto clean_clk_ret; 799 } 800 801 if (!request_mem_region(priv->cpsw_ss_res->start, 802 resource_size(priv->cpsw_ss_res), ndev->name)) { 803 dev_err(priv->dev, "failed request i/o region\n"); 804 ret = -ENXIO; 805 goto clean_clk_ret; 806 } 807 808 regs = ioremap(priv->cpsw_ss_res->start, 809 resource_size(priv->cpsw_ss_res)); 810 if (!regs) { 811 dev_err(priv->dev, "unable to map i/o region\n"); 812 goto clean_cpsw_ss_iores_ret; 813 } 814 priv->ss_regs = regs; 815 816 for_each_slave(priv, cpsw_slave_init, priv); 817 818 memset(&dma_params, 0, sizeof(dma_params)); 819 dma_params.dev = &pdev->dev; 820 dma_params.dmaregs = cpsw_dma_regs((u32)priv->regs, 821 data->cpdma_reg_ofs); 822 dma_params.rxthresh = cpsw_dma_rxthresh((u32)priv->regs, 823 data->cpdma_reg_ofs); 824 dma_params.rxfree = cpsw_dma_rxfree((u32)priv->regs, 825 data->cpdma_reg_ofs); 826 dma_params.txhdp = cpsw_dma_txhdp((u32)priv->regs, 827 data->cpdma_sram_ofs); 828 dma_params.rxhdp = cpsw_dma_rxhdp((u32)priv->regs, 829 data->cpdma_sram_ofs); 830 dma_params.txcp = cpsw_dma_txcp((u32)priv->regs, 831 data->cpdma_sram_ofs); 832 dma_params.rxcp = cpsw_dma_rxcp((u32)priv->regs, 833 data->cpdma_sram_ofs); 834 835 dma_params.num_chan = data->channels; 836 dma_params.has_soft_reset = true; 837 dma_params.min_packet_size = CPSW_MIN_PACKET_SIZE; 838 dma_params.desc_mem_size = data->bd_ram_size; 839 dma_params.desc_align = 16; 840 dma_params.has_ext_regs = true; 841 dma_params.desc_mem_phys = data->no_bd_ram ? 0 : 842 (u32 __force)priv->cpsw_res->start + data->bd_ram_ofs; 843 dma_params.desc_hw_addr = data->hw_ram_addr ? 844 data->hw_ram_addr : dma_params.desc_mem_phys ; 845 846 priv->dma = cpdma_ctlr_create(&dma_params); 847 if (!priv->dma) { 848 dev_err(priv->dev, "error initializing dma\n"); 849 ret = -ENOMEM; 850 goto clean_iomap_ret; 851 } 852 853 priv->txch = cpdma_chan_create(priv->dma, tx_chan_num(0), 854 cpsw_tx_handler); 855 priv->rxch = cpdma_chan_create(priv->dma, rx_chan_num(0), 856 cpsw_rx_handler); 857 858 if (WARN_ON(!priv->txch || !priv->rxch)) { 859 dev_err(priv->dev, "error initializing dma channels\n"); 860 ret = -ENOMEM; 861 goto clean_dma_ret; 862 } 863 864 memset(&ale_params, 0, sizeof(ale_params)); 865 ale_params.dev = &ndev->dev; 866 ale_params.ale_regs = (void *)((u32)priv->regs) + 867 ((u32)data->ale_reg_ofs); 868 ale_params.ale_ageout = ale_ageout; 869 ale_params.ale_entries = data->ale_entries; 870 ale_params.ale_ports = data->slaves; 871 872 priv->ale = cpsw_ale_create(&ale_params); 873 if (!priv->ale) { 874 dev_err(priv->dev, "error initializing ale engine\n"); 875 ret = -ENODEV; 876 goto clean_dma_ret; 877 } 878 879 ndev->irq = platform_get_irq(pdev, 0); 880 if (ndev->irq < 0) { 881 dev_err(priv->dev, "error getting irq resource\n"); 882 ret = -ENOENT; 883 goto clean_ale_ret; 884 } 885 886 while ((res = platform_get_resource(priv->pdev, IORESOURCE_IRQ, k))) { 887 for (i = res->start; i <= res->end; i++) { 888 if (request_irq(i, cpsw_interrupt, IRQF_DISABLED, 889 dev_name(&pdev->dev), priv)) { 890 dev_err(priv->dev, "error attaching irq\n"); 891 goto clean_ale_ret; 892 } 893 priv->irqs_table[k] = i; 894 priv->num_irqs = k; 895 } 896 k++; 897 } 898 899 ndev->flags |= IFF_ALLMULTI; /* see cpsw_ndo_change_rx_flags() */ 900 901 ndev->netdev_ops = &cpsw_netdev_ops; 902 SET_ETHTOOL_OPS(ndev, &cpsw_ethtool_ops); 903 netif_napi_add(ndev, &priv->napi, cpsw_poll, CPSW_POLL_WEIGHT); 904 905 /* register the network device */ 906 SET_NETDEV_DEV(ndev, &pdev->dev); 907 ret = register_netdev(ndev); 908 if (ret) { 909 dev_err(priv->dev, "error registering net device\n"); 910 ret = -ENODEV; 911 goto clean_irq_ret; 912 } 913 914 cpsw_notice(priv, probe, "initialized device (regs %x, irq %d)\n", 915 priv->cpsw_res->start, ndev->irq); 916 917 return 0; 918 919 clean_irq_ret: 920 free_irq(ndev->irq, priv); 921 clean_ale_ret: 922 cpsw_ale_destroy(priv->ale); 923 clean_dma_ret: 924 cpdma_chan_destroy(priv->txch); 925 cpdma_chan_destroy(priv->rxch); 926 cpdma_ctlr_destroy(priv->dma); 927 clean_iomap_ret: 928 iounmap(priv->regs); 929 clean_cpsw_ss_iores_ret: 930 release_mem_region(priv->cpsw_ss_res->start, 931 resource_size(priv->cpsw_ss_res)); 932 clean_cpsw_iores_ret: 933 release_mem_region(priv->cpsw_res->start, 934 resource_size(priv->cpsw_res)); 935 clean_clk_ret: 936 clk_put(priv->clk); 937 clean_slave_ret: 938 pm_runtime_disable(&pdev->dev); 939 kfree(priv->slaves); 940 clean_ndev_ret: 941 free_netdev(ndev); 942 return ret; 943 } 944 945 static int __devexit cpsw_remove(struct platform_device *pdev) 946 { 947 struct net_device *ndev = platform_get_drvdata(pdev); 948 struct cpsw_priv *priv = netdev_priv(ndev); 949 950 pr_info("removing device"); 951 platform_set_drvdata(pdev, NULL); 952 953 free_irq(ndev->irq, priv); 954 cpsw_ale_destroy(priv->ale); 955 cpdma_chan_destroy(priv->txch); 956 cpdma_chan_destroy(priv->rxch); 957 cpdma_ctlr_destroy(priv->dma); 958 iounmap(priv->regs); 959 release_mem_region(priv->cpsw_res->start, 960 resource_size(priv->cpsw_res)); 961 release_mem_region(priv->cpsw_ss_res->start, 962 resource_size(priv->cpsw_ss_res)); 963 pm_runtime_disable(&pdev->dev); 964 clk_put(priv->clk); 965 kfree(priv->slaves); 966 free_netdev(ndev); 967 968 return 0; 969 } 970 971 static int cpsw_suspend(struct device *dev) 972 { 973 struct platform_device *pdev = to_platform_device(dev); 974 struct net_device *ndev = platform_get_drvdata(pdev); 975 976 if (netif_running(ndev)) 977 cpsw_ndo_stop(ndev); 978 pm_runtime_put_sync(&pdev->dev); 979 980 return 0; 981 } 982 983 static int cpsw_resume(struct device *dev) 984 { 985 struct platform_device *pdev = to_platform_device(dev); 986 struct net_device *ndev = platform_get_drvdata(pdev); 987 988 pm_runtime_get_sync(&pdev->dev); 989 if (netif_running(ndev)) 990 cpsw_ndo_open(ndev); 991 return 0; 992 } 993 994 static const struct dev_pm_ops cpsw_pm_ops = { 995 .suspend = cpsw_suspend, 996 .resume = cpsw_resume, 997 }; 998 999 static struct platform_driver cpsw_driver = { 1000 .driver = { 1001 .name = "cpsw", 1002 .owner = THIS_MODULE, 1003 .pm = &cpsw_pm_ops, 1004 }, 1005 .probe = cpsw_probe, 1006 .remove = __devexit_p(cpsw_remove), 1007 }; 1008 1009 static int __init cpsw_init(void) 1010 { 1011 return platform_driver_register(&cpsw_driver); 1012 } 1013 late_initcall(cpsw_init); 1014 1015 static void __exit cpsw_exit(void) 1016 { 1017 platform_driver_unregister(&cpsw_driver); 1018 } 1019 module_exit(cpsw_exit); 1020 1021 MODULE_LICENSE("GPL"); 1022 MODULE_AUTHOR("Cyril Chemparathy <cyril@ti.com>"); 1023 MODULE_AUTHOR("Mugunthan V N <mugunthanvnm@ti.com>"); 1024 MODULE_DESCRIPTION("TI CPSW Ethernet driver"); 1025