1 // SPDX-License-Identifier: (GPL-2.0 OR MIT) 2 /* 3 * Copyright (c) 2018 Synopsys, Inc. and/or its affiliates. 4 * stmmac TC Handling (HW only) 5 */ 6 7 #include <net/pkt_cls.h> 8 #include <net/tc_act/tc_gact.h> 9 #include "common.h" 10 #include "dwmac4.h" 11 #include "dwmac5.h" 12 #include "stmmac.h" 13 14 static void tc_fill_all_pass_entry(struct stmmac_tc_entry *entry) 15 { 16 memset(entry, 0, sizeof(*entry)); 17 entry->in_use = true; 18 entry->is_last = true; 19 entry->is_frag = false; 20 entry->prio = ~0x0; 21 entry->handle = 0; 22 entry->val.match_data = 0x0; 23 entry->val.match_en = 0x0; 24 entry->val.af = 1; 25 entry->val.dma_ch_no = 0x0; 26 } 27 28 static struct stmmac_tc_entry *tc_find_entry(struct stmmac_priv *priv, 29 struct tc_cls_u32_offload *cls, 30 bool free) 31 { 32 struct stmmac_tc_entry *entry, *first = NULL, *dup = NULL; 33 u32 loc = cls->knode.handle; 34 int i; 35 36 for (i = 0; i < priv->tc_entries_max; i++) { 37 entry = &priv->tc_entries[i]; 38 if (!entry->in_use && !first && free) 39 first = entry; 40 if ((entry->handle == loc) && !free && !entry->is_frag) 41 dup = entry; 42 } 43 44 if (dup) 45 return dup; 46 if (first) { 47 first->handle = loc; 48 first->in_use = true; 49 50 /* Reset HW values */ 51 memset(&first->val, 0, sizeof(first->val)); 52 } 53 54 return first; 55 } 56 57 static int tc_fill_actions(struct stmmac_tc_entry *entry, 58 struct stmmac_tc_entry *frag, 59 struct tc_cls_u32_offload *cls) 60 { 61 struct stmmac_tc_entry *action_entry = entry; 62 const struct tc_action *act; 63 struct tcf_exts *exts; 64 int i; 65 66 exts = cls->knode.exts; 67 if (!tcf_exts_has_actions(exts)) 68 return -EINVAL; 69 if (frag) 70 action_entry = frag; 71 72 tcf_exts_for_each_action(i, act, exts) { 73 /* Accept */ 74 if (is_tcf_gact_ok(act)) { 75 action_entry->val.af = 1; 76 break; 77 } 78 /* Drop */ 79 if (is_tcf_gact_shot(act)) { 80 action_entry->val.rf = 1; 81 break; 82 } 83 84 /* Unsupported */ 85 return -EINVAL; 86 } 87 88 return 0; 89 } 90 91 static int tc_fill_entry(struct stmmac_priv *priv, 92 struct tc_cls_u32_offload *cls) 93 { 94 struct stmmac_tc_entry *entry, *frag = NULL; 95 struct tc_u32_sel *sel = cls->knode.sel; 96 u32 off, data, mask, real_off, rem; 97 u32 prio = cls->common.prio << 16; 98 int ret; 99 100 /* Only 1 match per entry */ 101 if (sel->nkeys <= 0 || sel->nkeys > 1) 102 return -EINVAL; 103 104 off = sel->keys[0].off << sel->offshift; 105 data = sel->keys[0].val; 106 mask = sel->keys[0].mask; 107 108 switch (ntohs(cls->common.protocol)) { 109 case ETH_P_ALL: 110 break; 111 case ETH_P_IP: 112 off += ETH_HLEN; 113 break; 114 default: 115 return -EINVAL; 116 } 117 118 if (off > priv->tc_off_max) 119 return -EINVAL; 120 121 real_off = off / 4; 122 rem = off % 4; 123 124 entry = tc_find_entry(priv, cls, true); 125 if (!entry) 126 return -EINVAL; 127 128 if (rem) { 129 frag = tc_find_entry(priv, cls, true); 130 if (!frag) { 131 ret = -EINVAL; 132 goto err_unuse; 133 } 134 135 entry->frag_ptr = frag; 136 entry->val.match_en = (mask << (rem * 8)) & 137 GENMASK(31, rem * 8); 138 entry->val.match_data = (data << (rem * 8)) & 139 GENMASK(31, rem * 8); 140 entry->val.frame_offset = real_off; 141 entry->prio = prio; 142 143 frag->val.match_en = (mask >> (rem * 8)) & 144 GENMASK(rem * 8 - 1, 0); 145 frag->val.match_data = (data >> (rem * 8)) & 146 GENMASK(rem * 8 - 1, 0); 147 frag->val.frame_offset = real_off + 1; 148 frag->prio = prio; 149 frag->is_frag = true; 150 } else { 151 entry->frag_ptr = NULL; 152 entry->val.match_en = mask; 153 entry->val.match_data = data; 154 entry->val.frame_offset = real_off; 155 entry->prio = prio; 156 } 157 158 ret = tc_fill_actions(entry, frag, cls); 159 if (ret) 160 goto err_unuse; 161 162 return 0; 163 164 err_unuse: 165 if (frag) 166 frag->in_use = false; 167 entry->in_use = false; 168 return ret; 169 } 170 171 static void tc_unfill_entry(struct stmmac_priv *priv, 172 struct tc_cls_u32_offload *cls) 173 { 174 struct stmmac_tc_entry *entry; 175 176 entry = tc_find_entry(priv, cls, false); 177 if (!entry) 178 return; 179 180 entry->in_use = false; 181 if (entry->frag_ptr) { 182 entry = entry->frag_ptr; 183 entry->is_frag = false; 184 entry->in_use = false; 185 } 186 } 187 188 static int tc_config_knode(struct stmmac_priv *priv, 189 struct tc_cls_u32_offload *cls) 190 { 191 int ret; 192 193 ret = tc_fill_entry(priv, cls); 194 if (ret) 195 return ret; 196 197 ret = stmmac_rxp_config(priv, priv->hw->pcsr, priv->tc_entries, 198 priv->tc_entries_max); 199 if (ret) 200 goto err_unfill; 201 202 return 0; 203 204 err_unfill: 205 tc_unfill_entry(priv, cls); 206 return ret; 207 } 208 209 static int tc_delete_knode(struct stmmac_priv *priv, 210 struct tc_cls_u32_offload *cls) 211 { 212 /* Set entry and fragments as not used */ 213 tc_unfill_entry(priv, cls); 214 215 return stmmac_rxp_config(priv, priv->hw->pcsr, priv->tc_entries, 216 priv->tc_entries_max); 217 } 218 219 static int tc_setup_cls_u32(struct stmmac_priv *priv, 220 struct tc_cls_u32_offload *cls) 221 { 222 switch (cls->command) { 223 case TC_CLSU32_REPLACE_KNODE: 224 tc_unfill_entry(priv, cls); 225 fallthrough; 226 case TC_CLSU32_NEW_KNODE: 227 return tc_config_knode(priv, cls); 228 case TC_CLSU32_DELETE_KNODE: 229 return tc_delete_knode(priv, cls); 230 default: 231 return -EOPNOTSUPP; 232 } 233 } 234 235 static int tc_rfs_init(struct stmmac_priv *priv) 236 { 237 int i; 238 239 priv->rfs_entries_max[STMMAC_RFS_T_VLAN] = 8; 240 priv->rfs_entries_max[STMMAC_RFS_T_LLDP] = 1; 241 priv->rfs_entries_max[STMMAC_RFS_T_1588] = 1; 242 243 for (i = 0; i < STMMAC_RFS_T_MAX; i++) 244 priv->rfs_entries_total += priv->rfs_entries_max[i]; 245 246 priv->rfs_entries = devm_kcalloc(priv->device, 247 priv->rfs_entries_total, 248 sizeof(*priv->rfs_entries), 249 GFP_KERNEL); 250 if (!priv->rfs_entries) 251 return -ENOMEM; 252 253 dev_info(priv->device, "Enabled RFS Flow TC (entries=%d)\n", 254 priv->rfs_entries_total); 255 256 return 0; 257 } 258 259 static int tc_init(struct stmmac_priv *priv) 260 { 261 struct dma_features *dma_cap = &priv->dma_cap; 262 unsigned int count; 263 int ret, i; 264 265 if (dma_cap->l3l4fnum) { 266 priv->flow_entries_max = dma_cap->l3l4fnum; 267 priv->flow_entries = devm_kcalloc(priv->device, 268 dma_cap->l3l4fnum, 269 sizeof(*priv->flow_entries), 270 GFP_KERNEL); 271 if (!priv->flow_entries) 272 return -ENOMEM; 273 274 for (i = 0; i < priv->flow_entries_max; i++) 275 priv->flow_entries[i].idx = i; 276 277 dev_info(priv->device, "Enabled L3L4 Flow TC (entries=%d)\n", 278 priv->flow_entries_max); 279 } 280 281 ret = tc_rfs_init(priv); 282 if (ret) 283 return -ENOMEM; 284 285 /* Fail silently as we can still use remaining features, e.g. CBS */ 286 if (!dma_cap->frpsel) 287 return 0; 288 289 switch (dma_cap->frpbs) { 290 case 0x0: 291 priv->tc_off_max = 64; 292 break; 293 case 0x1: 294 priv->tc_off_max = 128; 295 break; 296 case 0x2: 297 priv->tc_off_max = 256; 298 break; 299 default: 300 return -EINVAL; 301 } 302 303 switch (dma_cap->frpes) { 304 case 0x0: 305 count = 64; 306 break; 307 case 0x1: 308 count = 128; 309 break; 310 case 0x2: 311 count = 256; 312 break; 313 default: 314 return -EINVAL; 315 } 316 317 /* Reserve one last filter which lets all pass */ 318 priv->tc_entries_max = count; 319 priv->tc_entries = devm_kcalloc(priv->device, 320 count, sizeof(*priv->tc_entries), GFP_KERNEL); 321 if (!priv->tc_entries) 322 return -ENOMEM; 323 324 tc_fill_all_pass_entry(&priv->tc_entries[count - 1]); 325 326 dev_info(priv->device, "Enabling HW TC (entries=%d, max_off=%d)\n", 327 priv->tc_entries_max, priv->tc_off_max); 328 329 return 0; 330 } 331 332 static int tc_setup_cbs(struct stmmac_priv *priv, 333 struct tc_cbs_qopt_offload *qopt) 334 { 335 u32 tx_queues_count = priv->plat->tx_queues_to_use; 336 s64 port_transmit_rate_kbps; 337 u32 queue = qopt->queue; 338 u32 mode_to_use; 339 u64 value; 340 u32 ptr; 341 int ret; 342 343 /* Queue 0 is not AVB capable */ 344 if (queue <= 0 || queue >= tx_queues_count) 345 return -EINVAL; 346 if (!priv->dma_cap.av) 347 return -EOPNOTSUPP; 348 349 port_transmit_rate_kbps = qopt->idleslope - qopt->sendslope; 350 351 if (qopt->enable) { 352 /* Port Transmit Rate and Speed Divider */ 353 switch (div_s64(port_transmit_rate_kbps, 1000)) { 354 case SPEED_10000: 355 case SPEED_5000: 356 ptr = 32; 357 break; 358 case SPEED_2500: 359 case SPEED_1000: 360 ptr = 8; 361 break; 362 case SPEED_100: 363 ptr = 4; 364 break; 365 default: 366 netdev_err(priv->dev, 367 "Invalid portTransmitRate %lld (idleSlope - sendSlope)\n", 368 port_transmit_rate_kbps); 369 return -EINVAL; 370 } 371 } else { 372 ptr = 0; 373 } 374 375 mode_to_use = priv->plat->tx_queues_cfg[queue].mode_to_use; 376 if (mode_to_use == MTL_QUEUE_DCB && qopt->enable) { 377 ret = stmmac_dma_qmode(priv, priv->ioaddr, queue, MTL_QUEUE_AVB); 378 if (ret) 379 return ret; 380 381 priv->plat->tx_queues_cfg[queue].mode_to_use = MTL_QUEUE_AVB; 382 } else if (!qopt->enable) { 383 ret = stmmac_dma_qmode(priv, priv->ioaddr, queue, 384 MTL_QUEUE_DCB); 385 if (ret) 386 return ret; 387 388 priv->plat->tx_queues_cfg[queue].mode_to_use = MTL_QUEUE_DCB; 389 } 390 391 /* Final adjustments for HW */ 392 value = div_s64(qopt->idleslope * 1024ll * ptr, port_transmit_rate_kbps); 393 priv->plat->tx_queues_cfg[queue].idle_slope = value & GENMASK(31, 0); 394 395 value = div_s64(-qopt->sendslope * 1024ll * ptr, port_transmit_rate_kbps); 396 priv->plat->tx_queues_cfg[queue].send_slope = value & GENMASK(31, 0); 397 398 value = qopt->hicredit * 1024ll * 8; 399 priv->plat->tx_queues_cfg[queue].high_credit = value & GENMASK(31, 0); 400 401 value = qopt->locredit * 1024ll * 8; 402 priv->plat->tx_queues_cfg[queue].low_credit = value & GENMASK(31, 0); 403 404 ret = stmmac_config_cbs(priv, priv->hw, 405 priv->plat->tx_queues_cfg[queue].send_slope, 406 priv->plat->tx_queues_cfg[queue].idle_slope, 407 priv->plat->tx_queues_cfg[queue].high_credit, 408 priv->plat->tx_queues_cfg[queue].low_credit, 409 queue); 410 if (ret) 411 return ret; 412 413 dev_info(priv->device, "CBS queue %d: send %d, idle %d, hi %d, lo %d\n", 414 queue, qopt->sendslope, qopt->idleslope, 415 qopt->hicredit, qopt->locredit); 416 return 0; 417 } 418 419 static int tc_parse_flow_actions(struct stmmac_priv *priv, 420 struct flow_action *action, 421 struct stmmac_flow_entry *entry, 422 struct netlink_ext_ack *extack) 423 { 424 struct flow_action_entry *act; 425 int i; 426 427 if (!flow_action_has_entries(action)) 428 return -EINVAL; 429 430 if (!flow_action_basic_hw_stats_check(action, extack)) 431 return -EOPNOTSUPP; 432 433 flow_action_for_each(i, act, action) { 434 switch (act->id) { 435 case FLOW_ACTION_DROP: 436 entry->action |= STMMAC_FLOW_ACTION_DROP; 437 return 0; 438 default: 439 break; 440 } 441 } 442 443 /* Nothing to do, maybe inverse filter ? */ 444 return 0; 445 } 446 447 #define ETHER_TYPE_FULL_MASK cpu_to_be16(~0) 448 449 static int tc_add_basic_flow(struct stmmac_priv *priv, 450 struct flow_cls_offload *cls, 451 struct stmmac_flow_entry *entry) 452 { 453 struct flow_rule *rule = flow_cls_offload_flow_rule(cls); 454 struct flow_dissector *dissector = rule->match.dissector; 455 struct flow_match_basic match; 456 457 /* Nothing to do here */ 458 if (!dissector_uses_key(dissector, FLOW_DISSECTOR_KEY_BASIC)) 459 return -EINVAL; 460 461 flow_rule_match_basic(rule, &match); 462 463 entry->ip_proto = match.key->ip_proto; 464 return 0; 465 } 466 467 static int tc_add_ip4_flow(struct stmmac_priv *priv, 468 struct flow_cls_offload *cls, 469 struct stmmac_flow_entry *entry) 470 { 471 struct flow_rule *rule = flow_cls_offload_flow_rule(cls); 472 struct flow_dissector *dissector = rule->match.dissector; 473 bool inv = entry->action & STMMAC_FLOW_ACTION_DROP; 474 struct flow_match_ipv4_addrs match; 475 u32 hw_match; 476 int ret; 477 478 /* Nothing to do here */ 479 if (!dissector_uses_key(dissector, FLOW_DISSECTOR_KEY_IPV4_ADDRS)) 480 return -EINVAL; 481 482 flow_rule_match_ipv4_addrs(rule, &match); 483 hw_match = ntohl(match.key->src) & ntohl(match.mask->src); 484 if (hw_match) { 485 ret = stmmac_config_l3_filter(priv, priv->hw, entry->idx, true, 486 false, true, inv, hw_match); 487 if (ret) 488 return ret; 489 } 490 491 hw_match = ntohl(match.key->dst) & ntohl(match.mask->dst); 492 if (hw_match) { 493 ret = stmmac_config_l3_filter(priv, priv->hw, entry->idx, true, 494 false, false, inv, hw_match); 495 if (ret) 496 return ret; 497 } 498 499 return 0; 500 } 501 502 static int tc_add_ports_flow(struct stmmac_priv *priv, 503 struct flow_cls_offload *cls, 504 struct stmmac_flow_entry *entry) 505 { 506 struct flow_rule *rule = flow_cls_offload_flow_rule(cls); 507 struct flow_dissector *dissector = rule->match.dissector; 508 bool inv = entry->action & STMMAC_FLOW_ACTION_DROP; 509 struct flow_match_ports match; 510 u32 hw_match; 511 bool is_udp; 512 int ret; 513 514 /* Nothing to do here */ 515 if (!dissector_uses_key(dissector, FLOW_DISSECTOR_KEY_PORTS)) 516 return -EINVAL; 517 518 switch (entry->ip_proto) { 519 case IPPROTO_TCP: 520 is_udp = false; 521 break; 522 case IPPROTO_UDP: 523 is_udp = true; 524 break; 525 default: 526 return -EINVAL; 527 } 528 529 flow_rule_match_ports(rule, &match); 530 531 hw_match = ntohs(match.key->src) & ntohs(match.mask->src); 532 if (hw_match) { 533 ret = stmmac_config_l4_filter(priv, priv->hw, entry->idx, true, 534 is_udp, true, inv, hw_match); 535 if (ret) 536 return ret; 537 } 538 539 hw_match = ntohs(match.key->dst) & ntohs(match.mask->dst); 540 if (hw_match) { 541 ret = stmmac_config_l4_filter(priv, priv->hw, entry->idx, true, 542 is_udp, false, inv, hw_match); 543 if (ret) 544 return ret; 545 } 546 547 entry->is_l4 = true; 548 return 0; 549 } 550 551 static struct stmmac_flow_entry *tc_find_flow(struct stmmac_priv *priv, 552 struct flow_cls_offload *cls, 553 bool get_free) 554 { 555 int i; 556 557 for (i = 0; i < priv->flow_entries_max; i++) { 558 struct stmmac_flow_entry *entry = &priv->flow_entries[i]; 559 560 if (entry->cookie == cls->cookie) 561 return entry; 562 if (get_free && (entry->in_use == false)) 563 return entry; 564 } 565 566 return NULL; 567 } 568 569 static struct { 570 int (*fn)(struct stmmac_priv *priv, struct flow_cls_offload *cls, 571 struct stmmac_flow_entry *entry); 572 } tc_flow_parsers[] = { 573 { .fn = tc_add_basic_flow }, 574 { .fn = tc_add_ip4_flow }, 575 { .fn = tc_add_ports_flow }, 576 }; 577 578 static int tc_add_flow(struct stmmac_priv *priv, 579 struct flow_cls_offload *cls) 580 { 581 struct stmmac_flow_entry *entry = tc_find_flow(priv, cls, false); 582 struct flow_rule *rule = flow_cls_offload_flow_rule(cls); 583 int i, ret; 584 585 if (!entry) { 586 entry = tc_find_flow(priv, cls, true); 587 if (!entry) 588 return -ENOENT; 589 } 590 591 ret = tc_parse_flow_actions(priv, &rule->action, entry, 592 cls->common.extack); 593 if (ret) 594 return ret; 595 596 for (i = 0; i < ARRAY_SIZE(tc_flow_parsers); i++) { 597 ret = tc_flow_parsers[i].fn(priv, cls, entry); 598 if (!ret) 599 entry->in_use = true; 600 } 601 602 if (!entry->in_use) 603 return -EINVAL; 604 605 entry->cookie = cls->cookie; 606 return 0; 607 } 608 609 static int tc_del_flow(struct stmmac_priv *priv, 610 struct flow_cls_offload *cls) 611 { 612 struct stmmac_flow_entry *entry = tc_find_flow(priv, cls, false); 613 int ret; 614 615 if (!entry || !entry->in_use) 616 return -ENOENT; 617 618 if (entry->is_l4) { 619 ret = stmmac_config_l4_filter(priv, priv->hw, entry->idx, false, 620 false, false, false, 0); 621 } else { 622 ret = stmmac_config_l3_filter(priv, priv->hw, entry->idx, false, 623 false, false, false, 0); 624 } 625 626 entry->in_use = false; 627 entry->cookie = 0; 628 entry->is_l4 = false; 629 return ret; 630 } 631 632 static struct stmmac_rfs_entry *tc_find_rfs(struct stmmac_priv *priv, 633 struct flow_cls_offload *cls, 634 bool get_free) 635 { 636 int i; 637 638 for (i = 0; i < priv->rfs_entries_total; i++) { 639 struct stmmac_rfs_entry *entry = &priv->rfs_entries[i]; 640 641 if (entry->cookie == cls->cookie) 642 return entry; 643 if (get_free && entry->in_use == false) 644 return entry; 645 } 646 647 return NULL; 648 } 649 650 #define VLAN_PRIO_FULL_MASK (0x07) 651 652 static int tc_add_vlan_flow(struct stmmac_priv *priv, 653 struct flow_cls_offload *cls) 654 { 655 struct stmmac_rfs_entry *entry = tc_find_rfs(priv, cls, false); 656 struct flow_rule *rule = flow_cls_offload_flow_rule(cls); 657 struct flow_dissector *dissector = rule->match.dissector; 658 int tc = tc_classid_to_hwtc(priv->dev, cls->classid); 659 struct flow_match_vlan match; 660 661 if (!entry) { 662 entry = tc_find_rfs(priv, cls, true); 663 if (!entry) 664 return -ENOENT; 665 } 666 667 if (priv->rfs_entries_cnt[STMMAC_RFS_T_VLAN] >= 668 priv->rfs_entries_max[STMMAC_RFS_T_VLAN]) 669 return -ENOENT; 670 671 /* Nothing to do here */ 672 if (!dissector_uses_key(dissector, FLOW_DISSECTOR_KEY_VLAN)) 673 return -EINVAL; 674 675 if (tc < 0) { 676 netdev_err(priv->dev, "Invalid traffic class\n"); 677 return -EINVAL; 678 } 679 680 flow_rule_match_vlan(rule, &match); 681 682 if (match.mask->vlan_priority) { 683 u32 prio; 684 685 if (match.mask->vlan_priority != VLAN_PRIO_FULL_MASK) { 686 netdev_err(priv->dev, "Only full mask is supported for VLAN priority"); 687 return -EINVAL; 688 } 689 690 prio = BIT(match.key->vlan_priority); 691 stmmac_rx_queue_prio(priv, priv->hw, prio, tc); 692 693 entry->in_use = true; 694 entry->cookie = cls->cookie; 695 entry->tc = tc; 696 entry->type = STMMAC_RFS_T_VLAN; 697 priv->rfs_entries_cnt[STMMAC_RFS_T_VLAN]++; 698 } 699 700 return 0; 701 } 702 703 static int tc_del_vlan_flow(struct stmmac_priv *priv, 704 struct flow_cls_offload *cls) 705 { 706 struct stmmac_rfs_entry *entry = tc_find_rfs(priv, cls, false); 707 708 if (!entry || !entry->in_use || entry->type != STMMAC_RFS_T_VLAN) 709 return -ENOENT; 710 711 stmmac_rx_queue_prio(priv, priv->hw, 0, entry->tc); 712 713 entry->in_use = false; 714 entry->cookie = 0; 715 entry->tc = 0; 716 entry->type = 0; 717 718 priv->rfs_entries_cnt[STMMAC_RFS_T_VLAN]--; 719 720 return 0; 721 } 722 723 static int tc_add_ethtype_flow(struct stmmac_priv *priv, 724 struct flow_cls_offload *cls) 725 { 726 struct stmmac_rfs_entry *entry = tc_find_rfs(priv, cls, false); 727 struct flow_rule *rule = flow_cls_offload_flow_rule(cls); 728 struct flow_dissector *dissector = rule->match.dissector; 729 int tc = tc_classid_to_hwtc(priv->dev, cls->classid); 730 struct flow_match_basic match; 731 732 if (!entry) { 733 entry = tc_find_rfs(priv, cls, true); 734 if (!entry) 735 return -ENOENT; 736 } 737 738 /* Nothing to do here */ 739 if (!dissector_uses_key(dissector, FLOW_DISSECTOR_KEY_BASIC)) 740 return -EINVAL; 741 742 if (tc < 0) { 743 netdev_err(priv->dev, "Invalid traffic class\n"); 744 return -EINVAL; 745 } 746 747 flow_rule_match_basic(rule, &match); 748 749 if (match.mask->n_proto) { 750 u16 etype = ntohs(match.key->n_proto); 751 752 if (match.mask->n_proto != ETHER_TYPE_FULL_MASK) { 753 netdev_err(priv->dev, "Only full mask is supported for EthType filter"); 754 return -EINVAL; 755 } 756 switch (etype) { 757 case ETH_P_LLDP: 758 if (priv->rfs_entries_cnt[STMMAC_RFS_T_LLDP] >= 759 priv->rfs_entries_max[STMMAC_RFS_T_LLDP]) 760 return -ENOENT; 761 762 entry->type = STMMAC_RFS_T_LLDP; 763 priv->rfs_entries_cnt[STMMAC_RFS_T_LLDP]++; 764 765 stmmac_rx_queue_routing(priv, priv->hw, 766 PACKET_DCBCPQ, tc); 767 break; 768 case ETH_P_1588: 769 if (priv->rfs_entries_cnt[STMMAC_RFS_T_1588] >= 770 priv->rfs_entries_max[STMMAC_RFS_T_1588]) 771 return -ENOENT; 772 773 entry->type = STMMAC_RFS_T_1588; 774 priv->rfs_entries_cnt[STMMAC_RFS_T_1588]++; 775 776 stmmac_rx_queue_routing(priv, priv->hw, 777 PACKET_PTPQ, tc); 778 break; 779 default: 780 netdev_err(priv->dev, "EthType(0x%x) is not supported", etype); 781 return -EINVAL; 782 } 783 784 entry->in_use = true; 785 entry->cookie = cls->cookie; 786 entry->tc = tc; 787 entry->etype = etype; 788 789 return 0; 790 } 791 792 return -EINVAL; 793 } 794 795 static int tc_del_ethtype_flow(struct stmmac_priv *priv, 796 struct flow_cls_offload *cls) 797 { 798 struct stmmac_rfs_entry *entry = tc_find_rfs(priv, cls, false); 799 800 if (!entry || !entry->in_use || 801 entry->type < STMMAC_RFS_T_LLDP || 802 entry->type > STMMAC_RFS_T_1588) 803 return -ENOENT; 804 805 switch (entry->etype) { 806 case ETH_P_LLDP: 807 stmmac_rx_queue_routing(priv, priv->hw, 808 PACKET_DCBCPQ, 0); 809 priv->rfs_entries_cnt[STMMAC_RFS_T_LLDP]--; 810 break; 811 case ETH_P_1588: 812 stmmac_rx_queue_routing(priv, priv->hw, 813 PACKET_PTPQ, 0); 814 priv->rfs_entries_cnt[STMMAC_RFS_T_1588]--; 815 break; 816 default: 817 netdev_err(priv->dev, "EthType(0x%x) is not supported", 818 entry->etype); 819 return -EINVAL; 820 } 821 822 entry->in_use = false; 823 entry->cookie = 0; 824 entry->tc = 0; 825 entry->etype = 0; 826 entry->type = 0; 827 828 return 0; 829 } 830 831 static int tc_add_flow_cls(struct stmmac_priv *priv, 832 struct flow_cls_offload *cls) 833 { 834 int ret; 835 836 ret = tc_add_flow(priv, cls); 837 if (!ret) 838 return ret; 839 840 ret = tc_add_ethtype_flow(priv, cls); 841 if (!ret) 842 return ret; 843 844 return tc_add_vlan_flow(priv, cls); 845 } 846 847 static int tc_del_flow_cls(struct stmmac_priv *priv, 848 struct flow_cls_offload *cls) 849 { 850 int ret; 851 852 ret = tc_del_flow(priv, cls); 853 if (!ret) 854 return ret; 855 856 ret = tc_del_ethtype_flow(priv, cls); 857 if (!ret) 858 return ret; 859 860 return tc_del_vlan_flow(priv, cls); 861 } 862 863 static int tc_setup_cls(struct stmmac_priv *priv, 864 struct flow_cls_offload *cls) 865 { 866 int ret = 0; 867 868 /* When RSS is enabled, the filtering will be bypassed */ 869 if (priv->rss.enable) 870 return -EBUSY; 871 872 switch (cls->command) { 873 case FLOW_CLS_REPLACE: 874 ret = tc_add_flow_cls(priv, cls); 875 break; 876 case FLOW_CLS_DESTROY: 877 ret = tc_del_flow_cls(priv, cls); 878 break; 879 default: 880 return -EOPNOTSUPP; 881 } 882 883 return ret; 884 } 885 886 struct timespec64 stmmac_calc_tas_basetime(ktime_t old_base_time, 887 ktime_t current_time, 888 u64 cycle_time) 889 { 890 struct timespec64 time; 891 892 if (ktime_after(old_base_time, current_time)) { 893 time = ktime_to_timespec64(old_base_time); 894 } else { 895 s64 n; 896 ktime_t base_time; 897 898 n = div64_s64(ktime_sub_ns(current_time, old_base_time), 899 cycle_time); 900 base_time = ktime_add_ns(old_base_time, 901 (n + 1) * cycle_time); 902 903 time = ktime_to_timespec64(base_time); 904 } 905 906 return time; 907 } 908 909 static void tc_taprio_map_maxsdu_txq(struct stmmac_priv *priv, 910 struct tc_taprio_qopt_offload *qopt) 911 { 912 u32 num_tc = qopt->mqprio.qopt.num_tc; 913 u32 offset, count, i, j; 914 915 /* QueueMaxSDU received from the driver corresponds to the Linux traffic 916 * class. Map queueMaxSDU per Linux traffic class to DWMAC Tx queues. 917 */ 918 for (i = 0; i < num_tc; i++) { 919 if (!qopt->max_sdu[i]) 920 continue; 921 922 offset = qopt->mqprio.qopt.offset[i]; 923 count = qopt->mqprio.qopt.count[i]; 924 925 for (j = offset; j < offset + count; j++) 926 priv->est->max_sdu[j] = qopt->max_sdu[i] + ETH_HLEN - ETH_TLEN; 927 } 928 } 929 930 static int tc_taprio_configure(struct stmmac_priv *priv, 931 struct tc_taprio_qopt_offload *qopt) 932 { 933 u32 size, wid = priv->dma_cap.estwid, dep = priv->dma_cap.estdep; 934 struct netlink_ext_ack *extack = qopt->mqprio.extack; 935 struct timespec64 time, current_time, qopt_time; 936 ktime_t current_time_ns; 937 int i, ret = 0; 938 u64 ctr; 939 940 if (qopt->base_time < 0) 941 return -ERANGE; 942 943 if (!priv->dma_cap.estsel) 944 return -EOPNOTSUPP; 945 946 switch (wid) { 947 case 0x1: 948 wid = 16; 949 break; 950 case 0x2: 951 wid = 20; 952 break; 953 case 0x3: 954 wid = 24; 955 break; 956 default: 957 return -EOPNOTSUPP; 958 } 959 960 switch (dep) { 961 case 0x1: 962 dep = 64; 963 break; 964 case 0x2: 965 dep = 128; 966 break; 967 case 0x3: 968 dep = 256; 969 break; 970 case 0x4: 971 dep = 512; 972 break; 973 case 0x5: 974 dep = 1024; 975 break; 976 default: 977 return -EOPNOTSUPP; 978 } 979 980 if (qopt->cmd == TAPRIO_CMD_DESTROY) 981 goto disable; 982 983 if (qopt->num_entries >= dep) 984 return -EINVAL; 985 if (!qopt->cycle_time) 986 return -ERANGE; 987 if (qopt->cycle_time_extension >= BIT(wid + 7)) 988 return -ERANGE; 989 990 if (!priv->est) { 991 priv->est = devm_kzalloc(priv->device, sizeof(*priv->est), 992 GFP_KERNEL); 993 if (!priv->est) 994 return -ENOMEM; 995 996 mutex_init(&priv->est_lock); 997 } else { 998 mutex_lock(&priv->est_lock); 999 memset(priv->est, 0, sizeof(*priv->est)); 1000 mutex_unlock(&priv->est_lock); 1001 } 1002 1003 size = qopt->num_entries; 1004 1005 mutex_lock(&priv->est_lock); 1006 priv->est->gcl_size = size; 1007 priv->est->enable = qopt->cmd == TAPRIO_CMD_REPLACE; 1008 mutex_unlock(&priv->est_lock); 1009 1010 for (i = 0; i < size; i++) { 1011 s64 delta_ns = qopt->entries[i].interval; 1012 u32 gates = qopt->entries[i].gate_mask; 1013 1014 if (delta_ns > GENMASK(wid, 0)) 1015 return -ERANGE; 1016 if (gates > GENMASK(31 - wid, 0)) 1017 return -ERANGE; 1018 1019 switch (qopt->entries[i].command) { 1020 case TC_TAPRIO_CMD_SET_GATES: 1021 break; 1022 case TC_TAPRIO_CMD_SET_AND_HOLD: 1023 gates |= BIT(0); 1024 break; 1025 case TC_TAPRIO_CMD_SET_AND_RELEASE: 1026 gates &= ~BIT(0); 1027 break; 1028 default: 1029 return -EOPNOTSUPP; 1030 } 1031 1032 priv->est->gcl[i] = delta_ns | (gates << wid); 1033 } 1034 1035 mutex_lock(&priv->est_lock); 1036 /* Adjust for real system time */ 1037 priv->ptp_clock_ops.gettime64(&priv->ptp_clock_ops, ¤t_time); 1038 current_time_ns = timespec64_to_ktime(current_time); 1039 time = stmmac_calc_tas_basetime(qopt->base_time, current_time_ns, 1040 qopt->cycle_time); 1041 1042 priv->est->btr[0] = (u32)time.tv_nsec; 1043 priv->est->btr[1] = (u32)time.tv_sec; 1044 1045 qopt_time = ktime_to_timespec64(qopt->base_time); 1046 priv->est->btr_reserve[0] = (u32)qopt_time.tv_nsec; 1047 priv->est->btr_reserve[1] = (u32)qopt_time.tv_sec; 1048 1049 ctr = qopt->cycle_time; 1050 priv->est->ctr[0] = do_div(ctr, NSEC_PER_SEC); 1051 priv->est->ctr[1] = (u32)ctr; 1052 1053 priv->est->ter = qopt->cycle_time_extension; 1054 1055 tc_taprio_map_maxsdu_txq(priv, qopt); 1056 1057 ret = stmmac_est_configure(priv, priv, priv->est, 1058 priv->plat->clk_ptp_rate); 1059 mutex_unlock(&priv->est_lock); 1060 if (ret) { 1061 netdev_err(priv->dev, "failed to configure EST\n"); 1062 goto disable; 1063 } 1064 1065 ret = stmmac_fpe_map_preemption_class(priv, priv->dev, extack, 1066 qopt->mqprio.preemptible_tcs); 1067 if (ret) 1068 goto disable; 1069 1070 return 0; 1071 1072 disable: 1073 if (priv->est) { 1074 mutex_lock(&priv->est_lock); 1075 priv->est->enable = false; 1076 stmmac_est_configure(priv, priv, priv->est, 1077 priv->plat->clk_ptp_rate); 1078 /* Reset taprio status */ 1079 for (i = 0; i < priv->plat->tx_queues_to_use; i++) { 1080 priv->xstats.max_sdu_txq_drop[i] = 0; 1081 priv->xstats.mtl_est_txq_hlbf[i] = 0; 1082 } 1083 mutex_unlock(&priv->est_lock); 1084 } 1085 1086 stmmac_fpe_map_preemption_class(priv, priv->dev, extack, 0); 1087 1088 return ret; 1089 } 1090 1091 static void tc_taprio_stats(struct stmmac_priv *priv, 1092 struct tc_taprio_qopt_offload *qopt) 1093 { 1094 u64 window_drops = 0; 1095 int i = 0; 1096 1097 for (i = 0; i < priv->plat->tx_queues_to_use; i++) 1098 window_drops += priv->xstats.max_sdu_txq_drop[i] + 1099 priv->xstats.mtl_est_txq_hlbf[i]; 1100 qopt->stats.window_drops = window_drops; 1101 1102 /* Transmission overrun doesn't happen for stmmac, hence always 0 */ 1103 qopt->stats.tx_overruns = 0; 1104 } 1105 1106 static void tc_taprio_queue_stats(struct stmmac_priv *priv, 1107 struct tc_taprio_qopt_offload *qopt) 1108 { 1109 struct tc_taprio_qopt_queue_stats *q_stats = &qopt->queue_stats; 1110 int queue = qopt->queue_stats.queue; 1111 1112 q_stats->stats.window_drops = priv->xstats.max_sdu_txq_drop[queue] + 1113 priv->xstats.mtl_est_txq_hlbf[queue]; 1114 1115 /* Transmission overrun doesn't happen for stmmac, hence always 0 */ 1116 q_stats->stats.tx_overruns = 0; 1117 } 1118 1119 static int tc_setup_taprio(struct stmmac_priv *priv, 1120 struct tc_taprio_qopt_offload *qopt) 1121 { 1122 int err = 0; 1123 1124 switch (qopt->cmd) { 1125 case TAPRIO_CMD_REPLACE: 1126 case TAPRIO_CMD_DESTROY: 1127 err = tc_taprio_configure(priv, qopt); 1128 break; 1129 case TAPRIO_CMD_STATS: 1130 tc_taprio_stats(priv, qopt); 1131 break; 1132 case TAPRIO_CMD_QUEUE_STATS: 1133 tc_taprio_queue_stats(priv, qopt); 1134 break; 1135 default: 1136 err = -EOPNOTSUPP; 1137 } 1138 1139 return err; 1140 } 1141 1142 static int tc_setup_taprio_without_fpe(struct stmmac_priv *priv, 1143 struct tc_taprio_qopt_offload *qopt) 1144 { 1145 if (!qopt->mqprio.preemptible_tcs) 1146 return tc_setup_taprio(priv, qopt); 1147 1148 NL_SET_ERR_MSG_MOD(qopt->mqprio.extack, 1149 "taprio with FPE is not implemented for this MAC"); 1150 1151 return -EOPNOTSUPP; 1152 } 1153 1154 static int tc_setup_etf(struct stmmac_priv *priv, 1155 struct tc_etf_qopt_offload *qopt) 1156 { 1157 if (!priv->dma_cap.tbssel) 1158 return -EOPNOTSUPP; 1159 if (qopt->queue >= priv->plat->tx_queues_to_use) 1160 return -EINVAL; 1161 if (!(priv->dma_conf.tx_queue[qopt->queue].tbs & STMMAC_TBS_AVAIL)) 1162 return -EINVAL; 1163 1164 if (qopt->enable) 1165 priv->dma_conf.tx_queue[qopt->queue].tbs |= STMMAC_TBS_EN; 1166 else 1167 priv->dma_conf.tx_queue[qopt->queue].tbs &= ~STMMAC_TBS_EN; 1168 1169 netdev_info(priv->dev, "%s ETF for Queue %d\n", 1170 qopt->enable ? "enabled" : "disabled", qopt->queue); 1171 return 0; 1172 } 1173 1174 static int tc_query_caps(struct stmmac_priv *priv, 1175 struct tc_query_caps_base *base) 1176 { 1177 switch (base->type) { 1178 case TC_SETUP_QDISC_MQPRIO: { 1179 struct tc_mqprio_caps *caps = base->caps; 1180 1181 caps->validate_queue_counts = true; 1182 1183 return 0; 1184 } 1185 case TC_SETUP_QDISC_TAPRIO: { 1186 struct tc_taprio_caps *caps = base->caps; 1187 1188 if (!priv->dma_cap.estsel) 1189 return -EOPNOTSUPP; 1190 1191 caps->gate_mask_per_txq = true; 1192 caps->supports_queue_max_sdu = true; 1193 1194 return 0; 1195 } 1196 default: 1197 return -EOPNOTSUPP; 1198 } 1199 } 1200 1201 static void stmmac_reset_tc_mqprio(struct net_device *ndev, 1202 struct netlink_ext_ack *extack) 1203 { 1204 struct stmmac_priv *priv = netdev_priv(ndev); 1205 1206 netdev_reset_tc(ndev); 1207 netif_set_real_num_tx_queues(ndev, priv->plat->tx_queues_to_use); 1208 stmmac_fpe_map_preemption_class(priv, ndev, extack, 0); 1209 } 1210 1211 static int tc_setup_dwmac510_mqprio(struct stmmac_priv *priv, 1212 struct tc_mqprio_qopt_offload *mqprio) 1213 { 1214 struct netlink_ext_ack *extack = mqprio->extack; 1215 struct tc_mqprio_qopt *qopt = &mqprio->qopt; 1216 u32 offset, count, num_stack_tx_queues = 0; 1217 struct net_device *ndev = priv->dev; 1218 u32 num_tc = qopt->num_tc; 1219 int err; 1220 1221 if (!num_tc) { 1222 stmmac_reset_tc_mqprio(ndev, extack); 1223 return 0; 1224 } 1225 1226 err = netdev_set_num_tc(ndev, num_tc); 1227 if (err) 1228 return err; 1229 1230 for (u32 tc = 0; tc < num_tc; tc++) { 1231 offset = qopt->offset[tc]; 1232 count = qopt->count[tc]; 1233 num_stack_tx_queues += count; 1234 1235 err = netdev_set_tc_queue(ndev, tc, count, offset); 1236 if (err) 1237 goto err_reset_tc; 1238 } 1239 1240 err = netif_set_real_num_tx_queues(ndev, num_stack_tx_queues); 1241 if (err) 1242 goto err_reset_tc; 1243 1244 err = stmmac_fpe_map_preemption_class(priv, ndev, extack, 1245 mqprio->preemptible_tcs); 1246 if (err) 1247 goto err_reset_tc; 1248 1249 return 0; 1250 1251 err_reset_tc: 1252 stmmac_reset_tc_mqprio(ndev, extack); 1253 1254 return err; 1255 } 1256 1257 static int tc_setup_mqprio_unimplemented(struct stmmac_priv *priv, 1258 struct tc_mqprio_qopt_offload *mqprio) 1259 { 1260 NL_SET_ERR_MSG_MOD(mqprio->extack, 1261 "mqprio HW offload is not implemented for this MAC"); 1262 return -EOPNOTSUPP; 1263 } 1264 1265 const struct stmmac_tc_ops dwmac4_tc_ops = { 1266 .init = tc_init, 1267 .setup_cls_u32 = tc_setup_cls_u32, 1268 .setup_cbs = tc_setup_cbs, 1269 .setup_cls = tc_setup_cls, 1270 .setup_taprio = tc_setup_taprio_without_fpe, 1271 .setup_etf = tc_setup_etf, 1272 .query_caps = tc_query_caps, 1273 .setup_mqprio = tc_setup_mqprio_unimplemented, 1274 }; 1275 1276 const struct stmmac_tc_ops dwmac510_tc_ops = { 1277 .init = tc_init, 1278 .setup_cls_u32 = tc_setup_cls_u32, 1279 .setup_cbs = tc_setup_cbs, 1280 .setup_cls = tc_setup_cls, 1281 .setup_taprio = tc_setup_taprio, 1282 .setup_etf = tc_setup_etf, 1283 .query_caps = tc_query_caps, 1284 .setup_mqprio = tc_setup_dwmac510_mqprio, 1285 }; 1286 1287 const struct stmmac_tc_ops dwxgmac_tc_ops = { 1288 .init = tc_init, 1289 .setup_cls_u32 = tc_setup_cls_u32, 1290 .setup_cbs = tc_setup_cbs, 1291 .setup_cls = tc_setup_cls, 1292 .setup_taprio = tc_setup_taprio_without_fpe, 1293 .setup_etf = tc_setup_etf, 1294 .query_caps = tc_query_caps, 1295 .setup_mqprio = tc_setup_mqprio_unimplemented, 1296 }; 1297