1 // SPDX-License-Identifier: (GPL-2.0 OR MIT) 2 /* 3 * Copyright (c) 2018 Synopsys, Inc. and/or its affiliates. 4 * stmmac TC Handling (HW only) 5 */ 6 7 #include <net/pkt_cls.h> 8 #include <net/tc_act/tc_gact.h> 9 #include "common.h" 10 #include "dwmac4.h" 11 #include "dwmac5.h" 12 #include "stmmac.h" 13 14 static void tc_fill_all_pass_entry(struct stmmac_tc_entry *entry) 15 { 16 memset(entry, 0, sizeof(*entry)); 17 entry->in_use = true; 18 entry->is_last = true; 19 entry->is_frag = false; 20 entry->prio = ~0x0; 21 entry->handle = 0; 22 entry->val.match_data = 0x0; 23 entry->val.match_en = 0x0; 24 entry->val.af = 1; 25 entry->val.dma_ch_no = 0x0; 26 } 27 28 static struct stmmac_tc_entry *tc_find_entry(struct stmmac_priv *priv, 29 struct tc_cls_u32_offload *cls, 30 bool free) 31 { 32 struct stmmac_tc_entry *entry, *first = NULL, *dup = NULL; 33 u32 loc = cls->knode.handle; 34 int i; 35 36 for (i = 0; i < priv->tc_entries_max; i++) { 37 entry = &priv->tc_entries[i]; 38 if (!entry->in_use && !first && free) 39 first = entry; 40 if ((entry->handle == loc) && !free && !entry->is_frag) 41 dup = entry; 42 } 43 44 if (dup) 45 return dup; 46 if (first) { 47 first->handle = loc; 48 first->in_use = true; 49 50 /* Reset HW values */ 51 memset(&first->val, 0, sizeof(first->val)); 52 } 53 54 return first; 55 } 56 57 static int tc_fill_actions(struct stmmac_tc_entry *entry, 58 struct stmmac_tc_entry *frag, 59 struct tc_cls_u32_offload *cls) 60 { 61 struct stmmac_tc_entry *action_entry = entry; 62 const struct tc_action *act; 63 struct tcf_exts *exts; 64 int i; 65 66 exts = cls->knode.exts; 67 if (!tcf_exts_has_actions(exts)) 68 return -EINVAL; 69 if (frag) 70 action_entry = frag; 71 72 tcf_exts_for_each_action(i, act, exts) { 73 /* Accept */ 74 if (is_tcf_gact_ok(act)) { 75 action_entry->val.af = 1; 76 break; 77 } 78 /* Drop */ 79 if (is_tcf_gact_shot(act)) { 80 action_entry->val.rf = 1; 81 break; 82 } 83 84 /* Unsupported */ 85 return -EINVAL; 86 } 87 88 return 0; 89 } 90 91 static int tc_fill_entry(struct stmmac_priv *priv, 92 struct tc_cls_u32_offload *cls) 93 { 94 struct stmmac_tc_entry *entry, *frag = NULL; 95 struct tc_u32_sel *sel = cls->knode.sel; 96 u32 off, data, mask, real_off, rem; 97 u32 prio = cls->common.prio << 16; 98 int ret; 99 100 /* Only 1 match per entry */ 101 if (sel->nkeys <= 0 || sel->nkeys > 1) 102 return -EINVAL; 103 104 off = sel->keys[0].off << sel->offshift; 105 data = sel->keys[0].val; 106 mask = sel->keys[0].mask; 107 108 switch (ntohs(cls->common.protocol)) { 109 case ETH_P_ALL: 110 break; 111 case ETH_P_IP: 112 off += ETH_HLEN; 113 break; 114 default: 115 return -EINVAL; 116 } 117 118 if (off > priv->tc_off_max) 119 return -EINVAL; 120 121 real_off = off / 4; 122 rem = off % 4; 123 124 entry = tc_find_entry(priv, cls, true); 125 if (!entry) 126 return -EINVAL; 127 128 if (rem) { 129 frag = tc_find_entry(priv, cls, true); 130 if (!frag) { 131 ret = -EINVAL; 132 goto err_unuse; 133 } 134 135 entry->frag_ptr = frag; 136 entry->val.match_en = (mask << (rem * 8)) & 137 GENMASK(31, rem * 8); 138 entry->val.match_data = (data << (rem * 8)) & 139 GENMASK(31, rem * 8); 140 entry->val.frame_offset = real_off; 141 entry->prio = prio; 142 143 frag->val.match_en = (mask >> (rem * 8)) & 144 GENMASK(rem * 8 - 1, 0); 145 frag->val.match_data = (data >> (rem * 8)) & 146 GENMASK(rem * 8 - 1, 0); 147 frag->val.frame_offset = real_off + 1; 148 frag->prio = prio; 149 frag->is_frag = true; 150 } else { 151 entry->frag_ptr = NULL; 152 entry->val.match_en = mask; 153 entry->val.match_data = data; 154 entry->val.frame_offset = real_off; 155 entry->prio = prio; 156 } 157 158 ret = tc_fill_actions(entry, frag, cls); 159 if (ret) 160 goto err_unuse; 161 162 return 0; 163 164 err_unuse: 165 if (frag) 166 frag->in_use = false; 167 entry->in_use = false; 168 return ret; 169 } 170 171 static void tc_unfill_entry(struct stmmac_priv *priv, 172 struct tc_cls_u32_offload *cls) 173 { 174 struct stmmac_tc_entry *entry; 175 176 entry = tc_find_entry(priv, cls, false); 177 if (!entry) 178 return; 179 180 entry->in_use = false; 181 if (entry->frag_ptr) { 182 entry = entry->frag_ptr; 183 entry->is_frag = false; 184 entry->in_use = false; 185 } 186 } 187 188 static int tc_config_knode(struct stmmac_priv *priv, 189 struct tc_cls_u32_offload *cls) 190 { 191 int ret; 192 193 ret = tc_fill_entry(priv, cls); 194 if (ret) 195 return ret; 196 197 ret = stmmac_rxp_config(priv, priv->hw->pcsr, priv->tc_entries, 198 priv->tc_entries_max); 199 if (ret) 200 goto err_unfill; 201 202 return 0; 203 204 err_unfill: 205 tc_unfill_entry(priv, cls); 206 return ret; 207 } 208 209 static int tc_delete_knode(struct stmmac_priv *priv, 210 struct tc_cls_u32_offload *cls) 211 { 212 /* Set entry and fragments as not used */ 213 tc_unfill_entry(priv, cls); 214 215 return stmmac_rxp_config(priv, priv->hw->pcsr, priv->tc_entries, 216 priv->tc_entries_max); 217 } 218 219 static int tc_setup_cls_u32(struct stmmac_priv *priv, 220 struct tc_cls_u32_offload *cls) 221 { 222 switch (cls->command) { 223 case TC_CLSU32_REPLACE_KNODE: 224 tc_unfill_entry(priv, cls); 225 fallthrough; 226 case TC_CLSU32_NEW_KNODE: 227 return tc_config_knode(priv, cls); 228 case TC_CLSU32_DELETE_KNODE: 229 return tc_delete_knode(priv, cls); 230 default: 231 return -EOPNOTSUPP; 232 } 233 } 234 235 static int tc_init(struct stmmac_priv *priv) 236 { 237 struct dma_features *dma_cap = &priv->dma_cap; 238 unsigned int count; 239 int i; 240 241 if (dma_cap->l3l4fnum) { 242 priv->flow_entries_max = dma_cap->l3l4fnum; 243 priv->flow_entries = devm_kcalloc(priv->device, 244 dma_cap->l3l4fnum, 245 sizeof(*priv->flow_entries), 246 GFP_KERNEL); 247 if (!priv->flow_entries) 248 return -ENOMEM; 249 250 for (i = 0; i < priv->flow_entries_max; i++) 251 priv->flow_entries[i].idx = i; 252 253 dev_info(priv->device, "Enabled Flow TC (entries=%d)\n", 254 priv->flow_entries_max); 255 } 256 257 /* Fail silently as we can still use remaining features, e.g. CBS */ 258 if (!dma_cap->frpsel) 259 return 0; 260 261 switch (dma_cap->frpbs) { 262 case 0x0: 263 priv->tc_off_max = 64; 264 break; 265 case 0x1: 266 priv->tc_off_max = 128; 267 break; 268 case 0x2: 269 priv->tc_off_max = 256; 270 break; 271 default: 272 return -EINVAL; 273 } 274 275 switch (dma_cap->frpes) { 276 case 0x0: 277 count = 64; 278 break; 279 case 0x1: 280 count = 128; 281 break; 282 case 0x2: 283 count = 256; 284 break; 285 default: 286 return -EINVAL; 287 } 288 289 /* Reserve one last filter which lets all pass */ 290 priv->tc_entries_max = count; 291 priv->tc_entries = devm_kcalloc(priv->device, 292 count, sizeof(*priv->tc_entries), GFP_KERNEL); 293 if (!priv->tc_entries) 294 return -ENOMEM; 295 296 tc_fill_all_pass_entry(&priv->tc_entries[count - 1]); 297 298 dev_info(priv->device, "Enabling HW TC (entries=%d, max_off=%d)\n", 299 priv->tc_entries_max, priv->tc_off_max); 300 return 0; 301 } 302 303 static int tc_setup_cbs(struct stmmac_priv *priv, 304 struct tc_cbs_qopt_offload *qopt) 305 { 306 u32 tx_queues_count = priv->plat->tx_queues_to_use; 307 u32 queue = qopt->queue; 308 u32 ptr, speed_div; 309 u32 mode_to_use; 310 u64 value; 311 int ret; 312 313 /* Queue 0 is not AVB capable */ 314 if (queue <= 0 || queue >= tx_queues_count) 315 return -EINVAL; 316 if (!priv->dma_cap.av) 317 return -EOPNOTSUPP; 318 319 mode_to_use = priv->plat->tx_queues_cfg[queue].mode_to_use; 320 if (mode_to_use == MTL_QUEUE_DCB && qopt->enable) { 321 ret = stmmac_dma_qmode(priv, priv->ioaddr, queue, MTL_QUEUE_AVB); 322 if (ret) 323 return ret; 324 325 priv->plat->tx_queues_cfg[queue].mode_to_use = MTL_QUEUE_AVB; 326 } else if (!qopt->enable) { 327 return stmmac_dma_qmode(priv, priv->ioaddr, queue, MTL_QUEUE_DCB); 328 } 329 330 /* Port Transmit Rate and Speed Divider */ 331 ptr = (priv->speed == SPEED_100) ? 4 : 8; 332 speed_div = (priv->speed == SPEED_100) ? 100000 : 1000000; 333 334 /* Final adjustments for HW */ 335 value = div_s64(qopt->idleslope * 1024ll * ptr, speed_div); 336 priv->plat->tx_queues_cfg[queue].idle_slope = value & GENMASK(31, 0); 337 338 value = div_s64(-qopt->sendslope * 1024ll * ptr, speed_div); 339 priv->plat->tx_queues_cfg[queue].send_slope = value & GENMASK(31, 0); 340 341 value = qopt->hicredit * 1024ll * 8; 342 priv->plat->tx_queues_cfg[queue].high_credit = value & GENMASK(31, 0); 343 344 value = qopt->locredit * 1024ll * 8; 345 priv->plat->tx_queues_cfg[queue].low_credit = value & GENMASK(31, 0); 346 347 ret = stmmac_config_cbs(priv, priv->hw, 348 priv->plat->tx_queues_cfg[queue].send_slope, 349 priv->plat->tx_queues_cfg[queue].idle_slope, 350 priv->plat->tx_queues_cfg[queue].high_credit, 351 priv->plat->tx_queues_cfg[queue].low_credit, 352 queue); 353 if (ret) 354 return ret; 355 356 dev_info(priv->device, "CBS queue %d: send %d, idle %d, hi %d, lo %d\n", 357 queue, qopt->sendslope, qopt->idleslope, 358 qopt->hicredit, qopt->locredit); 359 return 0; 360 } 361 362 static int tc_parse_flow_actions(struct stmmac_priv *priv, 363 struct flow_action *action, 364 struct stmmac_flow_entry *entry, 365 struct netlink_ext_ack *extack) 366 { 367 struct flow_action_entry *act; 368 int i; 369 370 if (!flow_action_has_entries(action)) 371 return -EINVAL; 372 373 if (!flow_action_basic_hw_stats_check(action, extack)) 374 return -EOPNOTSUPP; 375 376 flow_action_for_each(i, act, action) { 377 switch (act->id) { 378 case FLOW_ACTION_DROP: 379 entry->action |= STMMAC_FLOW_ACTION_DROP; 380 return 0; 381 default: 382 break; 383 } 384 } 385 386 /* Nothing to do, maybe inverse filter ? */ 387 return 0; 388 } 389 390 static int tc_add_basic_flow(struct stmmac_priv *priv, 391 struct flow_cls_offload *cls, 392 struct stmmac_flow_entry *entry) 393 { 394 struct flow_rule *rule = flow_cls_offload_flow_rule(cls); 395 struct flow_dissector *dissector = rule->match.dissector; 396 struct flow_match_basic match; 397 398 /* Nothing to do here */ 399 if (!dissector_uses_key(dissector, FLOW_DISSECTOR_KEY_BASIC)) 400 return -EINVAL; 401 402 flow_rule_match_basic(rule, &match); 403 entry->ip_proto = match.key->ip_proto; 404 return 0; 405 } 406 407 static int tc_add_ip4_flow(struct stmmac_priv *priv, 408 struct flow_cls_offload *cls, 409 struct stmmac_flow_entry *entry) 410 { 411 struct flow_rule *rule = flow_cls_offload_flow_rule(cls); 412 struct flow_dissector *dissector = rule->match.dissector; 413 bool inv = entry->action & STMMAC_FLOW_ACTION_DROP; 414 struct flow_match_ipv4_addrs match; 415 u32 hw_match; 416 int ret; 417 418 /* Nothing to do here */ 419 if (!dissector_uses_key(dissector, FLOW_DISSECTOR_KEY_IPV4_ADDRS)) 420 return -EINVAL; 421 422 flow_rule_match_ipv4_addrs(rule, &match); 423 hw_match = ntohl(match.key->src) & ntohl(match.mask->src); 424 if (hw_match) { 425 ret = stmmac_config_l3_filter(priv, priv->hw, entry->idx, true, 426 false, true, inv, hw_match); 427 if (ret) 428 return ret; 429 } 430 431 hw_match = ntohl(match.key->dst) & ntohl(match.mask->dst); 432 if (hw_match) { 433 ret = stmmac_config_l3_filter(priv, priv->hw, entry->idx, true, 434 false, false, inv, hw_match); 435 if (ret) 436 return ret; 437 } 438 439 return 0; 440 } 441 442 static int tc_add_ports_flow(struct stmmac_priv *priv, 443 struct flow_cls_offload *cls, 444 struct stmmac_flow_entry *entry) 445 { 446 struct flow_rule *rule = flow_cls_offload_flow_rule(cls); 447 struct flow_dissector *dissector = rule->match.dissector; 448 bool inv = entry->action & STMMAC_FLOW_ACTION_DROP; 449 struct flow_match_ports match; 450 u32 hw_match; 451 bool is_udp; 452 int ret; 453 454 /* Nothing to do here */ 455 if (!dissector_uses_key(dissector, FLOW_DISSECTOR_KEY_PORTS)) 456 return -EINVAL; 457 458 switch (entry->ip_proto) { 459 case IPPROTO_TCP: 460 is_udp = false; 461 break; 462 case IPPROTO_UDP: 463 is_udp = true; 464 break; 465 default: 466 return -EINVAL; 467 } 468 469 flow_rule_match_ports(rule, &match); 470 471 hw_match = ntohs(match.key->src) & ntohs(match.mask->src); 472 if (hw_match) { 473 ret = stmmac_config_l4_filter(priv, priv->hw, entry->idx, true, 474 is_udp, true, inv, hw_match); 475 if (ret) 476 return ret; 477 } 478 479 hw_match = ntohs(match.key->dst) & ntohs(match.mask->dst); 480 if (hw_match) { 481 ret = stmmac_config_l4_filter(priv, priv->hw, entry->idx, true, 482 is_udp, false, inv, hw_match); 483 if (ret) 484 return ret; 485 } 486 487 entry->is_l4 = true; 488 return 0; 489 } 490 491 static struct stmmac_flow_entry *tc_find_flow(struct stmmac_priv *priv, 492 struct flow_cls_offload *cls, 493 bool get_free) 494 { 495 int i; 496 497 for (i = 0; i < priv->flow_entries_max; i++) { 498 struct stmmac_flow_entry *entry = &priv->flow_entries[i]; 499 500 if (entry->cookie == cls->cookie) 501 return entry; 502 if (get_free && (entry->in_use == false)) 503 return entry; 504 } 505 506 return NULL; 507 } 508 509 static struct { 510 int (*fn)(struct stmmac_priv *priv, struct flow_cls_offload *cls, 511 struct stmmac_flow_entry *entry); 512 } tc_flow_parsers[] = { 513 { .fn = tc_add_basic_flow }, 514 { .fn = tc_add_ip4_flow }, 515 { .fn = tc_add_ports_flow }, 516 }; 517 518 static int tc_add_flow(struct stmmac_priv *priv, 519 struct flow_cls_offload *cls) 520 { 521 struct stmmac_flow_entry *entry = tc_find_flow(priv, cls, false); 522 struct flow_rule *rule = flow_cls_offload_flow_rule(cls); 523 int i, ret; 524 525 if (!entry) { 526 entry = tc_find_flow(priv, cls, true); 527 if (!entry) 528 return -ENOENT; 529 } 530 531 ret = tc_parse_flow_actions(priv, &rule->action, entry, 532 cls->common.extack); 533 if (ret) 534 return ret; 535 536 for (i = 0; i < ARRAY_SIZE(tc_flow_parsers); i++) { 537 ret = tc_flow_parsers[i].fn(priv, cls, entry); 538 if (!ret) { 539 entry->in_use = true; 540 continue; 541 } 542 } 543 544 if (!entry->in_use) 545 return -EINVAL; 546 547 entry->cookie = cls->cookie; 548 return 0; 549 } 550 551 static int tc_del_flow(struct stmmac_priv *priv, 552 struct flow_cls_offload *cls) 553 { 554 struct stmmac_flow_entry *entry = tc_find_flow(priv, cls, false); 555 int ret; 556 557 if (!entry || !entry->in_use) 558 return -ENOENT; 559 560 if (entry->is_l4) { 561 ret = stmmac_config_l4_filter(priv, priv->hw, entry->idx, false, 562 false, false, false, 0); 563 } else { 564 ret = stmmac_config_l3_filter(priv, priv->hw, entry->idx, false, 565 false, false, false, 0); 566 } 567 568 entry->in_use = false; 569 entry->cookie = 0; 570 entry->is_l4 = false; 571 return ret; 572 } 573 574 static int tc_setup_cls(struct stmmac_priv *priv, 575 struct flow_cls_offload *cls) 576 { 577 int ret = 0; 578 579 /* When RSS is enabled, the filtering will be bypassed */ 580 if (priv->rss.enable) 581 return -EBUSY; 582 583 switch (cls->command) { 584 case FLOW_CLS_REPLACE: 585 ret = tc_add_flow(priv, cls); 586 break; 587 case FLOW_CLS_DESTROY: 588 ret = tc_del_flow(priv, cls); 589 break; 590 default: 591 return -EOPNOTSUPP; 592 } 593 594 return ret; 595 } 596 597 static int tc_setup_taprio(struct stmmac_priv *priv, 598 struct tc_taprio_qopt_offload *qopt) 599 { 600 u32 size, wid = priv->dma_cap.estwid, dep = priv->dma_cap.estdep; 601 struct plat_stmmacenet_data *plat = priv->plat; 602 struct timespec64 time; 603 bool fpe = false; 604 int i, ret = 0; 605 u64 ctr; 606 607 if (!priv->dma_cap.estsel) 608 return -EOPNOTSUPP; 609 610 switch (wid) { 611 case 0x1: 612 wid = 16; 613 break; 614 case 0x2: 615 wid = 20; 616 break; 617 case 0x3: 618 wid = 24; 619 break; 620 default: 621 return -EOPNOTSUPP; 622 } 623 624 switch (dep) { 625 case 0x1: 626 dep = 64; 627 break; 628 case 0x2: 629 dep = 128; 630 break; 631 case 0x3: 632 dep = 256; 633 break; 634 case 0x4: 635 dep = 512; 636 break; 637 case 0x5: 638 dep = 1024; 639 break; 640 default: 641 return -EOPNOTSUPP; 642 } 643 644 if (!qopt->enable) 645 goto disable; 646 if (qopt->num_entries >= dep) 647 return -EINVAL; 648 if (!qopt->base_time) 649 return -ERANGE; 650 if (!qopt->cycle_time) 651 return -ERANGE; 652 653 if (!plat->est) { 654 plat->est = devm_kzalloc(priv->device, sizeof(*plat->est), 655 GFP_KERNEL); 656 if (!plat->est) 657 return -ENOMEM; 658 } else { 659 memset(plat->est, 0, sizeof(*plat->est)); 660 } 661 662 size = qopt->num_entries; 663 664 priv->plat->est->gcl_size = size; 665 priv->plat->est->enable = qopt->enable; 666 667 for (i = 0; i < size; i++) { 668 s64 delta_ns = qopt->entries[i].interval; 669 u32 gates = qopt->entries[i].gate_mask; 670 671 if (delta_ns > GENMASK(wid, 0)) 672 return -ERANGE; 673 if (gates > GENMASK(31 - wid, 0)) 674 return -ERANGE; 675 676 switch (qopt->entries[i].command) { 677 case TC_TAPRIO_CMD_SET_GATES: 678 if (fpe) 679 return -EINVAL; 680 break; 681 case TC_TAPRIO_CMD_SET_AND_HOLD: 682 gates |= BIT(0); 683 fpe = true; 684 break; 685 case TC_TAPRIO_CMD_SET_AND_RELEASE: 686 gates &= ~BIT(0); 687 fpe = true; 688 break; 689 default: 690 return -EOPNOTSUPP; 691 } 692 693 priv->plat->est->gcl[i] = delta_ns | (gates << wid); 694 } 695 696 /* Adjust for real system time */ 697 time = ktime_to_timespec64(qopt->base_time); 698 priv->plat->est->btr[0] = (u32)time.tv_nsec; 699 priv->plat->est->btr[1] = (u32)time.tv_sec; 700 701 ctr = qopt->cycle_time; 702 priv->plat->est->ctr[0] = do_div(ctr, NSEC_PER_SEC); 703 priv->plat->est->ctr[1] = (u32)ctr; 704 705 if (fpe && !priv->dma_cap.fpesel) 706 return -EOPNOTSUPP; 707 708 ret = stmmac_fpe_configure(priv, priv->ioaddr, 709 priv->plat->tx_queues_to_use, 710 priv->plat->rx_queues_to_use, fpe); 711 if (ret && fpe) { 712 netdev_err(priv->dev, "failed to enable Frame Preemption\n"); 713 return ret; 714 } 715 716 ret = stmmac_est_configure(priv, priv->ioaddr, priv->plat->est, 717 priv->plat->clk_ptp_rate); 718 if (ret) { 719 netdev_err(priv->dev, "failed to configure EST\n"); 720 goto disable; 721 } 722 723 netdev_info(priv->dev, "configured EST\n"); 724 return 0; 725 726 disable: 727 priv->plat->est->enable = false; 728 stmmac_est_configure(priv, priv->ioaddr, priv->plat->est, 729 priv->plat->clk_ptp_rate); 730 return ret; 731 } 732 733 static int tc_setup_etf(struct stmmac_priv *priv, 734 struct tc_etf_qopt_offload *qopt) 735 { 736 if (!priv->dma_cap.tbssel) 737 return -EOPNOTSUPP; 738 if (qopt->queue >= priv->plat->tx_queues_to_use) 739 return -EINVAL; 740 if (!(priv->tx_queue[qopt->queue].tbs & STMMAC_TBS_AVAIL)) 741 return -EINVAL; 742 743 if (qopt->enable) 744 priv->tx_queue[qopt->queue].tbs |= STMMAC_TBS_EN; 745 else 746 priv->tx_queue[qopt->queue].tbs &= ~STMMAC_TBS_EN; 747 748 netdev_info(priv->dev, "%s ETF for Queue %d\n", 749 qopt->enable ? "enabled" : "disabled", qopt->queue); 750 return 0; 751 } 752 753 const struct stmmac_tc_ops dwmac510_tc_ops = { 754 .init = tc_init, 755 .setup_cls_u32 = tc_setup_cls_u32, 756 .setup_cbs = tc_setup_cbs, 757 .setup_cls = tc_setup_cls, 758 .setup_taprio = tc_setup_taprio, 759 .setup_etf = tc_setup_etf, 760 }; 761