1 // SPDX-License-Identifier: GPL-2.0-only 2 /******************************************************************************* 3 This contains the functions to handle the pci driver. 4 5 Copyright (C) 2011-2012 Vayavya Labs Pvt Ltd 6 7 8 Author: Rayagond Kokatanur <rayagond@vayavyalabs.com> 9 Author: Giuseppe Cavallaro <peppe.cavallaro@st.com> 10 *******************************************************************************/ 11 12 #include <linux/clk-provider.h> 13 #include <linux/pci.h> 14 #include <linux/dmi.h> 15 16 #include "stmmac.h" 17 18 struct stmmac_pci_info { 19 int (*setup)(struct pci_dev *pdev, struct plat_stmmacenet_data *plat); 20 }; 21 22 static void common_default_data(struct plat_stmmacenet_data *plat) 23 { 24 /* clk_csr_i = 20-35MHz & MDC = clk_csr_i/16 */ 25 plat->clk_csr = STMMAC_CSR_20_35M; 26 plat->has_gmac = 1; 27 plat->force_sf_dma_mode = 1; 28 29 plat->mdio_bus_data->needs_reset = true; 30 31 /* Set default value for multicast hash bins */ 32 plat->multicast_filter_bins = HASH_TABLE_SIZE; 33 34 /* Set default value for unicast filter entries */ 35 plat->unicast_filter_entries = 1; 36 37 /* Set the maxmtu to a default of JUMBO_LEN */ 38 plat->maxmtu = JUMBO_LEN; 39 40 /* Set default number of RX and TX queues to use */ 41 plat->tx_queues_to_use = 1; 42 plat->rx_queues_to_use = 1; 43 44 /* Disable Priority config by default */ 45 plat->tx_queues_cfg[0].use_prio = false; 46 plat->rx_queues_cfg[0].use_prio = false; 47 48 /* Disable RX queues routing by default */ 49 plat->rx_queues_cfg[0].pkt_route = 0x0; 50 } 51 52 static int stmmac_default_data(struct pci_dev *pdev, 53 struct plat_stmmacenet_data *plat) 54 { 55 /* Set common default data first */ 56 common_default_data(plat); 57 58 plat->bus_id = 1; 59 plat->phy_addr = 0; 60 plat->phy_interface = PHY_INTERFACE_MODE_GMII; 61 62 plat->dma_cfg->pbl = 32; 63 plat->dma_cfg->pblx8 = true; 64 /* TODO: AXI */ 65 66 return 0; 67 } 68 69 static const struct stmmac_pci_info stmmac_pci_info = { 70 .setup = stmmac_default_data, 71 }; 72 73 static int snps_gmac5_default_data(struct pci_dev *pdev, 74 struct plat_stmmacenet_data *plat) 75 { 76 int i; 77 78 plat->clk_csr = STMMAC_CSR_250_300M; 79 plat->has_gmac4 = 1; 80 plat->force_sf_dma_mode = 1; 81 plat->flags |= STMMAC_FLAG_TSO_EN; 82 plat->pmt = 1; 83 84 /* Set default value for multicast hash bins */ 85 plat->multicast_filter_bins = HASH_TABLE_SIZE; 86 87 /* Set default value for unicast filter entries */ 88 plat->unicast_filter_entries = 1; 89 90 /* Set the maxmtu to a default of JUMBO_LEN */ 91 plat->maxmtu = JUMBO_LEN; 92 93 /* Set default number of RX and TX queues to use */ 94 plat->tx_queues_to_use = 4; 95 plat->rx_queues_to_use = 4; 96 97 plat->tx_sched_algorithm = MTL_TX_ALGORITHM_WRR; 98 for (i = 0; i < plat->tx_queues_to_use; i++) { 99 plat->tx_queues_cfg[i].use_prio = false; 100 plat->tx_queues_cfg[i].mode_to_use = MTL_QUEUE_DCB; 101 plat->tx_queues_cfg[i].weight = 25; 102 if (i > 0) 103 plat->tx_queues_cfg[i].tbs_en = 1; 104 } 105 106 plat->rx_sched_algorithm = MTL_RX_ALGORITHM_SP; 107 for (i = 0; i < plat->rx_queues_to_use; i++) { 108 plat->rx_queues_cfg[i].use_prio = false; 109 plat->rx_queues_cfg[i].mode_to_use = MTL_QUEUE_DCB; 110 plat->rx_queues_cfg[i].pkt_route = 0x0; 111 plat->rx_queues_cfg[i].chan = i; 112 } 113 114 plat->bus_id = 1; 115 plat->phy_addr = -1; 116 plat->phy_interface = PHY_INTERFACE_MODE_GMII; 117 118 plat->dma_cfg->pbl = 32; 119 plat->dma_cfg->pblx8 = true; 120 121 /* Axi Configuration */ 122 plat->axi = devm_kzalloc(&pdev->dev, sizeof(*plat->axi), GFP_KERNEL); 123 if (!plat->axi) 124 return -ENOMEM; 125 126 plat->axi->axi_wr_osr_lmt = 31; 127 plat->axi->axi_rd_osr_lmt = 31; 128 129 plat->axi->axi_fb = false; 130 plat->axi->axi_blen[0] = 4; 131 plat->axi->axi_blen[1] = 8; 132 plat->axi->axi_blen[2] = 16; 133 plat->axi->axi_blen[3] = 32; 134 135 return 0; 136 } 137 138 static const struct stmmac_pci_info snps_gmac5_pci_info = { 139 .setup = snps_gmac5_default_data, 140 }; 141 142 static int stmmac_pci_suspend(struct device *dev, void *bsp_priv) 143 { 144 struct pci_dev *pdev = to_pci_dev(dev); 145 int ret; 146 147 ret = pci_save_state(pdev); 148 if (ret) 149 return ret; 150 151 pci_disable_device(pdev); 152 pci_wake_from_d3(pdev, true); 153 return 0; 154 } 155 156 static int stmmac_pci_resume(struct device *dev, void *bsp_priv) 157 { 158 struct pci_dev *pdev = to_pci_dev(dev); 159 int ret; 160 161 pci_restore_state(pdev); 162 pci_set_power_state(pdev, PCI_D0); 163 164 ret = pci_enable_device(pdev); 165 if (ret) 166 return ret; 167 168 pci_set_master(pdev); 169 170 return 0; 171 } 172 173 /** 174 * stmmac_pci_probe 175 * 176 * @pdev: pci device pointer 177 * @id: pointer to table of device id/id's. 178 * 179 * Description: This probing function gets called for all PCI devices which 180 * match the ID table and are not "owned" by other driver yet. This function 181 * gets passed a "struct pci_dev *" for each device whose entry in the ID table 182 * matches the device. The probe functions returns zero when the driver choose 183 * to take "ownership" of the device or an error code(-ve no) otherwise. 184 */ 185 static int stmmac_pci_probe(struct pci_dev *pdev, 186 const struct pci_device_id *id) 187 { 188 struct stmmac_pci_info *info = (struct stmmac_pci_info *)id->driver_data; 189 struct plat_stmmacenet_data *plat; 190 struct stmmac_resources res = {}; 191 int ret; 192 int i; 193 194 plat = devm_kzalloc(&pdev->dev, sizeof(*plat), GFP_KERNEL); 195 if (!plat) 196 return -ENOMEM; 197 198 plat->mdio_bus_data = devm_kzalloc(&pdev->dev, 199 sizeof(*plat->mdio_bus_data), 200 GFP_KERNEL); 201 if (!plat->mdio_bus_data) 202 return -ENOMEM; 203 204 plat->dma_cfg = devm_kzalloc(&pdev->dev, sizeof(*plat->dma_cfg), 205 GFP_KERNEL); 206 if (!plat->dma_cfg) 207 return -ENOMEM; 208 209 plat->safety_feat_cfg = devm_kzalloc(&pdev->dev, 210 sizeof(*plat->safety_feat_cfg), 211 GFP_KERNEL); 212 if (!plat->safety_feat_cfg) 213 return -ENOMEM; 214 215 /* Enable pci device */ 216 ret = pcim_enable_device(pdev); 217 if (ret) { 218 dev_err(&pdev->dev, "%s: ERROR: failed to enable device\n", 219 __func__); 220 return ret; 221 } 222 223 /* Get the base address of device */ 224 for (i = 0; i < PCI_STD_NUM_BARS; i++) { 225 if (pci_resource_len(pdev, i) == 0) 226 continue; 227 res.addr = pcim_iomap_region(pdev, i, STMMAC_RESOURCE_NAME); 228 if (IS_ERR(res.addr)) 229 return PTR_ERR(res.addr); 230 break; 231 } 232 233 pci_set_master(pdev); 234 235 ret = info->setup(pdev, plat); 236 if (ret) 237 return ret; 238 239 res.wol_irq = pdev->irq; 240 res.irq = pdev->irq; 241 242 plat->safety_feat_cfg->tsoee = 1; 243 plat->safety_feat_cfg->mrxpee = 1; 244 plat->safety_feat_cfg->mestee = 1; 245 plat->safety_feat_cfg->mrxee = 1; 246 plat->safety_feat_cfg->mtxee = 1; 247 plat->safety_feat_cfg->epsi = 1; 248 plat->safety_feat_cfg->edpp = 1; 249 plat->safety_feat_cfg->prtyen = 1; 250 plat->safety_feat_cfg->tmouten = 1; 251 252 plat->suspend = stmmac_pci_suspend; 253 plat->resume = stmmac_pci_resume; 254 255 return stmmac_dvr_probe(&pdev->dev, plat, &res); 256 } 257 258 /** 259 * stmmac_pci_remove 260 * 261 * @pdev: platform device pointer 262 * Description: this function calls the main to free the net resources. 263 */ 264 static void stmmac_pci_remove(struct pci_dev *pdev) 265 { 266 stmmac_dvr_remove(&pdev->dev); 267 } 268 269 /* synthetic ID, no official vendor */ 270 #define PCI_VENDOR_ID_STMMAC 0x0700 271 272 #define PCI_DEVICE_ID_STMMAC_STMMAC 0x1108 273 #define PCI_DEVICE_ID_SYNOPSYS_GMAC5_ID 0x7102 274 275 static const struct pci_device_id stmmac_id_table[] = { 276 { PCI_DEVICE_DATA(STMMAC, STMMAC, &stmmac_pci_info) }, 277 { PCI_DEVICE_DATA(STMICRO, MAC, &stmmac_pci_info) }, 278 { PCI_DEVICE_DATA(SYNOPSYS, GMAC5_ID, &snps_gmac5_pci_info) }, 279 {} 280 }; 281 282 MODULE_DEVICE_TABLE(pci, stmmac_id_table); 283 284 static struct pci_driver stmmac_pci_driver = { 285 .name = STMMAC_RESOURCE_NAME, 286 .id_table = stmmac_id_table, 287 .probe = stmmac_pci_probe, 288 .remove = stmmac_pci_remove, 289 .driver = { 290 .pm = &stmmac_simple_pm_ops, 291 }, 292 }; 293 294 module_pci_driver(stmmac_pci_driver); 295 296 MODULE_DESCRIPTION("STMMAC 10/100/1000 Ethernet PCI driver"); 297 MODULE_AUTHOR("Rayagond Kokatanur <rayagond.kokatanur@vayavyalabs.com>"); 298 MODULE_AUTHOR("Giuseppe Cavallaro <peppe.cavallaro@st.com>"); 299 MODULE_LICENSE("GPL"); 300