1 /******************************************************************************* 2 STMMAC Ethtool support 3 4 Copyright (C) 2007-2009 STMicroelectronics Ltd 5 6 This program is free software; you can redistribute it and/or modify it 7 under the terms and conditions of the GNU General Public License, 8 version 2, as published by the Free Software Foundation. 9 10 This program is distributed in the hope it will be useful, but WITHOUT 11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 13 more details. 14 15 The full GNU General Public License is included in this distribution in 16 the file called "COPYING". 17 18 Author: Giuseppe Cavallaro <peppe.cavallaro@st.com> 19 *******************************************************************************/ 20 21 #include <linux/etherdevice.h> 22 #include <linux/ethtool.h> 23 #include <linux/interrupt.h> 24 #include <linux/mii.h> 25 #include <linux/phy.h> 26 #include <linux/net_tstamp.h> 27 #include <asm/io.h> 28 29 #include "stmmac.h" 30 #include "dwmac_dma.h" 31 32 #define REG_SPACE_SIZE 0x1054 33 #define MAC100_ETHTOOL_NAME "st_mac100" 34 #define GMAC_ETHTOOL_NAME "st_gmac" 35 36 struct stmmac_stats { 37 char stat_string[ETH_GSTRING_LEN]; 38 int sizeof_stat; 39 int stat_offset; 40 }; 41 42 #define STMMAC_STAT(m) \ 43 { #m, FIELD_SIZEOF(struct stmmac_extra_stats, m), \ 44 offsetof(struct stmmac_priv, xstats.m)} 45 46 static const struct stmmac_stats stmmac_gstrings_stats[] = { 47 /* Transmit errors */ 48 STMMAC_STAT(tx_underflow), 49 STMMAC_STAT(tx_carrier), 50 STMMAC_STAT(tx_losscarrier), 51 STMMAC_STAT(vlan_tag), 52 STMMAC_STAT(tx_deferred), 53 STMMAC_STAT(tx_vlan), 54 STMMAC_STAT(tx_jabber), 55 STMMAC_STAT(tx_frame_flushed), 56 STMMAC_STAT(tx_payload_error), 57 STMMAC_STAT(tx_ip_header_error), 58 /* Receive errors */ 59 STMMAC_STAT(rx_desc), 60 STMMAC_STAT(sa_filter_fail), 61 STMMAC_STAT(overflow_error), 62 STMMAC_STAT(ipc_csum_error), 63 STMMAC_STAT(rx_collision), 64 STMMAC_STAT(rx_crc_errors), 65 STMMAC_STAT(dribbling_bit), 66 STMMAC_STAT(rx_length), 67 STMMAC_STAT(rx_mii), 68 STMMAC_STAT(rx_multicast), 69 STMMAC_STAT(rx_gmac_overflow), 70 STMMAC_STAT(rx_watchdog), 71 STMMAC_STAT(da_rx_filter_fail), 72 STMMAC_STAT(sa_rx_filter_fail), 73 STMMAC_STAT(rx_missed_cntr), 74 STMMAC_STAT(rx_overflow_cntr), 75 STMMAC_STAT(rx_vlan), 76 /* Tx/Rx IRQ error info */ 77 STMMAC_STAT(tx_undeflow_irq), 78 STMMAC_STAT(tx_process_stopped_irq), 79 STMMAC_STAT(tx_jabber_irq), 80 STMMAC_STAT(rx_overflow_irq), 81 STMMAC_STAT(rx_buf_unav_irq), 82 STMMAC_STAT(rx_process_stopped_irq), 83 STMMAC_STAT(rx_watchdog_irq), 84 STMMAC_STAT(tx_early_irq), 85 STMMAC_STAT(fatal_bus_error_irq), 86 /* Tx/Rx IRQ Events */ 87 STMMAC_STAT(rx_early_irq), 88 STMMAC_STAT(threshold), 89 STMMAC_STAT(tx_pkt_n), 90 STMMAC_STAT(rx_pkt_n), 91 STMMAC_STAT(normal_irq_n), 92 STMMAC_STAT(rx_normal_irq_n), 93 STMMAC_STAT(napi_poll), 94 STMMAC_STAT(tx_normal_irq_n), 95 STMMAC_STAT(tx_clean), 96 STMMAC_STAT(tx_set_ic_bit), 97 STMMAC_STAT(irq_receive_pmt_irq_n), 98 /* MMC info */ 99 STMMAC_STAT(mmc_tx_irq_n), 100 STMMAC_STAT(mmc_rx_irq_n), 101 STMMAC_STAT(mmc_rx_csum_offload_irq_n), 102 /* EEE */ 103 STMMAC_STAT(irq_tx_path_in_lpi_mode_n), 104 STMMAC_STAT(irq_tx_path_exit_lpi_mode_n), 105 STMMAC_STAT(irq_rx_path_in_lpi_mode_n), 106 STMMAC_STAT(irq_rx_path_exit_lpi_mode_n), 107 STMMAC_STAT(phy_eee_wakeup_error_n), 108 /* Extended RDES status */ 109 STMMAC_STAT(ip_hdr_err), 110 STMMAC_STAT(ip_payload_err), 111 STMMAC_STAT(ip_csum_bypassed), 112 STMMAC_STAT(ipv4_pkt_rcvd), 113 STMMAC_STAT(ipv6_pkt_rcvd), 114 STMMAC_STAT(no_ptp_rx_msg_type_ext), 115 STMMAC_STAT(ptp_rx_msg_type_sync), 116 STMMAC_STAT(ptp_rx_msg_type_follow_up), 117 STMMAC_STAT(ptp_rx_msg_type_delay_req), 118 STMMAC_STAT(ptp_rx_msg_type_delay_resp), 119 STMMAC_STAT(ptp_rx_msg_type_pdelay_req), 120 STMMAC_STAT(ptp_rx_msg_type_pdelay_resp), 121 STMMAC_STAT(ptp_rx_msg_type_pdelay_follow_up), 122 STMMAC_STAT(ptp_rx_msg_type_announce), 123 STMMAC_STAT(ptp_rx_msg_type_management), 124 STMMAC_STAT(ptp_rx_msg_pkt_reserved_type), 125 STMMAC_STAT(ptp_frame_type), 126 STMMAC_STAT(ptp_ver), 127 STMMAC_STAT(timestamp_dropped), 128 STMMAC_STAT(av_pkt_rcvd), 129 STMMAC_STAT(av_tagged_pkt_rcvd), 130 STMMAC_STAT(vlan_tag_priority_val), 131 STMMAC_STAT(l3_filter_match), 132 STMMAC_STAT(l4_filter_match), 133 STMMAC_STAT(l3_l4_filter_no_match), 134 /* PCS */ 135 STMMAC_STAT(irq_pcs_ane_n), 136 STMMAC_STAT(irq_pcs_link_n), 137 STMMAC_STAT(irq_rgmii_n), 138 /* DEBUG */ 139 STMMAC_STAT(mtl_tx_status_fifo_full), 140 STMMAC_STAT(mtl_tx_fifo_not_empty), 141 STMMAC_STAT(mmtl_fifo_ctrl), 142 STMMAC_STAT(mtl_tx_fifo_read_ctrl_write), 143 STMMAC_STAT(mtl_tx_fifo_read_ctrl_wait), 144 STMMAC_STAT(mtl_tx_fifo_read_ctrl_read), 145 STMMAC_STAT(mtl_tx_fifo_read_ctrl_idle), 146 STMMAC_STAT(mac_tx_in_pause), 147 STMMAC_STAT(mac_tx_frame_ctrl_xfer), 148 STMMAC_STAT(mac_tx_frame_ctrl_idle), 149 STMMAC_STAT(mac_tx_frame_ctrl_wait), 150 STMMAC_STAT(mac_tx_frame_ctrl_pause), 151 STMMAC_STAT(mac_gmii_tx_proto_engine), 152 STMMAC_STAT(mtl_rx_fifo_fill_level_full), 153 STMMAC_STAT(mtl_rx_fifo_fill_above_thresh), 154 STMMAC_STAT(mtl_rx_fifo_fill_below_thresh), 155 STMMAC_STAT(mtl_rx_fifo_fill_level_empty), 156 STMMAC_STAT(mtl_rx_fifo_read_ctrl_flush), 157 STMMAC_STAT(mtl_rx_fifo_read_ctrl_read_data), 158 STMMAC_STAT(mtl_rx_fifo_read_ctrl_status), 159 STMMAC_STAT(mtl_rx_fifo_read_ctrl_idle), 160 STMMAC_STAT(mtl_rx_fifo_ctrl_active), 161 STMMAC_STAT(mac_rx_frame_ctrl_fifo), 162 STMMAC_STAT(mac_gmii_rx_proto_engine), 163 /* TSO */ 164 STMMAC_STAT(tx_tso_frames), 165 STMMAC_STAT(tx_tso_nfrags), 166 }; 167 #define STMMAC_STATS_LEN ARRAY_SIZE(stmmac_gstrings_stats) 168 169 /* HW MAC Management counters (if supported) */ 170 #define STMMAC_MMC_STAT(m) \ 171 { #m, FIELD_SIZEOF(struct stmmac_counters, m), \ 172 offsetof(struct stmmac_priv, mmc.m)} 173 174 static const struct stmmac_stats stmmac_mmc[] = { 175 STMMAC_MMC_STAT(mmc_tx_octetcount_gb), 176 STMMAC_MMC_STAT(mmc_tx_framecount_gb), 177 STMMAC_MMC_STAT(mmc_tx_broadcastframe_g), 178 STMMAC_MMC_STAT(mmc_tx_multicastframe_g), 179 STMMAC_MMC_STAT(mmc_tx_64_octets_gb), 180 STMMAC_MMC_STAT(mmc_tx_65_to_127_octets_gb), 181 STMMAC_MMC_STAT(mmc_tx_128_to_255_octets_gb), 182 STMMAC_MMC_STAT(mmc_tx_256_to_511_octets_gb), 183 STMMAC_MMC_STAT(mmc_tx_512_to_1023_octets_gb), 184 STMMAC_MMC_STAT(mmc_tx_1024_to_max_octets_gb), 185 STMMAC_MMC_STAT(mmc_tx_unicast_gb), 186 STMMAC_MMC_STAT(mmc_tx_multicast_gb), 187 STMMAC_MMC_STAT(mmc_tx_broadcast_gb), 188 STMMAC_MMC_STAT(mmc_tx_underflow_error), 189 STMMAC_MMC_STAT(mmc_tx_singlecol_g), 190 STMMAC_MMC_STAT(mmc_tx_multicol_g), 191 STMMAC_MMC_STAT(mmc_tx_deferred), 192 STMMAC_MMC_STAT(mmc_tx_latecol), 193 STMMAC_MMC_STAT(mmc_tx_exesscol), 194 STMMAC_MMC_STAT(mmc_tx_carrier_error), 195 STMMAC_MMC_STAT(mmc_tx_octetcount_g), 196 STMMAC_MMC_STAT(mmc_tx_framecount_g), 197 STMMAC_MMC_STAT(mmc_tx_excessdef), 198 STMMAC_MMC_STAT(mmc_tx_pause_frame), 199 STMMAC_MMC_STAT(mmc_tx_vlan_frame_g), 200 STMMAC_MMC_STAT(mmc_rx_framecount_gb), 201 STMMAC_MMC_STAT(mmc_rx_octetcount_gb), 202 STMMAC_MMC_STAT(mmc_rx_octetcount_g), 203 STMMAC_MMC_STAT(mmc_rx_broadcastframe_g), 204 STMMAC_MMC_STAT(mmc_rx_multicastframe_g), 205 STMMAC_MMC_STAT(mmc_rx_crc_error), 206 STMMAC_MMC_STAT(mmc_rx_align_error), 207 STMMAC_MMC_STAT(mmc_rx_run_error), 208 STMMAC_MMC_STAT(mmc_rx_jabber_error), 209 STMMAC_MMC_STAT(mmc_rx_undersize_g), 210 STMMAC_MMC_STAT(mmc_rx_oversize_g), 211 STMMAC_MMC_STAT(mmc_rx_64_octets_gb), 212 STMMAC_MMC_STAT(mmc_rx_65_to_127_octets_gb), 213 STMMAC_MMC_STAT(mmc_rx_128_to_255_octets_gb), 214 STMMAC_MMC_STAT(mmc_rx_256_to_511_octets_gb), 215 STMMAC_MMC_STAT(mmc_rx_512_to_1023_octets_gb), 216 STMMAC_MMC_STAT(mmc_rx_1024_to_max_octets_gb), 217 STMMAC_MMC_STAT(mmc_rx_unicast_g), 218 STMMAC_MMC_STAT(mmc_rx_length_error), 219 STMMAC_MMC_STAT(mmc_rx_autofrangetype), 220 STMMAC_MMC_STAT(mmc_rx_pause_frames), 221 STMMAC_MMC_STAT(mmc_rx_fifo_overflow), 222 STMMAC_MMC_STAT(mmc_rx_vlan_frames_gb), 223 STMMAC_MMC_STAT(mmc_rx_watchdog_error), 224 STMMAC_MMC_STAT(mmc_rx_ipc_intr_mask), 225 STMMAC_MMC_STAT(mmc_rx_ipc_intr), 226 STMMAC_MMC_STAT(mmc_rx_ipv4_gd), 227 STMMAC_MMC_STAT(mmc_rx_ipv4_hderr), 228 STMMAC_MMC_STAT(mmc_rx_ipv4_nopay), 229 STMMAC_MMC_STAT(mmc_rx_ipv4_frag), 230 STMMAC_MMC_STAT(mmc_rx_ipv4_udsbl), 231 STMMAC_MMC_STAT(mmc_rx_ipv4_gd_octets), 232 STMMAC_MMC_STAT(mmc_rx_ipv4_hderr_octets), 233 STMMAC_MMC_STAT(mmc_rx_ipv4_nopay_octets), 234 STMMAC_MMC_STAT(mmc_rx_ipv4_frag_octets), 235 STMMAC_MMC_STAT(mmc_rx_ipv4_udsbl_octets), 236 STMMAC_MMC_STAT(mmc_rx_ipv6_gd_octets), 237 STMMAC_MMC_STAT(mmc_rx_ipv6_hderr_octets), 238 STMMAC_MMC_STAT(mmc_rx_ipv6_nopay_octets), 239 STMMAC_MMC_STAT(mmc_rx_ipv6_gd), 240 STMMAC_MMC_STAT(mmc_rx_ipv6_hderr), 241 STMMAC_MMC_STAT(mmc_rx_ipv6_nopay), 242 STMMAC_MMC_STAT(mmc_rx_udp_gd), 243 STMMAC_MMC_STAT(mmc_rx_udp_err), 244 STMMAC_MMC_STAT(mmc_rx_tcp_gd), 245 STMMAC_MMC_STAT(mmc_rx_tcp_err), 246 STMMAC_MMC_STAT(mmc_rx_icmp_gd), 247 STMMAC_MMC_STAT(mmc_rx_icmp_err), 248 STMMAC_MMC_STAT(mmc_rx_udp_gd_octets), 249 STMMAC_MMC_STAT(mmc_rx_udp_err_octets), 250 STMMAC_MMC_STAT(mmc_rx_tcp_gd_octets), 251 STMMAC_MMC_STAT(mmc_rx_tcp_err_octets), 252 STMMAC_MMC_STAT(mmc_rx_icmp_gd_octets), 253 STMMAC_MMC_STAT(mmc_rx_icmp_err_octets), 254 }; 255 #define STMMAC_MMC_STATS_LEN ARRAY_SIZE(stmmac_mmc) 256 257 static void stmmac_ethtool_getdrvinfo(struct net_device *dev, 258 struct ethtool_drvinfo *info) 259 { 260 struct stmmac_priv *priv = netdev_priv(dev); 261 262 if (priv->plat->has_gmac || priv->plat->has_gmac4) 263 strlcpy(info->driver, GMAC_ETHTOOL_NAME, sizeof(info->driver)); 264 else 265 strlcpy(info->driver, MAC100_ETHTOOL_NAME, 266 sizeof(info->driver)); 267 268 strlcpy(info->version, DRV_MODULE_VERSION, sizeof(info->version)); 269 } 270 271 static int stmmac_ethtool_get_link_ksettings(struct net_device *dev, 272 struct ethtool_link_ksettings *cmd) 273 { 274 struct stmmac_priv *priv = netdev_priv(dev); 275 struct phy_device *phy = dev->phydev; 276 int rc; 277 278 if (priv->hw->pcs & STMMAC_PCS_RGMII || 279 priv->hw->pcs & STMMAC_PCS_SGMII) { 280 struct rgmii_adv adv; 281 u32 supported, advertising, lp_advertising; 282 283 if (!priv->xstats.pcs_link) { 284 cmd->base.speed = SPEED_UNKNOWN; 285 cmd->base.duplex = DUPLEX_UNKNOWN; 286 return 0; 287 } 288 cmd->base.duplex = priv->xstats.pcs_duplex; 289 290 cmd->base.speed = priv->xstats.pcs_speed; 291 292 /* Get and convert ADV/LP_ADV from the HW AN registers */ 293 if (!priv->hw->mac->pcs_get_adv_lp) 294 return -EOPNOTSUPP; /* should never happen indeed */ 295 296 priv->hw->mac->pcs_get_adv_lp(priv->ioaddr, &adv); 297 298 /* Encoding of PSE bits is defined in 802.3z, 37.2.1.4 */ 299 300 ethtool_convert_link_mode_to_legacy_u32( 301 &supported, cmd->link_modes.supported); 302 ethtool_convert_link_mode_to_legacy_u32( 303 &advertising, cmd->link_modes.advertising); 304 ethtool_convert_link_mode_to_legacy_u32( 305 &lp_advertising, cmd->link_modes.lp_advertising); 306 307 if (adv.pause & STMMAC_PCS_PAUSE) 308 advertising |= ADVERTISED_Pause; 309 if (adv.pause & STMMAC_PCS_ASYM_PAUSE) 310 advertising |= ADVERTISED_Asym_Pause; 311 if (adv.lp_pause & STMMAC_PCS_PAUSE) 312 lp_advertising |= ADVERTISED_Pause; 313 if (adv.lp_pause & STMMAC_PCS_ASYM_PAUSE) 314 lp_advertising |= ADVERTISED_Asym_Pause; 315 316 /* Reg49[3] always set because ANE is always supported */ 317 cmd->base.autoneg = ADVERTISED_Autoneg; 318 supported |= SUPPORTED_Autoneg; 319 advertising |= ADVERTISED_Autoneg; 320 lp_advertising |= ADVERTISED_Autoneg; 321 322 if (adv.duplex) { 323 supported |= (SUPPORTED_1000baseT_Full | 324 SUPPORTED_100baseT_Full | 325 SUPPORTED_10baseT_Full); 326 advertising |= (ADVERTISED_1000baseT_Full | 327 ADVERTISED_100baseT_Full | 328 ADVERTISED_10baseT_Full); 329 } else { 330 supported |= (SUPPORTED_1000baseT_Half | 331 SUPPORTED_100baseT_Half | 332 SUPPORTED_10baseT_Half); 333 advertising |= (ADVERTISED_1000baseT_Half | 334 ADVERTISED_100baseT_Half | 335 ADVERTISED_10baseT_Half); 336 } 337 if (adv.lp_duplex) 338 lp_advertising |= (ADVERTISED_1000baseT_Full | 339 ADVERTISED_100baseT_Full | 340 ADVERTISED_10baseT_Full); 341 else 342 lp_advertising |= (ADVERTISED_1000baseT_Half | 343 ADVERTISED_100baseT_Half | 344 ADVERTISED_10baseT_Half); 345 cmd->base.port = PORT_OTHER; 346 347 ethtool_convert_legacy_u32_to_link_mode( 348 cmd->link_modes.supported, supported); 349 ethtool_convert_legacy_u32_to_link_mode( 350 cmd->link_modes.advertising, advertising); 351 ethtool_convert_legacy_u32_to_link_mode( 352 cmd->link_modes.lp_advertising, lp_advertising); 353 354 return 0; 355 } 356 357 if (phy == NULL) { 358 pr_err("%s: %s: PHY is not registered\n", 359 __func__, dev->name); 360 return -ENODEV; 361 } 362 if (!netif_running(dev)) { 363 pr_err("%s: interface is disabled: we cannot track " 364 "link speed / duplex setting\n", dev->name); 365 return -EBUSY; 366 } 367 rc = phy_ethtool_ksettings_get(phy, cmd); 368 return rc; 369 } 370 371 static int 372 stmmac_ethtool_set_link_ksettings(struct net_device *dev, 373 const struct ethtool_link_ksettings *cmd) 374 { 375 struct stmmac_priv *priv = netdev_priv(dev); 376 struct phy_device *phy = dev->phydev; 377 int rc; 378 379 if (priv->hw->pcs & STMMAC_PCS_RGMII || 380 priv->hw->pcs & STMMAC_PCS_SGMII) { 381 u32 mask = ADVERTISED_Autoneg | ADVERTISED_Pause; 382 383 /* Only support ANE */ 384 if (cmd->base.autoneg != AUTONEG_ENABLE) 385 return -EINVAL; 386 387 mask &= (ADVERTISED_1000baseT_Half | 388 ADVERTISED_1000baseT_Full | 389 ADVERTISED_100baseT_Half | 390 ADVERTISED_100baseT_Full | 391 ADVERTISED_10baseT_Half | 392 ADVERTISED_10baseT_Full); 393 394 spin_lock(&priv->lock); 395 396 if (priv->hw->mac->pcs_ctrl_ane) 397 priv->hw->mac->pcs_ctrl_ane(priv->ioaddr, 1, 398 priv->hw->ps, 0); 399 400 spin_unlock(&priv->lock); 401 402 return 0; 403 } 404 405 rc = phy_ethtool_ksettings_set(phy, cmd); 406 407 return rc; 408 } 409 410 static u32 stmmac_ethtool_getmsglevel(struct net_device *dev) 411 { 412 struct stmmac_priv *priv = netdev_priv(dev); 413 return priv->msg_enable; 414 } 415 416 static void stmmac_ethtool_setmsglevel(struct net_device *dev, u32 level) 417 { 418 struct stmmac_priv *priv = netdev_priv(dev); 419 priv->msg_enable = level; 420 421 } 422 423 static int stmmac_check_if_running(struct net_device *dev) 424 { 425 if (!netif_running(dev)) 426 return -EBUSY; 427 return 0; 428 } 429 430 static int stmmac_ethtool_get_regs_len(struct net_device *dev) 431 { 432 return REG_SPACE_SIZE; 433 } 434 435 static void stmmac_ethtool_gregs(struct net_device *dev, 436 struct ethtool_regs *regs, void *space) 437 { 438 int i; 439 u32 *reg_space = (u32 *) space; 440 441 struct stmmac_priv *priv = netdev_priv(dev); 442 443 memset(reg_space, 0x0, REG_SPACE_SIZE); 444 445 if (priv->plat->has_gmac || priv->plat->has_gmac4) { 446 /* MAC registers */ 447 for (i = 0; i < 55; i++) 448 reg_space[i] = readl(priv->ioaddr + (i * 4)); 449 /* DMA registers */ 450 for (i = 0; i < 22; i++) 451 reg_space[i + 55] = 452 readl(priv->ioaddr + (DMA_BUS_MODE + (i * 4))); 453 } else { 454 /* MAC registers */ 455 for (i = 0; i < 12; i++) 456 reg_space[i] = readl(priv->ioaddr + (i * 4)); 457 /* DMA registers */ 458 for (i = 0; i < 9; i++) 459 reg_space[i + 12] = 460 readl(priv->ioaddr + (DMA_BUS_MODE + (i * 4))); 461 reg_space[22] = readl(priv->ioaddr + DMA_CUR_TX_BUF_ADDR); 462 reg_space[23] = readl(priv->ioaddr + DMA_CUR_RX_BUF_ADDR); 463 } 464 } 465 466 static void 467 stmmac_get_pauseparam(struct net_device *netdev, 468 struct ethtool_pauseparam *pause) 469 { 470 struct stmmac_priv *priv = netdev_priv(netdev); 471 472 pause->rx_pause = 0; 473 pause->tx_pause = 0; 474 475 if (priv->hw->pcs && priv->hw->mac->pcs_get_adv_lp) { 476 struct rgmii_adv adv_lp; 477 478 pause->autoneg = 1; 479 priv->hw->mac->pcs_get_adv_lp(priv->ioaddr, &adv_lp); 480 if (!adv_lp.pause) 481 return; 482 } else { 483 if (!(netdev->phydev->supported & SUPPORTED_Pause) || 484 !(netdev->phydev->supported & SUPPORTED_Asym_Pause)) 485 return; 486 } 487 488 pause->autoneg = netdev->phydev->autoneg; 489 490 if (priv->flow_ctrl & FLOW_RX) 491 pause->rx_pause = 1; 492 if (priv->flow_ctrl & FLOW_TX) 493 pause->tx_pause = 1; 494 495 } 496 497 static int 498 stmmac_set_pauseparam(struct net_device *netdev, 499 struct ethtool_pauseparam *pause) 500 { 501 struct stmmac_priv *priv = netdev_priv(netdev); 502 struct phy_device *phy = netdev->phydev; 503 int new_pause = FLOW_OFF; 504 505 if (priv->hw->pcs && priv->hw->mac->pcs_get_adv_lp) { 506 struct rgmii_adv adv_lp; 507 508 pause->autoneg = 1; 509 priv->hw->mac->pcs_get_adv_lp(priv->ioaddr, &adv_lp); 510 if (!adv_lp.pause) 511 return -EOPNOTSUPP; 512 } else { 513 if (!(phy->supported & SUPPORTED_Pause) || 514 !(phy->supported & SUPPORTED_Asym_Pause)) 515 return -EOPNOTSUPP; 516 } 517 518 if (pause->rx_pause) 519 new_pause |= FLOW_RX; 520 if (pause->tx_pause) 521 new_pause |= FLOW_TX; 522 523 priv->flow_ctrl = new_pause; 524 phy->autoneg = pause->autoneg; 525 526 if (phy->autoneg) { 527 if (netif_running(netdev)) 528 return phy_start_aneg(phy); 529 } 530 531 priv->hw->mac->flow_ctrl(priv->hw, phy->duplex, priv->flow_ctrl, 532 priv->pause); 533 return 0; 534 } 535 536 static void stmmac_get_ethtool_stats(struct net_device *dev, 537 struct ethtool_stats *dummy, u64 *data) 538 { 539 struct stmmac_priv *priv = netdev_priv(dev); 540 int i, j = 0; 541 542 /* Update the DMA HW counters for dwmac10/100 */ 543 if (priv->hw->dma->dma_diagnostic_fr) 544 priv->hw->dma->dma_diagnostic_fr(&dev->stats, 545 (void *) &priv->xstats, 546 priv->ioaddr); 547 else { 548 /* If supported, for new GMAC chips expose the MMC counters */ 549 if (priv->dma_cap.rmon) { 550 dwmac_mmc_read(priv->mmcaddr, &priv->mmc); 551 552 for (i = 0; i < STMMAC_MMC_STATS_LEN; i++) { 553 char *p; 554 p = (char *)priv + stmmac_mmc[i].stat_offset; 555 556 data[j++] = (stmmac_mmc[i].sizeof_stat == 557 sizeof(u64)) ? (*(u64 *)p) : 558 (*(u32 *)p); 559 } 560 } 561 if (priv->eee_enabled) { 562 int val = phy_get_eee_err(dev->phydev); 563 if (val) 564 priv->xstats.phy_eee_wakeup_error_n = val; 565 } 566 567 if ((priv->hw->mac->debug) && 568 (priv->synopsys_id >= DWMAC_CORE_3_50)) 569 priv->hw->mac->debug(priv->ioaddr, 570 (void *)&priv->xstats); 571 } 572 for (i = 0; i < STMMAC_STATS_LEN; i++) { 573 char *p = (char *)priv + stmmac_gstrings_stats[i].stat_offset; 574 data[j++] = (stmmac_gstrings_stats[i].sizeof_stat == 575 sizeof(u64)) ? (*(u64 *)p) : (*(u32 *)p); 576 } 577 } 578 579 static int stmmac_get_sset_count(struct net_device *netdev, int sset) 580 { 581 struct stmmac_priv *priv = netdev_priv(netdev); 582 int len; 583 584 switch (sset) { 585 case ETH_SS_STATS: 586 len = STMMAC_STATS_LEN; 587 588 if (priv->dma_cap.rmon) 589 len += STMMAC_MMC_STATS_LEN; 590 591 return len; 592 default: 593 return -EOPNOTSUPP; 594 } 595 } 596 597 static void stmmac_get_strings(struct net_device *dev, u32 stringset, u8 *data) 598 { 599 int i; 600 u8 *p = data; 601 struct stmmac_priv *priv = netdev_priv(dev); 602 603 switch (stringset) { 604 case ETH_SS_STATS: 605 if (priv->dma_cap.rmon) 606 for (i = 0; i < STMMAC_MMC_STATS_LEN; i++) { 607 memcpy(p, stmmac_mmc[i].stat_string, 608 ETH_GSTRING_LEN); 609 p += ETH_GSTRING_LEN; 610 } 611 for (i = 0; i < STMMAC_STATS_LEN; i++) { 612 memcpy(p, stmmac_gstrings_stats[i].stat_string, 613 ETH_GSTRING_LEN); 614 p += ETH_GSTRING_LEN; 615 } 616 break; 617 default: 618 WARN_ON(1); 619 break; 620 } 621 } 622 623 /* Currently only support WOL through Magic packet. */ 624 static void stmmac_get_wol(struct net_device *dev, struct ethtool_wolinfo *wol) 625 { 626 struct stmmac_priv *priv = netdev_priv(dev); 627 628 spin_lock_irq(&priv->lock); 629 if (device_can_wakeup(priv->device)) { 630 wol->supported = WAKE_MAGIC | WAKE_UCAST; 631 wol->wolopts = priv->wolopts; 632 } 633 spin_unlock_irq(&priv->lock); 634 } 635 636 static int stmmac_set_wol(struct net_device *dev, struct ethtool_wolinfo *wol) 637 { 638 struct stmmac_priv *priv = netdev_priv(dev); 639 u32 support = WAKE_MAGIC | WAKE_UCAST; 640 641 /* By default almost all GMAC devices support the WoL via 642 * magic frame but we can disable it if the HW capability 643 * register shows no support for pmt_magic_frame. */ 644 if ((priv->hw_cap_support) && (!priv->dma_cap.pmt_magic_frame)) 645 wol->wolopts &= ~WAKE_MAGIC; 646 647 if (!device_can_wakeup(priv->device)) 648 return -EINVAL; 649 650 if (wol->wolopts & ~support) 651 return -EINVAL; 652 653 if (wol->wolopts) { 654 pr_info("stmmac: wakeup enable\n"); 655 device_set_wakeup_enable(priv->device, 1); 656 enable_irq_wake(priv->wol_irq); 657 } else { 658 device_set_wakeup_enable(priv->device, 0); 659 disable_irq_wake(priv->wol_irq); 660 } 661 662 spin_lock_irq(&priv->lock); 663 priv->wolopts = wol->wolopts; 664 spin_unlock_irq(&priv->lock); 665 666 return 0; 667 } 668 669 static int stmmac_ethtool_op_get_eee(struct net_device *dev, 670 struct ethtool_eee *edata) 671 { 672 struct stmmac_priv *priv = netdev_priv(dev); 673 674 if (!priv->dma_cap.eee) 675 return -EOPNOTSUPP; 676 677 edata->eee_enabled = priv->eee_enabled; 678 edata->eee_active = priv->eee_active; 679 edata->tx_lpi_timer = priv->tx_lpi_timer; 680 681 return phy_ethtool_get_eee(dev->phydev, edata); 682 } 683 684 static int stmmac_ethtool_op_set_eee(struct net_device *dev, 685 struct ethtool_eee *edata) 686 { 687 struct stmmac_priv *priv = netdev_priv(dev); 688 689 priv->eee_enabled = edata->eee_enabled; 690 691 if (!priv->eee_enabled) 692 stmmac_disable_eee_mode(priv); 693 else { 694 /* We are asking for enabling the EEE but it is safe 695 * to verify all by invoking the eee_init function. 696 * In case of failure it will return an error. 697 */ 698 priv->eee_enabled = stmmac_eee_init(priv); 699 if (!priv->eee_enabled) 700 return -EOPNOTSUPP; 701 702 /* Do not change tx_lpi_timer in case of failure */ 703 priv->tx_lpi_timer = edata->tx_lpi_timer; 704 } 705 706 return phy_ethtool_set_eee(dev->phydev, edata); 707 } 708 709 static u32 stmmac_usec2riwt(u32 usec, struct stmmac_priv *priv) 710 { 711 unsigned long clk = clk_get_rate(priv->plat->stmmac_clk); 712 713 if (!clk) 714 return 0; 715 716 return (usec * (clk / 1000000)) / 256; 717 } 718 719 static u32 stmmac_riwt2usec(u32 riwt, struct stmmac_priv *priv) 720 { 721 unsigned long clk = clk_get_rate(priv->plat->stmmac_clk); 722 723 if (!clk) 724 return 0; 725 726 return (riwt * 256) / (clk / 1000000); 727 } 728 729 static int stmmac_get_coalesce(struct net_device *dev, 730 struct ethtool_coalesce *ec) 731 { 732 struct stmmac_priv *priv = netdev_priv(dev); 733 734 ec->tx_coalesce_usecs = priv->tx_coal_timer; 735 ec->tx_max_coalesced_frames = priv->tx_coal_frames; 736 737 if (priv->use_riwt) 738 ec->rx_coalesce_usecs = stmmac_riwt2usec(priv->rx_riwt, priv); 739 740 return 0; 741 } 742 743 static int stmmac_set_coalesce(struct net_device *dev, 744 struct ethtool_coalesce *ec) 745 { 746 struct stmmac_priv *priv = netdev_priv(dev); 747 unsigned int rx_riwt; 748 749 /* Check not supported parameters */ 750 if ((ec->rx_max_coalesced_frames) || (ec->rx_coalesce_usecs_irq) || 751 (ec->rx_max_coalesced_frames_irq) || (ec->tx_coalesce_usecs_irq) || 752 (ec->use_adaptive_rx_coalesce) || (ec->use_adaptive_tx_coalesce) || 753 (ec->pkt_rate_low) || (ec->rx_coalesce_usecs_low) || 754 (ec->rx_max_coalesced_frames_low) || (ec->tx_coalesce_usecs_high) || 755 (ec->tx_max_coalesced_frames_low) || (ec->pkt_rate_high) || 756 (ec->tx_coalesce_usecs_low) || (ec->rx_coalesce_usecs_high) || 757 (ec->rx_max_coalesced_frames_high) || 758 (ec->tx_max_coalesced_frames_irq) || 759 (ec->stats_block_coalesce_usecs) || 760 (ec->tx_max_coalesced_frames_high) || (ec->rate_sample_interval)) 761 return -EOPNOTSUPP; 762 763 if (ec->rx_coalesce_usecs == 0) 764 return -EINVAL; 765 766 if ((ec->tx_coalesce_usecs == 0) && 767 (ec->tx_max_coalesced_frames == 0)) 768 return -EINVAL; 769 770 if ((ec->tx_coalesce_usecs > STMMAC_MAX_COAL_TX_TICK) || 771 (ec->tx_max_coalesced_frames > STMMAC_TX_MAX_FRAMES)) 772 return -EINVAL; 773 774 rx_riwt = stmmac_usec2riwt(ec->rx_coalesce_usecs, priv); 775 776 if ((rx_riwt > MAX_DMA_RIWT) || (rx_riwt < MIN_DMA_RIWT)) 777 return -EINVAL; 778 else if (!priv->use_riwt) 779 return -EOPNOTSUPP; 780 781 /* Only copy relevant parameters, ignore all others. */ 782 priv->tx_coal_frames = ec->tx_max_coalesced_frames; 783 priv->tx_coal_timer = ec->tx_coalesce_usecs; 784 priv->rx_riwt = rx_riwt; 785 priv->hw->dma->rx_watchdog(priv->ioaddr, priv->rx_riwt); 786 787 return 0; 788 } 789 790 static int stmmac_get_ts_info(struct net_device *dev, 791 struct ethtool_ts_info *info) 792 { 793 struct stmmac_priv *priv = netdev_priv(dev); 794 795 if ((priv->dma_cap.time_stamp || priv->dma_cap.atime_stamp)) { 796 797 info->so_timestamping = SOF_TIMESTAMPING_TX_SOFTWARE | 798 SOF_TIMESTAMPING_TX_HARDWARE | 799 SOF_TIMESTAMPING_RX_SOFTWARE | 800 SOF_TIMESTAMPING_RX_HARDWARE | 801 SOF_TIMESTAMPING_SOFTWARE | 802 SOF_TIMESTAMPING_RAW_HARDWARE; 803 804 if (priv->ptp_clock) 805 info->phc_index = ptp_clock_index(priv->ptp_clock); 806 807 info->tx_types = (1 << HWTSTAMP_TX_OFF) | (1 << HWTSTAMP_TX_ON); 808 809 info->rx_filters = ((1 << HWTSTAMP_FILTER_NONE) | 810 (1 << HWTSTAMP_FILTER_PTP_V1_L4_EVENT) | 811 (1 << HWTSTAMP_FILTER_PTP_V1_L4_SYNC) | 812 (1 << HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ) | 813 (1 << HWTSTAMP_FILTER_PTP_V2_L4_EVENT) | 814 (1 << HWTSTAMP_FILTER_PTP_V2_L4_SYNC) | 815 (1 << HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ) | 816 (1 << HWTSTAMP_FILTER_PTP_V2_EVENT) | 817 (1 << HWTSTAMP_FILTER_PTP_V2_SYNC) | 818 (1 << HWTSTAMP_FILTER_PTP_V2_DELAY_REQ) | 819 (1 << HWTSTAMP_FILTER_ALL)); 820 return 0; 821 } else 822 return ethtool_op_get_ts_info(dev, info); 823 } 824 825 static int stmmac_get_tunable(struct net_device *dev, 826 const struct ethtool_tunable *tuna, void *data) 827 { 828 struct stmmac_priv *priv = netdev_priv(dev); 829 int ret = 0; 830 831 switch (tuna->id) { 832 case ETHTOOL_RX_COPYBREAK: 833 *(u32 *)data = priv->rx_copybreak; 834 break; 835 default: 836 ret = -EINVAL; 837 break; 838 } 839 840 return ret; 841 } 842 843 static int stmmac_set_tunable(struct net_device *dev, 844 const struct ethtool_tunable *tuna, 845 const void *data) 846 { 847 struct stmmac_priv *priv = netdev_priv(dev); 848 int ret = 0; 849 850 switch (tuna->id) { 851 case ETHTOOL_RX_COPYBREAK: 852 priv->rx_copybreak = *(u32 *)data; 853 break; 854 default: 855 ret = -EINVAL; 856 break; 857 } 858 859 return ret; 860 } 861 862 static const struct ethtool_ops stmmac_ethtool_ops = { 863 .begin = stmmac_check_if_running, 864 .get_drvinfo = stmmac_ethtool_getdrvinfo, 865 .get_msglevel = stmmac_ethtool_getmsglevel, 866 .set_msglevel = stmmac_ethtool_setmsglevel, 867 .get_regs = stmmac_ethtool_gregs, 868 .get_regs_len = stmmac_ethtool_get_regs_len, 869 .get_link = ethtool_op_get_link, 870 .nway_reset = phy_ethtool_nway_reset, 871 .get_pauseparam = stmmac_get_pauseparam, 872 .set_pauseparam = stmmac_set_pauseparam, 873 .get_ethtool_stats = stmmac_get_ethtool_stats, 874 .get_strings = stmmac_get_strings, 875 .get_wol = stmmac_get_wol, 876 .set_wol = stmmac_set_wol, 877 .get_eee = stmmac_ethtool_op_get_eee, 878 .set_eee = stmmac_ethtool_op_set_eee, 879 .get_sset_count = stmmac_get_sset_count, 880 .get_ts_info = stmmac_get_ts_info, 881 .get_coalesce = stmmac_get_coalesce, 882 .set_coalesce = stmmac_set_coalesce, 883 .get_tunable = stmmac_get_tunable, 884 .set_tunable = stmmac_set_tunable, 885 .get_link_ksettings = stmmac_ethtool_get_link_ksettings, 886 .set_link_ksettings = stmmac_ethtool_set_link_ksettings, 887 }; 888 889 void stmmac_set_ethtool_ops(struct net_device *netdev) 890 { 891 netdev->ethtool_ops = &stmmac_ethtool_ops; 892 } 893