1 /******************************************************************************* 2 STMMAC Ethtool support 3 4 Copyright (C) 2007-2009 STMicroelectronics Ltd 5 6 This program is free software; you can redistribute it and/or modify it 7 under the terms and conditions of the GNU General Public License, 8 version 2, as published by the Free Software Foundation. 9 10 This program is distributed in the hope it will be useful, but WITHOUT 11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 13 more details. 14 15 You should have received a copy of the GNU General Public License along with 16 this program; if not, write to the Free Software Foundation, Inc., 17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. 18 19 The full GNU General Public License is included in this distribution in 20 the file called "COPYING". 21 22 Author: Giuseppe Cavallaro <peppe.cavallaro@st.com> 23 *******************************************************************************/ 24 25 #include <linux/etherdevice.h> 26 #include <linux/ethtool.h> 27 #include <linux/interrupt.h> 28 #include <linux/mii.h> 29 #include <linux/phy.h> 30 #include <linux/net_tstamp.h> 31 #include <asm/io.h> 32 33 #include "stmmac.h" 34 #include "dwmac_dma.h" 35 36 #define REG_SPACE_SIZE 0x1054 37 #define MAC100_ETHTOOL_NAME "st_mac100" 38 #define GMAC_ETHTOOL_NAME "st_gmac" 39 40 struct stmmac_stats { 41 char stat_string[ETH_GSTRING_LEN]; 42 int sizeof_stat; 43 int stat_offset; 44 }; 45 46 #define STMMAC_STAT(m) \ 47 { #m, FIELD_SIZEOF(struct stmmac_extra_stats, m), \ 48 offsetof(struct stmmac_priv, xstats.m)} 49 50 static const struct stmmac_stats stmmac_gstrings_stats[] = { 51 /* Transmit errors */ 52 STMMAC_STAT(tx_underflow), 53 STMMAC_STAT(tx_carrier), 54 STMMAC_STAT(tx_losscarrier), 55 STMMAC_STAT(vlan_tag), 56 STMMAC_STAT(tx_deferred), 57 STMMAC_STAT(tx_vlan), 58 STMMAC_STAT(tx_jabber), 59 STMMAC_STAT(tx_frame_flushed), 60 STMMAC_STAT(tx_payload_error), 61 STMMAC_STAT(tx_ip_header_error), 62 /* Receive errors */ 63 STMMAC_STAT(rx_desc), 64 STMMAC_STAT(sa_filter_fail), 65 STMMAC_STAT(overflow_error), 66 STMMAC_STAT(ipc_csum_error), 67 STMMAC_STAT(rx_collision), 68 STMMAC_STAT(rx_crc), 69 STMMAC_STAT(dribbling_bit), 70 STMMAC_STAT(rx_length), 71 STMMAC_STAT(rx_mii), 72 STMMAC_STAT(rx_multicast), 73 STMMAC_STAT(rx_gmac_overflow), 74 STMMAC_STAT(rx_watchdog), 75 STMMAC_STAT(da_rx_filter_fail), 76 STMMAC_STAT(sa_rx_filter_fail), 77 STMMAC_STAT(rx_missed_cntr), 78 STMMAC_STAT(rx_overflow_cntr), 79 STMMAC_STAT(rx_vlan), 80 /* Tx/Rx IRQ error info */ 81 STMMAC_STAT(tx_undeflow_irq), 82 STMMAC_STAT(tx_process_stopped_irq), 83 STMMAC_STAT(tx_jabber_irq), 84 STMMAC_STAT(rx_overflow_irq), 85 STMMAC_STAT(rx_buf_unav_irq), 86 STMMAC_STAT(rx_process_stopped_irq), 87 STMMAC_STAT(rx_watchdog_irq), 88 STMMAC_STAT(tx_early_irq), 89 STMMAC_STAT(fatal_bus_error_irq), 90 /* Tx/Rx IRQ Events */ 91 STMMAC_STAT(rx_early_irq), 92 STMMAC_STAT(threshold), 93 STMMAC_STAT(tx_pkt_n), 94 STMMAC_STAT(rx_pkt_n), 95 STMMAC_STAT(normal_irq_n), 96 STMMAC_STAT(rx_normal_irq_n), 97 STMMAC_STAT(napi_poll), 98 STMMAC_STAT(tx_normal_irq_n), 99 STMMAC_STAT(tx_clean), 100 STMMAC_STAT(tx_set_ic_bit), 101 STMMAC_STAT(irq_receive_pmt_irq_n), 102 /* MMC info */ 103 STMMAC_STAT(mmc_tx_irq_n), 104 STMMAC_STAT(mmc_rx_irq_n), 105 STMMAC_STAT(mmc_rx_csum_offload_irq_n), 106 /* EEE */ 107 STMMAC_STAT(irq_tx_path_in_lpi_mode_n), 108 STMMAC_STAT(irq_tx_path_exit_lpi_mode_n), 109 STMMAC_STAT(irq_rx_path_in_lpi_mode_n), 110 STMMAC_STAT(irq_rx_path_exit_lpi_mode_n), 111 STMMAC_STAT(phy_eee_wakeup_error_n), 112 /* Extended RDES status */ 113 STMMAC_STAT(ip_hdr_err), 114 STMMAC_STAT(ip_payload_err), 115 STMMAC_STAT(ip_csum_bypassed), 116 STMMAC_STAT(ipv4_pkt_rcvd), 117 STMMAC_STAT(ipv6_pkt_rcvd), 118 STMMAC_STAT(rx_msg_type_ext_no_ptp), 119 STMMAC_STAT(rx_msg_type_sync), 120 STMMAC_STAT(rx_msg_type_follow_up), 121 STMMAC_STAT(rx_msg_type_delay_req), 122 STMMAC_STAT(rx_msg_type_delay_resp), 123 STMMAC_STAT(rx_msg_type_pdelay_req), 124 STMMAC_STAT(rx_msg_type_pdelay_resp), 125 STMMAC_STAT(rx_msg_type_pdelay_follow_up), 126 STMMAC_STAT(ptp_frame_type), 127 STMMAC_STAT(ptp_ver), 128 STMMAC_STAT(timestamp_dropped), 129 STMMAC_STAT(av_pkt_rcvd), 130 STMMAC_STAT(av_tagged_pkt_rcvd), 131 STMMAC_STAT(vlan_tag_priority_val), 132 STMMAC_STAT(l3_filter_match), 133 STMMAC_STAT(l4_filter_match), 134 STMMAC_STAT(l3_l4_filter_no_match), 135 /* PCS */ 136 STMMAC_STAT(irq_pcs_ane_n), 137 STMMAC_STAT(irq_pcs_link_n), 138 STMMAC_STAT(irq_rgmii_n), 139 /* DEBUG */ 140 STMMAC_STAT(mtl_tx_status_fifo_full), 141 STMMAC_STAT(mtl_tx_fifo_not_empty), 142 STMMAC_STAT(mmtl_fifo_ctrl), 143 STMMAC_STAT(mtl_tx_fifo_read_ctrl_write), 144 STMMAC_STAT(mtl_tx_fifo_read_ctrl_wait), 145 STMMAC_STAT(mtl_tx_fifo_read_ctrl_read), 146 STMMAC_STAT(mtl_tx_fifo_read_ctrl_idle), 147 STMMAC_STAT(mac_tx_in_pause), 148 STMMAC_STAT(mac_tx_frame_ctrl_xfer), 149 STMMAC_STAT(mac_tx_frame_ctrl_idle), 150 STMMAC_STAT(mac_tx_frame_ctrl_wait), 151 STMMAC_STAT(mac_tx_frame_ctrl_pause), 152 STMMAC_STAT(mac_gmii_tx_proto_engine), 153 STMMAC_STAT(mtl_rx_fifo_fill_level_full), 154 STMMAC_STAT(mtl_rx_fifo_fill_above_thresh), 155 STMMAC_STAT(mtl_rx_fifo_fill_below_thresh), 156 STMMAC_STAT(mtl_rx_fifo_fill_level_empty), 157 STMMAC_STAT(mtl_rx_fifo_read_ctrl_flush), 158 STMMAC_STAT(mtl_rx_fifo_read_ctrl_read_data), 159 STMMAC_STAT(mtl_rx_fifo_read_ctrl_status), 160 STMMAC_STAT(mtl_rx_fifo_read_ctrl_idle), 161 STMMAC_STAT(mtl_rx_fifo_ctrl_active), 162 STMMAC_STAT(mac_rx_frame_ctrl_fifo), 163 STMMAC_STAT(mac_gmii_rx_proto_engine), 164 /* TSO */ 165 STMMAC_STAT(tx_tso_frames), 166 STMMAC_STAT(tx_tso_nfrags), 167 }; 168 #define STMMAC_STATS_LEN ARRAY_SIZE(stmmac_gstrings_stats) 169 170 /* HW MAC Management counters (if supported) */ 171 #define STMMAC_MMC_STAT(m) \ 172 { #m, FIELD_SIZEOF(struct stmmac_counters, m), \ 173 offsetof(struct stmmac_priv, mmc.m)} 174 175 static const struct stmmac_stats stmmac_mmc[] = { 176 STMMAC_MMC_STAT(mmc_tx_octetcount_gb), 177 STMMAC_MMC_STAT(mmc_tx_framecount_gb), 178 STMMAC_MMC_STAT(mmc_tx_broadcastframe_g), 179 STMMAC_MMC_STAT(mmc_tx_multicastframe_g), 180 STMMAC_MMC_STAT(mmc_tx_64_octets_gb), 181 STMMAC_MMC_STAT(mmc_tx_65_to_127_octets_gb), 182 STMMAC_MMC_STAT(mmc_tx_128_to_255_octets_gb), 183 STMMAC_MMC_STAT(mmc_tx_256_to_511_octets_gb), 184 STMMAC_MMC_STAT(mmc_tx_512_to_1023_octets_gb), 185 STMMAC_MMC_STAT(mmc_tx_1024_to_max_octets_gb), 186 STMMAC_MMC_STAT(mmc_tx_unicast_gb), 187 STMMAC_MMC_STAT(mmc_tx_multicast_gb), 188 STMMAC_MMC_STAT(mmc_tx_broadcast_gb), 189 STMMAC_MMC_STAT(mmc_tx_underflow_error), 190 STMMAC_MMC_STAT(mmc_tx_singlecol_g), 191 STMMAC_MMC_STAT(mmc_tx_multicol_g), 192 STMMAC_MMC_STAT(mmc_tx_deferred), 193 STMMAC_MMC_STAT(mmc_tx_latecol), 194 STMMAC_MMC_STAT(mmc_tx_exesscol), 195 STMMAC_MMC_STAT(mmc_tx_carrier_error), 196 STMMAC_MMC_STAT(mmc_tx_octetcount_g), 197 STMMAC_MMC_STAT(mmc_tx_framecount_g), 198 STMMAC_MMC_STAT(mmc_tx_excessdef), 199 STMMAC_MMC_STAT(mmc_tx_pause_frame), 200 STMMAC_MMC_STAT(mmc_tx_vlan_frame_g), 201 STMMAC_MMC_STAT(mmc_rx_framecount_gb), 202 STMMAC_MMC_STAT(mmc_rx_octetcount_gb), 203 STMMAC_MMC_STAT(mmc_rx_octetcount_g), 204 STMMAC_MMC_STAT(mmc_rx_broadcastframe_g), 205 STMMAC_MMC_STAT(mmc_rx_multicastframe_g), 206 STMMAC_MMC_STAT(mmc_rx_crc_error), 207 STMMAC_MMC_STAT(mmc_rx_align_error), 208 STMMAC_MMC_STAT(mmc_rx_run_error), 209 STMMAC_MMC_STAT(mmc_rx_jabber_error), 210 STMMAC_MMC_STAT(mmc_rx_undersize_g), 211 STMMAC_MMC_STAT(mmc_rx_oversize_g), 212 STMMAC_MMC_STAT(mmc_rx_64_octets_gb), 213 STMMAC_MMC_STAT(mmc_rx_65_to_127_octets_gb), 214 STMMAC_MMC_STAT(mmc_rx_128_to_255_octets_gb), 215 STMMAC_MMC_STAT(mmc_rx_256_to_511_octets_gb), 216 STMMAC_MMC_STAT(mmc_rx_512_to_1023_octets_gb), 217 STMMAC_MMC_STAT(mmc_rx_1024_to_max_octets_gb), 218 STMMAC_MMC_STAT(mmc_rx_unicast_g), 219 STMMAC_MMC_STAT(mmc_rx_length_error), 220 STMMAC_MMC_STAT(mmc_rx_autofrangetype), 221 STMMAC_MMC_STAT(mmc_rx_pause_frames), 222 STMMAC_MMC_STAT(mmc_rx_fifo_overflow), 223 STMMAC_MMC_STAT(mmc_rx_vlan_frames_gb), 224 STMMAC_MMC_STAT(mmc_rx_watchdog_error), 225 STMMAC_MMC_STAT(mmc_rx_ipc_intr_mask), 226 STMMAC_MMC_STAT(mmc_rx_ipc_intr), 227 STMMAC_MMC_STAT(mmc_rx_ipv4_gd), 228 STMMAC_MMC_STAT(mmc_rx_ipv4_hderr), 229 STMMAC_MMC_STAT(mmc_rx_ipv4_nopay), 230 STMMAC_MMC_STAT(mmc_rx_ipv4_frag), 231 STMMAC_MMC_STAT(mmc_rx_ipv4_udsbl), 232 STMMAC_MMC_STAT(mmc_rx_ipv4_gd_octets), 233 STMMAC_MMC_STAT(mmc_rx_ipv4_hderr_octets), 234 STMMAC_MMC_STAT(mmc_rx_ipv4_nopay_octets), 235 STMMAC_MMC_STAT(mmc_rx_ipv4_frag_octets), 236 STMMAC_MMC_STAT(mmc_rx_ipv4_udsbl_octets), 237 STMMAC_MMC_STAT(mmc_rx_ipv6_gd_octets), 238 STMMAC_MMC_STAT(mmc_rx_ipv6_hderr_octets), 239 STMMAC_MMC_STAT(mmc_rx_ipv6_nopay_octets), 240 STMMAC_MMC_STAT(mmc_rx_ipv6_gd), 241 STMMAC_MMC_STAT(mmc_rx_ipv6_hderr), 242 STMMAC_MMC_STAT(mmc_rx_ipv6_nopay), 243 STMMAC_MMC_STAT(mmc_rx_udp_gd), 244 STMMAC_MMC_STAT(mmc_rx_udp_err), 245 STMMAC_MMC_STAT(mmc_rx_tcp_gd), 246 STMMAC_MMC_STAT(mmc_rx_tcp_err), 247 STMMAC_MMC_STAT(mmc_rx_icmp_gd), 248 STMMAC_MMC_STAT(mmc_rx_icmp_err), 249 STMMAC_MMC_STAT(mmc_rx_udp_gd_octets), 250 STMMAC_MMC_STAT(mmc_rx_udp_err_octets), 251 STMMAC_MMC_STAT(mmc_rx_tcp_gd_octets), 252 STMMAC_MMC_STAT(mmc_rx_tcp_err_octets), 253 STMMAC_MMC_STAT(mmc_rx_icmp_gd_octets), 254 STMMAC_MMC_STAT(mmc_rx_icmp_err_octets), 255 }; 256 #define STMMAC_MMC_STATS_LEN ARRAY_SIZE(stmmac_mmc) 257 258 static void stmmac_ethtool_getdrvinfo(struct net_device *dev, 259 struct ethtool_drvinfo *info) 260 { 261 struct stmmac_priv *priv = netdev_priv(dev); 262 263 if (priv->plat->has_gmac) 264 strlcpy(info->driver, GMAC_ETHTOOL_NAME, sizeof(info->driver)); 265 else 266 strlcpy(info->driver, MAC100_ETHTOOL_NAME, 267 sizeof(info->driver)); 268 269 strlcpy(info->version, DRV_MODULE_VERSION, sizeof(info->version)); 270 } 271 272 static int stmmac_ethtool_get_link_ksettings(struct net_device *dev, 273 struct ethtool_link_ksettings *cmd) 274 { 275 struct stmmac_priv *priv = netdev_priv(dev); 276 struct phy_device *phy = dev->phydev; 277 int rc; 278 279 if (priv->hw->pcs & STMMAC_PCS_RGMII || 280 priv->hw->pcs & STMMAC_PCS_SGMII) { 281 struct rgmii_adv adv; 282 u32 supported, advertising, lp_advertising; 283 284 if (!priv->xstats.pcs_link) { 285 cmd->base.speed = SPEED_UNKNOWN; 286 cmd->base.duplex = DUPLEX_UNKNOWN; 287 return 0; 288 } 289 cmd->base.duplex = priv->xstats.pcs_duplex; 290 291 cmd->base.speed = priv->xstats.pcs_speed; 292 293 /* Get and convert ADV/LP_ADV from the HW AN registers */ 294 if (!priv->hw->mac->pcs_get_adv_lp) 295 return -EOPNOTSUPP; /* should never happen indeed */ 296 297 priv->hw->mac->pcs_get_adv_lp(priv->ioaddr, &adv); 298 299 /* Encoding of PSE bits is defined in 802.3z, 37.2.1.4 */ 300 301 ethtool_convert_link_mode_to_legacy_u32( 302 &supported, cmd->link_modes.supported); 303 ethtool_convert_link_mode_to_legacy_u32( 304 &advertising, cmd->link_modes.advertising); 305 ethtool_convert_link_mode_to_legacy_u32( 306 &lp_advertising, cmd->link_modes.lp_advertising); 307 308 if (adv.pause & STMMAC_PCS_PAUSE) 309 advertising |= ADVERTISED_Pause; 310 if (adv.pause & STMMAC_PCS_ASYM_PAUSE) 311 advertising |= ADVERTISED_Asym_Pause; 312 if (adv.lp_pause & STMMAC_PCS_PAUSE) 313 lp_advertising |= ADVERTISED_Pause; 314 if (adv.lp_pause & STMMAC_PCS_ASYM_PAUSE) 315 lp_advertising |= ADVERTISED_Asym_Pause; 316 317 /* Reg49[3] always set because ANE is always supported */ 318 cmd->base.autoneg = ADVERTISED_Autoneg; 319 supported |= SUPPORTED_Autoneg; 320 advertising |= ADVERTISED_Autoneg; 321 lp_advertising |= ADVERTISED_Autoneg; 322 323 if (adv.duplex) { 324 supported |= (SUPPORTED_1000baseT_Full | 325 SUPPORTED_100baseT_Full | 326 SUPPORTED_10baseT_Full); 327 advertising |= (ADVERTISED_1000baseT_Full | 328 ADVERTISED_100baseT_Full | 329 ADVERTISED_10baseT_Full); 330 } else { 331 supported |= (SUPPORTED_1000baseT_Half | 332 SUPPORTED_100baseT_Half | 333 SUPPORTED_10baseT_Half); 334 advertising |= (ADVERTISED_1000baseT_Half | 335 ADVERTISED_100baseT_Half | 336 ADVERTISED_10baseT_Half); 337 } 338 if (adv.lp_duplex) 339 lp_advertising |= (ADVERTISED_1000baseT_Full | 340 ADVERTISED_100baseT_Full | 341 ADVERTISED_10baseT_Full); 342 else 343 lp_advertising |= (ADVERTISED_1000baseT_Half | 344 ADVERTISED_100baseT_Half | 345 ADVERTISED_10baseT_Half); 346 cmd->base.port = PORT_OTHER; 347 348 ethtool_convert_legacy_u32_to_link_mode( 349 cmd->link_modes.supported, supported); 350 ethtool_convert_legacy_u32_to_link_mode( 351 cmd->link_modes.advertising, advertising); 352 ethtool_convert_legacy_u32_to_link_mode( 353 cmd->link_modes.lp_advertising, lp_advertising); 354 355 return 0; 356 } 357 358 if (phy == NULL) { 359 pr_err("%s: %s: PHY is not registered\n", 360 __func__, dev->name); 361 return -ENODEV; 362 } 363 if (!netif_running(dev)) { 364 pr_err("%s: interface is disabled: we cannot track " 365 "link speed / duplex setting\n", dev->name); 366 return -EBUSY; 367 } 368 rc = phy_ethtool_ksettings_get(phy, cmd); 369 return rc; 370 } 371 372 static int 373 stmmac_ethtool_set_link_ksettings(struct net_device *dev, 374 const struct ethtool_link_ksettings *cmd) 375 { 376 struct stmmac_priv *priv = netdev_priv(dev); 377 struct phy_device *phy = dev->phydev; 378 int rc; 379 380 if (priv->hw->pcs & STMMAC_PCS_RGMII || 381 priv->hw->pcs & STMMAC_PCS_SGMII) { 382 u32 mask = ADVERTISED_Autoneg | ADVERTISED_Pause; 383 384 /* Only support ANE */ 385 if (cmd->base.autoneg != AUTONEG_ENABLE) 386 return -EINVAL; 387 388 mask &= (ADVERTISED_1000baseT_Half | 389 ADVERTISED_1000baseT_Full | 390 ADVERTISED_100baseT_Half | 391 ADVERTISED_100baseT_Full | 392 ADVERTISED_10baseT_Half | 393 ADVERTISED_10baseT_Full); 394 395 spin_lock(&priv->lock); 396 397 if (priv->hw->mac->pcs_ctrl_ane) 398 priv->hw->mac->pcs_ctrl_ane(priv->ioaddr, 1, 399 priv->hw->ps, 0); 400 401 spin_unlock(&priv->lock); 402 403 return 0; 404 } 405 406 spin_lock(&priv->lock); 407 rc = phy_ethtool_ksettings_set(phy, cmd); 408 spin_unlock(&priv->lock); 409 410 return rc; 411 } 412 413 static u32 stmmac_ethtool_getmsglevel(struct net_device *dev) 414 { 415 struct stmmac_priv *priv = netdev_priv(dev); 416 return priv->msg_enable; 417 } 418 419 static void stmmac_ethtool_setmsglevel(struct net_device *dev, u32 level) 420 { 421 struct stmmac_priv *priv = netdev_priv(dev); 422 priv->msg_enable = level; 423 424 } 425 426 static int stmmac_check_if_running(struct net_device *dev) 427 { 428 if (!netif_running(dev)) 429 return -EBUSY; 430 return 0; 431 } 432 433 static int stmmac_ethtool_get_regs_len(struct net_device *dev) 434 { 435 return REG_SPACE_SIZE; 436 } 437 438 static void stmmac_ethtool_gregs(struct net_device *dev, 439 struct ethtool_regs *regs, void *space) 440 { 441 int i; 442 u32 *reg_space = (u32 *) space; 443 444 struct stmmac_priv *priv = netdev_priv(dev); 445 446 memset(reg_space, 0x0, REG_SPACE_SIZE); 447 448 if (!priv->plat->has_gmac) { 449 /* MAC registers */ 450 for (i = 0; i < 12; i++) 451 reg_space[i] = readl(priv->ioaddr + (i * 4)); 452 /* DMA registers */ 453 for (i = 0; i < 9; i++) 454 reg_space[i + 12] = 455 readl(priv->ioaddr + (DMA_BUS_MODE + (i * 4))); 456 reg_space[22] = readl(priv->ioaddr + DMA_CUR_TX_BUF_ADDR); 457 reg_space[23] = readl(priv->ioaddr + DMA_CUR_RX_BUF_ADDR); 458 } else { 459 /* MAC registers */ 460 for (i = 0; i < 55; i++) 461 reg_space[i] = readl(priv->ioaddr + (i * 4)); 462 /* DMA registers */ 463 for (i = 0; i < 22; i++) 464 reg_space[i + 55] = 465 readl(priv->ioaddr + (DMA_BUS_MODE + (i * 4))); 466 } 467 } 468 469 static void 470 stmmac_get_pauseparam(struct net_device *netdev, 471 struct ethtool_pauseparam *pause) 472 { 473 struct stmmac_priv *priv = netdev_priv(netdev); 474 475 pause->rx_pause = 0; 476 pause->tx_pause = 0; 477 478 if (priv->hw->pcs && priv->hw->mac->pcs_get_adv_lp) { 479 struct rgmii_adv adv_lp; 480 481 pause->autoneg = 1; 482 priv->hw->mac->pcs_get_adv_lp(priv->ioaddr, &adv_lp); 483 if (!adv_lp.pause) 484 return; 485 } else { 486 if (!(netdev->phydev->supported & SUPPORTED_Pause) || 487 !(netdev->phydev->supported & SUPPORTED_Asym_Pause)) 488 return; 489 } 490 491 pause->autoneg = netdev->phydev->autoneg; 492 493 if (priv->flow_ctrl & FLOW_RX) 494 pause->rx_pause = 1; 495 if (priv->flow_ctrl & FLOW_TX) 496 pause->tx_pause = 1; 497 498 } 499 500 static int 501 stmmac_set_pauseparam(struct net_device *netdev, 502 struct ethtool_pauseparam *pause) 503 { 504 struct stmmac_priv *priv = netdev_priv(netdev); 505 struct phy_device *phy = netdev->phydev; 506 int new_pause = FLOW_OFF; 507 508 if (priv->hw->pcs && priv->hw->mac->pcs_get_adv_lp) { 509 struct rgmii_adv adv_lp; 510 511 pause->autoneg = 1; 512 priv->hw->mac->pcs_get_adv_lp(priv->ioaddr, &adv_lp); 513 if (!adv_lp.pause) 514 return -EOPNOTSUPP; 515 } else { 516 if (!(phy->supported & SUPPORTED_Pause) || 517 !(phy->supported & SUPPORTED_Asym_Pause)) 518 return -EOPNOTSUPP; 519 } 520 521 if (pause->rx_pause) 522 new_pause |= FLOW_RX; 523 if (pause->tx_pause) 524 new_pause |= FLOW_TX; 525 526 priv->flow_ctrl = new_pause; 527 phy->autoneg = pause->autoneg; 528 529 if (phy->autoneg) { 530 if (netif_running(netdev)) 531 return phy_start_aneg(phy); 532 } 533 534 priv->hw->mac->flow_ctrl(priv->hw, phy->duplex, priv->flow_ctrl, 535 priv->pause); 536 return 0; 537 } 538 539 static void stmmac_get_ethtool_stats(struct net_device *dev, 540 struct ethtool_stats *dummy, u64 *data) 541 { 542 struct stmmac_priv *priv = netdev_priv(dev); 543 int i, j = 0; 544 545 /* Update the DMA HW counters for dwmac10/100 */ 546 if (priv->hw->dma->dma_diagnostic_fr) 547 priv->hw->dma->dma_diagnostic_fr(&dev->stats, 548 (void *) &priv->xstats, 549 priv->ioaddr); 550 else { 551 /* If supported, for new GMAC chips expose the MMC counters */ 552 if (priv->dma_cap.rmon) { 553 dwmac_mmc_read(priv->mmcaddr, &priv->mmc); 554 555 for (i = 0; i < STMMAC_MMC_STATS_LEN; i++) { 556 char *p; 557 p = (char *)priv + stmmac_mmc[i].stat_offset; 558 559 data[j++] = (stmmac_mmc[i].sizeof_stat == 560 sizeof(u64)) ? (*(u64 *)p) : 561 (*(u32 *)p); 562 } 563 } 564 if (priv->eee_enabled) { 565 int val = phy_get_eee_err(dev->phydev); 566 if (val) 567 priv->xstats.phy_eee_wakeup_error_n = val; 568 } 569 570 if ((priv->hw->mac->debug) && 571 (priv->synopsys_id >= DWMAC_CORE_3_50)) 572 priv->hw->mac->debug(priv->ioaddr, 573 (void *)&priv->xstats); 574 } 575 for (i = 0; i < STMMAC_STATS_LEN; i++) { 576 char *p = (char *)priv + stmmac_gstrings_stats[i].stat_offset; 577 data[j++] = (stmmac_gstrings_stats[i].sizeof_stat == 578 sizeof(u64)) ? (*(u64 *)p) : (*(u32 *)p); 579 } 580 } 581 582 static int stmmac_get_sset_count(struct net_device *netdev, int sset) 583 { 584 struct stmmac_priv *priv = netdev_priv(netdev); 585 int len; 586 587 switch (sset) { 588 case ETH_SS_STATS: 589 len = STMMAC_STATS_LEN; 590 591 if (priv->dma_cap.rmon) 592 len += STMMAC_MMC_STATS_LEN; 593 594 return len; 595 default: 596 return -EOPNOTSUPP; 597 } 598 } 599 600 static void stmmac_get_strings(struct net_device *dev, u32 stringset, u8 *data) 601 { 602 int i; 603 u8 *p = data; 604 struct stmmac_priv *priv = netdev_priv(dev); 605 606 switch (stringset) { 607 case ETH_SS_STATS: 608 if (priv->dma_cap.rmon) 609 for (i = 0; i < STMMAC_MMC_STATS_LEN; i++) { 610 memcpy(p, stmmac_mmc[i].stat_string, 611 ETH_GSTRING_LEN); 612 p += ETH_GSTRING_LEN; 613 } 614 for (i = 0; i < STMMAC_STATS_LEN; i++) { 615 memcpy(p, stmmac_gstrings_stats[i].stat_string, 616 ETH_GSTRING_LEN); 617 p += ETH_GSTRING_LEN; 618 } 619 break; 620 default: 621 WARN_ON(1); 622 break; 623 } 624 } 625 626 /* Currently only support WOL through Magic packet. */ 627 static void stmmac_get_wol(struct net_device *dev, struct ethtool_wolinfo *wol) 628 { 629 struct stmmac_priv *priv = netdev_priv(dev); 630 631 spin_lock_irq(&priv->lock); 632 if (device_can_wakeup(priv->device)) { 633 wol->supported = WAKE_MAGIC | WAKE_UCAST; 634 wol->wolopts = priv->wolopts; 635 } 636 spin_unlock_irq(&priv->lock); 637 } 638 639 static int stmmac_set_wol(struct net_device *dev, struct ethtool_wolinfo *wol) 640 { 641 struct stmmac_priv *priv = netdev_priv(dev); 642 u32 support = WAKE_MAGIC | WAKE_UCAST; 643 644 /* By default almost all GMAC devices support the WoL via 645 * magic frame but we can disable it if the HW capability 646 * register shows no support for pmt_magic_frame. */ 647 if ((priv->hw_cap_support) && (!priv->dma_cap.pmt_magic_frame)) 648 wol->wolopts &= ~WAKE_MAGIC; 649 650 if (!device_can_wakeup(priv->device)) 651 return -EINVAL; 652 653 if (wol->wolopts & ~support) 654 return -EINVAL; 655 656 if (wol->wolopts) { 657 pr_info("stmmac: wakeup enable\n"); 658 device_set_wakeup_enable(priv->device, 1); 659 enable_irq_wake(priv->wol_irq); 660 } else { 661 device_set_wakeup_enable(priv->device, 0); 662 disable_irq_wake(priv->wol_irq); 663 } 664 665 spin_lock_irq(&priv->lock); 666 priv->wolopts = wol->wolopts; 667 spin_unlock_irq(&priv->lock); 668 669 return 0; 670 } 671 672 static int stmmac_ethtool_op_get_eee(struct net_device *dev, 673 struct ethtool_eee *edata) 674 { 675 struct stmmac_priv *priv = netdev_priv(dev); 676 677 if (!priv->dma_cap.eee) 678 return -EOPNOTSUPP; 679 680 edata->eee_enabled = priv->eee_enabled; 681 edata->eee_active = priv->eee_active; 682 edata->tx_lpi_timer = priv->tx_lpi_timer; 683 684 return phy_ethtool_get_eee(dev->phydev, edata); 685 } 686 687 static int stmmac_ethtool_op_set_eee(struct net_device *dev, 688 struct ethtool_eee *edata) 689 { 690 struct stmmac_priv *priv = netdev_priv(dev); 691 692 priv->eee_enabled = edata->eee_enabled; 693 694 if (!priv->eee_enabled) 695 stmmac_disable_eee_mode(priv); 696 else { 697 /* We are asking for enabling the EEE but it is safe 698 * to verify all by invoking the eee_init function. 699 * In case of failure it will return an error. 700 */ 701 priv->eee_enabled = stmmac_eee_init(priv); 702 if (!priv->eee_enabled) 703 return -EOPNOTSUPP; 704 705 /* Do not change tx_lpi_timer in case of failure */ 706 priv->tx_lpi_timer = edata->tx_lpi_timer; 707 } 708 709 return phy_ethtool_set_eee(dev->phydev, edata); 710 } 711 712 static u32 stmmac_usec2riwt(u32 usec, struct stmmac_priv *priv) 713 { 714 unsigned long clk = clk_get_rate(priv->stmmac_clk); 715 716 if (!clk) 717 return 0; 718 719 return (usec * (clk / 1000000)) / 256; 720 } 721 722 static u32 stmmac_riwt2usec(u32 riwt, struct stmmac_priv *priv) 723 { 724 unsigned long clk = clk_get_rate(priv->stmmac_clk); 725 726 if (!clk) 727 return 0; 728 729 return (riwt * 256) / (clk / 1000000); 730 } 731 732 static int stmmac_get_coalesce(struct net_device *dev, 733 struct ethtool_coalesce *ec) 734 { 735 struct stmmac_priv *priv = netdev_priv(dev); 736 737 ec->tx_coalesce_usecs = priv->tx_coal_timer; 738 ec->tx_max_coalesced_frames = priv->tx_coal_frames; 739 740 if (priv->use_riwt) 741 ec->rx_coalesce_usecs = stmmac_riwt2usec(priv->rx_riwt, priv); 742 743 return 0; 744 } 745 746 static int stmmac_set_coalesce(struct net_device *dev, 747 struct ethtool_coalesce *ec) 748 { 749 struct stmmac_priv *priv = netdev_priv(dev); 750 unsigned int rx_riwt; 751 752 /* Check not supported parameters */ 753 if ((ec->rx_max_coalesced_frames) || (ec->rx_coalesce_usecs_irq) || 754 (ec->rx_max_coalesced_frames_irq) || (ec->tx_coalesce_usecs_irq) || 755 (ec->use_adaptive_rx_coalesce) || (ec->use_adaptive_tx_coalesce) || 756 (ec->pkt_rate_low) || (ec->rx_coalesce_usecs_low) || 757 (ec->rx_max_coalesced_frames_low) || (ec->tx_coalesce_usecs_high) || 758 (ec->tx_max_coalesced_frames_low) || (ec->pkt_rate_high) || 759 (ec->tx_coalesce_usecs_low) || (ec->rx_coalesce_usecs_high) || 760 (ec->rx_max_coalesced_frames_high) || 761 (ec->tx_max_coalesced_frames_irq) || 762 (ec->stats_block_coalesce_usecs) || 763 (ec->tx_max_coalesced_frames_high) || (ec->rate_sample_interval)) 764 return -EOPNOTSUPP; 765 766 if (ec->rx_coalesce_usecs == 0) 767 return -EINVAL; 768 769 if ((ec->tx_coalesce_usecs == 0) && 770 (ec->tx_max_coalesced_frames == 0)) 771 return -EINVAL; 772 773 if ((ec->tx_coalesce_usecs > STMMAC_MAX_COAL_TX_TICK) || 774 (ec->tx_max_coalesced_frames > STMMAC_TX_MAX_FRAMES)) 775 return -EINVAL; 776 777 rx_riwt = stmmac_usec2riwt(ec->rx_coalesce_usecs, priv); 778 779 if ((rx_riwt > MAX_DMA_RIWT) || (rx_riwt < MIN_DMA_RIWT)) 780 return -EINVAL; 781 else if (!priv->use_riwt) 782 return -EOPNOTSUPP; 783 784 /* Only copy relevant parameters, ignore all others. */ 785 priv->tx_coal_frames = ec->tx_max_coalesced_frames; 786 priv->tx_coal_timer = ec->tx_coalesce_usecs; 787 priv->rx_riwt = rx_riwt; 788 priv->hw->dma->rx_watchdog(priv->ioaddr, priv->rx_riwt); 789 790 return 0; 791 } 792 793 static int stmmac_get_ts_info(struct net_device *dev, 794 struct ethtool_ts_info *info) 795 { 796 struct stmmac_priv *priv = netdev_priv(dev); 797 798 if ((priv->dma_cap.time_stamp || priv->dma_cap.atime_stamp)) { 799 800 info->so_timestamping = SOF_TIMESTAMPING_TX_SOFTWARE | 801 SOF_TIMESTAMPING_TX_HARDWARE | 802 SOF_TIMESTAMPING_RX_SOFTWARE | 803 SOF_TIMESTAMPING_RX_HARDWARE | 804 SOF_TIMESTAMPING_SOFTWARE | 805 SOF_TIMESTAMPING_RAW_HARDWARE; 806 807 if (priv->ptp_clock) 808 info->phc_index = ptp_clock_index(priv->ptp_clock); 809 810 info->tx_types = (1 << HWTSTAMP_TX_OFF) | (1 << HWTSTAMP_TX_ON); 811 812 info->rx_filters = ((1 << HWTSTAMP_FILTER_NONE) | 813 (1 << HWTSTAMP_FILTER_PTP_V1_L4_EVENT) | 814 (1 << HWTSTAMP_FILTER_PTP_V1_L4_SYNC) | 815 (1 << HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ) | 816 (1 << HWTSTAMP_FILTER_PTP_V2_L4_EVENT) | 817 (1 << HWTSTAMP_FILTER_PTP_V2_L4_SYNC) | 818 (1 << HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ) | 819 (1 << HWTSTAMP_FILTER_PTP_V2_EVENT) | 820 (1 << HWTSTAMP_FILTER_PTP_V2_SYNC) | 821 (1 << HWTSTAMP_FILTER_PTP_V2_DELAY_REQ) | 822 (1 << HWTSTAMP_FILTER_ALL)); 823 return 0; 824 } else 825 return ethtool_op_get_ts_info(dev, info); 826 } 827 828 static int stmmac_get_tunable(struct net_device *dev, 829 const struct ethtool_tunable *tuna, void *data) 830 { 831 struct stmmac_priv *priv = netdev_priv(dev); 832 int ret = 0; 833 834 switch (tuna->id) { 835 case ETHTOOL_RX_COPYBREAK: 836 *(u32 *)data = priv->rx_copybreak; 837 break; 838 default: 839 ret = -EINVAL; 840 break; 841 } 842 843 return ret; 844 } 845 846 static int stmmac_set_tunable(struct net_device *dev, 847 const struct ethtool_tunable *tuna, 848 const void *data) 849 { 850 struct stmmac_priv *priv = netdev_priv(dev); 851 int ret = 0; 852 853 switch (tuna->id) { 854 case ETHTOOL_RX_COPYBREAK: 855 priv->rx_copybreak = *(u32 *)data; 856 break; 857 default: 858 ret = -EINVAL; 859 break; 860 } 861 862 return ret; 863 } 864 865 static const struct ethtool_ops stmmac_ethtool_ops = { 866 .begin = stmmac_check_if_running, 867 .get_drvinfo = stmmac_ethtool_getdrvinfo, 868 .get_msglevel = stmmac_ethtool_getmsglevel, 869 .set_msglevel = stmmac_ethtool_setmsglevel, 870 .get_regs = stmmac_ethtool_gregs, 871 .get_regs_len = stmmac_ethtool_get_regs_len, 872 .get_link = ethtool_op_get_link, 873 .get_pauseparam = stmmac_get_pauseparam, 874 .set_pauseparam = stmmac_set_pauseparam, 875 .get_ethtool_stats = stmmac_get_ethtool_stats, 876 .get_strings = stmmac_get_strings, 877 .get_wol = stmmac_get_wol, 878 .set_wol = stmmac_set_wol, 879 .get_eee = stmmac_ethtool_op_get_eee, 880 .set_eee = stmmac_ethtool_op_set_eee, 881 .get_sset_count = stmmac_get_sset_count, 882 .get_ts_info = stmmac_get_ts_info, 883 .get_coalesce = stmmac_get_coalesce, 884 .set_coalesce = stmmac_set_coalesce, 885 .get_tunable = stmmac_get_tunable, 886 .set_tunable = stmmac_set_tunable, 887 .get_link_ksettings = stmmac_ethtool_get_link_ksettings, 888 .set_link_ksettings = stmmac_ethtool_set_link_ksettings, 889 }; 890 891 void stmmac_set_ethtool_ops(struct net_device *netdev) 892 { 893 netdev->ethtool_ops = &stmmac_ethtool_ops; 894 } 895