1 /******************************************************************************* 2 STMMAC Ethtool support 3 4 Copyright (C) 2007-2009 STMicroelectronics Ltd 5 6 This program is free software; you can redistribute it and/or modify it 7 under the terms and conditions of the GNU General Public License, 8 version 2, as published by the Free Software Foundation. 9 10 This program is distributed in the hope it will be useful, but WITHOUT 11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 13 more details. 14 15 You should have received a copy of the GNU General Public License along with 16 this program; if not, write to the Free Software Foundation, Inc., 17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. 18 19 The full GNU General Public License is included in this distribution in 20 the file called "COPYING". 21 22 Author: Giuseppe Cavallaro <peppe.cavallaro@st.com> 23 *******************************************************************************/ 24 25 #include <linux/etherdevice.h> 26 #include <linux/ethtool.h> 27 #include <linux/interrupt.h> 28 #include <linux/mii.h> 29 #include <linux/phy.h> 30 #include <asm/io.h> 31 32 #include "stmmac.h" 33 #include "dwmac_dma.h" 34 35 #define REG_SPACE_SIZE 0x1054 36 #define MAC100_ETHTOOL_NAME "st_mac100" 37 #define GMAC_ETHTOOL_NAME "st_gmac" 38 39 struct stmmac_stats { 40 char stat_string[ETH_GSTRING_LEN]; 41 int sizeof_stat; 42 int stat_offset; 43 }; 44 45 #define STMMAC_STAT(m) \ 46 { #m, FIELD_SIZEOF(struct stmmac_extra_stats, m), \ 47 offsetof(struct stmmac_priv, xstats.m)} 48 49 static const struct stmmac_stats stmmac_gstrings_stats[] = { 50 /* Transmit errors */ 51 STMMAC_STAT(tx_underflow), 52 STMMAC_STAT(tx_carrier), 53 STMMAC_STAT(tx_losscarrier), 54 STMMAC_STAT(vlan_tag), 55 STMMAC_STAT(tx_deferred), 56 STMMAC_STAT(tx_vlan), 57 STMMAC_STAT(tx_jabber), 58 STMMAC_STAT(tx_frame_flushed), 59 STMMAC_STAT(tx_payload_error), 60 STMMAC_STAT(tx_ip_header_error), 61 /* Receive errors */ 62 STMMAC_STAT(rx_desc), 63 STMMAC_STAT(sa_filter_fail), 64 STMMAC_STAT(overflow_error), 65 STMMAC_STAT(ipc_csum_error), 66 STMMAC_STAT(rx_collision), 67 STMMAC_STAT(rx_crc), 68 STMMAC_STAT(dribbling_bit), 69 STMMAC_STAT(rx_length), 70 STMMAC_STAT(rx_mii), 71 STMMAC_STAT(rx_multicast), 72 STMMAC_STAT(rx_gmac_overflow), 73 STMMAC_STAT(rx_watchdog), 74 STMMAC_STAT(da_rx_filter_fail), 75 STMMAC_STAT(sa_rx_filter_fail), 76 STMMAC_STAT(rx_missed_cntr), 77 STMMAC_STAT(rx_overflow_cntr), 78 STMMAC_STAT(rx_vlan), 79 /* Tx/Rx IRQ error info */ 80 STMMAC_STAT(tx_undeflow_irq), 81 STMMAC_STAT(tx_process_stopped_irq), 82 STMMAC_STAT(tx_jabber_irq), 83 STMMAC_STAT(rx_overflow_irq), 84 STMMAC_STAT(rx_buf_unav_irq), 85 STMMAC_STAT(rx_process_stopped_irq), 86 STMMAC_STAT(rx_watchdog_irq), 87 STMMAC_STAT(tx_early_irq), 88 STMMAC_STAT(fatal_bus_error_irq), 89 /* Tx/Rx IRQ Events */ 90 STMMAC_STAT(rx_early_irq), 91 STMMAC_STAT(threshold), 92 STMMAC_STAT(tx_pkt_n), 93 STMMAC_STAT(rx_pkt_n), 94 STMMAC_STAT(normal_irq_n), 95 STMMAC_STAT(rx_normal_irq_n), 96 STMMAC_STAT(napi_poll), 97 STMMAC_STAT(tx_normal_irq_n), 98 STMMAC_STAT(tx_clean), 99 STMMAC_STAT(tx_reset_ic_bit), 100 STMMAC_STAT(irq_receive_pmt_irq_n), 101 /* MMC info */ 102 STMMAC_STAT(mmc_tx_irq_n), 103 STMMAC_STAT(mmc_rx_irq_n), 104 STMMAC_STAT(mmc_rx_csum_offload_irq_n), 105 /* EEE */ 106 STMMAC_STAT(irq_tx_path_in_lpi_mode_n), 107 STMMAC_STAT(irq_tx_path_exit_lpi_mode_n), 108 STMMAC_STAT(irq_rx_path_in_lpi_mode_n), 109 STMMAC_STAT(irq_rx_path_exit_lpi_mode_n), 110 STMMAC_STAT(phy_eee_wakeup_error_n), 111 }; 112 #define STMMAC_STATS_LEN ARRAY_SIZE(stmmac_gstrings_stats) 113 114 /* HW MAC Management counters (if supported) */ 115 #define STMMAC_MMC_STAT(m) \ 116 { #m, FIELD_SIZEOF(struct stmmac_counters, m), \ 117 offsetof(struct stmmac_priv, mmc.m)} 118 119 static const struct stmmac_stats stmmac_mmc[] = { 120 STMMAC_MMC_STAT(mmc_tx_octetcount_gb), 121 STMMAC_MMC_STAT(mmc_tx_framecount_gb), 122 STMMAC_MMC_STAT(mmc_tx_broadcastframe_g), 123 STMMAC_MMC_STAT(mmc_tx_multicastframe_g), 124 STMMAC_MMC_STAT(mmc_tx_64_octets_gb), 125 STMMAC_MMC_STAT(mmc_tx_65_to_127_octets_gb), 126 STMMAC_MMC_STAT(mmc_tx_128_to_255_octets_gb), 127 STMMAC_MMC_STAT(mmc_tx_256_to_511_octets_gb), 128 STMMAC_MMC_STAT(mmc_tx_512_to_1023_octets_gb), 129 STMMAC_MMC_STAT(mmc_tx_1024_to_max_octets_gb), 130 STMMAC_MMC_STAT(mmc_tx_unicast_gb), 131 STMMAC_MMC_STAT(mmc_tx_multicast_gb), 132 STMMAC_MMC_STAT(mmc_tx_broadcast_gb), 133 STMMAC_MMC_STAT(mmc_tx_underflow_error), 134 STMMAC_MMC_STAT(mmc_tx_singlecol_g), 135 STMMAC_MMC_STAT(mmc_tx_multicol_g), 136 STMMAC_MMC_STAT(mmc_tx_deferred), 137 STMMAC_MMC_STAT(mmc_tx_latecol), 138 STMMAC_MMC_STAT(mmc_tx_exesscol), 139 STMMAC_MMC_STAT(mmc_tx_carrier_error), 140 STMMAC_MMC_STAT(mmc_tx_octetcount_g), 141 STMMAC_MMC_STAT(mmc_tx_framecount_g), 142 STMMAC_MMC_STAT(mmc_tx_excessdef), 143 STMMAC_MMC_STAT(mmc_tx_pause_frame), 144 STMMAC_MMC_STAT(mmc_tx_vlan_frame_g), 145 STMMAC_MMC_STAT(mmc_rx_framecount_gb), 146 STMMAC_MMC_STAT(mmc_rx_octetcount_gb), 147 STMMAC_MMC_STAT(mmc_rx_octetcount_g), 148 STMMAC_MMC_STAT(mmc_rx_broadcastframe_g), 149 STMMAC_MMC_STAT(mmc_rx_multicastframe_g), 150 STMMAC_MMC_STAT(mmc_rx_crc_errror), 151 STMMAC_MMC_STAT(mmc_rx_align_error), 152 STMMAC_MMC_STAT(mmc_rx_run_error), 153 STMMAC_MMC_STAT(mmc_rx_jabber_error), 154 STMMAC_MMC_STAT(mmc_rx_undersize_g), 155 STMMAC_MMC_STAT(mmc_rx_oversize_g), 156 STMMAC_MMC_STAT(mmc_rx_64_octets_gb), 157 STMMAC_MMC_STAT(mmc_rx_65_to_127_octets_gb), 158 STMMAC_MMC_STAT(mmc_rx_128_to_255_octets_gb), 159 STMMAC_MMC_STAT(mmc_rx_256_to_511_octets_gb), 160 STMMAC_MMC_STAT(mmc_rx_512_to_1023_octets_gb), 161 STMMAC_MMC_STAT(mmc_rx_1024_to_max_octets_gb), 162 STMMAC_MMC_STAT(mmc_rx_unicast_g), 163 STMMAC_MMC_STAT(mmc_rx_length_error), 164 STMMAC_MMC_STAT(mmc_rx_autofrangetype), 165 STMMAC_MMC_STAT(mmc_rx_pause_frames), 166 STMMAC_MMC_STAT(mmc_rx_fifo_overflow), 167 STMMAC_MMC_STAT(mmc_rx_vlan_frames_gb), 168 STMMAC_MMC_STAT(mmc_rx_watchdog_error), 169 STMMAC_MMC_STAT(mmc_rx_ipc_intr_mask), 170 STMMAC_MMC_STAT(mmc_rx_ipc_intr), 171 STMMAC_MMC_STAT(mmc_rx_ipv4_gd), 172 STMMAC_MMC_STAT(mmc_rx_ipv4_hderr), 173 STMMAC_MMC_STAT(mmc_rx_ipv4_nopay), 174 STMMAC_MMC_STAT(mmc_rx_ipv4_frag), 175 STMMAC_MMC_STAT(mmc_rx_ipv4_udsbl), 176 STMMAC_MMC_STAT(mmc_rx_ipv4_gd_octets), 177 STMMAC_MMC_STAT(mmc_rx_ipv4_hderr_octets), 178 STMMAC_MMC_STAT(mmc_rx_ipv4_nopay_octets), 179 STMMAC_MMC_STAT(mmc_rx_ipv4_frag_octets), 180 STMMAC_MMC_STAT(mmc_rx_ipv4_udsbl_octets), 181 STMMAC_MMC_STAT(mmc_rx_ipv6_gd_octets), 182 STMMAC_MMC_STAT(mmc_rx_ipv6_hderr_octets), 183 STMMAC_MMC_STAT(mmc_rx_ipv6_nopay_octets), 184 STMMAC_MMC_STAT(mmc_rx_ipv6_gd), 185 STMMAC_MMC_STAT(mmc_rx_ipv6_hderr), 186 STMMAC_MMC_STAT(mmc_rx_ipv6_nopay), 187 STMMAC_MMC_STAT(mmc_rx_udp_gd), 188 STMMAC_MMC_STAT(mmc_rx_udp_err), 189 STMMAC_MMC_STAT(mmc_rx_tcp_gd), 190 STMMAC_MMC_STAT(mmc_rx_tcp_err), 191 STMMAC_MMC_STAT(mmc_rx_icmp_gd), 192 STMMAC_MMC_STAT(mmc_rx_icmp_err), 193 STMMAC_MMC_STAT(mmc_rx_udp_gd_octets), 194 STMMAC_MMC_STAT(mmc_rx_udp_err_octets), 195 STMMAC_MMC_STAT(mmc_rx_tcp_gd_octets), 196 STMMAC_MMC_STAT(mmc_rx_tcp_err_octets), 197 STMMAC_MMC_STAT(mmc_rx_icmp_gd_octets), 198 STMMAC_MMC_STAT(mmc_rx_icmp_err_octets), 199 }; 200 #define STMMAC_MMC_STATS_LEN ARRAY_SIZE(stmmac_mmc) 201 202 static void stmmac_ethtool_getdrvinfo(struct net_device *dev, 203 struct ethtool_drvinfo *info) 204 { 205 struct stmmac_priv *priv = netdev_priv(dev); 206 207 if (priv->plat->has_gmac) 208 strlcpy(info->driver, GMAC_ETHTOOL_NAME, sizeof(info->driver)); 209 else 210 strlcpy(info->driver, MAC100_ETHTOOL_NAME, 211 sizeof(info->driver)); 212 213 strcpy(info->version, DRV_MODULE_VERSION); 214 info->fw_version[0] = '\0'; 215 } 216 217 static int stmmac_ethtool_getsettings(struct net_device *dev, 218 struct ethtool_cmd *cmd) 219 { 220 struct stmmac_priv *priv = netdev_priv(dev); 221 struct phy_device *phy = priv->phydev; 222 int rc; 223 if (phy == NULL) { 224 pr_err("%s: %s: PHY is not registered\n", 225 __func__, dev->name); 226 return -ENODEV; 227 } 228 if (!netif_running(dev)) { 229 pr_err("%s: interface is disabled: we cannot track " 230 "link speed / duplex setting\n", dev->name); 231 return -EBUSY; 232 } 233 cmd->transceiver = XCVR_INTERNAL; 234 spin_lock_irq(&priv->lock); 235 rc = phy_ethtool_gset(phy, cmd); 236 spin_unlock_irq(&priv->lock); 237 return rc; 238 } 239 240 static int stmmac_ethtool_setsettings(struct net_device *dev, 241 struct ethtool_cmd *cmd) 242 { 243 struct stmmac_priv *priv = netdev_priv(dev); 244 struct phy_device *phy = priv->phydev; 245 int rc; 246 247 spin_lock(&priv->lock); 248 rc = phy_ethtool_sset(phy, cmd); 249 spin_unlock(&priv->lock); 250 251 return rc; 252 } 253 254 static u32 stmmac_ethtool_getmsglevel(struct net_device *dev) 255 { 256 struct stmmac_priv *priv = netdev_priv(dev); 257 return priv->msg_enable; 258 } 259 260 static void stmmac_ethtool_setmsglevel(struct net_device *dev, u32 level) 261 { 262 struct stmmac_priv *priv = netdev_priv(dev); 263 priv->msg_enable = level; 264 265 } 266 267 static int stmmac_check_if_running(struct net_device *dev) 268 { 269 if (!netif_running(dev)) 270 return -EBUSY; 271 return 0; 272 } 273 274 static int stmmac_ethtool_get_regs_len(struct net_device *dev) 275 { 276 return REG_SPACE_SIZE; 277 } 278 279 static void stmmac_ethtool_gregs(struct net_device *dev, 280 struct ethtool_regs *regs, void *space) 281 { 282 int i; 283 u32 *reg_space = (u32 *) space; 284 285 struct stmmac_priv *priv = netdev_priv(dev); 286 287 memset(reg_space, 0x0, REG_SPACE_SIZE); 288 289 if (!priv->plat->has_gmac) { 290 /* MAC registers */ 291 for (i = 0; i < 12; i++) 292 reg_space[i] = readl(priv->ioaddr + (i * 4)); 293 /* DMA registers */ 294 for (i = 0; i < 9; i++) 295 reg_space[i + 12] = 296 readl(priv->ioaddr + (DMA_BUS_MODE + (i * 4))); 297 reg_space[22] = readl(priv->ioaddr + DMA_CUR_TX_BUF_ADDR); 298 reg_space[23] = readl(priv->ioaddr + DMA_CUR_RX_BUF_ADDR); 299 } else { 300 /* MAC registers */ 301 for (i = 0; i < 55; i++) 302 reg_space[i] = readl(priv->ioaddr + (i * 4)); 303 /* DMA registers */ 304 for (i = 0; i < 22; i++) 305 reg_space[i + 55] = 306 readl(priv->ioaddr + (DMA_BUS_MODE + (i * 4))); 307 } 308 } 309 310 static void 311 stmmac_get_pauseparam(struct net_device *netdev, 312 struct ethtool_pauseparam *pause) 313 { 314 struct stmmac_priv *priv = netdev_priv(netdev); 315 316 spin_lock(&priv->lock); 317 318 pause->rx_pause = 0; 319 pause->tx_pause = 0; 320 pause->autoneg = priv->phydev->autoneg; 321 322 if (priv->flow_ctrl & FLOW_RX) 323 pause->rx_pause = 1; 324 if (priv->flow_ctrl & FLOW_TX) 325 pause->tx_pause = 1; 326 327 spin_unlock(&priv->lock); 328 } 329 330 static int 331 stmmac_set_pauseparam(struct net_device *netdev, 332 struct ethtool_pauseparam *pause) 333 { 334 struct stmmac_priv *priv = netdev_priv(netdev); 335 struct phy_device *phy = priv->phydev; 336 int new_pause = FLOW_OFF; 337 int ret = 0; 338 339 spin_lock(&priv->lock); 340 341 if (pause->rx_pause) 342 new_pause |= FLOW_RX; 343 if (pause->tx_pause) 344 new_pause |= FLOW_TX; 345 346 priv->flow_ctrl = new_pause; 347 phy->autoneg = pause->autoneg; 348 349 if (phy->autoneg) { 350 if (netif_running(netdev)) 351 ret = phy_start_aneg(phy); 352 } else 353 priv->hw->mac->flow_ctrl(priv->ioaddr, phy->duplex, 354 priv->flow_ctrl, priv->pause); 355 spin_unlock(&priv->lock); 356 return ret; 357 } 358 359 static void stmmac_get_ethtool_stats(struct net_device *dev, 360 struct ethtool_stats *dummy, u64 *data) 361 { 362 struct stmmac_priv *priv = netdev_priv(dev); 363 int i, j = 0; 364 365 /* Update the DMA HW counters for dwmac10/100 */ 366 if (!priv->plat->has_gmac) 367 priv->hw->dma->dma_diagnostic_fr(&dev->stats, 368 (void *) &priv->xstats, 369 priv->ioaddr); 370 else { 371 /* If supported, for new GMAC chips expose the MMC counters */ 372 if (priv->dma_cap.rmon) { 373 dwmac_mmc_read(priv->ioaddr, &priv->mmc); 374 375 for (i = 0; i < STMMAC_MMC_STATS_LEN; i++) { 376 char *p; 377 p = (char *)priv + stmmac_mmc[i].stat_offset; 378 379 data[j++] = (stmmac_mmc[i].sizeof_stat == 380 sizeof(u64)) ? (*(u64 *)p) : 381 (*(u32 *)p); 382 } 383 } 384 if (priv->eee_enabled) { 385 int val = phy_get_eee_err(priv->phydev); 386 if (val) 387 priv->xstats.phy_eee_wakeup_error_n = val; 388 } 389 } 390 for (i = 0; i < STMMAC_STATS_LEN; i++) { 391 char *p = (char *)priv + stmmac_gstrings_stats[i].stat_offset; 392 data[j++] = (stmmac_gstrings_stats[i].sizeof_stat == 393 sizeof(u64)) ? (*(u64 *)p) : (*(u32 *)p); 394 } 395 } 396 397 static int stmmac_get_sset_count(struct net_device *netdev, int sset) 398 { 399 struct stmmac_priv *priv = netdev_priv(netdev); 400 int len; 401 402 switch (sset) { 403 case ETH_SS_STATS: 404 len = STMMAC_STATS_LEN; 405 406 if (priv->dma_cap.rmon) 407 len += STMMAC_MMC_STATS_LEN; 408 409 return len; 410 default: 411 return -EOPNOTSUPP; 412 } 413 } 414 415 static void stmmac_get_strings(struct net_device *dev, u32 stringset, u8 *data) 416 { 417 int i; 418 u8 *p = data; 419 struct stmmac_priv *priv = netdev_priv(dev); 420 421 switch (stringset) { 422 case ETH_SS_STATS: 423 if (priv->dma_cap.rmon) 424 for (i = 0; i < STMMAC_MMC_STATS_LEN; i++) { 425 memcpy(p, stmmac_mmc[i].stat_string, 426 ETH_GSTRING_LEN); 427 p += ETH_GSTRING_LEN; 428 } 429 for (i = 0; i < STMMAC_STATS_LEN; i++) { 430 memcpy(p, stmmac_gstrings_stats[i].stat_string, 431 ETH_GSTRING_LEN); 432 p += ETH_GSTRING_LEN; 433 } 434 break; 435 default: 436 WARN_ON(1); 437 break; 438 } 439 } 440 441 /* Currently only support WOL through Magic packet. */ 442 static void stmmac_get_wol(struct net_device *dev, struct ethtool_wolinfo *wol) 443 { 444 struct stmmac_priv *priv = netdev_priv(dev); 445 446 spin_lock_irq(&priv->lock); 447 if (device_can_wakeup(priv->device)) { 448 wol->supported = WAKE_MAGIC | WAKE_UCAST; 449 wol->wolopts = priv->wolopts; 450 } 451 spin_unlock_irq(&priv->lock); 452 } 453 454 static int stmmac_set_wol(struct net_device *dev, struct ethtool_wolinfo *wol) 455 { 456 struct stmmac_priv *priv = netdev_priv(dev); 457 u32 support = WAKE_MAGIC | WAKE_UCAST; 458 459 /* By default almost all GMAC devices support the WoL via 460 * magic frame but we can disable it if the HW capability 461 * register shows no support for pmt_magic_frame. */ 462 if ((priv->hw_cap_support) && (!priv->dma_cap.pmt_magic_frame)) 463 wol->wolopts &= ~WAKE_MAGIC; 464 465 if (!device_can_wakeup(priv->device)) 466 return -EINVAL; 467 468 if (wol->wolopts & ~support) 469 return -EINVAL; 470 471 if (wol->wolopts) { 472 pr_info("stmmac: wakeup enable\n"); 473 device_set_wakeup_enable(priv->device, 1); 474 enable_irq_wake(priv->wol_irq); 475 } else { 476 device_set_wakeup_enable(priv->device, 0); 477 disable_irq_wake(priv->wol_irq); 478 } 479 480 spin_lock_irq(&priv->lock); 481 priv->wolopts = wol->wolopts; 482 spin_unlock_irq(&priv->lock); 483 484 return 0; 485 } 486 487 static int stmmac_ethtool_op_get_eee(struct net_device *dev, 488 struct ethtool_eee *edata) 489 { 490 struct stmmac_priv *priv = netdev_priv(dev); 491 492 if (!priv->dma_cap.eee) 493 return -EOPNOTSUPP; 494 495 edata->eee_enabled = priv->eee_enabled; 496 edata->eee_active = priv->eee_active; 497 edata->tx_lpi_timer = priv->tx_lpi_timer; 498 499 return phy_ethtool_get_eee(priv->phydev, edata); 500 } 501 502 static int stmmac_ethtool_op_set_eee(struct net_device *dev, 503 struct ethtool_eee *edata) 504 { 505 struct stmmac_priv *priv = netdev_priv(dev); 506 507 priv->eee_enabled = edata->eee_enabled; 508 509 if (!priv->eee_enabled) 510 stmmac_disable_eee_mode(priv); 511 else { 512 /* We are asking for enabling the EEE but it is safe 513 * to verify all by invoking the eee_init function. 514 * In case of failure it will return an error. 515 */ 516 priv->eee_enabled = stmmac_eee_init(priv); 517 if (!priv->eee_enabled) 518 return -EOPNOTSUPP; 519 520 /* Do not change tx_lpi_timer in case of failure */ 521 priv->tx_lpi_timer = edata->tx_lpi_timer; 522 } 523 524 return phy_ethtool_set_eee(priv->phydev, edata); 525 } 526 527 static u32 stmmac_usec2riwt(u32 usec, struct stmmac_priv *priv) 528 { 529 unsigned long clk = clk_get_rate(priv->stmmac_clk); 530 531 if (!clk) 532 return 0; 533 534 return (usec * (clk / 1000000)) / 256; 535 } 536 537 static u32 stmmac_riwt2usec(u32 riwt, struct stmmac_priv *priv) 538 { 539 unsigned long clk = clk_get_rate(priv->stmmac_clk); 540 541 if (!clk) 542 return 0; 543 544 return (riwt * 256) / (clk / 1000000); 545 } 546 547 static int stmmac_get_coalesce(struct net_device *dev, 548 struct ethtool_coalesce *ec) 549 { 550 struct stmmac_priv *priv = netdev_priv(dev); 551 552 ec->tx_coalesce_usecs = priv->tx_coal_timer; 553 ec->tx_max_coalesced_frames = priv->tx_coal_frames; 554 555 if (priv->use_riwt) 556 ec->rx_coalesce_usecs = stmmac_riwt2usec(priv->rx_riwt, priv); 557 558 return 0; 559 } 560 561 static int stmmac_set_coalesce(struct net_device *dev, 562 struct ethtool_coalesce *ec) 563 { 564 struct stmmac_priv *priv = netdev_priv(dev); 565 unsigned int rx_riwt; 566 567 /* Check not supported parameters */ 568 if ((ec->rx_max_coalesced_frames) || (ec->rx_coalesce_usecs_irq) || 569 (ec->rx_max_coalesced_frames_irq) || (ec->tx_coalesce_usecs_irq) || 570 (ec->use_adaptive_rx_coalesce) || (ec->use_adaptive_tx_coalesce) || 571 (ec->pkt_rate_low) || (ec->rx_coalesce_usecs_low) || 572 (ec->rx_max_coalesced_frames_low) || (ec->tx_coalesce_usecs_high) || 573 (ec->tx_max_coalesced_frames_low) || (ec->pkt_rate_high) || 574 (ec->tx_coalesce_usecs_low) || (ec->rx_coalesce_usecs_high) || 575 (ec->rx_max_coalesced_frames_high) || 576 (ec->tx_max_coalesced_frames_irq) || 577 (ec->stats_block_coalesce_usecs) || 578 (ec->tx_max_coalesced_frames_high) || (ec->rate_sample_interval)) 579 return -EOPNOTSUPP; 580 581 if (ec->rx_coalesce_usecs == 0) 582 return -EINVAL; 583 584 if ((ec->tx_coalesce_usecs == 0) && 585 (ec->tx_max_coalesced_frames == 0)) 586 return -EINVAL; 587 588 if ((ec->tx_coalesce_usecs > STMMAC_COAL_TX_TIMER) || 589 (ec->tx_max_coalesced_frames > STMMAC_TX_MAX_FRAMES)) 590 return -EINVAL; 591 592 rx_riwt = stmmac_usec2riwt(ec->rx_coalesce_usecs, priv); 593 594 if ((rx_riwt > MAX_DMA_RIWT) || (rx_riwt < MIN_DMA_RIWT)) 595 return -EINVAL; 596 else if (!priv->use_riwt) 597 return -EOPNOTSUPP; 598 599 /* Only copy relevant parameters, ignore all others. */ 600 priv->tx_coal_frames = ec->tx_max_coalesced_frames; 601 priv->tx_coal_timer = ec->tx_coalesce_usecs; 602 priv->rx_riwt = rx_riwt; 603 priv->hw->dma->rx_watchdog(priv->ioaddr, priv->rx_riwt); 604 605 return 0; 606 } 607 608 static const struct ethtool_ops stmmac_ethtool_ops = { 609 .begin = stmmac_check_if_running, 610 .get_drvinfo = stmmac_ethtool_getdrvinfo, 611 .get_settings = stmmac_ethtool_getsettings, 612 .set_settings = stmmac_ethtool_setsettings, 613 .get_msglevel = stmmac_ethtool_getmsglevel, 614 .set_msglevel = stmmac_ethtool_setmsglevel, 615 .get_regs = stmmac_ethtool_gregs, 616 .get_regs_len = stmmac_ethtool_get_regs_len, 617 .get_link = ethtool_op_get_link, 618 .get_pauseparam = stmmac_get_pauseparam, 619 .set_pauseparam = stmmac_set_pauseparam, 620 .get_ethtool_stats = stmmac_get_ethtool_stats, 621 .get_strings = stmmac_get_strings, 622 .get_wol = stmmac_get_wol, 623 .set_wol = stmmac_set_wol, 624 .get_eee = stmmac_ethtool_op_get_eee, 625 .set_eee = stmmac_ethtool_op_set_eee, 626 .get_sset_count = stmmac_get_sset_count, 627 .get_ts_info = ethtool_op_get_ts_info, 628 .get_coalesce = stmmac_get_coalesce, 629 .set_coalesce = stmmac_set_coalesce, 630 }; 631 632 void stmmac_set_ethtool_ops(struct net_device *netdev) 633 { 634 SET_ETHTOOL_OPS(netdev, &stmmac_ethtool_ops); 635 } 636